* Removed short_hand field from opcode table and
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
0e1c2434
SK
12013-10-10 Sean Keys <skeys@ipdatasys.com>
2
3 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
4
47cd3fa7
JB
52013-10-10 Jan Beulich <jbeulich@suse.com>
6
7 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
8 swapping for bndmk, bndldx, and bndstx.
9
6085f853
NC
102013-10-09 Nick Clifton <nickc@redhat.com>
11
b7b2bb1d
NC
12 PR gas/16025
13 * config/tc-epiphany.c (md_convert_frag): Add missing break
14 statement.
15
6085f853
NC
16 PR gas/16026
17 * config/tc-mn10200.c (md_convert_frag): Add missing break
18 statement.
19
cecf1424
JB
202013-10-08 Jan Beulich <jbeulich@suse.com>
21
22 * tc-i386.c (check_word_reg): Remove misplaced "else".
23 (check_long_reg): Restore symmetry with check_word_reg.
24
d3bfe16e
JB
252013-10-08 Jan Beulich <jbeulich@suse.com>
26
27 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
28 LR/PC check.
29
38d77545
NC
302013-10-08 Nick Clifton <nickc@redhat.com>
31
32 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
33 for "<foo>a". Issue error messages for unrecognised or corrrupt
34 size extensions.
35
fe8b4cc3
KT
362013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37
38 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
39 possible.
40
c7b0bd56
SE
412013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
42
43 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
44 * doc/c-i386.texi: Add -march=bdver4 option.
45
cc9afea3
AM
462013-09-20 Alan Modra <amodra@gmail.com>
47
48 * configure: Regenerate.
49
58ca03a2
TG
502013-09-18 Tristan Gingold <gingold@adacore.com>
51
52 * NEWS: Add marker for 2.24.
53
ab905915
NC
542013-09-18 Nick Clifton <nickc@redhat.com>
55
56 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
57 (move_data): New variable.
58 (md_parse_option): Parse -md.
59 (msp430_section): New function. Catch references to the .bss or
60 .data sections and generate a special symbol for use by the libcrt
61 library.
62 (md_pseudo_table): Intercept .section directives.
63 (md_longopt): Add -md
64 (md_show_usage): Likewise.
65 (msp430_operands): Generate a warning message if a NOP is inserted
66 into the instruction stream.
67 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
68
f1c38003
SE
692013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
70
71 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 72 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 73
1d50d57c
WN
742013-09-16 Will Newton <will.newton@linaro.org>
75
76 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
77 disallowing element size 64 with interleave other than 1.
78
173d3447
CF
792013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
80
81 * config/tc-mips.c (match_insn): Set error when $31 is used for
82 bltzal* and bgezal*.
83
ac21e7da
TG
842013-09-04 Tristan Gingold <gingold@adacore.com>
85
86 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
87 symbols.
88
74db7efb
NC
892013-09-04 Roland McGrath <mcgrathr@google.com>
90
91 PR gas/15914
92 * config/tc-arm.c (T16_32_TAB): Add _udf.
93 (do_t_udf): New function.
94 (insns): Add "udf".
95
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DD
962013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
97
98 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
99 assembler errors at correct position.
100
9aff4b7a
NC
1012013-08-23 Yuri Chornoivan <yurchor@ukr.net>
102
103 PR binutils/15834
104 * config/tc-ia64.c: Fix typos.
105 * config/tc-sparc.c: Likewise.
106 * config/tc-z80.c: Likewise.
107 * doc/c-i386.texi: Likewise.
108 * doc/c-m32r.texi: Likewise.
109
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1102013-08-23 Will Newton <will.newton@linaro.org>
111
9aff4b7a 112 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
113 for pre-indexed addressing modes.
114
b4e6cb80
AM
1152013-08-21 Alan Modra <amodra@gmail.com>
116
117 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
118 range check label number for use with fb_low_counter array.
119
1661c76c
RS
1202013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
121
122 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
123 (mips_parse_argument_token, validate_micromips_insn, md_begin)
124 (check_regno, match_float_constant, check_completed_insn, append_insn)
125 (match_insn, match_mips16_insn, match_insns, macro_start)
126 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
127 (mips16_ip, mips_set_option_string, md_parse_option)
128 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
129 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
130 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
131 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
132 Start error messages with a lower-case letter. Do not end error
133 messages with a period. Wrap long messages to 80 character-lines.
134 Use "cannot" instead of "can't" and "can not".
135
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1362013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * config/tc-mips.c (imm_expr): Expand comment.
139 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
140 when populated.
141
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1422013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
143
144 * config/tc-mips.c (imm2_expr): Delete.
145 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
146
5e0dc5ba
RS
1472013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
150 (macro): Remove M_DEXT and M_DINS handling.
151
60f20e8b
RS
1522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
153
154 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
155 lax_max with lax_match.
156 (match_int_operand): Update accordingly. Don't report an error
157 for !lax_match-only cases.
158 (match_insn): Replace more_alts with lax_match and use it to
159 initialize the mips_arg_info field. Add a complete_p parameter.
160 Handle implicit VU0 suffixes here.
161 (match_invalid_for_isa, match_insns, match_mips16_insns): New
162 functions.
163 (mips_ip, mips16_ip): Use them.
164
d436c1c2
RS
1652013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (match_expression): Report uses of registers here.
168 Add a "must be an immediate expression" error. Handle elided offsets
169 here rather than...
170 (match_int_operand): ...here.
171
1a00e612
RS
1722013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
173
174 * config/tc-mips.c (mips_arg_info): Remove soft_match.
175 (match_out_of_range, match_not_constant): New functions.
176 (match_const_int): Remove fallback parameter and check for soft_match.
177 Use match_not_constant.
178 (match_mapped_int_operand, match_addiusp_operand)
179 (match_perf_reg_operand, match_save_restore_list_operand)
180 (match_mdmx_imm_reg_operand): Update accordingly. Use
181 match_out_of_range and set_insn_error* instead of as_bad.
182 (match_int_operand): Likewise. Use match_not_constant in the
183 !allows_nonconst case.
184 (match_float_constant): Report invalid float constants.
185 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
186 match_float_constant to check for invalid constants. Fail the
187 match if match_const_int or match_float_constant return false.
188 (mips_ip): Update accordingly.
189 (mips16_ip): Likewise. Undo null termination of instruction name
190 once lookup is complete.
191
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RS
1922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
193
194 * config/tc-mips.c (mips_insn_error_format): New enum.
195 (mips_insn_error): New struct.
196 (insn_error): Change to a mips_insn_error.
197 (clear_insn_error, set_insn_error_format, set_insn_error)
198 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
199 functions.
200 (mips_parse_argument_token, md_assemble, match_insn)
201 (match_mips16_insn): Use them instead of manipulating insn_error
202 directly.
203 (mips_ip, mips16_ip): Likewise. Simplify control flow.
204
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RS
2052013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
206
207 * config/tc-mips.c (normalize_constant_expr): Move further up file.
208 (normalize_address_expr): Likewise.
209 (match_insn, match_mips16_insn): New functions, split out from...
210 (mips_ip, mips16_ip): ...here.
211
0f35dbc4
RS
2122013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
215 OP_OPTIONAL_REG.
216 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
217 for optional operands.
218
27285eed
AM
2192013-08-16 Alan Modra <amodra@gmail.com>
220
221 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
222 modifiers generally.
223
cbe02d4f
AM
2242013-08-16 Alan Modra <amodra@gmail.com>
225
226 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
227
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DE
2282013-08-14 David Edelsohn <dje.gcc@gmail.com>
229
230 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
231 argument as alignment.
232
4046d87a
NC
2332013-08-09 Nick Clifton <nickc@redhat.com>
234
235 * config/tc-rl78.c (elf_flags): New variable.
236 (enum options): Add OPTION_G10.
237 (md_longopts): Add mg10.
238 (md_parse_option): Parse -mg10.
239 (rl78_elf_final_processing): New function.
240 * config/tc-rl78.c (tc_final_processing): Define.
241 * doc/c-rl78.texi: Document -mg10 option.
242
ee5734f0
RS
2432013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
244
245 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
246 suffixes to be elided too.
247 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
248 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
249 to be omitted too.
250
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RS
2512013-08-05 John Tytgat <john@bass-software.com>
252
253 * po/POTFILES.in: Regenerate.
254
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EB
2552013-08-05 Eric Botcazou <ebotcazou@adacore.com>
256 Konrad Eisele <konrad@gaisler.com>
257
258 * config/tc-sparc.c (sparc_arch_types): Add leon.
259 (sparc_arch): Move sparc4 around and add leon.
260 (sparc_target_format): Document -Aleon.
261 * doc/c-sparc.texi: Likewise.
262
da8bca91
RS
2632013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
264
265 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
266
14daeee3
RS
2672013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
268 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
271 (RWARN): Bump to 0x8000000.
272 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
273 (RTYPE_R5900_ACC): New register types.
274 (RTYPE_MASK): Include them.
275 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
276 macros.
277 (reg_names): Include them.
278 (mips_parse_register_1): New function, split out from...
279 (mips_parse_register): ...here. Add a channels_ptr parameter.
280 Look for VU0 channel suffixes when nonnull.
281 (reg_lookup): Update the call to mips_parse_register.
282 (mips_parse_vu0_channels): New function.
283 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
284 (mips_operand_token): Add a "channels" field to the union.
285 Extend the comment above "ch" to OT_DOUBLE_CHAR.
286 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
287 (mips_parse_argument_token): Handle channel suffixes here too.
288 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
289 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
290 Handle '#' formats.
291 (md_begin): Register $vfN and $vfI registers.
292 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
293 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
294 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
295 (match_vu0_suffix_operand): New function.
296 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
297 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
298 (mips_lookup_insn): New function.
299 (mips_ip): Use it. Allow "+K" operands to be elided at the end
300 of an instruction. Handle '#' sequences.
301
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RS
3022013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
303
304 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
305 values and use it instead of sreg, treg, xreg, etc.
306
3ccad066
RS
3072013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
308
309 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
310 and mips_int_operand_max.
311 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
312 Delete.
313 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
314 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
315 instead of mips16_immed_operand.
316
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RS
3172013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
318
319 * config/tc-mips.c (mips16_macro): Don't use move_register.
320 (mips16_ip): Allow macros to use 'p'.
321
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RS
3222013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
323
324 * config/tc-mips.c (MAX_OPERANDS): New macro.
325 (mips_operand_array): New structure.
326 (mips_operands, mips16_operands, micromips_operands): New arrays.
327 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
328 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
329 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
330 (micromips_to_32_reg_q_map): Delete.
331 (insn_operands, insn_opno, insn_extract_operand): New functions.
332 (validate_mips_insn): Take a mips_operand_array as argument and
333 use it to build up a list of operands. Extend to handle INSN_MACRO
334 and MIPS16.
335 (validate_mips16_insn): New function.
336 (validate_micromips_insn): Take a mips_operand_array as argument.
337 Handle INSN_MACRO.
338 (md_begin): Initialize mips_operands, mips16_operands and
339 micromips_operands. Call validate_mips_insn and
340 validate_micromips_insn for macro instructions too.
341 Call validate_mips16_insn for MIPS16 instructions.
342 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
343 New functions.
344 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
345 them. Handle INSN_UDI.
346 (get_append_method): Use gpr_read_mask.
347
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3482013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
349
350 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
351 flags for MIPS16 and non-MIPS16 instructions.
352 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
353 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
354 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
355 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
356 and non-MIPS16 instructions. Fix formatting.
357
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3582013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
359
360 * config/tc-mips.c (reg_needs_delay): Move later in file.
361 Use gpr_write_mask.
362 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
363
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3642013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
365 Alexander Ivchenko <alexander.ivchenko@intel.com>
366 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
367 Sergey Lega <sergey.s.lega@intel.com>
368 Anna Tikhonova <anna.tikhonova@intel.com>
369 Ilya Tocar <ilya.tocar@intel.com>
370 Andrey Turetskiy <andrey.turetskiy@intel.com>
371 Ilya Verbin <ilya.verbin@intel.com>
372 Kirill Yukhin <kirill.yukhin@intel.com>
373 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
374
375 * config/tc-i386-intel.c (O_zmmword_ptr): New.
376 (i386_types): Add zmmword.
377 (i386_intel_simplify_register): Allow regzmm.
378 (i386_intel_simplify): Handle zmmwords.
379 (i386_intel_operand): Handle RC/SAE, vector operations and
380 zmmwords.
381 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
382 (struct RC_Operation): New.
383 (struct Mask_Operation): New.
384 (struct Broadcast_Operation): New.
385 (vex_prefix): Size of bytes increased to 4 to support EVEX
386 encoding.
387 (enum i386_error): Add new error codes: unsupported_broadcast,
388 broadcast_not_on_src_operand, broadcast_needed,
389 unsupported_masking, mask_not_on_destination, no_default_mask,
390 unsupported_rc_sae, rc_sae_operand_not_last_imm,
391 invalid_register_operand, try_vector_disp8.
392 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
393 rounding, broadcast, memshift.
394 (struct RC_name): New.
395 (RC_NamesTable): New.
396 (evexlig): New.
397 (evexwig): New.
398 (extra_symbol_chars): Add '{'.
399 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
400 (i386_operand_type): Add regzmm, regmask and vec_disp8.
401 (match_mem_size): Handle zmmwords.
402 (operand_type_match): Handle zmm-registers.
403 (mode_from_disp_size): Handle vec_disp8.
404 (fits_in_vec_disp8): New.
405 (md_begin): Handle {} properly.
406 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
407 (build_vex_prefix): Handle vrex.
408 (build_evex_prefix): New.
409 (process_immext): Adjust to properly handle EVEX.
410 (md_assemble): Add EVEX encoding support.
411 (swap_2_operands): Correctly handle operands with masking,
412 broadcasting or RC/SAE.
413 (check_VecOperands): Support EVEX features.
414 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
415 (match_template): Support regzmm and handle new error codes.
416 (process_suffix): Handle zmmwords and zmm-registers.
417 (check_byte_reg): Extend to zmm-registers.
418 (process_operands): Extend to zmm-registers.
419 (build_modrm_byte): Handle EVEX.
420 (output_insn): Adjust to properly handle EVEX case.
421 (disp_size): Handle vec_disp8.
422 (output_disp): Support compressed disp8*N evex feature.
423 (output_imm): Handle RC/SAE immediates properly.
424 (check_VecOperations): New.
425 (i386_immediate): Handle EVEX features.
426 (i386_index_check): Handle zmmwords and zmm-registers.
427 (RC_SAE_immediate): New.
428 (i386_att_operand): Handle EVEX features.
429 (parse_real_register): Add a check for ZMM/Mask registers.
430 (OPTION_MEVEXLIG): New.
431 (OPTION_MEVEXWIG): New.
432 (md_longopts): Add mevexlig and mevexwig.
433 (md_parse_option): Handle mevexlig and mevexwig options.
434 (md_show_usage): Add description for mevexlig and mevexwig.
435 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
436 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
437
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4382013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
439
440 * config/tc-i386.c (cpu_arch): Add .sha.
441 * doc/c-i386.texi: Document sha/.sha.
442
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4432013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
444 Kirill Yukhin <kirill.yukhin@intel.com>
445 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
446
447 * config/tc-i386.c (BND_PREFIX): New.
448 (struct _i386_insn): Add new field bnd_prefix.
449 (add_bnd_prefix): New.
450 (cpu_arch): Add MPX.
451 (i386_operand_type): Add regbnd.
452 (md_assemble): Handle BND prefixes.
453 (parse_insn): Likewise.
454 (output_branch): Likewise.
455 (output_jump): Likewise.
456 (build_modrm_byte): Handle regbnd.
457 (OPTION_MADD_BND_PREFIX): New.
458 (md_longopts): Add entry for 'madd-bnd-prefix'.
459 (md_parse_option): Handle madd-bnd-prefix option.
460 (md_show_usage): Add description for madd-bnd-prefix
461 option.
462 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
463
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4642013-07-24 Tristan Gingold <gingold@adacore.com>
465
466 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
467 xcoff targets.
468
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AK
4692013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
470
471 * config/tc-s390.c (s390_machine): Don't force the .machine
472 argument to lower case.
473
e673710a
KT
4742013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
475
476 * config/tc-arm.c (s_arm_arch_extension): Improve error message
477 for invalid extension.
478
69091a2c
YZ
4792013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
480
481 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
482 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
483 (aarch64_abi): New variable.
484 (ilp32_p): Change to be a macro.
485 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
486 (struct aarch64_option_abi_value_table): New struct.
487 (aarch64_abis): New table.
488 (aarch64_parse_abi): New function.
489 (aarch64_long_opts): Add entry for -mabi=.
490 * doc/as.texinfo (Target AArch64 options): Document -mabi.
491 * doc/c-aarch64.texi: Likewise.
492
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NC
4932013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
494
495 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
496 unsigned comparison.
497
f0c00282
NC
4982013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
499
cbe02d4f 500 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 501 RX610.
cbe02d4f 502 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
503 check floating point operation support for target RX100 and
504 RX200.
cbe02d4f
AM
505 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
506 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
507 RX200, RX600, and RX610
f0c00282 508
8c997c27
NC
5092013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
510
511 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
512
8be59acb
NC
5132013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
514
515 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
516 * doc/c-avr.texi: Likewise.
517
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RS
5182013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
519
520 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
521 error with older GCCs.
522 (mips16_macro_build): Dereference args.
523
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RS
5242013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
527 New functions, split out from...
528 (reg_lookup): ...here. Remove itbl support.
529 (reglist_lookup): Delete.
530 (mips_operand_token_type): New enum.
531 (mips_operand_token): New structure.
532 (mips_operand_tokens): New variable.
533 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
534 (mips_parse_arguments): New functions.
535 (md_begin): Initialize mips_operand_tokens.
536 (mips_arg_info): Add a token field. Remove optional_reg field.
537 (match_char, match_expression): New functions.
538 (match_const_int): Use match_expression. Remove "s" argument
539 and return a boolean result. Remove O_register handling.
540 (match_regno, match_reg, match_reg_range): New functions.
541 (match_int_operand, match_mapped_int_operand, match_msb_operand)
542 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
543 (match_addiusp_operand, match_clo_clz_dest_operand)
544 (match_lwm_swm_list_operand, match_entry_exit_operand)
545 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
546 (match_tied_reg_operand): Remove "s" argument and return a boolean
547 result. Match tokens rather than text. Update calls to
548 match_const_int. Rely on match_regno to call check_regno.
549 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
550 "arg" argument. Return a boolean result.
551 (parse_float_constant): Replace with...
552 (match_float_constant): ...this new function.
553 (match_operand): Remove "s" argument and return a boolean result.
554 Update calls to subfunctions.
555 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
556 rather than string-parsing routines. Update handling of optional
557 registers for token scheme.
558
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5592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
560
561 * config/tc-mips.c (parse_float_constant): Split out from...
562 (mips_ip): ...here.
563
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RS
5642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
565
566 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
567 Delete.
568
364215c8
RS
5692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
570
571 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
572 (match_entry_exit_operand): New function.
573 (match_save_restore_list_operand): Likewise.
574 (match_operand): Use them.
575 (check_absolute_expr): Delete.
576 (mips16_ip): Rewrite main parsing loop to use mips_operands.
577
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RS
5782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c: Enable functions commented out in previous patch.
581 (SKIP_SPACE_TABS): Move further up file.
582 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
583 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
584 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
585 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
586 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
587 (micromips_imm_b_map, micromips_imm_c_map): Delete.
588 (mips_lookup_reg_pair): Delete.
589 (macro): Use report_bad_range and report_bad_field.
590 (mips_immed, expr_const_in_range): Delete.
591 (mips_ip): Rewrite main parsing loop to use new functions.
592
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RS
5932013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
594
595 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
596 Change return type to bfd_boolean.
597 (report_bad_range, report_bad_field): New functions.
598 (mips_arg_info): New structure.
599 (match_const_int, convert_reg_type, check_regno, match_int_operand)
600 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
601 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
602 (match_addiusp_operand, match_clo_clz_dest_operand)
603 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
604 (match_pc_operand, match_tied_reg_operand, match_operand)
605 (check_completed_insn): New functions, commented out for now.
606
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RS
6072013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
608
609 * config/tc-mips.c (insn_insert_operand): New function.
610 (macro_build, mips16_macro_build): Put null character check
611 in the for loop and convert continues to breaks. Use operand
612 structures to handle constant operands.
613
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6142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (validate_mips_insn): Move further up file.
617 Add insn_bits and decode_operand arguments. Use the mips_operand
618 fields to work out which bits an operand occupies. Detect double
619 definitions.
620 (validate_micromips_insn): Move further up file. Call into
621 validate_mips_insn.
622
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RS
6232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
624
625 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
626
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RS
6272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
628
629 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
630 and "~".
631 (macro): Update accordingly.
632
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RS
6332013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
634
635 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
636 (imm_reloc): Delete.
637 (md_assemble): Remove imm_reloc handling.
638 (mips_ip): Update commentary. Use offset_expr and offset_reloc
639 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
640 Use a temporary array rather than imm_reloc when parsing
641 constant expressions. Remove imm_reloc initialization.
642 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
643 for the relaxable field. Use a relax_char variable to track the
644 type of this field. Remove imm_reloc initialization.
645
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6462013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
647
648 * config/tc-mips.c (mips16_ip): Handle "I".
649
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MR
6502013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
651
652 * config/tc-mips.c (mips_flag_nan2008): New variable.
653 (options): Add OPTION_NAN enum value.
654 (md_longopts): Handle it.
655 (md_parse_option): Likewise.
656 (s_nan): New function.
657 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
658 (md_show_usage): Add -mnan.
659
660 * doc/as.texinfo (Overview): Add -mnan.
661 * doc/c-mips.texi (MIPS Opts): Document -mnan.
662 (MIPS NaN Encodings): New node. Document .nan directive.
663 (MIPS-Dependent): List the new node.
664
c1094734
TG
6652013-07-09 Tristan Gingold <gingold@adacore.com>
666
667 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
668
0cbbe1b8
RS
6692013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
670
671 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
672 for 'A' and assume that the constant has been elided if the result
673 is an O_register.
674
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RS
6752013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
676
677 * config/tc-mips.c (gprel16_reloc_p): New function.
678 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
679 BFD_RELOC_UNUSED.
680 (offset_high_part, small_offset_p): New functions.
681 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
682 register load and store macros, handle the 16-bit offset case first.
683 If a 16-bit offset is not suitable for the instruction we're
684 generating, load it into the temporary register using
685 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
686 M_L_DAB code once the address has been constructed. For double load
687 and store macros, again handle the 16-bit offset case first.
688 If the second register cannot be accessed from the same high
689 part as the first, load it into AT using ADDRESS_ADDI_INSN.
690 Fix the handling of LD in cases where the first register is the
691 same as the base. Also handle the case where the offset is
692 not 16 bits and the second register cannot be accessed from the
693 same high part as the first. For unaligned loads and stores,
694 fuse the offbits == 12 and old "ab" handling. Apply this handling
695 whenever the second offset needs a different high part from the first.
696 Construct the offset using ADDRESS_ADDI_INSN where possible,
697 for offbits == 16 as well as offbits == 12. Use offset_reloc
698 when constructing the individual loads and stores.
699 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
700 and offset_reloc before matching against a particular opcode.
701 Handle elided 'A' constants. Allow 'A' constants to use
702 relocation operators.
703
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RS
7042013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
705
706 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
707 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
708 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
709
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RS
7102013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
711
712 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
713 Require the msb to be <= 31 for "+s". Check that the size is <= 31
714 for both "+s" and "+S".
715
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RS
7162013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
717
718 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
719 (mips_ip, mips16_ip): Handle "+i".
720
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RS
7212013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
722
723 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
724 (micromips_to_32_reg_h_map): Rename to...
725 (micromips_to_32_reg_h_map1): ...this.
726 (micromips_to_32_reg_i_map): Rename to...
727 (micromips_to_32_reg_h_map2): ...this.
728 (mips_lookup_reg_pair): New function.
729 (gpr_write_mask, macro): Adjust after above renaming.
730 (validate_micromips_insn): Remove "mi" handling.
731 (mips_ip): Likewise. Parse both registers in a pair for "mh".
732
fa7616a4
RS
7332013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
736 (mips_ip): Remove "+D" and "+T" handling.
737
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7382013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
739
740 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
741 relocs.
742
2c0a3565
MS
7432013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
744
4aa2c5e2
MS
745 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
746
7472013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
748
2c0a3565
MS
749 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
750 (aarch64_force_relocation): Likewise.
751
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AM
7522013-07-02 Alan Modra <amodra@gmail.com>
753
754 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
755
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MR
7562013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
757
758 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
759 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
760 Replace @sc{mips16} with literal `MIPS16'.
761 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
762
a6bb11b2
YZ
7632013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
764
765 * config/tc-aarch64.c (reloc_table): Replace
766 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
767 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
768 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
769 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
770 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
771 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
772 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
773 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
774 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
775 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
776 (aarch64_force_relocation): Likewise.
777
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YZ
7782013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
779
780 * config/tc-aarch64.c (ilp32_p): New static variable.
781 (elf64_aarch64_target_format): Return the target according to the
782 value of 'ilp32_p'.
783 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
784 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
785 (aarch64_dwarf2_addr_size): New function.
786 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
787 (DWARF2_ADDR_SIZE): New define.
788
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RS
7892013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
790
791 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
792
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RS
7932013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
794
795 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
796
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MR
7972013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
798
799 * config/tc-mips.c (mips_set_options): Add insn32 member.
800 (mips_opts): Initialize it.
801 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
802 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
803 (md_longopts): Add "minsn32" and "mno-insn32" options.
804 (is_size_valid): Handle insn32 mode.
805 (md_assemble): Pass instruction string down to macro.
806 (brk_fmt): Add second dimension and insn32 mode initializers.
807 (mfhl_fmt): Likewise.
808 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
809 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
810 (macro_build_jalr, move_register): Handle insn32 mode.
811 (macro_build_branch_rs): Likewise.
812 (macro): Handle insn32 mode.
813 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
814 (mips_ip): Handle insn32 mode.
815 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
816 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
817 (mips_handle_align): Handle insn32 mode.
818 (md_show_usage): Add -minsn32 and -mno-insn32.
819
820 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
821 -mno-insn32 options.
822 (-minsn32, -mno-insn32): New options.
823 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
824 options.
825 (MIPS assembly options): New node. Document .set insn32 and
826 .set noinsn32.
827 (MIPS-Dependent): List the new node.
828
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NC
8292013-06-25 Nick Clifton <nickc@redhat.com>
830
831 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
832 the PC in indirect addressing on 430xv2 parts.
833 (msp430_operands): Add version test to hardware bug encoding
834 restrictions.
835
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RM
8362013-06-24 Roland McGrath <mcgrathr@google.com>
837
d996d970
RM
838 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
839 so it skips whitespace before it.
840 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
841
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RM
842 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
843 (arm_reg_parse_multi): Skip whitespace first.
844 (parse_reg_list): Likewise.
845 (parse_vfp_reg_list): Likewise.
846 (s_arm_unwind_save_mmxwcg): Likewise.
847
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NC
8482013-06-24 Nick Clifton <nickc@redhat.com>
849
850 PR gas/15623
851 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
852
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RS
8532013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
854
855 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
856
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RS
8572013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
858
859 * config/tc-mips.c: Assert that offsetT and valueT are at least
860 8 bytes in size.
861 (GPR_SMIN, GPR_SMAX): New macros.
862 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
863
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RS
8642013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
865
866 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
867 conditions. Remove any code deselected by them.
868 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
869
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8702013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
871
872 * NEWS: Note removal of ECOFF support.
873 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
874 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
875 (MULTI_CFILES): Remove config/e-mipsecoff.c.
876 * Makefile.in: Regenerate.
877 * configure.in: Remove MIPS ECOFF references.
878 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
879 Delete cases.
880 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
881 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
882 (mips-*-*): ...this single case.
883 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
884 MIPS emulations to be e-mipself*.
885 * configure: Regenerate.
886 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
887 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
888 (mips-*-sysv*): Remove coff and ecoff cases.
889 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
890 * ecoff.c: Remove reference to MIPS ECOFF.
891 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
892 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
893 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
894 (mips_hi_fixup): Tweak comment.
895 (append_insn): Require a howto.
896 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
897
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RS
8982013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
899
900 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
901 Use "CPU" instead of "cpu".
902 * doc/c-mips.texi: Likewise.
903 (MIPS Opts): Rename to MIPS Options.
904 (MIPS option stack): Rename to MIPS Option Stack.
905 (MIPS ASE instruction generation overrides): Rename to
906 MIPS ASE Instruction Generation Overrides (for now).
907 (MIPS floating-point): Rename to MIPS Floating-Point.
908
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9092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
910
911 * doc/c-mips.texi (MIPS Macros): New section.
912 (MIPS Object): Replace with...
913 (MIPS Small Data): ...this new section.
914
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9152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
916
917 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
918 Capitalize name. Use @kindex instead of @cindex for .set entries.
919
a1b86ab7
RS
9202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
921
922 * doc/c-mips.texi (MIPS Stabs): Remove section.
923
c6278170
RS
9242013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
925
926 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
927 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
928 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
929 (ISA_SUPPORTS_VIRT64_ASE): Delete.
930 (mips_ase): New structure.
931 (mips_ases): New table.
932 (FP64_ASES): New macro.
933 (mips_ase_groups): New array.
934 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
935 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
936 functions.
937 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
938 (md_parse_option): Use mips_ases and mips_set_ase instead of
939 separate case statements for each ASE option.
940 (mips_after_parse_args): Use FP64_ASES. Use
941 mips_check_isa_supports_ases to check the ASEs against
942 other options.
943 (s_mipsset): Use mips_ases and mips_set_ase instead of
944 separate if statements for each ASE option. Use
945 mips_check_isa_supports_ases, even when a non-ASE option
946 is specified.
947
63a4bc21
KT
9482013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
949
950 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
951
c31f3936
RS
9522013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
953
954 * config/tc-mips.c (md_shortopts, options, md_longopts)
955 (md_longopts_size): Move earlier in file.
956
846ef2d0
RS
9572013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
958
959 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
960 with a single "ase" bitmask.
961 (mips_opts): Update accordingly.
962 (file_ase, file_ase_explicit): New variables.
963 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
964 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
965 (ISA_HAS_ROR): Adjust for mips_set_options change.
966 (is_opcode_valid): Take the base ase mask directly from mips_opts.
967 (mips_ip): Adjust for mips_set_options change.
968 (md_parse_option): Likewise. Update file_ase_explicit.
969 (mips_after_parse_args): Adjust for mips_set_options change.
970 Use bitmask operations to select the default ASEs. Set file_ase
971 rather than individual per-ASE variables.
972 (s_mipsset): Adjust for mips_set_options change.
973 (mips_elf_final_processing): Test file_ase rather than
974 file_ase_mdmx. Remove commented-out code.
975
d16afab6
RS
9762013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
977
978 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
979 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
980 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
981 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
982 (mips_after_parse_args): Use the new "ase" field to choose
983 the default ASEs.
984 (mips_cpu_info_table): Move ASEs from the "flags" field to the
985 "ase" field.
986
e83a675f
RE
9872013-06-18 Richard Earnshaw <rearnsha@arm.com>
988
989 * config/tc-arm.c (symbol_preemptible): New function.
990 (relax_branch): Use it.
991
7f3c4072
CM
9922013-06-17 Catherine Moore <clm@codesourcery.com>
993 Maciej W. Rozycki <macro@codesourcery.com>
994 Chao-Ying Fu <fu@mips.com>
995
996 * config/tc-mips.c (mips_set_options): Add ase_eva.
997 (mips_set_options mips_opts): Add ase_eva.
998 (file_ase_eva): Declare.
999 (ISA_SUPPORTS_EVA_ASE): Define.
1000 (IS_SEXT_9BIT_NUM): Define.
1001 (MIPS_CPU_ASE_EVA): Define.
1002 (is_opcode_valid): Add support for ase_eva.
1003 (macro_build): Likewise.
1004 (macro): Likewise.
1005 (validate_mips_insn): Likewise.
1006 (validate_micromips_insn): Likewise.
1007 (mips_ip): Likewise.
1008 (options): Add OPTION_EVA and OPTION_NO_EVA.
1009 (md_longopts): Add -meva and -mno-eva.
1010 (md_parse_option): Process new options.
1011 (mips_after_parse_args): Check for valid EVA combinations.
1012 (s_mipsset): Likewise.
1013
e410add4
RS
10142013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1015
1016 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1017 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1018 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1019 (dwarf2_gen_line_info_1): Update call accordingly.
1020 (dwarf2_move_insn): New function.
1021 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1022
6a50d470
RS
10232013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1024
1025 Revert:
1026
1027 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1028
1029 PR gas/13024
1030 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1031 (dwarf2_gen_line_info_1): Delete.
1032 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1033 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1034 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1035 (dwarf2_directive_loc): Push previous .locs instead of generating
1036 them immediately.
1037
f122319e
CF
10382013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1039
1040 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1041 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1042
909c7f9c
NC
10432013-06-13 Nick Clifton <nickc@redhat.com>
1044
1045 PR gas/15602
1046 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1047 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1048 function. Generates an error if the adjusted offset is out of a
1049 16-bit range.
1050
5d5755a7
SL
10512013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1052
1053 * config/tc-nios2.c (md_apply_fix): Mask constant
1054 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1055
3bf0dbfb
MR
10562013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1057
1058 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1059 MIPS-3D instructions either.
1060 (md_convert_frag): Update the COPx branch mask accordingly.
1061
1062 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1063 option.
1064 * doc/as.texinfo (Overview): Add --relax-branch and
1065 --no-relax-branch.
1066 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1067 --no-relax-branch.
1068
9daf7bab
SL
10692013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1070
1071 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1072 omitted.
1073
d301a56b
RS
10742013-06-08 Catherine Moore <clm@codesourcery.com>
1075
1076 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1077 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1078 (append_insn): Change INSN_xxxx to ASE_xxxx.
1079
7bab7634
DC
10802013-06-01 George Thomas <george.thomas@atmel.com>
1081
cbe02d4f 1082 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1083 AVR_ISA_XMEGAU
1084
f60cf82f
L
10852013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1086
1087 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1088 for ELF.
1089
a3f278e2
CM
10902013-05-31 Paul Brook <paul@codesourcery.com>
1091
a3f278e2
CM
1092 * config/tc-mips.c (s_ehword): New.
1093
067ec077
CM
10942013-05-30 Paul Brook <paul@codesourcery.com>
1095
1096 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1097
d6101ac2
MR
10982013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1099
1100 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1101 convert relocs who have no relocatable field either. Rephrase
1102 the conditional so that the PC-relative check is only applied
1103 for REL targets.
1104
f19ccbda
MR
11052013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1106
1107 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1108 calculation.
1109
418009c2
YZ
11102013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1111
1112 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1113 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1114 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1115 (md_apply_fix): Likewise.
1116 (aarch64_force_relocation): Likewise.
1117
0a8897c7
KT
11182013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1119
1120 * config/tc-arm.c (it_fsm_post_encode): Improve
1121 warning messages about deprecated IT block formats.
1122
89d2a2a3
MS
11232013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1124
1125 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1126 inside fx_done condition.
1127
c77c0862
RS
11282013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1129
1130 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1131
c0637f3a
PB
11322013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1133
1134 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1135 and clean up warning when using PRINT_OPCODE_TABLE.
1136
5656a981
AM
11372013-05-20 Alan Modra <amodra@gmail.com>
1138
1139 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1140 and data fixups performing shift/high adjust/sign extension on
1141 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1142 when writing data fixups rather than recalculating size.
1143
997b26e8
JBG
11442013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1145
1146 * doc/c-msp430.texi: Fix typo.
1147
9f6e76f4
TG
11482013-05-16 Tristan Gingold <gingold@adacore.com>
1149
1150 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1151 are also TOC symbols.
1152
638d3803
NC
11532013-05-16 Nick Clifton <nickc@redhat.com>
1154
1155 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1156 Add -mcpu command to specify core type.
997b26e8 1157 * doc/c-msp430.texi: Update documentation.
638d3803 1158
b015e599
AP
11592013-05-09 Andrew Pinski <apinski@cavium.com>
1160
1161 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1162 (mips_opts): Update for the new field.
1163 (file_ase_virt): New variable.
1164 (ISA_SUPPORTS_VIRT_ASE): New macro.
1165 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1166 (MIPS_CPU_ASE_VIRT): New define.
1167 (is_opcode_valid): Handle ase_virt.
1168 (macro_build): Handle "+J".
1169 (validate_mips_insn): Likewise.
1170 (mips_ip): Likewise.
1171 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1172 (md_longopts): Add mvirt and mnovirt
1173 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1174 (mips_after_parse_args): Handle ase_virt field.
1175 (s_mipsset): Handle "virt" and "novirt".
1176 (mips_elf_final_processing): Add a comment about virt ASE might need
1177 a new flag.
1178 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1179 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1180 Document ".set virt" and ".set novirt".
1181
da8094d7
AM
11822013-05-09 Alan Modra <amodra@gmail.com>
1183
1184 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1185 control of operand flag bits.
1186
c5f8c205
AM
11872013-05-07 Alan Modra <amodra@gmail.com>
1188
1189 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1190 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1191 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1192 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1193 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1194 Shift and sign-extend fieldval for use by some VLE reloc
1195 operand->insert functions.
1196
b47468a6
CM
11972013-05-06 Paul Brook <paul@codesourcery.com>
1198 Catherine Moore <clm@codesourcery.com>
1199
c5f8c205
AM
1200 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1201 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1202 (md_apply_fix): Likewise.
1203 (tc_gen_reloc): Likewise.
1204
2de39019
CM
12052013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1206
1207 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1208 (mips_fix_adjustable): Adjust pc-relative check to use
1209 limited_pc_reloc_p.
1210
754e2bb9
RS
12112013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1212
1213 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1214 (s_mips_stab): Do not restrict to stabn only.
1215
13761a11
NC
12162013-05-02 Nick Clifton <nickc@redhat.com>
1217
1218 * config/tc-msp430.c: Add support for the MSP430X architecture.
1219 Add code to insert a NOP instruction after any instruction that
1220 might change the interrupt state.
1221 Add support for the LARGE memory model.
1222 Add code to initialise the .MSP430.attributes section.
1223 * config/tc-msp430.h: Add support for the MSP430X architecture.
1224 * doc/c-msp430.texi: Document the new -mL and -mN command line
1225 options.
1226 * NEWS: Mention support for the MSP430X architecture.
1227
df26367c
MR
12282013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1229
1230 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1231 alpha*-*-linux*ecoff*.
1232
f02d8318
CF
12332013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1234
1235 * config/tc-mips.c (mips_ip): Add sizelo.
1236 For "+C", "+G", and "+H", set sizelo and compare against it.
1237
b40bf0a2
NC
12382013-04-29 Nick Clifton <nickc@redhat.com>
1239
1240 * as.c (Options): Add -gdwarf-sections.
1241 (parse_args): Likewise.
1242 * as.h (flag_dwarf_sections): Declare.
1243 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1244 (process_entries): When -gdwarf-sections is enabled generate
1245 fragmentary .debug_line sections.
1246 (out_debug_line): Set the section for the .debug_line section end
1247 symbol.
1248 * doc/as.texinfo: Document -gdwarf-sections.
1249 * NEWS: Mention -gdwarf-sections.
1250
8eeccb77 12512013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1252
1253 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1254 according to the target parameter. Don't call s_segm since s_segm
1255 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1256 initialized yet.
1257 (md_begin): Call s_segm according to target parameter from command
1258 line.
1259
49926cd0
AM
12602013-04-25 Alan Modra <amodra@gmail.com>
1261
1262 * configure.in: Allow little-endian linux.
1263 * configure: Regenerate.
1264
e3031850
SL
12652013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1266
1267 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1268 "fstatus" control register to "eccinj".
1269
cb948fc0
KT
12702013-04-19 Kai Tietz <ktietz@redhat.com>
1271
1272 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1273
4455e9ad
JB
12742013-04-15 Julian Brown <julian@codesourcery.com>
1275
1276 * expr.c (add_to_result, subtract_from_result): Make global.
1277 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1278 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1279 subtract_from_result to handle extra bit of precision for .sleb128
1280 directive operands.
1281
956a6ba3
JB
12822013-04-10 Julian Brown <julian@codesourcery.com>
1283
1284 * read.c (convert_to_bignum): Add sign parameter. Use it
1285 instead of X_unsigned to determine sign of resulting bignum.
1286 (emit_expr): Pass extra argument to convert_to_bignum.
1287 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1288 X_extrabit to convert_to_bignum.
1289 (parse_bitfield_cons): Set X_extrabit.
1290 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1291 Initialise X_extrabit field as appropriate.
1292 (add_to_result): New.
1293 (subtract_from_result): New.
1294 (expr): Use above.
1295 * expr.h (expressionS): Add X_extrabit field.
1296
eb9f3f00
JB
12972013-04-10 Jan Beulich <jbeulich@suse.com>
1298
1299 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1300 register being PC when is_t or writeback, and use distinct
1301 diagnostic for the latter case.
1302
ccb84d65
JB
13032013-04-10 Jan Beulich <jbeulich@suse.com>
1304
1305 * gas/config/tc-arm.c (parse_operands): Re-write
1306 po_barrier_or_imm().
1307 (do_barrier): Remove bogus constraint().
1308 (do_t_barrier): Remove.
1309
4d13caa0
NC
13102013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1311
1312 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1313 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1314 ATmega2564RFR2
1315 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1316
16d02dc9
JB
13172013-04-09 Jan Beulich <jbeulich@suse.com>
1318
1319 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1320 Use local variable Rt in more places.
1321 (do_vmsr): Accept all control registers.
1322
05ac0ffb
JB
13232013-04-09 Jan Beulich <jbeulich@suse.com>
1324
1325 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1326 if there was none specified for moves between scalar and core
1327 register.
1328
2d51fb74
JB
13292013-04-09 Jan Beulich <jbeulich@suse.com>
1330
1331 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1332 NEON_ALL_LANES case.
1333
94dcf8bf
JB
13342013-04-08 Jan Beulich <jbeulich@suse.com>
1335
1336 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1337 PC-relative VSTR.
1338
1472d06f
JB
13392013-04-08 Jan Beulich <jbeulich@suse.com>
1340
1341 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1342 entry to sp_fiq.
1343
0c76cae8
AM
13442013-04-03 Alan Modra <amodra@gmail.com>
1345
1346 * doc/as.texinfo: Add support to generate man options for h8300.
1347 * doc/c-h8300.texi: Likewise.
1348
92eb40d9
RR
13492013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1350
1351 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1352 Cortex-A57.
1353
51dcdd4d
NC
13542013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1355
1356 PR binutils/15068
1357 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1358
c5d685bf
NC
13592013-03-26 Nick Clifton <nickc@redhat.com>
1360
9b978282
NC
1361 PR gas/15295
1362 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1363 start of the file each time.
1364
c5d685bf
NC
1365 PR gas/15178
1366 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1367 FreeBSD targets.
1368
9699c833
TG
13692013-03-26 Douglas B Rupp <rupp@gnat.com>
1370
1371 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1372 after fixup.
1373
4755303e
WN
13742013-03-21 Will Newton <will.newton@linaro.org>
1375
1376 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1377 pc-relative str instructions in Thumb mode.
1378
81f5558e
NC
13792013-03-21 Michael Schewe <michael.schewe@gmx.net>
1380
1381 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1382 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1383 R_H8_DISP32A16.
1384 * config/tc-h8300.h: Remove duplicated defines.
1385
71863e73
NC
13862013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1387
1388 PR gas/15282
1389 * tc-avr.c (mcu_has_3_byte_pc): New function.
1390 (tc_cfi_frame_initial_instructions): Call it to find return
1391 address size.
1392
795b8e6b
NC
13932013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1394
1395 PR gas/15095
1396 * config/tc-tic6x.c (tic6x_try_encode): Handle
1397 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1398 encode register pair numbers when required.
1399
ba86b375
WN
14002013-03-15 Will Newton <will.newton@linaro.org>
1401
1402 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1403 in vstr in Thumb mode for pre-ARMv7 cores.
1404
9e6f3811
AS
14052013-03-14 Andreas Schwab <schwab@suse.de>
1406
1407 * doc/c-arc.texi (ARC Directives): Revert last change and use
1408 @itemize instead of @table.
1409 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1410
b10bf8c5
NC
14112013-03-14 Nick Clifton <nickc@redhat.com>
1412
1413 PR gas/15273
1414 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1415 NULL message, instead just check ARM_CPU_IS_ANY directly.
1416
ba724cfc
NC
14172013-03-14 Nick Clifton <nickc@redhat.com>
1418
1419 PR gas/15212
9e6f3811 1420 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1421 for table format.
1422 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1423 to the @item directives.
1424 (ARM-Neon-Alignment): Move to correct place in the document.
1425 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1426 formatting.
1427 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1428 @smallexample.
1429
531a94fd
SL
14302013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1431
1432 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1433 case. Add default BAD_CASE to switch.
1434
dad60f8e
SL
14352013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1436
1437 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1438 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1439
dd5181d5
KT
14402013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1441
1442 * config/tc-arm.c (crc_ext_armv8): New feature set.
1443 (UNPRED_REG): New macro.
1444 (do_crc32_1): New function.
1445 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1446 do_crc32ch, do_crc32cw): Likewise.
1447 (TUEc): New macro.
1448 (insns): Add entries for crc32 mnemonics.
1449 (arm_extensions): Add entry for crc.
1450
8e723a10
CLT
14512013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1452
1453 * write.h (struct fix): Add fx_dot_frag field.
1454 (dot_frag): Declare.
1455 * write.c (dot_frag): New variable.
1456 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1457 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1458 * expr.c (expr): Save value of frag_now in dot_frag when setting
1459 dot_value.
1460 * read.c (emit_expr): Likewise. Delete comments.
1461
be05d201
L
14622013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1463
1464 * config/tc-i386.c (flag_code_names): Removed.
1465 (i386_index_check): Rewrote.
1466
62b0d0d5
YZ
14672013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1468
1469 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1470 add comment.
1471 (aarch64_double_precision_fmovable): New function.
1472 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1473 function; handle hexadecimal representation of IEEE754 encoding.
1474 (parse_operands): Update the call to parse_aarch64_imm_float.
1475
165de32a
L
14762013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1477
1478 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1479 (check_hle): Updated.
1480 (md_assemble): Likewise.
1481 (parse_insn): Likewise.
1482
d5de92cf
L
14832013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1484
1485 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1486 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1487 (parse_insn): Remove expecting_string_instruction. Set
1488 i.rep_prefix.
1489
e60bb1dd
YZ
14902013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1491
1492 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1493
aeebdd9b
YZ
14942013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1495
1496 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1497 for system registers.
1498
4107ae22
DD
14992013-02-27 DJ Delorie <dj@redhat.com>
1500
1501 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1502 (rl78_op): Handle %code().
1503 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1504 (tc_gen_reloc): Likwise; convert to a computed reloc.
1505 (md_apply_fix): Likewise.
1506
151fa98f
NC
15072013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1508
1509 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1510
70a8bc5b 15112013-02-25 Terry Guo <terry.guo@arm.com>
1512
1513 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1514 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1515 list of accepted CPUs.
1516
5c111e37
L
15172013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1518
1519 PR gas/15159
1520 * config/tc-i386.c (cpu_arch): Add ".smap".
1521
1522 * doc/c-i386.texi: Document smap.
1523
8a75745d
MR
15242013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1525
1526 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1527 mips_assembling_insn appropriately.
1528 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1529
79850f26
MR
15302013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1531
cf29fc61 1532 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1533 extraneous braces.
1534
4c261dff
NC
15352013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1536
5c111e37 1537 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1538
ea33f281
NC
15392013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1540
1541 * configure.tgt: Add nios2-*-rtems*.
1542
a1ccaec9
YZ
15432013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1544
1545 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1546 NULL.
1547
0aa27725
RS
15482013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1549
1550 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1551 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1552
da4339ed
NC
15532013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1554
1555 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1556 core.
1557
36591ba1 15582013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1559 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1560
1561 Based on patches from Altera Corporation.
1562
1563 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1564 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1565 * Makefile.in: Regenerated.
1566 * configure.tgt: Add case for nios2*-linux*.
1567 * config/obj-elf.c: Conditionally include elf/nios2.h.
1568 * config/tc-nios2.c: New file.
1569 * config/tc-nios2.h: New file.
1570 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1571 * doc/Makefile.in: Regenerated.
1572 * doc/all.texi: Set NIOSII.
1573 * doc/as.texinfo (Overview): Add Nios II options.
1574 (Machine Dependencies): Include c-nios2.texi.
1575 * doc/c-nios2.texi: New file.
1576 * NEWS: Note Altera Nios II support.
1577
94d4433a
AM
15782013-02-06 Alan Modra <amodra@gmail.com>
1579
1580 PR gas/14255
1581 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1582 Don't skip fixups with fx_subsy non-NULL.
1583 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1584 with fx_subsy non-NULL.
1585
ace9af6f
L
15862013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1587
1588 * doc/c-metag.texi: Add "@c man" markers.
1589
89d67ed9
AM
15902013-02-04 Alan Modra <amodra@gmail.com>
1591
1592 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1593 related code.
1594 (TC_ADJUST_RELOC_COUNT): Delete.
1595 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1596
89072bd6
AM
15972013-02-04 Alan Modra <amodra@gmail.com>
1598
1599 * po/POTFILES.in: Regenerate.
1600
f9b2d544
NC
16012013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1602
1603 * config/tc-metag.c: Make SWAP instruction less permissive with
1604 its operands.
1605
392ca752
DD
16062013-01-29 DJ Delorie <dj@redhat.com>
1607
1608 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1609 relocs in .word/.etc statements.
1610
427d0db6
RM
16112013-01-29 Roland McGrath <mcgrathr@google.com>
1612
1613 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1614 immediate value for 8-bit offset" error so it shows line info.
1615
4faf939a
JM
16162013-01-24 Joseph Myers <joseph@codesourcery.com>
1617
1618 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1619 for 64-bit output.
1620
78c8d46c
NC
16212013-01-24 Nick Clifton <nickc@redhat.com>
1622
1623 * config/tc-v850.c: Add support for e3v5 architecture.
1624 * doc/c-v850.texi: Mention new support.
1625
fb5b7503
NC
16262013-01-23 Nick Clifton <nickc@redhat.com>
1627
1628 PR gas/15039
1629 * config/tc-avr.c: Include dwarf2dbg.h.
1630
8ce3d284
L
16312013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1632
1633 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1634 (tc_i386_fix_adjustable): Likewise.
1635 (lex_got): Likewise.
1636 (tc_gen_reloc): Likewise.
1637
f5555712
YZ
16382013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1639
1640 * config/tc-aarch64.c (output_operand_error_record): Change to output
1641 the out-of-range error message as value-expected message if there is
1642 only one single value in the expected range.
1643 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1644 LSL #0 as a programmer-friendly feature.
1645
8fd4256d
L
16462013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1647
1648 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1649 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1650 BFD_RELOC_64_SIZE relocations.
1651 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1652 for it.
1653 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1654 relocations against local symbols.
1655
a5840dce
AM
16562013-01-16 Alan Modra <amodra@gmail.com>
1657
1658 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1659 finding some sort of toc syntax error, and break to avoid
1660 compiler uninit warning.
1661
af89796a
L
16622013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1663
1664 PR gas/15019
1665 * config/tc-i386.c (lex_got): Increment length by 1 if the
1666 relocation token is removed.
1667
dd42f060
NC
16682013-01-15 Nick Clifton <nickc@redhat.com>
1669
1670 * config/tc-v850.c (md_assemble): Allow signed values for
1671 V850E_IMMEDIATE.
1672
464e3686
SK
16732013-01-11 Sean Keys <skeys@ipdatasys.com>
1674
1675 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1676 git to cvs.
464e3686 1677
5817ffd1
PB
16782013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1679
1680 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1681 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1682 * config/tc-ppc.c (md_show_usage): Likewise.
1683 (ppc_handle_align): Handle power8's group ending nop.
1684
f4b1f6a9
SK
16852013-01-10 Sean Keys <skeys@ipdatasys.com>
1686
1687 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1688 that the assember exits after the opcodes have been printed.
f4b1f6a9 1689
34bca508
L
16902013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1691
1692 * app.c: Remove trailing white spaces.
1693 * as.c: Likewise.
1694 * as.h: Likewise.
1695 * cond.c: Likewise.
1696 * dw2gencfi.c: Likewise.
1697 * dwarf2dbg.h: Likewise.
1698 * ecoff.c: Likewise.
1699 * input-file.c: Likewise.
1700 * itbl-lex.h: Likewise.
1701 * output-file.c: Likewise.
1702 * read.c: Likewise.
1703 * sb.c: Likewise.
1704 * subsegs.c: Likewise.
1705 * symbols.c: Likewise.
1706 * write.c: Likewise.
1707 * config/tc-i386.c: Likewise.
1708 * doc/Makefile.am: Likewise.
1709 * doc/Makefile.in: Likewise.
1710 * doc/c-aarch64.texi: Likewise.
1711 * doc/c-alpha.texi: Likewise.
1712 * doc/c-arc.texi: Likewise.
1713 * doc/c-arm.texi: Likewise.
1714 * doc/c-avr.texi: Likewise.
1715 * doc/c-bfin.texi: Likewise.
1716 * doc/c-cr16.texi: Likewise.
1717 * doc/c-d10v.texi: Likewise.
1718 * doc/c-d30v.texi: Likewise.
1719 * doc/c-h8300.texi: Likewise.
1720 * doc/c-hppa.texi: Likewise.
1721 * doc/c-i370.texi: Likewise.
1722 * doc/c-i386.texi: Likewise.
1723 * doc/c-i860.texi: Likewise.
1724 * doc/c-m32c.texi: Likewise.
1725 * doc/c-m32r.texi: Likewise.
1726 * doc/c-m68hc11.texi: Likewise.
1727 * doc/c-m68k.texi: Likewise.
1728 * doc/c-microblaze.texi: Likewise.
1729 * doc/c-mips.texi: Likewise.
1730 * doc/c-msp430.texi: Likewise.
1731 * doc/c-mt.texi: Likewise.
1732 * doc/c-s390.texi: Likewise.
1733 * doc/c-score.texi: Likewise.
1734 * doc/c-sh.texi: Likewise.
1735 * doc/c-sh64.texi: Likewise.
1736 * doc/c-tic54x.texi: Likewise.
1737 * doc/c-tic6x.texi: Likewise.
1738 * doc/c-v850.texi: Likewise.
1739 * doc/c-xc16x.texi: Likewise.
1740 * doc/c-xgate.texi: Likewise.
1741 * doc/c-xtensa.texi: Likewise.
1742 * doc/c-z80.texi: Likewise.
1743 * doc/internals.texi: Likewise.
1744
4c665b71
RM
17452013-01-10 Roland McGrath <mcgrathr@google.com>
1746
1747 * hash.c (hash_new_sized): Make it global.
1748 * hash.h: Declare it.
1749 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1750 pass a small size.
1751
a3c62988
NC
17522013-01-10 Will Newton <will.newton@imgtec.com>
1753
1754 * Makefile.am: Add Meta.
1755 * Makefile.in: Regenerate.
1756 * config/tc-metag.c: New file.
1757 * config/tc-metag.h: New file.
1758 * configure.tgt: Add Meta.
1759 * doc/Makefile.am: Add Meta.
1760 * doc/Makefile.in: Regenerate.
1761 * doc/all.texi: Add Meta.
1762 * doc/as.texiinfo: Document Meta options.
1763 * doc/c-metag.texi: New file.
1764
b37df7c4
SE
17652013-01-09 Steve Ellcey <sellcey@mips.com>
1766
1767 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1768 calls.
1769 * config/tc-mips.c (internalError): Remove, replace with abort.
1770
a3251895
YZ
17712013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1772
1773 * config/tc-aarch64.c (parse_operands): Change to compare the result
1774 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1775
8ab8155f
NC
17762013-01-07 Nick Clifton <nickc@redhat.com>
1777
1778 PR gas/14887
1779 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1780 anticipated character.
1781 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1782 here as it is no longer needed.
1783
a4ac1c42
AS
17842013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1785
1786 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1787 * doc/c-score.texi (SCORE-Opts): Likewise.
1788 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1789
e407c74b
NC
17902013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1791
1792 * config/tc-mips.c: Add support for MIPS r5900.
1793 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1794 lq and sq.
1795 (can_swap_branch_p, get_append_method): Detect some conditional
1796 short loops to fix a bug on the r5900 by NOP in the branch delay
1797 slot.
1798 (M_MUL): Support 3 operands in multu on r5900.
1799 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1800 (s_mipsset): Force 32 bit floating point on r5900.
1801 (mips_ip): Check parameter range of instructions mfps and mtps on
1802 r5900.
1803 * configure.in: Detect CPU type when target string contains r5900
1804 (e.g. mips64r5900el-linux-gnu).
1805
62658407
L
18062013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1807
1808 * as.c (parse_args): Update copyright year to 2013.
1809
95830fd1
YZ
18102013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1811
1812 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1813 and "cortex57".
1814
517bb291 18152013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1816
517bb291
NC
1817 PR gas/14987
1818 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1819 closing bracket.
d709e4e6 1820
517bb291 1821For older changes see ChangeLog-2012
08d56133 1822\f
517bb291 1823Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1824
1825Copying and distribution of this file, with or without modification,
1826are permitted in any medium without royalty provided the copyright
1827notice and this notice are preserved.
1828
08d56133
NC
1829Local Variables:
1830mode: change-log
1831left-margin: 8
1832fill-column: 74
1833version-control: never
1834End:
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