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e673710a
KT		 12013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2
3 * config/tc-arm.c (s_arm_arch_extension): Improve error message
4 for invalid extension.
5
69091a2c
YZ		 62013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
7
8 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
9 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
10 (aarch64_abi): New variable.
11 (ilp32_p): Change to be a macro.
12 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
13 (struct aarch64_option_abi_value_table): New struct.
14 (aarch64_abis): New table.
15 (aarch64_parse_abi): New function.
16 (aarch64_long_opts): Add entry for -mabi=.
17 * doc/as.texinfo (Target AArch64 options): Document -mabi.
18 * doc/c-aarch64.texi: Likewise.
19
faf786e6
NC		 202013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
21
22 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
23 unsigned comparison.
24
f0c00282
NC		 252013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
26
27 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
28 RX610.
29 * config/rx-parse.y: (rx_check_float_support): Add function to
30 check floating point operation support for target RX100 and
31 RX200.
32 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
33 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
34 RX200, RX600, and RX610
35
8c997c27
NC		 362013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
37
38 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
39
8be59acb
NC		 402013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
41
42 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
43 * doc/c-avr.texi: Likewise.
44
4a06e5a2
RS		 452013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
46
47 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
48 error with older GCCs.
49 (mips16_macro_build): Dereference args.
50
a92713e6
RS		 512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
52
53 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
54 New functions, split out from...
55 (reg_lookup): ...here. Remove itbl support.
56 (reglist_lookup): Delete.
57 (mips_operand_token_type): New enum.
58 (mips_operand_token): New structure.
59 (mips_operand_tokens): New variable.
60 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
61 (mips_parse_arguments): New functions.
62 (md_begin): Initialize mips_operand_tokens.
63 (mips_arg_info): Add a token field. Remove optional_reg field.
64 (match_char, match_expression): New functions.
65 (match_const_int): Use match_expression. Remove "s" argument
66 and return a boolean result. Remove O_register handling.
67 (match_regno, match_reg, match_reg_range): New functions.
68 (match_int_operand, match_mapped_int_operand, match_msb_operand)
69 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
70 (match_addiusp_operand, match_clo_clz_dest_operand)
71 (match_lwm_swm_list_operand, match_entry_exit_operand)
72 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
73 (match_tied_reg_operand): Remove "s" argument and return a boolean
74 result. Match tokens rather than text. Update calls to
75 match_const_int. Rely on match_regno to call check_regno.
76 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
77 "arg" argument. Return a boolean result.
78 (parse_float_constant): Replace with...
79 (match_float_constant): ...this new function.
80 (match_operand): Remove "s" argument and return a boolean result.
81 Update calls to subfunctions.
82 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
83 rather than string-parsing routines. Update handling of optional
84 registers for token scheme.
85
89565f1b
RS		 862013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
87
88 * config/tc-mips.c (parse_float_constant): Split out from...
89 (mips_ip): ...here.
90
3c14a432
RS		 912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
94 Delete.
95
364215c8
RS		 962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
97
98 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
99 (match_entry_exit_operand): New function.
100 (match_save_restore_list_operand): Likewise.
101 (match_operand): Use them.
102 (check_absolute_expr): Delete.
103 (mips16_ip): Rewrite main parsing loop to use mips_operands.
104
9e12b7a2
RS		 1052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
106
107 * config/tc-mips.c: Enable functions commented out in previous patch.
108 (SKIP_SPACE_TABS): Move further up file.
109 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
110 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
111 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
112 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
113 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
114 (micromips_imm_b_map, micromips_imm_c_map): Delete.
115 (mips_lookup_reg_pair): Delete.
116 (macro): Use report_bad_range and report_bad_field.
117 (mips_immed, expr_const_in_range): Delete.
118 (mips_ip): Rewrite main parsing loop to use new functions.
119
a1d78564
RS		 1202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
121
122 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
123 Change return type to bfd_boolean.
124 (report_bad_range, report_bad_field): New functions.
125 (mips_arg_info): New structure.
126 (match_const_int, convert_reg_type, check_regno, match_int_operand)
127 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
128 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
129 (match_addiusp_operand, match_clo_clz_dest_operand)
130 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
131 (match_pc_operand, match_tied_reg_operand, match_operand)
132 (check_completed_insn): New functions, commented out for now.
133
e077a1c8
RS		 1342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
135
136 * config/tc-mips.c (insn_insert_operand): New function.
137 (macro_build, mips16_macro_build): Put null character check
138 in the for loop and convert continues to breaks. Use operand
139 structures to handle constant operands.
140
ab902481
RS		 1412013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
142
143 * config/tc-mips.c (validate_mips_insn): Move further up file.
144 Add insn_bits and decode_operand arguments. Use the mips_operand
145 fields to work out which bits an operand occupies. Detect double
146 definitions.
147 (validate_micromips_insn): Move further up file. Call into
148 validate_mips_insn.
149
2f8b73cc
RS		 1502013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
151
152 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
153
c8276761
RS		 1542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
155
156 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
157 and "~".
158 (macro): Update accordingly.
159
77bd4346
RS		 1602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
161
162 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
163 (imm_reloc): Delete.
164 (md_assemble): Remove imm_reloc handling.
165 (mips_ip): Update commentary. Use offset_expr and offset_reloc
166 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
167 Use a temporary array rather than imm_reloc when parsing
168 constant expressions. Remove imm_reloc initialization.
169 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
170 for the relaxable field. Use a relax_char variable to track the
171 type of this field. Remove imm_reloc initialization.
172
cc537e56
RS		 1732013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
174
175 * config/tc-mips.c (mips16_ip): Handle "I".
176
ba92f887
MR		 1772013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
178
179 * config/tc-mips.c (mips_flag_nan2008): New variable.
180 (options): Add OPTION_NAN enum value.
181 (md_longopts): Handle it.
182 (md_parse_option): Likewise.
183 (s_nan): New function.
184 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
185 (md_show_usage): Add -mnan.
186
187 * doc/as.texinfo (Overview): Add -mnan.
188 * doc/c-mips.texi (MIPS Opts): Document -mnan.
189 (MIPS NaN Encodings): New node. Document .nan directive.
190 (MIPS-Dependent): List the new node.
191
c1094734
TG		 1922013-07-09 Tristan Gingold <gingold@adacore.com>
193
194 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
195
0cbbe1b8
RS		 1962013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
197
198 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
199 for 'A' and assume that the constant has been elided if the result
200 is an O_register.
201
f2ae14a1
RS		 2022013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
203
204 * config/tc-mips.c (gprel16_reloc_p): New function.
205 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
206 BFD_RELOC_UNUSED.
207 (offset_high_part, small_offset_p): New functions.
208 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
209 register load and store macros, handle the 16-bit offset case first.
210 If a 16-bit offset is not suitable for the instruction we're
211 generating, load it into the temporary register using
212 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
213 M_L_DAB code once the address has been constructed. For double load
214 and store macros, again handle the 16-bit offset case first.
215 If the second register cannot be accessed from the same high
216 part as the first, load it into AT using ADDRESS_ADDI_INSN.
217 Fix the handling of LD in cases where the first register is the
218 same as the base. Also handle the case where the offset is
219 not 16 bits and the second register cannot be accessed from the
220 same high part as the first. For unaligned loads and stores,
221 fuse the offbits == 12 and old "ab" handling. Apply this handling
222 whenever the second offset needs a different high part from the first.
223 Construct the offset using ADDRESS_ADDI_INSN where possible,
224 for offbits == 16 as well as offbits == 12. Use offset_reloc
225 when constructing the individual loads and stores.
226 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
227 and offset_reloc before matching against a particular opcode.
228 Handle elided 'A' constants. Allow 'A' constants to use
229 relocation operators.
230
5c324c16
RS		 2312013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
232
233 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
234 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
235 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
236
23e69e47
RS		 2372013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
238
239 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
240 Require the msb to be <= 31 for "+s". Check that the size is <= 31
241 for both "+s" and "+S".
242
27c5c572
RS		 2432013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
244
245 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
246 (mips_ip, mips16_ip): Handle "+i".
247
e76ff5ab
RS		 2482013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
251 (micromips_to_32_reg_h_map): Rename to...
252 (micromips_to_32_reg_h_map1): ...this.
253 (micromips_to_32_reg_i_map): Rename to...
254 (micromips_to_32_reg_h_map2): ...this.
255 (mips_lookup_reg_pair): New function.
256 (gpr_write_mask, macro): Adjust after above renaming.
257 (validate_micromips_insn): Remove "mi" handling.
258 (mips_ip): Likewise. Parse both registers in a pair for "mh".
259
fa7616a4
RS		 2602013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
261
262 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
263 (mips_ip): Remove "+D" and "+T" handling.
264
fb798c50
AK		 2652013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
266
267 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
268 relocs.
269
2c0a3565
MS		 2702013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
271
4aa2c5e2
MS		 272 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
273
2742013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
275
2c0a3565
MS		 276 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
277 (aarch64_force_relocation): Likewise.
278
f40da81b
AM		 2792013-07-02 Alan Modra <amodra@gmail.com>
280
281 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
282
81566a9b
MR		 2832013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
284
285 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
286 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
287 Replace @sc{mips16} with literal `MIPS16'.
288 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
289
a6bb11b2
YZ		 2902013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
291
292 * config/tc-aarch64.c (reloc_table): Replace
293 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
294 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
295 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
296 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
297 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
298 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
299 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
300 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
301 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
302 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
303 (aarch64_force_relocation): Likewise.
304
cec5225b
YZ		 3052013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
306
307 * config/tc-aarch64.c (ilp32_p): New static variable.
308 (elf64_aarch64_target_format): Return the target according to the
309 value of 'ilp32_p'.
310 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
311 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
312 (aarch64_dwarf2_addr_size): New function.
313 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
314 (DWARF2_ADDR_SIZE): New define.
315
e335d9cb
RS		 3162013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
317
318 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
319
18870af7
RS		 3202013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
321
322 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
323
833794fc
MR		 3242013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
325
326 * config/tc-mips.c (mips_set_options): Add insn32 member.
327 (mips_opts): Initialize it.
328 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
329 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
330 (md_longopts): Add "minsn32" and "mno-insn32" options.
331 (is_size_valid): Handle insn32 mode.
332 (md_assemble): Pass instruction string down to macro.
333 (brk_fmt): Add second dimension and insn32 mode initializers.
334 (mfhl_fmt): Likewise.
335 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
336 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
337 (macro_build_jalr, move_register): Handle insn32 mode.
338 (macro_build_branch_rs): Likewise.
339 (macro): Handle insn32 mode.
340 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
341 (mips_ip): Handle insn32 mode.
342 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
343 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
344 (mips_handle_align): Handle insn32 mode.
345 (md_show_usage): Add -minsn32 and -mno-insn32.
346
347 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
348 -mno-insn32 options.
349 (-minsn32, -mno-insn32): New options.
350 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
351 options.
352 (MIPS assembly options): New node. Document .set insn32 and
353 .set noinsn32.
354 (MIPS-Dependent): List the new node.
355
d1706f38
NC		 3562013-06-25 Nick Clifton <nickc@redhat.com>
357
358 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
359 the PC in indirect addressing on 430xv2 parts.
360 (msp430_operands): Add version test to hardware bug encoding
361 restrictions.
362
477330fc
RM		 3632013-06-24 Roland McGrath <mcgrathr@google.com>
364
d996d970
RM		 365 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
366 so it skips whitespace before it.
367 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
368
477330fc
RM		 369 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
370 (arm_reg_parse_multi): Skip whitespace first.
371 (parse_reg_list): Likewise.
372 (parse_vfp_reg_list): Likewise.
373 (s_arm_unwind_save_mmxwcg): Likewise.
374
24382199
NC		 3752013-06-24 Nick Clifton <nickc@redhat.com>
376
377 PR gas/15623
378 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
379
c3678916
RS		 3802013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
381
382 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
383
42429eac
RS		 3842013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c: Assert that offsetT and valueT are at least
387 8 bytes in size.
388 (GPR_SMIN, GPR_SMAX): New macros.
389 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
390
f3ded42a
RS		 3912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
392
393 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
394 conditions. Remove any code deselected by them.
395 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
396
e8044f35
RS		 3972013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
398
399 * NEWS: Note removal of ECOFF support.
400 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
401 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
402 (MULTI_CFILES): Remove config/e-mipsecoff.c.
403 * Makefile.in: Regenerate.
404 * configure.in: Remove MIPS ECOFF references.
405 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
406 Delete cases.
407 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
408 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
409 (mips-*-*): ...this single case.
410 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
411 MIPS emulations to be e-mipself*.
412 * configure: Regenerate.
413 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
414 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
415 (mips-*-sysv*): Remove coff and ecoff cases.
416 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
417 * ecoff.c: Remove reference to MIPS ECOFF.
418 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
419 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
420 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
421 (mips_hi_fixup): Tweak comment.
422 (append_insn): Require a howto.
423 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
424
98508b2a
RS		 4252013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
426
427 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
428 Use "CPU" instead of "cpu".
429 * doc/c-mips.texi: Likewise.
430 (MIPS Opts): Rename to MIPS Options.
431 (MIPS option stack): Rename to MIPS Option Stack.
432 (MIPS ASE instruction generation overrides): Rename to
433 MIPS ASE Instruction Generation Overrides (for now).
434 (MIPS floating-point): Rename to MIPS Floating-Point.
435
fc16f8cc
RS		 4362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
437
438 * doc/c-mips.texi (MIPS Macros): New section.
439 (MIPS Object): Replace with...
440 (MIPS Small Data): ...this new section.
441
5a7560b5
RS		 4422013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
443
444 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
445 Capitalize name. Use @kindex instead of @cindex for .set entries.
446
a1b86ab7
RS		 4472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
448
449 * doc/c-mips.texi (MIPS Stabs): Remove section.
450
c6278170
RS		 4512013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
452
453 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
454 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
455 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
456 (ISA_SUPPORTS_VIRT64_ASE): Delete.
457 (mips_ase): New structure.
458 (mips_ases): New table.
459 (FP64_ASES): New macro.
460 (mips_ase_groups): New array.
461 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
462 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
463 functions.
464 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
465 (md_parse_option): Use mips_ases and mips_set_ase instead of
466 separate case statements for each ASE option.
467 (mips_after_parse_args): Use FP64_ASES. Use
468 mips_check_isa_supports_ases to check the ASEs against
469 other options.
470 (s_mipsset): Use mips_ases and mips_set_ase instead of
471 separate if statements for each ASE option. Use
472 mips_check_isa_supports_ases, even when a non-ASE option
473 is specified.
474
63a4bc21
KT		 4752013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
476
477 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
478
c31f3936
RS		 4792013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
480
481 * config/tc-mips.c (md_shortopts, options, md_longopts)
482 (md_longopts_size): Move earlier in file.
483
846ef2d0
RS		 4842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
485
486 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
487 with a single "ase" bitmask.
488 (mips_opts): Update accordingly.
489 (file_ase, file_ase_explicit): New variables.
490 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
491 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
492 (ISA_HAS_ROR): Adjust for mips_set_options change.
493 (is_opcode_valid): Take the base ase mask directly from mips_opts.
494 (mips_ip): Adjust for mips_set_options change.
495 (md_parse_option): Likewise. Update file_ase_explicit.
496 (mips_after_parse_args): Adjust for mips_set_options change.
497 Use bitmask operations to select the default ASEs. Set file_ase
498 rather than individual per-ASE variables.
499 (s_mipsset): Adjust for mips_set_options change.
500 (mips_elf_final_processing): Test file_ase rather than
501 file_ase_mdmx. Remove commented-out code.
502
d16afab6
RS		 5032013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
504
505 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
506 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
507 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
508 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
509 (mips_after_parse_args): Use the new "ase" field to choose
510 the default ASEs.
511 (mips_cpu_info_table): Move ASEs from the "flags" field to the
512 "ase" field.
513
e83a675f
RE		 5142013-06-18 Richard Earnshaw <rearnsha@arm.com>
515
516 * config/tc-arm.c (symbol_preemptible): New function.
517 (relax_branch): Use it.
518
7f3c4072
CM		 5192013-06-17 Catherine Moore <clm@codesourcery.com>
520 Maciej W. Rozycki <macro@codesourcery.com>
521 Chao-Ying Fu <fu@mips.com>
522
523 * config/tc-mips.c (mips_set_options): Add ase_eva.
524 (mips_set_options mips_opts): Add ase_eva.
525 (file_ase_eva): Declare.
526 (ISA_SUPPORTS_EVA_ASE): Define.
527 (IS_SEXT_9BIT_NUM): Define.
528 (MIPS_CPU_ASE_EVA): Define.
529 (is_opcode_valid): Add support for ase_eva.
530 (macro_build): Likewise.
531 (macro): Likewise.
532 (validate_mips_insn): Likewise.
533 (validate_micromips_insn): Likewise.
534 (mips_ip): Likewise.
535 (options): Add OPTION_EVA and OPTION_NO_EVA.
536 (md_longopts): Add -meva and -mno-eva.
537 (md_parse_option): Process new options.
538 (mips_after_parse_args): Check for valid EVA combinations.
539 (s_mipsset): Likewise.
540
e410add4
RS		 5412013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
542
543 * dwarf2dbg.h (dwarf2_move_insn): Declare.
544 * dwarf2dbg.c (line_subseg): Add pmove_tail.
545 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
546 (dwarf2_gen_line_info_1): Update call accordingly.
547 (dwarf2_move_insn): New function.
548 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
549
6a50d470
RS		 5502013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
551
552 Revert:
553
554 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
555
556 PR gas/13024
557 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
558 (dwarf2_gen_line_info_1): Delete.
559 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
560 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
561 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
562 (dwarf2_directive_loc): Push previous .locs instead of generating
563 them immediately.
564
f122319e
CF		 5652013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
566
567 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
568 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
569
909c7f9c
NC		 5702013-06-13 Nick Clifton <nickc@redhat.com>
571
572 PR gas/15602
573 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
574 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
575 function. Generates an error if the adjusted offset is out of a
576 16-bit range.
577
5d5755a7
SL		 5782013-06-12 Sandra Loosemore <sandra@codesourcery.com>
579
580 * config/tc-nios2.c (md_apply_fix): Mask constant
581 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
582
3bf0dbfb
MR		 5832013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
584
585 * config/tc-mips.c (append_insn): Don't do branch relaxation for
586 MIPS-3D instructions either.
587 (md_convert_frag): Update the COPx branch mask accordingly.
588
589 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
590 option.
591 * doc/as.texinfo (Overview): Add --relax-branch and
592 --no-relax-branch.
593 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
594 --no-relax-branch.
595
9daf7bab
SL		 5962013-06-09 Sandra Loosemore <sandra@codesourcery.com>
597
598 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
599 omitted.
600
d301a56b
RS		 6012013-06-08 Catherine Moore <clm@codesourcery.com>
602
603 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
604 (is_opcode_valid_16): Pass ase value to opcode_is_member.
605 (append_insn): Change INSN_xxxx to ASE_xxxx.
606
7bab7634
DC		 6072013-06-01 George Thomas <george.thomas@atmel.com>
608
609 * gas/config/tc-avr.c: Change ISA for devices with USB support to
610 AVR_ISA_XMEGAU
611
f60cf82f
L		 6122013-05-31 H.J. Lu <hongjiu.lu@intel.com>
613
614 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
615 for ELF.
616
a3f278e2
CM		 6172013-05-31 Paul Brook <paul@codesourcery.com>
618
619 gas/
620 * config/tc-mips.c (s_ehword): New.
621
067ec077
CM		 6222013-05-30 Paul Brook <paul@codesourcery.com>
623
624 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
625
d6101ac2
MR		 6262013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
627
628 * write.c (resolve_reloc_expr_symbols): On REL targets don't
629 convert relocs who have no relocatable field either. Rephrase
630 the conditional so that the PC-relative check is only applied
631 for REL targets.
632
f19ccbda
MR		 6332013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
634
635 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
636 calculation.
637
418009c2
YZ		 6382013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
639
640 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 641 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 642 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
643 (md_apply_fix): Likewise.
644 (aarch64_force_relocation): Likewise.
645
0a8897c7
KT		 6462013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
647
648 * config/tc-arm.c (it_fsm_post_encode): Improve
649 warning messages about deprecated IT block formats.
650
89d2a2a3
MS		 6512013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
652
653 * config/tc-aarch64.c (md_apply_fix): Move value range checking
654 inside fx_done condition.
655
c77c0862
RS		 6562013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
657
658 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
659
c0637f3a
PB		 6602013-05-20 Peter Bergner <bergner@vnet.ibm.com>
661
662 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
663 and clean up warning when using PRINT_OPCODE_TABLE.
664
5656a981
AM		 6652013-05-20 Alan Modra <amodra@gmail.com>
666
667 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
668 and data fixups performing shift/high adjust/sign extension on
669 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
670 when writing data fixups rather than recalculating size.
671
997b26e8
JBG		 6722013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
673
674 * doc/c-msp430.texi: Fix typo.
675
9f6e76f4
TG		 6762013-05-16 Tristan Gingold <gingold@adacore.com>
677
678 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
679 are also TOC symbols.
680
638d3803
NC		 6812013-05-16 Nick Clifton <nickc@redhat.com>
682
683 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
684 Add -mcpu command to specify core type.
997b26e8 685 * doc/c-msp430.texi: Update documentation.
638d3803 686
b015e599
AP		 6872013-05-09 Andrew Pinski <apinski@cavium.com>
688
689 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
690 (mips_opts): Update for the new field.
691 (file_ase_virt): New variable.
692 (ISA_SUPPORTS_VIRT_ASE): New macro.
693 (ISA_SUPPORTS_VIRT64_ASE): New macro.
694 (MIPS_CPU_ASE_VIRT): New define.
695 (is_opcode_valid): Handle ase_virt.
696 (macro_build): Handle "+J".
697 (validate_mips_insn): Likewise.
698 (mips_ip): Likewise.
699 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
700 (md_longopts): Add mvirt and mnovirt
701 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
702 (mips_after_parse_args): Handle ase_virt field.
703 (s_mipsset): Handle "virt" and "novirt".
704 (mips_elf_final_processing): Add a comment about virt ASE might need
705 a new flag.
706 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
707 * doc/c-mips.texi: Document -mvirt and -mno-virt.
708 Document ".set virt" and ".set novirt".
709
da8094d7
AM		 7102013-05-09 Alan Modra <amodra@gmail.com>
711
712 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
713 control of operand flag bits.
714
c5f8c205
AM		 7152013-05-07 Alan Modra <amodra@gmail.com>
716
717 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
718 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
719 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
720 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
721 (md_apply_fix): Set fx_no_overflow for assorted relocations.
722 Shift and sign-extend fieldval for use by some VLE reloc
723 operand->insert functions.
724
b47468a6
CM		 7252013-05-06 Paul Brook <paul@codesourcery.com>
726 Catherine Moore <clm@codesourcery.com>
727
c5f8c205
AM		 728 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
729 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 730 (md_apply_fix): Likewise.
731 (tc_gen_reloc): Likewise.
732
2de39019
CM		 7332013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
736 (mips_fix_adjustable): Adjust pc-relative check to use
737 limited_pc_reloc_p.
738
754e2bb9
RS		 7392013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
740
741 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
742 (s_mips_stab): Do not restrict to stabn only.
743
13761a11
NC		 7442013-05-02 Nick Clifton <nickc@redhat.com>
745
746 * config/tc-msp430.c: Add support for the MSP430X architecture.
747 Add code to insert a NOP instruction after any instruction that
748 might change the interrupt state.
749 Add support for the LARGE memory model.
750 Add code to initialise the .MSP430.attributes section.
751 * config/tc-msp430.h: Add support for the MSP430X architecture.
752 * doc/c-msp430.texi: Document the new -mL and -mN command line
753 options.
754 * NEWS: Mention support for the MSP430X architecture.
755
df26367c
MR		 7562013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
757
758 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
759 alpha*-*-linux*ecoff*.
760
f02d8318
CF		 7612013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
762
763 * config/tc-mips.c (mips_ip): Add sizelo.
764 For "+C", "+G", and "+H", set sizelo and compare against it.
765
b40bf0a2
NC		 7662013-04-29 Nick Clifton <nickc@redhat.com>
767
768 * as.c (Options): Add -gdwarf-sections.
769 (parse_args): Likewise.
770 * as.h (flag_dwarf_sections): Declare.
771 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
772 (process_entries): When -gdwarf-sections is enabled generate
773 fragmentary .debug_line sections.
774 (out_debug_line): Set the section for the .debug_line section end
775 symbol.
776 * doc/as.texinfo: Document -gdwarf-sections.
777 * NEWS: Mention -gdwarf-sections.
778
8eeccb77 7792013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 780
781 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
782 according to the target parameter. Don't call s_segm since s_segm
783 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
784 initialized yet.
785 (md_begin): Call s_segm according to target parameter from command
786 line.
787
49926cd0
AM		 7882013-04-25 Alan Modra <amodra@gmail.com>
789
790 * configure.in: Allow little-endian linux.
791 * configure: Regenerate.
792
e3031850
SL		 7932013-04-24 Sandra Loosemore <sandra@codesourcery.com>
794
795 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
796 "fstatus" control register to "eccinj".
797
cb948fc0
KT		 7982013-04-19 Kai Tietz <ktietz@redhat.com>
799
800 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
801
4455e9ad
JB		 8022013-04-15 Julian Brown <julian@codesourcery.com>
803
804 * expr.c (add_to_result, subtract_from_result): Make global.
805 * expr.h (add_to_result, subtract_from_result): Add prototypes.
806 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
807 subtract_from_result to handle extra bit of precision for .sleb128
808 directive operands.
809
956a6ba3
JB		 8102013-04-10 Julian Brown <julian@codesourcery.com>
811
812 * read.c (convert_to_bignum): Add sign parameter. Use it
813 instead of X_unsigned to determine sign of resulting bignum.
814 (emit_expr): Pass extra argument to convert_to_bignum.
815 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
816 X_extrabit to convert_to_bignum.
817 (parse_bitfield_cons): Set X_extrabit.
818 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
819 Initialise X_extrabit field as appropriate.
820 (add_to_result): New.
821 (subtract_from_result): New.
822 (expr): Use above.
823 * expr.h (expressionS): Add X_extrabit field.
824
eb9f3f00
JB		 8252013-04-10 Jan Beulich <jbeulich@suse.com>
826
827 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
828 register being PC when is_t or writeback, and use distinct
829 diagnostic for the latter case.
830
ccb84d65
JB		 8312013-04-10 Jan Beulich <jbeulich@suse.com>
832
833 * gas/config/tc-arm.c (parse_operands): Re-write
834 po_barrier_or_imm().
835 (do_barrier): Remove bogus constraint().
836 (do_t_barrier): Remove.
837
4d13caa0
NC		 8382013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
839
840 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
841 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
842 ATmega2564RFR2
843 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
844
16d02dc9
JB		 8452013-04-09 Jan Beulich <jbeulich@suse.com>
846
847 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
848 Use local variable Rt in more places.
849 (do_vmsr): Accept all control registers.
850
05ac0ffb
JB		 8512013-04-09 Jan Beulich <jbeulich@suse.com>
852
853 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
854 if there was none specified for moves between scalar and core
855 register.
856
2d51fb74
JB		 8572013-04-09 Jan Beulich <jbeulich@suse.com>
858
859 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
860 NEON_ALL_LANES case.
861
94dcf8bf
JB		 8622013-04-08 Jan Beulich <jbeulich@suse.com>
863
864 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
865 PC-relative VSTR.
866
1472d06f
JB		 8672013-04-08 Jan Beulich <jbeulich@suse.com>
868
869 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
870 entry to sp_fiq.
871
0c76cae8
AM		 8722013-04-03 Alan Modra <amodra@gmail.com>
873
874 * doc/as.texinfo: Add support to generate man options for h8300.
875 * doc/c-h8300.texi: Likewise.
876
92eb40d9
RR		 8772013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
878
879 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
880 Cortex-A57.
881
51dcdd4d
NC		 8822013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
883
884 PR binutils/15068
885 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
886
c5d685bf
NC		 8872013-03-26 Nick Clifton <nickc@redhat.com>
888
9b978282
NC		 889 PR gas/15295
890 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
891 start of the file each time.
892
c5d685bf
NC		 893 PR gas/15178
894 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
895 FreeBSD targets.
896
9699c833
TG		 8972013-03-26 Douglas B Rupp <rupp@gnat.com>
898
899 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
900 after fixup.
901
4755303e
WN		 9022013-03-21 Will Newton <will.newton@linaro.org>
903
904 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
905 pc-relative str instructions in Thumb mode.
906
81f5558e
NC		 9072013-03-21 Michael Schewe <michael.schewe@gmx.net>
908
909 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
910 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
911 R_H8_DISP32A16.
912 * config/tc-h8300.h: Remove duplicated defines.
913
71863e73
NC		 9142013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
915
916 PR gas/15282
917 * tc-avr.c (mcu_has_3_byte_pc): New function.
918 (tc_cfi_frame_initial_instructions): Call it to find return
919 address size.
920
795b8e6b
NC		 9212013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
922
923 PR gas/15095
924 * config/tc-tic6x.c (tic6x_try_encode): Handle
925 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
926 encode register pair numbers when required.
927
ba86b375
WN		 9282013-03-15 Will Newton <will.newton@linaro.org>
929
930 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
931 in vstr in Thumb mode for pre-ARMv7 cores.
932
9e6f3811
AS		 9332013-03-14 Andreas Schwab <schwab@suse.de>
934
935 * doc/c-arc.texi (ARC Directives): Revert last change and use
936 @itemize instead of @table.
937 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
938
b10bf8c5
NC		 9392013-03-14 Nick Clifton <nickc@redhat.com>
940
941 PR gas/15273
942 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
943 NULL message, instead just check ARM_CPU_IS_ANY directly.
944
ba724cfc
NC		 9452013-03-14 Nick Clifton <nickc@redhat.com>
946
947 PR gas/15212
9e6f3811 948 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 949 for table format.
950 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
951 to the @item directives.
952 (ARM-Neon-Alignment): Move to correct place in the document.
953 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
954 formatting.
955 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
956 @smallexample.
957
531a94fd
SL		 9582013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
959
960 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
961 case. Add default BAD_CASE to switch.
962
dad60f8e
SL		 9632013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
964
965 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
966 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
967
dd5181d5
KT		 9682013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
969
970 * config/tc-arm.c (crc_ext_armv8): New feature set.
971 (UNPRED_REG): New macro.
972 (do_crc32_1): New function.
973 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
974 do_crc32ch, do_crc32cw): Likewise.
975 (TUEc): New macro.
976 (insns): Add entries for crc32 mnemonics.
977 (arm_extensions): Add entry for crc.
978
8e723a10
CLT		 9792013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
980
981 * write.h (struct fix): Add fx_dot_frag field.
982 (dot_frag): Declare.
983 * write.c (dot_frag): New variable.
984 (fix_new_internal): Set fx_dot_frag field with dot_frag.
985 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
986 * expr.c (expr): Save value of frag_now in dot_frag when setting
987 dot_value.
988 * read.c (emit_expr): Likewise. Delete comments.
989
be05d201
L		 9902013-03-07 H.J. Lu <hongjiu.lu@intel.com>
991
992 * config/tc-i386.c (flag_code_names): Removed.
993 (i386_index_check): Rewrote.
994
62b0d0d5
YZ		 9952013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
996
997 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
998 add comment.
999 (aarch64_double_precision_fmovable): New function.
1000 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1001 function; handle hexadecimal representation of IEEE754 encoding.
1002 (parse_operands): Update the call to parse_aarch64_imm_float.
1003
165de32a
L		 10042013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1005
1006 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1007 (check_hle): Updated.
1008 (md_assemble): Likewise.
1009 (parse_insn): Likewise.
1010
d5de92cf
L		 10112013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1012
1013 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1014 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1015 (parse_insn): Remove expecting_string_instruction. Set
1016 i.rep_prefix.
1017
e60bb1dd
YZ		 10182013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1019
1020 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1021
aeebdd9b
YZ		 10222013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1023
1024 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1025 for system registers.
1026
4107ae22
DD		 10272013-02-27 DJ Delorie <dj@redhat.com>
1028
1029 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1030 (rl78_op): Handle %code().
1031 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1032 (tc_gen_reloc): Likwise; convert to a computed reloc.
1033 (md_apply_fix): Likewise.
1034
151fa98f
NC		 10352013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1036
1037 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1038
70a8bc5b 10392013-02-25 Terry Guo <terry.guo@arm.com>
1040
1041 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1042 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1043 list of accepted CPUs.
1044
5c111e37
L		 10452013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1046
1047 PR gas/15159
1048 * config/tc-i386.c (cpu_arch): Add ".smap".
1049
1050 * doc/c-i386.texi: Document smap.
1051
8a75745d
MR		 10522013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1053
1054 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1055 mips_assembling_insn appropriately.
1056 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1057
79850f26
MR		 10582013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1059
cf29fc61 1060 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1061 extraneous braces.
1062
4c261dff
NC		 10632013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1064
5c111e37 1065 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1066
ea33f281
NC		 10672013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1068
1069 * configure.tgt: Add nios2-*-rtems*.
1070
a1ccaec9
YZ		 10712013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1072
1073 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1074 NULL.
1075
0aa27725
RS		 10762013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1077
1078 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1079 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1080
da4339ed
NC		 10812013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1082
1083 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1084 core.
1085
36591ba1 10862013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1087 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1088
1089 Based on patches from Altera Corporation.
1090
1091 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1092 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1093 * Makefile.in: Regenerated.
1094 * configure.tgt: Add case for nios2*-linux*.
1095 * config/obj-elf.c: Conditionally include elf/nios2.h.
1096 * config/tc-nios2.c: New file.
1097 * config/tc-nios2.h: New file.
1098 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1099 * doc/Makefile.in: Regenerated.
1100 * doc/all.texi: Set NIOSII.
1101 * doc/as.texinfo (Overview): Add Nios II options.
1102 (Machine Dependencies): Include c-nios2.texi.
1103 * doc/c-nios2.texi: New file.
1104 * NEWS: Note Altera Nios II support.
1105
94d4433a
AM		 11062013-02-06 Alan Modra <amodra@gmail.com>
1107
1108 PR gas/14255
1109 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1110 Don't skip fixups with fx_subsy non-NULL.
1111 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1112 with fx_subsy non-NULL.
1113
ace9af6f
L		 11142013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1115
1116 * doc/c-metag.texi: Add "@c man" markers.
1117
89d67ed9
AM		 11182013-02-04 Alan Modra <amodra@gmail.com>
1119
1120 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1121 related code.
1122 (TC_ADJUST_RELOC_COUNT): Delete.
1123 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1124
89072bd6
AM		 11252013-02-04 Alan Modra <amodra@gmail.com>
1126
1127 * po/POTFILES.in: Regenerate.
1128
f9b2d544
NC		 11292013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1130
1131 * config/tc-metag.c: Make SWAP instruction less permissive with
1132 its operands.
1133
392ca752
DD		 11342013-01-29 DJ Delorie <dj@redhat.com>
1135
1136 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1137 relocs in .word/.etc statements.
1138
427d0db6
RM		 11392013-01-29 Roland McGrath <mcgrathr@google.com>
1140
1141 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1142 immediate value for 8-bit offset" error so it shows line info.
1143
4faf939a
JM		 11442013-01-24 Joseph Myers <joseph@codesourcery.com>
1145
1146 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1147 for 64-bit output.
1148
78c8d46c
NC		 11492013-01-24 Nick Clifton <nickc@redhat.com>
1150
1151 * config/tc-v850.c: Add support for e3v5 architecture.
1152 * doc/c-v850.texi: Mention new support.
1153
fb5b7503
NC		 11542013-01-23 Nick Clifton <nickc@redhat.com>
1155
1156 PR gas/15039
1157 * config/tc-avr.c: Include dwarf2dbg.h.
1158
8ce3d284
L		 11592013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1160
1161 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1162 (tc_i386_fix_adjustable): Likewise.
1163 (lex_got): Likewise.
1164 (tc_gen_reloc): Likewise.
1165
f5555712
YZ		 11662013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1167
1168 * config/tc-aarch64.c (output_operand_error_record): Change to output
1169 the out-of-range error message as value-expected message if there is
1170 only one single value in the expected range.
1171 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1172 LSL #0 as a programmer-friendly feature.
1173
8fd4256d
L		 11742013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1175
1176 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1177 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1178 BFD_RELOC_64_SIZE relocations.
1179 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1180 for it.
1181 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1182 relocations against local symbols.
1183
a5840dce
AM		 11842013-01-16 Alan Modra <amodra@gmail.com>
1185
1186 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1187 finding some sort of toc syntax error, and break to avoid
1188 compiler uninit warning.
1189
af89796a
L		 11902013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1191
1192 PR gas/15019
1193 * config/tc-i386.c (lex_got): Increment length by 1 if the
1194 relocation token is removed.
1195
dd42f060
NC		 11962013-01-15 Nick Clifton <nickc@redhat.com>
1197
1198 * config/tc-v850.c (md_assemble): Allow signed values for
1199 V850E_IMMEDIATE.
1200
464e3686
SK		 12012013-01-11 Sean Keys <skeys@ipdatasys.com>
1202
1203 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1204 git to cvs.
464e3686 1205
5817ffd1
PB		 12062013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1207
1208 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1209 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1210 * config/tc-ppc.c (md_show_usage): Likewise.
1211 (ppc_handle_align): Handle power8's group ending nop.
1212
f4b1f6a9
SK		 12132013-01-10 Sean Keys <skeys@ipdatasys.com>
1214
1215 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1216 that the assember exits after the opcodes have been printed.
f4b1f6a9 1217
34bca508
L		 12182013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1219
1220 * app.c: Remove trailing white spaces.
1221 * as.c: Likewise.
1222 * as.h: Likewise.
1223 * cond.c: Likewise.
1224 * dw2gencfi.c: Likewise.
1225 * dwarf2dbg.h: Likewise.
1226 * ecoff.c: Likewise.
1227 * input-file.c: Likewise.
1228 * itbl-lex.h: Likewise.
1229 * output-file.c: Likewise.
1230 * read.c: Likewise.
1231 * sb.c: Likewise.
1232 * subsegs.c: Likewise.
1233 * symbols.c: Likewise.
1234 * write.c: Likewise.
1235 * config/tc-i386.c: Likewise.
1236 * doc/Makefile.am: Likewise.
1237 * doc/Makefile.in: Likewise.
1238 * doc/c-aarch64.texi: Likewise.
1239 * doc/c-alpha.texi: Likewise.
1240 * doc/c-arc.texi: Likewise.
1241 * doc/c-arm.texi: Likewise.
1242 * doc/c-avr.texi: Likewise.
1243 * doc/c-bfin.texi: Likewise.
1244 * doc/c-cr16.texi: Likewise.
1245 * doc/c-d10v.texi: Likewise.
1246 * doc/c-d30v.texi: Likewise.
1247 * doc/c-h8300.texi: Likewise.
1248 * doc/c-hppa.texi: Likewise.
1249 * doc/c-i370.texi: Likewise.
1250 * doc/c-i386.texi: Likewise.
1251 * doc/c-i860.texi: Likewise.
1252 * doc/c-m32c.texi: Likewise.
1253 * doc/c-m32r.texi: Likewise.
1254 * doc/c-m68hc11.texi: Likewise.
1255 * doc/c-m68k.texi: Likewise.
1256 * doc/c-microblaze.texi: Likewise.
1257 * doc/c-mips.texi: Likewise.
1258 * doc/c-msp430.texi: Likewise.
1259 * doc/c-mt.texi: Likewise.
1260 * doc/c-s390.texi: Likewise.
1261 * doc/c-score.texi: Likewise.
1262 * doc/c-sh.texi: Likewise.
1263 * doc/c-sh64.texi: Likewise.
1264 * doc/c-tic54x.texi: Likewise.
1265 * doc/c-tic6x.texi: Likewise.
1266 * doc/c-v850.texi: Likewise.
1267 * doc/c-xc16x.texi: Likewise.
1268 * doc/c-xgate.texi: Likewise.
1269 * doc/c-xtensa.texi: Likewise.
1270 * doc/c-z80.texi: Likewise.
1271 * doc/internals.texi: Likewise.
1272
4c665b71
RM		 12732013-01-10 Roland McGrath <mcgrathr@google.com>
1274
1275 * hash.c (hash_new_sized): Make it global.
1276 * hash.h: Declare it.
1277 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1278 pass a small size.
1279
a3c62988
NC		 12802013-01-10 Will Newton <will.newton@imgtec.com>
1281
1282 * Makefile.am: Add Meta.
1283 * Makefile.in: Regenerate.
1284 * config/tc-metag.c: New file.
1285 * config/tc-metag.h: New file.
1286 * configure.tgt: Add Meta.
1287 * doc/Makefile.am: Add Meta.
1288 * doc/Makefile.in: Regenerate.
1289 * doc/all.texi: Add Meta.
1290 * doc/as.texiinfo: Document Meta options.
1291 * doc/c-metag.texi: New file.
1292
b37df7c4
SE		 12932013-01-09 Steve Ellcey <sellcey@mips.com>
1294
1295 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1296 calls.
1297 * config/tc-mips.c (internalError): Remove, replace with abort.
1298
a3251895
YZ		 12992013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1300
1301 * config/tc-aarch64.c (parse_operands): Change to compare the result
1302 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1303
8ab8155f
NC		 13042013-01-07 Nick Clifton <nickc@redhat.com>
1305
1306 PR gas/14887
1307 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1308 anticipated character.
1309 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1310 here as it is no longer needed.
1311
a4ac1c42
AS		 13122013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1313
1314 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1315 * doc/c-score.texi (SCORE-Opts): Likewise.
1316 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1317
e407c74b
NC		 13182013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1319
1320 * config/tc-mips.c: Add support for MIPS r5900.
1321 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1322 lq and sq.
1323 (can_swap_branch_p, get_append_method): Detect some conditional
1324 short loops to fix a bug on the r5900 by NOP in the branch delay
1325 slot.
1326 (M_MUL): Support 3 operands in multu on r5900.
1327 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1328 (s_mipsset): Force 32 bit floating point on r5900.
1329 (mips_ip): Check parameter range of instructions mfps and mtps on
1330 r5900.
1331 * configure.in: Detect CPU type when target string contains r5900
1332 (e.g. mips64r5900el-linux-gnu).
1333
62658407
L		 13342013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1335
1336 * as.c (parse_args): Update copyright year to 2013.
1337
95830fd1
YZ		 13382013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1339
1340 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1341 and "cortex57".
1342
517bb291 13432013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1344
517bb291
NC		 1345 PR gas/14987
1346 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1347 closing bracket.
d709e4e6 1348
517bb291 1349For older changes see ChangeLog-2012
08d56133 1350\f
517bb291 1351Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1352
1353Copying and distribution of this file, with or without modification,
1354are permitted in any medium without royalty provided the copyright
1355notice and this notice are preserved.
1356
08d56133
NC		 1357Local Variables:
1358mode: change-log
1359left-margin: 8
1360fill-column: 74
1361version-control: never
1362End:
GDB Binutils - Deliverables
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