* config.sub, config.guess: Update from upstream sources.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ba83aca1
BW
12006-09-25 Bob Wilson <bob.wilson@acm.org>
2
3 * doc/as.texinfo (Overview): Revise description of --keep-locals.
4 Add xref to "Symbol Names".
5 (L): Refer to "local symbols" instead of "local labels". Move
6 definition to "Symbol Names" section; add xref to that section.
7 (Symbol Names): Use "Local Symbol Names" section to define local
8 symbols. Add "Local Labels" heading for description of temporary
9 forward/backward labels, and refer to those as "local labels".
10
539e75ad
L
112006-09-23 H.J. Lu <hongjiu.lu@intel.com>
12
13 PR binutils/3235
14 * config/tc-i386.c (match_template): Check address size prefix
15 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
16 operand.
17
5e02f92e
AM
182006-09-22 Alan Modra <amodra@bigpond.net.au>
19
20 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
21
885afe7b
AM
222006-09-22 Alan Modra <amodra@bigpond.net.au>
23
24 * as.h (as_perror): Delete declaration.
25 * gdbinit.in (as_perror): Delete breakpoint.
26 * messages.c (as_perror): Delete function.
27 * doc/internals.texi: Remove as_perror description.
28 * listing.c (listing_print: Don't use as_perror.
29 * output-file.c (output_file_create, output_file_close): Likewise.
30 * symbols.c (symbol_create, symbol_clone): Likewise.
31 * write.c (write_contents): Likewise.
32 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
33 * config/tc-tic54x.c (tic54x_mlib): Likewise.
34
3aeeedbb
AM
352006-09-22 Alan Modra <amodra@bigpond.net.au>
36
37 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
38 (ppc_handle_align): New function.
39 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
40 (SUB_SEGMENT_ALIGN): Define as zero.
41
96e9638b
BW
422006-09-20 Bob Wilson <bob.wilson@acm.org>
43
44 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
45 (Overview): Skip cross reference in man page.
46
99ad8390
NC
472006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
48
49 * configure.in: Add new target x86_64-pc-mingw64.
50 * configure: Regenerate.
51 * configure.tgt: Add new target x86_64-pc-mingw64.
52 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
53 * config/tc-i386.c: Add new targets.
54 (md_parse_option): Add targets to OPTION_64.
55 (x86_64_target_format): Add new method for setup proper default target cpu mode.
56 * config/te-pep.h: Add new target definition header.
57 (TE_PEP): New macro: Identifies new target architecture.
58 (COFF_WITH_pex64): Set proper includes in bfd.
59 * NEWS: Mention new target.
60
73332571
BS
612006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
62
63 * config/bfin-parse.y (binary): Change sub of const to add of negated
64 const.
65
1c0d3aa6
NC
662006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
67
68 * config/tc-score.c: New file.
69 * config/tc-score.h: Newf file.
70 * configure.tgt: Add Score target.
71 * Makefile.am: Add Score files.
72 * Makefile.in: Regenerate.
73 * NEWS: Mention new target support.
74
4fa3602b
PB
752006-09-16 Paul Brook <paul@codesourcery.com>
76
77 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
78 * doc/c-arm.texi (movsp): Document offset argument.
79
16dd5e42
PB
802006-09-16 Paul Brook <paul@codesourcery.com>
81
82 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
83 unsigned int to avoid 64-bit host problems.
84
c4ae04ce
BS
852006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
86
87 * config/bfin-parse.y (binary): Do some more constant folding for
88 additions.
89
e5d4a5a6
JB
902006-09-13 Jan Beulich <jbeulich@novell.com>
91
92 * input-file.c (input_file_give_next_buffer): Demote as_bad to
93 as_warn.
94
1a1219cb
AM
952006-09-13 Alan Modra <amodra@bigpond.net.au>
96
97 PR gas/3165
98 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
99 in parens.
100
f79d9c1d
AM
1012006-09-13 Alan Modra <amodra@bigpond.net.au>
102
103 * input-file.c (input_file_open): Replace as_perror with as_bad
104 so that gas exits with error on file errors. Correct error
105 message.
106 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 107 * input-file.h: Update comment.
f79d9c1d 108
f512f76f
NC
1092006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
110
111 PR gas/3172
112 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
113 registers as a sub-class of wC registers.
114
8d79fd44
AM
1152006-09-11 Alan Modra <amodra@bigpond.net.au>
116
117 PR gas/3165
118 * config/tc-mips.h (enum dwarf2_format): Forward declare.
119 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
120 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
121 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
122
6258339f
NC
1232006-09-08 Nick Clifton <nickc@redhat.com>
124
125 PR gas/3129
126 * doc/as.texinfo (Macro): Improve documentation about separating
127 macro arguments from following text.
128
f91e006c
PB
1292006-09-08 Paul Brook <paul@codesourcery.com>
130
131 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
132
466bbf93
PB
1332006-09-07 Paul Brook <paul@codesourcery.com>
134
135 * config/tc-arm.c (parse_operands): Mark operand as present.
136
428e3f1f
PB
1372006-09-04 Paul Brook <paul@codesourcery.com>
138
139 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
140 (do_neon_dyadic_if_i_d): Avoid setting U bit.
141 (do_neon_mac_maybe_scalar): Ditto.
142 (do_neon_dyadic_narrow): Force operand type to NT_integer.
143 (insns): Remove out of date comments.
144
fb25138b
NC
1452006-08-29 Nick Clifton <nickc@redhat.com>
146
147 * read.c (s_align): Initialize the 'stopc' variable to prevent
148 compiler complaints about it being used without being
149 initialized.
150 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
151 s_float_space, s_struct, cons_worker, equals): Likewise.
152
5091343a
AM
1532006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
154
155 * ecoff.c (ecoff_directive_val): Fix message typo.
156 * config/tc-ns32k.c (convert_iif): Likewise.
157 * config/tc-sh64.c (shmedia_check_limits): Likewise.
158
1f2a7e38
BW
1592006-08-25 Sterling Augustine <sterling@tensilica.com>
160 Bob Wilson <bob.wilson@acm.org>
161
162 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
163 the state of the absolute_literals directive. Remove align frag at
164 the start of the literal pool position.
165
34135039
BW
1662006-08-25 Bob Wilson <bob.wilson@acm.org>
167
168 * doc/c-xtensa.texi: Add @group commands in examples.
169
74869ac7
BW
1702006-08-24 Bob Wilson <bob.wilson@acm.org>
171
172 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
173 (INIT_LITERAL_SECTION_NAME): Delete.
174 (lit_state struct): Remove segment names, init_lit_seg, and
175 fini_lit_seg. Add lit_prefix and current_text_seg.
176 (init_literal_head_h, init_literal_head): Delete.
177 (fini_literal_head_h, fini_literal_head): Delete.
178 (xtensa_begin_directive): Move argument parsing to
179 xtensa_literal_prefix function.
180 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
181 (xtensa_literal_prefix): Parse the directive argument here and
182 record it in the lit_prefix field. Remove code to derive literal
183 section names.
184 (linkonce_len): New.
185 (get_is_linkonce_section): Use linkonce_len. Check for any
186 ".gnu.linkonce.*" section, not just text sections.
187 (md_begin): Remove initialization of deleted lit_state fields.
188 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
189 to init_literal_head and fini_literal_head.
190 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
191 when traversing literal_head list.
192 (match_section_group): New.
193 (cache_literal_section): Rewrite to determine the literal section
194 name on the fly, create the section and return it.
195 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
196 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
197 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
198 Use xtensa_get_property_section from bfd.
199 (retrieve_xtensa_section): Delete.
200 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
201 description to refer to plural literal sections and add xref to
202 the Literal Directive section.
203 (Literal Directive): Describe new rules for deriving literal section
204 names. Add footnote for special case of .init/.fini with
205 --text-section-literals.
206 (Literal Prefix Directive): Replace old naming rules with xref to the
207 Literal Directive section.
208
87a1fd79
JM
2092006-08-21 Joseph Myers <joseph@codesourcery.com>
210
211 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
212 merging with previous long opcode.
213
7148cc28
NC
2142006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
215
216 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
217 * Makefile.in: Regenerate.
218 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
219 renamed. Adjust.
220
3e9e4fcf
JB
2212006-08-16 Julian Brown <julian@codesourcery.com>
222
223 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
224 to use ARM instructions on non-ARM-supporting cores.
225 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
226 mode automatically based on cpu variant.
227 (md_begin): Call above function.
228
267d2029
JB
2292006-08-16 Julian Brown <julian@codesourcery.com>
230
231 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
232 recognized in non-unified syntax mode.
233
4be041b2
TS
2342006-08-15 Thiemo Seufer <ths@mips.com>
235 Nigel Stephens <nigel@mips.com>
236 David Ung <davidu@mips.com>
237
238 * configure.tgt: Handle mips*-sde-elf*.
239
3a93f742
TS
2402006-08-12 Thiemo Seufer <ths@networkno.de>
241
242 * config/tc-mips.c (mips16_ip): Fix argument register handling
243 for restore instruction.
244
1737851b
BW
2452006-08-08 Bob Wilson <bob.wilson@acm.org>
246
247 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
248 (out_sleb128): New.
249 (out_fixed_inc_line_addr): New.
250 (process_entries): Use out_fixed_inc_line_addr when
251 DWARF2_USE_FIXED_ADVANCE_PC is set.
252 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
253
e14e52f8
DD
2542006-08-08 DJ Delorie <dj@redhat.com>
255
256 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
257 vs full symbols so that we never have more than one pointer value
258 for any given symbol in our symbol table.
259
802f5d9e
NC
2602006-08-08 Sterling Augustine <sterling@tensilica.com>
261
262 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
263 and emit DW_AT_ranges when code in compilation unit is not
264 contiguous.
265 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
266 is not contiguous.
267 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
268 (out_debug_ranges): New function to emit .debug_ranges section
269 when code is not contiguous.
270
720abc60
NC
2712006-08-08 Nick Clifton <nickc@redhat.com>
272
273 * config/tc-arm.c (WARN_DEPRECATED): Enable.
274
f0927246
NC
2752006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
276
277 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
278 only block.
279 (pe_directive_secrel) [TE_PE]: New function.
280 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
281 loc, loc_mark_labels.
282 [TE_PE]: Handle secrel32.
283 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
284 call.
285 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
286 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
287 (md_section_align): Only round section sizes here for AOUT
288 targets.
289 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
290 (tc_pe_dwarf2_emit_offset): New function.
291 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
292 (cons_fix_new_arm): Handle O_secrel.
293 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
294 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
295 of OBJ_ELF only block.
296 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
297 tc_pe_dwarf2_emit_offset.
298
55e6e397
RS
2992006-08-04 Richard Sandiford <richard@codesourcery.com>
300
301 * config/tc-sh.c (apply_full_field_fix): New function.
302 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
303 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
304 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
305 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
306
9cd19b17
NC
3072006-08-03 Nick Clifton <nickc@redhat.com>
308
309 PR gas/2991
310 * config.in: Regenerate.
311
97f87066
JM
3122006-08-03 Joseph Myers <joseph@codesourcery.com>
313
314 * config/tc-arm.c (parse_operands): Handle invalid register name
315 for OP_RIWR_RIWC.
316
41adaa5c
JM
3172006-08-03 Joseph Myers <joseph@codesourcery.com>
318
319 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
320 (parse_operands): Handle it.
321 (insns): Use it for tmcr and tmrc.
322
9d7cbccd
NC
3232006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
324
325 PR binutils/2983
326 * config/tc-i386.c (md_parse_option): Treat any target starting
327 with elf64_x86_64 as a viable target for the -64 switch.
328 (i386_target_format): For 64-bit ELF flavoured output use
329 ELF_TARGET_FORMAT64.
330 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
331
c973bc5c
NC
3322006-08-02 Nick Clifton <nickc@redhat.com>
333
334 PR gas/2991
335 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
336 bfd/aclocal.m4.
337 * configure.in: Run BFD_BINARY_FOPEN.
338 * configure: Regenerate.
339 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
340 file to include.
341
cfde7f70
L
3422006-08-01 H.J. Lu <hongjiu.lu@intel.com>
343
344 * config/tc-i386.c (md_assemble): Don't update
345 cpu_arch_isa_flags.
346
b4c71f56
TS
3472006-08-01 Thiemo Seufer <ths@mips.com>
348
349 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
350
54f4ddb3
TS
3512006-08-01 Thiemo Seufer <ths@mips.com>
352
353 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
354 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
355 BFD_RELOC_32 and BFD_RELOC_16.
356 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
357 md_convert_frag, md_obj_end): Fix comment formatting.
358
d103cf61
TS
3592006-07-31 Thiemo Seufer <ths@mips.com>
360
361 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
362 handling for BFD_RELOC_MIPS16_JMP.
363
601e61cd
NC
3642006-07-24 Andreas Schwab <schwab@suse.de>
365
366 PR/2756
367 * read.c (read_a_source_file): Ignore unknown text after line
368 comment character. Fix misleading comment.
369
b45619c0
NC
3702006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
371
372 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
373 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
374 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
375 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
376 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
377 doc/c-z80.texi, doc/internals.texi: Fix some typos.
378
784906c5
NC
3792006-07-21 Nick Clifton <nickc@redhat.com>
380
381 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
382 linker testsuite.
383
d5f010e9
TS
3842006-07-20 Thiemo Seufer <ths@mips.com>
385 Nigel Stephens <nigel@mips.com>
386
387 * config/tc-mips.c (md_parse_option): Don't infer optimisation
388 options from debug options.
389
35d3d567
TS
3902006-07-20 Thiemo Seufer <ths@mips.com>
391
392 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
393 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
394
401a54cf
PB
3952006-07-19 Paul Brook <paul@codesourcery.com>
396
397 * config/tc-arm.c (insns): Fix rbit Arm opcode.
398
16805f35
PB
3992006-07-18 Paul Brook <paul@codesourcery.com>
400
401 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
402 (md_convert_frag): Use correct reloc for add_pc. Use
403 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
404 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
405 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
406
d9e05e4e
AM
4072006-07-17 Mat Hostetter <mat@lcs.mit.edu>
408
409 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
410 when file and line unknown.
411
f43abd2b
TS
4122006-07-17 Thiemo Seufer <ths@mips.com>
413
414 * read.c (s_struct): Use IS_ELF.
415 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
416 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
417 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
418 s_mips_mask): Likewise.
419
a2902af6
TS
4202006-07-16 Thiemo Seufer <ths@mips.com>
421 David Ung <davidu@mips.com>
422
423 * read.c (s_struct): Handle ELF section changing.
424 * config/tc-mips.c (s_align): Leave enabling auto-align to the
425 generic code.
426 (s_change_sec): Try section changing only if we output ELF.
427
d32cad65
L
4282006-07-15 H.J. Lu <hongjiu.lu@intel.com>
429
430 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
431 CpuAmdFam10.
432 (smallest_imm_type): Remove Cpu086.
433 (i386_target_format): Likewise.
434
435 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
436 Update CpuXXX.
437
050dfa73
MM
4382006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
439 Michael Meissner <michael.meissner@amd.com>
440
441 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
442 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
443 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
444 architecture.
445 (i386_align_code): Ditto.
446 (md_assemble_code): Add support for insertq/extrq instructions,
447 swapping as needed for intel syntax.
448 (swap_imm_operands): New function to swap immediate operands.
449 (swap_operands): Deal with 4 operand instructions.
450 (build_modrm_byte): Add support for insertq instruction.
451
6b2de085
L
4522006-07-13 H.J. Lu <hongjiu.lu@intel.com>
453
454 * config/tc-i386.h (Size64): Fix a typo in comment.
455
01eaea5a
NC
4562006-07-12 Nick Clifton <nickc@redhat.com>
457
458 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 459 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
460 already been checked here.
461
1e85aad8
JW
4622006-07-07 James E Wilson <wilson@specifix.com>
463
464 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
465
1370e33d
NC
4662006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
467 Nick Clifton <nickc@redhat.com>
468
469 PR binutils/2877
470 * doc/as.texi: Fix spelling typo: branchs => branches.
471 * doc/c-m68hc11.texi: Likewise.
472 * config/tc-m68hc11.c: Likewise.
473 Support old spelling of command line switch for backwards
474 compatibility.
475
5f0fe04b
TS
4762006-07-04 Thiemo Seufer <ths@mips.com>
477 David Ung <davidu@mips.com>
478
479 * config/tc-mips.c (s_is_linkonce): New function.
480 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
481 weak, external, and linkonce symbols.
482 (pic_need_relax): Use s_is_linkonce.
483
85234291
L
4842006-06-24 H.J. Lu <hongjiu.lu@intel.com>
485
486 * doc/as.texinfo (Org): Remove space.
487 (P2align): Add "@var{abs-expr},".
488
ccc9c027
L
4892006-06-23 H.J. Lu <hongjiu.lu@intel.com>
490
491 * config/tc-i386.c (cpu_arch_tune_set): New.
492 (cpu_arch_isa): Likewise.
493 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
494 nops with short or long nop sequences based on -march=/.arch
495 and -mtune=.
496 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
497 set cpu_arch_tune and cpu_arch_tune_flags.
498 (md_parse_option): For -march=, set cpu_arch_isa and set
499 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
500 0. Set cpu_arch_tune_set to 1 for -mtune=.
501 (i386_target_format): Don't set cpu_arch_tune.
502
d4dc2f22
TS
5032006-06-23 Nigel Stephens <nigel@mips.com>
504
505 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
506 generated .sbss.* and .gnu.linkonce.sb.*.
507
a8dbcb85
TS
5082006-06-23 Thiemo Seufer <ths@mips.com>
509 David Ung <davidu@mips.com>
510
511 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
512 label_list.
513 * config/tc-mips.c (label_list): Define per-segment label_list.
514 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
515 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
516 mips_from_file_after_relocs, mips_define_label): Use per-segment
517 label_list.
518
3994f87e
TS
5192006-06-22 Thiemo Seufer <ths@mips.com>
520
521 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
522 (append_insn): Use it.
523 (md_apply_fix): Whitespace formatting.
524 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
525 mips16_extended_frag): Remove register specifier.
526 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
527 constants.
528
fa073d69
MS
5292006-06-21 Mark Shinwell <shinwell@codesourcery.com>
530
531 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
532 a directive saving VFP registers for ARMv6 or later.
533 (s_arm_unwind_save): Add parameter arch_v6 and call
534 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
535 appropriate.
536 (md_pseudo_table): Add entry for new "vsave" directive.
537 * doc/c-arm.texi: Correct error in example for "save"
538 directive (fstmdf -> fstmdx). Also document "vsave" directive.
539
8e77b565 5402006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
541 Anatoly Sokolov <aesok@post.ru>
542
543 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
544 and atmega644p devices. Rename atmega164/atmega324 devices to
545 atmega164p/atmega324p.
546 * doc/c-avr.texi: Document new mcu and arch options.
547
8b1ad454
NC
5482006-06-17 Nick Clifton <nickc@redhat.com>
549
550 * config/tc-arm.c (enum parse_operand_result): Move outside of
551 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
552
9103f4f4
L
5532006-06-16 H.J. Lu <hongjiu.lu@intel.com>
554
555 * config/tc-i386.h (processor_type): New.
556 (arch_entry): Add type.
557
558 * config/tc-i386.c (cpu_arch_tune): New.
559 (cpu_arch_tune_flags): Likewise.
560 (cpu_arch_isa_flags): Likewise.
561 (cpu_arch): Updated.
562 (set_cpu_arch): Also update cpu_arch_isa_flags.
563 (md_assemble): Update cpu_arch_isa_flags.
564 (OPTION_MARCH): New.
565 (OPTION_MTUNE): Likewise.
566 (md_longopts): Add -march= and -mtune=.
567 (md_parse_option): Support -march= and -mtune=.
568 (md_show_usage): Add -march=CPU/-mtune=CPU.
569 (i386_target_format): Also update cpu_arch_isa_flags,
570 cpu_arch_tune and cpu_arch_tune_flags.
571
572 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
573
574 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
575
4962c51a
MS
5762006-06-15 Mark Shinwell <shinwell@codesourcery.com>
577
578 * config/tc-arm.c (enum parse_operand_result): New.
579 (struct group_reloc_table_entry): New.
580 (enum group_reloc_type): New.
581 (group_reloc_table): New array.
582 (find_group_reloc_table_entry): New function.
583 (parse_shifter_operand_group_reloc): New function.
584 (parse_address_main): New function, incorporating code
585 from the old parse_address function. To be used via...
586 (parse_address): wrapper for parse_address_main; and
587 (parse_address_group_reloc): new function, likewise.
588 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
589 OP_ADDRGLDRS, OP_ADDRGLDC.
590 (parse_operands): Support for these new operand codes.
591 New macro po_misc_or_fail_no_backtrack.
592 (encode_arm_cp_address): Preserve group relocations.
593 (insns): Modify to use the above operand codes where group
594 relocations are permitted.
595 (md_apply_fix): Handle the group relocations
596 ALU_PC_G0_NC through LDC_SB_G2.
597 (tc_gen_reloc): Likewise.
598 (arm_force_relocation): Leave group relocations for the linker.
599 (arm_fix_adjustable): Likewise.
600
cd2f129f
JB
6012006-06-15 Julian Brown <julian@codesourcery.com>
602
603 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
604 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
605 relocs properly.
606
46e883c5
L
6072006-06-12 H.J. Lu <hongjiu.lu@intel.com>
608
609 * config/tc-i386.c (process_suffix): Don't add rex64 for
610 "xchg %rax,%rax".
611
1787fe5b
TS
6122006-06-09 Thiemo Seufer <ths@mips.com>
613
614 * config/tc-mips.c (mips_ip): Maintain argument count.
615
96f989c2
AM
6162006-06-09 Alan Modra <amodra@bigpond.net.au>
617
618 * config/tc-iq2000.c: Include sb.h.
619
7c752c2a
TS
6202006-06-08 Nigel Stephens <nigel@mips.com>
621
622 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
623 aliases for better compatibility with SGI tools.
624
03bf704f
AM
6252006-06-08 Alan Modra <amodra@bigpond.net.au>
626
627 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
628 * Makefile.am (GASLIBS): Expand @BFDLIB@.
629 (BFDVER_H): Delete.
630 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
631 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
632 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
633 Run "make dep-am".
634 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
635 * Makefile.in: Regenerate.
636 * doc/Makefile.in: Regenerate.
637 * configure: Regenerate.
638
6648b7cf
JM
6392006-06-07 Joseph S. Myers <joseph@codesourcery.com>
640
641 * po/Make-in (pdf, ps): New dummy targets.
642
037e8744
JB
6432006-06-07 Julian Brown <julian@codesourcery.com>
644
645 * config/tc-arm.c (stdarg.h): include.
646 (arm_it): Add uncond_value field. Add isvec and issingle to operand
647 array.
648 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
649 REG_TYPE_NSDQ (single, double or quad vector reg).
650 (reg_expected_msgs): Update.
651 (BAD_FPU): Add macro for unsupported FPU instruction error.
652 (parse_neon_type): Support 'd' as an alias for .f64.
653 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
654 sets of registers.
655 (parse_vfp_reg_list): Don't update first arg on error.
656 (parse_neon_mov): Support extra syntax for VFP moves.
657 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
658 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
659 (parse_operands): Support isvec, issingle operands fields, new parse
660 codes above.
661 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
662 msr variants.
663 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
664 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
665 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
666 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
667 shapes.
668 (neon_shape): Redefine in terms of above.
669 (neon_shape_class): New enumeration, table of shape classes.
670 (neon_shape_el): New enumeration. One element of a shape.
671 (neon_shape_el_size): Register widths of above, where appropriate.
672 (neon_shape_info): New struct. Info for shape table.
673 (neon_shape_tab): New array.
674 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
675 (neon_check_shape): Rewrite as...
676 (neon_select_shape): New function to classify instruction shapes,
677 driven by new table neon_shape_tab array.
678 (neon_quad): New function. Return 1 if shape should set Q flag in
679 instructions (or equivalent), 0 otherwise.
680 (type_chk_of_el_type): Support F64.
681 (el_type_of_type_chk): Likewise.
682 (neon_check_type): Add support for VFP type checking (VFP data
683 elements fill their containing registers).
684 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
685 in thumb mode for VFP instructions.
686 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
687 and encode the current instruction as if it were that opcode.
688 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
689 arguments, call function in PFN.
690 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
691 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
692 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
693 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
694 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
695 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
696 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
697 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
698 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
699 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
700 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
701 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
702 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
703 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
704 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
705 neon_quad.
706 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
707 between VFP and Neon turns out to belong to Neon. Perform
708 architecture check and fill in condition field if appropriate.
709 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
710 (do_neon_cvt): Add support for VFP variants of instructions.
711 (neon_cvt_flavour): Extend to cover VFP conversions.
712 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
713 vmov variants.
714 (do_neon_ldr_str): Handle single-precision VFP load/store.
715 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
716 NS_NULL not NS_IGNORE.
717 (opcode_tag): Add OT_csuffixF for operands which either take a
718 conditional suffix, or have 0xF in the condition field.
719 (md_assemble): Add support for OT_csuffixF.
720 (NCE): Replace macro with...
721 (NCE_tag, NCE, NCEF): New macros.
722 (nCE): Replace macro with...
723 (nCE_tag, nCE, nCEF): New macros.
724 (insns): Add support for VFP insns or VFP versions of insns msr,
725 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
726 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
727 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
728 VFP/Neon insns together.
729
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AM
7302006-06-07 Alan Modra <amodra@bigpond.net.au>
731 Ladislav Michl <ladis@linux-mips.org>
732
733 * app.c: Don't include headers already included by as.h.
734 * as.c: Likewise.
735 * atof-generic.c: Likewise.
736 * cgen.c: Likewise.
737 * dwarf2dbg.c: Likewise.
738 * expr.c: Likewise.
739 * input-file.c: Likewise.
740 * input-scrub.c: Likewise.
741 * macro.c: Likewise.
742 * output-file.c: Likewise.
743 * read.c: Likewise.
744 * sb.c: Likewise.
745 * config/bfin-lex.l: Likewise.
746 * config/obj-coff.h: Likewise.
747 * config/obj-elf.h: Likewise.
748 * config/obj-som.h: Likewise.
749 * config/tc-arc.c: Likewise.
750 * config/tc-arm.c: Likewise.
751 * config/tc-avr.c: Likewise.
752 * config/tc-bfin.c: Likewise.
753 * config/tc-cris.c: Likewise.
754 * config/tc-d10v.c: Likewise.
755 * config/tc-d30v.c: Likewise.
756 * config/tc-dlx.h: Likewise.
757 * config/tc-fr30.c: Likewise.
758 * config/tc-frv.c: Likewise.
759 * config/tc-h8300.c: Likewise.
760 * config/tc-hppa.c: Likewise.
761 * config/tc-i370.c: Likewise.
762 * config/tc-i860.c: Likewise.
763 * config/tc-i960.c: Likewise.
764 * config/tc-ip2k.c: Likewise.
765 * config/tc-iq2000.c: Likewise.
766 * config/tc-m32c.c: Likewise.
767 * config/tc-m32r.c: Likewise.
768 * config/tc-maxq.c: Likewise.
769 * config/tc-mcore.c: Likewise.
770 * config/tc-mips.c: Likewise.
771 * config/tc-mmix.c: Likewise.
772 * config/tc-mn10200.c: Likewise.
773 * config/tc-mn10300.c: Likewise.
774 * config/tc-msp430.c: Likewise.
775 * config/tc-mt.c: Likewise.
776 * config/tc-ns32k.c: Likewise.
777 * config/tc-openrisc.c: Likewise.
778 * config/tc-ppc.c: Likewise.
779 * config/tc-s390.c: Likewise.
780 * config/tc-sh.c: Likewise.
781 * config/tc-sh64.c: Likewise.
782 * config/tc-sparc.c: Likewise.
783 * config/tc-tic30.c: Likewise.
784 * config/tc-tic4x.c: Likewise.
785 * config/tc-tic54x.c: Likewise.
786 * config/tc-v850.c: Likewise.
787 * config/tc-vax.c: Likewise.
788 * config/tc-xc16x.c: Likewise.
789 * config/tc-xstormy16.c: Likewise.
790 * config/tc-xtensa.c: Likewise.
791 * config/tc-z80.c: Likewise.
792 * config/tc-z8k.c: Likewise.
793 * macro.h: Don't include sb.h or ansidecl.h.
794 * sb.h: Don't include stdio.h or ansidecl.h.
795 * cond.c: Include sb.h.
796 * itbl-lex.l: Include as.h instead of other system headers.
797 * itbl-parse.y: Likewise.
798 * itbl-ops.c: Similarly.
799 * itbl-ops.h: Don't include as.h or ansidecl.h.
800 * config/bfin-defs.h: Don't include bfd.h or as.h.
801 * config/bfin-parse.y: Include as.h instead of other system headers.
802
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AM
8032006-06-06 Ben Elliston <bje@au.ibm.com>
804 Anton Blanchard <anton@samba.org>
805
806 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
807 (md_show_usage): Document it.
808 (ppc_setup_opcodes): Test power6 opcode flag bits.
809 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
810
65263ce3
TS
8112006-06-06 Thiemo Seufer <ths@mips.com>
812 Chao-ying Fu <fu@mips.com>
813
814 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
815 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
816 (macro_build): Update comment.
817 (mips_ip): Allow DSP64 instructions for MIPS64R2.
818 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
819 CPU_HAS_MDMX.
820 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
821 MIPS_CPU_ASE_MDMX flags for sb1.
822
a9e24354
TS
8232006-06-05 Thiemo Seufer <ths@mips.com>
824
825 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
826 appropriate.
827 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
828 (mips_ip): Make overflowed/underflowed constant arguments in DSP
829 and MT instructions a fatal error. Use INSERT_OPERAND where
830 appropriate. Improve warnings for break and wait code overflows.
831 Use symbolic constant of OP_MASK_COPZ.
832 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
833
4cfe2c59
DJ
8342006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
835
836 * po/Make-in (top_builddir): Define.
837
e10fad12
JM
8382006-06-02 Joseph S. Myers <joseph@codesourcery.com>
839
840 * doc/Makefile.am (TEXI2DVI): Define.
841 * doc/Makefile.in: Regenerate.
842 * doc/c-arc.texi: Fix typo.
843
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AM
8442006-06-01 Alan Modra <amodra@bigpond.net.au>
845
846 * config/obj-ieee.c: Delete.
847 * config/obj-ieee.h: Delete.
848 * Makefile.am (OBJ_FORMATS): Remove ieee.
849 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
850 (obj-ieee.o): Remove rule.
851 * Makefile.in: Regenerate.
852 * configure.in (atof): Remove tahoe.
853 (OBJ_MAYBE_IEEE): Don't define.
854 * configure: Regenerate.
855 * config.in: Regenerate.
856 * doc/Makefile.in: Regenerate.
857 * po/POTFILES.in: Regenerate.
858
20e95c23
DJ
8592006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
860
861 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
862 and LIBINTL_DEP everywhere.
863 (INTLLIBS): Remove.
864 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
865 * acinclude.m4: Include new gettext macros.
866 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
867 Remove local code for po/Makefile.
868 * Makefile.in, configure, doc/Makefile.in: Regenerated.
869
eebf07fb
NC
8702006-05-30 Nick Clifton <nickc@redhat.com>
871
872 * po/es.po: Updated Spanish translation.
873
b6aee19e
DC
8742006-05-06 Denis Chertykov <denisc@overta.ru>
875
876 * doc/c-avr.texi: New file.
877 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
878 * doc/all.texi: Set AVR
879 * doc/as.texinfo: Include c-avr.texi
880
f8fdc850
JZ
8812006-05-28 Jie Zhang <jie.zhang@analog.com>
882
883 * config/bfin-parse.y (check_macfunc): Loose the condition of
884 calling check_multiply_halfregs ().
885
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JZ
8862006-05-25 Jie Zhang <jie.zhang@analog.com>
887
888 * config/bfin-parse.y (asm_1): Better check and deal with
889 vector and scalar Multiply 16-Bit Operands instructions.
890
9b52905e
NC
8912006-05-24 Nick Clifton <nickc@redhat.com>
892
893 * config/tc-hppa.c: Convert to ISO C90 format.
894 * config/tc-hppa.h: Likewise.
895
8962006-05-24 Carlos O'Donell <carlos@systemhalted.org>
897 Randolph Chung <randolph@tausq.org>
898
899 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
900 is_tls_ieoff, is_tls_leoff): Define.
901 (fix_new_hppa): Handle TLS.
902 (cons_fix_new_hppa): Likewise.
903 (pa_ip): Likewise.
904 (md_apply_fix): Handle TLS relocs.
905 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
906
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NC
9072006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
908
909 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
910
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TS
9112006-05-23 Thiemo Seufer <ths@mips.com>
912 David Ung <davidu@mips.com>
913 Nigel Stephens <nigel@mips.com>
914
915 [ gas/ChangeLog ]
916 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
917 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
918 ISA_HAS_MXHC1): New macros.
919 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
920 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
921 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
922 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
923 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
924 (mips_after_parse_args): Change default handling of float register
925 size to account for 32bit code with 64bit FP. Better sanity checking
926 of ISA/ASE/ABI option combinations.
927 (s_mipsset): Support switching of GPR and FPR sizes via
928 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
929 options.
930 (mips_elf_final_processing): We should record the use of 64bit FP
931 registers in 32bit code but we don't, because ELF header flags are
932 a scarce ressource.
933 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
934 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
935 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
936 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
937 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
938 missing -march options. Document .set arch=CPU. Move .set smartmips
939 to ASE page. Use @code for .set FOO examples.
940
8b64503a
JZ
9412006-05-23 Jie Zhang <jie.zhang@analog.com>
942
943 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
944 if needed.
945
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JZ
9462006-05-23 Jie Zhang <jie.zhang@analog.com>
947
948 * config/bfin-defs.h (bfin_equals): Remove declaration.
949 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
950 * config/tc-bfin.c (bfin_name_is_register): Remove.
951 (bfin_equals): Remove.
952 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
953 (bfin_name_is_register): Remove declaration.
954
7455baf8
TS
9552006-05-19 Thiemo Seufer <ths@mips.com>
956 Nigel Stephens <nigel@mips.com>
957
958 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
959 (mips_oddfpreg_ok): New function.
960 (mips_ip): Use it.
961
707bfff6
TS
9622006-05-19 Thiemo Seufer <ths@mips.com>
963 David Ung <davidu@mips.com>
964
965 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
966 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
967 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
968 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
969 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
970 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
971 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
972 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
973 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
974 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
975 reg_names_o32, reg_names_n32n64): Define register classes.
976 (reg_lookup): New function, use register classes.
977 (md_begin): Reserve register names in the symbol table. Simplify
978 OBJ_ELF defines.
979 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
980 Use reg_lookup.
981 (mips16_ip): Use reg_lookup.
982 (tc_get_register): Likewise.
983 (tc_mips_regname_to_dw2regnum): New function.
984
1df69f4f
TS
9852006-05-19 Thiemo Seufer <ths@mips.com>
986
987 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
988 Un-constify string argument.
989 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
990 Likewise.
991 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
992 Likewise.
993 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
994 Likewise.
995 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
996 Likewise.
997 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
998 Likewise.
999 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1000 Likewise.
1001
377260ba
NS
10022006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1003
1004 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1005 cfloat/m68881 to correct architecture before using it.
1006
cce7653b
NC
10072006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1008
1009 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1010 constant values.
1011
b0796911
PB
10122006-05-15 Paul Brook <paul@codesourcery.com>
1013
1014 * config/tc-arm.c (arm_adjust_symtab): Use
1015 bfd_is_arm_special_symbol_name.
1016
64b607e6
BW
10172006-05-15 Bob Wilson <bob.wilson@acm.org>
1018
1019 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1020 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1021 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1022 Handle errors from calls to xtensa_opcode_is_* functions.
1023
9b3f89ee
TS
10242006-05-14 Thiemo Seufer <ths@mips.com>
1025
1026 * config/tc-mips.c (macro_build): Test for currently active
1027 mips16 option.
1028 (mips16_ip): Reject invalid opcodes.
1029
370b66a1
CD
10302006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1031
1032 * doc/as.texinfo: Rename "Index" to "AS Index",
1033 and "ABORT" to "ABORT (COFF)".
1034
b6895b4f
PB
10352006-05-11 Paul Brook <paul@codesourcery.com>
1036
1037 * config/tc-arm.c (parse_half): New function.
1038 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1039 (parse_operands): Ditto.
1040 (do_mov16): Reject invalid relocations.
1041 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1042 (insns): Replace Iffff with HALF.
1043 (md_apply_fix): Add MOVW and MOVT relocs.
1044 (tc_gen_reloc): Ditto.
1045 * doc/c-arm.texi: Document relocation operators
1046
e28387c3
PB
10472006-05-11 Paul Brook <paul@codesourcery.com>
1048
1049 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1050
89ee2ebe
TS
10512006-05-11 Thiemo Seufer <ths@mips.com>
1052
1053 * config/tc-mips.c (append_insn): Don't check the range of j or
1054 jal addresses.
1055
53baae48
NC
10562006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1057
1058 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1059 relocs against external symbols for WinCE targets.
1060 (md_apply_fix): Likewise.
1061
4e2a74a8
TS
10622006-05-09 David Ung <davidu@mips.com>
1063
1064 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1065 j or jal address.
1066
337ff0a5
NC
10672006-05-09 Nick Clifton <nickc@redhat.com>
1068
1069 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1070 against symbols which are not going to be placed into the symbol
1071 table.
1072
8c9f705e
BE
10732006-05-09 Ben Elliston <bje@au.ibm.com>
1074
1075 * expr.c (operand): Remove `if (0 && ..)' statement and
1076 subsequently unused target_op label. Collapse `if (1 || ..)'
1077 statement.
1078 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1079 separately above the switch.
1080
2fd0d2ac
NC
10812006-05-08 Nick Clifton <nickc@redhat.com>
1082
1083 PR gas/2623
1084 * config/tc-msp430.c (line_separator_character): Define as |.
1085
e16bfa71
TS
10862006-05-08 Thiemo Seufer <ths@mips.com>
1087 Nigel Stephens <nigel@mips.com>
1088 David Ung <davidu@mips.com>
1089
1090 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1091 (mips_opts): Likewise.
1092 (file_ase_smartmips): New variable.
1093 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1094 (macro_build): Handle SmartMIPS instructions.
1095 (mips_ip): Likewise.
1096 (md_longopts): Add argument handling for smartmips.
1097 (md_parse_options, mips_after_parse_args): Likewise.
1098 (s_mipsset): Add .set smartmips support.
1099 (md_show_usage): Document -msmartmips/-mno-smartmips.
1100 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1101 .set smartmips.
1102 * doc/c-mips.texi: Likewise.
1103
32638454
AM
11042006-05-08 Alan Modra <amodra@bigpond.net.au>
1105
1106 * write.c (relax_segment): Add pass count arg. Don't error on
1107 negative org/space on first two passes.
1108 (relax_seg_info): New struct.
1109 (relax_seg, write_object_file): Adjust.
1110 * write.h (relax_segment): Update prototype.
1111
b7fc2769
JB
11122006-05-05 Julian Brown <julian@codesourcery.com>
1113
1114 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1115 checking.
1116 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1117 architecture version checks.
1118 (insns): Allow overlapping instructions to be used in VFP mode.
1119
7f841127
L
11202006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1121
1122 PR gas/2598
1123 * config/obj-elf.c (obj_elf_change_section): Allow user
1124 specified SHF_ALPHA_GPREL.
1125
73160847
NC
11262006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1127
1128 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1129 for PMEM related expressions.
1130
56487c55
NC
11312006-05-05 Nick Clifton <nickc@redhat.com>
1132
1133 PR gas/2582
1134 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1135 insertion of a directory separator character into a string at a
1136 given offset. Uses heuristics to decide when to use a backslash
1137 character rather than a forward-slash character.
1138 (dwarf2_directive_loc): Use the macro.
1139 (out_debug_info): Likewise.
1140
d43b4baf
TS
11412006-05-05 Thiemo Seufer <ths@mips.com>
1142 David Ung <davidu@mips.com>
1143
1144 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1145 instruction.
1146 (macro): Add new case M_CACHE_AB.
1147
088fa78e
KH
11482006-05-04 Kazu Hirata <kazu@codesourcery.com>
1149
1150 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1151 (opcode_lookup): Issue a warning for opcode with
1152 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1153 identical to OT_cinfix3.
1154 (TxC3w, TC3w, tC3w): New.
1155 (insns): Use tC3w and TC3w for comparison instructions with
1156 's' suffix.
1157
c9049d30
AM
11582006-05-04 Alan Modra <amodra@bigpond.net.au>
1159
1160 * subsegs.h (struct frchain): Delete frch_seg.
1161 (frchain_root): Delete.
1162 (seg_info): Define as macro.
1163 * subsegs.c (frchain_root): Delete.
1164 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1165 (subsegs_begin, subseg_change): Adjust for above.
1166 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1167 rather than to one big list.
1168 (subseg_get): Don't special case abs, und sections.
1169 (subseg_new, subseg_force_new): Don't set frchainP here.
1170 (seg_info): Delete.
1171 (subsegs_print_statistics): Adjust frag chain control list traversal.
1172 * debug.c (dmp_frags): Likewise.
1173 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1174 at frchain_root. Make use of known frchain ordering.
1175 (last_frag_for_seg): Likewise.
1176 (get_frag_fix): Likewise. Add seg param.
1177 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1178 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1179 (SUB_SEGMENT_ALIGN): Likewise.
1180 (subsegs_finish): Adjust frchain list traversal.
1181 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1182 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1183 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1184 (xtensa_fix_b_j_loop_end_frags): Likewise.
1185 (xtensa_fix_close_loop_end_frags): Likewise.
1186 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1187 (retrieve_segment_info): Delete frch_seg initialisation.
1188
f592407e
AM
11892006-05-03 Alan Modra <amodra@bigpond.net.au>
1190
1191 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1192 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1193 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1194 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1195
df7849c5
JM
11962006-05-02 Joseph Myers <joseph@codesourcery.com>
1197
1198 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1199 here.
1200 (md_apply_fix3): Multiply offset by 4 here for
1201 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1202
2d545b82
L
12032006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1204 Jan Beulich <jbeulich@novell.com>
1205
1206 * config/tc-i386.c (output_invalid_buf): Change size for
1207 unsigned char.
1208 * config/tc-tic30.c (output_invalid_buf): Likewise.
1209
1210 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1211 unsigned char.
1212 * config/tc-tic30.c (output_invalid): Likewise.
1213
38fc1cb1
DJ
12142006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1215
1216 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1217 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1218 (asconfig.texi): Don't set top_srcdir.
1219 * doc/as.texinfo: Don't use top_srcdir.
1220 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1221
2d545b82
L
12222006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1223
1224 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1225 * config/tc-tic30.c (output_invalid_buf): Likewise.
1226
1227 * config/tc-i386.c (output_invalid): Use snprintf instead of
1228 sprintf.
1229 * config/tc-ia64.c (declare_register_set): Likewise.
1230 (emit_one_bundle): Likewise.
1231 (check_dependencies): Likewise.
1232 * config/tc-tic30.c (output_invalid): Likewise.
1233
a8bc6c78
PB
12342006-05-02 Paul Brook <paul@codesourcery.com>
1235
1236 * config/tc-arm.c (arm_optimize_expr): New function.
1237 * config/tc-arm.h (md_optimize_expr): Define
1238 (arm_optimize_expr): Add prototype.
1239 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1240
58633d9a
BE
12412006-05-02 Ben Elliston <bje@au.ibm.com>
1242
22772e33
BE
1243 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1244 field unsigned.
1245
58633d9a
BE
1246 * sb.h (sb_list_vector): Move to sb.c.
1247 * sb.c (free_list): Use type of sb_list_vector directly.
1248 (sb_build): Fix off-by-one error in assertion about `size'.
1249
89cdfe57
BE
12502006-05-01 Ben Elliston <bje@au.ibm.com>
1251
1252 * listing.c (listing_listing): Remove useless loop.
1253 * macro.c (macro_expand): Remove is_positional local variable.
1254 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1255 and simplify surrounding expressions, where possible.
1256 (assign_symbol): Likewise.
1257 (s_weakref): Likewise.
1258 * symbols.c (colon): Likewise.
1259
c35da140
AM
12602006-05-01 James Lemke <jwlemke@wasabisystems.com>
1261
1262 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1263
9bcd4f99
TS
12642006-04-30 Thiemo Seufer <ths@mips.com>
1265 David Ung <davidu@mips.com>
1266
1267 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1268 (mips_immed): New table that records various handling of udi
1269 instruction patterns.
1270 (mips_ip): Adds udi handling.
1271
001ae1a4
AM
12722006-04-28 Alan Modra <amodra@bigpond.net.au>
1273
1274 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1275 of list rather than beginning.
1276
136da414
JB
12772006-04-26 Julian Brown <julian@codesourcery.com>
1278
1279 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1280 (is_quarter_float): Rename from above. Simplify slightly.
1281 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1282 number.
1283 (parse_neon_mov): Parse floating-point constants.
1284 (neon_qfloat_bits): Fix encoding.
1285 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1286 preference to integer encoding when using the F32 type.
1287
dcbf9037
JB
12882006-04-26 Julian Brown <julian@codesourcery.com>
1289
1290 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1291 zero-initialising structures containing it will lead to invalid types).
1292 (arm_it): Add vectype to each operand.
1293 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1294 defined field.
1295 (neon_typed_alias): New structure. Extra information for typed
1296 register aliases.
1297 (reg_entry): Add neon type info field.
1298 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1299 Break out alternative syntax for coprocessor registers, etc. into...
1300 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1301 out from arm_reg_parse.
1302 (parse_neon_type): Move. Return SUCCESS/FAIL.
1303 (first_error): New function. Call to ensure first error which occurs is
1304 reported.
1305 (parse_neon_operand_type): Parse exactly one type.
1306 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1307 (parse_typed_reg_or_scalar): New function. Handle core of both
1308 arm_typed_reg_parse and parse_scalar.
1309 (arm_typed_reg_parse): Parse a register with an optional type.
1310 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1311 result.
1312 (parse_scalar): Parse a Neon scalar with optional type.
1313 (parse_reg_list): Use first_error.
1314 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1315 (neon_alias_types_same): New function. Return true if two (alias) types
1316 are the same.
1317 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1318 of elements.
1319 (insert_reg_alias): Return new reg_entry not void.
1320 (insert_neon_reg_alias): New function. Insert type/index information as
1321 well as register for alias.
1322 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1323 make typed register aliases accordingly.
1324 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1325 of line.
1326 (s_unreq): Delete type information if present.
1327 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1328 (s_arm_unwind_save_mmxwcg): Likewise.
1329 (s_arm_unwind_movsp): Likewise.
1330 (s_arm_unwind_setfp): Likewise.
1331 (parse_shift): Likewise.
1332 (parse_shifter_operand): Likewise.
1333 (parse_address): Likewise.
1334 (parse_tb): Likewise.
1335 (tc_arm_regname_to_dw2regnum): Likewise.
1336 (md_pseudo_table): Add dn, qn.
1337 (parse_neon_mov): Handle typed operands.
1338 (parse_operands): Likewise.
1339 (neon_type_mask): Add N_SIZ.
1340 (N_ALLMODS): New macro.
1341 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1342 (el_type_of_type_chk): Add some safeguards.
1343 (modify_types_allowed): Fix logic bug.
1344 (neon_check_type): Handle operands with types.
1345 (neon_three_same): Remove redundant optional arg handling.
1346 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1347 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1348 (do_neon_step): Adjust accordingly.
1349 (neon_cmode_for_logic_imm): Use first_error.
1350 (do_neon_bitfield): Call neon_check_type.
1351 (neon_dyadic): Rename to...
1352 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1353 to allow modification of type of the destination.
1354 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1355 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1356 (do_neon_compare): Make destination be an untyped bitfield.
1357 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1358 (neon_mul_mac): Return early in case of errors.
1359 (neon_move_immediate): Use first_error.
1360 (neon_mac_reg_scalar_long): Fix type to include scalar.
1361 (do_neon_dup): Likewise.
1362 (do_neon_mov): Likewise (in several places).
1363 (do_neon_tbl_tbx): Fix type.
1364 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1365 (do_neon_ld_dup): Exit early in case of errors and/or use
1366 first_error.
1367 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1368 Handle .dn/.qn directives.
1369 (REGDEF): Add zero for reg_entry neon field.
1370
5287ad62
JB
13712006-04-26 Julian Brown <julian@codesourcery.com>
1372
1373 * config/tc-arm.c (limits.h): Include.
1374 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1375 (fpu_vfp_v3_or_neon_ext): Declare constants.
1376 (neon_el_type): New enumeration of types for Neon vector elements.
1377 (neon_type_el): New struct. Define type and size of a vector element.
1378 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1379 instruction.
1380 (neon_type): Define struct. The type of an instruction.
1381 (arm_it): Add 'vectype' for the current instruction.
1382 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1383 (vfp_sp_reg_pos): Rename to...
1384 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1385 tags.
1386 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1387 (Neon D or Q register).
1388 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1389 register.
1390 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1391 (my_get_expression): Allow above constant as argument to accept
1392 64-bit constants with optional prefix.
1393 (arm_reg_parse): Add extra argument to return the specific type of
1394 register in when either a D or Q register (REG_TYPE_NDQ) is
1395 requested. Can be NULL.
1396 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1397 (parse_reg_list): Update for new arm_reg_parse args.
1398 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1399 (parse_neon_el_struct_list): New function. Parse element/structure
1400 register lists for VLD<n>/VST<n> instructions.
1401 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1402 (s_arm_unwind_save_mmxwr): Likewise.
1403 (s_arm_unwind_save_mmxwcg): Likewise.
1404 (s_arm_unwind_movsp): Likewise.
1405 (s_arm_unwind_setfp): Likewise.
1406 (parse_big_immediate): New function. Parse an immediate, which may be
1407 64 bits wide. Put results in inst.operands[i].
1408 (parse_shift): Update for new arm_reg_parse args.
1409 (parse_address): Likewise. Add parsing of alignment specifiers.
1410 (parse_neon_mov): Parse the operands of a VMOV instruction.
1411 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1412 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1413 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1414 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1415 (parse_operands): Handle new codes above.
1416 (encode_arm_vfp_sp_reg): Rename to...
1417 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1418 selected VFP version only supports D0-D15.
1419 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1420 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1421 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1422 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1423 encode_arm_vfp_reg name, and allow 32 D regs.
1424 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1425 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1426 regs.
1427 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1428 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1429 constant-load and conversion insns introduced with VFPv3.
1430 (neon_tab_entry): New struct.
1431 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1432 those which are the targets of pseudo-instructions.
1433 (neon_opc): Enumerate opcodes, use as indices into...
1434 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1435 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1436 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1437 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1438 neon_enc_tab.
1439 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1440 Neon instructions.
1441 (neon_type_mask): New. Compact type representation for type checking.
1442 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1443 permitted type combinations.
1444 (N_IGNORE_TYPE): New macro.
1445 (neon_check_shape): New function. Check an instruction shape for
1446 multiple alternatives. Return the specific shape for the current
1447 instruction.
1448 (neon_modify_type_size): New function. Modify a vector type and size,
1449 depending on the bit mask in argument 1.
1450 (neon_type_promote): New function. Convert a given "key" type (of an
1451 operand) into the correct type for a different operand, based on a bit
1452 mask.
1453 (type_chk_of_el_type): New function. Convert a type and size into the
1454 compact representation used for type checking.
1455 (el_type_of_type_ckh): New function. Reverse of above (only when a
1456 single bit is set in the bit mask).
1457 (modify_types_allowed): New function. Alter a mask of allowed types
1458 based on a bit mask of modifications.
1459 (neon_check_type): New function. Check the type of the current
1460 instruction against the variable argument list. The "key" type of the
1461 instruction is returned.
1462 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1463 a Neon data-processing instruction depending on whether we're in ARM
1464 mode or Thumb-2 mode.
1465 (neon_logbits): New function.
1466 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1467 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1468 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1469 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1470 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1471 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1472 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1473 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1474 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1475 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1476 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1477 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1478 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1479 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1480 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1481 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1482 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1483 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1484 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1485 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1486 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1487 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1488 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1489 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1490 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1491 helpers.
1492 (parse_neon_type): New function. Parse Neon type specifier.
1493 (opcode_lookup): Allow parsing of Neon type specifiers.
1494 (REGNUM2, REGSETH, REGSET2): New macros.
1495 (reg_names): Add new VFPv3 and Neon registers.
1496 (NUF, nUF, NCE, nCE): New macros for opcode table.
1497 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1498 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1499 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1500 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1501 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1502 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1503 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1504 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1505 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1506 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1507 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1508 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1509 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1510 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1511 fto[us][lh][sd].
1512 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1513 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1514 (arm_option_cpu_value): Add vfp3 and neon.
1515 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1516 VFPv1 attribute.
1517
1946c96e
BW
15182006-04-25 Bob Wilson <bob.wilson@acm.org>
1519
1520 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1521 syntax instead of hardcoded opcodes with ".w18" suffixes.
1522 (wide_branch_opcode): New.
1523 (build_transition): Use it to check for wide branch opcodes with
1524 either ".w18" or ".w15" suffixes.
1525
5033a645
BW
15262006-04-25 Bob Wilson <bob.wilson@acm.org>
1527
1528 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1529 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1530 frag's is_literal flag.
1531
395fa56f
BW
15322006-04-25 Bob Wilson <bob.wilson@acm.org>
1533
1534 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1535
708587a4
KH
15362006-04-23 Kazu Hirata <kazu@codesourcery.com>
1537
1538 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1539 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1540 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1541 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1542 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1543
8463be01
PB
15442005-04-20 Paul Brook <paul@codesourcery.com>
1545
1546 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1547 all targets.
1548 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1549
f26a5955
AM
15502006-04-19 Alan Modra <amodra@bigpond.net.au>
1551
1552 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1553 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1554 Make some cpus unsupported on ELF. Run "make dep-am".
1555 * Makefile.in: Regenerate.
1556
241a6c40
AM
15572006-04-19 Alan Modra <amodra@bigpond.net.au>
1558
1559 * configure.in (--enable-targets): Indent help message.
1560 * configure: Regenerate.
1561
bb8f5920
L
15622006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1563
1564 PR gas/2533
1565 * config/tc-i386.c (i386_immediate): Check illegal immediate
1566 register operand.
1567
23d9d9de
AM
15682006-04-18 Alan Modra <amodra@bigpond.net.au>
1569
64e74474
AM
1570 * config/tc-i386.c: Formatting.
1571 (output_disp, output_imm): ISO C90 params.
1572
6cbe03fb
AM
1573 * frags.c (frag_offset_fixed_p): Constify args.
1574 * frags.h (frag_offset_fixed_p): Ditto.
1575
23d9d9de
AM
1576 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1577 (COFF_MAGIC): Delete.
a37d486e
AM
1578
1579 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1580
e7403566
DJ
15812006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1582
1583 * po/POTFILES.in: Regenerated.
1584
58ab4f3d
MM
15852006-04-16 Mark Mitchell <mark@codesourcery.com>
1586
1587 * doc/as.texinfo: Mention that some .type syntaxes are not
1588 supported on all architectures.
1589
482fd9f9
BW
15902006-04-14 Sterling Augustine <sterling@tensilica.com>
1591
1592 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1593 instructions when such transformations have been disabled.
1594
05d58145
BW
15952006-04-10 Sterling Augustine <sterling@tensilica.com>
1596
1597 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1598 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1599 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1600 decoding the loop instructions. Remove current_offset variable.
1601 (xtensa_fix_short_loop_frags): Likewise.
1602 (min_bytes_to_other_loop_end): Remove current_offset argument.
1603
9e75b3fa
AM
16042006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1605
a37d486e 1606 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1607 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1608
d727e8c2
NC
16092006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1610
1611 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1612 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1613 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1614 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1615 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1616 at90can64, at90usb646, at90usb647, at90usb1286 and
1617 at90usb1287.
1618 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1619
d252fdde
PB
16202006-04-07 Paul Brook <paul@codesourcery.com>
1621
1622 * config/tc-arm.c (parse_operands): Set default error message.
1623
ab1eb5fe
PB
16242006-04-07 Paul Brook <paul@codesourcery.com>
1625
1626 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1627
7ae2971b
PB
16282006-04-07 Paul Brook <paul@codesourcery.com>
1629
1630 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1631
53365c0d
PB
16322006-04-07 Paul Brook <paul@codesourcery.com>
1633
1634 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1635 (move_or_literal_pool): Handle Thumb-2 instructions.
1636 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1637
45aa61fe
AM
16382006-04-07 Alan Modra <amodra@bigpond.net.au>
1639
1640 PR 2512.
1641 * config/tc-i386.c (match_template): Move 64-bit operand tests
1642 inside loop.
1643
108a6f8e
CD
16442006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1645
1646 * po/Make-in: Add install-html target.
1647 * Makefile.am: Add install-html and install-html-recursive targets.
1648 * Makefile.in: Regenerate.
1649 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1650 * configure: Regenerate.
1651 * doc/Makefile.am: Add install-html and install-html-am targets.
1652 * doc/Makefile.in: Regenerate.
1653
ec651a3b
AM
16542006-04-06 Alan Modra <amodra@bigpond.net.au>
1655
1656 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1657 second scan.
1658
910600e9
RS
16592006-04-05 Richard Sandiford <richard@codesourcery.com>
1660 Daniel Jacobowitz <dan@codesourcery.com>
1661
1662 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1663 (GOTT_BASE, GOTT_INDEX): New.
1664 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1665 GOTT_INDEX when generating VxWorks PIC.
1666 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1667 use the generic *-*-vxworks* stanza instead.
1668
99630778
AM
16692006-04-04 Alan Modra <amodra@bigpond.net.au>
1670
1671 PR 997
1672 * frags.c (frag_offset_fixed_p): New function.
1673 * frags.h (frag_offset_fixed_p): Declare.
1674 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1675 (resolve_expression): Likewise.
1676
a02728c8
BW
16772006-04-03 Sterling Augustine <sterling@tensilica.com>
1678
1679 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1680 of the same length but different numbers of slots.
1681
9dfde49d
AS
16822006-03-30 Andreas Schwab <schwab@suse.de>
1683
1684 * configure.in: Fix help string for --enable-targets option.
1685 * configure: Regenerate.
1686
2da12c60
NS
16872006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1688
6d89cc8f
NS
1689 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1690 (m68k_ip): ... here. Use for all chips. Protect against buffer
1691 overrun and avoid excessive copying.
1692
2da12c60
NS
1693 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1694 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1695 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1696 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1697 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1698 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1699 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1700 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1701 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1702 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1703 (struct m68k_cpu): Change chip field to control_regs.
1704 (current_chip): Remove.
1705 (control_regs): New.
1706 (m68k_archs, m68k_extensions): Adjust.
1707 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1708 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1709 (find_cf_chip): Reimplement for new organization of cpu table.
1710 (select_control_regs): Remove.
1711 (mri_chip): Adjust.
1712 (struct save_opts): Save control regs, not chip.
1713 (s_save, s_restore): Adjust.
1714 (m68k_lookup_cpu): Give deprecated warning when necessary.
1715 (m68k_init_arch): Adjust.
1716 (md_show_usage): Adjust for new cpu table organization.
1717
1ac4baed
BS
17182006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1719
1720 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1721 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1722 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1723 "elf/bfin.h".
1724 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1725 (any_gotrel): New rule.
1726 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1727 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1728 "elf/bfin.h".
1729 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1730 (bfin_pic_ptr): New function.
1731 (md_pseudo_table): Add it for ".picptr".
1732 (OPTION_FDPIC): New macro.
1733 (md_longopts): Add -mfdpic.
1734 (md_parse_option): Handle it.
1735 (md_begin): Set BFD flags.
1736 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1737 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1738 us for GOT relocs.
1739 * Makefile.am (bfin-parse.o): Update dependencies.
1740 (DEPTC_bfin_elf): Likewise.
1741 * Makefile.in: Regenerate.
1742
a9d34880
RS
17432006-03-25 Richard Sandiford <richard@codesourcery.com>
1744
1745 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1746 mcfemac instead of mcfmac.
1747
9ca26584
AJ
17482006-03-23 Michael Matz <matz@suse.de>
1749
1750 * config/tc-i386.c (type_names): Correct placement of 'static'.
1751 (reloc): Map some more relocs to their 64 bit counterpart when
1752 size is 8.
1753 (output_insn): Work around breakage if DEBUG386 is defined.
1754 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1755 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1756 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1757 different from i386.
1758 (output_imm): Ditto.
1759 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1760 Imm64.
1761 (md_convert_frag): Jumps can now be larger than 2GB away, error
1762 out in that case.
1763 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1764 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1765
0a44bf69
RS
17662006-03-22 Richard Sandiford <richard@codesourcery.com>
1767 Daniel Jacobowitz <dan@codesourcery.com>
1768 Phil Edwards <phil@codesourcery.com>
1769 Zack Weinberg <zack@codesourcery.com>
1770 Mark Mitchell <mark@codesourcery.com>
1771 Nathan Sidwell <nathan@codesourcery.com>
1772
1773 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1774 (md_begin): Complain about -G being used for PIC. Don't change
1775 the text, data and bss alignments on VxWorks.
1776 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1777 generating VxWorks PIC.
1778 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1779 (macro): Likewise, but do not treat la $25 specially for
1780 VxWorks PIC, and do not handle jal.
1781 (OPTION_MVXWORKS_PIC): New macro.
1782 (md_longopts): Add -mvxworks-pic.
1783 (md_parse_option): Don't complain about using PIC and -G together here.
1784 Handle OPTION_MVXWORKS_PIC.
1785 (md_estimate_size_before_relax): Always use the first relaxation
1786 sequence on VxWorks.
1787 * config/tc-mips.h (VXWORKS_PIC): New.
1788
080eb7fe
PB
17892006-03-21 Paul Brook <paul@codesourcery.com>
1790
1791 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1792
03aaa593
BW
17932006-03-21 Sterling Augustine <sterling@tensilica.com>
1794
1795 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1796 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1797 (get_loop_align_size): New.
1798 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1799 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1800 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1801 (get_noop_aligned_address): Use get_loop_align_size.
1802 (get_aligned_diff): Likewise.
1803
3e94bf1a
PB
18042006-03-21 Paul Brook <paul@codesourcery.com>
1805
1806 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1807
dfa9f0d5
PB
18082006-03-20 Paul Brook <paul@codesourcery.com>
1809
1810 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1811 (do_t_branch): Encode branches inside IT blocks as unconditional.
1812 (do_t_cps): New function.
1813 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1814 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1815 (opcode_lookup): Allow conditional suffixes on all instructions in
1816 Thumb mode.
1817 (md_assemble): Advance condexec state before checking for errors.
1818 (insns): Use do_t_cps.
1819
6e1cb1a6
PB
18202006-03-20 Paul Brook <paul@codesourcery.com>
1821
1822 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1823 outputting the insn.
1824
0a966e2d
JBG
18252006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1826
1827 * config/tc-vax.c: Update copyright year.
1828 * config/tc-vax.h: Likewise.
1829
a49fcc17
JBG
18302006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1831
1832 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1833 make it static.
1834 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1835
f5208ef2
PB
18362006-03-17 Paul Brook <paul@codesourcery.com>
1837
1838 * config/tc-arm.c (insns): Add ldm and stm.
1839
cb4c78d6
BE
18402006-03-17 Ben Elliston <bje@au.ibm.com>
1841
1842 PR gas/2446
1843 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1844
c16d2bf0
PB
18452006-03-16 Paul Brook <paul@codesourcery.com>
1846
1847 * config/tc-arm.c (insns): Add "svc".
1848
80ca4e2c
BW
18492006-03-13 Bob Wilson <bob.wilson@acm.org>
1850
1851 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1852 flag and avoid double underscore prefixes.
1853
3a4a14e9
PB
18542006-03-10 Paul Brook <paul@codesourcery.com>
1855
1856 * config/tc-arm.c (md_begin): Handle EABIv5.
1857 (arm_eabis): Add EF_ARM_EABI_VER5.
1858 * doc/c-arm.texi: Document -meabi=5.
1859
518051dc
BE
18602006-03-10 Ben Elliston <bje@au.ibm.com>
1861
1862 * app.c (do_scrub_chars): Simplify string handling.
1863
00a97672
RS
18642006-03-07 Richard Sandiford <richard@codesourcery.com>
1865 Daniel Jacobowitz <dan@codesourcery.com>
1866 Zack Weinberg <zack@codesourcery.com>
1867 Nathan Sidwell <nathan@codesourcery.com>
1868 Paul Brook <paul@codesourcery.com>
1869 Ricardo Anguiano <anguiano@codesourcery.com>
1870 Phil Edwards <phil@codesourcery.com>
1871
1872 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1873 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1874 R_ARM_ABS12 reloc.
1875 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1876 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1877 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1878
b29757dc
BW
18792006-03-06 Bob Wilson <bob.wilson@acm.org>
1880
1881 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1882 even when using the text-section-literals option.
1883
0b2e31dc
NS
18842006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1885
1886 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1887 and cf.
1888 (m68k_ip): <case 'J'> Check we have some control regs.
1889 (md_parse_option): Allow raw arch switch.
1890 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1891 whether 68881 or cfloat was meant by -mfloat.
1892 (md_show_usage): Adjust extension display.
1893 (m68k_elf_final_processing): Adjust.
1894
df406460
NC
18952006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1896
1897 * config/tc-avr.c (avr_mod_hash_value): New function.
1898 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1899 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1900 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1901 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1902 of (int).
1903 (tc_gen_reloc): Handle substractions of symbols, if possible do
1904 fixups, abort otherwise.
1905 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1906 tc_fix_adjustable): Define.
1907
53022e4a
JW
19082006-03-02 James E Wilson <wilson@specifix.com>
1909
1910 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1911 change the template, then clear md.slot[curr].end_of_insn_group.
1912
9f6f925e
JB
19132006-02-28 Jan Beulich <jbeulich@novell.com>
1914
1915 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1916
0e31b3e1
JB
19172006-02-28 Jan Beulich <jbeulich@novell.com>
1918
1919 PR/1070
1920 * macro.c (getstring): Don't treat parentheses special anymore.
1921 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1922 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1923 characters.
1924
10cd14b4
AM
19252006-02-28 Mat <mat@csail.mit.edu>
1926
1927 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1928
63752a75
JJ
19292006-02-27 Jakub Jelinek <jakub@redhat.com>
1930
1931 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1932 field.
1933 (CFI_signal_frame): Define.
1934 (cfi_pseudo_table): Add .cfi_signal_frame.
1935 (dot_cfi): Handle CFI_signal_frame.
1936 (output_cie): Handle cie->signal_frame.
1937 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1938 different. Copy signal_frame from FDE to newly created CIE.
1939 * doc/as.texinfo: Document .cfi_signal_frame.
1940
f7d9e5c3
CD
19412006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1942
1943 * doc/Makefile.am: Add html target.
1944 * doc/Makefile.in: Regenerate.
1945 * po/Make-in: Add html target.
1946
331d2d0d
L
19472006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1948
8502d882 1949 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
1950 Instructions.
1951
8502d882 1952 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
1953 (CpuUnknownFlags): Add CpuMNI.
1954
10156f83
DM
19552006-02-24 David S. Miller <davem@sunset.davemloft.net>
1956
1957 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1958 (hpriv_reg_table): New table for hyperprivileged registers.
1959 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1960 register encoding.
1961
6772dd07
DD
19622006-02-24 DJ Delorie <dj@redhat.com>
1963
1964 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1965 (tc_gen_reloc): Don't define.
1966 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1967 (OPTION_LINKRELAX): New.
1968 (md_longopts): Add it.
1969 (m32c_relax): New.
1970 (md_parse_options): Set it.
1971 (md_assemble): Emit relaxation relocs as needed.
1972 (md_convert_frag): Emit relaxation relocs as needed.
1973 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1974 (m32c_apply_fix): New.
1975 (tc_gen_reloc): New.
1976 (m32c_force_relocation): Force out jump relocs when relaxing.
1977 (m32c_fix_adjustable): Return false if relaxing.
1978
62b3e311
PB
19792006-02-24 Paul Brook <paul@codesourcery.com>
1980
1981 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1982 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1983 (struct asm_barrier_opt): Define.
1984 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1985 (parse_psr): Accept V7M psr names.
1986 (parse_barrier): New function.
1987 (enum operand_parse_code): Add OP_oBARRIER.
1988 (parse_operands): Implement OP_oBARRIER.
1989 (do_barrier): New function.
1990 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1991 (do_t_cpsi): Add V7M restrictions.
1992 (do_t_mrs, do_t_msr): Validate V7M variants.
1993 (md_assemble): Check for NULL variants.
1994 (v7m_psrs, barrier_opt_names): New tables.
1995 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1996 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1997 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1998 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1999 (struct cpu_arch_ver_table): Define.
2000 (cpu_arch_ver): New.
2001 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2002 Tag_CPU_arch_profile.
2003 * doc/c-arm.texi: Document new cpu and arch options.
2004
59cf82fe
L
20052006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2006
2007 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2008
19a7219f
L
20092006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2010
2011 * config/tc-ia64.c: Update copyright years.
2012
7f3dfb9c
L
20132006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2014
2015 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2016 SDM 2.2.
2017
f40d1643
PB
20182005-02-22 Paul Brook <paul@codesourcery.com>
2019
2020 * config/tc-arm.c (do_pld): Remove incorrect write to
2021 inst.instruction.
2022 (encode_thumb32_addr_mode): Use correct operand.
2023
216d22bc
PB
20242006-02-21 Paul Brook <paul@codesourcery.com>
2025
2026 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2027
d70c5fc7
NC
20282006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2029 Anil Paranjape <anilp1@kpitcummins.com>
2030 Shilin Shakti <shilins@kpitcummins.com>
2031
2032 * Makefile.am: Add xc16x related entry.
2033 * Makefile.in: Regenerate.
2034 * configure.in: Added xc16x related entry.
2035 * configure: Regenerate.
2036 * config/tc-xc16x.h: New file
2037 * config/tc-xc16x.c: New file
2038 * doc/c-xc16x.texi: New file for xc16x
2039 * doc/all.texi: Entry for xc16x
2040 * doc/Makefile.texi: Added c-xc16x.texi
2041 * NEWS: Announce the support for the new target.
2042
aaa2ab3d
NH
20432006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2044
2045 * configure.tgt: set emulation for mips-*-netbsd*
2046
82de001f
JJ
20472006-02-14 Jakub Jelinek <jakub@redhat.com>
2048
2049 * config.in: Rebuilt.
2050
431ad2d0
BW
20512006-02-13 Bob Wilson <bob.wilson@acm.org>
2052
2053 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2054 from 1, not 0, in error messages.
2055 (md_assemble): Simplify special-case check for ENTRY instructions.
2056 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2057 operand in error message.
2058
94089a50
JM
20592006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2060
2061 * configure.tgt (arm-*-linux-gnueabi*): Change to
2062 arm-*-linux-*eabi*.
2063
52de4c06
NC
20642006-02-10 Nick Clifton <nickc@redhat.com>
2065
70e45ad9
NC
2066 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2067 32-bit value is propagated into the upper bits of a 64-bit long.
2068
52de4c06
NC
2069 * config/tc-arc.c (init_opcode_tables): Fix cast.
2070 (arc_extoper, md_operand): Likewise.
2071
21af2bbd
BW
20722006-02-09 David Heine <dlheine@tensilica.com>
2073
2074 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2075 each relaxation step.
2076
75a706fc
L
20772006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2078
2079 * configure.in (CHECK_DECLS): Add vsnprintf.
2080 * configure: Regenerate.
2081 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2082 include/declare here, but...
2083 * as.h: Move code detecting VARARGS idiom to the top.
2084 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2085 (vsnprintf): Declare if not already declared.
2086
0d474464
L
20872006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2088
2089 * as.c (close_output_file): New.
2090 (main): Register close_output_file with xatexit before
2091 dump_statistics. Don't call output_file_close.
2092
266abb8f
NS
20932006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2094
2095 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2096 mcf5329_control_regs): New.
2097 (not_current_architecture, selected_arch, selected_cpu): New.
2098 (m68k_archs, m68k_extensions): New.
2099 (archs): Renamed to ...
2100 (m68k_cpus): ... here. Adjust.
2101 (n_arches): Remove.
2102 (md_pseudo_table): Add arch and cpu directives.
2103 (find_cf_chip, m68k_ip): Adjust table scanning.
2104 (no_68851, no_68881): Remove.
2105 (md_assemble): Lazily initialize.
2106 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2107 (md_init_after_args): Move functionality to m68k_init_arch.
2108 (mri_chip): Adjust table scanning.
2109 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2110 options with saner parsing.
2111 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2112 m68k_init_arch): New.
2113 (s_m68k_cpu, s_m68k_arch): New.
2114 (md_show_usage): Adjust.
2115 (m68k_elf_final_processing): Set CF EF flags.
2116 * config/tc-m68k.h (m68k_init_after_args): Remove.
2117 (tc_init_after_args): Remove.
2118 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2119 (M68k-Directives): Document .arch and .cpu directives.
2120
134dcee5
AM
21212006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2122
2123 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2124 synonyms for equ and defl.
2125 (z80_cons_fix_new): New function.
2126 (emit_byte): Disallow relative jumps to absolute locations.
2127 (emit_data): Only handle defb, prototype changed, because defb is
2128 now handled as pseudo-op rather than an instruction.
2129 (instab): Entries for defb,defw,db,dw moved from here...
2130 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2131 Add entries for def24,def32,d24,d32.
2132 (md_assemble): Improved error handling.
2133 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2134 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2135 (z80_cons_fix_new): Declare.
2136 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2137 (def24,d24,def32,d32): New pseudo-ops.
2138
a9931606
PB
21392006-02-02 Paul Brook <paul@codesourcery.com>
2140
2141 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2142
ef8d22e6
PB
21432005-02-02 Paul Brook <paul@codesourcery.com>
2144
2145 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2146 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2147 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2148 T2_OPCODE_RSB): Define.
2149 (thumb32_negate_data_op): New function.
2150 (md_apply_fix): Use it.
2151
e7da6241
BW
21522006-01-31 Bob Wilson <bob.wilson@acm.org>
2153
2154 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2155 fields.
2156 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2157 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2158 subtracted symbols.
2159 (relaxation_requirements): Add pfinish_frag argument and use it to
2160 replace setting tinsn->record_fix fields.
2161 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2162 and vinsn_to_insnbuf. Remove references to record_fix and
2163 slot_sub_symbols fields.
2164 (xtensa_mark_narrow_branches): Delete unused code.
2165 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2166 a symbol.
2167 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2168 record_fix fields.
2169 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2170 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2171 of the record_fix field. Simplify error messages for unexpected
2172 symbolic operands.
2173 (set_expr_symbol_offset_diff): Delete.
2174
79134647
PB
21752006-01-31 Paul Brook <paul@codesourcery.com>
2176
2177 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2178
e74cfd16
PB
21792006-01-31 Paul Brook <paul@codesourcery.com>
2180 Richard Earnshaw <rearnsha@arm.com>
2181
2182 * config/tc-arm.c: Use arm_feature_set.
2183 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2184 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2185 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2186 New variables.
2187 (insns): Use them.
2188 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2189 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2190 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2191 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2192 feature flags.
2193 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2194 (arm_opts): Move old cpu/arch options from here...
2195 (arm_legacy_opts): ... to here.
2196 (md_parse_option): Search arm_legacy_opts.
2197 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2198 (arm_float_abis, arm_eabis): Make const.
2199
d47d412e
BW
22002006-01-25 Bob Wilson <bob.wilson@acm.org>
2201
2202 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2203
b14273fe
JZ
22042006-01-21 Jie Zhang <jie.zhang@analog.com>
2205
2206 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2207 in load immediate intruction.
2208
39cd1c76
JZ
22092006-01-21 Jie Zhang <jie.zhang@analog.com>
2210
2211 * config/bfin-parse.y (value_match): Use correct conversion
2212 specifications in template string for __FILE__ and __LINE__.
2213 (binary): Ditto.
2214 (unary): Ditto.
2215
67a4f2b7
AO
22162006-01-18 Alexandre Oliva <aoliva@redhat.com>
2217
2218 Introduce TLS descriptors for i386 and x86_64.
2219 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2220 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2221 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2222 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2223 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2224 displacement bits.
2225 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2226 (lex_got): Handle @tlsdesc and @tlscall.
2227 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2228
8ad7c533
NC
22292006-01-11 Nick Clifton <nickc@redhat.com>
2230
2231 Fixes for building on 64-bit hosts:
2232 * config/tc-avr.c (mod_index): New union to allow conversion
2233 between pointers and integers.
2234 (md_begin, avr_ldi_expression): Use it.
2235 * config/tc-i370.c (md_assemble): Add cast for argument to print
2236 statement.
2237 * config/tc-tic54x.c (subsym_substitute): Likewise.
2238 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2239 opindex field of fr_cgen structure into a pointer so that it can
2240 be stored in a frag.
2241 * config/tc-mn10300.c (md_assemble): Likewise.
2242 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2243 types.
2244 * config/tc-v850.c: Replace uses of (int) casts with correct
2245 types.
2246
4dcb3903
L
22472006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2248
2249 PR gas/2117
2250 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2251
e0f6ea40
HPN
22522006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2253
2254 PR gas/2101
2255 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2256 a local-label reference.
2257
e88d958a 2258For older changes see ChangeLog-2005
08d56133
NC
2259\f
2260Local Variables:
2261mode: change-log
2262left-margin: 8
2263fill-column: 74
2264version-control: never
2265End:
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