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18870af7
RS		 12013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
2
3 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
4
833794fc
MR		 52013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
6
7 * config/tc-mips.c (mips_set_options): Add insn32 member.
8 (mips_opts): Initialize it.
9 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
10 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
11 (md_longopts): Add "minsn32" and "mno-insn32" options.
12 (is_size_valid): Handle insn32 mode.
13 (md_assemble): Pass instruction string down to macro.
14 (brk_fmt): Add second dimension and insn32 mode initializers.
15 (mfhl_fmt): Likewise.
16 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
17 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
18 (macro_build_jalr, move_register): Handle insn32 mode.
19 (macro_build_branch_rs): Likewise.
20 (macro): Handle insn32 mode.
21 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
22 (mips_ip): Handle insn32 mode.
23 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
24 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
25 (mips_handle_align): Handle insn32 mode.
26 (md_show_usage): Add -minsn32 and -mno-insn32.
27
28 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
29 -mno-insn32 options.
30 (-minsn32, -mno-insn32): New options.
31 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
32 options.
33 (MIPS assembly options): New node. Document .set insn32 and
34 .set noinsn32.
35 (MIPS-Dependent): List the new node.
36
d1706f38
NC		 372013-06-25 Nick Clifton <nickc@redhat.com>
38
39 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
40 the PC in indirect addressing on 430xv2 parts.
41 (msp430_operands): Add version test to hardware bug encoding
42 restrictions.
43
477330fc
RM		 442013-06-24 Roland McGrath <mcgrathr@google.com>
45
d996d970
RM		 46 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
47 so it skips whitespace before it.
48 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
49
477330fc
RM		 50 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
51 (arm_reg_parse_multi): Skip whitespace first.
52 (parse_reg_list): Likewise.
53 (parse_vfp_reg_list): Likewise.
54 (s_arm_unwind_save_mmxwcg): Likewise.
55
24382199
NC		 562013-06-24 Nick Clifton <nickc@redhat.com>
57
58 PR gas/15623
59 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
60
c3678916
RS		 612013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
62
63 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
64
42429eac
RS		 652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
66
67 * config/tc-mips.c: Assert that offsetT and valueT are at least
68 8 bytes in size.
69 (GPR_SMIN, GPR_SMAX): New macros.
70 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
71
f3ded42a
RS		 722013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
73
74 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
75 conditions. Remove any code deselected by them.
76 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
77
e8044f35
RS		 782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
79
80 * NEWS: Note removal of ECOFF support.
81 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
82 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
83 (MULTI_CFILES): Remove config/e-mipsecoff.c.
84 * Makefile.in: Regenerate.
85 * configure.in: Remove MIPS ECOFF references.
86 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
87 Delete cases.
88 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
89 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
90 (mips-*-*): ...this single case.
91 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
92 MIPS emulations to be e-mipself*.
93 * configure: Regenerate.
94 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
95 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
96 (mips-*-sysv*): Remove coff and ecoff cases.
97 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
98 * ecoff.c: Remove reference to MIPS ECOFF.
99 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
100 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
101 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
102 (mips_hi_fixup): Tweak comment.
103 (append_insn): Require a howto.
104 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
105
98508b2a
RS		 1062013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
107
108 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
109 Use "CPU" instead of "cpu".
110 * doc/c-mips.texi: Likewise.
111 (MIPS Opts): Rename to MIPS Options.
112 (MIPS option stack): Rename to MIPS Option Stack.
113 (MIPS ASE instruction generation overrides): Rename to
114 MIPS ASE Instruction Generation Overrides (for now).
115 (MIPS floating-point): Rename to MIPS Floating-Point.
116
fc16f8cc
RS		 1172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
118
119 * doc/c-mips.texi (MIPS Macros): New section.
120 (MIPS Object): Replace with...
121 (MIPS Small Data): ...this new section.
122
5a7560b5
RS		 1232013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
126 Capitalize name. Use @kindex instead of @cindex for .set entries.
127
a1b86ab7
RS		 1282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
129
130 * doc/c-mips.texi (MIPS Stabs): Remove section.
131
c6278170
RS		 1322013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
133
134 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
135 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
136 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
137 (ISA_SUPPORTS_VIRT64_ASE): Delete.
138 (mips_ase): New structure.
139 (mips_ases): New table.
140 (FP64_ASES): New macro.
141 (mips_ase_groups): New array.
142 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
143 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
144 functions.
145 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
146 (md_parse_option): Use mips_ases and mips_set_ase instead of
147 separate case statements for each ASE option.
148 (mips_after_parse_args): Use FP64_ASES. Use
149 mips_check_isa_supports_ases to check the ASEs against
150 other options.
151 (s_mipsset): Use mips_ases and mips_set_ase instead of
152 separate if statements for each ASE option. Use
153 mips_check_isa_supports_ases, even when a non-ASE option
154 is specified.
155
63a4bc21
KT		 1562013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
157
158 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
159
c31f3936
RS		 1602013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
161
162 * config/tc-mips.c (md_shortopts, options, md_longopts)
163 (md_longopts_size): Move earlier in file.
164
846ef2d0
RS		 1652013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
166
167 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
168 with a single "ase" bitmask.
169 (mips_opts): Update accordingly.
170 (file_ase, file_ase_explicit): New variables.
171 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
172 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
173 (ISA_HAS_ROR): Adjust for mips_set_options change.
174 (is_opcode_valid): Take the base ase mask directly from mips_opts.
175 (mips_ip): Adjust for mips_set_options change.
176 (md_parse_option): Likewise. Update file_ase_explicit.
177 (mips_after_parse_args): Adjust for mips_set_options change.
178 Use bitmask operations to select the default ASEs. Set file_ase
179 rather than individual per-ASE variables.
180 (s_mipsset): Adjust for mips_set_options change.
181 (mips_elf_final_processing): Test file_ase rather than
182 file_ase_mdmx. Remove commented-out code.
183
d16afab6
RS		 1842013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
185
186 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
187 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
188 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
189 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
190 (mips_after_parse_args): Use the new "ase" field to choose
191 the default ASEs.
192 (mips_cpu_info_table): Move ASEs from the "flags" field to the
193 "ase" field.
194
e83a675f
RE		 1952013-06-18 Richard Earnshaw <rearnsha@arm.com>
196
197 * config/tc-arm.c (symbol_preemptible): New function.
198 (relax_branch): Use it.
199
7f3c4072
CM		 2002013-06-17 Catherine Moore <clm@codesourcery.com>
201 Maciej W. Rozycki <macro@codesourcery.com>
202 Chao-Ying Fu <fu@mips.com>
203
204 * config/tc-mips.c (mips_set_options): Add ase_eva.
205 (mips_set_options mips_opts): Add ase_eva.
206 (file_ase_eva): Declare.
207 (ISA_SUPPORTS_EVA_ASE): Define.
208 (IS_SEXT_9BIT_NUM): Define.
209 (MIPS_CPU_ASE_EVA): Define.
210 (is_opcode_valid): Add support for ase_eva.
211 (macro_build): Likewise.
212 (macro): Likewise.
213 (validate_mips_insn): Likewise.
214 (validate_micromips_insn): Likewise.
215 (mips_ip): Likewise.
216 (options): Add OPTION_EVA and OPTION_NO_EVA.
217 (md_longopts): Add -meva and -mno-eva.
218 (md_parse_option): Process new options.
219 (mips_after_parse_args): Check for valid EVA combinations.
220 (s_mipsset): Likewise.
221
e410add4
RS		 2222013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
223
224 * dwarf2dbg.h (dwarf2_move_insn): Declare.
225 * dwarf2dbg.c (line_subseg): Add pmove_tail.
226 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
227 (dwarf2_gen_line_info_1): Update call accordingly.
228 (dwarf2_move_insn): New function.
229 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
230
6a50d470
RS		 2312013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
232
233 Revert:
234
235 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
236
237 PR gas/13024
238 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
239 (dwarf2_gen_line_info_1): Delete.
240 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
241 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
242 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
243 (dwarf2_directive_loc): Push previous .locs instead of generating
244 them immediately.
245
f122319e
CF		 2462013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
247
248 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
249 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
250
909c7f9c
NC		 2512013-06-13 Nick Clifton <nickc@redhat.com>
252
253 PR gas/15602
254 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
255 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
256 function. Generates an error if the adjusted offset is out of a
257 16-bit range.
258
5d5755a7
SL		 2592013-06-12 Sandra Loosemore <sandra@codesourcery.com>
260
261 * config/tc-nios2.c (md_apply_fix): Mask constant
262 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
263
3bf0dbfb
MR		 2642013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
265
266 * config/tc-mips.c (append_insn): Don't do branch relaxation for
267 MIPS-3D instructions either.
268 (md_convert_frag): Update the COPx branch mask accordingly.
269
270 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
271 option.
272 * doc/as.texinfo (Overview): Add --relax-branch and
273 --no-relax-branch.
274 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
275 --no-relax-branch.
276
9daf7bab
SL		 2772013-06-09 Sandra Loosemore <sandra@codesourcery.com>
278
279 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
280 omitted.
281
d301a56b
RS		 2822013-06-08 Catherine Moore <clm@codesourcery.com>
283
284 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
285 (is_opcode_valid_16): Pass ase value to opcode_is_member.
286 (append_insn): Change INSN_xxxx to ASE_xxxx.
287
7bab7634
DC		 2882013-06-01 George Thomas <george.thomas@atmel.com>
289
290 * gas/config/tc-avr.c: Change ISA for devices with USB support to
291 AVR_ISA_XMEGAU
292
f60cf82f
L		 2932013-05-31 H.J. Lu <hongjiu.lu@intel.com>
294
295 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
296 for ELF.
297
a3f278e2
CM		 2982013-05-31 Paul Brook <paul@codesourcery.com>
299
300 gas/
301 * config/tc-mips.c (s_ehword): New.
302
067ec077
CM		 3032013-05-30 Paul Brook <paul@codesourcery.com>
304
305 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
306
d6101ac2
MR		 3072013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
308
309 * write.c (resolve_reloc_expr_symbols): On REL targets don't
310 convert relocs who have no relocatable field either. Rephrase
311 the conditional so that the PC-relative check is only applied
312 for REL targets.
313
f19ccbda
MR		 3142013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
315
316 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
317 calculation.
318
418009c2
YZ		 3192013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
320
321 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 322 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 323 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
324 (md_apply_fix): Likewise.
325 (aarch64_force_relocation): Likewise.
326
0a8897c7
KT		 3272013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
328
329 * config/tc-arm.c (it_fsm_post_encode): Improve
330 warning messages about deprecated IT block formats.
331
89d2a2a3
MS		 3322013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
333
334 * config/tc-aarch64.c (md_apply_fix): Move value range checking
335 inside fx_done condition.
336
c77c0862
RS		 3372013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
338
339 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
340
c0637f3a
PB		 3412013-05-20 Peter Bergner <bergner@vnet.ibm.com>
342
343 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
344 and clean up warning when using PRINT_OPCODE_TABLE.
345
5656a981
AM		 3462013-05-20 Alan Modra <amodra@gmail.com>
347
348 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
349 and data fixups performing shift/high adjust/sign extension on
350 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
351 when writing data fixups rather than recalculating size.
352
997b26e8
JBG		 3532013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
354
355 * doc/c-msp430.texi: Fix typo.
356
9f6e76f4
TG		 3572013-05-16 Tristan Gingold <gingold@adacore.com>
358
359 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
360 are also TOC symbols.
361
638d3803
NC		 3622013-05-16 Nick Clifton <nickc@redhat.com>
363
364 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
365 Add -mcpu command to specify core type.
997b26e8 366 * doc/c-msp430.texi: Update documentation.
638d3803 367
b015e599
AP		 3682013-05-09 Andrew Pinski <apinski@cavium.com>
369
370 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
371 (mips_opts): Update for the new field.
372 (file_ase_virt): New variable.
373 (ISA_SUPPORTS_VIRT_ASE): New macro.
374 (ISA_SUPPORTS_VIRT64_ASE): New macro.
375 (MIPS_CPU_ASE_VIRT): New define.
376 (is_opcode_valid): Handle ase_virt.
377 (macro_build): Handle "+J".
378 (validate_mips_insn): Likewise.
379 (mips_ip): Likewise.
380 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
381 (md_longopts): Add mvirt and mnovirt
382 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
383 (mips_after_parse_args): Handle ase_virt field.
384 (s_mipsset): Handle "virt" and "novirt".
385 (mips_elf_final_processing): Add a comment about virt ASE might need
386 a new flag.
387 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
388 * doc/c-mips.texi: Document -mvirt and -mno-virt.
389 Document ".set virt" and ".set novirt".
390
da8094d7
AM		 3912013-05-09 Alan Modra <amodra@gmail.com>
392
393 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
394 control of operand flag bits.
395
c5f8c205
AM		 3962013-05-07 Alan Modra <amodra@gmail.com>
397
398 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
399 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
400 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
401 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
402 (md_apply_fix): Set fx_no_overflow for assorted relocations.
403 Shift and sign-extend fieldval for use by some VLE reloc
404 operand->insert functions.
405
b47468a6
CM		 4062013-05-06 Paul Brook <paul@codesourcery.com>
407 Catherine Moore <clm@codesourcery.com>
408
c5f8c205
AM		 409 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
410 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 411 (md_apply_fix): Likewise.
412 (tc_gen_reloc): Likewise.
413
2de39019
CM		 4142013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
415
416 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
417 (mips_fix_adjustable): Adjust pc-relative check to use
418 limited_pc_reloc_p.
419
754e2bb9
RS		 4202013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
421
422 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
423 (s_mips_stab): Do not restrict to stabn only.
424
13761a11
NC		 4252013-05-02 Nick Clifton <nickc@redhat.com>
426
427 * config/tc-msp430.c: Add support for the MSP430X architecture.
428 Add code to insert a NOP instruction after any instruction that
429 might change the interrupt state.
430 Add support for the LARGE memory model.
431 Add code to initialise the .MSP430.attributes section.
432 * config/tc-msp430.h: Add support for the MSP430X architecture.
433 * doc/c-msp430.texi: Document the new -mL and -mN command line
434 options.
435 * NEWS: Mention support for the MSP430X architecture.
436
df26367c
MR		 4372013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
438
439 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
440 alpha*-*-linux*ecoff*.
441
f02d8318
CF		 4422013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
443
444 * config/tc-mips.c (mips_ip): Add sizelo.
445 For "+C", "+G", and "+H", set sizelo and compare against it.
446
b40bf0a2
NC		 4472013-04-29 Nick Clifton <nickc@redhat.com>
448
449 * as.c (Options): Add -gdwarf-sections.
450 (parse_args): Likewise.
451 * as.h (flag_dwarf_sections): Declare.
452 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
453 (process_entries): When -gdwarf-sections is enabled generate
454 fragmentary .debug_line sections.
455 (out_debug_line): Set the section for the .debug_line section end
456 symbol.
457 * doc/as.texinfo: Document -gdwarf-sections.
458 * NEWS: Mention -gdwarf-sections.
459
8eeccb77 4602013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 461
462 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
463 according to the target parameter. Don't call s_segm since s_segm
464 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
465 initialized yet.
466 (md_begin): Call s_segm according to target parameter from command
467 line.
468
49926cd0
AM		 4692013-04-25 Alan Modra <amodra@gmail.com>
470
471 * configure.in: Allow little-endian linux.
472 * configure: Regenerate.
473
e3031850
SL		 4742013-04-24 Sandra Loosemore <sandra@codesourcery.com>
475
476 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
477 "fstatus" control register to "eccinj".
478
cb948fc0
KT		 4792013-04-19 Kai Tietz <ktietz@redhat.com>
480
481 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
482
4455e9ad
JB		 4832013-04-15 Julian Brown <julian@codesourcery.com>
484
485 * expr.c (add_to_result, subtract_from_result): Make global.
486 * expr.h (add_to_result, subtract_from_result): Add prototypes.
487 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
488 subtract_from_result to handle extra bit of precision for .sleb128
489 directive operands.
490
956a6ba3
JB		 4912013-04-10 Julian Brown <julian@codesourcery.com>
492
493 * read.c (convert_to_bignum): Add sign parameter. Use it
494 instead of X_unsigned to determine sign of resulting bignum.
495 (emit_expr): Pass extra argument to convert_to_bignum.
496 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
497 X_extrabit to convert_to_bignum.
498 (parse_bitfield_cons): Set X_extrabit.
499 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
500 Initialise X_extrabit field as appropriate.
501 (add_to_result): New.
502 (subtract_from_result): New.
503 (expr): Use above.
504 * expr.h (expressionS): Add X_extrabit field.
505
eb9f3f00
JB		 5062013-04-10 Jan Beulich <jbeulich@suse.com>
507
508 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
509 register being PC when is_t or writeback, and use distinct
510 diagnostic for the latter case.
511
ccb84d65
JB		 5122013-04-10 Jan Beulich <jbeulich@suse.com>
513
514 * gas/config/tc-arm.c (parse_operands): Re-write
515 po_barrier_or_imm().
516 (do_barrier): Remove bogus constraint().
517 (do_t_barrier): Remove.
518
4d13caa0
NC		 5192013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
520
521 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
522 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
523 ATmega2564RFR2
524 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
525
16d02dc9
JB		 5262013-04-09 Jan Beulich <jbeulich@suse.com>
527
528 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
529 Use local variable Rt in more places.
530 (do_vmsr): Accept all control registers.
531
05ac0ffb
JB		 5322013-04-09 Jan Beulich <jbeulich@suse.com>
533
534 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
535 if there was none specified for moves between scalar and core
536 register.
537
2d51fb74
JB		 5382013-04-09 Jan Beulich <jbeulich@suse.com>
539
540 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
541 NEON_ALL_LANES case.
542
94dcf8bf
JB		 5432013-04-08 Jan Beulich <jbeulich@suse.com>
544
545 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
546 PC-relative VSTR.
547
1472d06f
JB		 5482013-04-08 Jan Beulich <jbeulich@suse.com>
549
550 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
551 entry to sp_fiq.
552
0c76cae8
AM		 5532013-04-03 Alan Modra <amodra@gmail.com>
554
555 * doc/as.texinfo: Add support to generate man options for h8300.
556 * doc/c-h8300.texi: Likewise.
557
92eb40d9
RR		 5582013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
559
560 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
561 Cortex-A57.
562
51dcdd4d
NC		 5632013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
564
565 PR binutils/15068
566 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
567
c5d685bf
NC		 5682013-03-26 Nick Clifton <nickc@redhat.com>
569
9b978282
NC		 570 PR gas/15295
571 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
572 start of the file each time.
573
c5d685bf
NC		 574 PR gas/15178
575 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
576 FreeBSD targets.
577
9699c833
TG		 5782013-03-26 Douglas B Rupp <rupp@gnat.com>
579
580 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
581 after fixup.
582
4755303e
WN		 5832013-03-21 Will Newton <will.newton@linaro.org>
584
585 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
586 pc-relative str instructions in Thumb mode.
587
81f5558e
NC		 5882013-03-21 Michael Schewe <michael.schewe@gmx.net>
589
590 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
591 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
592 R_H8_DISP32A16.
593 * config/tc-h8300.h: Remove duplicated defines.
594
71863e73
NC		 5952013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
596
597 PR gas/15282
598 * tc-avr.c (mcu_has_3_byte_pc): New function.
599 (tc_cfi_frame_initial_instructions): Call it to find return
600 address size.
601
795b8e6b
NC		 6022013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
603
604 PR gas/15095
605 * config/tc-tic6x.c (tic6x_try_encode): Handle
606 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
607 encode register pair numbers when required.
608
ba86b375
WN		 6092013-03-15 Will Newton <will.newton@linaro.org>
610
611 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
612 in vstr in Thumb mode for pre-ARMv7 cores.
613
9e6f3811
AS		 6142013-03-14 Andreas Schwab <schwab@suse.de>
615
616 * doc/c-arc.texi (ARC Directives): Revert last change and use
617 @itemize instead of @table.
618 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
619
b10bf8c5
NC		 6202013-03-14 Nick Clifton <nickc@redhat.com>
621
622 PR gas/15273
623 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
624 NULL message, instead just check ARM_CPU_IS_ANY directly.
625
ba724cfc
NC		 6262013-03-14 Nick Clifton <nickc@redhat.com>
627
628 PR gas/15212
9e6f3811 629 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 630 for table format.
631 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
632 to the @item directives.
633 (ARM-Neon-Alignment): Move to correct place in the document.
634 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
635 formatting.
636 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
637 @smallexample.
638
531a94fd
SL		 6392013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
640
641 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
642 case. Add default BAD_CASE to switch.
643
dad60f8e
SL		 6442013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
645
646 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
647 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
648
dd5181d5
KT		 6492013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
650
651 * config/tc-arm.c (crc_ext_armv8): New feature set.
652 (UNPRED_REG): New macro.
653 (do_crc32_1): New function.
654 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
655 do_crc32ch, do_crc32cw): Likewise.
656 (TUEc): New macro.
657 (insns): Add entries for crc32 mnemonics.
658 (arm_extensions): Add entry for crc.
659
8e723a10
CLT		 6602013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
661
662 * write.h (struct fix): Add fx_dot_frag field.
663 (dot_frag): Declare.
664 * write.c (dot_frag): New variable.
665 (fix_new_internal): Set fx_dot_frag field with dot_frag.
666 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
667 * expr.c (expr): Save value of frag_now in dot_frag when setting
668 dot_value.
669 * read.c (emit_expr): Likewise. Delete comments.
670
be05d201
L		 6712013-03-07 H.J. Lu <hongjiu.lu@intel.com>
672
673 * config/tc-i386.c (flag_code_names): Removed.
674 (i386_index_check): Rewrote.
675
62b0d0d5
YZ		 6762013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
677
678 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
679 add comment.
680 (aarch64_double_precision_fmovable): New function.
681 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
682 function; handle hexadecimal representation of IEEE754 encoding.
683 (parse_operands): Update the call to parse_aarch64_imm_float.
684
165de32a
L		 6852013-02-28 H.J. Lu <hongjiu.lu@intel.com>
686
687 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
688 (check_hle): Updated.
689 (md_assemble): Likewise.
690 (parse_insn): Likewise.
691
d5de92cf
L		 6922013-02-28 H.J. Lu <hongjiu.lu@intel.com>
693
694 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 695 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 696 (parse_insn): Remove expecting_string_instruction. Set
697 i.rep_prefix.
698
e60bb1dd
YZ		 6992013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
700
701 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
702
aeebdd9b
YZ		 7032013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
704
705 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
706 for system registers.
707
4107ae22
DD		 7082013-02-27 DJ Delorie <dj@redhat.com>
709
710 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
711 (rl78_op): Handle %code().
712 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
713 (tc_gen_reloc): Likwise; convert to a computed reloc.
714 (md_apply_fix): Likewise.
715
151fa98f
NC		 7162013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
717
718 * config/rl78-parse.y: Fix encoding of DIVWU insn.
719
70a8bc5b 7202013-02-25 Terry Guo <terry.guo@arm.com>
721
722 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
723 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
724 list of accepted CPUs.
725
5c111e37
L		 7262013-02-19 H.J. Lu <hongjiu.lu@intel.com>
727
728 PR gas/15159
729 * config/tc-i386.c (cpu_arch): Add ".smap".
730
731 * doc/c-i386.texi: Document smap.
732
8a75745d
MR		 7332013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
734
735 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
736 mips_assembling_insn appropriately.
737 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
738
79850f26
MR		 7392013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
740
cf29fc61 741 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 742 extraneous braces.
743
4c261dff
NC		 7442013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
745
5c111e37 746 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 747
ea33f281
NC		 7482013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
749
750 * configure.tgt: Add nios2-*-rtems*.
751
a1ccaec9
YZ		 7522013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
753
754 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
755 NULL.
756
0aa27725
RS		 7572013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
758
759 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
760 (macro): Use it. Assert that trunc.w.s is not used for r5900.
761
da4339ed
NC		 7622013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
763
764 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
765 core.
766
36591ba1 7672013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 768 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 769
770 Based on patches from Altera Corporation.
771
772 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
773 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
774 * Makefile.in: Regenerated.
775 * configure.tgt: Add case for nios2*-linux*.
776 * config/obj-elf.c: Conditionally include elf/nios2.h.
777 * config/tc-nios2.c: New file.
778 * config/tc-nios2.h: New file.
779 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
780 * doc/Makefile.in: Regenerated.
781 * doc/all.texi: Set NIOSII.
782 * doc/as.texinfo (Overview): Add Nios II options.
783 (Machine Dependencies): Include c-nios2.texi.
784 * doc/c-nios2.texi: New file.
785 * NEWS: Note Altera Nios II support.
786
94d4433a
AM		 7872013-02-06 Alan Modra <amodra@gmail.com>
788
789 PR gas/14255
790 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
791 Don't skip fixups with fx_subsy non-NULL.
792 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
793 with fx_subsy non-NULL.
794
ace9af6f
L		 7952013-02-04 H.J. Lu <hongjiu.lu@intel.com>
796
797 * doc/c-metag.texi: Add "@c man" markers.
798
89d67ed9
AM		 7992013-02-04 Alan Modra <amodra@gmail.com>
800
801 * write.c (fixup_segment): Return void. Delete seg_reloc_count
802 related code.
803 (TC_ADJUST_RELOC_COUNT): Delete.
804 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
805
89072bd6
AM		 8062013-02-04 Alan Modra <amodra@gmail.com>
807
808 * po/POTFILES.in: Regenerate.
809
f9b2d544
NC		 8102013-01-30 Markos Chandras <markos.chandras@imgtec.com>
811
812 * config/tc-metag.c: Make SWAP instruction less permissive with
813 its operands.
814
392ca752
DD		 8152013-01-29 DJ Delorie <dj@redhat.com>
816
817 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
818 relocs in .word/.etc statements.
819
427d0db6
RM		 8202013-01-29 Roland McGrath <mcgrathr@google.com>
821
822 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
823 immediate value for 8-bit offset" error so it shows line info.
824
4faf939a
JM		 8252013-01-24 Joseph Myers <joseph@codesourcery.com>
826
827 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
828 for 64-bit output.
829
78c8d46c
NC		 8302013-01-24 Nick Clifton <nickc@redhat.com>
831
832 * config/tc-v850.c: Add support for e3v5 architecture.
833 * doc/c-v850.texi: Mention new support.
834
fb5b7503
NC		 8352013-01-23 Nick Clifton <nickc@redhat.com>
836
837 PR gas/15039
838 * config/tc-avr.c: Include dwarf2dbg.h.
839
8ce3d284
L		 8402013-01-18 H.J. Lu <hongjiu.lu@intel.com>
841
842 * config/tc-i386.c (reloc): Support size relocation only for ELF.
843 (tc_i386_fix_adjustable): Likewise.
844 (lex_got): Likewise.
845 (tc_gen_reloc): Likewise.
846
f5555712
YZ		 8472013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
848
849 * config/tc-aarch64.c (output_operand_error_record): Change to output
850 the out-of-range error message as value-expected message if there is
851 only one single value in the expected range.
852 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
853 LSL #0 as a programmer-friendly feature.
854
8fd4256d
L		 8552013-01-16 H.J. Lu <hongjiu.lu@intel.com>
856
857 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
858 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
859 BFD_RELOC_64_SIZE relocations.
860 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
861 for it.
862 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
863 relocations against local symbols.
864
a5840dce
AM		 8652013-01-16 Alan Modra <amodra@gmail.com>
866
867 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
868 finding some sort of toc syntax error, and break to avoid
869 compiler uninit warning.
870
af89796a
L		 8712013-01-15 H.J. Lu <hongjiu.lu@intel.com>
872
873 PR gas/15019
874 * config/tc-i386.c (lex_got): Increment length by 1 if the
875 relocation token is removed.
876
dd42f060
NC		 8772013-01-15 Nick Clifton <nickc@redhat.com>
878
879 * config/tc-v850.c (md_assemble): Allow signed values for
880 V850E_IMMEDIATE.
881
464e3686
SK		 8822013-01-11 Sean Keys <skeys@ipdatasys.com>
883
884 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 885 git to cvs.
464e3686 886
5817ffd1
PB		 8872013-01-10 Peter Bergner <bergner@vnet.ibm.com>
888
889 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
890 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
891 * config/tc-ppc.c (md_show_usage): Likewise.
892 (ppc_handle_align): Handle power8's group ending nop.
893
f4b1f6a9
SK		 8942013-01-10 Sean Keys <skeys@ipdatasys.com>
895
896 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 897 that the assember exits after the opcodes have been printed.
f4b1f6a9 898
34bca508
L		 8992013-01-10 H.J. Lu <hongjiu.lu@intel.com>
900
901 * app.c: Remove trailing white spaces.
902 * as.c: Likewise.
903 * as.h: Likewise.
904 * cond.c: Likewise.
905 * dw2gencfi.c: Likewise.
906 * dwarf2dbg.h: Likewise.
907 * ecoff.c: Likewise.
908 * input-file.c: Likewise.
909 * itbl-lex.h: Likewise.
910 * output-file.c: Likewise.
911 * read.c: Likewise.
912 * sb.c: Likewise.
913 * subsegs.c: Likewise.
914 * symbols.c: Likewise.
915 * write.c: Likewise.
916 * config/tc-i386.c: Likewise.
917 * doc/Makefile.am: Likewise.
918 * doc/Makefile.in: Likewise.
919 * doc/c-aarch64.texi: Likewise.
920 * doc/c-alpha.texi: Likewise.
921 * doc/c-arc.texi: Likewise.
922 * doc/c-arm.texi: Likewise.
923 * doc/c-avr.texi: Likewise.
924 * doc/c-bfin.texi: Likewise.
925 * doc/c-cr16.texi: Likewise.
926 * doc/c-d10v.texi: Likewise.
927 * doc/c-d30v.texi: Likewise.
928 * doc/c-h8300.texi: Likewise.
929 * doc/c-hppa.texi: Likewise.
930 * doc/c-i370.texi: Likewise.
931 * doc/c-i386.texi: Likewise.
932 * doc/c-i860.texi: Likewise.
933 * doc/c-m32c.texi: Likewise.
934 * doc/c-m32r.texi: Likewise.
935 * doc/c-m68hc11.texi: Likewise.
936 * doc/c-m68k.texi: Likewise.
937 * doc/c-microblaze.texi: Likewise.
938 * doc/c-mips.texi: Likewise.
939 * doc/c-msp430.texi: Likewise.
940 * doc/c-mt.texi: Likewise.
941 * doc/c-s390.texi: Likewise.
942 * doc/c-score.texi: Likewise.
943 * doc/c-sh.texi: Likewise.
944 * doc/c-sh64.texi: Likewise.
945 * doc/c-tic54x.texi: Likewise.
946 * doc/c-tic6x.texi: Likewise.
947 * doc/c-v850.texi: Likewise.
948 * doc/c-xc16x.texi: Likewise.
949 * doc/c-xgate.texi: Likewise.
950 * doc/c-xtensa.texi: Likewise.
951 * doc/c-z80.texi: Likewise.
952 * doc/internals.texi: Likewise.
953
4c665b71
RM		 9542013-01-10 Roland McGrath <mcgrathr@google.com>
955
956 * hash.c (hash_new_sized): Make it global.
957 * hash.h: Declare it.
958 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
959 pass a small size.
960
a3c62988
NC		 9612013-01-10 Will Newton <will.newton@imgtec.com>
962
963 * Makefile.am: Add Meta.
964 * Makefile.in: Regenerate.
965 * config/tc-metag.c: New file.
966 * config/tc-metag.h: New file.
967 * configure.tgt: Add Meta.
968 * doc/Makefile.am: Add Meta.
969 * doc/Makefile.in: Regenerate.
970 * doc/all.texi: Add Meta.
971 * doc/as.texiinfo: Document Meta options.
972 * doc/c-metag.texi: New file.
973
b37df7c4
SE		 9742013-01-09 Steve Ellcey <sellcey@mips.com>
975
976 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
977 calls.
978 * config/tc-mips.c (internalError): Remove, replace with abort.
979
a3251895
YZ		 9802013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
981
982 * config/tc-aarch64.c (parse_operands): Change to compare the result
983 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
984
8ab8155f
NC		 9852013-01-07 Nick Clifton <nickc@redhat.com>
986
987 PR gas/14887
988 * config/tc-arm.c (skip_past_char): Skip whitespace before the
989 anticipated character.
990 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
991 here as it is no longer needed.
992
a4ac1c42
AS		 9932013-01-06 Andreas Schwab <schwab@linux-m68k.org>
994
995 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
996 * doc/c-score.texi (SCORE-Opts): Likewise.
997 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
998
e407c74b
NC		 9992013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1000
1001 * config/tc-mips.c: Add support for MIPS r5900.
1002 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1003 lq and sq.
1004 (can_swap_branch_p, get_append_method): Detect some conditional
1005 short loops to fix a bug on the r5900 by NOP in the branch delay
1006 slot.
1007 (M_MUL): Support 3 operands in multu on r5900.
1008 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1009 (s_mipsset): Force 32 bit floating point on r5900.
1010 (mips_ip): Check parameter range of instructions mfps and mtps on
1011 r5900.
1012 * configure.in: Detect CPU type when target string contains r5900
1013 (e.g. mips64r5900el-linux-gnu).
1014
62658407
L		 10152013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1016
1017 * as.c (parse_args): Update copyright year to 2013.
1018
95830fd1
YZ		 10192013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1020
1021 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1022 and "cortex57".
1023
517bb291 10242013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1025
517bb291
NC		 1026 PR gas/14987
1027 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1028 closing bracket.
d709e4e6 1029
517bb291 1030For older changes see ChangeLog-2012
08d56133 1031\f
517bb291 1032Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1033
1034Copying and distribution of this file, with or without modification,
1035are permitted in any medium without royalty provided the copyright
1036notice and this notice are preserved.
1037
08d56133
NC		 1038Local Variables:
1039mode: change-log
1040left-margin: 8
1041fill-column: 74
1042version-control: never
1043End:
GDB Binutils - Deliverables
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