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[deliverable/binutils-gdb.git] / gas / ChangeLog
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1b6e95c2
BW
12008-04-04 Adrian Bunk <bunk@stusta.de>
2 Bob Wilson <bob.wilson@acm.org>
3
4 * config/tc-xtensa.c (xg_apply_fix_value): Check return code from
5 call to decode_reloc.
6
594ab6a3
L
72008-04-04 H.J. Lu <hongjiu.lu@intel.com>
8
9 * NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
10
11 * config/tc-i386.c (cpu_arch): Add .pclmul.
12 (md_show_usage): Replace clmul with pclmul.
13 * doc/c-i386.texi: Likewise.
14
c0f3af97
L
152008-04-03 H.J. Lu <hongjiu.lu@intel.com>
16
17 * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
18
19 * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
20 Document -msse2avx, .avx, .aes, .clmul and .fma.
21
22 * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
23 (vex_prefix): Likewise.
24 (sse2avx): Likewise.
25 (CPU_FLAGS_ARCH_MATCH): Likewise.
26 (CPU_FLAGS_64BIT_MATCH): Likewise.
27 (CPU_FLAGS_32BIT_MATCH): Likewise.
28 (CPU_FLAGS_PERFECT_MATCH): Likewise.
29 (regymm): Likewise.
30 (vex_imm4): Likewise.
31 (fits_in_imm4): Likewise.
32 (build_vex_prefix): Likewise.
33 (VEX_check_operands): Likewise.
34 (bad_implicit_operand): Likewise.
35 (OPTION_MSSE2AVX): Likewise.
36 (T_YMMWORD): Likewise.
37 (_i386_insn): Add vex.
38 (cpu_arch): Add .avx, .aes, .clmul and .fma.
39 (cpu_flags_match): Changed to take a pointer to const template.
40 Enable encoding SSE instructions with VEX prefix for -msse2avx.
41 (match_mem_size): Also check ymmword.
42 (operand_type_match): Clear ymmword.
43 (md_begin): Allow '_' in mnemonic.
44 (type_names): Add OPERAND_TYPE_VEX_IMM4.
45 (process_immext): Update assert.
46 (md_assemble): Don't call process_immext if sse2avx and immext
47 are true. Call build_vex_prefix if vex is true.
48 (parse_insn): Updated for cpu_flags_match.
49 (swap_operands): Handle 5 operands.
50 (match_template): Handle 5 operands. Updated for cpu_flags_match.
51 Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
52 (process_suffix): Handle YMMWORD_MNEM_SUFFIX.
53 (check_byte_reg): Check regymm.
54 (process_operands): Duplicate the destination register for
55 -msse2avx if needed.
56 (build_modrm_byte): Updated for instructions with VEX encoding.
57 (output_insn): Output VEX prefix if needed.
58 (md_longopts): Add msse2avx.
59 (md_parse_option): Handle OPTION_MSSE2AVX.
60 (md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
61 (intel_e09): Support YMMWORD.
62 (intel_e11): Likewise.
63 (intel_get_token): Likewise.
64
2460c166
EW
652008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
66
67 * config/tc-avr.c (mcu_types): Add attiny167.
68 * doc/c-avr.texi: Likewise.
69
70881657
EW
702008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
71
72 * config/tc-avr.c (mcu_types): Add atmega32u4.
73 * doc/c-avr.texi: Likewise.
74
25755480
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752008-03-28 Eric B. Weddington <eric.weddington@atmel.com>
76
77 * config/tc-avr.c (mcu_types): Add atmega32c1.
78 * doc/c-avr.texi: Likewise.
79
4641781c
PB
802008-03-28 Paul Brook <paul@codesourcery.com>
81
82 * config/tc-arm.c (parse_neon_mov): Parse register before immediate
83 to avoid spurious symbols.
84
025987ea
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852008-03-28 Nathan Sidwell <nathan@codesourcery.com>
86
87 * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
88 as_bad_where.
89
38de72b9
NC
902008-03-27 Eric B. Weddington <eric.weddington@atmel.com>
91
92 * config/tc-avr.c (mcu_types): Add atmega32m1.
93 * doc/c-avr.texi: Likewise.
94
35997600
NC
952008-03-27 Ineiev <ineiev@yahoo.co.uk>
96
97 * config/tc-arm.c (do_neon_cvt): Move variable declarations to
98 start of block.
99 (do_neon_ext): Fix sign of comparison.
100
99bfa74a
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1012008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
102
103 From Jie Zhang <jie.zhang@analog.com>
104 * config/bfin-parse.y (asm_1): Check AREGS in comparison
c1db045b 105 instructions. And call yyerror when comparing PREG with
99bfa74a 106 DREG.
c1db045b 107 (check_macfunc_option): New.
4641781c 108 (check_macfuncs): Check option by calling check_macfunc_option.
c1db045b
BS
109 Fix comparison always true warnings. Both scalar instructions
110 of vector instruction must share the same mode option. Only allow
111 option mode at the end of the second instruction of the vector.
4641781c 112 (asm_1): Check option by calling check_macfunc_option.
99bfa74a 113
ee171c8f
BS
114 * config/bfin-parse.y (check_macfunc_option): Allow (IU)
115 option for multiply and multiply-accumulate to data register
4641781c 116 instruction.
ee171c8f
BS
117 (check_macfuncs): Don't check if accumulator matches the data register
118 here.
119 (assign_macfunc): Check if accumulator matches the
120 data register in each rule that moves to the data
121 register.
122
e2c038d3
BS
123 * config/tc-bfin.c (bfin_start_line_hook): Localize the labels
124 generated for LOOP_BEGIN and LOOP_END instructions.
125 (bfin_gen_loop): Likewise.
126
5746fb46
AK
1272008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
128
129 * config/tc-s390.c (md_parse_option): z10 option added.
130
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1312008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
132
133 * aclocal.m4: Regenerate.
134 * configure: Likewise.
135 * Makefile.in: Likewise.
136 * doc/Makefile.in: Likewise.
137
da6b876e
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1382008-03-17 Adrian Bunk <bunk@stusta.de>
139
140 PR 5946
141 * config/tc-hppa.c (is_same_frag): Delete.
142
3b492825
BW
1432008-03-14 Sterling Augustine <sterling@tensilica.com>
144
145 * config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
146 RELAX_LOOP_END_ADD_NOP.
147
5808f4a6
NC
1482008-03-13 Evandro Menezes <evandro@yahoo.com>
149
150 PR gas/5895
151 * read.c (s_mexit): Warn if attempting to exit a macro when not
152 inside a macro definition.
153
50e7d84b
AM
1542008-03-13 Alan Modra <amodra@bigpond.net.au>
155
156 * Makefile.am: Run "make dep-am".
157 * Makefile.in: Regenerate.
158 * configure: Regenerate.
159
15290f0a
PB
1602008-03-09 Paul Brook <paul@codesourcery.com>
161
162 * config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
163 * doc/c-arm.texi: Add cortex-a9.
164
b1cc4aeb
PB
1652008-03-09 Paul Brook <paul@codesourcery.com>
166
167 * config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
168 (parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
169 (arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
170 (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
171 * doc/c-arm.texi: Document new ARM FPU variants.
172
39623e12
PB
1732008-03-07 Paul Brook <paul@codesourcery.com>
174
175 * config/tc-arm.c (md_apply_fix): Use correct offset range.
176
d815f1a9
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1772008-03-07 Alan Modra <amodra@bigpond.net.au>
178
179 * config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
180 for strict ordering of powerpc_opcodes, but disable for now.
181
7e806470
PB
1822008-03-04 Paul Brook <paul@codesourcery.com>
183
184 * config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
185 (arm_ext_v7m): Rename...
186 (arm_ext_m): ... to this. Include v6-M.
187 (do_t_add_sub): Allow narrow low-reg non flag setting adds.
188 (do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
189 (md_assemble): Allow wide msr instructions.
190 (insns): Add classifications for v6-m instructions.
191 (arm_cpu_option_table): Add cortex-m1.
192 (arm_arch_option_table): Add armv6-m.
193 (cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
194
77cba8a3
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1952008-03-03 Sterling Augustine <sterling@tensilica.com>
196 Bob Wilson <bob.wilson@acm.org>
197
198 * config/tc-xtensa.c (xtensa_num_pipe_stages): New.
199 (md_begin): Initialize it.
200 (resources_conflict): Use it.
201
58502fec
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2022008-03-03 Sterling Augustine <sterling@tensilica.com>
203
204 * config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
205
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2062008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
207 H.J. Lu <hongjiu.lu@intel.com>
208
209 PR gas/5543
210 * read.c (pseudo_set): Don't allow global register symbol.
211
212 * symbols.c (S_SET_EXTERNAL): Don't allow register symbol
213 global.
214
2152008-03-03 H.J. Lu <hongjiu.lu@intel.com>
216
217 PR gas/5543
218 * write.c (write_object_file): Don't allow symbols which were
219 equated to register. Stop if there is an error.
220
783de163
AM
2212008-03-01 Alan Modra <amodra@bigpond.net.au>
222
223 * config/tc-ppc.h (struct _ppc_fix_extra): New.
224 (ppc_cpu): Declare.
225 (TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
226 * config/tc-ppc.c (ppu_cpu): Make global.
227 (ppc_insert_operand): Add ppu_cpu parameter.
228 (md_assemble): Adjust for above change.
229 (md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
230
5ad34203
NC
2312008-02-22 Nick Clifton <nickc@redhat.com>
232
233 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
584206db 234 targeted ARM ports, otherwise just skip generating the reloc.
5ad34203 235
1ceab344
L
2362008-02-18 H.J. Lu <hongjiu.lu@intel.com>
237
238 * doc/c-i386.texi: Update -march= and .arch.
239
ca75ed2d
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2402008-02-18 Nick Clifton <nickc@redhat.com>
241
242 * config/tc-mn10300.c (has_known_symbol_location): New function.
243 Do not regard weak symbols as having a known location.
244 (md_estimate_size_before_relax): Use new function.
245 (md_pcrel_from): Do not compute a pcrel against a weak symbol.
246
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2472008-02-18 Jan Beulich <jbeulich@novell.com>
248
249 * config/tc-i386.c (match_template): Disallow 'l' suffix when
250 currently selected CPU has no 32-bit support.
251 (parse_real_register): Do not return registers not available on
252 currently selected CPU.
253
1fed0ba1
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2542008-02-16 H.J. Lu <hongjiu.lu@intel.com>
255
256 * config/tc-i386.c (process_immext): Fix format.
257
65da13b5
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2582008-02-16 H.J. Lu <hongjiu.lu@intel.com>
259
260 * config/tc-i386.c (inoutportreg): New.
261 (process_immext): New.
262 (md_assemble): Use it.
263 (update_imm): Use imm16 and imm32s.
264 (i386_att_operand): Use inoutportreg.
265
0dfbf9d7
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2662008-02-14 H.J. Lu <hongjiu.lu@intel.com>
267
268 * config/tc-i386.c (operand_type_all_zero): New.
269 (operand_type_set): Likewise.
270 (operand_type_equal): Likewise.
271 (cpu_flags_all_zero): Likewise.
272 (cpu_flags_set): Likewise.
273 (cpu_flags_equal): Likewise.
274 (UINTS_ALL_ZERO): Removed.
275 (UINTS_SET): Likewise.
276 (UINTS_CLEAR): Likewise.
277 (UINTS_EQUAL): Likewise.
278 (cpu_flags_match): Updated.
279 (smallest_imm_type): Likewise.
280 (set_cpu_arch): Likewise.
281 (md_assemble): Likewise.
282 (optimize_imm): Likewise.
283 (match_template): Likewise.
284 (process_suffix): Likewise.
285 (update_imm): Likewise.
286 (process_drex): Likewise.
287 (process_operands): Likewise.
288 (build_modrm_byte): Likewise.
289 (i386_immediate): Likewise.
290 (i386_displacement): Likewise.
291 (i386_att_operand): Likewise.
292 (parse_real_register): Likewise.
293 (md_parse_option): Likewise.
294 (i386_target_format): Likewise.
295
93ac2687
NC
2962008-02-14 Dimitry Andric <dimitry@andric.com>
297
298 PR gas/5712
299 * config/tc-arm.c (s_arm_unwind_save): Advance the input line
300 pointer past the comma after parsing a floating point register
301 name.
302
d669d37f
NC
3032008-02-14 Hakan Ardo <hakan@debian.org>
304
305 PR gas/2626
306 * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
307 to AVR_ISA_2xxe.
308 (avr_operand): Disallow post-increment addressing in the lpm
309 instruction for the attiny26.
310
b7240065
JB
3112008-02-13 Jan Beulich <jbeulich@novell.com>
312
313 * config/tc-i386.c (parse_real_register): Don't return 'FLAT'
314 if not in Intel mode.
315 (i386_intel_operand): Ignore segment overrides in immediate and
316 offset operands.
317 (intel_e11): Range-check i.mem_operands before use as array
318 index. Filter out FLAT for uses other than as segment override.
319 (intel_get_token): Remove broken promotion of "FLAT:" to mean
320 "offset FLAT:".
321
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JB
3222008-02-13 Jan Beulich <jbeulich@novell.com>
323
324 * config/tc-i386.c (intel_e09): Also special-case 'bound'.
325
a60de03c
JB
3262008-02-13 Jan Beulich <jbeulich@novell.com>
327
328 * config/tc-i386.c (allow_pseudo_reg): New.
329 (parse_real_register): Check for NULL just once. Allow all
330 register table entries when allow_pseudo_reg is non-zero.
331 Don't allow any registers without type when allow_pseudo_reg
332 is zero.
333 (tc_x86_regname_to_dw2regnum): Replace with ...
334 (tc_x86_parse_to_dw2regnum): ... this.
335 (tc_x86_frame_initial_instructions): Adjust for above change.
336 * config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
337 (tc_parse_to_dw2regnum): New.
338 (tc_x86_regname_to_dw2regnum): Replace with ...
339 (tc_x86_parse_to_dw2regnum): ... this.
340 * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
341 (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
342 error handling.
343
9c95b521
NC
3442008-02-12 Nick Clifton <nickc@redhat.com>
345
346 * config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
347 argument.
348 (tic4x_insn_add): Likewise.
349 (md_begin): Drop cast that was discarding a const qualifier.
350 * config/tc-d30v.c (get_reloc): Add const qualifier to op
351 argument.
352 (build_insn): Drop cast that was discarding a const qualifier.
353
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3542008-02-11 H.J. Lu <hongjiu.lu@intel.com>
355
356 * config/tc-i386.c (cpu_arch): Add .xsave.
357 (md_show_usage): Add .xsave.
358
359 * doc/c-i386.texi: Add xsave to -march=.
360
1bf57e9f
AM
3612008-02-07 Alan Modra <amodra@bigpond.net.au>
362
363 * read.c (s_weakref): Don't pass unadorned NULL to concat.
364 * config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
365
2276bc20
BW
3662008-02-05 Sterling Augustine <sterling@tensilica.com>
367
368 * config/tc-xtensa.c (relax_frag_immed): Change internal consistency
369 checks into assertions. When relaxation produces an operation that
370 does not fit in the current FLIX instruction, make sure that the
371 operation is relaxed as needed to account for being placed following
372 the current instruction.
373
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3742008-02-04 H.J. Lu <hongjiu.lu@intel.com>
375
376 PR 5715
377 * configure: Regenerated.
378
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AN
3792008-02-04 Adam Nemet <anemet@caviumnetworks.com>
380
381 * config/tc-mips.c (mips_cpu_info_table): Add Octeon.
382
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BW
3832008-01-31 Marc Gauthier <marc@tensilica.com>
384
385 * configure.tgt (xtensa*-*-*): Recognize processor variants.
386
6e3d6dc1
NC
3872008-01-25 Kai Tietz <kai.tietz@onevision.com>
388
389 * read.c: (emit_expr): Correct for mingw use of printf size
390 specifier.
391
cec28c98
BW
3922008-01-24 Bob Wilson <bob.wilson@acm.org>
393
394 * doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
395 can only be encoded in FLIX instructions but are not specified as such.
396 (Xtensa Automatic Alignment): Remove obsolete comment about debugging
397 labels.
398
ae40c993
L
3992008-01-24 H.J. Lu <hongjiu.lu@intel.com>
400
401 * NEWS: Mention new command line options for x86 targets.
402
599121aa
L
4032008-01-23 H.J. Lu <hongjiu.lu@intel.com>
404
405 * config/tc-i386.c (md_show_usage): Replace tabs with spaces.
406
2b1ed17b
EW
4072008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
408
409 * config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
410
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L
4112008-01-23 H.J. Lu <hongjiu.lu@intel.com>
412
413 * config/tc-i386.c (md_show_usage): Show more processors for
414 -march=/-mtune=.
415
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L
4162008-01-22 H.J. Lu <hongjiu.lu@intel.com>
417
418 * config/tc-i386.c (i386_target_format): Remove cpummx2.
419
6305a203
L
4202008-01-22 H.J. Lu <hongjiu.lu@intel.com>
421
422 * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
423 (XXX_MNEM_SUFFIX): Likewise.
424 (END_OF_INSN): Likewise.
425 (templates): Likewise.
426 (modrm_byte): Likewise.
427 (rex_byte): Likewise.
428 (DREX_XXX): Likewise.
429 (drex_byte): Likewise.
430 (sib_byte): Likewise.
431 (processor_type): Likewise.
432 (arch_entry): Likewise.
433 (cpu_sub_arch_name): Remove const.
434 (cpu_arch): Add .vmx and .smx.
435 (set_cpu_arch): Append cpu_sub_arch_name.
436 (md_parse_option): Support -march=CPU[,+EXTENSION...].
437 (md_show_usage): Updated.
438
439 * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
440 (XXX_MNEM_SUFFIX): Likewise.
441 (END_OF_INSN): Likewise.
442 (templates): Likewise.
443 (modrm_byte): Likewise.
444 (rex_byte): Likewise.
445 (DREX_XXX): Likewise.
446 (drex_byte): Likewise.
447 (sib_byte): Likewise.
448 (processor_type): Likewise.
449 (arch_entry): Likewise.
450
451 * doc/as.texinfo: Update i386 -march option.
452
453 * doc/c-i386.texi: Update -march= for ISA.
454
fb227da0
BW
4552008-01-18 Bob Wilson <bob.wilson@acm.org>
456
457 * config/tc-xtensa.c (xtensa_leb128): New function.
458 (md_pseudo_table): Use it for sleb128 and uleb128.
459 (is_leb128_expr): New internal flag.
460 (xtensa_symbol_new_hook): Check new flag.
461
982b62a0
EW
4622008-01-16 Eric B. Weddington <eric.weddington@atmel.com>
463
464 * config/tc-avr.c (mcu_types): Change opcode set for avr3,
465 at90usb82, at90usb162.
466 * doc/c-avr.texi: Change architecture grouping for at90usb82,
467 at90usb162.
468 These changes support the new avr35 architecture group in gcc.
469
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L
4702008-01-15 H.J. Lu <hongjiu.lu@intel.com>
471
472 * config/tc-i386.c (md_assemble): Also zap movzx and movsx
473 suffix for AT&T syntax.
474
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L
4752008-01-14 H.J. Lu <hongjiu.lu@intel.com>
476
477 * config/tc-i386.c (match_reg_size): New.
478 (match_mem_size): Likewise.
479 (operand_size_match): Likewise.
480 (operand_type_match): Also clear all size fields.
481 (match_template): Skip Intel syntax when in AT&T syntax.
482 Call operand_size_match to check operand size.
483 (i386_att_operand): Set the mem field to 1 for memory
484 operand.
485 (i386_intel_operand): Likewise.
486
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L
4872008-01-12 H.J. Lu <hongjiu.lu@intel.com>
488
489 PR gas/5534
490 * config/tc-i386.c (_i386_insn): Update comment.
491 (operand_type_match): Also clear unspecified.
492 (operand_type_register_match): Likewise.
493 (parse_operands): Initialize unspecified.
494 (i386_intel_operand): Likewise.
495 (match_template): Check memory and accumulator operand size.
496 (i386_att_operand): Clear unspecified on register operand.
497 (intel_e11): Likewise.
498 (intel_e09): Set operand size and clean unspecified for
499 "XXX PTR".
500
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AS
5012008-01-11 Andreas Schwab <schwab@suse.de>
502
503 * read.c (s_space): Declare `repeat' as offsetT.
504
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5052008-01-10 H.J. Lu <hongjiu.lu@intel.com>
506
507 * config/tc-i386.c (match_template): Check processor support
508 first.
509
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5102008-01-10 H.J. Lu <hongjiu.lu@intel.com>
511
512 * config/tc-i386.c (match_template): Continue if processor
513 doesn't match.
514
417c21b7
AO
5152008-01-09 Alexandre Oliva <aoliva@redhat.com>
516
517 * config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
518 unwind personality function address.
519
7ddd14de
BW
5202008-01-09 Bob Wilson <bob.wilson@acm.org>
521
522 * dwarf2dbg.c (out_sleb128): Delete.
523 (size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
524 (out_fixed_inc_line_addr): Delete.
525 (relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
526 size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
527 (dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
528 (process_entries): Remove calls to out_fixed_inc_line_addr. When
529 DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
530 * read.h (emit_expr_fix): New prototype.
531 * read.c (emit_expr): Move code to emit_expr_fix and use it here.
532 (emit_expr_fix): New.
533
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5342008-01-09 H.J. Lu <hongjiu.lu@intel.com>
535
536 * config/tc-i386.c (match_template): Check register size
537 only when size of operands can be encoded the canonical way.
538
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5392008-01-08 H.J. Lu <hongjiu.lu@intel.com>
540
541 * config/tc-i386.c (i386_operand): Renamed to ...
542 (i386_att_operand): This.
543 (parse_operands): Updated.
544
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5452008-01-05 H.J. Lu <hongjiu.lu@intel.com>
546
547 * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
548
549 * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
550 only.
551 (md_assemble): Remove Intel mode workaround.
552 (match_template): Check support for old gcc, AT&T mnemonic
553 and Intel Syntax.
554 (md_parse_option): Don't set intel_mnemonic to 0 for
555 OPTION_MOLD_GCC.
556
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5572008-01-04 H.J. Lu <hongjiu.lu@intel.com>
558
559 * config/tc-i386.h: Update copyright to 2008.
560
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5612008-01-04 Nick Clifton <nickc@redhat.com>
562
563 * config/tc-ppc.c (parse_cpu): Preserve the settings of the
564 PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
565
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5662008-01-03 H.J. Lu <hongjiu.lu@intel.com>
567
568 * config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
569 of SYSV386_COMPAT.
570
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5712008-01-03 H.J. Lu <hongjiu.lu@intel.com>
572
573 * gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
574 (cpu_flags_not): Likewise.
575 (cpu_flags_match): Updated to check 64bit and arch.
576 (set_code_flag): Remove cpu_arch_flags_not.
577 (set_16bit_gcc_code_flag): Likewise.
578 (set_cpu_arch): Likewise.
579 (md_begin): Likewise.
580 (parse_insn): Call cpu_flags_match to check 64bit and arch.
581 (match_template): Likewise.
582
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5832008-01-03 Jakub Jelinek <jakub@redhat.com>
584
585 * config/tc-i386.c (process_drex): Initialize modrm_reg and
586 modrm_regmem to 0 instead of None.
587
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5882008-01-03 H.J. Lu <hongjiu.lu@intel.com>
589
590 * config/tc-i386.c (match_template): Use the xmmword field
591 instead of no_xsuf.
592
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5932008-01-02 H.J. Lu <hongjiu.lu@intel.com>
594
595 * config/tc-i386.c (process_suffix): Fix a typo.
596
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5972008-01-02 H.J. Lu <hongjiu.lu@intel.com>
598
599 PR gas/5534
600 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
601 Check memory size in Intel mode.
602 (process_suffix): Handle XMMWORD_MNEM_SUFFIX.
603 (intel_e09): Likewise.
604
605 * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
606
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6072008-01-02 Catherine Moore <clm@codesourcery.com>
608
609 * config/tc-mips.c (mips_ip): Check operands on jalr instruction.
610
6c7ac64e 611For older changes see ChangeLog-2007
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612\f
613Local Variables:
614mode: change-log
615left-margin: 8
616fill-column: 74
617version-control: never
618End:
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