merge from gcc
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
05e7221f
AM
12006-11-08 Alan Modra <amodra@bigpond.net.au>
2
3 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
4
df1f3cda
DD
52006-11-06 David Daney <ddaney@avtrex.com>
6
7 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
8
82100185
TS
92006-11-06 Thiemo Seufer <ths@mips.com>
10
11 * doc/c-mips.texi (-march): Document sb1a.
12
a360e743
TS
132006-11-06 Thiemo Seufer <ths@mips.com>
14
15 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
16 34k always has DSP ASE.
17
64817874
TS
182006-11-03 Thiemo Seufer <ths@mips.com>
19
20 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
21 MIPS16 instructions referencing other sections, unless they are
22 external branches.
23
7764b395
TS
242006-11-03 Thiemo Seufer <ths@mips.com>
25
26 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
27 release 1 CPU.
28
ae424f82
JJ
292006-11-03 Jakub Jelinek <jakub@redhat.com>
30
9b8ae42e
JJ
31 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
32 personality and lsda.
33 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
34 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
35 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
36 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
37 (output_cie): Output personality including its encoding and LSDA encoding.
38 (output_fde): Output LSDA.
39 (select_cie_for_fde): Don't share CIE if personality, its encoding or
40 LSDA encoding are different. Copy the 3 fields from fde_entry to
41 cie_entry.
42 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
43
ae424f82
JJ
44 * subsegs.h (struct frchain): Add frch_cfi_data field.
45 * dw2gencfi.c: Include subsegs.h.
46 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
47 (struct frch_cfi_data): New type.
48 (unused_cfi_data): New variable.
49 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
50 and cfa_save_stack static vars into a structure pointed from
51 each frchain.
52 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
53 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
54 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
55 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
56 Likewise.
57
d1e50f8a
DJ
582006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
59
60 * config/tc-h8300.c (build_bytes): Fix const warning.
61
06d2da93
NC
622006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
63
64 * tc-score.c (do16_rdrs): Handle not! instruction especially.
65
3ba67470
PB
662006-10-31 Paul Brook <paul@codesourcery.com>
67
68 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
69 for EABIv4.
70
7a1d4c38
PB
712006-10-31 Paul Brook <paul@codesourcery.com>
72
73 gas/
74 * config/tc-arm.c (object_arch): New variable.
75 (s_arm_object_arch): New function.
76 (md_pseudo_table): Add object_arch.
77 (aeabi_set_public_attributes): Obey object_arch.
78 * doc/c-arm.texi: Document .object_arch.
79
b138abaa
NC
802006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
81
82 * tc-score.c (data_op2): Check invalid operands.
83 (my_get_expression): Const operand of some instructions can not be
84 symbol in assembly.
85 (get_insn_class_from_type): Handle instruction type Insn_internal.
86 (do_macro_ldst_label): Modify inst.type.
87 (Insn_PIC): Delete.
88 (data_op2): The immediate value in lw is 15 bit signed.
89
c79b7c30
RC
902006-10-29 Randolph Chung <tausq@debian.org>
91
92 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
93 (hppa_regname_to_dw2regnum): New funcions.
94 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
95 (tc_cfi_frame_initial_instructions)
96 (tc_regname_to_dw2regnum): Define.
97 (hppa_cfi_frame_initial_instructions)
98 (hppa_regname_to_dw2regnum): Declare.
99 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
100 (DWARF2_CIE_DATA_ALIGNMENT): Define.
101
e2785c44
NC
1022006-10-29 Nick Clifton <nickc@redhat.com>
103
104 * config/tc-spu.c (md_assemble): Cast printf string size parameter
105 to int in order to avoid a compiler warning.
106
86157c20
AS
1072006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
108
109 * config/tc-sh.c (md_assemble): Define size of branches.
110
ba5f0fda
BE
1112006-10-26 Ben Elliston <bje@au.ibm.com>
112
113 * dw2gencfi.c (cfi_add_CFA_offset):
114 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
115
033cd5fd
BE
116 * write.c (chain_frchains_together_1): Assert that this function
117 never returns a pointer to the auto variable `dummy'.
118
e9f53129
AM
1192006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
120 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
121 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
122 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
123 Alan Modra <amodra@bigpond.net.au>
124
125 * config/tc-spu.c: New file.
126 * config/tc-spu.h: New file.
127 * configure.tgt: Add SPU support.
128 * Makefile.am: Likewise. Run "make dep-am".
129 * Makefile.in: Regenerate.
130 * po/POTFILES.in: Regenerate.
131
7b383517
BE
1322006-10-25 Ben Elliston <bje@au.ibm.com>
133
134 * expr.c (expr): Replace O_add case in switch (op_left) explaining
135 why it can never occur.
136
ede602d7
AM
1372006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
138
139 * doc/c-ppc.texi (-mcell): Document.
140 * config/tc-ppc.c (parse_cpu): Parse -mcell.
141 (md_show_usage): Document -mcell.
142
7918206c
MM
1432006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
144
145 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
146
878bcc43
AM
1472006-10-23 Alan Modra <amodra@bigpond.net.au>
148
149 * config/tc-m68hc11.c (md_assemble): Quiet warning.
150
8620418b
MF
1512006-10-19 Mike Frysinger <vapier@gentoo.org>
152
153 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
154 (x86_64_section_letter): Likewise.
155
b3549761
NC
1562006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
157
158 * config/tc-score.c (build_relax_frag): Compute correct
159 tc_frag_data.fixp.
160
71a75f6f
MF
1612006-10-18 Roy Marples <uberlord@gentoo.org>
162
163 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
164 elf32-sparc as a viable target for the -32 switch and any target
165 starting with elf64-sparc as a viable target for the -64 switch.
166 (sparc_target_format): For 64-bit ELF flavoured output use
167 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
168 ELF_TARGET_FORMAT.
71a75f6f
MF
169 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
170
e1b5fdd4
L
1712006-10-17 H.J. Lu <hongjiu.lu@intel.com>
172
173 * configure: Regenerated.
174
f8ef9cd7
BS
1752006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
176
177 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
178 in addition to testing for '\n'.
179 (TC_EOL_IN_INSN): Provide a default definition if necessary.
180
eb1fe072
NC
1812006-10-13 Sterling Augstine <sterling@tensilica.com>
182
183 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
184 a disjoint DW_AT range.
185
ec6e49f4
NC
1862006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
187
188 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
189
036dc3f7
PB
1902006-10-08 Paul Brook <paul@codesourcery.com>
191
192 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
193 (parse_operands): Use parse_big_immediate for OP_NILO.
194 (neon_cmode_for_logic_imm): Try smaller element sizes.
195 (neon_cmode_for_move_imm): Ditto.
196 (do_neon_logic): Handle .i64 pseudo-op.
197
3bb0c887
AM
1982006-09-29 Alan Modra <amodra@bigpond.net.au>
199
200 * po/POTFILES.in: Regenerate.
201
ef05d495
L
2022006-09-28 H.J. Lu <hongjiu.lu@intel.com>
203
204 * config/tc-i386.h (CpuMNI): Renamed to ...
205 (CpuSSSE3): This.
206 (CpuUnknownFlags): Updated.
207 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
208 and PROCESSOR_MEROM with PROCESSOR_CORE2.
209 * config/tc-i386.c: Updated.
210 * doc/c-i386.texi: Likewise.
a70ae331 211
ef05d495
L
212 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
213
d8ad03e9
NC
2142006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
215
216 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
217
df3ca5a3
NC
2182006-09-27 Nick Clifton <nickc@redhat.com>
219
220 * output-file.c (output_file_close): Prevent an infinite loop
221 reporting that stdoutput could not be closed.
222
2d447fca
JM
2232006-09-26 Mark Shinwell <shinwell@codesourcery.com>
224 Joseph Myers <joseph@codesourcery.com>
225 Ian Lance Taylor <ian@wasabisystems.com>
226 Ben Elliston <bje@wasabisystems.com>
227
228 * config/tc-arm.c (arm_cext_iwmmxt2): New.
229 (enum operand_parse_code): New code OP_RIWR_I32z.
230 (parse_operands): Handle OP_RIWR_I32z.
231 (do_iwmmxt_wmerge): New function.
232 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
233 a register.
234 (do_iwmmxt_wrwrwr_or_imm5): New function.
235 (insns): Mark instructions as RIWR_I32z as appropriate.
236 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
237 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
238 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
239 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
240 (md_begin): Handle IWMMXT2.
241 (arm_cpus): Add iwmmxt2.
242 (arm_extensions): Likewise.
243 (arm_archs): Likewise.
244
ba83aca1
BW
2452006-09-25 Bob Wilson <bob.wilson@acm.org>
246
247 * doc/as.texinfo (Overview): Revise description of --keep-locals.
248 Add xref to "Symbol Names".
249 (L): Refer to "local symbols" instead of "local labels". Move
250 definition to "Symbol Names" section; add xref to that section.
251 (Symbol Names): Use "Local Symbol Names" section to define local
252 symbols. Add "Local Labels" heading for description of temporary
253 forward/backward labels, and refer to those as "local labels".
254
539e75ad
L
2552006-09-23 H.J. Lu <hongjiu.lu@intel.com>
256
257 PR binutils/3235
258 * config/tc-i386.c (match_template): Check address size prefix
259 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
260 operand.
261
5e02f92e
AM
2622006-09-22 Alan Modra <amodra@bigpond.net.au>
263
264 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
265
885afe7b
AM
2662006-09-22 Alan Modra <amodra@bigpond.net.au>
267
268 * as.h (as_perror): Delete declaration.
269 * gdbinit.in (as_perror): Delete breakpoint.
270 * messages.c (as_perror): Delete function.
271 * doc/internals.texi: Remove as_perror description.
272 * listing.c (listing_print: Don't use as_perror.
273 * output-file.c (output_file_create, output_file_close): Likewise.
274 * symbols.c (symbol_create, symbol_clone): Likewise.
275 * write.c (write_contents): Likewise.
276 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
277 * config/tc-tic54x.c (tic54x_mlib): Likewise.
278
3aeeedbb
AM
2792006-09-22 Alan Modra <amodra@bigpond.net.au>
280
281 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
282 (ppc_handle_align): New function.
283 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
284 (SUB_SEGMENT_ALIGN): Define as zero.
285
96e9638b
BW
2862006-09-20 Bob Wilson <bob.wilson@acm.org>
287
288 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
289 (Overview): Skip cross reference in man page.
290
99ad8390
NC
2912006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
292
293 * configure.in: Add new target x86_64-pc-mingw64.
294 * configure: Regenerate.
295 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
296 * config/obj-coff.h: Add handling for TE_PEP target specific code
297 and definitions.
99ad8390
NC
298 * config/tc-i386.c: Add new targets.
299 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
300 (x86_64_target_format): Add new method for setup proper default
301 target cpu mode.
99ad8390
NC
302 * config/te-pep.h: Add new target definition header.
303 (TE_PEP): New macro: Identifies new target architecture.
304 (COFF_WITH_pex64): Set proper includes in bfd.
305 * NEWS: Mention new target.
306
73332571
BS
3072006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
308
309 * config/bfin-parse.y (binary): Change sub of const to add of negated
310 const.
311
1c0d3aa6
NC
3122006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
313
314 * config/tc-score.c: New file.
315 * config/tc-score.h: Newf file.
316 * configure.tgt: Add Score target.
317 * Makefile.am: Add Score files.
318 * Makefile.in: Regenerate.
319 * NEWS: Mention new target support.
320
4fa3602b
PB
3212006-09-16 Paul Brook <paul@codesourcery.com>
322
323 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
324 * doc/c-arm.texi (movsp): Document offset argument.
325
16dd5e42
PB
3262006-09-16 Paul Brook <paul@codesourcery.com>
327
328 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
329 unsigned int to avoid 64-bit host problems.
330
c4ae04ce
BS
3312006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
332
333 * config/bfin-parse.y (binary): Do some more constant folding for
334 additions.
335
e5d4a5a6
JB
3362006-09-13 Jan Beulich <jbeulich@novell.com>
337
338 * input-file.c (input_file_give_next_buffer): Demote as_bad to
339 as_warn.
340
1a1219cb
AM
3412006-09-13 Alan Modra <amodra@bigpond.net.au>
342
343 PR gas/3165
344 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
345 in parens.
346
f79d9c1d
AM
3472006-09-13 Alan Modra <amodra@bigpond.net.au>
348
349 * input-file.c (input_file_open): Replace as_perror with as_bad
350 so that gas exits with error on file errors. Correct error
351 message.
352 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 353 * input-file.h: Update comment.
f79d9c1d 354
f512f76f
NC
3552006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
356
357 PR gas/3172
358 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
359 registers as a sub-class of wC registers.
360
8d79fd44
AM
3612006-09-11 Alan Modra <amodra@bigpond.net.au>
362
363 PR gas/3165
364 * config/tc-mips.h (enum dwarf2_format): Forward declare.
365 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
366 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
367 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
368
6258339f
NC
3692006-09-08 Nick Clifton <nickc@redhat.com>
370
371 PR gas/3129
372 * doc/as.texinfo (Macro): Improve documentation about separating
373 macro arguments from following text.
374
f91e006c
PB
3752006-09-08 Paul Brook <paul@codesourcery.com>
376
377 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
378
466bbf93
PB
3792006-09-07 Paul Brook <paul@codesourcery.com>
380
381 * config/tc-arm.c (parse_operands): Mark operand as present.
382
428e3f1f
PB
3832006-09-04 Paul Brook <paul@codesourcery.com>
384
385 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
386 (do_neon_dyadic_if_i_d): Avoid setting U bit.
387 (do_neon_mac_maybe_scalar): Ditto.
388 (do_neon_dyadic_narrow): Force operand type to NT_integer.
389 (insns): Remove out of date comments.
390
fb25138b
NC
3912006-08-29 Nick Clifton <nickc@redhat.com>
392
393 * read.c (s_align): Initialize the 'stopc' variable to prevent
394 compiler complaints about it being used without being
395 initialized.
396 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
397 s_float_space, s_struct, cons_worker, equals): Likewise.
398
5091343a
AM
3992006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
400
401 * ecoff.c (ecoff_directive_val): Fix message typo.
402 * config/tc-ns32k.c (convert_iif): Likewise.
403 * config/tc-sh64.c (shmedia_check_limits): Likewise.
404
1f2a7e38
BW
4052006-08-25 Sterling Augustine <sterling@tensilica.com>
406 Bob Wilson <bob.wilson@acm.org>
407
408 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
409 the state of the absolute_literals directive. Remove align frag at
410 the start of the literal pool position.
411
34135039
BW
4122006-08-25 Bob Wilson <bob.wilson@acm.org>
413
414 * doc/c-xtensa.texi: Add @group commands in examples.
415
74869ac7
BW
4162006-08-24 Bob Wilson <bob.wilson@acm.org>
417
418 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
419 (INIT_LITERAL_SECTION_NAME): Delete.
420 (lit_state struct): Remove segment names, init_lit_seg, and
421 fini_lit_seg. Add lit_prefix and current_text_seg.
422 (init_literal_head_h, init_literal_head): Delete.
423 (fini_literal_head_h, fini_literal_head): Delete.
424 (xtensa_begin_directive): Move argument parsing to
425 xtensa_literal_prefix function.
426 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
427 (xtensa_literal_prefix): Parse the directive argument here and
428 record it in the lit_prefix field. Remove code to derive literal
429 section names.
430 (linkonce_len): New.
431 (get_is_linkonce_section): Use linkonce_len. Check for any
432 ".gnu.linkonce.*" section, not just text sections.
433 (md_begin): Remove initialization of deleted lit_state fields.
434 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
435 to init_literal_head and fini_literal_head.
436 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
437 when traversing literal_head list.
438 (match_section_group): New.
439 (cache_literal_section): Rewrite to determine the literal section
440 name on the fly, create the section and return it.
441 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
442 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
443 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
444 Use xtensa_get_property_section from bfd.
445 (retrieve_xtensa_section): Delete.
446 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
447 description to refer to plural literal sections and add xref to
448 the Literal Directive section.
449 (Literal Directive): Describe new rules for deriving literal section
450 names. Add footnote for special case of .init/.fini with
451 --text-section-literals.
452 (Literal Prefix Directive): Replace old naming rules with xref to the
453 Literal Directive section.
454
87a1fd79
JM
4552006-08-21 Joseph Myers <joseph@codesourcery.com>
456
457 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
458 merging with previous long opcode.
459
7148cc28
NC
4602006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
461
462 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
463 * Makefile.in: Regenerate.
464 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
465 renamed. Adjust.
466
3e9e4fcf
JB
4672006-08-16 Julian Brown <julian@codesourcery.com>
468
469 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
470 to use ARM instructions on non-ARM-supporting cores.
471 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
472 mode automatically based on cpu variant.
473 (md_begin): Call above function.
474
267d2029
JB
4752006-08-16 Julian Brown <julian@codesourcery.com>
476
477 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
478 recognized in non-unified syntax mode.
479
4be041b2
TS
4802006-08-15 Thiemo Seufer <ths@mips.com>
481 Nigel Stephens <nigel@mips.com>
482 David Ung <davidu@mips.com>
483
484 * configure.tgt: Handle mips*-sde-elf*.
485
3a93f742
TS
4862006-08-12 Thiemo Seufer <ths@networkno.de>
487
488 * config/tc-mips.c (mips16_ip): Fix argument register handling
489 for restore instruction.
490
1737851b
BW
4912006-08-08 Bob Wilson <bob.wilson@acm.org>
492
493 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
494 (out_sleb128): New.
495 (out_fixed_inc_line_addr): New.
496 (process_entries): Use out_fixed_inc_line_addr when
497 DWARF2_USE_FIXED_ADVANCE_PC is set.
498 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
499
e14e52f8
DD
5002006-08-08 DJ Delorie <dj@redhat.com>
501
502 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
503 vs full symbols so that we never have more than one pointer value
504 for any given symbol in our symbol table.
505
802f5d9e
NC
5062006-08-08 Sterling Augustine <sterling@tensilica.com>
507
508 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
509 and emit DW_AT_ranges when code in compilation unit is not
510 contiguous.
511 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
512 is not contiguous.
513 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
514 (out_debug_ranges): New function to emit .debug_ranges section
515 when code is not contiguous.
516
720abc60
NC
5172006-08-08 Nick Clifton <nickc@redhat.com>
518
519 * config/tc-arm.c (WARN_DEPRECATED): Enable.
520
f0927246
NC
5212006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
522
523 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
524 only block.
525 (pe_directive_secrel) [TE_PE]: New function.
526 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
527 loc, loc_mark_labels.
528 [TE_PE]: Handle secrel32.
529 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
530 call.
531 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
532 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
533 (md_section_align): Only round section sizes here for AOUT
534 targets.
535 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
536 (tc_pe_dwarf2_emit_offset): New function.
537 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
538 (cons_fix_new_arm): Handle O_secrel.
539 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
540 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
541 of OBJ_ELF only block.
542 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
543 tc_pe_dwarf2_emit_offset.
544
55e6e397
RS
5452006-08-04 Richard Sandiford <richard@codesourcery.com>
546
547 * config/tc-sh.c (apply_full_field_fix): New function.
548 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
549 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
550 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
551 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
552
9cd19b17
NC
5532006-08-03 Nick Clifton <nickc@redhat.com>
554
555 PR gas/2991
556 * config.in: Regenerate.
557
97f87066
JM
5582006-08-03 Joseph Myers <joseph@codesourcery.com>
559
560 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 561 for OP_RIWR_RIWC.
97f87066 562
41adaa5c
JM
5632006-08-03 Joseph Myers <joseph@codesourcery.com>
564
565 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
566 (parse_operands): Handle it.
567 (insns): Use it for tmcr and tmrc.
568
9d7cbccd
NC
5692006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
570
571 PR binutils/2983
572 * config/tc-i386.c (md_parse_option): Treat any target starting
573 with elf64_x86_64 as a viable target for the -64 switch.
574 (i386_target_format): For 64-bit ELF flavoured output use
575 ELF_TARGET_FORMAT64.
576 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
577
c973bc5c
NC
5782006-08-02 Nick Clifton <nickc@redhat.com>
579
580 PR gas/2991
581 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
582 bfd/aclocal.m4.
583 * configure.in: Run BFD_BINARY_FOPEN.
584 * configure: Regenerate.
585 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
586 file to include.
587
cfde7f70
L
5882006-08-01 H.J. Lu <hongjiu.lu@intel.com>
589
590 * config/tc-i386.c (md_assemble): Don't update
591 cpu_arch_isa_flags.
592
b4c71f56
TS
5932006-08-01 Thiemo Seufer <ths@mips.com>
594
595 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
596
54f4ddb3
TS
5972006-08-01 Thiemo Seufer <ths@mips.com>
598
599 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
600 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
601 BFD_RELOC_32 and BFD_RELOC_16.
602 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
603 md_convert_frag, md_obj_end): Fix comment formatting.
604
d103cf61
TS
6052006-07-31 Thiemo Seufer <ths@mips.com>
606
607 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
608 handling for BFD_RELOC_MIPS16_JMP.
609
601e61cd
NC
6102006-07-24 Andreas Schwab <schwab@suse.de>
611
612 PR/2756
613 * read.c (read_a_source_file): Ignore unknown text after line
614 comment character. Fix misleading comment.
615
b45619c0
NC
6162006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
617
618 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
619 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
620 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
621 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
622 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
623 doc/c-z80.texi, doc/internals.texi: Fix some typos.
624
784906c5
NC
6252006-07-21 Nick Clifton <nickc@redhat.com>
626
627 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
628 linker testsuite.
629
d5f010e9
TS
6302006-07-20 Thiemo Seufer <ths@mips.com>
631 Nigel Stephens <nigel@mips.com>
632
633 * config/tc-mips.c (md_parse_option): Don't infer optimisation
634 options from debug options.
635
35d3d567
TS
6362006-07-20 Thiemo Seufer <ths@mips.com>
637
638 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
639 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
640
401a54cf
PB
6412006-07-19 Paul Brook <paul@codesourcery.com>
642
643 * config/tc-arm.c (insns): Fix rbit Arm opcode.
644
16805f35
PB
6452006-07-18 Paul Brook <paul@codesourcery.com>
646
647 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
648 (md_convert_frag): Use correct reloc for add_pc. Use
649 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
650 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
651 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
652
d9e05e4e
AM
6532006-07-17 Mat Hostetter <mat@lcs.mit.edu>
654
655 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
656 when file and line unknown.
657
f43abd2b
TS
6582006-07-17 Thiemo Seufer <ths@mips.com>
659
660 * read.c (s_struct): Use IS_ELF.
661 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
662 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
663 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
664 s_mips_mask): Likewise.
665
a2902af6
TS
6662006-07-16 Thiemo Seufer <ths@mips.com>
667 David Ung <davidu@mips.com>
668
669 * read.c (s_struct): Handle ELF section changing.
670 * config/tc-mips.c (s_align): Leave enabling auto-align to the
671 generic code.
672 (s_change_sec): Try section changing only if we output ELF.
673
d32cad65
L
6742006-07-15 H.J. Lu <hongjiu.lu@intel.com>
675
676 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
677 CpuAmdFam10.
678 (smallest_imm_type): Remove Cpu086.
679 (i386_target_format): Likewise.
680
681 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
682 Update CpuXXX.
683
050dfa73
MM
6842006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
685 Michael Meissner <michael.meissner@amd.com>
686
687 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
688 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
689 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
690 architecture.
691 (i386_align_code): Ditto.
692 (md_assemble_code): Add support for insertq/extrq instructions,
693 swapping as needed for intel syntax.
694 (swap_imm_operands): New function to swap immediate operands.
695 (swap_operands): Deal with 4 operand instructions.
696 (build_modrm_byte): Add support for insertq instruction.
697
6b2de085
L
6982006-07-13 H.J. Lu <hongjiu.lu@intel.com>
699
700 * config/tc-i386.h (Size64): Fix a typo in comment.
701
01eaea5a
NC
7022006-07-12 Nick Clifton <nickc@redhat.com>
703
704 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 705 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
706 already been checked here.
707
1e85aad8
JW
7082006-07-07 James E Wilson <wilson@specifix.com>
709
710 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
711
1370e33d
NC
7122006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
713 Nick Clifton <nickc@redhat.com>
714
715 PR binutils/2877
716 * doc/as.texi: Fix spelling typo: branchs => branches.
717 * doc/c-m68hc11.texi: Likewise.
718 * config/tc-m68hc11.c: Likewise.
719 Support old spelling of command line switch for backwards
720 compatibility.
721
5f0fe04b
TS
7222006-07-04 Thiemo Seufer <ths@mips.com>
723 David Ung <davidu@mips.com>
724
725 * config/tc-mips.c (s_is_linkonce): New function.
726 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
727 weak, external, and linkonce symbols.
728 (pic_need_relax): Use s_is_linkonce.
729
85234291
L
7302006-06-24 H.J. Lu <hongjiu.lu@intel.com>
731
732 * doc/as.texinfo (Org): Remove space.
733 (P2align): Add "@var{abs-expr},".
734
ccc9c027
L
7352006-06-23 H.J. Lu <hongjiu.lu@intel.com>
736
737 * config/tc-i386.c (cpu_arch_tune_set): New.
738 (cpu_arch_isa): Likewise.
739 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
740 nops with short or long nop sequences based on -march=/.arch
741 and -mtune=.
742 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
743 set cpu_arch_tune and cpu_arch_tune_flags.
744 (md_parse_option): For -march=, set cpu_arch_isa and set
745 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
746 0. Set cpu_arch_tune_set to 1 for -mtune=.
747 (i386_target_format): Don't set cpu_arch_tune.
748
d4dc2f22
TS
7492006-06-23 Nigel Stephens <nigel@mips.com>
750
751 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
752 generated .sbss.* and .gnu.linkonce.sb.*.
753
a8dbcb85
TS
7542006-06-23 Thiemo Seufer <ths@mips.com>
755 David Ung <davidu@mips.com>
756
757 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
758 label_list.
759 * config/tc-mips.c (label_list): Define per-segment label_list.
760 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
761 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
762 mips_from_file_after_relocs, mips_define_label): Use per-segment
763 label_list.
764
3994f87e
TS
7652006-06-22 Thiemo Seufer <ths@mips.com>
766
767 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
768 (append_insn): Use it.
769 (md_apply_fix): Whitespace formatting.
770 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
771 mips16_extended_frag): Remove register specifier.
772 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
773 constants.
774
fa073d69
MS
7752006-06-21 Mark Shinwell <shinwell@codesourcery.com>
776
777 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
778 a directive saving VFP registers for ARMv6 or later.
779 (s_arm_unwind_save): Add parameter arch_v6 and call
780 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
781 appropriate.
782 (md_pseudo_table): Add entry for new "vsave" directive.
783 * doc/c-arm.texi: Correct error in example for "save"
784 directive (fstmdf -> fstmdx). Also document "vsave" directive.
785
8e77b565 7862006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
787 Anatoly Sokolov <aesok@post.ru>
788
a70ae331
AM
789 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
790 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
791 atmega164p/atmega324p.
792 * doc/c-avr.texi: Document new mcu and arch options.
793
8b1ad454
NC
7942006-06-17 Nick Clifton <nickc@redhat.com>
795
796 * config/tc-arm.c (enum parse_operand_result): Move outside of
797 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
798
9103f4f4
L
7992006-06-16 H.J. Lu <hongjiu.lu@intel.com>
800
801 * config/tc-i386.h (processor_type): New.
802 (arch_entry): Add type.
803
804 * config/tc-i386.c (cpu_arch_tune): New.
805 (cpu_arch_tune_flags): Likewise.
806 (cpu_arch_isa_flags): Likewise.
807 (cpu_arch): Updated.
808 (set_cpu_arch): Also update cpu_arch_isa_flags.
809 (md_assemble): Update cpu_arch_isa_flags.
810 (OPTION_MARCH): New.
811 (OPTION_MTUNE): Likewise.
812 (md_longopts): Add -march= and -mtune=.
813 (md_parse_option): Support -march= and -mtune=.
814 (md_show_usage): Add -march=CPU/-mtune=CPU.
815 (i386_target_format): Also update cpu_arch_isa_flags,
816 cpu_arch_tune and cpu_arch_tune_flags.
817
818 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
819
820 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
821
4962c51a
MS
8222006-06-15 Mark Shinwell <shinwell@codesourcery.com>
823
824 * config/tc-arm.c (enum parse_operand_result): New.
825 (struct group_reloc_table_entry): New.
826 (enum group_reloc_type): New.
827 (group_reloc_table): New array.
828 (find_group_reloc_table_entry): New function.
829 (parse_shifter_operand_group_reloc): New function.
830 (parse_address_main): New function, incorporating code
831 from the old parse_address function. To be used via...
832 (parse_address): wrapper for parse_address_main; and
833 (parse_address_group_reloc): new function, likewise.
834 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
835 OP_ADDRGLDRS, OP_ADDRGLDC.
836 (parse_operands): Support for these new operand codes.
837 New macro po_misc_or_fail_no_backtrack.
838 (encode_arm_cp_address): Preserve group relocations.
839 (insns): Modify to use the above operand codes where group
840 relocations are permitted.
841 (md_apply_fix): Handle the group relocations
842 ALU_PC_G0_NC through LDC_SB_G2.
843 (tc_gen_reloc): Likewise.
844 (arm_force_relocation): Leave group relocations for the linker.
845 (arm_fix_adjustable): Likewise.
846
cd2f129f
JB
8472006-06-15 Julian Brown <julian@codesourcery.com>
848
849 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
850 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
851 relocs properly.
852
46e883c5
L
8532006-06-12 H.J. Lu <hongjiu.lu@intel.com>
854
855 * config/tc-i386.c (process_suffix): Don't add rex64 for
856 "xchg %rax,%rax".
857
1787fe5b
TS
8582006-06-09 Thiemo Seufer <ths@mips.com>
859
860 * config/tc-mips.c (mips_ip): Maintain argument count.
861
96f989c2
AM
8622006-06-09 Alan Modra <amodra@bigpond.net.au>
863
864 * config/tc-iq2000.c: Include sb.h.
865
7c752c2a
TS
8662006-06-08 Nigel Stephens <nigel@mips.com>
867
868 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
869 aliases for better compatibility with SGI tools.
870
03bf704f
AM
8712006-06-08 Alan Modra <amodra@bigpond.net.au>
872
873 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
874 * Makefile.am (GASLIBS): Expand @BFDLIB@.
875 (BFDVER_H): Delete.
876 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
877 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
878 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
879 Run "make dep-am".
880 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
881 * Makefile.in: Regenerate.
882 * doc/Makefile.in: Regenerate.
883 * configure: Regenerate.
884
6648b7cf
JM
8852006-06-07 Joseph S. Myers <joseph@codesourcery.com>
886
887 * po/Make-in (pdf, ps): New dummy targets.
888
037e8744
JB
8892006-06-07 Julian Brown <julian@codesourcery.com>
890
891 * config/tc-arm.c (stdarg.h): include.
892 (arm_it): Add uncond_value field. Add isvec and issingle to operand
893 array.
894 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
895 REG_TYPE_NSDQ (single, double or quad vector reg).
896 (reg_expected_msgs): Update.
897 (BAD_FPU): Add macro for unsupported FPU instruction error.
898 (parse_neon_type): Support 'd' as an alias for .f64.
899 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
900 sets of registers.
901 (parse_vfp_reg_list): Don't update first arg on error.
902 (parse_neon_mov): Support extra syntax for VFP moves.
903 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
904 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
905 (parse_operands): Support isvec, issingle operands fields, new parse
906 codes above.
907 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
908 msr variants.
909 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
910 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
911 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
912 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
913 shapes.
914 (neon_shape): Redefine in terms of above.
915 (neon_shape_class): New enumeration, table of shape classes.
916 (neon_shape_el): New enumeration. One element of a shape.
917 (neon_shape_el_size): Register widths of above, where appropriate.
918 (neon_shape_info): New struct. Info for shape table.
919 (neon_shape_tab): New array.
920 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
921 (neon_check_shape): Rewrite as...
922 (neon_select_shape): New function to classify instruction shapes,
923 driven by new table neon_shape_tab array.
924 (neon_quad): New function. Return 1 if shape should set Q flag in
925 instructions (or equivalent), 0 otherwise.
926 (type_chk_of_el_type): Support F64.
927 (el_type_of_type_chk): Likewise.
928 (neon_check_type): Add support for VFP type checking (VFP data
929 elements fill their containing registers).
930 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
931 in thumb mode for VFP instructions.
932 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
933 and encode the current instruction as if it were that opcode.
934 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
935 arguments, call function in PFN.
936 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
937 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
938 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
939 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
940 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
941 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
942 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
943 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
944 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
945 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
946 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
947 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
948 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
949 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
950 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
951 neon_quad.
952 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
953 between VFP and Neon turns out to belong to Neon. Perform
954 architecture check and fill in condition field if appropriate.
955 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
956 (do_neon_cvt): Add support for VFP variants of instructions.
957 (neon_cvt_flavour): Extend to cover VFP conversions.
958 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
959 vmov variants.
960 (do_neon_ldr_str): Handle single-precision VFP load/store.
961 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
962 NS_NULL not NS_IGNORE.
963 (opcode_tag): Add OT_csuffixF for operands which either take a
964 conditional suffix, or have 0xF in the condition field.
965 (md_assemble): Add support for OT_csuffixF.
966 (NCE): Replace macro with...
967 (NCE_tag, NCE, NCEF): New macros.
968 (nCE): Replace macro with...
969 (nCE_tag, nCE, nCEF): New macros.
970 (insns): Add support for VFP insns or VFP versions of insns msr,
971 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
972 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
973 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
974 VFP/Neon insns together.
975
ebd1c875
AM
9762006-06-07 Alan Modra <amodra@bigpond.net.au>
977 Ladislav Michl <ladis@linux-mips.org>
978
979 * app.c: Don't include headers already included by as.h.
980 * as.c: Likewise.
981 * atof-generic.c: Likewise.
982 * cgen.c: Likewise.
983 * dwarf2dbg.c: Likewise.
984 * expr.c: Likewise.
985 * input-file.c: Likewise.
986 * input-scrub.c: Likewise.
987 * macro.c: Likewise.
988 * output-file.c: Likewise.
989 * read.c: Likewise.
990 * sb.c: Likewise.
991 * config/bfin-lex.l: Likewise.
992 * config/obj-coff.h: Likewise.
993 * config/obj-elf.h: Likewise.
994 * config/obj-som.h: Likewise.
995 * config/tc-arc.c: Likewise.
996 * config/tc-arm.c: Likewise.
997 * config/tc-avr.c: Likewise.
998 * config/tc-bfin.c: Likewise.
999 * config/tc-cris.c: Likewise.
1000 * config/tc-d10v.c: Likewise.
1001 * config/tc-d30v.c: Likewise.
1002 * config/tc-dlx.h: Likewise.
1003 * config/tc-fr30.c: Likewise.
1004 * config/tc-frv.c: Likewise.
1005 * config/tc-h8300.c: Likewise.
1006 * config/tc-hppa.c: Likewise.
1007 * config/tc-i370.c: Likewise.
1008 * config/tc-i860.c: Likewise.
1009 * config/tc-i960.c: Likewise.
1010 * config/tc-ip2k.c: Likewise.
1011 * config/tc-iq2000.c: Likewise.
1012 * config/tc-m32c.c: Likewise.
1013 * config/tc-m32r.c: Likewise.
1014 * config/tc-maxq.c: Likewise.
1015 * config/tc-mcore.c: Likewise.
1016 * config/tc-mips.c: Likewise.
1017 * config/tc-mmix.c: Likewise.
1018 * config/tc-mn10200.c: Likewise.
1019 * config/tc-mn10300.c: Likewise.
1020 * config/tc-msp430.c: Likewise.
1021 * config/tc-mt.c: Likewise.
1022 * config/tc-ns32k.c: Likewise.
1023 * config/tc-openrisc.c: Likewise.
1024 * config/tc-ppc.c: Likewise.
1025 * config/tc-s390.c: Likewise.
1026 * config/tc-sh.c: Likewise.
1027 * config/tc-sh64.c: Likewise.
1028 * config/tc-sparc.c: Likewise.
1029 * config/tc-tic30.c: Likewise.
1030 * config/tc-tic4x.c: Likewise.
1031 * config/tc-tic54x.c: Likewise.
1032 * config/tc-v850.c: Likewise.
1033 * config/tc-vax.c: Likewise.
1034 * config/tc-xc16x.c: Likewise.
1035 * config/tc-xstormy16.c: Likewise.
1036 * config/tc-xtensa.c: Likewise.
1037 * config/tc-z80.c: Likewise.
1038 * config/tc-z8k.c: Likewise.
1039 * macro.h: Don't include sb.h or ansidecl.h.
1040 * sb.h: Don't include stdio.h or ansidecl.h.
1041 * cond.c: Include sb.h.
1042 * itbl-lex.l: Include as.h instead of other system headers.
1043 * itbl-parse.y: Likewise.
1044 * itbl-ops.c: Similarly.
1045 * itbl-ops.h: Don't include as.h or ansidecl.h.
1046 * config/bfin-defs.h: Don't include bfd.h or as.h.
1047 * config/bfin-parse.y: Include as.h instead of other system headers.
1048
9622b051
AM
10492006-06-06 Ben Elliston <bje@au.ibm.com>
1050 Anton Blanchard <anton@samba.org>
1051
1052 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1053 (md_show_usage): Document it.
1054 (ppc_setup_opcodes): Test power6 opcode flag bits.
1055 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1056
65263ce3
TS
10572006-06-06 Thiemo Seufer <ths@mips.com>
1058 Chao-ying Fu <fu@mips.com>
1059
1060 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1061 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1062 (macro_build): Update comment.
1063 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1064 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1065 CPU_HAS_MDMX.
1066 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1067 MIPS_CPU_ASE_MDMX flags for sb1.
1068
a9e24354
TS
10692006-06-05 Thiemo Seufer <ths@mips.com>
1070
1071 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1072 appropriate.
1073 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1074 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1075 and MT instructions a fatal error. Use INSERT_OPERAND where
1076 appropriate. Improve warnings for break and wait code overflows.
1077 Use symbolic constant of OP_MASK_COPZ.
1078 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1079
4cfe2c59
DJ
10802006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1081
1082 * po/Make-in (top_builddir): Define.
1083
e10fad12
JM
10842006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1085
1086 * doc/Makefile.am (TEXI2DVI): Define.
1087 * doc/Makefile.in: Regenerate.
1088 * doc/c-arc.texi: Fix typo.
1089
12e64c2c
AM
10902006-06-01 Alan Modra <amodra@bigpond.net.au>
1091
1092 * config/obj-ieee.c: Delete.
1093 * config/obj-ieee.h: Delete.
1094 * Makefile.am (OBJ_FORMATS): Remove ieee.
1095 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1096 (obj-ieee.o): Remove rule.
1097 * Makefile.in: Regenerate.
1098 * configure.in (atof): Remove tahoe.
1099 (OBJ_MAYBE_IEEE): Don't define.
1100 * configure: Regenerate.
1101 * config.in: Regenerate.
1102 * doc/Makefile.in: Regenerate.
1103 * po/POTFILES.in: Regenerate.
1104
20e95c23
DJ
11052006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1106
1107 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1108 and LIBINTL_DEP everywhere.
1109 (INTLLIBS): Remove.
1110 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1111 * acinclude.m4: Include new gettext macros.
1112 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1113 Remove local code for po/Makefile.
1114 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1115
eebf07fb
NC
11162006-05-30 Nick Clifton <nickc@redhat.com>
1117
1118 * po/es.po: Updated Spanish translation.
1119
b6aee19e
DC
11202006-05-06 Denis Chertykov <denisc@overta.ru>
1121
1122 * doc/c-avr.texi: New file.
1123 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1124 * doc/all.texi: Set AVR
1125 * doc/as.texinfo: Include c-avr.texi
1126
f8fdc850 11272006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1128
f8fdc850
JZ
1129 * config/bfin-parse.y (check_macfunc): Loose the condition of
1130 calling check_multiply_halfregs ().
1131
a3205465
JZ
11322006-05-25 Jie Zhang <jie.zhang@analog.com>
1133
1134 * config/bfin-parse.y (asm_1): Better check and deal with
1135 vector and scalar Multiply 16-Bit Operands instructions.
1136
9b52905e
NC
11372006-05-24 Nick Clifton <nickc@redhat.com>
1138
1139 * config/tc-hppa.c: Convert to ISO C90 format.
1140 * config/tc-hppa.h: Likewise.
1141
11422006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1143 Randolph Chung <randolph@tausq.org>
a70ae331 1144
9b52905e
NC
1145 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1146 is_tls_ieoff, is_tls_leoff): Define.
1147 (fix_new_hppa): Handle TLS.
1148 (cons_fix_new_hppa): Likewise.
1149 (pa_ip): Likewise.
1150 (md_apply_fix): Handle TLS relocs.
1151 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1152
a70ae331 11532006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1154
1155 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1156
ad3fea08
TS
11572006-05-23 Thiemo Seufer <ths@mips.com>
1158 David Ung <davidu@mips.com>
1159 Nigel Stephens <nigel@mips.com>
1160
1161 [ gas/ChangeLog ]
1162 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1163 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1164 ISA_HAS_MXHC1): New macros.
1165 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1166 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1167 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1168 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1169 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1170 (mips_after_parse_args): Change default handling of float register
1171 size to account for 32bit code with 64bit FP. Better sanity checking
1172 of ISA/ASE/ABI option combinations.
1173 (s_mipsset): Support switching of GPR and FPR sizes via
1174 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1175 options.
1176 (mips_elf_final_processing): We should record the use of 64bit FP
1177 registers in 32bit code but we don't, because ELF header flags are
1178 a scarce ressource.
1179 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1180 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1181 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1182 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1183 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1184 missing -march options. Document .set arch=CPU. Move .set smartmips
1185 to ASE page. Use @code for .set FOO examples.
1186
8b64503a
JZ
11872006-05-23 Jie Zhang <jie.zhang@analog.com>
1188
1189 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1190 if needed.
1191
403022e0
JZ
11922006-05-23 Jie Zhang <jie.zhang@analog.com>
1193
1194 * config/bfin-defs.h (bfin_equals): Remove declaration.
1195 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1196 * config/tc-bfin.c (bfin_name_is_register): Remove.
1197 (bfin_equals): Remove.
1198 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1199 (bfin_name_is_register): Remove declaration.
1200
7455baf8
TS
12012006-05-19 Thiemo Seufer <ths@mips.com>
1202 Nigel Stephens <nigel@mips.com>
1203
1204 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1205 (mips_oddfpreg_ok): New function.
1206 (mips_ip): Use it.
1207
707bfff6
TS
12082006-05-19 Thiemo Seufer <ths@mips.com>
1209 David Ung <davidu@mips.com>
1210
1211 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1212 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1213 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1214 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1215 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1216 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1217 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1218 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1219 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1220 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1221 reg_names_o32, reg_names_n32n64): Define register classes.
1222 (reg_lookup): New function, use register classes.
1223 (md_begin): Reserve register names in the symbol table. Simplify
1224 OBJ_ELF defines.
1225 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1226 Use reg_lookup.
1227 (mips16_ip): Use reg_lookup.
1228 (tc_get_register): Likewise.
1229 (tc_mips_regname_to_dw2regnum): New function.
1230
1df69f4f
TS
12312006-05-19 Thiemo Seufer <ths@mips.com>
1232
1233 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1234 Un-constify string argument.
1235 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1236 Likewise.
1237 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1238 Likewise.
1239 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1240 Likewise.
1241 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1242 Likewise.
1243 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1244 Likewise.
1245 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1246 Likewise.
1247
377260ba
NS
12482006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1249
1250 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1251 cfloat/m68881 to correct architecture before using it.
1252
cce7653b
NC
12532006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1254
a70ae331 1255 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1256 constant values.
1257
b0796911
PB
12582006-05-15 Paul Brook <paul@codesourcery.com>
1259
1260 * config/tc-arm.c (arm_adjust_symtab): Use
1261 bfd_is_arm_special_symbol_name.
1262
64b607e6
BW
12632006-05-15 Bob Wilson <bob.wilson@acm.org>
1264
1265 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1266 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1267 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1268 Handle errors from calls to xtensa_opcode_is_* functions.
1269
9b3f89ee
TS
12702006-05-14 Thiemo Seufer <ths@mips.com>
1271
1272 * config/tc-mips.c (macro_build): Test for currently active
1273 mips16 option.
1274 (mips16_ip): Reject invalid opcodes.
1275
370b66a1
CD
12762006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1277
1278 * doc/as.texinfo: Rename "Index" to "AS Index",
1279 and "ABORT" to "ABORT (COFF)".
1280
b6895b4f
PB
12812006-05-11 Paul Brook <paul@codesourcery.com>
1282
1283 * config/tc-arm.c (parse_half): New function.
1284 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1285 (parse_operands): Ditto.
1286 (do_mov16): Reject invalid relocations.
1287 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1288 (insns): Replace Iffff with HALF.
1289 (md_apply_fix): Add MOVW and MOVT relocs.
1290 (tc_gen_reloc): Ditto.
1291 * doc/c-arm.texi: Document relocation operators
1292
e28387c3
PB
12932006-05-11 Paul Brook <paul@codesourcery.com>
1294
1295 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1296
89ee2ebe
TS
12972006-05-11 Thiemo Seufer <ths@mips.com>
1298
1299 * config/tc-mips.c (append_insn): Don't check the range of j or
1300 jal addresses.
1301
53baae48
NC
13022006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1303
1304 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1305 relocs against external symbols for WinCE targets.
53baae48
NC
1306 (md_apply_fix): Likewise.
1307
4e2a74a8
TS
13082006-05-09 David Ung <davidu@mips.com>
1309
1310 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1311 j or jal address.
1312
337ff0a5
NC
13132006-05-09 Nick Clifton <nickc@redhat.com>
1314
1315 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1316 against symbols which are not going to be placed into the symbol
1317 table.
1318
8c9f705e
BE
13192006-05-09 Ben Elliston <bje@au.ibm.com>
1320
1321 * expr.c (operand): Remove `if (0 && ..)' statement and
1322 subsequently unused target_op label. Collapse `if (1 || ..)'
1323 statement.
1324 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1325 separately above the switch.
1326
2fd0d2ac
NC
13272006-05-08 Nick Clifton <nickc@redhat.com>
1328
1329 PR gas/2623
1330 * config/tc-msp430.c (line_separator_character): Define as |.
1331
e16bfa71
TS
13322006-05-08 Thiemo Seufer <ths@mips.com>
1333 Nigel Stephens <nigel@mips.com>
1334 David Ung <davidu@mips.com>
1335
1336 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1337 (mips_opts): Likewise.
1338 (file_ase_smartmips): New variable.
1339 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1340 (macro_build): Handle SmartMIPS instructions.
1341 (mips_ip): Likewise.
1342 (md_longopts): Add argument handling for smartmips.
1343 (md_parse_options, mips_after_parse_args): Likewise.
1344 (s_mipsset): Add .set smartmips support.
1345 (md_show_usage): Document -msmartmips/-mno-smartmips.
1346 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1347 .set smartmips.
1348 * doc/c-mips.texi: Likewise.
1349
32638454
AM
13502006-05-08 Alan Modra <amodra@bigpond.net.au>
1351
1352 * write.c (relax_segment): Add pass count arg. Don't error on
1353 negative org/space on first two passes.
1354 (relax_seg_info): New struct.
1355 (relax_seg, write_object_file): Adjust.
1356 * write.h (relax_segment): Update prototype.
1357
b7fc2769
JB
13582006-05-05 Julian Brown <julian@codesourcery.com>
1359
1360 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1361 checking.
1362 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1363 architecture version checks.
1364 (insns): Allow overlapping instructions to be used in VFP mode.
1365
7f841127
L
13662006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1367
1368 PR gas/2598
1369 * config/obj-elf.c (obj_elf_change_section): Allow user
1370 specified SHF_ALPHA_GPREL.
1371
73160847
NC
13722006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1373
1374 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1375 for PMEM related expressions.
1376
56487c55
NC
13772006-05-05 Nick Clifton <nickc@redhat.com>
1378
1379 PR gas/2582
1380 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1381 insertion of a directory separator character into a string at a
1382 given offset. Uses heuristics to decide when to use a backslash
1383 character rather than a forward-slash character.
1384 (dwarf2_directive_loc): Use the macro.
1385 (out_debug_info): Likewise.
1386
d43b4baf
TS
13872006-05-05 Thiemo Seufer <ths@mips.com>
1388 David Ung <davidu@mips.com>
1389
1390 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1391 instruction.
1392 (macro): Add new case M_CACHE_AB.
1393
088fa78e
KH
13942006-05-04 Kazu Hirata <kazu@codesourcery.com>
1395
1396 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1397 (opcode_lookup): Issue a warning for opcode with
1398 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1399 identical to OT_cinfix3.
1400 (TxC3w, TC3w, tC3w): New.
1401 (insns): Use tC3w and TC3w for comparison instructions with
1402 's' suffix.
1403
c9049d30
AM
14042006-05-04 Alan Modra <amodra@bigpond.net.au>
1405
1406 * subsegs.h (struct frchain): Delete frch_seg.
1407 (frchain_root): Delete.
1408 (seg_info): Define as macro.
1409 * subsegs.c (frchain_root): Delete.
1410 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1411 (subsegs_begin, subseg_change): Adjust for above.
1412 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1413 rather than to one big list.
1414 (subseg_get): Don't special case abs, und sections.
1415 (subseg_new, subseg_force_new): Don't set frchainP here.
1416 (seg_info): Delete.
1417 (subsegs_print_statistics): Adjust frag chain control list traversal.
1418 * debug.c (dmp_frags): Likewise.
1419 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1420 at frchain_root. Make use of known frchain ordering.
1421 (last_frag_for_seg): Likewise.
1422 (get_frag_fix): Likewise. Add seg param.
1423 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1424 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1425 (SUB_SEGMENT_ALIGN): Likewise.
1426 (subsegs_finish): Adjust frchain list traversal.
1427 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1428 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1429 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1430 (xtensa_fix_b_j_loop_end_frags): Likewise.
1431 (xtensa_fix_close_loop_end_frags): Likewise.
1432 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1433 (retrieve_segment_info): Delete frch_seg initialisation.
1434
f592407e
AM
14352006-05-03 Alan Modra <amodra@bigpond.net.au>
1436
1437 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1438 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1439 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1440 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1441
df7849c5
JM
14422006-05-02 Joseph Myers <joseph@codesourcery.com>
1443
1444 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1445 here.
1446 (md_apply_fix3): Multiply offset by 4 here for
1447 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1448
2d545b82
L
14492006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1450 Jan Beulich <jbeulich@novell.com>
1451
1452 * config/tc-i386.c (output_invalid_buf): Change size for
1453 unsigned char.
1454 * config/tc-tic30.c (output_invalid_buf): Likewise.
1455
1456 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1457 unsigned char.
1458 * config/tc-tic30.c (output_invalid): Likewise.
1459
38fc1cb1
DJ
14602006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1461
1462 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1463 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1464 (asconfig.texi): Don't set top_srcdir.
1465 * doc/as.texinfo: Don't use top_srcdir.
1466 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1467
2d545b82
L
14682006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1469
1470 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1471 * config/tc-tic30.c (output_invalid_buf): Likewise.
1472
1473 * config/tc-i386.c (output_invalid): Use snprintf instead of
1474 sprintf.
1475 * config/tc-ia64.c (declare_register_set): Likewise.
1476 (emit_one_bundle): Likewise.
1477 (check_dependencies): Likewise.
1478 * config/tc-tic30.c (output_invalid): Likewise.
1479
a8bc6c78
PB
14802006-05-02 Paul Brook <paul@codesourcery.com>
1481
1482 * config/tc-arm.c (arm_optimize_expr): New function.
1483 * config/tc-arm.h (md_optimize_expr): Define
1484 (arm_optimize_expr): Add prototype.
1485 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1486
58633d9a
BE
14872006-05-02 Ben Elliston <bje@au.ibm.com>
1488
22772e33
BE
1489 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1490 field unsigned.
1491
58633d9a
BE
1492 * sb.h (sb_list_vector): Move to sb.c.
1493 * sb.c (free_list): Use type of sb_list_vector directly.
1494 (sb_build): Fix off-by-one error in assertion about `size'.
1495
89cdfe57
BE
14962006-05-01 Ben Elliston <bje@au.ibm.com>
1497
1498 * listing.c (listing_listing): Remove useless loop.
1499 * macro.c (macro_expand): Remove is_positional local variable.
1500 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1501 and simplify surrounding expressions, where possible.
1502 (assign_symbol): Likewise.
1503 (s_weakref): Likewise.
1504 * symbols.c (colon): Likewise.
1505
c35da140
AM
15062006-05-01 James Lemke <jwlemke@wasabisystems.com>
1507
1508 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1509
9bcd4f99
TS
15102006-04-30 Thiemo Seufer <ths@mips.com>
1511 David Ung <davidu@mips.com>
1512
1513 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1514 (mips_immed): New table that records various handling of udi
1515 instruction patterns.
1516 (mips_ip): Adds udi handling.
1517
001ae1a4
AM
15182006-04-28 Alan Modra <amodra@bigpond.net.au>
1519
1520 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1521 of list rather than beginning.
1522
136da414
JB
15232006-04-26 Julian Brown <julian@codesourcery.com>
1524
1525 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1526 (is_quarter_float): Rename from above. Simplify slightly.
1527 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1528 number.
1529 (parse_neon_mov): Parse floating-point constants.
1530 (neon_qfloat_bits): Fix encoding.
1531 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1532 preference to integer encoding when using the F32 type.
1533
dcbf9037
JB
15342006-04-26 Julian Brown <julian@codesourcery.com>
1535
1536 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1537 zero-initialising structures containing it will lead to invalid types).
1538 (arm_it): Add vectype to each operand.
1539 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1540 defined field.
1541 (neon_typed_alias): New structure. Extra information for typed
1542 register aliases.
1543 (reg_entry): Add neon type info field.
1544 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1545 Break out alternative syntax for coprocessor registers, etc. into...
1546 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1547 out from arm_reg_parse.
1548 (parse_neon_type): Move. Return SUCCESS/FAIL.
1549 (first_error): New function. Call to ensure first error which occurs is
1550 reported.
1551 (parse_neon_operand_type): Parse exactly one type.
1552 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1553 (parse_typed_reg_or_scalar): New function. Handle core of both
1554 arm_typed_reg_parse and parse_scalar.
1555 (arm_typed_reg_parse): Parse a register with an optional type.
1556 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1557 result.
1558 (parse_scalar): Parse a Neon scalar with optional type.
1559 (parse_reg_list): Use first_error.
1560 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1561 (neon_alias_types_same): New function. Return true if two (alias) types
1562 are the same.
1563 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1564 of elements.
1565 (insert_reg_alias): Return new reg_entry not void.
1566 (insert_neon_reg_alias): New function. Insert type/index information as
1567 well as register for alias.
1568 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1569 make typed register aliases accordingly.
1570 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1571 of line.
1572 (s_unreq): Delete type information if present.
1573 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1574 (s_arm_unwind_save_mmxwcg): Likewise.
1575 (s_arm_unwind_movsp): Likewise.
1576 (s_arm_unwind_setfp): Likewise.
1577 (parse_shift): Likewise.
1578 (parse_shifter_operand): Likewise.
1579 (parse_address): Likewise.
1580 (parse_tb): Likewise.
1581 (tc_arm_regname_to_dw2regnum): Likewise.
1582 (md_pseudo_table): Add dn, qn.
1583 (parse_neon_mov): Handle typed operands.
1584 (parse_operands): Likewise.
1585 (neon_type_mask): Add N_SIZ.
1586 (N_ALLMODS): New macro.
1587 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1588 (el_type_of_type_chk): Add some safeguards.
1589 (modify_types_allowed): Fix logic bug.
1590 (neon_check_type): Handle operands with types.
1591 (neon_three_same): Remove redundant optional arg handling.
1592 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1593 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1594 (do_neon_step): Adjust accordingly.
1595 (neon_cmode_for_logic_imm): Use first_error.
1596 (do_neon_bitfield): Call neon_check_type.
1597 (neon_dyadic): Rename to...
1598 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1599 to allow modification of type of the destination.
1600 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1601 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1602 (do_neon_compare): Make destination be an untyped bitfield.
1603 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1604 (neon_mul_mac): Return early in case of errors.
1605 (neon_move_immediate): Use first_error.
1606 (neon_mac_reg_scalar_long): Fix type to include scalar.
1607 (do_neon_dup): Likewise.
1608 (do_neon_mov): Likewise (in several places).
1609 (do_neon_tbl_tbx): Fix type.
1610 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1611 (do_neon_ld_dup): Exit early in case of errors and/or use
1612 first_error.
1613 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1614 Handle .dn/.qn directives.
1615 (REGDEF): Add zero for reg_entry neon field.
1616
5287ad62
JB
16172006-04-26 Julian Brown <julian@codesourcery.com>
1618
1619 * config/tc-arm.c (limits.h): Include.
1620 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1621 (fpu_vfp_v3_or_neon_ext): Declare constants.
1622 (neon_el_type): New enumeration of types for Neon vector elements.
1623 (neon_type_el): New struct. Define type and size of a vector element.
1624 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1625 instruction.
1626 (neon_type): Define struct. The type of an instruction.
1627 (arm_it): Add 'vectype' for the current instruction.
1628 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1629 (vfp_sp_reg_pos): Rename to...
1630 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1631 tags.
1632 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1633 (Neon D or Q register).
1634 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1635 register.
1636 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1637 (my_get_expression): Allow above constant as argument to accept
1638 64-bit constants with optional prefix.
1639 (arm_reg_parse): Add extra argument to return the specific type of
1640 register in when either a D or Q register (REG_TYPE_NDQ) is
1641 requested. Can be NULL.
1642 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1643 (parse_reg_list): Update for new arm_reg_parse args.
1644 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1645 (parse_neon_el_struct_list): New function. Parse element/structure
1646 register lists for VLD<n>/VST<n> instructions.
1647 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1648 (s_arm_unwind_save_mmxwr): Likewise.
1649 (s_arm_unwind_save_mmxwcg): Likewise.
1650 (s_arm_unwind_movsp): Likewise.
1651 (s_arm_unwind_setfp): Likewise.
1652 (parse_big_immediate): New function. Parse an immediate, which may be
1653 64 bits wide. Put results in inst.operands[i].
1654 (parse_shift): Update for new arm_reg_parse args.
1655 (parse_address): Likewise. Add parsing of alignment specifiers.
1656 (parse_neon_mov): Parse the operands of a VMOV instruction.
1657 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1658 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1659 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1660 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1661 (parse_operands): Handle new codes above.
1662 (encode_arm_vfp_sp_reg): Rename to...
1663 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1664 selected VFP version only supports D0-D15.
1665 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1666 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1667 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1668 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1669 encode_arm_vfp_reg name, and allow 32 D regs.
1670 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1671 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1672 regs.
1673 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1674 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1675 constant-load and conversion insns introduced with VFPv3.
1676 (neon_tab_entry): New struct.
1677 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1678 those which are the targets of pseudo-instructions.
1679 (neon_opc): Enumerate opcodes, use as indices into...
1680 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1681 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1682 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1683 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1684 neon_enc_tab.
1685 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1686 Neon instructions.
1687 (neon_type_mask): New. Compact type representation for type checking.
1688 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1689 permitted type combinations.
1690 (N_IGNORE_TYPE): New macro.
1691 (neon_check_shape): New function. Check an instruction shape for
1692 multiple alternatives. Return the specific shape for the current
1693 instruction.
1694 (neon_modify_type_size): New function. Modify a vector type and size,
1695 depending on the bit mask in argument 1.
1696 (neon_type_promote): New function. Convert a given "key" type (of an
1697 operand) into the correct type for a different operand, based on a bit
1698 mask.
1699 (type_chk_of_el_type): New function. Convert a type and size into the
1700 compact representation used for type checking.
1701 (el_type_of_type_ckh): New function. Reverse of above (only when a
1702 single bit is set in the bit mask).
1703 (modify_types_allowed): New function. Alter a mask of allowed types
1704 based on a bit mask of modifications.
1705 (neon_check_type): New function. Check the type of the current
1706 instruction against the variable argument list. The "key" type of the
1707 instruction is returned.
1708 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1709 a Neon data-processing instruction depending on whether we're in ARM
1710 mode or Thumb-2 mode.
1711 (neon_logbits): New function.
1712 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1713 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1714 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1715 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1716 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1717 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1718 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1719 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1720 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1721 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1722 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1723 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1724 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1725 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1726 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1727 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1728 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1729 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1730 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1731 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1732 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1733 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1734 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1735 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1736 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1737 helpers.
1738 (parse_neon_type): New function. Parse Neon type specifier.
1739 (opcode_lookup): Allow parsing of Neon type specifiers.
1740 (REGNUM2, REGSETH, REGSET2): New macros.
1741 (reg_names): Add new VFPv3 and Neon registers.
1742 (NUF, nUF, NCE, nCE): New macros for opcode table.
1743 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1744 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1745 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1746 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1747 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1748 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1749 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1750 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1751 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1752 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1753 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1754 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1755 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1756 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1757 fto[us][lh][sd].
1758 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1759 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1760 (arm_option_cpu_value): Add vfp3 and neon.
1761 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1762 VFPv1 attribute.
1763
1946c96e
BW
17642006-04-25 Bob Wilson <bob.wilson@acm.org>
1765
1766 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1767 syntax instead of hardcoded opcodes with ".w18" suffixes.
1768 (wide_branch_opcode): New.
1769 (build_transition): Use it to check for wide branch opcodes with
1770 either ".w18" or ".w15" suffixes.
1771
5033a645
BW
17722006-04-25 Bob Wilson <bob.wilson@acm.org>
1773
1774 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1775 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1776 frag's is_literal flag.
1777
395fa56f
BW
17782006-04-25 Bob Wilson <bob.wilson@acm.org>
1779
1780 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1781
708587a4
KH
17822006-04-23 Kazu Hirata <kazu@codesourcery.com>
1783
1784 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1785 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1786 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1787 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1788 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1789
8463be01
PB
17902005-04-20 Paul Brook <paul@codesourcery.com>
1791
1792 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1793 all targets.
1794 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1795
f26a5955
AM
17962006-04-19 Alan Modra <amodra@bigpond.net.au>
1797
1798 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1799 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1800 Make some cpus unsupported on ELF. Run "make dep-am".
1801 * Makefile.in: Regenerate.
1802
241a6c40
AM
18032006-04-19 Alan Modra <amodra@bigpond.net.au>
1804
1805 * configure.in (--enable-targets): Indent help message.
1806 * configure: Regenerate.
1807
bb8f5920
L
18082006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1809
1810 PR gas/2533
1811 * config/tc-i386.c (i386_immediate): Check illegal immediate
1812 register operand.
1813
23d9d9de
AM
18142006-04-18 Alan Modra <amodra@bigpond.net.au>
1815
64e74474
AM
1816 * config/tc-i386.c: Formatting.
1817 (output_disp, output_imm): ISO C90 params.
1818
6cbe03fb
AM
1819 * frags.c (frag_offset_fixed_p): Constify args.
1820 * frags.h (frag_offset_fixed_p): Ditto.
1821
23d9d9de
AM
1822 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1823 (COFF_MAGIC): Delete.
a37d486e
AM
1824
1825 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1826
e7403566
DJ
18272006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1828
1829 * po/POTFILES.in: Regenerated.
1830
58ab4f3d
MM
18312006-04-16 Mark Mitchell <mark@codesourcery.com>
1832
1833 * doc/as.texinfo: Mention that some .type syntaxes are not
1834 supported on all architectures.
1835
482fd9f9
BW
18362006-04-14 Sterling Augustine <sterling@tensilica.com>
1837
1838 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1839 instructions when such transformations have been disabled.
1840
05d58145
BW
18412006-04-10 Sterling Augustine <sterling@tensilica.com>
1842
1843 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1844 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1845 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1846 decoding the loop instructions. Remove current_offset variable.
1847 (xtensa_fix_short_loop_frags): Likewise.
1848 (min_bytes_to_other_loop_end): Remove current_offset argument.
1849
9e75b3fa
AM
18502006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1851
a37d486e 1852 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1853 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1854
d727e8c2
NC
18552006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1856
1857 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1858 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1859 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1860 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1861 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1862 at90can64, at90usb646, at90usb647, at90usb1286 and
1863 at90usb1287.
1864 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1865
d252fdde
PB
18662006-04-07 Paul Brook <paul@codesourcery.com>
1867
1868 * config/tc-arm.c (parse_operands): Set default error message.
1869
ab1eb5fe
PB
18702006-04-07 Paul Brook <paul@codesourcery.com>
1871
1872 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1873
7ae2971b
PB
18742006-04-07 Paul Brook <paul@codesourcery.com>
1875
1876 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1877
53365c0d
PB
18782006-04-07 Paul Brook <paul@codesourcery.com>
1879
1880 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1881 (move_or_literal_pool): Handle Thumb-2 instructions.
1882 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1883
45aa61fe
AM
18842006-04-07 Alan Modra <amodra@bigpond.net.au>
1885
1886 PR 2512.
1887 * config/tc-i386.c (match_template): Move 64-bit operand tests
1888 inside loop.
1889
108a6f8e
CD
18902006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1891
1892 * po/Make-in: Add install-html target.
1893 * Makefile.am: Add install-html and install-html-recursive targets.
1894 * Makefile.in: Regenerate.
1895 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1896 * configure: Regenerate.
1897 * doc/Makefile.am: Add install-html and install-html-am targets.
1898 * doc/Makefile.in: Regenerate.
1899
ec651a3b
AM
19002006-04-06 Alan Modra <amodra@bigpond.net.au>
1901
1902 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1903 second scan.
1904
910600e9
RS
19052006-04-05 Richard Sandiford <richard@codesourcery.com>
1906 Daniel Jacobowitz <dan@codesourcery.com>
1907
1908 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1909 (GOTT_BASE, GOTT_INDEX): New.
1910 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1911 GOTT_INDEX when generating VxWorks PIC.
1912 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1913 use the generic *-*-vxworks* stanza instead.
1914
99630778
AM
19152006-04-04 Alan Modra <amodra@bigpond.net.au>
1916
1917 PR 997
1918 * frags.c (frag_offset_fixed_p): New function.
1919 * frags.h (frag_offset_fixed_p): Declare.
1920 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1921 (resolve_expression): Likewise.
1922
a02728c8
BW
19232006-04-03 Sterling Augustine <sterling@tensilica.com>
1924
1925 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1926 of the same length but different numbers of slots.
1927
9dfde49d
AS
19282006-03-30 Andreas Schwab <schwab@suse.de>
1929
1930 * configure.in: Fix help string for --enable-targets option.
1931 * configure: Regenerate.
1932
2da12c60
NS
19332006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1934
6d89cc8f
NS
1935 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1936 (m68k_ip): ... here. Use for all chips. Protect against buffer
1937 overrun and avoid excessive copying.
1938
2da12c60
NS
1939 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1940 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1941 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1942 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1943 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1944 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1945 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1946 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1947 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1948 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1949 (struct m68k_cpu): Change chip field to control_regs.
1950 (current_chip): Remove.
1951 (control_regs): New.
1952 (m68k_archs, m68k_extensions): Adjust.
1953 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1954 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1955 (find_cf_chip): Reimplement for new organization of cpu table.
1956 (select_control_regs): Remove.
1957 (mri_chip): Adjust.
1958 (struct save_opts): Save control regs, not chip.
1959 (s_save, s_restore): Adjust.
1960 (m68k_lookup_cpu): Give deprecated warning when necessary.
1961 (m68k_init_arch): Adjust.
1962 (md_show_usage): Adjust for new cpu table organization.
1963
1ac4baed
BS
19642006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1965
1966 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1967 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1968 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1969 "elf/bfin.h".
1970 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1971 (any_gotrel): New rule.
1972 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1973 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1974 "elf/bfin.h".
1975 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1976 (bfin_pic_ptr): New function.
1977 (md_pseudo_table): Add it for ".picptr".
1978 (OPTION_FDPIC): New macro.
1979 (md_longopts): Add -mfdpic.
1980 (md_parse_option): Handle it.
1981 (md_begin): Set BFD flags.
1982 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1983 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1984 us for GOT relocs.
1985 * Makefile.am (bfin-parse.o): Update dependencies.
1986 (DEPTC_bfin_elf): Likewise.
1987 * Makefile.in: Regenerate.
1988
a9d34880
RS
19892006-03-25 Richard Sandiford <richard@codesourcery.com>
1990
1991 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1992 mcfemac instead of mcfmac.
1993
9ca26584
AJ
19942006-03-23 Michael Matz <matz@suse.de>
1995
1996 * config/tc-i386.c (type_names): Correct placement of 'static'.
1997 (reloc): Map some more relocs to their 64 bit counterpart when
1998 size is 8.
1999 (output_insn): Work around breakage if DEBUG386 is defined.
2000 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2001 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2002 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2003 different from i386.
2004 (output_imm): Ditto.
2005 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2006 Imm64.
2007 (md_convert_frag): Jumps can now be larger than 2GB away, error
2008 out in that case.
2009 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2010 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2011
0a44bf69
RS
20122006-03-22 Richard Sandiford <richard@codesourcery.com>
2013 Daniel Jacobowitz <dan@codesourcery.com>
2014 Phil Edwards <phil@codesourcery.com>
2015 Zack Weinberg <zack@codesourcery.com>
2016 Mark Mitchell <mark@codesourcery.com>
2017 Nathan Sidwell <nathan@codesourcery.com>
2018
2019 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2020 (md_begin): Complain about -G being used for PIC. Don't change
2021 the text, data and bss alignments on VxWorks.
2022 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2023 generating VxWorks PIC.
2024 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2025 (macro): Likewise, but do not treat la $25 specially for
2026 VxWorks PIC, and do not handle jal.
2027 (OPTION_MVXWORKS_PIC): New macro.
2028 (md_longopts): Add -mvxworks-pic.
2029 (md_parse_option): Don't complain about using PIC and -G together here.
2030 Handle OPTION_MVXWORKS_PIC.
2031 (md_estimate_size_before_relax): Always use the first relaxation
2032 sequence on VxWorks.
2033 * config/tc-mips.h (VXWORKS_PIC): New.
2034
080eb7fe
PB
20352006-03-21 Paul Brook <paul@codesourcery.com>
2036
2037 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2038
03aaa593
BW
20392006-03-21 Sterling Augustine <sterling@tensilica.com>
2040
2041 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2042 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2043 (get_loop_align_size): New.
2044 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2045 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2046 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2047 (get_noop_aligned_address): Use get_loop_align_size.
2048 (get_aligned_diff): Likewise.
2049
3e94bf1a
PB
20502006-03-21 Paul Brook <paul@codesourcery.com>
2051
2052 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2053
dfa9f0d5
PB
20542006-03-20 Paul Brook <paul@codesourcery.com>
2055
2056 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2057 (do_t_branch): Encode branches inside IT blocks as unconditional.
2058 (do_t_cps): New function.
2059 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2060 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2061 (opcode_lookup): Allow conditional suffixes on all instructions in
2062 Thumb mode.
2063 (md_assemble): Advance condexec state before checking for errors.
2064 (insns): Use do_t_cps.
2065
6e1cb1a6
PB
20662006-03-20 Paul Brook <paul@codesourcery.com>
2067
2068 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2069 outputting the insn.
2070
0a966e2d
JBG
20712006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2072
2073 * config/tc-vax.c: Update copyright year.
2074 * config/tc-vax.h: Likewise.
2075
a49fcc17
JBG
20762006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2077
2078 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2079 make it static.
2080 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2081
f5208ef2
PB
20822006-03-17 Paul Brook <paul@codesourcery.com>
2083
2084 * config/tc-arm.c (insns): Add ldm and stm.
2085
cb4c78d6
BE
20862006-03-17 Ben Elliston <bje@au.ibm.com>
2087
2088 PR gas/2446
2089 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2090
c16d2bf0
PB
20912006-03-16 Paul Brook <paul@codesourcery.com>
2092
2093 * config/tc-arm.c (insns): Add "svc".
2094
80ca4e2c
BW
20952006-03-13 Bob Wilson <bob.wilson@acm.org>
2096
2097 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2098 flag and avoid double underscore prefixes.
2099
3a4a14e9
PB
21002006-03-10 Paul Brook <paul@codesourcery.com>
2101
2102 * config/tc-arm.c (md_begin): Handle EABIv5.
2103 (arm_eabis): Add EF_ARM_EABI_VER5.
2104 * doc/c-arm.texi: Document -meabi=5.
2105
518051dc
BE
21062006-03-10 Ben Elliston <bje@au.ibm.com>
2107
2108 * app.c (do_scrub_chars): Simplify string handling.
2109
00a97672
RS
21102006-03-07 Richard Sandiford <richard@codesourcery.com>
2111 Daniel Jacobowitz <dan@codesourcery.com>
2112 Zack Weinberg <zack@codesourcery.com>
2113 Nathan Sidwell <nathan@codesourcery.com>
2114 Paul Brook <paul@codesourcery.com>
2115 Ricardo Anguiano <anguiano@codesourcery.com>
2116 Phil Edwards <phil@codesourcery.com>
2117
2118 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2119 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2120 R_ARM_ABS12 reloc.
2121 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2122 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2123 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2124
b29757dc
BW
21252006-03-06 Bob Wilson <bob.wilson@acm.org>
2126
2127 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2128 even when using the text-section-literals option.
2129
0b2e31dc
NS
21302006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2131
2132 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2133 and cf.
2134 (m68k_ip): <case 'J'> Check we have some control regs.
2135 (md_parse_option): Allow raw arch switch.
2136 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2137 whether 68881 or cfloat was meant by -mfloat.
2138 (md_show_usage): Adjust extension display.
2139 (m68k_elf_final_processing): Adjust.
2140
df406460
NC
21412006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2142
2143 * config/tc-avr.c (avr_mod_hash_value): New function.
2144 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2145 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2146 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2147 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2148 of (int).
2149 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2150 fixups, abort otherwise.
df406460
NC
2151 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2152 tc_fix_adjustable): Define.
a70ae331 2153
53022e4a
JW
21542006-03-02 James E Wilson <wilson@specifix.com>
2155
2156 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2157 change the template, then clear md.slot[curr].end_of_insn_group.
2158
9f6f925e
JB
21592006-02-28 Jan Beulich <jbeulich@novell.com>
2160
2161 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2162
0e31b3e1
JB
21632006-02-28 Jan Beulich <jbeulich@novell.com>
2164
2165 PR/1070
2166 * macro.c (getstring): Don't treat parentheses special anymore.
2167 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2168 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2169 characters.
2170
10cd14b4
AM
21712006-02-28 Mat <mat@csail.mit.edu>
2172
2173 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2174
63752a75
JJ
21752006-02-27 Jakub Jelinek <jakub@redhat.com>
2176
2177 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2178 field.
2179 (CFI_signal_frame): Define.
2180 (cfi_pseudo_table): Add .cfi_signal_frame.
2181 (dot_cfi): Handle CFI_signal_frame.
2182 (output_cie): Handle cie->signal_frame.
2183 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2184 different. Copy signal_frame from FDE to newly created CIE.
2185 * doc/as.texinfo: Document .cfi_signal_frame.
2186
f7d9e5c3
CD
21872006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2188
2189 * doc/Makefile.am: Add html target.
2190 * doc/Makefile.in: Regenerate.
2191 * po/Make-in: Add html target.
2192
331d2d0d
L
21932006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2194
8502d882 2195 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2196 Instructions.
2197
8502d882 2198 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2199 (CpuUnknownFlags): Add CpuMNI.
2200
10156f83
DM
22012006-02-24 David S. Miller <davem@sunset.davemloft.net>
2202
2203 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2204 (hpriv_reg_table): New table for hyperprivileged registers.
2205 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2206 register encoding.
2207
6772dd07
DD
22082006-02-24 DJ Delorie <dj@redhat.com>
2209
2210 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2211 (tc_gen_reloc): Don't define.
2212 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2213 (OPTION_LINKRELAX): New.
2214 (md_longopts): Add it.
2215 (m32c_relax): New.
2216 (md_parse_options): Set it.
2217 (md_assemble): Emit relaxation relocs as needed.
2218 (md_convert_frag): Emit relaxation relocs as needed.
2219 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2220 (m32c_apply_fix): New.
2221 (tc_gen_reloc): New.
2222 (m32c_force_relocation): Force out jump relocs when relaxing.
2223 (m32c_fix_adjustable): Return false if relaxing.
2224
62b3e311
PB
22252006-02-24 Paul Brook <paul@codesourcery.com>
2226
2227 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2228 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2229 (struct asm_barrier_opt): Define.
2230 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2231 (parse_psr): Accept V7M psr names.
2232 (parse_barrier): New function.
2233 (enum operand_parse_code): Add OP_oBARRIER.
2234 (parse_operands): Implement OP_oBARRIER.
2235 (do_barrier): New function.
2236 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2237 (do_t_cpsi): Add V7M restrictions.
2238 (do_t_mrs, do_t_msr): Validate V7M variants.
2239 (md_assemble): Check for NULL variants.
2240 (v7m_psrs, barrier_opt_names): New tables.
2241 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2242 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2243 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2244 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2245 (struct cpu_arch_ver_table): Define.
2246 (cpu_arch_ver): New.
2247 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2248 Tag_CPU_arch_profile.
2249 * doc/c-arm.texi: Document new cpu and arch options.
2250
59cf82fe
L
22512006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2252
2253 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2254
19a7219f
L
22552006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2256
2257 * config/tc-ia64.c: Update copyright years.
2258
7f3dfb9c
L
22592006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2260
2261 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2262 SDM 2.2.
2263
f40d1643
PB
22642005-02-22 Paul Brook <paul@codesourcery.com>
2265
2266 * config/tc-arm.c (do_pld): Remove incorrect write to
2267 inst.instruction.
2268 (encode_thumb32_addr_mode): Use correct operand.
2269
216d22bc
PB
22702006-02-21 Paul Brook <paul@codesourcery.com>
2271
2272 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2273
d70c5fc7
NC
22742006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2275 Anil Paranjape <anilp1@kpitcummins.com>
2276 Shilin Shakti <shilins@kpitcummins.com>
2277
2278 * Makefile.am: Add xc16x related entry.
2279 * Makefile.in: Regenerate.
2280 * configure.in: Added xc16x related entry.
2281 * configure: Regenerate.
2282 * config/tc-xc16x.h: New file
2283 * config/tc-xc16x.c: New file
2284 * doc/c-xc16x.texi: New file for xc16x
2285 * doc/all.texi: Entry for xc16x
a70ae331 2286 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2287 * NEWS: Announce the support for the new target.
2288
aaa2ab3d
NH
22892006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2290
2291 * configure.tgt: set emulation for mips-*-netbsd*
2292
82de001f
JJ
22932006-02-14 Jakub Jelinek <jakub@redhat.com>
2294
2295 * config.in: Rebuilt.
2296
431ad2d0
BW
22972006-02-13 Bob Wilson <bob.wilson@acm.org>
2298
2299 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2300 from 1, not 0, in error messages.
2301 (md_assemble): Simplify special-case check for ENTRY instructions.
2302 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2303 operand in error message.
2304
94089a50
JM
23052006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2306
2307 * configure.tgt (arm-*-linux-gnueabi*): Change to
2308 arm-*-linux-*eabi*.
2309
52de4c06
NC
23102006-02-10 Nick Clifton <nickc@redhat.com>
2311
70e45ad9
NC
2312 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2313 32-bit value is propagated into the upper bits of a 64-bit long.
2314
52de4c06
NC
2315 * config/tc-arc.c (init_opcode_tables): Fix cast.
2316 (arc_extoper, md_operand): Likewise.
2317
21af2bbd
BW
23182006-02-09 David Heine <dlheine@tensilica.com>
2319
2320 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2321 each relaxation step.
2322
75a706fc 23232006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2324
75a706fc
L
2325 * configure.in (CHECK_DECLS): Add vsnprintf.
2326 * configure: Regenerate.
2327 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2328 include/declare here, but...
2329 * as.h: Move code detecting VARARGS idiom to the top.
2330 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2331 (vsnprintf): Declare if not already declared.
2332
0d474464
L
23332006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2334
2335 * as.c (close_output_file): New.
2336 (main): Register close_output_file with xatexit before
2337 dump_statistics. Don't call output_file_close.
2338
266abb8f
NS
23392006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2340
2341 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2342 mcf5329_control_regs): New.
2343 (not_current_architecture, selected_arch, selected_cpu): New.
2344 (m68k_archs, m68k_extensions): New.
2345 (archs): Renamed to ...
2346 (m68k_cpus): ... here. Adjust.
2347 (n_arches): Remove.
2348 (md_pseudo_table): Add arch and cpu directives.
2349 (find_cf_chip, m68k_ip): Adjust table scanning.
2350 (no_68851, no_68881): Remove.
2351 (md_assemble): Lazily initialize.
2352 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2353 (md_init_after_args): Move functionality to m68k_init_arch.
2354 (mri_chip): Adjust table scanning.
2355 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2356 options with saner parsing.
2357 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2358 m68k_init_arch): New.
2359 (s_m68k_cpu, s_m68k_arch): New.
2360 (md_show_usage): Adjust.
2361 (m68k_elf_final_processing): Set CF EF flags.
2362 * config/tc-m68k.h (m68k_init_after_args): Remove.
2363 (tc_init_after_args): Remove.
2364 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2365 (M68k-Directives): Document .arch and .cpu directives.
2366
134dcee5
AM
23672006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2368
a70ae331
AM
2369 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2370 synonyms for equ and defl.
134dcee5
AM
2371 (z80_cons_fix_new): New function.
2372 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2373 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2374 now handled as pseudo-op rather than an instruction.
2375 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2376 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2377 Add entries for def24,def32,d24,d32.
2378 (md_assemble): Improved error handling.
2379 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2380 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2381 (z80_cons_fix_new): Declare.
a70ae331 2382 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2383 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2384
a9931606
PB
23852006-02-02 Paul Brook <paul@codesourcery.com>
2386
2387 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2388
ef8d22e6
PB
23892005-02-02 Paul Brook <paul@codesourcery.com>
2390
2391 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2392 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2393 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2394 T2_OPCODE_RSB): Define.
2395 (thumb32_negate_data_op): New function.
2396 (md_apply_fix): Use it.
2397
e7da6241
BW
23982006-01-31 Bob Wilson <bob.wilson@acm.org>
2399
2400 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2401 fields.
2402 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2403 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2404 subtracted symbols.
2405 (relaxation_requirements): Add pfinish_frag argument and use it to
2406 replace setting tinsn->record_fix fields.
2407 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2408 and vinsn_to_insnbuf. Remove references to record_fix and
2409 slot_sub_symbols fields.
2410 (xtensa_mark_narrow_branches): Delete unused code.
2411 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2412 a symbol.
2413 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2414 record_fix fields.
2415 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2416 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2417 of the record_fix field. Simplify error messages for unexpected
2418 symbolic operands.
2419 (set_expr_symbol_offset_diff): Delete.
2420
79134647
PB
24212006-01-31 Paul Brook <paul@codesourcery.com>
2422
2423 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2424
e74cfd16
PB
24252006-01-31 Paul Brook <paul@codesourcery.com>
2426 Richard Earnshaw <rearnsha@arm.com>
2427
2428 * config/tc-arm.c: Use arm_feature_set.
2429 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2430 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2431 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2432 New variables.
2433 (insns): Use them.
2434 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2435 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2436 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2437 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2438 feature flags.
2439 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2440 (arm_opts): Move old cpu/arch options from here...
2441 (arm_legacy_opts): ... to here.
2442 (md_parse_option): Search arm_legacy_opts.
2443 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2444 (arm_float_abis, arm_eabis): Make const.
2445
d47d412e
BW
24462006-01-25 Bob Wilson <bob.wilson@acm.org>
2447
2448 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2449
b14273fe
JZ
24502006-01-21 Jie Zhang <jie.zhang@analog.com>
2451
2452 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2453 in load immediate intruction.
2454
39cd1c76
JZ
24552006-01-21 Jie Zhang <jie.zhang@analog.com>
2456
2457 * config/bfin-parse.y (value_match): Use correct conversion
2458 specifications in template string for __FILE__ and __LINE__.
2459 (binary): Ditto.
2460 (unary): Ditto.
2461
67a4f2b7
AO
24622006-01-18 Alexandre Oliva <aoliva@redhat.com>
2463
2464 Introduce TLS descriptors for i386 and x86_64.
2465 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2466 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2467 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2468 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2469 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2470 displacement bits.
2471 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2472 (lex_got): Handle @tlsdesc and @tlscall.
2473 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2474
8ad7c533
NC
24752006-01-11 Nick Clifton <nickc@redhat.com>
2476
2477 Fixes for building on 64-bit hosts:
2478 * config/tc-avr.c (mod_index): New union to allow conversion
2479 between pointers and integers.
2480 (md_begin, avr_ldi_expression): Use it.
2481 * config/tc-i370.c (md_assemble): Add cast for argument to print
2482 statement.
2483 * config/tc-tic54x.c (subsym_substitute): Likewise.
2484 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2485 opindex field of fr_cgen structure into a pointer so that it can
2486 be stored in a frag.
2487 * config/tc-mn10300.c (md_assemble): Likewise.
2488 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2489 types.
2490 * config/tc-v850.c: Replace uses of (int) casts with correct
2491 types.
2492
4dcb3903
L
24932006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2494
2495 PR gas/2117
2496 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2497
e0f6ea40
HPN
24982006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2499
2500 PR gas/2101
2501 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2502 a local-label reference.
2503
e88d958a 2504For older changes see ChangeLog-2005
08d56133
NC
2505\f
2506Local Variables:
2507mode: change-log
2508left-margin: 8
2509fill-column: 74
2510version-control: never
2511End:
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