Commit | Line | Data |
---|---|---|
a3205465 JZ |
1 | 2006-05-25 Jie Zhang <jie.zhang@analog.com> |
2 | ||
3 | * config/bfin-parse.y (asm_1): Better check and deal with | |
4 | vector and scalar Multiply 16-Bit Operands instructions. | |
5 | ||
9b52905e NC |
6 | 2006-05-24 Nick Clifton <nickc@redhat.com> |
7 | ||
8 | * config/tc-hppa.c: Convert to ISO C90 format. | |
9 | * config/tc-hppa.h: Likewise. | |
10 | ||
11 | 2006-05-24 Carlos O'Donell <carlos@systemhalted.org> | |
12 | Randolph Chung <randolph@tausq.org> | |
13 | ||
14 | * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff, | |
15 | is_tls_ieoff, is_tls_leoff): Define. | |
16 | (fix_new_hppa): Handle TLS. | |
17 | (cons_fix_new_hppa): Likewise. | |
18 | (pa_ip): Likewise. | |
19 | (md_apply_fix): Handle TLS relocs. | |
20 | * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS. | |
21 | ||
28c9d252 NC |
22 | 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de> |
23 | ||
24 | * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561. | |
25 | ||
ad3fea08 TS |
26 | 2006-05-23 Thiemo Seufer <ths@mips.com> |
27 | David Ung <davidu@mips.com> | |
28 | Nigel Stephens <nigel@mips.com> | |
29 | ||
30 | [ gas/ChangeLog ] | |
31 | * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. | |
32 | (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, | |
33 | ISA_HAS_MXHC1): New macros. | |
34 | (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of | |
35 | ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. | |
36 | (mips_cpu_info): Change to use combined ASE/IS_ISA flag. | |
37 | (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, | |
38 | MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. | |
39 | (mips_after_parse_args): Change default handling of float register | |
40 | size to account for 32bit code with 64bit FP. Better sanity checking | |
41 | of ISA/ASE/ABI option combinations. | |
42 | (s_mipsset): Support switching of GPR and FPR sizes via | |
43 | .set {g,f}p={32,64,default}. Better sanity checking for .set ASE | |
44 | options. | |
45 | (mips_elf_final_processing): We should record the use of 64bit FP | |
46 | registers in 32bit code but we don't, because ELF header flags are | |
47 | a scarce ressource. | |
48 | (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE | |
49 | extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, | |
50 | 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. | |
51 | (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. | |
52 | * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document | |
53 | missing -march options. Document .set arch=CPU. Move .set smartmips | |
54 | to ASE page. Use @code for .set FOO examples. | |
55 | ||
8b64503a JZ |
56 | 2006-05-23 Jie Zhang <jie.zhang@analog.com> |
57 | ||
58 | * config/tc-bfin.c (bfin_start_line_hook): Bump line counters | |
59 | if needed. | |
60 | ||
403022e0 JZ |
61 | 2006-05-23 Jie Zhang <jie.zhang@analog.com> |
62 | ||
63 | * config/bfin-defs.h (bfin_equals): Remove declaration. | |
64 | * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr". | |
65 | * config/tc-bfin.c (bfin_name_is_register): Remove. | |
66 | (bfin_equals): Remove. | |
67 | * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1. | |
68 | (bfin_name_is_register): Remove declaration. | |
69 | ||
7455baf8 TS |
70 | 2006-05-19 Thiemo Seufer <ths@mips.com> |
71 | Nigel Stephens <nigel@mips.com> | |
72 | ||
73 | * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define. | |
74 | (mips_oddfpreg_ok): New function. | |
75 | (mips_ip): Use it. | |
76 | ||
707bfff6 TS |
77 | 2006-05-19 Thiemo Seufer <ths@mips.com> |
78 | David Ung <davidu@mips.com> | |
79 | ||
80 | * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare. | |
81 | * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS, | |
82 | ISA_HAS_DROR, ISA_HAS_ROR): Reformat. | |
83 | (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC, | |
84 | RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK, | |
85 | RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES, | |
86 | FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES, | |
87 | N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES, | |
88 | SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES, | |
89 | MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names, | |
90 | reg_names_o32, reg_names_n32n64): Define register classes. | |
91 | (reg_lookup): New function, use register classes. | |
92 | (md_begin): Reserve register names in the symbol table. Simplify | |
93 | OBJ_ELF defines. | |
94 | (mips_ip): Fix comment formatting. Handle symbolic COP0 registers. | |
95 | Use reg_lookup. | |
96 | (mips16_ip): Use reg_lookup. | |
97 | (tc_get_register): Likewise. | |
98 | (tc_mips_regname_to_dw2regnum): New function. | |
99 | ||
1df69f4f TS |
100 | 2006-05-19 Thiemo Seufer <ths@mips.com> |
101 | ||
102 | * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum): | |
103 | Un-constify string argument. | |
104 | * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum): | |
105 | Likewise. | |
106 | * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum): | |
107 | Likewise. | |
108 | * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum): | |
109 | Likewise. | |
110 | * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum): | |
111 | Likewise. | |
112 | * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum): | |
113 | Likewise. | |
114 | * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum): | |
115 | Likewise. | |
116 | ||
377260ba NS |
117 | 2006-05-19 Nathan Sidwell <nathan@codesourcery.com> |
118 | ||
119 | * gas/config/tc-m68k.c (m68k_init_arch): Move checking of | |
120 | cfloat/m68881 to correct architecture before using it. | |
121 | ||
cce7653b NC |
122 | 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de> |
123 | ||
124 | * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate | |
125 | constant values. | |
126 | ||
b0796911 PB |
127 | 2006-05-15 Paul Brook <paul@codesourcery.com> |
128 | ||
129 | * config/tc-arm.c (arm_adjust_symtab): Use | |
130 | bfd_is_arm_special_symbol_name. | |
131 | ||
64b607e6 BW |
132 | 2006-05-15 Bob Wilson <bob.wilson@acm.org> |
133 | ||
134 | * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next, | |
135 | xg_assemble_vliw_tokens, xtensa_mark_narrow_branches, | |
136 | xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed): | |
137 | Handle errors from calls to xtensa_opcode_is_* functions. | |
138 | ||
9b3f89ee TS |
139 | 2006-05-14 Thiemo Seufer <ths@mips.com> |
140 | ||
141 | * config/tc-mips.c (macro_build): Test for currently active | |
142 | mips16 option. | |
143 | (mips16_ip): Reject invalid opcodes. | |
144 | ||
370b66a1 CD |
145 | 2006-05-11 Carlos O'Donell <carlos@codesourcery.com> |
146 | ||
147 | * doc/as.texinfo: Rename "Index" to "AS Index", | |
148 | and "ABORT" to "ABORT (COFF)". | |
149 | ||
b6895b4f PB |
150 | 2006-05-11 Paul Brook <paul@codesourcery.com> |
151 | ||
152 | * config/tc-arm.c (parse_half): New function. | |
153 | (operand_parse_code): Remove OP_Iffff. Add OP_HALF. | |
154 | (parse_operands): Ditto. | |
155 | (do_mov16): Reject invalid relocations. | |
156 | (do_t_mov16): Ditto. Use Thumb reloc numbers. | |
157 | (insns): Replace Iffff with HALF. | |
158 | (md_apply_fix): Add MOVW and MOVT relocs. | |
159 | (tc_gen_reloc): Ditto. | |
160 | * doc/c-arm.texi: Document relocation operators | |
161 | ||
e28387c3 PB |
162 | 2006-05-11 Paul Brook <paul@codesourcery.com> |
163 | ||
164 | * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols. | |
165 | ||
89ee2ebe TS |
166 | 2006-05-11 Thiemo Seufer <ths@mips.com> |
167 | ||
168 | * config/tc-mips.c (append_insn): Don't check the range of j or | |
169 | jal addresses. | |
170 | ||
53baae48 NC |
171 | 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt> |
172 | ||
173 | * config/tc-arm.c (md_pcrel_from_section): Force a bias for | |
174 | relocs against external symbols for WinCE targets. | |
175 | (md_apply_fix): Likewise. | |
176 | ||
4e2a74a8 TS |
177 | 2006-05-09 David Ung <davidu@mips.com> |
178 | ||
179 | * config/tc-mips.c (append_insn): Only warn about an out-of-range | |
180 | j or jal address. | |
181 | ||
337ff0a5 NC |
182 | 2006-05-09 Nick Clifton <nickc@redhat.com> |
183 | ||
184 | * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups | |
185 | against symbols which are not going to be placed into the symbol | |
186 | table. | |
187 | ||
8c9f705e BE |
188 | 2006-05-09 Ben Elliston <bje@au.ibm.com> |
189 | ||
190 | * expr.c (operand): Remove `if (0 && ..)' statement and | |
191 | subsequently unused target_op label. Collapse `if (1 || ..)' | |
192 | statement. | |
193 | * app.c (do_scrub_chars): Remove unused case 0, as it is handled | |
194 | separately above the switch. | |
195 | ||
2fd0d2ac NC |
196 | 2006-05-08 Nick Clifton <nickc@redhat.com> |
197 | ||
198 | PR gas/2623 | |
199 | * config/tc-msp430.c (line_separator_character): Define as |. | |
200 | ||
e16bfa71 TS |
201 | 2006-05-08 Thiemo Seufer <ths@mips.com> |
202 | Nigel Stephens <nigel@mips.com> | |
203 | David Ung <davidu@mips.com> | |
204 | ||
205 | * config/tc-mips.c (mips_set_options): Add ase_smartmips flag. | |
206 | (mips_opts): Likewise. | |
207 | (file_ase_smartmips): New variable. | |
208 | (ISA_HAS_ROR): SmartMIPS implements rotate instructions. | |
209 | (macro_build): Handle SmartMIPS instructions. | |
210 | (mips_ip): Likewise. | |
211 | (md_longopts): Add argument handling for smartmips. | |
212 | (md_parse_options, mips_after_parse_args): Likewise. | |
213 | (s_mipsset): Add .set smartmips support. | |
214 | (md_show_usage): Document -msmartmips/-mno-smartmips. | |
215 | * doc/as.texinfo: Document -msmartmips/-mno-smartmips and | |
216 | .set smartmips. | |
217 | * doc/c-mips.texi: Likewise. | |
218 | ||
32638454 AM |
219 | 2006-05-08 Alan Modra <amodra@bigpond.net.au> |
220 | ||
221 | * write.c (relax_segment): Add pass count arg. Don't error on | |
222 | negative org/space on first two passes. | |
223 | (relax_seg_info): New struct. | |
224 | (relax_seg, write_object_file): Adjust. | |
225 | * write.h (relax_segment): Update prototype. | |
226 | ||
b7fc2769 JB |
227 | 2006-05-05 Julian Brown <julian@codesourcery.com> |
228 | ||
229 | * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds | |
230 | checking. | |
231 | (do_neon_mov): Enable several VMOV variants for VFP. Add suitable | |
232 | architecture version checks. | |
233 | (insns): Allow overlapping instructions to be used in VFP mode. | |
234 | ||
7f841127 L |
235 | 2006-05-05 H.J. Lu <hongjiu.lu@intel.com> |
236 | ||
237 | PR gas/2598 | |
238 | * config/obj-elf.c (obj_elf_change_section): Allow user | |
239 | specified SHF_ALPHA_GPREL. | |
240 | ||
73160847 NC |
241 | 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de> |
242 | ||
243 | * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups | |
244 | for PMEM related expressions. | |
245 | ||
56487c55 NC |
246 | 2006-05-05 Nick Clifton <nickc@redhat.com> |
247 | ||
248 | PR gas/2582 | |
249 | * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the | |
250 | insertion of a directory separator character into a string at a | |
251 | given offset. Uses heuristics to decide when to use a backslash | |
252 | character rather than a forward-slash character. | |
253 | (dwarf2_directive_loc): Use the macro. | |
254 | (out_debug_info): Likewise. | |
255 | ||
d43b4baf TS |
256 | 2006-05-05 Thiemo Seufer <ths@mips.com> |
257 | David Ung <davidu@mips.com> | |
258 | ||
259 | * config/tc-mips.c (macro_build): Add case 'k' to handle cache | |
260 | instruction. | |
261 | (macro): Add new case M_CACHE_AB. | |
262 | ||
088fa78e KH |
263 | 2006-05-04 Kazu Hirata <kazu@codesourcery.com> |
264 | ||
265 | * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated. | |
266 | (opcode_lookup): Issue a warning for opcode with | |
267 | OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated | |
268 | identical to OT_cinfix3. | |
269 | (TxC3w, TC3w, tC3w): New. | |
270 | (insns): Use tC3w and TC3w for comparison instructions with | |
271 | 's' suffix. | |
272 | ||
c9049d30 AM |
273 | 2006-05-04 Alan Modra <amodra@bigpond.net.au> |
274 | ||
275 | * subsegs.h (struct frchain): Delete frch_seg. | |
276 | (frchain_root): Delete. | |
277 | (seg_info): Define as macro. | |
278 | * subsegs.c (frchain_root): Delete. | |
279 | (abs_seg_info, und_seg_info, absolute_frchain): Delete. | |
280 | (subsegs_begin, subseg_change): Adjust for above. | |
281 | (subseg_set_rest): Likewise. Add new frchain structs to seginfo | |
282 | rather than to one big list. | |
283 | (subseg_get): Don't special case abs, und sections. | |
284 | (subseg_new, subseg_force_new): Don't set frchainP here. | |
285 | (seg_info): Delete. | |
286 | (subsegs_print_statistics): Adjust frag chain control list traversal. | |
287 | * debug.c (dmp_frags): Likewise. | |
288 | * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag | |
289 | at frchain_root. Make use of known frchain ordering. | |
290 | (last_frag_for_seg): Likewise. | |
291 | (get_frag_fix): Likewise. Add seg param. | |
292 | (process_entries, out_debug_aranges): Adjust get_frag_fix calls. | |
293 | * write.c (chain_frchains_together_1): Adjust for struct frchain. | |
294 | (SUB_SEGMENT_ALIGN): Likewise. | |
295 | (subsegs_finish): Adjust frchain list traversal. | |
296 | * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise. | |
297 | (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise. | |
298 | (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise. | |
299 | (xtensa_fix_b_j_loop_end_frags): Likewise. | |
300 | (xtensa_fix_close_loop_end_frags): Likewise. | |
301 | (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise. | |
302 | (retrieve_segment_info): Delete frch_seg initialisation. | |
303 | ||
f592407e AM |
304 | 2006-05-03 Alan Modra <amodra@bigpond.net.au> |
305 | ||
306 | * subsegs.c (subseg_get): Don't call obj_sec_set_private_data. | |
307 | * config/obj-elf.h (obj_sec_set_private_data): Delete. | |
308 | * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol. | |
309 | * config/tc-mn10300.c (tc_gen_reloc): Likewise. | |
310 | ||
df7849c5 JM |
311 | 2006-05-02 Joseph Myers <joseph@codesourcery.com> |
312 | ||
313 | * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4 | |
314 | here. | |
315 | (md_apply_fix3): Multiply offset by 4 here for | |
316 | BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. | |
317 | ||
2d545b82 L |
318 | 2006-05-02 H.J. Lu <hongjiu.lu@intel.com> |
319 | Jan Beulich <jbeulich@novell.com> | |
320 | ||
321 | * config/tc-i386.c (output_invalid_buf): Change size for | |
322 | unsigned char. | |
323 | * config/tc-tic30.c (output_invalid_buf): Likewise. | |
324 | ||
325 | * config/tc-i386.c (output_invalid): Cast none-ascii char to | |
326 | unsigned char. | |
327 | * config/tc-tic30.c (output_invalid): Likewise. | |
328 | ||
38fc1cb1 DJ |
329 | 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com> |
330 | ||
331 | * doc/Makefile.am (AM_MAKEINFOFLAGS): New. | |
332 | (TEXI2POD): Use AM_MAKEINFOFLAGS. | |
333 | (asconfig.texi): Don't set top_srcdir. | |
334 | * doc/as.texinfo: Don't use top_srcdir. | |
335 | * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated. | |
336 | ||
2d545b82 L |
337 | 2006-05-02 H.J. Lu <hongjiu.lu@intel.com> |
338 | ||
339 | * config/tc-i386.c (output_invalid_buf): Change size to 16. | |
340 | * config/tc-tic30.c (output_invalid_buf): Likewise. | |
341 | ||
342 | * config/tc-i386.c (output_invalid): Use snprintf instead of | |
343 | sprintf. | |
344 | * config/tc-ia64.c (declare_register_set): Likewise. | |
345 | (emit_one_bundle): Likewise. | |
346 | (check_dependencies): Likewise. | |
347 | * config/tc-tic30.c (output_invalid): Likewise. | |
348 | ||
a8bc6c78 PB |
349 | 2006-05-02 Paul Brook <paul@codesourcery.com> |
350 | ||
351 | * config/tc-arm.c (arm_optimize_expr): New function. | |
352 | * config/tc-arm.h (md_optimize_expr): Define | |
353 | (arm_optimize_expr): Add prototype. | |
354 | (TC_FORCE_RELOCATION_SUB_SAME): Define. | |
355 | ||
58633d9a BE |
356 | 2006-05-02 Ben Elliston <bje@au.ibm.com> |
357 | ||
22772e33 BE |
358 | * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit |
359 | field unsigned. | |
360 | ||
58633d9a BE |
361 | * sb.h (sb_list_vector): Move to sb.c. |
362 | * sb.c (free_list): Use type of sb_list_vector directly. | |
363 | (sb_build): Fix off-by-one error in assertion about `size'. | |
364 | ||
89cdfe57 BE |
365 | 2006-05-01 Ben Elliston <bje@au.ibm.com> |
366 | ||
367 | * listing.c (listing_listing): Remove useless loop. | |
368 | * macro.c (macro_expand): Remove is_positional local variable. | |
369 | * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1 | |
370 | and simplify surrounding expressions, where possible. | |
371 | (assign_symbol): Likewise. | |
372 | (s_weakref): Likewise. | |
373 | * symbols.c (colon): Likewise. | |
374 | ||
c35da140 AM |
375 | 2006-05-01 James Lemke <jwlemke@wasabisystems.com> |
376 | ||
377 | * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL. | |
378 | ||
9bcd4f99 TS |
379 | 2006-04-30 Thiemo Seufer <ths@mips.com> |
380 | David Ung <davidu@mips.com> | |
381 | ||
382 | * config/tc-mips.c (validate_mips_insn): Handling of udi cases. | |
383 | (mips_immed): New table that records various handling of udi | |
384 | instruction patterns. | |
385 | (mips_ip): Adds udi handling. | |
386 | ||
001ae1a4 AM |
387 | 2006-04-28 Alan Modra <amodra@bigpond.net.au> |
388 | ||
389 | * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end | |
390 | of list rather than beginning. | |
391 | ||
136da414 JB |
392 | 2006-04-26 Julian Brown <julian@codesourcery.com> |
393 | ||
394 | * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to... | |
395 | (is_quarter_float): Rename from above. Simplify slightly. | |
396 | (parse_qfloat_immediate): Parse a "quarter precision" floating-point | |
397 | number. | |
398 | (parse_neon_mov): Parse floating-point constants. | |
399 | (neon_qfloat_bits): Fix encoding. | |
400 | (neon_cmode_for_move_imm): Tweak to use floating-point encoding in | |
401 | preference to integer encoding when using the F32 type. | |
402 | ||
dcbf9037 JB |
403 | 2006-04-26 Julian Brown <julian@codesourcery.com> |
404 | ||
405 | * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so | |
406 | zero-initialising structures containing it will lead to invalid types). | |
407 | (arm_it): Add vectype to each operand. | |
408 | (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias | |
409 | defined field. | |
410 | (neon_typed_alias): New structure. Extra information for typed | |
411 | register aliases. | |
412 | (reg_entry): Add neon type info field. | |
413 | (arm_reg_parse): Remove RTYPE argument (revert to previous arguments). | |
414 | Break out alternative syntax for coprocessor registers, etc. into... | |
415 | (arm_reg_alt_syntax): New function. Alternate syntax handling broken | |
416 | out from arm_reg_parse. | |
417 | (parse_neon_type): Move. Return SUCCESS/FAIL. | |
418 | (first_error): New function. Call to ensure first error which occurs is | |
419 | reported. | |
420 | (parse_neon_operand_type): Parse exactly one type. | |
421 | (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move. | |
422 | (parse_typed_reg_or_scalar): New function. Handle core of both | |
423 | arm_typed_reg_parse and parse_scalar. | |
424 | (arm_typed_reg_parse): Parse a register with an optional type. | |
425 | (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar | |
426 | result. | |
427 | (parse_scalar): Parse a Neon scalar with optional type. | |
428 | (parse_reg_list): Use first_error. | |
429 | (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse. | |
430 | (neon_alias_types_same): New function. Return true if two (alias) types | |
431 | are the same. | |
432 | (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type | |
433 | of elements. | |
434 | (insert_reg_alias): Return new reg_entry not void. | |
435 | (insert_neon_reg_alias): New function. Insert type/index information as | |
436 | well as register for alias. | |
437 | (create_neon_reg_alias): New function. Parse .dn/.qn directives and | |
438 | make typed register aliases accordingly. | |
439 | (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start | |
440 | of line. | |
441 | (s_unreq): Delete type information if present. | |
442 | (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls. | |
443 | (s_arm_unwind_save_mmxwcg): Likewise. | |
444 | (s_arm_unwind_movsp): Likewise. | |
445 | (s_arm_unwind_setfp): Likewise. | |
446 | (parse_shift): Likewise. | |
447 | (parse_shifter_operand): Likewise. | |
448 | (parse_address): Likewise. | |
449 | (parse_tb): Likewise. | |
450 | (tc_arm_regname_to_dw2regnum): Likewise. | |
451 | (md_pseudo_table): Add dn, qn. | |
452 | (parse_neon_mov): Handle typed operands. | |
453 | (parse_operands): Likewise. | |
454 | (neon_type_mask): Add N_SIZ. | |
455 | (N_ALLMODS): New macro. | |
456 | (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error. | |
457 | (el_type_of_type_chk): Add some safeguards. | |
458 | (modify_types_allowed): Fix logic bug. | |
459 | (neon_check_type): Handle operands with types. | |
460 | (neon_three_same): Remove redundant optional arg handling. | |
461 | (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm) | |
462 | (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute) | |
463 | (do_neon_step): Adjust accordingly. | |
464 | (neon_cmode_for_logic_imm): Use first_error. | |
465 | (do_neon_bitfield): Call neon_check_type. | |
466 | (neon_dyadic): Rename to... | |
467 | (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield | |
468 | to allow modification of type of the destination. | |
469 | (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d) | |
470 | (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly. | |
471 | (do_neon_compare): Make destination be an untyped bitfield. | |
472 | (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX. | |
473 | (neon_mul_mac): Return early in case of errors. | |
474 | (neon_move_immediate): Use first_error. | |
475 | (neon_mac_reg_scalar_long): Fix type to include scalar. | |
476 | (do_neon_dup): Likewise. | |
477 | (do_neon_mov): Likewise (in several places). | |
478 | (do_neon_tbl_tbx): Fix type. | |
479 | (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane) | |
480 | (do_neon_ld_dup): Exit early in case of errors and/or use | |
481 | first_error. | |
482 | (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL. | |
483 | Handle .dn/.qn directives. | |
484 | (REGDEF): Add zero for reg_entry neon field. | |
485 | ||
5287ad62 JB |
486 | 2006-04-26 Julian Brown <julian@codesourcery.com> |
487 | ||
488 | * config/tc-arm.c (limits.h): Include. | |
489 | (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1) | |
490 | (fpu_vfp_v3_or_neon_ext): Declare constants. | |
491 | (neon_el_type): New enumeration of types for Neon vector elements. | |
492 | (neon_type_el): New struct. Define type and size of a vector element. | |
493 | (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per | |
494 | instruction. | |
495 | (neon_type): Define struct. The type of an instruction. | |
496 | (arm_it): Add 'vectype' for the current instruction. | |
497 | (isscalar, immisalign, regisimm, isquad): New predicates for operands. | |
498 | (vfp_sp_reg_pos): Rename to... | |
499 | (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn | |
500 | tags. | |
501 | (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ | |
502 | (Neon D or Q register). | |
503 | (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D | |
504 | register. | |
505 | (GE_OPT_PREFIX_BIG): Define constant, for use in... | |
506 | (my_get_expression): Allow above constant as argument to accept | |
507 | 64-bit constants with optional prefix. | |
508 | (arm_reg_parse): Add extra argument to return the specific type of | |
509 | register in when either a D or Q register (REG_TYPE_NDQ) is | |
510 | requested. Can be NULL. | |
511 | (parse_scalar): New function. Parse Neon scalar (vector reg and index). | |
512 | (parse_reg_list): Update for new arm_reg_parse args. | |
513 | (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists. | |
514 | (parse_neon_el_struct_list): New function. Parse element/structure | |
515 | register lists for VLD<n>/VST<n> instructions. | |
516 | (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args. | |
517 | (s_arm_unwind_save_mmxwr): Likewise. | |
518 | (s_arm_unwind_save_mmxwcg): Likewise. | |
519 | (s_arm_unwind_movsp): Likewise. | |
520 | (s_arm_unwind_setfp): Likewise. | |
521 | (parse_big_immediate): New function. Parse an immediate, which may be | |
522 | 64 bits wide. Put results in inst.operands[i]. | |
523 | (parse_shift): Update for new arm_reg_parse args. | |
524 | (parse_address): Likewise. Add parsing of alignment specifiers. | |
525 | (parse_neon_mov): Parse the operands of a VMOV instruction. | |
526 | (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST, | |
527 | OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC, | |
528 | OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64, | |
529 | OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ. | |
530 | (parse_operands): Handle new codes above. | |
531 | (encode_arm_vfp_sp_reg): Rename to... | |
532 | (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if | |
533 | selected VFP version only supports D0-D15. | |
534 | (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z) | |
535 | (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2) | |
536 | (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst) | |
537 | (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new | |
538 | encode_arm_vfp_reg name, and allow 32 D regs. | |
539 | (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm) | |
540 | (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D | |
541 | regs. | |
542 | (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16) | |
543 | (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle | |
544 | constant-load and conversion insns introduced with VFPv3. | |
545 | (neon_tab_entry): New struct. | |
546 | (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and | |
547 | those which are the targets of pseudo-instructions. | |
548 | (neon_opc): Enumerate opcodes, use as indices into... | |
549 | (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB. | |
550 | (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT) | |
551 | (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE) | |
552 | (NEON_ENC_DUP): Define meaningful helper macros to look up values in | |
553 | neon_enc_tab. | |
554 | (neon_shape): Enumerate shapes (permitted register widths, etc.) for | |
555 | Neon instructions. | |
556 | (neon_type_mask): New. Compact type representation for type checking. | |
557 | (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common | |
558 | permitted type combinations. | |
559 | (N_IGNORE_TYPE): New macro. | |
560 | (neon_check_shape): New function. Check an instruction shape for | |
561 | multiple alternatives. Return the specific shape for the current | |
562 | instruction. | |
563 | (neon_modify_type_size): New function. Modify a vector type and size, | |
564 | depending on the bit mask in argument 1. | |
565 | (neon_type_promote): New function. Convert a given "key" type (of an | |
566 | operand) into the correct type for a different operand, based on a bit | |
567 | mask. | |
568 | (type_chk_of_el_type): New function. Convert a type and size into the | |
569 | compact representation used for type checking. | |
570 | (el_type_of_type_ckh): New function. Reverse of above (only when a | |
571 | single bit is set in the bit mask). | |
572 | (modify_types_allowed): New function. Alter a mask of allowed types | |
573 | based on a bit mask of modifications. | |
574 | (neon_check_type): New function. Check the type of the current | |
575 | instruction against the variable argument list. The "key" type of the | |
576 | instruction is returned. | |
577 | (neon_dp_fixup): New function. Fill in and modify instruction bits for | |
578 | a Neon data-processing instruction depending on whether we're in ARM | |
579 | mode or Thumb-2 mode. | |
580 | (neon_logbits): New function. | |
581 | (neon_three_same, neon_two_same, do_neon_dyadic_i_su) | |
582 | (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm) | |
583 | (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes) | |
584 | (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits) | |
585 | (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size) | |
586 | (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su) | |
587 | (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d) | |
588 | (do_neon_addsub_if_i, neon_exchange_operands, neon_compare) | |
589 | (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul) | |
590 | (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul) | |
591 | (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv) | |
592 | (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri) | |
593 | (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun) | |
594 | (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn) | |
595 | (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt) | |
596 | (neon_move_immediate, do_neon_mvn, neon_mixed_length) | |
597 | (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long) | |
598 | (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull) | |
599 | (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov) | |
600 | (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp) | |
601 | (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est) | |
602 | (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx) | |
603 | (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave) | |
604 | (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup) | |
605 | (do_neon_ldx_stx): New functions. Neon bit encoding and encoding | |
606 | helpers. | |
607 | (parse_neon_type): New function. Parse Neon type specifier. | |
608 | (opcode_lookup): Allow parsing of Neon type specifiers. | |
609 | (REGNUM2, REGSETH, REGSET2): New macros. | |
610 | (reg_names): Add new VFPv3 and Neon registers. | |
611 | (NUF, nUF, NCE, nCE): New macros for opcode table. | |
612 | (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh, | |
613 | fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd, | |
614 | fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd. | |
615 | Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl, | |
616 | vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif, | |
617 | vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla, | |
618 | vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt, | |
619 | vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli, | |
620 | vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, | |
621 | vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, | |
622 | vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, | |
623 | vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, | |
624 | vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, | |
625 | vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], | |
626 | fto[us][lh][sd]. | |
627 | (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args. | |
628 | (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8. | |
629 | (arm_option_cpu_value): Add vfp3 and neon. | |
630 | (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix | |
631 | VFPv1 attribute. | |
632 | ||
1946c96e BW |
633 | 2006-04-25 Bob Wilson <bob.wilson@acm.org> |
634 | ||
635 | * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>" | |
636 | syntax instead of hardcoded opcodes with ".w18" suffixes. | |
637 | (wide_branch_opcode): New. | |
638 | (build_transition): Use it to check for wide branch opcodes with | |
639 | either ".w18" or ".w15" suffixes. | |
640 | ||
5033a645 BW |
641 | 2006-04-25 Bob Wilson <bob.wilson@acm.org> |
642 | ||
643 | * config/tc-xtensa.c (xtensa_create_literal_symbol, | |
644 | xg_assemble_literal, xg_assemble_literal_space): Do not set the | |
645 | frag's is_literal flag. | |
646 | ||
395fa56f BW |
647 | 2006-04-25 Bob Wilson <bob.wilson@acm.org> |
648 | ||
649 | * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default. | |
650 | ||
708587a4 KH |
651 | 2006-04-23 Kazu Hirata <kazu@codesourcery.com> |
652 | ||
653 | * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c, | |
654 | config/tc-cris.c, config/tc-crx.c, config/tc-i386.c, | |
655 | config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h, | |
656 | config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c, | |
657 | config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos. | |
658 | ||
8463be01 PB |
659 | 2005-04-20 Paul Brook <paul@codesourcery.com> |
660 | ||
661 | * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for | |
662 | all targets. | |
663 | (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets. | |
664 | ||
f26a5955 AM |
665 | 2006-04-19 Alan Modra <amodra@bigpond.net.au> |
666 | ||
667 | * Makefile.am (CPU_TYPES): Add maxq and mt. Sort. | |
668 | (CPU_OBJ_VALID): Change sense of COFF test to default to invalid. | |
669 | Make some cpus unsupported on ELF. Run "make dep-am". | |
670 | * Makefile.in: Regenerate. | |
671 | ||
241a6c40 AM |
672 | 2006-04-19 Alan Modra <amodra@bigpond.net.au> |
673 | ||
674 | * configure.in (--enable-targets): Indent help message. | |
675 | * configure: Regenerate. | |
676 | ||
bb8f5920 L |
677 | 2006-04-18 H.J. Lu <hongjiu.lu@intel.com> |
678 | ||
679 | PR gas/2533 | |
680 | * config/tc-i386.c (i386_immediate): Check illegal immediate | |
681 | register operand. | |
682 | ||
23d9d9de AM |
683 | 2006-04-18 Alan Modra <amodra@bigpond.net.au> |
684 | ||
64e74474 AM |
685 | * config/tc-i386.c: Formatting. |
686 | (output_disp, output_imm): ISO C90 params. | |
687 | ||
6cbe03fb AM |
688 | * frags.c (frag_offset_fixed_p): Constify args. |
689 | * frags.h (frag_offset_fixed_p): Ditto. | |
690 | ||
23d9d9de AM |
691 | * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete. |
692 | (COFF_MAGIC): Delete. | |
a37d486e AM |
693 | |
694 | * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete. | |
695 | ||
e7403566 DJ |
696 | 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com> |
697 | ||
698 | * po/POTFILES.in: Regenerated. | |
699 | ||
58ab4f3d MM |
700 | 2006-04-16 Mark Mitchell <mark@codesourcery.com> |
701 | ||
702 | * doc/as.texinfo: Mention that some .type syntaxes are not | |
703 | supported on all architectures. | |
704 | ||
482fd9f9 BW |
705 | 2006-04-14 Sterling Augustine <sterling@tensilica.com> |
706 | ||
707 | * config/tc-xtensa.c (emit_single_op): Do not relax MOVI | |
708 | instructions when such transformations have been disabled. | |
709 | ||
05d58145 BW |
710 | 2006-04-10 Sterling Augustine <sterling@tensilica.com> |
711 | ||
712 | * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target | |
713 | symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags. | |
714 | (xtensa_fix_close_loop_end_frags): Use the recorded values instead of | |
715 | decoding the loop instructions. Remove current_offset variable. | |
716 | (xtensa_fix_short_loop_frags): Likewise. | |
717 | (min_bytes_to_other_loop_end): Remove current_offset argument. | |
718 | ||
9e75b3fa AM |
719 | 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl> |
720 | ||
a37d486e | 721 | * config/tc-z80.c (z80_optimize_expr): Removed. |
9e75b3fa AM |
722 | * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed. |
723 | ||
d727e8c2 NC |
724 | 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de> |
725 | ||
726 | * gas/config/tc-avr.c (mcu_types): Add support for attiny261, | |
727 | attiny461, attiny861, attiny25, attiny45, attiny85,attiny24, | |
728 | attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324, | |
729 | atmega644, atmega329, atmega3290, atmega649, atmega6490, | |
730 | atmega406, atmega640, atmega1280, atmega1281, at90can32, | |
731 | at90can64, at90usb646, at90usb647, at90usb1286 and | |
732 | at90usb1287. | |
733 | Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx. | |
734 | ||
d252fdde PB |
735 | 2006-04-07 Paul Brook <paul@codesourcery.com> |
736 | ||
737 | * config/tc-arm.c (parse_operands): Set default error message. | |
738 | ||
ab1eb5fe PB |
739 | 2006-04-07 Paul Brook <paul@codesourcery.com> |
740 | ||
741 | * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL. | |
742 | ||
7ae2971b PB |
743 | 2006-04-07 Paul Brook <paul@codesourcery.com> |
744 | ||
745 | * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction. | |
746 | ||
53365c0d PB |
747 | 2006-04-07 Paul Brook <paul@codesourcery.com> |
748 | ||
749 | * config/tc-arm.c (THUMB2_LOAD_BIT): Define. | |
750 | (move_or_literal_pool): Handle Thumb-2 instructions. | |
751 | (do_t_ldst): Call move_or_literal_pool for =N addressing modes. | |
752 | ||
45aa61fe AM |
753 | 2006-04-07 Alan Modra <amodra@bigpond.net.au> |
754 | ||
755 | PR 2512. | |
756 | * config/tc-i386.c (match_template): Move 64-bit operand tests | |
757 | inside loop. | |
758 | ||
108a6f8e CD |
759 | 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> |
760 | ||
761 | * po/Make-in: Add install-html target. | |
762 | * Makefile.am: Add install-html and install-html-recursive targets. | |
763 | * Makefile.in: Regenerate. | |
764 | * configure.in: AC_SUBST datarootdir, docdir, htmldir. | |
765 | * configure: Regenerate. | |
766 | * doc/Makefile.am: Add install-html and install-html-am targets. | |
767 | * doc/Makefile.in: Regenerate. | |
768 | ||
ec651a3b AM |
769 | 2006-04-06 Alan Modra <amodra@bigpond.net.au> |
770 | ||
771 | * frags.c (frag_offset_fixed_p): Reinitialise offset before | |
772 | second scan. | |
773 | ||
910600e9 RS |
774 | 2006-04-05 Richard Sandiford <richard@codesourcery.com> |
775 | Daniel Jacobowitz <dan@codesourcery.com> | |
776 | ||
777 | * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS. | |
778 | (GOTT_BASE, GOTT_INDEX): New. | |
779 | (tc_gen_reloc): Don't alter relocations against GOTT_BASE and | |
780 | GOTT_INDEX when generating VxWorks PIC. | |
781 | * configure.tgt (sparc*-*-vxworks*): Remove this special case; | |
782 | use the generic *-*-vxworks* stanza instead. | |
783 | ||
99630778 AM |
784 | 2006-04-04 Alan Modra <amodra@bigpond.net.au> |
785 | ||
786 | PR 997 | |
787 | * frags.c (frag_offset_fixed_p): New function. | |
788 | * frags.h (frag_offset_fixed_p): Declare. | |
789 | * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction. | |
790 | (resolve_expression): Likewise. | |
791 | ||
a02728c8 BW |
792 | 2006-04-03 Sterling Augustine <sterling@tensilica.com> |
793 | ||
794 | * config/tc-xtensa.c (init_op_placement_info_table): Check for formats | |
795 | of the same length but different numbers of slots. | |
796 | ||
9dfde49d AS |
797 | 2006-03-30 Andreas Schwab <schwab@suse.de> |
798 | ||
799 | * configure.in: Fix help string for --enable-targets option. | |
800 | * configure: Regenerate. | |
801 | ||
2da12c60 NS |
802 | 2006-03-28 Nathan Sidwell <nathan@codesourcery.com> |
803 | ||
6d89cc8f NS |
804 | * gas/config/tc-m68k.c (find_cf_chip): Merge into ... |
805 | (m68k_ip): ... here. Use for all chips. Protect against buffer | |
806 | overrun and avoid excessive copying. | |
807 | ||
2da12c60 NS |
808 | * config/tc-m68k.c (m68000_control_regs, m68010_control_regs, |
809 | m68020_control_regs, m68040_control_regs, m68060_control_regs, | |
810 | mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs, | |
811 | mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs, | |
812 | mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ... | |
813 | (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl, | |
814 | mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl, | |
815 | mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl, | |
816 | mcf5282_ctrl, mcfv4e_ctrl): ... these. | |
817 | (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New. | |
818 | (struct m68k_cpu): Change chip field to control_regs. | |
819 | (current_chip): Remove. | |
820 | (control_regs): New. | |
821 | (m68k_archs, m68k_extensions): Adjust. | |
822 | (m68k_cpus): Reorder to be in cpu number order. Adjust. | |
823 | (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove. | |
824 | (find_cf_chip): Reimplement for new organization of cpu table. | |
825 | (select_control_regs): Remove. | |
826 | (mri_chip): Adjust. | |
827 | (struct save_opts): Save control regs, not chip. | |
828 | (s_save, s_restore): Adjust. | |
829 | (m68k_lookup_cpu): Give deprecated warning when necessary. | |
830 | (m68k_init_arch): Adjust. | |
831 | (md_show_usage): Adjust for new cpu table organization. | |
832 | ||
1ac4baed BS |
833 | 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com> |
834 | ||
835 | * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc. | |
836 | * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4. | |
837 | * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and | |
838 | "elf/bfin.h". | |
839 | (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>. | |
840 | (any_gotrel): New rule. | |
841 | (got): Use it, and create Expr_Node_GOT_Reloc nodes. | |
842 | * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and | |
843 | "elf/bfin.h". | |
844 | (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New. | |
845 | (bfin_pic_ptr): New function. | |
846 | (md_pseudo_table): Add it for ".picptr". | |
847 | (OPTION_FDPIC): New macro. | |
848 | (md_longopts): Add -mfdpic. | |
849 | (md_parse_option): Handle it. | |
850 | (md_begin): Set BFD flags. | |
851 | (md_apply_fix3, bfin_fix_adjustable): Handle new relocs. | |
852 | (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives | |
853 | us for GOT relocs. | |
854 | * Makefile.am (bfin-parse.o): Update dependencies. | |
855 | (DEPTC_bfin_elf): Likewise. | |
856 | * Makefile.in: Regenerate. | |
857 | ||
a9d34880 RS |
858 | 2006-03-25 Richard Sandiford <richard@codesourcery.com> |
859 | ||
860 | * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use | |
861 | mcfemac instead of mcfmac. | |
862 | ||
9ca26584 AJ |
863 | 2006-03-23 Michael Matz <matz@suse.de> |
864 | ||
865 | * config/tc-i386.c (type_names): Correct placement of 'static'. | |
866 | (reloc): Map some more relocs to their 64 bit counterpart when | |
867 | size is 8. | |
868 | (output_insn): Work around breakage if DEBUG386 is defined. | |
869 | (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also | |
870 | needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or | |
871 | BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing | |
872 | different from i386. | |
873 | (output_imm): Ditto. | |
874 | (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also | |
875 | Imm64. | |
876 | (md_convert_frag): Jumps can now be larger than 2GB away, error | |
877 | out in that case. | |
878 | (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64 | |
879 | and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64. | |
880 | ||
0a44bf69 RS |
881 | 2006-03-22 Richard Sandiford <richard@codesourcery.com> |
882 | Daniel Jacobowitz <dan@codesourcery.com> | |
883 | Phil Edwards <phil@codesourcery.com> | |
884 | Zack Weinberg <zack@codesourcery.com> | |
885 | Mark Mitchell <mark@codesourcery.com> | |
886 | Nathan Sidwell <nathan@codesourcery.com> | |
887 | ||
888 | * config/tc-mips.c (mips_target_format): Handle vxworks targets. | |
889 | (md_begin): Complain about -G being used for PIC. Don't change | |
890 | the text, data and bss alignments on VxWorks. | |
891 | (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when | |
892 | generating VxWorks PIC. | |
893 | (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. | |
894 | (macro): Likewise, but do not treat la $25 specially for | |
895 | VxWorks PIC, and do not handle jal. | |
896 | (OPTION_MVXWORKS_PIC): New macro. | |
897 | (md_longopts): Add -mvxworks-pic. | |
898 | (md_parse_option): Don't complain about using PIC and -G together here. | |
899 | Handle OPTION_MVXWORKS_PIC. | |
900 | (md_estimate_size_before_relax): Always use the first relaxation | |
901 | sequence on VxWorks. | |
902 | * config/tc-mips.h (VXWORKS_PIC): New. | |
903 | ||
080eb7fe PB |
904 | 2006-03-21 Paul Brook <paul@codesourcery.com> |
905 | ||
906 | * config/tc-arm.c (md_apply_fix): Fix typo in offset mask. | |
907 | ||
03aaa593 BW |
908 | 2006-03-21 Sterling Augustine <sterling@tensilica.com> |
909 | ||
910 | * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag. | |
911 | (xtensa_setup_hw_workarounds): Set this new flag for older hardware. | |
912 | (get_loop_align_size): New. | |
913 | (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning. | |
914 | (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag. | |
915 | (get_text_align_power): Rewrite to handle inputs in the range 2-8. | |
916 | (get_noop_aligned_address): Use get_loop_align_size. | |
917 | (get_aligned_diff): Likewise. | |
918 | ||
3e94bf1a PB |
919 | 2006-03-21 Paul Brook <paul@codesourcery.com> |
920 | ||
921 | * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt. | |
922 | ||
dfa9f0d5 PB |
923 | 2006-03-20 Paul Brook <paul@codesourcery.com> |
924 | ||
925 | * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define. | |
926 | (do_t_branch): Encode branches inside IT blocks as unconditional. | |
927 | (do_t_cps): New function. | |
928 | (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi, | |
929 | do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints. | |
930 | (opcode_lookup): Allow conditional suffixes on all instructions in | |
931 | Thumb mode. | |
932 | (md_assemble): Advance condexec state before checking for errors. | |
933 | (insns): Use do_t_cps. | |
934 | ||
6e1cb1a6 PB |
935 | 2006-03-20 Paul Brook <paul@codesourcery.com> |
936 | ||
937 | * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before | |
938 | outputting the insn. | |
939 | ||
0a966e2d JBG |
940 | 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
941 | ||
942 | * config/tc-vax.c: Update copyright year. | |
943 | * config/tc-vax.h: Likewise. | |
944 | ||
a49fcc17 JBG |
945 | 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de> |
946 | ||
947 | * config/tc-vax.c (md_chars_to_number): Used only locally, so | |
948 | make it static. | |
949 | * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration. | |
950 | ||
f5208ef2 PB |
951 | 2006-03-17 Paul Brook <paul@codesourcery.com> |
952 | ||
953 | * config/tc-arm.c (insns): Add ldm and stm. | |
954 | ||
cb4c78d6 BE |
955 | 2006-03-17 Ben Elliston <bje@au.ibm.com> |
956 | ||
957 | PR gas/2446 | |
958 | * doc/as.texinfo (Ident): Document this directive more thoroughly. | |
959 | ||
c16d2bf0 PB |
960 | 2006-03-16 Paul Brook <paul@codesourcery.com> |
961 | ||
962 | * config/tc-arm.c (insns): Add "svc". | |
963 | ||
80ca4e2c BW |
964 | 2006-03-13 Bob Wilson <bob.wilson@acm.org> |
965 | ||
966 | * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar | |
967 | flag and avoid double underscore prefixes. | |
968 | ||
3a4a14e9 PB |
969 | 2006-03-10 Paul Brook <paul@codesourcery.com> |
970 | ||
971 | * config/tc-arm.c (md_begin): Handle EABIv5. | |
972 | (arm_eabis): Add EF_ARM_EABI_VER5. | |
973 | * doc/c-arm.texi: Document -meabi=5. | |
974 | ||
518051dc BE |
975 | 2006-03-10 Ben Elliston <bje@au.ibm.com> |
976 | ||
977 | * app.c (do_scrub_chars): Simplify string handling. | |
978 | ||
00a97672 RS |
979 | 2006-03-07 Richard Sandiford <richard@codesourcery.com> |
980 | Daniel Jacobowitz <dan@codesourcery.com> | |
981 | Zack Weinberg <zack@codesourcery.com> | |
982 | Nathan Sidwell <nathan@codesourcery.com> | |
983 | Paul Brook <paul@codesourcery.com> | |
984 | Ricardo Anguiano <anguiano@codesourcery.com> | |
985 | Phil Edwards <phil@codesourcery.com> | |
986 | ||
987 | * config/tc-arm.c (md_apply_fix): Install a value of zero into a | |
988 | BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA | |
989 | R_ARM_ABS12 reloc. | |
990 | (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative | |
991 | relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12 | |
992 | relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets. | |
993 | ||
b29757dc BW |
994 | 2006-03-06 Bob Wilson <bob.wilson@acm.org> |
995 | ||
996 | * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables | |
997 | even when using the text-section-literals option. | |
998 | ||
0b2e31dc NS |
999 | 2006-03-06 Nathan Sidwell <nathan@codesourcery.com> |
1000 | ||
1001 | * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k | |
1002 | and cf. | |
1003 | (m68k_ip): <case 'J'> Check we have some control regs. | |
1004 | (md_parse_option): Allow raw arch switch. | |
1005 | (m68k_init_arch): Better detection of arch/cpu mismatch. Detect | |
1006 | whether 68881 or cfloat was meant by -mfloat. | |
1007 | (md_show_usage): Adjust extension display. | |
1008 | (m68k_elf_final_processing): Adjust. | |
1009 | ||
df406460 NC |
1010 | 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de> |
1011 | ||
1012 | * config/tc-avr.c (avr_mod_hash_value): New function. | |
1013 | (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and | |
1014 | BFD_RELOC_MS8_LDI for hlo8() and hhi8() | |
1015 | (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value | |
1016 | instead of int avr_ldi_expression: use avr_mod_hash_value instead | |
1017 | of (int). | |
1018 | (tc_gen_reloc): Handle substractions of symbols, if possible do | |
1019 | fixups, abort otherwise. | |
1020 | * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX, | |
1021 | tc_fix_adjustable): Define. | |
1022 | ||
53022e4a JW |
1023 | 2006-03-02 James E Wilson <wilson@specifix.com> |
1024 | ||
1025 | * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we | |
1026 | change the template, then clear md.slot[curr].end_of_insn_group. | |
1027 | ||
9f6f925e JB |
1028 | 2006-02-28 Jan Beulich <jbeulich@novell.com> |
1029 | ||
1030 | * macro.c (get_any_string): Don't insert quotes for <>-quoted input. | |
1031 | ||
0e31b3e1 JB |
1032 | 2006-02-28 Jan Beulich <jbeulich@novell.com> |
1033 | ||
1034 | PR/1070 | |
1035 | * macro.c (getstring): Don't treat parentheses special anymore. | |
1036 | (get_any_string): Don't consider '(' and ')' as quoting anymore. | |
1037 | Special-case '(', ')', '[', and ']' when dealing with non-quoting | |
1038 | characters. | |
1039 | ||
10cd14b4 AM |
1040 | 2006-02-28 Mat <mat@csail.mit.edu> |
1041 | ||
1042 | * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use. | |
1043 | ||
63752a75 JJ |
1044 | 2006-02-27 Jakub Jelinek <jakub@redhat.com> |
1045 | ||
1046 | * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame | |
1047 | field. | |
1048 | (CFI_signal_frame): Define. | |
1049 | (cfi_pseudo_table): Add .cfi_signal_frame. | |
1050 | (dot_cfi): Handle CFI_signal_frame. | |
1051 | (output_cie): Handle cie->signal_frame. | |
1052 | (select_cie_for_fde): Don't share CIE if signal_frame flag is | |
1053 | different. Copy signal_frame from FDE to newly created CIE. | |
1054 | * doc/as.texinfo: Document .cfi_signal_frame. | |
1055 | ||
f7d9e5c3 CD |
1056 | 2006-02-27 Carlos O'Donell <carlos@codesourcery.com> |
1057 | ||
1058 | * doc/Makefile.am: Add html target. | |
1059 | * doc/Makefile.in: Regenerate. | |
1060 | * po/Make-in: Add html target. | |
1061 | ||
331d2d0d L |
1062 | 2006-02-27 H.J. Lu <hongjiu.lu@intel.com> |
1063 | ||
8502d882 | 1064 | * config/tc-i386.c (output_insn): Support Intel Merom New |
331d2d0d L |
1065 | Instructions. |
1066 | ||
8502d882 | 1067 | * config/tc-i386.h (CpuMNI): New. |
331d2d0d L |
1068 | (CpuUnknownFlags): Add CpuMNI. |
1069 | ||
10156f83 DM |
1070 | 2006-02-24 David S. Miller <davem@sunset.davemloft.net> |
1071 | ||
1072 | * config/tc-sparc.c (priv_reg_table): Add entry for "gl". | |
1073 | (hpriv_reg_table): New table for hyperprivileged registers. | |
1074 | (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged | |
1075 | register encoding. | |
1076 | ||
6772dd07 DD |
1077 | 2006-02-24 DJ Delorie <dj@redhat.com> |
1078 | ||
1079 | * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. | |
1080 | (tc_gen_reloc): Don't define. | |
1081 | * config/tc-m32c.c (rl_for, relaxable): New convenience macros. | |
1082 | (OPTION_LINKRELAX): New. | |
1083 | (md_longopts): Add it. | |
1084 | (m32c_relax): New. | |
1085 | (md_parse_options): Set it. | |
1086 | (md_assemble): Emit relaxation relocs as needed. | |
1087 | (md_convert_frag): Emit relaxation relocs as needed. | |
1088 | (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. | |
1089 | (m32c_apply_fix): New. | |
1090 | (tc_gen_reloc): New. | |
1091 | (m32c_force_relocation): Force out jump relocs when relaxing. | |
1092 | (m32c_fix_adjustable): Return false if relaxing. | |
1093 | ||
62b3e311 PB |
1094 | 2006-02-24 Paul Brook <paul@codesourcery.com> |
1095 | ||
1096 | * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, | |
1097 | arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. | |
1098 | (struct asm_barrier_opt): Define. | |
1099 | (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. | |
1100 | (parse_psr): Accept V7M psr names. | |
1101 | (parse_barrier): New function. | |
1102 | (enum operand_parse_code): Add OP_oBARRIER. | |
1103 | (parse_operands): Implement OP_oBARRIER. | |
1104 | (do_barrier): New function. | |
1105 | (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. | |
1106 | (do_t_cpsi): Add V7M restrictions. | |
1107 | (do_t_mrs, do_t_msr): Validate V7M variants. | |
1108 | (md_assemble): Check for NULL variants. | |
1109 | (v7m_psrs, barrier_opt_names): New tables. | |
1110 | (insns): Add V7 instructions. Mark V6 instructions absent from V7M. | |
1111 | (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. | |
1112 | (arm_cpu_option_table): Add Cortex-M3, R4 and A8. | |
1113 | (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. | |
1114 | (struct cpu_arch_ver_table): Define. | |
1115 | (cpu_arch_ver): New. | |
1116 | (aeabi_set_public_attributes): Use cpu_arch_ver. Set | |
1117 | Tag_CPU_arch_profile. | |
1118 | * doc/c-arm.texi: Document new cpu and arch options. | |
1119 | ||
59cf82fe L |
1120 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
1121 | ||
1122 | * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. | |
1123 | ||
19a7219f L |
1124 | 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> |
1125 | ||
1126 | * config/tc-ia64.c: Update copyright years. | |
1127 | ||
7f3dfb9c L |
1128 | 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> |
1129 | ||
1130 | * config/tc-ia64.c (specify_resource): Add the rule 17 from | |
1131 | SDM 2.2. | |
1132 | ||
f40d1643 PB |
1133 | 2005-02-22 Paul Brook <paul@codesourcery.com> |
1134 | ||
1135 | * config/tc-arm.c (do_pld): Remove incorrect write to | |
1136 | inst.instruction. | |
1137 | (encode_thumb32_addr_mode): Use correct operand. | |
1138 | ||
216d22bc PB |
1139 | 2006-02-21 Paul Brook <paul@codesourcery.com> |
1140 | ||
1141 | * config/tc-arm.c (md_apply_fix): Fix off-by-one errors. | |
1142 | ||
d70c5fc7 NC |
1143 | 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> |
1144 | Anil Paranjape <anilp1@kpitcummins.com> | |
1145 | Shilin Shakti <shilins@kpitcummins.com> | |
1146 | ||
1147 | * Makefile.am: Add xc16x related entry. | |
1148 | * Makefile.in: Regenerate. | |
1149 | * configure.in: Added xc16x related entry. | |
1150 | * configure: Regenerate. | |
1151 | * config/tc-xc16x.h: New file | |
1152 | * config/tc-xc16x.c: New file | |
1153 | * doc/c-xc16x.texi: New file for xc16x | |
1154 | * doc/all.texi: Entry for xc16x | |
1155 | * doc/Makefile.texi: Added c-xc16x.texi | |
1156 | * NEWS: Announce the support for the new target. | |
1157 | ||
aaa2ab3d NH |
1158 | 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com> |
1159 | ||
1160 | * configure.tgt: set emulation for mips-*-netbsd* | |
1161 | ||
82de001f JJ |
1162 | 2006-02-14 Jakub Jelinek <jakub@redhat.com> |
1163 | ||
1164 | * config.in: Rebuilt. | |
1165 | ||
431ad2d0 BW |
1166 | 2006-02-13 Bob Wilson <bob.wilson@acm.org> |
1167 | ||
1168 | * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting | |
1169 | from 1, not 0, in error messages. | |
1170 | (md_assemble): Simplify special-case check for ENTRY instructions. | |
1171 | (tinsn_has_invalid_symbolic_operands): Do not include opcode and | |
1172 | operand in error message. | |
1173 | ||
94089a50 JM |
1174 | 2006-02-13 Joseph S. Myers <joseph@codesourcery.com> |
1175 | ||
1176 | * configure.tgt (arm-*-linux-gnueabi*): Change to | |
1177 | arm-*-linux-*eabi*. | |
1178 | ||
52de4c06 NC |
1179 | 2006-02-10 Nick Clifton <nickc@redhat.com> |
1180 | ||
70e45ad9 NC |
1181 | * config/tc-crx.c (check_range): Ensure that the sign bit of a |
1182 | 32-bit value is propagated into the upper bits of a 64-bit long. | |
1183 | ||
52de4c06 NC |
1184 | * config/tc-arc.c (init_opcode_tables): Fix cast. |
1185 | (arc_extoper, md_operand): Likewise. | |
1186 | ||
21af2bbd BW |
1187 | 2006-02-09 David Heine <dlheine@tensilica.com> |
1188 | ||
1189 | * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for | |
1190 | each relaxation step. | |
1191 | ||
75a706fc L |
1192 | 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr> |
1193 | ||
1194 | * configure.in (CHECK_DECLS): Add vsnprintf. | |
1195 | * configure: Regenerate. | |
1196 | * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not | |
1197 | include/declare here, but... | |
1198 | * as.h: Move code detecting VARARGS idiom to the top. | |
1199 | (errno.h, stdarg.h, varargs.h, va_list): ...here. | |
1200 | (vsnprintf): Declare if not already declared. | |
1201 | ||
0d474464 L |
1202 | 2006-02-08 H.J. Lu <hongjiu.lu@intel.com> |
1203 | ||
1204 | * as.c (close_output_file): New. | |
1205 | (main): Register close_output_file with xatexit before | |
1206 | dump_statistics. Don't call output_file_close. | |
1207 | ||
266abb8f NS |
1208 | 2006-02-07 Nathan Sidwell <nathan@codesourcery.com> |
1209 | ||
1210 | * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs, | |
1211 | mcf5329_control_regs): New. | |
1212 | (not_current_architecture, selected_arch, selected_cpu): New. | |
1213 | (m68k_archs, m68k_extensions): New. | |
1214 | (archs): Renamed to ... | |
1215 | (m68k_cpus): ... here. Adjust. | |
1216 | (n_arches): Remove. | |
1217 | (md_pseudo_table): Add arch and cpu directives. | |
1218 | (find_cf_chip, m68k_ip): Adjust table scanning. | |
1219 | (no_68851, no_68881): Remove. | |
1220 | (md_assemble): Lazily initialize. | |
1221 | (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329. | |
1222 | (md_init_after_args): Move functionality to m68k_init_arch. | |
1223 | (mri_chip): Adjust table scanning. | |
1224 | (md_parse_option): Reimplement 'm' processing to add -march & -mcpu | |
1225 | options with saner parsing. | |
1226 | (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension, | |
1227 | m68k_init_arch): New. | |
1228 | (s_m68k_cpu, s_m68k_arch): New. | |
1229 | (md_show_usage): Adjust. | |
1230 | (m68k_elf_final_processing): Set CF EF flags. | |
1231 | * config/tc-m68k.h (m68k_init_after_args): Remove. | |
1232 | (tc_init_after_args): Remove. | |
1233 | * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options. | |
1234 | (M68k-Directives): Document .arch and .cpu directives. | |
1235 | ||
134dcee5 AM |
1236 | 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl> |
1237 | ||
1238 | * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as | |
1239 | synonyms for equ and defl. | |
1240 | (z80_cons_fix_new): New function. | |
1241 | (emit_byte): Disallow relative jumps to absolute locations. | |
1242 | (emit_data): Only handle defb, prototype changed, because defb is | |
1243 | now handled as pseudo-op rather than an instruction. | |
1244 | (instab): Entries for defb,defw,db,dw moved from here... | |
1245 | (md_pseudo_table): ... to here, use generic cons() for defw,dw. | |
1246 | Add entries for def24,def32,d24,d32. | |
1247 | (md_assemble): Improved error handling. | |
1248 | (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one. | |
1249 | * config/tc-z80.h (TC_CONS_FIX_NEW): Define. | |
1250 | (z80_cons_fix_new): Declare. | |
1251 | * doc/c-z80.texi (defb, db): Mention warning on overflow. | |
1252 | (def24,d24,def32,d32): New pseudo-ops. | |
1253 | ||
a9931606 PB |
1254 | 2006-02-02 Paul Brook <paul@codesourcery.com> |
1255 | ||
1256 | * config/tc-arm.c (do_shift): Remove Thumb-1 constraint. | |
1257 | ||
ef8d22e6 PB |
1258 | 2005-02-02 Paul Brook <paul@codesourcery.com> |
1259 | ||
1260 | * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND, | |
1261 | T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR, | |
1262 | T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB, | |
1263 | T2_OPCODE_RSB): Define. | |
1264 | (thumb32_negate_data_op): New function. | |
1265 | (md_apply_fix): Use it. | |
1266 | ||
e7da6241 BW |
1267 | 2006-01-31 Bob Wilson <bob.wilson@acm.org> |
1268 | ||
1269 | * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol | |
1270 | fields. | |
1271 | * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field. | |
1272 | * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of | |
1273 | subtracted symbols. | |
1274 | (relaxation_requirements): Add pfinish_frag argument and use it to | |
1275 | replace setting tinsn->record_fix fields. | |
1276 | (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements | |
1277 | and vinsn_to_insnbuf. Remove references to record_fix and | |
1278 | slot_sub_symbols fields. | |
1279 | (xtensa_mark_narrow_branches): Delete unused code. | |
1280 | (is_narrow_branch_guaranteed_in_range): Handle expr that is not just | |
1281 | a symbol. | |
1282 | (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set | |
1283 | record_fix fields. | |
1284 | (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols. | |
1285 | (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use | |
1286 | of the record_fix field. Simplify error messages for unexpected | |
1287 | symbolic operands. | |
1288 | (set_expr_symbol_offset_diff): Delete. | |
1289 | ||
79134647 PB |
1290 | 2006-01-31 Paul Brook <paul@codesourcery.com> |
1291 | ||
1292 | * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL. | |
1293 | ||
e74cfd16 PB |
1294 | 2006-01-31 Paul Brook <paul@codesourcery.com> |
1295 | Richard Earnshaw <rearnsha@arm.com> | |
1296 | ||
1297 | * config/tc-arm.c: Use arm_feature_set. | |
1298 | (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none, | |
1299 | arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1, | |
1300 | fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2): | |
1301 | New variables. | |
1302 | (insns): Use them. | |
1303 | (md_atof, opcode_select, opcode_select, md_assemble, md_assemble, | |
1304 | md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch, | |
1305 | arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes, | |
1306 | s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU | |
1307 | feature flags. | |
1308 | (arm_legacy_option_table, arm_option_cpu_value_table): New types. | |
1309 | (arm_opts): Move old cpu/arch options from here... | |
1310 | (arm_legacy_opts): ... to here. | |
1311 | (md_parse_option): Search arm_legacy_opts. | |
1312 | (arm_cpus, arm_archs, arm_extensions, arm_fpus) | |
1313 | (arm_float_abis, arm_eabis): Make const. | |
1314 | ||
d47d412e BW |
1315 | 2006-01-25 Bob Wilson <bob.wilson@acm.org> |
1316 | ||
1317 | * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs. | |
1318 | ||
b14273fe JZ |
1319 | 2006-01-21 Jie Zhang <jie.zhang@analog.com> |
1320 | ||
1321 | * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate | |
1322 | in load immediate intruction. | |
1323 | ||
39cd1c76 JZ |
1324 | 2006-01-21 Jie Zhang <jie.zhang@analog.com> |
1325 | ||
1326 | * config/bfin-parse.y (value_match): Use correct conversion | |
1327 | specifications in template string for __FILE__ and __LINE__. | |
1328 | (binary): Ditto. | |
1329 | (unary): Ditto. | |
1330 | ||
67a4f2b7 AO |
1331 | 2006-01-18 Alexandre Oliva <aoliva@redhat.com> |
1332 | ||
1333 | Introduce TLS descriptors for i386 and x86_64. | |
1334 | * config/tc-i386.c (tc_i386_fix_adjustable): Handle | |
1335 | BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL, | |
1336 | BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL. | |
1337 | (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and | |
1338 | BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the | |
1339 | displacement bits. | |
1340 | (build_modrm_byte): Set up zero modrm for TLS desc calls. | |
1341 | (lex_got): Handle @tlsdesc and @tlscall. | |
1342 | (md_apply_fix, tc_gen_reloc): Handle the new relocations. | |
1343 | ||
8ad7c533 NC |
1344 | 2006-01-11 Nick Clifton <nickc@redhat.com> |
1345 | ||
1346 | Fixes for building on 64-bit hosts: | |
1347 | * config/tc-avr.c (mod_index): New union to allow conversion | |
1348 | between pointers and integers. | |
1349 | (md_begin, avr_ldi_expression): Use it. | |
1350 | * config/tc-i370.c (md_assemble): Add cast for argument to print | |
1351 | statement. | |
1352 | * config/tc-tic54x.c (subsym_substitute): Likewise. | |
1353 | * config/tc-mn10200.c (md_assemble): Use a union to convert the | |
1354 | opindex field of fr_cgen structure into a pointer so that it can | |
1355 | be stored in a frag. | |
1356 | * config/tc-mn10300.c (md_assemble): Likewise. | |
1357 | * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer | |
1358 | types. | |
1359 | * config/tc-v850.c: Replace uses of (int) casts with correct | |
1360 | types. | |
1361 | ||
4dcb3903 L |
1362 | 2006-01-09 H.J. Lu <hongjiu.lu@intel.com> |
1363 | ||
1364 | PR gas/2117 | |
1365 | * symbols.c (snapshot_symbol): Don't change a defined symbol. | |
1366 | ||
e0f6ea40 HPN |
1367 | 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com> |
1368 | ||
1369 | PR gas/2101 | |
1370 | * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as | |
1371 | a local-label reference. | |
1372 | ||
e88d958a | 1373 | For older changes see ChangeLog-2005 |
08d56133 NC |
1374 | \f |
1375 | Local Variables: | |
1376 | mode: change-log | |
1377 | left-margin: 8 | |
1378 | fill-column: 74 | |
1379 | version-control: never | |
1380 | End: |