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43234a1e
L		 12013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
2 Alexander Ivchenko <alexander.ivchenko@intel.com>
3 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
4 Sergey Lega <sergey.s.lega@intel.com>
5 Anna Tikhonova <anna.tikhonova@intel.com>
6 Ilya Tocar <ilya.tocar@intel.com>
7 Andrey Turetskiy <andrey.turetskiy@intel.com>
8 Ilya Verbin <ilya.verbin@intel.com>
9 Kirill Yukhin <kirill.yukhin@intel.com>
10 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
11
12 * config/tc-i386-intel.c (O_zmmword_ptr): New.
13 (i386_types): Add zmmword.
14 (i386_intel_simplify_register): Allow regzmm.
15 (i386_intel_simplify): Handle zmmwords.
16 (i386_intel_operand): Handle RC/SAE, vector operations and
17 zmmwords.
18 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
19 (struct RC_Operation): New.
20 (struct Mask_Operation): New.
21 (struct Broadcast_Operation): New.
22 (vex_prefix): Size of bytes increased to 4 to support EVEX
23 encoding.
24 (enum i386_error): Add new error codes: unsupported_broadcast,
25 broadcast_not_on_src_operand, broadcast_needed,
26 unsupported_masking, mask_not_on_destination, no_default_mask,
27 unsupported_rc_sae, rc_sae_operand_not_last_imm,
28 invalid_register_operand, try_vector_disp8.
29 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
30 rounding, broadcast, memshift.
31 (struct RC_name): New.
32 (RC_NamesTable): New.
33 (evexlig): New.
34 (evexwig): New.
35 (extra_symbol_chars): Add '{'.
36 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
37 (i386_operand_type): Add regzmm, regmask and vec_disp8.
38 (match_mem_size): Handle zmmwords.
39 (operand_type_match): Handle zmm-registers.
40 (mode_from_disp_size): Handle vec_disp8.
41 (fits_in_vec_disp8): New.
42 (md_begin): Handle {} properly.
43 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
44 (build_vex_prefix): Handle vrex.
45 (build_evex_prefix): New.
46 (process_immext): Adjust to properly handle EVEX.
47 (md_assemble): Add EVEX encoding support.
48 (swap_2_operands): Correctly handle operands with masking,
49 broadcasting or RC/SAE.
50 (check_VecOperands): Support EVEX features.
51 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
52 (match_template): Support regzmm and handle new error codes.
53 (process_suffix): Handle zmmwords and zmm-registers.
54 (check_byte_reg): Extend to zmm-registers.
55 (process_operands): Extend to zmm-registers.
56 (build_modrm_byte): Handle EVEX.
57 (output_insn): Adjust to properly handle EVEX case.
58 (disp_size): Handle vec_disp8.
59 (output_disp): Support compressed disp8*N evex feature.
60 (output_imm): Handle RC/SAE immediates properly.
61 (check_VecOperations): New.
62 (i386_immediate): Handle EVEX features.
63 (i386_index_check): Handle zmmwords and zmm-registers.
64 (RC_SAE_immediate): New.
65 (i386_att_operand): Handle EVEX features.
66 (parse_real_register): Add a check for ZMM/Mask registers.
67 (OPTION_MEVEXLIG): New.
68 (OPTION_MEVEXWIG): New.
69 (md_longopts): Add mevexlig and mevexwig.
70 (md_parse_option): Handle mevexlig and mevexwig options.
71 (md_show_usage): Add description for mevexlig and mevexwig.
72 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
73 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
74
a0046408
L		 752013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
76
77 * config/tc-i386.c (cpu_arch): Add .sha.
78 * doc/c-i386.texi: Document sha/.sha.
79
7e8b059b
L		 802013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
81 Kirill Yukhin <kirill.yukhin@intel.com>
82 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
83
84 * config/tc-i386.c (BND_PREFIX): New.
85 (struct _i386_insn): Add new field bnd_prefix.
86 (add_bnd_prefix): New.
87 (cpu_arch): Add MPX.
88 (i386_operand_type): Add regbnd.
89 (md_assemble): Handle BND prefixes.
90 (parse_insn): Likewise.
91 (output_branch): Likewise.
92 (output_jump): Likewise.
93 (build_modrm_byte): Handle regbnd.
94 (OPTION_MADD_BND_PREFIX): New.
95 (md_longopts): Add entry for 'madd-bnd-prefix'.
96 (md_parse_option): Handle madd-bnd-prefix option.
97 (md_show_usage): Add description for madd-bnd-prefix
98 option.
99 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
100
7fa9fcb6
TG		 1012013-07-24 Tristan Gingold <gingold@adacore.com>
102
103 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
104 xcoff targets.
105
614eb277
AK		 1062013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
107
108 * config/tc-s390.c (s390_machine): Don't force the .machine
109 argument to lower case.
110
e673710a
KT		 1112013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
112
113 * config/tc-arm.c (s_arm_arch_extension): Improve error message
114 for invalid extension.
115
69091a2c
YZ		 1162013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
117
118 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
119 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
120 (aarch64_abi): New variable.
121 (ilp32_p): Change to be a macro.
122 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
123 (struct aarch64_option_abi_value_table): New struct.
124 (aarch64_abis): New table.
125 (aarch64_parse_abi): New function.
126 (aarch64_long_opts): Add entry for -mabi=.
127 * doc/as.texinfo (Target AArch64 options): Document -mabi.
128 * doc/c-aarch64.texi: Likewise.
129
faf786e6
NC		 1302013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
131
132 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
133 unsigned comparison.
134
f0c00282
NC		 1352013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
136
137 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
138 RX610.
139 * config/rx-parse.y: (rx_check_float_support): Add function to
140 check floating point operation support for target RX100 and
141 RX200.
142 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
143 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
144 RX200, RX600, and RX610
145
8c997c27
NC		 1462013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
147
148 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
149
8be59acb
NC		 1502013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
151
152 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
153 * doc/c-avr.texi: Likewise.
154
4a06e5a2
RS		 1552013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
156
157 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
158 error with older GCCs.
159 (mips16_macro_build): Dereference args.
160
a92713e6
RS		 1612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
162
163 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
164 New functions, split out from...
165 (reg_lookup): ...here. Remove itbl support.
166 (reglist_lookup): Delete.
167 (mips_operand_token_type): New enum.
168 (mips_operand_token): New structure.
169 (mips_operand_tokens): New variable.
170 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
171 (mips_parse_arguments): New functions.
172 (md_begin): Initialize mips_operand_tokens.
173 (mips_arg_info): Add a token field. Remove optional_reg field.
174 (match_char, match_expression): New functions.
175 (match_const_int): Use match_expression. Remove "s" argument
176 and return a boolean result. Remove O_register handling.
177 (match_regno, match_reg, match_reg_range): New functions.
178 (match_int_operand, match_mapped_int_operand, match_msb_operand)
179 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
180 (match_addiusp_operand, match_clo_clz_dest_operand)
181 (match_lwm_swm_list_operand, match_entry_exit_operand)
182 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
183 (match_tied_reg_operand): Remove "s" argument and return a boolean
184 result. Match tokens rather than text. Update calls to
185 match_const_int. Rely on match_regno to call check_regno.
186 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
187 "arg" argument. Return a boolean result.
188 (parse_float_constant): Replace with...
189 (match_float_constant): ...this new function.
190 (match_operand): Remove "s" argument and return a boolean result.
191 Update calls to subfunctions.
192 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
193 rather than string-parsing routines. Update handling of optional
194 registers for token scheme.
195
89565f1b
RS		 1962013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
197
198 * config/tc-mips.c (parse_float_constant): Split out from...
199 (mips_ip): ...here.
200
3c14a432
RS		 2012013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
202
203 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
204 Delete.
205
364215c8
RS		 2062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
207
208 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
209 (match_entry_exit_operand): New function.
210 (match_save_restore_list_operand): Likewise.
211 (match_operand): Use them.
212 (check_absolute_expr): Delete.
213 (mips16_ip): Rewrite main parsing loop to use mips_operands.
214
9e12b7a2
RS		 2152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
216
217 * config/tc-mips.c: Enable functions commented out in previous patch.
218 (SKIP_SPACE_TABS): Move further up file.
219 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
220 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
221 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
222 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
223 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
224 (micromips_imm_b_map, micromips_imm_c_map): Delete.
225 (mips_lookup_reg_pair): Delete.
226 (macro): Use report_bad_range and report_bad_field.
227 (mips_immed, expr_const_in_range): Delete.
228 (mips_ip): Rewrite main parsing loop to use new functions.
229
a1d78564
RS		 2302013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
231
232 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
233 Change return type to bfd_boolean.
234 (report_bad_range, report_bad_field): New functions.
235 (mips_arg_info): New structure.
236 (match_const_int, convert_reg_type, check_regno, match_int_operand)
237 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
238 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
239 (match_addiusp_operand, match_clo_clz_dest_operand)
240 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
241 (match_pc_operand, match_tied_reg_operand, match_operand)
242 (check_completed_insn): New functions, commented out for now.
243
e077a1c8
RS		 2442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
245
246 * config/tc-mips.c (insn_insert_operand): New function.
247 (macro_build, mips16_macro_build): Put null character check
248 in the for loop and convert continues to breaks. Use operand
249 structures to handle constant operands.
250
ab902481
RS		 2512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
252
253 * config/tc-mips.c (validate_mips_insn): Move further up file.
254 Add insn_bits and decode_operand arguments. Use the mips_operand
255 fields to work out which bits an operand occupies. Detect double
256 definitions.
257 (validate_micromips_insn): Move further up file. Call into
258 validate_mips_insn.
259
2f8b73cc
RS		 2602013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
261
262 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
263
c8276761
RS		 2642013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
265
266 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
267 and "~".
268 (macro): Update accordingly.
269
77bd4346
RS		 2702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
271
272 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
273 (imm_reloc): Delete.
274 (md_assemble): Remove imm_reloc handling.
275 (mips_ip): Update commentary. Use offset_expr and offset_reloc
276 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
277 Use a temporary array rather than imm_reloc when parsing
278 constant expressions. Remove imm_reloc initialization.
279 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
280 for the relaxable field. Use a relax_char variable to track the
281 type of this field. Remove imm_reloc initialization.
282
cc537e56
RS		 2832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
284
285 * config/tc-mips.c (mips16_ip): Handle "I".
286
ba92f887
MR		 2872013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
288
289 * config/tc-mips.c (mips_flag_nan2008): New variable.
290 (options): Add OPTION_NAN enum value.
291 (md_longopts): Handle it.
292 (md_parse_option): Likewise.
293 (s_nan): New function.
294 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
295 (md_show_usage): Add -mnan.
296
297 * doc/as.texinfo (Overview): Add -mnan.
298 * doc/c-mips.texi (MIPS Opts): Document -mnan.
299 (MIPS NaN Encodings): New node. Document .nan directive.
300 (MIPS-Dependent): List the new node.
301
c1094734
TG		 3022013-07-09 Tristan Gingold <gingold@adacore.com>
303
304 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
305
0cbbe1b8
RS		 3062013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
307
308 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
309 for 'A' and assume that the constant has been elided if the result
310 is an O_register.
311
f2ae14a1
RS		 3122013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
313
314 * config/tc-mips.c (gprel16_reloc_p): New function.
315 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
316 BFD_RELOC_UNUSED.
317 (offset_high_part, small_offset_p): New functions.
318 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
319 register load and store macros, handle the 16-bit offset case first.
320 If a 16-bit offset is not suitable for the instruction we're
321 generating, load it into the temporary register using
322 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
323 M_L_DAB code once the address has been constructed. For double load
324 and store macros, again handle the 16-bit offset case first.
325 If the second register cannot be accessed from the same high
326 part as the first, load it into AT using ADDRESS_ADDI_INSN.
327 Fix the handling of LD in cases where the first register is the
328 same as the base. Also handle the case where the offset is
329 not 16 bits and the second register cannot be accessed from the
330 same high part as the first. For unaligned loads and stores,
331 fuse the offbits == 12 and old "ab" handling. Apply this handling
332 whenever the second offset needs a different high part from the first.
333 Construct the offset using ADDRESS_ADDI_INSN where possible,
334 for offbits == 16 as well as offbits == 12. Use offset_reloc
335 when constructing the individual loads and stores.
336 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
337 and offset_reloc before matching against a particular opcode.
338 Handle elided 'A' constants. Allow 'A' constants to use
339 relocation operators.
340
5c324c16
RS		 3412013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
342
343 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
344 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
345 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
346
23e69e47
RS		 3472013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
348
349 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
350 Require the msb to be <= 31 for "+s". Check that the size is <= 31
351 for both "+s" and "+S".
352
27c5c572
RS		 3532013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
354
355 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
356 (mips_ip, mips16_ip): Handle "+i".
357
e76ff5ab
RS		 3582013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
359
360 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
361 (micromips_to_32_reg_h_map): Rename to...
362 (micromips_to_32_reg_h_map1): ...this.
363 (micromips_to_32_reg_i_map): Rename to...
364 (micromips_to_32_reg_h_map2): ...this.
365 (mips_lookup_reg_pair): New function.
366 (gpr_write_mask, macro): Adjust after above renaming.
367 (validate_micromips_insn): Remove "mi" handling.
368 (mips_ip): Likewise. Parse both registers in a pair for "mh".
369
fa7616a4
RS		 3702013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
371
372 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
373 (mips_ip): Remove "+D" and "+T" handling.
374
fb798c50
AK		 3752013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
376
377 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
378 relocs.
379
2c0a3565
MS		 3802013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
381
4aa2c5e2
MS		 382 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
383
3842013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
385
2c0a3565
MS		 386 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
387 (aarch64_force_relocation): Likewise.
388
f40da81b
AM		 3892013-07-02 Alan Modra <amodra@gmail.com>
390
391 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
392
81566a9b
MR		 3932013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
394
395 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
396 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
397 Replace @sc{mips16} with literal `MIPS16'.
398 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
399
a6bb11b2
YZ		 4002013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
401
402 * config/tc-aarch64.c (reloc_table): Replace
403 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
404 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
405 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
406 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
407 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
408 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
409 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
410 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
411 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
412 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
413 (aarch64_force_relocation): Likewise.
414
cec5225b
YZ		 4152013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
416
417 * config/tc-aarch64.c (ilp32_p): New static variable.
418 (elf64_aarch64_target_format): Return the target according to the
419 value of 'ilp32_p'.
420 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
421 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
422 (aarch64_dwarf2_addr_size): New function.
423 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
424 (DWARF2_ADDR_SIZE): New define.
425
e335d9cb
RS		 4262013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
427
428 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
429
18870af7
RS		 4302013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
431
432 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
433
833794fc
MR		 4342013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
435
436 * config/tc-mips.c (mips_set_options): Add insn32 member.
437 (mips_opts): Initialize it.
438 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
439 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
440 (md_longopts): Add "minsn32" and "mno-insn32" options.
441 (is_size_valid): Handle insn32 mode.
442 (md_assemble): Pass instruction string down to macro.
443 (brk_fmt): Add second dimension and insn32 mode initializers.
444 (mfhl_fmt): Likewise.
445 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
446 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
447 (macro_build_jalr, move_register): Handle insn32 mode.
448 (macro_build_branch_rs): Likewise.
449 (macro): Handle insn32 mode.
450 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
451 (mips_ip): Handle insn32 mode.
452 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
453 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
454 (mips_handle_align): Handle insn32 mode.
455 (md_show_usage): Add -minsn32 and -mno-insn32.
456
457 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
458 -mno-insn32 options.
459 (-minsn32, -mno-insn32): New options.
460 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
461 options.
462 (MIPS assembly options): New node. Document .set insn32 and
463 .set noinsn32.
464 (MIPS-Dependent): List the new node.
465
d1706f38
NC		 4662013-06-25 Nick Clifton <nickc@redhat.com>
467
468 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
469 the PC in indirect addressing on 430xv2 parts.
470 (msp430_operands): Add version test to hardware bug encoding
471 restrictions.
472
477330fc
RM		 4732013-06-24 Roland McGrath <mcgrathr@google.com>
474
d996d970
RM		 475 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
476 so it skips whitespace before it.
477 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
478
477330fc
RM		 479 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
480 (arm_reg_parse_multi): Skip whitespace first.
481 (parse_reg_list): Likewise.
482 (parse_vfp_reg_list): Likewise.
483 (s_arm_unwind_save_mmxwcg): Likewise.
484
24382199
NC		 4852013-06-24 Nick Clifton <nickc@redhat.com>
486
487 PR gas/15623
488 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
489
c3678916
RS		 4902013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
491
492 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
493
42429eac
RS		 4942013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
495
496 * config/tc-mips.c: Assert that offsetT and valueT are at least
497 8 bytes in size.
498 (GPR_SMIN, GPR_SMAX): New macros.
499 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
500
f3ded42a
RS		 5012013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
502
503 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
504 conditions. Remove any code deselected by them.
505 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
506
e8044f35
RS		 5072013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
508
509 * NEWS: Note removal of ECOFF support.
510 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
511 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
512 (MULTI_CFILES): Remove config/e-mipsecoff.c.
513 * Makefile.in: Regenerate.
514 * configure.in: Remove MIPS ECOFF references.
515 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
516 Delete cases.
517 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
518 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
519 (mips-*-*): ...this single case.
520 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
521 MIPS emulations to be e-mipself*.
522 * configure: Regenerate.
523 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
524 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
525 (mips-*-sysv*): Remove coff and ecoff cases.
526 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
527 * ecoff.c: Remove reference to MIPS ECOFF.
528 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
529 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
530 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
531 (mips_hi_fixup): Tweak comment.
532 (append_insn): Require a howto.
533 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
534
98508b2a
RS		 5352013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
536
537 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
538 Use "CPU" instead of "cpu".
539 * doc/c-mips.texi: Likewise.
540 (MIPS Opts): Rename to MIPS Options.
541 (MIPS option stack): Rename to MIPS Option Stack.
542 (MIPS ASE instruction generation overrides): Rename to
543 MIPS ASE Instruction Generation Overrides (for now).
544 (MIPS floating-point): Rename to MIPS Floating-Point.
545
fc16f8cc
RS		 5462013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
547
548 * doc/c-mips.texi (MIPS Macros): New section.
549 (MIPS Object): Replace with...
550 (MIPS Small Data): ...this new section.
551
5a7560b5
RS		 5522013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
553
554 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
555 Capitalize name. Use @kindex instead of @cindex for .set entries.
556
a1b86ab7
RS		 5572013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
558
559 * doc/c-mips.texi (MIPS Stabs): Remove section.
560
c6278170
RS		 5612013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
562
563 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
564 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
565 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
566 (ISA_SUPPORTS_VIRT64_ASE): Delete.
567 (mips_ase): New structure.
568 (mips_ases): New table.
569 (FP64_ASES): New macro.
570 (mips_ase_groups): New array.
571 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
572 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
573 functions.
574 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
575 (md_parse_option): Use mips_ases and mips_set_ase instead of
576 separate case statements for each ASE option.
577 (mips_after_parse_args): Use FP64_ASES. Use
578 mips_check_isa_supports_ases to check the ASEs against
579 other options.
580 (s_mipsset): Use mips_ases and mips_set_ase instead of
581 separate if statements for each ASE option. Use
582 mips_check_isa_supports_ases, even when a non-ASE option
583 is specified.
584
63a4bc21
KT		 5852013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
586
587 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
588
c31f3936
RS		 5892013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
590
591 * config/tc-mips.c (md_shortopts, options, md_longopts)
592 (md_longopts_size): Move earlier in file.
593
846ef2d0
RS		 5942013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
595
596 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
597 with a single "ase" bitmask.
598 (mips_opts): Update accordingly.
599 (file_ase, file_ase_explicit): New variables.
600 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
601 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
602 (ISA_HAS_ROR): Adjust for mips_set_options change.
603 (is_opcode_valid): Take the base ase mask directly from mips_opts.
604 (mips_ip): Adjust for mips_set_options change.
605 (md_parse_option): Likewise. Update file_ase_explicit.
606 (mips_after_parse_args): Adjust for mips_set_options change.
607 Use bitmask operations to select the default ASEs. Set file_ase
608 rather than individual per-ASE variables.
609 (s_mipsset): Adjust for mips_set_options change.
610 (mips_elf_final_processing): Test file_ase rather than
611 file_ase_mdmx. Remove commented-out code.
612
d16afab6
RS		 6132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
614
615 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
616 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
617 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
618 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
619 (mips_after_parse_args): Use the new "ase" field to choose
620 the default ASEs.
621 (mips_cpu_info_table): Move ASEs from the "flags" field to the
622 "ase" field.
623
e83a675f
RE		 6242013-06-18 Richard Earnshaw <rearnsha@arm.com>
625
626 * config/tc-arm.c (symbol_preemptible): New function.
627 (relax_branch): Use it.
628
7f3c4072
CM		 6292013-06-17 Catherine Moore <clm@codesourcery.com>
630 Maciej W. Rozycki <macro@codesourcery.com>
631 Chao-Ying Fu <fu@mips.com>
632
633 * config/tc-mips.c (mips_set_options): Add ase_eva.
634 (mips_set_options mips_opts): Add ase_eva.
635 (file_ase_eva): Declare.
636 (ISA_SUPPORTS_EVA_ASE): Define.
637 (IS_SEXT_9BIT_NUM): Define.
638 (MIPS_CPU_ASE_EVA): Define.
639 (is_opcode_valid): Add support for ase_eva.
640 (macro_build): Likewise.
641 (macro): Likewise.
642 (validate_mips_insn): Likewise.
643 (validate_micromips_insn): Likewise.
644 (mips_ip): Likewise.
645 (options): Add OPTION_EVA and OPTION_NO_EVA.
646 (md_longopts): Add -meva and -mno-eva.
647 (md_parse_option): Process new options.
648 (mips_after_parse_args): Check for valid EVA combinations.
649 (s_mipsset): Likewise.
650
e410add4
RS		 6512013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
652
653 * dwarf2dbg.h (dwarf2_move_insn): Declare.
654 * dwarf2dbg.c (line_subseg): Add pmove_tail.
655 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
656 (dwarf2_gen_line_info_1): Update call accordingly.
657 (dwarf2_move_insn): New function.
658 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
659
6a50d470
RS		 6602013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
661
662 Revert:
663
664 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
665
666 PR gas/13024
667 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
668 (dwarf2_gen_line_info_1): Delete.
669 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
670 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
671 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
672 (dwarf2_directive_loc): Push previous .locs instead of generating
673 them immediately.
674
f122319e
CF		 6752013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
676
677 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
678 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
679
909c7f9c
NC		 6802013-06-13 Nick Clifton <nickc@redhat.com>
681
682 PR gas/15602
683 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
684 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
685 function. Generates an error if the adjusted offset is out of a
686 16-bit range.
687
5d5755a7
SL		 6882013-06-12 Sandra Loosemore <sandra@codesourcery.com>
689
690 * config/tc-nios2.c (md_apply_fix): Mask constant
691 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
692
3bf0dbfb
MR		 6932013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
694
695 * config/tc-mips.c (append_insn): Don't do branch relaxation for
696 MIPS-3D instructions either.
697 (md_convert_frag): Update the COPx branch mask accordingly.
698
699 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
700 option.
701 * doc/as.texinfo (Overview): Add --relax-branch and
702 --no-relax-branch.
703 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
704 --no-relax-branch.
705
9daf7bab
SL		 7062013-06-09 Sandra Loosemore <sandra@codesourcery.com>
707
708 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
709 omitted.
710
d301a56b
RS		 7112013-06-08 Catherine Moore <clm@codesourcery.com>
712
713 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
714 (is_opcode_valid_16): Pass ase value to opcode_is_member.
715 (append_insn): Change INSN_xxxx to ASE_xxxx.
716
7bab7634
DC		 7172013-06-01 George Thomas <george.thomas@atmel.com>
718
719 * gas/config/tc-avr.c: Change ISA for devices with USB support to
720 AVR_ISA_XMEGAU
721
f60cf82f
L		 7222013-05-31 H.J. Lu <hongjiu.lu@intel.com>
723
724 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
725 for ELF.
726
a3f278e2
CM		 7272013-05-31 Paul Brook <paul@codesourcery.com>
728
729 gas/
730 * config/tc-mips.c (s_ehword): New.
731
067ec077
CM		 7322013-05-30 Paul Brook <paul@codesourcery.com>
733
734 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
735
d6101ac2
MR		 7362013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
737
738 * write.c (resolve_reloc_expr_symbols): On REL targets don't
739 convert relocs who have no relocatable field either. Rephrase
740 the conditional so that the PC-relative check is only applied
741 for REL targets.
742
f19ccbda
MR		 7432013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
744
745 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
746 calculation.
747
418009c2
YZ		 7482013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
749
750 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 751 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 752 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
753 (md_apply_fix): Likewise.
754 (aarch64_force_relocation): Likewise.
755
0a8897c7
KT		 7562013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
757
758 * config/tc-arm.c (it_fsm_post_encode): Improve
759 warning messages about deprecated IT block formats.
760
89d2a2a3
MS		 7612013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
762
763 * config/tc-aarch64.c (md_apply_fix): Move value range checking
764 inside fx_done condition.
765
c77c0862
RS		 7662013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
767
768 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
769
c0637f3a
PB		 7702013-05-20 Peter Bergner <bergner@vnet.ibm.com>
771
772 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
773 and clean up warning when using PRINT_OPCODE_TABLE.
774
5656a981
AM		 7752013-05-20 Alan Modra <amodra@gmail.com>
776
777 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
778 and data fixups performing shift/high adjust/sign extension on
779 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
780 when writing data fixups rather than recalculating size.
781
997b26e8
JBG		 7822013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
783
784 * doc/c-msp430.texi: Fix typo.
785
9f6e76f4
TG		 7862013-05-16 Tristan Gingold <gingold@adacore.com>
787
788 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
789 are also TOC symbols.
790
638d3803
NC		 7912013-05-16 Nick Clifton <nickc@redhat.com>
792
793 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
794 Add -mcpu command to specify core type.
997b26e8 795 * doc/c-msp430.texi: Update documentation.
638d3803 796
b015e599
AP		 7972013-05-09 Andrew Pinski <apinski@cavium.com>
798
799 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
800 (mips_opts): Update for the new field.
801 (file_ase_virt): New variable.
802 (ISA_SUPPORTS_VIRT_ASE): New macro.
803 (ISA_SUPPORTS_VIRT64_ASE): New macro.
804 (MIPS_CPU_ASE_VIRT): New define.
805 (is_opcode_valid): Handle ase_virt.
806 (macro_build): Handle "+J".
807 (validate_mips_insn): Likewise.
808 (mips_ip): Likewise.
809 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
810 (md_longopts): Add mvirt and mnovirt
811 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
812 (mips_after_parse_args): Handle ase_virt field.
813 (s_mipsset): Handle "virt" and "novirt".
814 (mips_elf_final_processing): Add a comment about virt ASE might need
815 a new flag.
816 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
817 * doc/c-mips.texi: Document -mvirt and -mno-virt.
818 Document ".set virt" and ".set novirt".
819
da8094d7
AM		 8202013-05-09 Alan Modra <amodra@gmail.com>
821
822 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
823 control of operand flag bits.
824
c5f8c205
AM		 8252013-05-07 Alan Modra <amodra@gmail.com>
826
827 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
828 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
829 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
830 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
831 (md_apply_fix): Set fx_no_overflow for assorted relocations.
832 Shift and sign-extend fieldval for use by some VLE reloc
833 operand->insert functions.
834
b47468a6
CM		 8352013-05-06 Paul Brook <paul@codesourcery.com>
836 Catherine Moore <clm@codesourcery.com>
837
c5f8c205
AM		 838 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
839 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 840 (md_apply_fix): Likewise.
841 (tc_gen_reloc): Likewise.
842
2de39019
CM		 8432013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
844
845 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
846 (mips_fix_adjustable): Adjust pc-relative check to use
847 limited_pc_reloc_p.
848
754e2bb9
RS		 8492013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
850
851 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
852 (s_mips_stab): Do not restrict to stabn only.
853
13761a11
NC		 8542013-05-02 Nick Clifton <nickc@redhat.com>
855
856 * config/tc-msp430.c: Add support for the MSP430X architecture.
857 Add code to insert a NOP instruction after any instruction that
858 might change the interrupt state.
859 Add support for the LARGE memory model.
860 Add code to initialise the .MSP430.attributes section.
861 * config/tc-msp430.h: Add support for the MSP430X architecture.
862 * doc/c-msp430.texi: Document the new -mL and -mN command line
863 options.
864 * NEWS: Mention support for the MSP430X architecture.
865
df26367c
MR		 8662013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
867
868 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
869 alpha*-*-linux*ecoff*.
870
f02d8318
CF		 8712013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
872
873 * config/tc-mips.c (mips_ip): Add sizelo.
874 For "+C", "+G", and "+H", set sizelo and compare against it.
875
b40bf0a2
NC		 8762013-04-29 Nick Clifton <nickc@redhat.com>
877
878 * as.c (Options): Add -gdwarf-sections.
879 (parse_args): Likewise.
880 * as.h (flag_dwarf_sections): Declare.
881 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
882 (process_entries): When -gdwarf-sections is enabled generate
883 fragmentary .debug_line sections.
884 (out_debug_line): Set the section for the .debug_line section end
885 symbol.
886 * doc/as.texinfo: Document -gdwarf-sections.
887 * NEWS: Mention -gdwarf-sections.
888
8eeccb77 8892013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 890
891 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
892 according to the target parameter. Don't call s_segm since s_segm
893 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
894 initialized yet.
895 (md_begin): Call s_segm according to target parameter from command
896 line.
897
49926cd0
AM		 8982013-04-25 Alan Modra <amodra@gmail.com>
899
900 * configure.in: Allow little-endian linux.
901 * configure: Regenerate.
902
e3031850
SL		 9032013-04-24 Sandra Loosemore <sandra@codesourcery.com>
904
905 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
906 "fstatus" control register to "eccinj".
907
cb948fc0
KT		 9082013-04-19 Kai Tietz <ktietz@redhat.com>
909
910 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
911
4455e9ad
JB		 9122013-04-15 Julian Brown <julian@codesourcery.com>
913
914 * expr.c (add_to_result, subtract_from_result): Make global.
915 * expr.h (add_to_result, subtract_from_result): Add prototypes.
916 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
917 subtract_from_result to handle extra bit of precision for .sleb128
918 directive operands.
919
956a6ba3
JB		 9202013-04-10 Julian Brown <julian@codesourcery.com>
921
922 * read.c (convert_to_bignum): Add sign parameter. Use it
923 instead of X_unsigned to determine sign of resulting bignum.
924 (emit_expr): Pass extra argument to convert_to_bignum.
925 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
926 X_extrabit to convert_to_bignum.
927 (parse_bitfield_cons): Set X_extrabit.
928 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
929 Initialise X_extrabit field as appropriate.
930 (add_to_result): New.
931 (subtract_from_result): New.
932 (expr): Use above.
933 * expr.h (expressionS): Add X_extrabit field.
934
eb9f3f00
JB		 9352013-04-10 Jan Beulich <jbeulich@suse.com>
936
937 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
938 register being PC when is_t or writeback, and use distinct
939 diagnostic for the latter case.
940
ccb84d65
JB		 9412013-04-10 Jan Beulich <jbeulich@suse.com>
942
943 * gas/config/tc-arm.c (parse_operands): Re-write
944 po_barrier_or_imm().
945 (do_barrier): Remove bogus constraint().
946 (do_t_barrier): Remove.
947
4d13caa0
NC		 9482013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
949
950 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
951 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
952 ATmega2564RFR2
953 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
954
16d02dc9
JB		 9552013-04-09 Jan Beulich <jbeulich@suse.com>
956
957 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
958 Use local variable Rt in more places.
959 (do_vmsr): Accept all control registers.
960
05ac0ffb
JB		 9612013-04-09 Jan Beulich <jbeulich@suse.com>
962
963 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
964 if there was none specified for moves between scalar and core
965 register.
966
2d51fb74
JB		 9672013-04-09 Jan Beulich <jbeulich@suse.com>
968
969 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
970 NEON_ALL_LANES case.
971
94dcf8bf
JB		 9722013-04-08 Jan Beulich <jbeulich@suse.com>
973
974 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
975 PC-relative VSTR.
976
1472d06f
JB		 9772013-04-08 Jan Beulich <jbeulich@suse.com>
978
979 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
980 entry to sp_fiq.
981
0c76cae8
AM		 9822013-04-03 Alan Modra <amodra@gmail.com>
983
984 * doc/as.texinfo: Add support to generate man options for h8300.
985 * doc/c-h8300.texi: Likewise.
986
92eb40d9
RR		 9872013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
988
989 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
990 Cortex-A57.
991
51dcdd4d
NC		 9922013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
993
994 PR binutils/15068
995 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
996
c5d685bf
NC		 9972013-03-26 Nick Clifton <nickc@redhat.com>
998
9b978282
NC		 999 PR gas/15295
1000 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1001 start of the file each time.
1002
c5d685bf
NC		 1003 PR gas/15178
1004 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1005 FreeBSD targets.
1006
9699c833
TG		 10072013-03-26 Douglas B Rupp <rupp@gnat.com>
1008
1009 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1010 after fixup.
1011
4755303e
WN		 10122013-03-21 Will Newton <will.newton@linaro.org>
1013
1014 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1015 pc-relative str instructions in Thumb mode.
1016
81f5558e
NC		 10172013-03-21 Michael Schewe <michael.schewe@gmx.net>
1018
1019 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1020 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1021 R_H8_DISP32A16.
1022 * config/tc-h8300.h: Remove duplicated defines.
1023
71863e73
NC		 10242013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1025
1026 PR gas/15282
1027 * tc-avr.c (mcu_has_3_byte_pc): New function.
1028 (tc_cfi_frame_initial_instructions): Call it to find return
1029 address size.
1030
795b8e6b
NC		 10312013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1032
1033 PR gas/15095
1034 * config/tc-tic6x.c (tic6x_try_encode): Handle
1035 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1036 encode register pair numbers when required.
1037
ba86b375
WN		 10382013-03-15 Will Newton <will.newton@linaro.org>
1039
1040 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1041 in vstr in Thumb mode for pre-ARMv7 cores.
1042
9e6f3811
AS		 10432013-03-14 Andreas Schwab <schwab@suse.de>
1044
1045 * doc/c-arc.texi (ARC Directives): Revert last change and use
1046 @itemize instead of @table.
1047 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1048
b10bf8c5
NC		 10492013-03-14 Nick Clifton <nickc@redhat.com>
1050
1051 PR gas/15273
1052 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1053 NULL message, instead just check ARM_CPU_IS_ANY directly.
1054
ba724cfc
NC		 10552013-03-14 Nick Clifton <nickc@redhat.com>
1056
1057 PR gas/15212
9e6f3811 1058 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1059 for table format.
1060 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1061 to the @item directives.
1062 (ARM-Neon-Alignment): Move to correct place in the document.
1063 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1064 formatting.
1065 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1066 @smallexample.
1067
531a94fd
SL		 10682013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1069
1070 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1071 case. Add default BAD_CASE to switch.
1072
dad60f8e
SL		 10732013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1074
1075 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1076 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1077
dd5181d5
KT		 10782013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1079
1080 * config/tc-arm.c (crc_ext_armv8): New feature set.
1081 (UNPRED_REG): New macro.
1082 (do_crc32_1): New function.
1083 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1084 do_crc32ch, do_crc32cw): Likewise.
1085 (TUEc): New macro.
1086 (insns): Add entries for crc32 mnemonics.
1087 (arm_extensions): Add entry for crc.
1088
8e723a10
CLT		 10892013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1090
1091 * write.h (struct fix): Add fx_dot_frag field.
1092 (dot_frag): Declare.
1093 * write.c (dot_frag): New variable.
1094 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1095 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1096 * expr.c (expr): Save value of frag_now in dot_frag when setting
1097 dot_value.
1098 * read.c (emit_expr): Likewise. Delete comments.
1099
be05d201
L		 11002013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1101
1102 * config/tc-i386.c (flag_code_names): Removed.
1103 (i386_index_check): Rewrote.
1104
62b0d0d5
YZ		 11052013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1106
1107 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1108 add comment.
1109 (aarch64_double_precision_fmovable): New function.
1110 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1111 function; handle hexadecimal representation of IEEE754 encoding.
1112 (parse_operands): Update the call to parse_aarch64_imm_float.
1113
165de32a
L		 11142013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1115
1116 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1117 (check_hle): Updated.
1118 (md_assemble): Likewise.
1119 (parse_insn): Likewise.
1120
d5de92cf
L		 11212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1122
1123 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1124 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1125 (parse_insn): Remove expecting_string_instruction. Set
1126 i.rep_prefix.
1127
e60bb1dd
YZ		 11282013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1129
1130 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1131
aeebdd9b
YZ		 11322013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1133
1134 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1135 for system registers.
1136
4107ae22
DD		 11372013-02-27 DJ Delorie <dj@redhat.com>
1138
1139 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1140 (rl78_op): Handle %code().
1141 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1142 (tc_gen_reloc): Likwise; convert to a computed reloc.
1143 (md_apply_fix): Likewise.
1144
151fa98f
NC		 11452013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1146
1147 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1148
70a8bc5b 11492013-02-25 Terry Guo <terry.guo@arm.com>
1150
1151 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1152 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1153 list of accepted CPUs.
1154
5c111e37
L		 11552013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1156
1157 PR gas/15159
1158 * config/tc-i386.c (cpu_arch): Add ".smap".
1159
1160 * doc/c-i386.texi: Document smap.
1161
8a75745d
MR		 11622013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1163
1164 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1165 mips_assembling_insn appropriately.
1166 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1167
79850f26
MR		 11682013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1169
cf29fc61 1170 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1171 extraneous braces.
1172
4c261dff
NC		 11732013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1174
5c111e37 1175 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1176
ea33f281
NC		 11772013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1178
1179 * configure.tgt: Add nios2-*-rtems*.
1180
a1ccaec9
YZ		 11812013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1182
1183 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1184 NULL.
1185
0aa27725
RS		 11862013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1187
1188 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1189 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1190
da4339ed
NC		 11912013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1192
1193 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1194 core.
1195
36591ba1 11962013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1197 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1198
1199 Based on patches from Altera Corporation.
1200
1201 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1202 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1203 * Makefile.in: Regenerated.
1204 * configure.tgt: Add case for nios2*-linux*.
1205 * config/obj-elf.c: Conditionally include elf/nios2.h.
1206 * config/tc-nios2.c: New file.
1207 * config/tc-nios2.h: New file.
1208 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1209 * doc/Makefile.in: Regenerated.
1210 * doc/all.texi: Set NIOSII.
1211 * doc/as.texinfo (Overview): Add Nios II options.
1212 (Machine Dependencies): Include c-nios2.texi.
1213 * doc/c-nios2.texi: New file.
1214 * NEWS: Note Altera Nios II support.
1215
94d4433a
AM		 12162013-02-06 Alan Modra <amodra@gmail.com>
1217
1218 PR gas/14255
1219 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1220 Don't skip fixups with fx_subsy non-NULL.
1221 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1222 with fx_subsy non-NULL.
1223
ace9af6f
L		 12242013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1225
1226 * doc/c-metag.texi: Add "@c man" markers.
1227
89d67ed9
AM		 12282013-02-04 Alan Modra <amodra@gmail.com>
1229
1230 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1231 related code.
1232 (TC_ADJUST_RELOC_COUNT): Delete.
1233 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1234
89072bd6
AM		 12352013-02-04 Alan Modra <amodra@gmail.com>
1236
1237 * po/POTFILES.in: Regenerate.
1238
f9b2d544
NC		 12392013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1240
1241 * config/tc-metag.c: Make SWAP instruction less permissive with
1242 its operands.
1243
392ca752
DD		 12442013-01-29 DJ Delorie <dj@redhat.com>
1245
1246 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1247 relocs in .word/.etc statements.
1248
427d0db6
RM		 12492013-01-29 Roland McGrath <mcgrathr@google.com>
1250
1251 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1252 immediate value for 8-bit offset" error so it shows line info.
1253
4faf939a
JM		 12542013-01-24 Joseph Myers <joseph@codesourcery.com>
1255
1256 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1257 for 64-bit output.
1258
78c8d46c
NC		 12592013-01-24 Nick Clifton <nickc@redhat.com>
1260
1261 * config/tc-v850.c: Add support for e3v5 architecture.
1262 * doc/c-v850.texi: Mention new support.
1263
fb5b7503
NC		 12642013-01-23 Nick Clifton <nickc@redhat.com>
1265
1266 PR gas/15039
1267 * config/tc-avr.c: Include dwarf2dbg.h.
1268
8ce3d284
L		 12692013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1270
1271 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1272 (tc_i386_fix_adjustable): Likewise.
1273 (lex_got): Likewise.
1274 (tc_gen_reloc): Likewise.
1275
f5555712
YZ		 12762013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1277
1278 * config/tc-aarch64.c (output_operand_error_record): Change to output
1279 the out-of-range error message as value-expected message if there is
1280 only one single value in the expected range.
1281 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1282 LSL #0 as a programmer-friendly feature.
1283
8fd4256d
L		 12842013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1285
1286 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1287 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1288 BFD_RELOC_64_SIZE relocations.
1289 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1290 for it.
1291 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1292 relocations against local symbols.
1293
a5840dce
AM		 12942013-01-16 Alan Modra <amodra@gmail.com>
1295
1296 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1297 finding some sort of toc syntax error, and break to avoid
1298 compiler uninit warning.
1299
af89796a
L		 13002013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1301
1302 PR gas/15019
1303 * config/tc-i386.c (lex_got): Increment length by 1 if the
1304 relocation token is removed.
1305
dd42f060
NC		 13062013-01-15 Nick Clifton <nickc@redhat.com>
1307
1308 * config/tc-v850.c (md_assemble): Allow signed values for
1309 V850E_IMMEDIATE.
1310
464e3686
SK		 13112013-01-11 Sean Keys <skeys@ipdatasys.com>
1312
1313 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1314 git to cvs.
464e3686 1315
5817ffd1
PB		 13162013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1317
1318 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1319 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1320 * config/tc-ppc.c (md_show_usage): Likewise.
1321 (ppc_handle_align): Handle power8's group ending nop.
1322
f4b1f6a9
SK		 13232013-01-10 Sean Keys <skeys@ipdatasys.com>
1324
1325 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1326 that the assember exits after the opcodes have been printed.
f4b1f6a9 1327
34bca508
L		 13282013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1329
1330 * app.c: Remove trailing white spaces.
1331 * as.c: Likewise.
1332 * as.h: Likewise.
1333 * cond.c: Likewise.
1334 * dw2gencfi.c: Likewise.
1335 * dwarf2dbg.h: Likewise.
1336 * ecoff.c: Likewise.
1337 * input-file.c: Likewise.
1338 * itbl-lex.h: Likewise.
1339 * output-file.c: Likewise.
1340 * read.c: Likewise.
1341 * sb.c: Likewise.
1342 * subsegs.c: Likewise.
1343 * symbols.c: Likewise.
1344 * write.c: Likewise.
1345 * config/tc-i386.c: Likewise.
1346 * doc/Makefile.am: Likewise.
1347 * doc/Makefile.in: Likewise.
1348 * doc/c-aarch64.texi: Likewise.
1349 * doc/c-alpha.texi: Likewise.
1350 * doc/c-arc.texi: Likewise.
1351 * doc/c-arm.texi: Likewise.
1352 * doc/c-avr.texi: Likewise.
1353 * doc/c-bfin.texi: Likewise.
1354 * doc/c-cr16.texi: Likewise.
1355 * doc/c-d10v.texi: Likewise.
1356 * doc/c-d30v.texi: Likewise.
1357 * doc/c-h8300.texi: Likewise.
1358 * doc/c-hppa.texi: Likewise.
1359 * doc/c-i370.texi: Likewise.
1360 * doc/c-i386.texi: Likewise.
1361 * doc/c-i860.texi: Likewise.
1362 * doc/c-m32c.texi: Likewise.
1363 * doc/c-m32r.texi: Likewise.
1364 * doc/c-m68hc11.texi: Likewise.
1365 * doc/c-m68k.texi: Likewise.
1366 * doc/c-microblaze.texi: Likewise.
1367 * doc/c-mips.texi: Likewise.
1368 * doc/c-msp430.texi: Likewise.
1369 * doc/c-mt.texi: Likewise.
1370 * doc/c-s390.texi: Likewise.
1371 * doc/c-score.texi: Likewise.
1372 * doc/c-sh.texi: Likewise.
1373 * doc/c-sh64.texi: Likewise.
1374 * doc/c-tic54x.texi: Likewise.
1375 * doc/c-tic6x.texi: Likewise.
1376 * doc/c-v850.texi: Likewise.
1377 * doc/c-xc16x.texi: Likewise.
1378 * doc/c-xgate.texi: Likewise.
1379 * doc/c-xtensa.texi: Likewise.
1380 * doc/c-z80.texi: Likewise.
1381 * doc/internals.texi: Likewise.
1382
4c665b71
RM		 13832013-01-10 Roland McGrath <mcgrathr@google.com>
1384
1385 * hash.c (hash_new_sized): Make it global.
1386 * hash.h: Declare it.
1387 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1388 pass a small size.
1389
a3c62988
NC		 13902013-01-10 Will Newton <will.newton@imgtec.com>
1391
1392 * Makefile.am: Add Meta.
1393 * Makefile.in: Regenerate.
1394 * config/tc-metag.c: New file.
1395 * config/tc-metag.h: New file.
1396 * configure.tgt: Add Meta.
1397 * doc/Makefile.am: Add Meta.
1398 * doc/Makefile.in: Regenerate.
1399 * doc/all.texi: Add Meta.
1400 * doc/as.texiinfo: Document Meta options.
1401 * doc/c-metag.texi: New file.
1402
b37df7c4
SE		 14032013-01-09 Steve Ellcey <sellcey@mips.com>
1404
1405 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1406 calls.
1407 * config/tc-mips.c (internalError): Remove, replace with abort.
1408
a3251895
YZ		 14092013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1410
1411 * config/tc-aarch64.c (parse_operands): Change to compare the result
1412 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1413
8ab8155f
NC		 14142013-01-07 Nick Clifton <nickc@redhat.com>
1415
1416 PR gas/14887
1417 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1418 anticipated character.
1419 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1420 here as it is no longer needed.
1421
a4ac1c42
AS		 14222013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1423
1424 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1425 * doc/c-score.texi (SCORE-Opts): Likewise.
1426 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1427
e407c74b
NC		 14282013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1429
1430 * config/tc-mips.c: Add support for MIPS r5900.
1431 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1432 lq and sq.
1433 (can_swap_branch_p, get_append_method): Detect some conditional
1434 short loops to fix a bug on the r5900 by NOP in the branch delay
1435 slot.
1436 (M_MUL): Support 3 operands in multu on r5900.
1437 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1438 (s_mipsset): Force 32 bit floating point on r5900.
1439 (mips_ip): Check parameter range of instructions mfps and mtps on
1440 r5900.
1441 * configure.in: Detect CPU type when target string contains r5900
1442 (e.g. mips64r5900el-linux-gnu).
1443
62658407
L		 14442013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1445
1446 * as.c (parse_args): Update copyright year to 2013.
1447
95830fd1
YZ		 14482013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1449
1450 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1451 and "cortex57".
1452
517bb291 14532013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1454
517bb291
NC		 1455 PR gas/14987
1456 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1457 closing bracket.
d709e4e6 1458
517bb291 1459For older changes see ChangeLog-2012
08d56133 1460\f
517bb291 1461Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1462
1463Copying and distribution of this file, with or without modification,
1464are permitted in any medium without royalty provided the copyright
1465notice and this notice are preserved.
1466
08d56133
NC		 1467Local Variables:
1468mode: change-log
1469left-margin: 8
1470fill-column: 74
1471version-control: never
1472End:
GDB Binutils - Deliverables
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