Improve "help all".
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b138abaa
NC
12006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
2
3 * tc-score.c (data_op2): Check invalid operands.
4 (my_get_expression): Const operand of some instructions can not be
5 symbol in assembly.
6 (get_insn_class_from_type): Handle instruction type Insn_internal.
7 (do_macro_ldst_label): Modify inst.type.
8 (Insn_PIC): Delete.
9 (data_op2): The immediate value in lw is 15 bit signed.
10
c79b7c30
RC
112006-10-29 Randolph Chung <tausq@debian.org>
12
13 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
14 (hppa_regname_to_dw2regnum): New funcions.
15 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
16 (tc_cfi_frame_initial_instructions)
17 (tc_regname_to_dw2regnum): Define.
18 (hppa_cfi_frame_initial_instructions)
19 (hppa_regname_to_dw2regnum): Declare.
20 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
21 (DWARF2_CIE_DATA_ALIGNMENT): Define.
22
e2785c44
NC
232006-10-29 Nick Clifton <nickc@redhat.com>
24
25 * config/tc-spu.c (md_assemble): Cast printf string size parameter
26 to int in order to avoid a compiler warning.
27
86157c20
AS
282006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
29
30 * config/tc-sh.c (md_assemble): Define size of branches.
31
ba5f0fda
BE
322006-10-26 Ben Elliston <bje@au.ibm.com>
33
34 * dw2gencfi.c (cfi_add_CFA_offset):
35 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
36
033cd5fd
BE
37 * write.c (chain_frchains_together_1): Assert that this function
38 never returns a pointer to the auto variable `dummy'.
39
e9f53129
AM
402006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
41 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
42 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
43 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
44 Alan Modra <amodra@bigpond.net.au>
45
46 * config/tc-spu.c: New file.
47 * config/tc-spu.h: New file.
48 * configure.tgt: Add SPU support.
49 * Makefile.am: Likewise. Run "make dep-am".
50 * Makefile.in: Regenerate.
51 * po/POTFILES.in: Regenerate.
52
7b383517
BE
532006-10-25 Ben Elliston <bje@au.ibm.com>
54
55 * expr.c (expr): Replace O_add case in switch (op_left) explaining
56 why it can never occur.
57
ede602d7
AM
582006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
59
60 * doc/c-ppc.texi (-mcell): Document.
61 * config/tc-ppc.c (parse_cpu): Parse -mcell.
62 (md_show_usage): Document -mcell.
63
7918206c
MM
642006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
65
66 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
67
878bcc43
AM
682006-10-23 Alan Modra <amodra@bigpond.net.au>
69
70 * config/tc-m68hc11.c (md_assemble): Quiet warning.
71
8620418b
MF
722006-10-19 Mike Frysinger <vapier@gentoo.org>
73
74 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
75 (x86_64_section_letter): Likewise.
76
b3549761
NC
772006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
78
79 * config/tc-score.c (build_relax_frag): Compute correct
80 tc_frag_data.fixp.
81
71a75f6f
MF
822006-10-18 Roy Marples <uberlord@gentoo.org>
83
84 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
85 elf32-sparc as a viable target for the -32 switch and any target
86 starting with elf64-sparc as a viable target for the -64 switch.
87 (sparc_target_format): For 64-bit ELF flavoured output use
88 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
89 ELF_TARGET_FORMAT.
71a75f6f
MF
90 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
91
e1b5fdd4
L
922006-10-17 H.J. Lu <hongjiu.lu@intel.com>
93
94 * configure: Regenerated.
95
f8ef9cd7
BS
962006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
97
98 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
99 in addition to testing for '\n'.
100 (TC_EOL_IN_INSN): Provide a default definition if necessary.
101
eb1fe072
NC
1022006-10-13 Sterling Augstine <sterling@tensilica.com>
103
104 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
105 a disjoint DW_AT range.
106
ec6e49f4
NC
1072006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
108
109 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
110
036dc3f7
PB
1112006-10-08 Paul Brook <paul@codesourcery.com>
112
113 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
114 (parse_operands): Use parse_big_immediate for OP_NILO.
115 (neon_cmode_for_logic_imm): Try smaller element sizes.
116 (neon_cmode_for_move_imm): Ditto.
117 (do_neon_logic): Handle .i64 pseudo-op.
118
3bb0c887
AM
1192006-09-29 Alan Modra <amodra@bigpond.net.au>
120
121 * po/POTFILES.in: Regenerate.
122
ef05d495
L
1232006-09-28 H.J. Lu <hongjiu.lu@intel.com>
124
125 * config/tc-i386.h (CpuMNI): Renamed to ...
126 (CpuSSSE3): This.
127 (CpuUnknownFlags): Updated.
128 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
129 and PROCESSOR_MEROM with PROCESSOR_CORE2.
130 * config/tc-i386.c: Updated.
131 * doc/c-i386.texi: Likewise.
a70ae331 132
ef05d495
L
133 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
134
d8ad03e9
NC
1352006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
136
137 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
138
df3ca5a3
NC
1392006-09-27 Nick Clifton <nickc@redhat.com>
140
141 * output-file.c (output_file_close): Prevent an infinite loop
142 reporting that stdoutput could not be closed.
143
2d447fca
JM
1442006-09-26 Mark Shinwell <shinwell@codesourcery.com>
145 Joseph Myers <joseph@codesourcery.com>
146 Ian Lance Taylor <ian@wasabisystems.com>
147 Ben Elliston <bje@wasabisystems.com>
148
149 * config/tc-arm.c (arm_cext_iwmmxt2): New.
150 (enum operand_parse_code): New code OP_RIWR_I32z.
151 (parse_operands): Handle OP_RIWR_I32z.
152 (do_iwmmxt_wmerge): New function.
153 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
154 a register.
155 (do_iwmmxt_wrwrwr_or_imm5): New function.
156 (insns): Mark instructions as RIWR_I32z as appropriate.
157 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
158 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
159 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
160 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
161 (md_begin): Handle IWMMXT2.
162 (arm_cpus): Add iwmmxt2.
163 (arm_extensions): Likewise.
164 (arm_archs): Likewise.
165
ba83aca1
BW
1662006-09-25 Bob Wilson <bob.wilson@acm.org>
167
168 * doc/as.texinfo (Overview): Revise description of --keep-locals.
169 Add xref to "Symbol Names".
170 (L): Refer to "local symbols" instead of "local labels". Move
171 definition to "Symbol Names" section; add xref to that section.
172 (Symbol Names): Use "Local Symbol Names" section to define local
173 symbols. Add "Local Labels" heading for description of temporary
174 forward/backward labels, and refer to those as "local labels".
175
539e75ad
L
1762006-09-23 H.J. Lu <hongjiu.lu@intel.com>
177
178 PR binutils/3235
179 * config/tc-i386.c (match_template): Check address size prefix
180 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
181 operand.
182
5e02f92e
AM
1832006-09-22 Alan Modra <amodra@bigpond.net.au>
184
185 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
186
885afe7b
AM
1872006-09-22 Alan Modra <amodra@bigpond.net.au>
188
189 * as.h (as_perror): Delete declaration.
190 * gdbinit.in (as_perror): Delete breakpoint.
191 * messages.c (as_perror): Delete function.
192 * doc/internals.texi: Remove as_perror description.
193 * listing.c (listing_print: Don't use as_perror.
194 * output-file.c (output_file_create, output_file_close): Likewise.
195 * symbols.c (symbol_create, symbol_clone): Likewise.
196 * write.c (write_contents): Likewise.
197 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
198 * config/tc-tic54x.c (tic54x_mlib): Likewise.
199
3aeeedbb
AM
2002006-09-22 Alan Modra <amodra@bigpond.net.au>
201
202 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
203 (ppc_handle_align): New function.
204 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
205 (SUB_SEGMENT_ALIGN): Define as zero.
206
96e9638b
BW
2072006-09-20 Bob Wilson <bob.wilson@acm.org>
208
209 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
210 (Overview): Skip cross reference in man page.
211
99ad8390
NC
2122006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
213
214 * configure.in: Add new target x86_64-pc-mingw64.
215 * configure: Regenerate.
216 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
217 * config/obj-coff.h: Add handling for TE_PEP target specific code
218 and definitions.
99ad8390
NC
219 * config/tc-i386.c: Add new targets.
220 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
221 (x86_64_target_format): Add new method for setup proper default
222 target cpu mode.
99ad8390
NC
223 * config/te-pep.h: Add new target definition header.
224 (TE_PEP): New macro: Identifies new target architecture.
225 (COFF_WITH_pex64): Set proper includes in bfd.
226 * NEWS: Mention new target.
227
73332571
BS
2282006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
229
230 * config/bfin-parse.y (binary): Change sub of const to add of negated
231 const.
232
1c0d3aa6
NC
2332006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
234
235 * config/tc-score.c: New file.
236 * config/tc-score.h: Newf file.
237 * configure.tgt: Add Score target.
238 * Makefile.am: Add Score files.
239 * Makefile.in: Regenerate.
240 * NEWS: Mention new target support.
241
4fa3602b
PB
2422006-09-16 Paul Brook <paul@codesourcery.com>
243
244 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
245 * doc/c-arm.texi (movsp): Document offset argument.
246
16dd5e42
PB
2472006-09-16 Paul Brook <paul@codesourcery.com>
248
249 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
250 unsigned int to avoid 64-bit host problems.
251
c4ae04ce
BS
2522006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
253
254 * config/bfin-parse.y (binary): Do some more constant folding for
255 additions.
256
e5d4a5a6
JB
2572006-09-13 Jan Beulich <jbeulich@novell.com>
258
259 * input-file.c (input_file_give_next_buffer): Demote as_bad to
260 as_warn.
261
1a1219cb
AM
2622006-09-13 Alan Modra <amodra@bigpond.net.au>
263
264 PR gas/3165
265 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
266 in parens.
267
f79d9c1d
AM
2682006-09-13 Alan Modra <amodra@bigpond.net.au>
269
270 * input-file.c (input_file_open): Replace as_perror with as_bad
271 so that gas exits with error on file errors. Correct error
272 message.
273 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 274 * input-file.h: Update comment.
f79d9c1d 275
f512f76f
NC
2762006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
277
278 PR gas/3172
279 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
280 registers as a sub-class of wC registers.
281
8d79fd44
AM
2822006-09-11 Alan Modra <amodra@bigpond.net.au>
283
284 PR gas/3165
285 * config/tc-mips.h (enum dwarf2_format): Forward declare.
286 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
287 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
288 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
289
6258339f
NC
2902006-09-08 Nick Clifton <nickc@redhat.com>
291
292 PR gas/3129
293 * doc/as.texinfo (Macro): Improve documentation about separating
294 macro arguments from following text.
295
f91e006c
PB
2962006-09-08 Paul Brook <paul@codesourcery.com>
297
298 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
299
466bbf93
PB
3002006-09-07 Paul Brook <paul@codesourcery.com>
301
302 * config/tc-arm.c (parse_operands): Mark operand as present.
303
428e3f1f
PB
3042006-09-04 Paul Brook <paul@codesourcery.com>
305
306 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
307 (do_neon_dyadic_if_i_d): Avoid setting U bit.
308 (do_neon_mac_maybe_scalar): Ditto.
309 (do_neon_dyadic_narrow): Force operand type to NT_integer.
310 (insns): Remove out of date comments.
311
fb25138b
NC
3122006-08-29 Nick Clifton <nickc@redhat.com>
313
314 * read.c (s_align): Initialize the 'stopc' variable to prevent
315 compiler complaints about it being used without being
316 initialized.
317 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
318 s_float_space, s_struct, cons_worker, equals): Likewise.
319
5091343a
AM
3202006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
321
322 * ecoff.c (ecoff_directive_val): Fix message typo.
323 * config/tc-ns32k.c (convert_iif): Likewise.
324 * config/tc-sh64.c (shmedia_check_limits): Likewise.
325
1f2a7e38
BW
3262006-08-25 Sterling Augustine <sterling@tensilica.com>
327 Bob Wilson <bob.wilson@acm.org>
328
329 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
330 the state of the absolute_literals directive. Remove align frag at
331 the start of the literal pool position.
332
34135039
BW
3332006-08-25 Bob Wilson <bob.wilson@acm.org>
334
335 * doc/c-xtensa.texi: Add @group commands in examples.
336
74869ac7
BW
3372006-08-24 Bob Wilson <bob.wilson@acm.org>
338
339 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
340 (INIT_LITERAL_SECTION_NAME): Delete.
341 (lit_state struct): Remove segment names, init_lit_seg, and
342 fini_lit_seg. Add lit_prefix and current_text_seg.
343 (init_literal_head_h, init_literal_head): Delete.
344 (fini_literal_head_h, fini_literal_head): Delete.
345 (xtensa_begin_directive): Move argument parsing to
346 xtensa_literal_prefix function.
347 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
348 (xtensa_literal_prefix): Parse the directive argument here and
349 record it in the lit_prefix field. Remove code to derive literal
350 section names.
351 (linkonce_len): New.
352 (get_is_linkonce_section): Use linkonce_len. Check for any
353 ".gnu.linkonce.*" section, not just text sections.
354 (md_begin): Remove initialization of deleted lit_state fields.
355 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
356 to init_literal_head and fini_literal_head.
357 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
358 when traversing literal_head list.
359 (match_section_group): New.
360 (cache_literal_section): Rewrite to determine the literal section
361 name on the fly, create the section and return it.
362 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
363 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
364 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
365 Use xtensa_get_property_section from bfd.
366 (retrieve_xtensa_section): Delete.
367 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
368 description to refer to plural literal sections and add xref to
369 the Literal Directive section.
370 (Literal Directive): Describe new rules for deriving literal section
371 names. Add footnote for special case of .init/.fini with
372 --text-section-literals.
373 (Literal Prefix Directive): Replace old naming rules with xref to the
374 Literal Directive section.
375
87a1fd79
JM
3762006-08-21 Joseph Myers <joseph@codesourcery.com>
377
378 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
379 merging with previous long opcode.
380
7148cc28
NC
3812006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
382
383 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
384 * Makefile.in: Regenerate.
385 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
386 renamed. Adjust.
387
3e9e4fcf
JB
3882006-08-16 Julian Brown <julian@codesourcery.com>
389
390 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
391 to use ARM instructions on non-ARM-supporting cores.
392 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
393 mode automatically based on cpu variant.
394 (md_begin): Call above function.
395
267d2029
JB
3962006-08-16 Julian Brown <julian@codesourcery.com>
397
398 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
399 recognized in non-unified syntax mode.
400
4be041b2
TS
4012006-08-15 Thiemo Seufer <ths@mips.com>
402 Nigel Stephens <nigel@mips.com>
403 David Ung <davidu@mips.com>
404
405 * configure.tgt: Handle mips*-sde-elf*.
406
3a93f742
TS
4072006-08-12 Thiemo Seufer <ths@networkno.de>
408
409 * config/tc-mips.c (mips16_ip): Fix argument register handling
410 for restore instruction.
411
1737851b
BW
4122006-08-08 Bob Wilson <bob.wilson@acm.org>
413
414 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
415 (out_sleb128): New.
416 (out_fixed_inc_line_addr): New.
417 (process_entries): Use out_fixed_inc_line_addr when
418 DWARF2_USE_FIXED_ADVANCE_PC is set.
419 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
420
e14e52f8
DD
4212006-08-08 DJ Delorie <dj@redhat.com>
422
423 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
424 vs full symbols so that we never have more than one pointer value
425 for any given symbol in our symbol table.
426
802f5d9e
NC
4272006-08-08 Sterling Augustine <sterling@tensilica.com>
428
429 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
430 and emit DW_AT_ranges when code in compilation unit is not
431 contiguous.
432 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
433 is not contiguous.
434 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
435 (out_debug_ranges): New function to emit .debug_ranges section
436 when code is not contiguous.
437
720abc60
NC
4382006-08-08 Nick Clifton <nickc@redhat.com>
439
440 * config/tc-arm.c (WARN_DEPRECATED): Enable.
441
f0927246
NC
4422006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
443
444 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
445 only block.
446 (pe_directive_secrel) [TE_PE]: New function.
447 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
448 loc, loc_mark_labels.
449 [TE_PE]: Handle secrel32.
450 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
451 call.
452 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
453 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
454 (md_section_align): Only round section sizes here for AOUT
455 targets.
456 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
457 (tc_pe_dwarf2_emit_offset): New function.
458 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
459 (cons_fix_new_arm): Handle O_secrel.
460 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
461 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
462 of OBJ_ELF only block.
463 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
464 tc_pe_dwarf2_emit_offset.
465
55e6e397
RS
4662006-08-04 Richard Sandiford <richard@codesourcery.com>
467
468 * config/tc-sh.c (apply_full_field_fix): New function.
469 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
470 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
471 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
472 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
473
9cd19b17
NC
4742006-08-03 Nick Clifton <nickc@redhat.com>
475
476 PR gas/2991
477 * config.in: Regenerate.
478
97f87066
JM
4792006-08-03 Joseph Myers <joseph@codesourcery.com>
480
481 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 482 for OP_RIWR_RIWC.
97f87066 483
41adaa5c
JM
4842006-08-03 Joseph Myers <joseph@codesourcery.com>
485
486 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
487 (parse_operands): Handle it.
488 (insns): Use it for tmcr and tmrc.
489
9d7cbccd
NC
4902006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
491
492 PR binutils/2983
493 * config/tc-i386.c (md_parse_option): Treat any target starting
494 with elf64_x86_64 as a viable target for the -64 switch.
495 (i386_target_format): For 64-bit ELF flavoured output use
496 ELF_TARGET_FORMAT64.
497 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
498
c973bc5c
NC
4992006-08-02 Nick Clifton <nickc@redhat.com>
500
501 PR gas/2991
502 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
503 bfd/aclocal.m4.
504 * configure.in: Run BFD_BINARY_FOPEN.
505 * configure: Regenerate.
506 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
507 file to include.
508
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L
5092006-08-01 H.J. Lu <hongjiu.lu@intel.com>
510
511 * config/tc-i386.c (md_assemble): Don't update
512 cpu_arch_isa_flags.
513
b4c71f56
TS
5142006-08-01 Thiemo Seufer <ths@mips.com>
515
516 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
517
54f4ddb3
TS
5182006-08-01 Thiemo Seufer <ths@mips.com>
519
520 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
521 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
522 BFD_RELOC_32 and BFD_RELOC_16.
523 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
524 md_convert_frag, md_obj_end): Fix comment formatting.
525
d103cf61
TS
5262006-07-31 Thiemo Seufer <ths@mips.com>
527
528 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
529 handling for BFD_RELOC_MIPS16_JMP.
530
601e61cd
NC
5312006-07-24 Andreas Schwab <schwab@suse.de>
532
533 PR/2756
534 * read.c (read_a_source_file): Ignore unknown text after line
535 comment character. Fix misleading comment.
536
b45619c0
NC
5372006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
538
539 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
540 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
541 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
542 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
543 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
544 doc/c-z80.texi, doc/internals.texi: Fix some typos.
545
784906c5
NC
5462006-07-21 Nick Clifton <nickc@redhat.com>
547
548 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
549 linker testsuite.
550
d5f010e9
TS
5512006-07-20 Thiemo Seufer <ths@mips.com>
552 Nigel Stephens <nigel@mips.com>
553
554 * config/tc-mips.c (md_parse_option): Don't infer optimisation
555 options from debug options.
556
35d3d567
TS
5572006-07-20 Thiemo Seufer <ths@mips.com>
558
559 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
560 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
561
401a54cf
PB
5622006-07-19 Paul Brook <paul@codesourcery.com>
563
564 * config/tc-arm.c (insns): Fix rbit Arm opcode.
565
16805f35
PB
5662006-07-18 Paul Brook <paul@codesourcery.com>
567
568 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
569 (md_convert_frag): Use correct reloc for add_pc. Use
570 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
571 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
572 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
573
d9e05e4e
AM
5742006-07-17 Mat Hostetter <mat@lcs.mit.edu>
575
576 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
577 when file and line unknown.
578
f43abd2b
TS
5792006-07-17 Thiemo Seufer <ths@mips.com>
580
581 * read.c (s_struct): Use IS_ELF.
582 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
583 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
584 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
585 s_mips_mask): Likewise.
586
a2902af6
TS
5872006-07-16 Thiemo Seufer <ths@mips.com>
588 David Ung <davidu@mips.com>
589
590 * read.c (s_struct): Handle ELF section changing.
591 * config/tc-mips.c (s_align): Leave enabling auto-align to the
592 generic code.
593 (s_change_sec): Try section changing only if we output ELF.
594
d32cad65
L
5952006-07-15 H.J. Lu <hongjiu.lu@intel.com>
596
597 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
598 CpuAmdFam10.
599 (smallest_imm_type): Remove Cpu086.
600 (i386_target_format): Likewise.
601
602 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
603 Update CpuXXX.
604
050dfa73
MM
6052006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
606 Michael Meissner <michael.meissner@amd.com>
607
608 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
609 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
610 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
611 architecture.
612 (i386_align_code): Ditto.
613 (md_assemble_code): Add support for insertq/extrq instructions,
614 swapping as needed for intel syntax.
615 (swap_imm_operands): New function to swap immediate operands.
616 (swap_operands): Deal with 4 operand instructions.
617 (build_modrm_byte): Add support for insertq instruction.
618
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L
6192006-07-13 H.J. Lu <hongjiu.lu@intel.com>
620
621 * config/tc-i386.h (Size64): Fix a typo in comment.
622
01eaea5a
NC
6232006-07-12 Nick Clifton <nickc@redhat.com>
624
625 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 626 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
627 already been checked here.
628
1e85aad8
JW
6292006-07-07 James E Wilson <wilson@specifix.com>
630
631 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
632
1370e33d
NC
6332006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
634 Nick Clifton <nickc@redhat.com>
635
636 PR binutils/2877
637 * doc/as.texi: Fix spelling typo: branchs => branches.
638 * doc/c-m68hc11.texi: Likewise.
639 * config/tc-m68hc11.c: Likewise.
640 Support old spelling of command line switch for backwards
641 compatibility.
642
5f0fe04b
TS
6432006-07-04 Thiemo Seufer <ths@mips.com>
644 David Ung <davidu@mips.com>
645
646 * config/tc-mips.c (s_is_linkonce): New function.
647 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
648 weak, external, and linkonce symbols.
649 (pic_need_relax): Use s_is_linkonce.
650
85234291
L
6512006-06-24 H.J. Lu <hongjiu.lu@intel.com>
652
653 * doc/as.texinfo (Org): Remove space.
654 (P2align): Add "@var{abs-expr},".
655
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L
6562006-06-23 H.J. Lu <hongjiu.lu@intel.com>
657
658 * config/tc-i386.c (cpu_arch_tune_set): New.
659 (cpu_arch_isa): Likewise.
660 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
661 nops with short or long nop sequences based on -march=/.arch
662 and -mtune=.
663 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
664 set cpu_arch_tune and cpu_arch_tune_flags.
665 (md_parse_option): For -march=, set cpu_arch_isa and set
666 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
667 0. Set cpu_arch_tune_set to 1 for -mtune=.
668 (i386_target_format): Don't set cpu_arch_tune.
669
d4dc2f22
TS
6702006-06-23 Nigel Stephens <nigel@mips.com>
671
672 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
673 generated .sbss.* and .gnu.linkonce.sb.*.
674
a8dbcb85
TS
6752006-06-23 Thiemo Seufer <ths@mips.com>
676 David Ung <davidu@mips.com>
677
678 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
679 label_list.
680 * config/tc-mips.c (label_list): Define per-segment label_list.
681 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
682 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
683 mips_from_file_after_relocs, mips_define_label): Use per-segment
684 label_list.
685
3994f87e
TS
6862006-06-22 Thiemo Seufer <ths@mips.com>
687
688 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
689 (append_insn): Use it.
690 (md_apply_fix): Whitespace formatting.
691 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
692 mips16_extended_frag): Remove register specifier.
693 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
694 constants.
695
fa073d69
MS
6962006-06-21 Mark Shinwell <shinwell@codesourcery.com>
697
698 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
699 a directive saving VFP registers for ARMv6 or later.
700 (s_arm_unwind_save): Add parameter arch_v6 and call
701 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
702 appropriate.
703 (md_pseudo_table): Add entry for new "vsave" directive.
704 * doc/c-arm.texi: Correct error in example for "save"
705 directive (fstmdf -> fstmdx). Also document "vsave" directive.
706
8e77b565 7072006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
708 Anatoly Sokolov <aesok@post.ru>
709
a70ae331
AM
710 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
711 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
712 atmega164p/atmega324p.
713 * doc/c-avr.texi: Document new mcu and arch options.
714
8b1ad454
NC
7152006-06-17 Nick Clifton <nickc@redhat.com>
716
717 * config/tc-arm.c (enum parse_operand_result): Move outside of
718 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
719
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L
7202006-06-16 H.J. Lu <hongjiu.lu@intel.com>
721
722 * config/tc-i386.h (processor_type): New.
723 (arch_entry): Add type.
724
725 * config/tc-i386.c (cpu_arch_tune): New.
726 (cpu_arch_tune_flags): Likewise.
727 (cpu_arch_isa_flags): Likewise.
728 (cpu_arch): Updated.
729 (set_cpu_arch): Also update cpu_arch_isa_flags.
730 (md_assemble): Update cpu_arch_isa_flags.
731 (OPTION_MARCH): New.
732 (OPTION_MTUNE): Likewise.
733 (md_longopts): Add -march= and -mtune=.
734 (md_parse_option): Support -march= and -mtune=.
735 (md_show_usage): Add -march=CPU/-mtune=CPU.
736 (i386_target_format): Also update cpu_arch_isa_flags,
737 cpu_arch_tune and cpu_arch_tune_flags.
738
739 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
740
741 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
742
4962c51a
MS
7432006-06-15 Mark Shinwell <shinwell@codesourcery.com>
744
745 * config/tc-arm.c (enum parse_operand_result): New.
746 (struct group_reloc_table_entry): New.
747 (enum group_reloc_type): New.
748 (group_reloc_table): New array.
749 (find_group_reloc_table_entry): New function.
750 (parse_shifter_operand_group_reloc): New function.
751 (parse_address_main): New function, incorporating code
752 from the old parse_address function. To be used via...
753 (parse_address): wrapper for parse_address_main; and
754 (parse_address_group_reloc): new function, likewise.
755 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
756 OP_ADDRGLDRS, OP_ADDRGLDC.
757 (parse_operands): Support for these new operand codes.
758 New macro po_misc_or_fail_no_backtrack.
759 (encode_arm_cp_address): Preserve group relocations.
760 (insns): Modify to use the above operand codes where group
761 relocations are permitted.
762 (md_apply_fix): Handle the group relocations
763 ALU_PC_G0_NC through LDC_SB_G2.
764 (tc_gen_reloc): Likewise.
765 (arm_force_relocation): Leave group relocations for the linker.
766 (arm_fix_adjustable): Likewise.
767
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JB
7682006-06-15 Julian Brown <julian@codesourcery.com>
769
770 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
771 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
772 relocs properly.
773
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L
7742006-06-12 H.J. Lu <hongjiu.lu@intel.com>
775
776 * config/tc-i386.c (process_suffix): Don't add rex64 for
777 "xchg %rax,%rax".
778
1787fe5b
TS
7792006-06-09 Thiemo Seufer <ths@mips.com>
780
781 * config/tc-mips.c (mips_ip): Maintain argument count.
782
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AM
7832006-06-09 Alan Modra <amodra@bigpond.net.au>
784
785 * config/tc-iq2000.c: Include sb.h.
786
7c752c2a
TS
7872006-06-08 Nigel Stephens <nigel@mips.com>
788
789 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
790 aliases for better compatibility with SGI tools.
791
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AM
7922006-06-08 Alan Modra <amodra@bigpond.net.au>
793
794 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
795 * Makefile.am (GASLIBS): Expand @BFDLIB@.
796 (BFDVER_H): Delete.
797 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
798 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
799 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
800 Run "make dep-am".
801 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
802 * Makefile.in: Regenerate.
803 * doc/Makefile.in: Regenerate.
804 * configure: Regenerate.
805
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JM
8062006-06-07 Joseph S. Myers <joseph@codesourcery.com>
807
808 * po/Make-in (pdf, ps): New dummy targets.
809
037e8744
JB
8102006-06-07 Julian Brown <julian@codesourcery.com>
811
812 * config/tc-arm.c (stdarg.h): include.
813 (arm_it): Add uncond_value field. Add isvec and issingle to operand
814 array.
815 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
816 REG_TYPE_NSDQ (single, double or quad vector reg).
817 (reg_expected_msgs): Update.
818 (BAD_FPU): Add macro for unsupported FPU instruction error.
819 (parse_neon_type): Support 'd' as an alias for .f64.
820 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
821 sets of registers.
822 (parse_vfp_reg_list): Don't update first arg on error.
823 (parse_neon_mov): Support extra syntax for VFP moves.
824 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
825 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
826 (parse_operands): Support isvec, issingle operands fields, new parse
827 codes above.
828 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
829 msr variants.
830 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
831 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
832 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
833 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
834 shapes.
835 (neon_shape): Redefine in terms of above.
836 (neon_shape_class): New enumeration, table of shape classes.
837 (neon_shape_el): New enumeration. One element of a shape.
838 (neon_shape_el_size): Register widths of above, where appropriate.
839 (neon_shape_info): New struct. Info for shape table.
840 (neon_shape_tab): New array.
841 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
842 (neon_check_shape): Rewrite as...
843 (neon_select_shape): New function to classify instruction shapes,
844 driven by new table neon_shape_tab array.
845 (neon_quad): New function. Return 1 if shape should set Q flag in
846 instructions (or equivalent), 0 otherwise.
847 (type_chk_of_el_type): Support F64.
848 (el_type_of_type_chk): Likewise.
849 (neon_check_type): Add support for VFP type checking (VFP data
850 elements fill their containing registers).
851 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
852 in thumb mode for VFP instructions.
853 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
854 and encode the current instruction as if it were that opcode.
855 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
856 arguments, call function in PFN.
857 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
858 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
859 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
860 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
861 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
862 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
863 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
864 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
865 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
866 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
867 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
868 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
869 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
870 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
871 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
872 neon_quad.
873 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
874 between VFP and Neon turns out to belong to Neon. Perform
875 architecture check and fill in condition field if appropriate.
876 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
877 (do_neon_cvt): Add support for VFP variants of instructions.
878 (neon_cvt_flavour): Extend to cover VFP conversions.
879 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
880 vmov variants.
881 (do_neon_ldr_str): Handle single-precision VFP load/store.
882 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
883 NS_NULL not NS_IGNORE.
884 (opcode_tag): Add OT_csuffixF for operands which either take a
885 conditional suffix, or have 0xF in the condition field.
886 (md_assemble): Add support for OT_csuffixF.
887 (NCE): Replace macro with...
888 (NCE_tag, NCE, NCEF): New macros.
889 (nCE): Replace macro with...
890 (nCE_tag, nCE, nCEF): New macros.
891 (insns): Add support for VFP insns or VFP versions of insns msr,
892 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
893 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
894 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
895 VFP/Neon insns together.
896
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8972006-06-07 Alan Modra <amodra@bigpond.net.au>
898 Ladislav Michl <ladis@linux-mips.org>
899
900 * app.c: Don't include headers already included by as.h.
901 * as.c: Likewise.
902 * atof-generic.c: Likewise.
903 * cgen.c: Likewise.
904 * dwarf2dbg.c: Likewise.
905 * expr.c: Likewise.
906 * input-file.c: Likewise.
907 * input-scrub.c: Likewise.
908 * macro.c: Likewise.
909 * output-file.c: Likewise.
910 * read.c: Likewise.
911 * sb.c: Likewise.
912 * config/bfin-lex.l: Likewise.
913 * config/obj-coff.h: Likewise.
914 * config/obj-elf.h: Likewise.
915 * config/obj-som.h: Likewise.
916 * config/tc-arc.c: Likewise.
917 * config/tc-arm.c: Likewise.
918 * config/tc-avr.c: Likewise.
919 * config/tc-bfin.c: Likewise.
920 * config/tc-cris.c: Likewise.
921 * config/tc-d10v.c: Likewise.
922 * config/tc-d30v.c: Likewise.
923 * config/tc-dlx.h: Likewise.
924 * config/tc-fr30.c: Likewise.
925 * config/tc-frv.c: Likewise.
926 * config/tc-h8300.c: Likewise.
927 * config/tc-hppa.c: Likewise.
928 * config/tc-i370.c: Likewise.
929 * config/tc-i860.c: Likewise.
930 * config/tc-i960.c: Likewise.
931 * config/tc-ip2k.c: Likewise.
932 * config/tc-iq2000.c: Likewise.
933 * config/tc-m32c.c: Likewise.
934 * config/tc-m32r.c: Likewise.
935 * config/tc-maxq.c: Likewise.
936 * config/tc-mcore.c: Likewise.
937 * config/tc-mips.c: Likewise.
938 * config/tc-mmix.c: Likewise.
939 * config/tc-mn10200.c: Likewise.
940 * config/tc-mn10300.c: Likewise.
941 * config/tc-msp430.c: Likewise.
942 * config/tc-mt.c: Likewise.
943 * config/tc-ns32k.c: Likewise.
944 * config/tc-openrisc.c: Likewise.
945 * config/tc-ppc.c: Likewise.
946 * config/tc-s390.c: Likewise.
947 * config/tc-sh.c: Likewise.
948 * config/tc-sh64.c: Likewise.
949 * config/tc-sparc.c: Likewise.
950 * config/tc-tic30.c: Likewise.
951 * config/tc-tic4x.c: Likewise.
952 * config/tc-tic54x.c: Likewise.
953 * config/tc-v850.c: Likewise.
954 * config/tc-vax.c: Likewise.
955 * config/tc-xc16x.c: Likewise.
956 * config/tc-xstormy16.c: Likewise.
957 * config/tc-xtensa.c: Likewise.
958 * config/tc-z80.c: Likewise.
959 * config/tc-z8k.c: Likewise.
960 * macro.h: Don't include sb.h or ansidecl.h.
961 * sb.h: Don't include stdio.h or ansidecl.h.
962 * cond.c: Include sb.h.
963 * itbl-lex.l: Include as.h instead of other system headers.
964 * itbl-parse.y: Likewise.
965 * itbl-ops.c: Similarly.
966 * itbl-ops.h: Don't include as.h or ansidecl.h.
967 * config/bfin-defs.h: Don't include bfd.h or as.h.
968 * config/bfin-parse.y: Include as.h instead of other system headers.
969
9622b051
AM
9702006-06-06 Ben Elliston <bje@au.ibm.com>
971 Anton Blanchard <anton@samba.org>
972
973 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
974 (md_show_usage): Document it.
975 (ppc_setup_opcodes): Test power6 opcode flag bits.
976 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
977
65263ce3
TS
9782006-06-06 Thiemo Seufer <ths@mips.com>
979 Chao-ying Fu <fu@mips.com>
980
981 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
982 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
983 (macro_build): Update comment.
984 (mips_ip): Allow DSP64 instructions for MIPS64R2.
985 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
986 CPU_HAS_MDMX.
987 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
988 MIPS_CPU_ASE_MDMX flags for sb1.
989
a9e24354
TS
9902006-06-05 Thiemo Seufer <ths@mips.com>
991
992 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
993 appropriate.
994 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
995 (mips_ip): Make overflowed/underflowed constant arguments in DSP
996 and MT instructions a fatal error. Use INSERT_OPERAND where
997 appropriate. Improve warnings for break and wait code overflows.
998 Use symbolic constant of OP_MASK_COPZ.
999 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1000
4cfe2c59
DJ
10012006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1002
1003 * po/Make-in (top_builddir): Define.
1004
e10fad12
JM
10052006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1006
1007 * doc/Makefile.am (TEXI2DVI): Define.
1008 * doc/Makefile.in: Regenerate.
1009 * doc/c-arc.texi: Fix typo.
1010
12e64c2c
AM
10112006-06-01 Alan Modra <amodra@bigpond.net.au>
1012
1013 * config/obj-ieee.c: Delete.
1014 * config/obj-ieee.h: Delete.
1015 * Makefile.am (OBJ_FORMATS): Remove ieee.
1016 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1017 (obj-ieee.o): Remove rule.
1018 * Makefile.in: Regenerate.
1019 * configure.in (atof): Remove tahoe.
1020 (OBJ_MAYBE_IEEE): Don't define.
1021 * configure: Regenerate.
1022 * config.in: Regenerate.
1023 * doc/Makefile.in: Regenerate.
1024 * po/POTFILES.in: Regenerate.
1025
20e95c23
DJ
10262006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1027
1028 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1029 and LIBINTL_DEP everywhere.
1030 (INTLLIBS): Remove.
1031 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1032 * acinclude.m4: Include new gettext macros.
1033 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1034 Remove local code for po/Makefile.
1035 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1036
eebf07fb
NC
10372006-05-30 Nick Clifton <nickc@redhat.com>
1038
1039 * po/es.po: Updated Spanish translation.
1040
b6aee19e
DC
10412006-05-06 Denis Chertykov <denisc@overta.ru>
1042
1043 * doc/c-avr.texi: New file.
1044 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1045 * doc/all.texi: Set AVR
1046 * doc/as.texinfo: Include c-avr.texi
1047
f8fdc850 10482006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1049
f8fdc850
JZ
1050 * config/bfin-parse.y (check_macfunc): Loose the condition of
1051 calling check_multiply_halfregs ().
1052
a3205465
JZ
10532006-05-25 Jie Zhang <jie.zhang@analog.com>
1054
1055 * config/bfin-parse.y (asm_1): Better check and deal with
1056 vector and scalar Multiply 16-Bit Operands instructions.
1057
9b52905e
NC
10582006-05-24 Nick Clifton <nickc@redhat.com>
1059
1060 * config/tc-hppa.c: Convert to ISO C90 format.
1061 * config/tc-hppa.h: Likewise.
1062
10632006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1064 Randolph Chung <randolph@tausq.org>
a70ae331 1065
9b52905e
NC
1066 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1067 is_tls_ieoff, is_tls_leoff): Define.
1068 (fix_new_hppa): Handle TLS.
1069 (cons_fix_new_hppa): Likewise.
1070 (pa_ip): Likewise.
1071 (md_apply_fix): Handle TLS relocs.
1072 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1073
a70ae331 10742006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1075
1076 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1077
ad3fea08
TS
10782006-05-23 Thiemo Seufer <ths@mips.com>
1079 David Ung <davidu@mips.com>
1080 Nigel Stephens <nigel@mips.com>
1081
1082 [ gas/ChangeLog ]
1083 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1084 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1085 ISA_HAS_MXHC1): New macros.
1086 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1087 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1088 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1089 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1090 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1091 (mips_after_parse_args): Change default handling of float register
1092 size to account for 32bit code with 64bit FP. Better sanity checking
1093 of ISA/ASE/ABI option combinations.
1094 (s_mipsset): Support switching of GPR and FPR sizes via
1095 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1096 options.
1097 (mips_elf_final_processing): We should record the use of 64bit FP
1098 registers in 32bit code but we don't, because ELF header flags are
1099 a scarce ressource.
1100 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1101 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1102 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1103 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1104 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1105 missing -march options. Document .set arch=CPU. Move .set smartmips
1106 to ASE page. Use @code for .set FOO examples.
1107
8b64503a
JZ
11082006-05-23 Jie Zhang <jie.zhang@analog.com>
1109
1110 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1111 if needed.
1112
403022e0
JZ
11132006-05-23 Jie Zhang <jie.zhang@analog.com>
1114
1115 * config/bfin-defs.h (bfin_equals): Remove declaration.
1116 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1117 * config/tc-bfin.c (bfin_name_is_register): Remove.
1118 (bfin_equals): Remove.
1119 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1120 (bfin_name_is_register): Remove declaration.
1121
7455baf8
TS
11222006-05-19 Thiemo Seufer <ths@mips.com>
1123 Nigel Stephens <nigel@mips.com>
1124
1125 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1126 (mips_oddfpreg_ok): New function.
1127 (mips_ip): Use it.
1128
707bfff6
TS
11292006-05-19 Thiemo Seufer <ths@mips.com>
1130 David Ung <davidu@mips.com>
1131
1132 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1133 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1134 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1135 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1136 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1137 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1138 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1139 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1140 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1141 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1142 reg_names_o32, reg_names_n32n64): Define register classes.
1143 (reg_lookup): New function, use register classes.
1144 (md_begin): Reserve register names in the symbol table. Simplify
1145 OBJ_ELF defines.
1146 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1147 Use reg_lookup.
1148 (mips16_ip): Use reg_lookup.
1149 (tc_get_register): Likewise.
1150 (tc_mips_regname_to_dw2regnum): New function.
1151
1df69f4f
TS
11522006-05-19 Thiemo Seufer <ths@mips.com>
1153
1154 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1155 Un-constify string argument.
1156 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1157 Likewise.
1158 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1159 Likewise.
1160 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1161 Likewise.
1162 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1163 Likewise.
1164 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1165 Likewise.
1166 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1167 Likewise.
1168
377260ba
NS
11692006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1170
1171 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1172 cfloat/m68881 to correct architecture before using it.
1173
cce7653b
NC
11742006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1175
a70ae331 1176 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1177 constant values.
1178
b0796911
PB
11792006-05-15 Paul Brook <paul@codesourcery.com>
1180
1181 * config/tc-arm.c (arm_adjust_symtab): Use
1182 bfd_is_arm_special_symbol_name.
1183
64b607e6
BW
11842006-05-15 Bob Wilson <bob.wilson@acm.org>
1185
1186 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1187 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1188 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1189 Handle errors from calls to xtensa_opcode_is_* functions.
1190
9b3f89ee
TS
11912006-05-14 Thiemo Seufer <ths@mips.com>
1192
1193 * config/tc-mips.c (macro_build): Test for currently active
1194 mips16 option.
1195 (mips16_ip): Reject invalid opcodes.
1196
370b66a1
CD
11972006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1198
1199 * doc/as.texinfo: Rename "Index" to "AS Index",
1200 and "ABORT" to "ABORT (COFF)".
1201
b6895b4f
PB
12022006-05-11 Paul Brook <paul@codesourcery.com>
1203
1204 * config/tc-arm.c (parse_half): New function.
1205 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1206 (parse_operands): Ditto.
1207 (do_mov16): Reject invalid relocations.
1208 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1209 (insns): Replace Iffff with HALF.
1210 (md_apply_fix): Add MOVW and MOVT relocs.
1211 (tc_gen_reloc): Ditto.
1212 * doc/c-arm.texi: Document relocation operators
1213
e28387c3
PB
12142006-05-11 Paul Brook <paul@codesourcery.com>
1215
1216 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1217
89ee2ebe
TS
12182006-05-11 Thiemo Seufer <ths@mips.com>
1219
1220 * config/tc-mips.c (append_insn): Don't check the range of j or
1221 jal addresses.
1222
53baae48
NC
12232006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1224
1225 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1226 relocs against external symbols for WinCE targets.
53baae48
NC
1227 (md_apply_fix): Likewise.
1228
4e2a74a8
TS
12292006-05-09 David Ung <davidu@mips.com>
1230
1231 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1232 j or jal address.
1233
337ff0a5
NC
12342006-05-09 Nick Clifton <nickc@redhat.com>
1235
1236 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1237 against symbols which are not going to be placed into the symbol
1238 table.
1239
8c9f705e
BE
12402006-05-09 Ben Elliston <bje@au.ibm.com>
1241
1242 * expr.c (operand): Remove `if (0 && ..)' statement and
1243 subsequently unused target_op label. Collapse `if (1 || ..)'
1244 statement.
1245 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1246 separately above the switch.
1247
2fd0d2ac
NC
12482006-05-08 Nick Clifton <nickc@redhat.com>
1249
1250 PR gas/2623
1251 * config/tc-msp430.c (line_separator_character): Define as |.
1252
e16bfa71
TS
12532006-05-08 Thiemo Seufer <ths@mips.com>
1254 Nigel Stephens <nigel@mips.com>
1255 David Ung <davidu@mips.com>
1256
1257 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1258 (mips_opts): Likewise.
1259 (file_ase_smartmips): New variable.
1260 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1261 (macro_build): Handle SmartMIPS instructions.
1262 (mips_ip): Likewise.
1263 (md_longopts): Add argument handling for smartmips.
1264 (md_parse_options, mips_after_parse_args): Likewise.
1265 (s_mipsset): Add .set smartmips support.
1266 (md_show_usage): Document -msmartmips/-mno-smartmips.
1267 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1268 .set smartmips.
1269 * doc/c-mips.texi: Likewise.
1270
32638454
AM
12712006-05-08 Alan Modra <amodra@bigpond.net.au>
1272
1273 * write.c (relax_segment): Add pass count arg. Don't error on
1274 negative org/space on first two passes.
1275 (relax_seg_info): New struct.
1276 (relax_seg, write_object_file): Adjust.
1277 * write.h (relax_segment): Update prototype.
1278
b7fc2769
JB
12792006-05-05 Julian Brown <julian@codesourcery.com>
1280
1281 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1282 checking.
1283 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1284 architecture version checks.
1285 (insns): Allow overlapping instructions to be used in VFP mode.
1286
7f841127
L
12872006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1288
1289 PR gas/2598
1290 * config/obj-elf.c (obj_elf_change_section): Allow user
1291 specified SHF_ALPHA_GPREL.
1292
73160847
NC
12932006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1294
1295 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1296 for PMEM related expressions.
1297
56487c55
NC
12982006-05-05 Nick Clifton <nickc@redhat.com>
1299
1300 PR gas/2582
1301 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1302 insertion of a directory separator character into a string at a
1303 given offset. Uses heuristics to decide when to use a backslash
1304 character rather than a forward-slash character.
1305 (dwarf2_directive_loc): Use the macro.
1306 (out_debug_info): Likewise.
1307
d43b4baf
TS
13082006-05-05 Thiemo Seufer <ths@mips.com>
1309 David Ung <davidu@mips.com>
1310
1311 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1312 instruction.
1313 (macro): Add new case M_CACHE_AB.
1314
088fa78e
KH
13152006-05-04 Kazu Hirata <kazu@codesourcery.com>
1316
1317 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1318 (opcode_lookup): Issue a warning for opcode with
1319 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1320 identical to OT_cinfix3.
1321 (TxC3w, TC3w, tC3w): New.
1322 (insns): Use tC3w and TC3w for comparison instructions with
1323 's' suffix.
1324
c9049d30
AM
13252006-05-04 Alan Modra <amodra@bigpond.net.au>
1326
1327 * subsegs.h (struct frchain): Delete frch_seg.
1328 (frchain_root): Delete.
1329 (seg_info): Define as macro.
1330 * subsegs.c (frchain_root): Delete.
1331 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1332 (subsegs_begin, subseg_change): Adjust for above.
1333 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1334 rather than to one big list.
1335 (subseg_get): Don't special case abs, und sections.
1336 (subseg_new, subseg_force_new): Don't set frchainP here.
1337 (seg_info): Delete.
1338 (subsegs_print_statistics): Adjust frag chain control list traversal.
1339 * debug.c (dmp_frags): Likewise.
1340 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1341 at frchain_root. Make use of known frchain ordering.
1342 (last_frag_for_seg): Likewise.
1343 (get_frag_fix): Likewise. Add seg param.
1344 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1345 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1346 (SUB_SEGMENT_ALIGN): Likewise.
1347 (subsegs_finish): Adjust frchain list traversal.
1348 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1349 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1350 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1351 (xtensa_fix_b_j_loop_end_frags): Likewise.
1352 (xtensa_fix_close_loop_end_frags): Likewise.
1353 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1354 (retrieve_segment_info): Delete frch_seg initialisation.
1355
f592407e
AM
13562006-05-03 Alan Modra <amodra@bigpond.net.au>
1357
1358 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1359 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1360 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1361 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1362
df7849c5
JM
13632006-05-02 Joseph Myers <joseph@codesourcery.com>
1364
1365 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1366 here.
1367 (md_apply_fix3): Multiply offset by 4 here for
1368 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1369
2d545b82
L
13702006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1371 Jan Beulich <jbeulich@novell.com>
1372
1373 * config/tc-i386.c (output_invalid_buf): Change size for
1374 unsigned char.
1375 * config/tc-tic30.c (output_invalid_buf): Likewise.
1376
1377 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1378 unsigned char.
1379 * config/tc-tic30.c (output_invalid): Likewise.
1380
38fc1cb1
DJ
13812006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1382
1383 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1384 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1385 (asconfig.texi): Don't set top_srcdir.
1386 * doc/as.texinfo: Don't use top_srcdir.
1387 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1388
2d545b82
L
13892006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1390
1391 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1392 * config/tc-tic30.c (output_invalid_buf): Likewise.
1393
1394 * config/tc-i386.c (output_invalid): Use snprintf instead of
1395 sprintf.
1396 * config/tc-ia64.c (declare_register_set): Likewise.
1397 (emit_one_bundle): Likewise.
1398 (check_dependencies): Likewise.
1399 * config/tc-tic30.c (output_invalid): Likewise.
1400
a8bc6c78
PB
14012006-05-02 Paul Brook <paul@codesourcery.com>
1402
1403 * config/tc-arm.c (arm_optimize_expr): New function.
1404 * config/tc-arm.h (md_optimize_expr): Define
1405 (arm_optimize_expr): Add prototype.
1406 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1407
58633d9a
BE
14082006-05-02 Ben Elliston <bje@au.ibm.com>
1409
22772e33
BE
1410 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1411 field unsigned.
1412
58633d9a
BE
1413 * sb.h (sb_list_vector): Move to sb.c.
1414 * sb.c (free_list): Use type of sb_list_vector directly.
1415 (sb_build): Fix off-by-one error in assertion about `size'.
1416
89cdfe57
BE
14172006-05-01 Ben Elliston <bje@au.ibm.com>
1418
1419 * listing.c (listing_listing): Remove useless loop.
1420 * macro.c (macro_expand): Remove is_positional local variable.
1421 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1422 and simplify surrounding expressions, where possible.
1423 (assign_symbol): Likewise.
1424 (s_weakref): Likewise.
1425 * symbols.c (colon): Likewise.
1426
c35da140
AM
14272006-05-01 James Lemke <jwlemke@wasabisystems.com>
1428
1429 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1430
9bcd4f99
TS
14312006-04-30 Thiemo Seufer <ths@mips.com>
1432 David Ung <davidu@mips.com>
1433
1434 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1435 (mips_immed): New table that records various handling of udi
1436 instruction patterns.
1437 (mips_ip): Adds udi handling.
1438
001ae1a4
AM
14392006-04-28 Alan Modra <amodra@bigpond.net.au>
1440
1441 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1442 of list rather than beginning.
1443
136da414
JB
14442006-04-26 Julian Brown <julian@codesourcery.com>
1445
1446 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1447 (is_quarter_float): Rename from above. Simplify slightly.
1448 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1449 number.
1450 (parse_neon_mov): Parse floating-point constants.
1451 (neon_qfloat_bits): Fix encoding.
1452 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1453 preference to integer encoding when using the F32 type.
1454
dcbf9037
JB
14552006-04-26 Julian Brown <julian@codesourcery.com>
1456
1457 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1458 zero-initialising structures containing it will lead to invalid types).
1459 (arm_it): Add vectype to each operand.
1460 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1461 defined field.
1462 (neon_typed_alias): New structure. Extra information for typed
1463 register aliases.
1464 (reg_entry): Add neon type info field.
1465 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1466 Break out alternative syntax for coprocessor registers, etc. into...
1467 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1468 out from arm_reg_parse.
1469 (parse_neon_type): Move. Return SUCCESS/FAIL.
1470 (first_error): New function. Call to ensure first error which occurs is
1471 reported.
1472 (parse_neon_operand_type): Parse exactly one type.
1473 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1474 (parse_typed_reg_or_scalar): New function. Handle core of both
1475 arm_typed_reg_parse and parse_scalar.
1476 (arm_typed_reg_parse): Parse a register with an optional type.
1477 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1478 result.
1479 (parse_scalar): Parse a Neon scalar with optional type.
1480 (parse_reg_list): Use first_error.
1481 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1482 (neon_alias_types_same): New function. Return true if two (alias) types
1483 are the same.
1484 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1485 of elements.
1486 (insert_reg_alias): Return new reg_entry not void.
1487 (insert_neon_reg_alias): New function. Insert type/index information as
1488 well as register for alias.
1489 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1490 make typed register aliases accordingly.
1491 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1492 of line.
1493 (s_unreq): Delete type information if present.
1494 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1495 (s_arm_unwind_save_mmxwcg): Likewise.
1496 (s_arm_unwind_movsp): Likewise.
1497 (s_arm_unwind_setfp): Likewise.
1498 (parse_shift): Likewise.
1499 (parse_shifter_operand): Likewise.
1500 (parse_address): Likewise.
1501 (parse_tb): Likewise.
1502 (tc_arm_regname_to_dw2regnum): Likewise.
1503 (md_pseudo_table): Add dn, qn.
1504 (parse_neon_mov): Handle typed operands.
1505 (parse_operands): Likewise.
1506 (neon_type_mask): Add N_SIZ.
1507 (N_ALLMODS): New macro.
1508 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1509 (el_type_of_type_chk): Add some safeguards.
1510 (modify_types_allowed): Fix logic bug.
1511 (neon_check_type): Handle operands with types.
1512 (neon_three_same): Remove redundant optional arg handling.
1513 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1514 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1515 (do_neon_step): Adjust accordingly.
1516 (neon_cmode_for_logic_imm): Use first_error.
1517 (do_neon_bitfield): Call neon_check_type.
1518 (neon_dyadic): Rename to...
1519 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1520 to allow modification of type of the destination.
1521 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1522 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1523 (do_neon_compare): Make destination be an untyped bitfield.
1524 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1525 (neon_mul_mac): Return early in case of errors.
1526 (neon_move_immediate): Use first_error.
1527 (neon_mac_reg_scalar_long): Fix type to include scalar.
1528 (do_neon_dup): Likewise.
1529 (do_neon_mov): Likewise (in several places).
1530 (do_neon_tbl_tbx): Fix type.
1531 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1532 (do_neon_ld_dup): Exit early in case of errors and/or use
1533 first_error.
1534 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1535 Handle .dn/.qn directives.
1536 (REGDEF): Add zero for reg_entry neon field.
1537
5287ad62
JB
15382006-04-26 Julian Brown <julian@codesourcery.com>
1539
1540 * config/tc-arm.c (limits.h): Include.
1541 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1542 (fpu_vfp_v3_or_neon_ext): Declare constants.
1543 (neon_el_type): New enumeration of types for Neon vector elements.
1544 (neon_type_el): New struct. Define type and size of a vector element.
1545 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1546 instruction.
1547 (neon_type): Define struct. The type of an instruction.
1548 (arm_it): Add 'vectype' for the current instruction.
1549 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1550 (vfp_sp_reg_pos): Rename to...
1551 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1552 tags.
1553 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1554 (Neon D or Q register).
1555 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1556 register.
1557 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1558 (my_get_expression): Allow above constant as argument to accept
1559 64-bit constants with optional prefix.
1560 (arm_reg_parse): Add extra argument to return the specific type of
1561 register in when either a D or Q register (REG_TYPE_NDQ) is
1562 requested. Can be NULL.
1563 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1564 (parse_reg_list): Update for new arm_reg_parse args.
1565 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1566 (parse_neon_el_struct_list): New function. Parse element/structure
1567 register lists for VLD<n>/VST<n> instructions.
1568 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1569 (s_arm_unwind_save_mmxwr): Likewise.
1570 (s_arm_unwind_save_mmxwcg): Likewise.
1571 (s_arm_unwind_movsp): Likewise.
1572 (s_arm_unwind_setfp): Likewise.
1573 (parse_big_immediate): New function. Parse an immediate, which may be
1574 64 bits wide. Put results in inst.operands[i].
1575 (parse_shift): Update for new arm_reg_parse args.
1576 (parse_address): Likewise. Add parsing of alignment specifiers.
1577 (parse_neon_mov): Parse the operands of a VMOV instruction.
1578 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1579 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1580 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1581 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1582 (parse_operands): Handle new codes above.
1583 (encode_arm_vfp_sp_reg): Rename to...
1584 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1585 selected VFP version only supports D0-D15.
1586 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1587 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1588 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1589 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1590 encode_arm_vfp_reg name, and allow 32 D regs.
1591 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1592 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1593 regs.
1594 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1595 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1596 constant-load and conversion insns introduced with VFPv3.
1597 (neon_tab_entry): New struct.
1598 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1599 those which are the targets of pseudo-instructions.
1600 (neon_opc): Enumerate opcodes, use as indices into...
1601 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1602 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1603 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1604 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1605 neon_enc_tab.
1606 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1607 Neon instructions.
1608 (neon_type_mask): New. Compact type representation for type checking.
1609 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1610 permitted type combinations.
1611 (N_IGNORE_TYPE): New macro.
1612 (neon_check_shape): New function. Check an instruction shape for
1613 multiple alternatives. Return the specific shape for the current
1614 instruction.
1615 (neon_modify_type_size): New function. Modify a vector type and size,
1616 depending on the bit mask in argument 1.
1617 (neon_type_promote): New function. Convert a given "key" type (of an
1618 operand) into the correct type for a different operand, based on a bit
1619 mask.
1620 (type_chk_of_el_type): New function. Convert a type and size into the
1621 compact representation used for type checking.
1622 (el_type_of_type_ckh): New function. Reverse of above (only when a
1623 single bit is set in the bit mask).
1624 (modify_types_allowed): New function. Alter a mask of allowed types
1625 based on a bit mask of modifications.
1626 (neon_check_type): New function. Check the type of the current
1627 instruction against the variable argument list. The "key" type of the
1628 instruction is returned.
1629 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1630 a Neon data-processing instruction depending on whether we're in ARM
1631 mode or Thumb-2 mode.
1632 (neon_logbits): New function.
1633 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1634 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1635 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1636 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1637 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1638 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1639 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1640 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1641 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1642 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1643 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1644 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1645 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1646 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1647 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1648 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1649 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1650 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1651 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1652 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1653 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1654 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1655 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1656 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1657 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1658 helpers.
1659 (parse_neon_type): New function. Parse Neon type specifier.
1660 (opcode_lookup): Allow parsing of Neon type specifiers.
1661 (REGNUM2, REGSETH, REGSET2): New macros.
1662 (reg_names): Add new VFPv3 and Neon registers.
1663 (NUF, nUF, NCE, nCE): New macros for opcode table.
1664 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1665 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1666 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1667 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1668 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1669 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1670 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1671 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1672 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1673 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1674 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1675 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1676 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1677 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1678 fto[us][lh][sd].
1679 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1680 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1681 (arm_option_cpu_value): Add vfp3 and neon.
1682 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1683 VFPv1 attribute.
1684
1946c96e
BW
16852006-04-25 Bob Wilson <bob.wilson@acm.org>
1686
1687 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1688 syntax instead of hardcoded opcodes with ".w18" suffixes.
1689 (wide_branch_opcode): New.
1690 (build_transition): Use it to check for wide branch opcodes with
1691 either ".w18" or ".w15" suffixes.
1692
5033a645
BW
16932006-04-25 Bob Wilson <bob.wilson@acm.org>
1694
1695 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1696 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1697 frag's is_literal flag.
1698
395fa56f
BW
16992006-04-25 Bob Wilson <bob.wilson@acm.org>
1700
1701 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1702
708587a4
KH
17032006-04-23 Kazu Hirata <kazu@codesourcery.com>
1704
1705 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1706 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1707 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1708 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1709 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1710
8463be01
PB
17112005-04-20 Paul Brook <paul@codesourcery.com>
1712
1713 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1714 all targets.
1715 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1716
f26a5955
AM
17172006-04-19 Alan Modra <amodra@bigpond.net.au>
1718
1719 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1720 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1721 Make some cpus unsupported on ELF. Run "make dep-am".
1722 * Makefile.in: Regenerate.
1723
241a6c40
AM
17242006-04-19 Alan Modra <amodra@bigpond.net.au>
1725
1726 * configure.in (--enable-targets): Indent help message.
1727 * configure: Regenerate.
1728
bb8f5920
L
17292006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1730
1731 PR gas/2533
1732 * config/tc-i386.c (i386_immediate): Check illegal immediate
1733 register operand.
1734
23d9d9de
AM
17352006-04-18 Alan Modra <amodra@bigpond.net.au>
1736
64e74474
AM
1737 * config/tc-i386.c: Formatting.
1738 (output_disp, output_imm): ISO C90 params.
1739
6cbe03fb
AM
1740 * frags.c (frag_offset_fixed_p): Constify args.
1741 * frags.h (frag_offset_fixed_p): Ditto.
1742
23d9d9de
AM
1743 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1744 (COFF_MAGIC): Delete.
a37d486e
AM
1745
1746 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1747
e7403566
DJ
17482006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1749
1750 * po/POTFILES.in: Regenerated.
1751
58ab4f3d
MM
17522006-04-16 Mark Mitchell <mark@codesourcery.com>
1753
1754 * doc/as.texinfo: Mention that some .type syntaxes are not
1755 supported on all architectures.
1756
482fd9f9
BW
17572006-04-14 Sterling Augustine <sterling@tensilica.com>
1758
1759 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1760 instructions when such transformations have been disabled.
1761
05d58145
BW
17622006-04-10 Sterling Augustine <sterling@tensilica.com>
1763
1764 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1765 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1766 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1767 decoding the loop instructions. Remove current_offset variable.
1768 (xtensa_fix_short_loop_frags): Likewise.
1769 (min_bytes_to_other_loop_end): Remove current_offset argument.
1770
9e75b3fa
AM
17712006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1772
a37d486e 1773 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1774 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1775
d727e8c2
NC
17762006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1777
1778 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1779 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1780 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1781 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1782 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1783 at90can64, at90usb646, at90usb647, at90usb1286 and
1784 at90usb1287.
1785 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1786
d252fdde
PB
17872006-04-07 Paul Brook <paul@codesourcery.com>
1788
1789 * config/tc-arm.c (parse_operands): Set default error message.
1790
ab1eb5fe
PB
17912006-04-07 Paul Brook <paul@codesourcery.com>
1792
1793 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1794
7ae2971b
PB
17952006-04-07 Paul Brook <paul@codesourcery.com>
1796
1797 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1798
53365c0d
PB
17992006-04-07 Paul Brook <paul@codesourcery.com>
1800
1801 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1802 (move_or_literal_pool): Handle Thumb-2 instructions.
1803 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1804
45aa61fe
AM
18052006-04-07 Alan Modra <amodra@bigpond.net.au>
1806
1807 PR 2512.
1808 * config/tc-i386.c (match_template): Move 64-bit operand tests
1809 inside loop.
1810
108a6f8e
CD
18112006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1812
1813 * po/Make-in: Add install-html target.
1814 * Makefile.am: Add install-html and install-html-recursive targets.
1815 * Makefile.in: Regenerate.
1816 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1817 * configure: Regenerate.
1818 * doc/Makefile.am: Add install-html and install-html-am targets.
1819 * doc/Makefile.in: Regenerate.
1820
ec651a3b
AM
18212006-04-06 Alan Modra <amodra@bigpond.net.au>
1822
1823 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1824 second scan.
1825
910600e9
RS
18262006-04-05 Richard Sandiford <richard@codesourcery.com>
1827 Daniel Jacobowitz <dan@codesourcery.com>
1828
1829 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1830 (GOTT_BASE, GOTT_INDEX): New.
1831 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1832 GOTT_INDEX when generating VxWorks PIC.
1833 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1834 use the generic *-*-vxworks* stanza instead.
1835
99630778
AM
18362006-04-04 Alan Modra <amodra@bigpond.net.au>
1837
1838 PR 997
1839 * frags.c (frag_offset_fixed_p): New function.
1840 * frags.h (frag_offset_fixed_p): Declare.
1841 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1842 (resolve_expression): Likewise.
1843
a02728c8
BW
18442006-04-03 Sterling Augustine <sterling@tensilica.com>
1845
1846 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1847 of the same length but different numbers of slots.
1848
9dfde49d
AS
18492006-03-30 Andreas Schwab <schwab@suse.de>
1850
1851 * configure.in: Fix help string for --enable-targets option.
1852 * configure: Regenerate.
1853
2da12c60
NS
18542006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1855
6d89cc8f
NS
1856 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1857 (m68k_ip): ... here. Use for all chips. Protect against buffer
1858 overrun and avoid excessive copying.
1859
2da12c60
NS
1860 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1861 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1862 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1863 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1864 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1865 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1866 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1867 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1868 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1869 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1870 (struct m68k_cpu): Change chip field to control_regs.
1871 (current_chip): Remove.
1872 (control_regs): New.
1873 (m68k_archs, m68k_extensions): Adjust.
1874 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1875 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1876 (find_cf_chip): Reimplement for new organization of cpu table.
1877 (select_control_regs): Remove.
1878 (mri_chip): Adjust.
1879 (struct save_opts): Save control regs, not chip.
1880 (s_save, s_restore): Adjust.
1881 (m68k_lookup_cpu): Give deprecated warning when necessary.
1882 (m68k_init_arch): Adjust.
1883 (md_show_usage): Adjust for new cpu table organization.
1884
1ac4baed
BS
18852006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1886
1887 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1888 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1889 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1890 "elf/bfin.h".
1891 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1892 (any_gotrel): New rule.
1893 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1894 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1895 "elf/bfin.h".
1896 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1897 (bfin_pic_ptr): New function.
1898 (md_pseudo_table): Add it for ".picptr".
1899 (OPTION_FDPIC): New macro.
1900 (md_longopts): Add -mfdpic.
1901 (md_parse_option): Handle it.
1902 (md_begin): Set BFD flags.
1903 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1904 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1905 us for GOT relocs.
1906 * Makefile.am (bfin-parse.o): Update dependencies.
1907 (DEPTC_bfin_elf): Likewise.
1908 * Makefile.in: Regenerate.
1909
a9d34880
RS
19102006-03-25 Richard Sandiford <richard@codesourcery.com>
1911
1912 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1913 mcfemac instead of mcfmac.
1914
9ca26584
AJ
19152006-03-23 Michael Matz <matz@suse.de>
1916
1917 * config/tc-i386.c (type_names): Correct placement of 'static'.
1918 (reloc): Map some more relocs to their 64 bit counterpart when
1919 size is 8.
1920 (output_insn): Work around breakage if DEBUG386 is defined.
1921 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1922 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1923 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1924 different from i386.
1925 (output_imm): Ditto.
1926 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1927 Imm64.
1928 (md_convert_frag): Jumps can now be larger than 2GB away, error
1929 out in that case.
1930 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1931 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1932
0a44bf69
RS
19332006-03-22 Richard Sandiford <richard@codesourcery.com>
1934 Daniel Jacobowitz <dan@codesourcery.com>
1935 Phil Edwards <phil@codesourcery.com>
1936 Zack Weinberg <zack@codesourcery.com>
1937 Mark Mitchell <mark@codesourcery.com>
1938 Nathan Sidwell <nathan@codesourcery.com>
1939
1940 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1941 (md_begin): Complain about -G being used for PIC. Don't change
1942 the text, data and bss alignments on VxWorks.
1943 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1944 generating VxWorks PIC.
1945 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1946 (macro): Likewise, but do not treat la $25 specially for
1947 VxWorks PIC, and do not handle jal.
1948 (OPTION_MVXWORKS_PIC): New macro.
1949 (md_longopts): Add -mvxworks-pic.
1950 (md_parse_option): Don't complain about using PIC and -G together here.
1951 Handle OPTION_MVXWORKS_PIC.
1952 (md_estimate_size_before_relax): Always use the first relaxation
1953 sequence on VxWorks.
1954 * config/tc-mips.h (VXWORKS_PIC): New.
1955
080eb7fe
PB
19562006-03-21 Paul Brook <paul@codesourcery.com>
1957
1958 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1959
03aaa593
BW
19602006-03-21 Sterling Augustine <sterling@tensilica.com>
1961
1962 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1963 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1964 (get_loop_align_size): New.
1965 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1966 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1967 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1968 (get_noop_aligned_address): Use get_loop_align_size.
1969 (get_aligned_diff): Likewise.
1970
3e94bf1a
PB
19712006-03-21 Paul Brook <paul@codesourcery.com>
1972
1973 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1974
dfa9f0d5
PB
19752006-03-20 Paul Brook <paul@codesourcery.com>
1976
1977 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1978 (do_t_branch): Encode branches inside IT blocks as unconditional.
1979 (do_t_cps): New function.
1980 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1981 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1982 (opcode_lookup): Allow conditional suffixes on all instructions in
1983 Thumb mode.
1984 (md_assemble): Advance condexec state before checking for errors.
1985 (insns): Use do_t_cps.
1986
6e1cb1a6
PB
19872006-03-20 Paul Brook <paul@codesourcery.com>
1988
1989 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1990 outputting the insn.
1991
0a966e2d
JBG
19922006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1993
1994 * config/tc-vax.c: Update copyright year.
1995 * config/tc-vax.h: Likewise.
1996
a49fcc17
JBG
19972006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1998
1999 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2000 make it static.
2001 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2002
f5208ef2
PB
20032006-03-17 Paul Brook <paul@codesourcery.com>
2004
2005 * config/tc-arm.c (insns): Add ldm and stm.
2006
cb4c78d6
BE
20072006-03-17 Ben Elliston <bje@au.ibm.com>
2008
2009 PR gas/2446
2010 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2011
c16d2bf0
PB
20122006-03-16 Paul Brook <paul@codesourcery.com>
2013
2014 * config/tc-arm.c (insns): Add "svc".
2015
80ca4e2c
BW
20162006-03-13 Bob Wilson <bob.wilson@acm.org>
2017
2018 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2019 flag and avoid double underscore prefixes.
2020
3a4a14e9
PB
20212006-03-10 Paul Brook <paul@codesourcery.com>
2022
2023 * config/tc-arm.c (md_begin): Handle EABIv5.
2024 (arm_eabis): Add EF_ARM_EABI_VER5.
2025 * doc/c-arm.texi: Document -meabi=5.
2026
518051dc
BE
20272006-03-10 Ben Elliston <bje@au.ibm.com>
2028
2029 * app.c (do_scrub_chars): Simplify string handling.
2030
00a97672
RS
20312006-03-07 Richard Sandiford <richard@codesourcery.com>
2032 Daniel Jacobowitz <dan@codesourcery.com>
2033 Zack Weinberg <zack@codesourcery.com>
2034 Nathan Sidwell <nathan@codesourcery.com>
2035 Paul Brook <paul@codesourcery.com>
2036 Ricardo Anguiano <anguiano@codesourcery.com>
2037 Phil Edwards <phil@codesourcery.com>
2038
2039 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2040 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2041 R_ARM_ABS12 reloc.
2042 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2043 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2044 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2045
b29757dc
BW
20462006-03-06 Bob Wilson <bob.wilson@acm.org>
2047
2048 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2049 even when using the text-section-literals option.
2050
0b2e31dc
NS
20512006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2052
2053 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2054 and cf.
2055 (m68k_ip): <case 'J'> Check we have some control regs.
2056 (md_parse_option): Allow raw arch switch.
2057 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2058 whether 68881 or cfloat was meant by -mfloat.
2059 (md_show_usage): Adjust extension display.
2060 (m68k_elf_final_processing): Adjust.
2061
df406460
NC
20622006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2063
2064 * config/tc-avr.c (avr_mod_hash_value): New function.
2065 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2066 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2067 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2068 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2069 of (int).
2070 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2071 fixups, abort otherwise.
df406460
NC
2072 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2073 tc_fix_adjustable): Define.
a70ae331 2074
53022e4a
JW
20752006-03-02 James E Wilson <wilson@specifix.com>
2076
2077 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2078 change the template, then clear md.slot[curr].end_of_insn_group.
2079
9f6f925e
JB
20802006-02-28 Jan Beulich <jbeulich@novell.com>
2081
2082 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2083
0e31b3e1
JB
20842006-02-28 Jan Beulich <jbeulich@novell.com>
2085
2086 PR/1070
2087 * macro.c (getstring): Don't treat parentheses special anymore.
2088 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2089 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2090 characters.
2091
10cd14b4
AM
20922006-02-28 Mat <mat@csail.mit.edu>
2093
2094 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2095
63752a75
JJ
20962006-02-27 Jakub Jelinek <jakub@redhat.com>
2097
2098 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2099 field.
2100 (CFI_signal_frame): Define.
2101 (cfi_pseudo_table): Add .cfi_signal_frame.
2102 (dot_cfi): Handle CFI_signal_frame.
2103 (output_cie): Handle cie->signal_frame.
2104 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2105 different. Copy signal_frame from FDE to newly created CIE.
2106 * doc/as.texinfo: Document .cfi_signal_frame.
2107
f7d9e5c3
CD
21082006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2109
2110 * doc/Makefile.am: Add html target.
2111 * doc/Makefile.in: Regenerate.
2112 * po/Make-in: Add html target.
2113
331d2d0d
L
21142006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2115
8502d882 2116 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2117 Instructions.
2118
8502d882 2119 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2120 (CpuUnknownFlags): Add CpuMNI.
2121
10156f83
DM
21222006-02-24 David S. Miller <davem@sunset.davemloft.net>
2123
2124 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2125 (hpriv_reg_table): New table for hyperprivileged registers.
2126 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2127 register encoding.
2128
6772dd07
DD
21292006-02-24 DJ Delorie <dj@redhat.com>
2130
2131 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2132 (tc_gen_reloc): Don't define.
2133 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2134 (OPTION_LINKRELAX): New.
2135 (md_longopts): Add it.
2136 (m32c_relax): New.
2137 (md_parse_options): Set it.
2138 (md_assemble): Emit relaxation relocs as needed.
2139 (md_convert_frag): Emit relaxation relocs as needed.
2140 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2141 (m32c_apply_fix): New.
2142 (tc_gen_reloc): New.
2143 (m32c_force_relocation): Force out jump relocs when relaxing.
2144 (m32c_fix_adjustable): Return false if relaxing.
2145
62b3e311
PB
21462006-02-24 Paul Brook <paul@codesourcery.com>
2147
2148 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2149 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2150 (struct asm_barrier_opt): Define.
2151 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2152 (parse_psr): Accept V7M psr names.
2153 (parse_barrier): New function.
2154 (enum operand_parse_code): Add OP_oBARRIER.
2155 (parse_operands): Implement OP_oBARRIER.
2156 (do_barrier): New function.
2157 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2158 (do_t_cpsi): Add V7M restrictions.
2159 (do_t_mrs, do_t_msr): Validate V7M variants.
2160 (md_assemble): Check for NULL variants.
2161 (v7m_psrs, barrier_opt_names): New tables.
2162 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2163 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2164 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2165 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2166 (struct cpu_arch_ver_table): Define.
2167 (cpu_arch_ver): New.
2168 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2169 Tag_CPU_arch_profile.
2170 * doc/c-arm.texi: Document new cpu and arch options.
2171
59cf82fe
L
21722006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2173
2174 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2175
19a7219f
L
21762006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2177
2178 * config/tc-ia64.c: Update copyright years.
2179
7f3dfb9c
L
21802006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2181
2182 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2183 SDM 2.2.
2184
f40d1643
PB
21852005-02-22 Paul Brook <paul@codesourcery.com>
2186
2187 * config/tc-arm.c (do_pld): Remove incorrect write to
2188 inst.instruction.
2189 (encode_thumb32_addr_mode): Use correct operand.
2190
216d22bc
PB
21912006-02-21 Paul Brook <paul@codesourcery.com>
2192
2193 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2194
d70c5fc7
NC
21952006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2196 Anil Paranjape <anilp1@kpitcummins.com>
2197 Shilin Shakti <shilins@kpitcummins.com>
2198
2199 * Makefile.am: Add xc16x related entry.
2200 * Makefile.in: Regenerate.
2201 * configure.in: Added xc16x related entry.
2202 * configure: Regenerate.
2203 * config/tc-xc16x.h: New file
2204 * config/tc-xc16x.c: New file
2205 * doc/c-xc16x.texi: New file for xc16x
2206 * doc/all.texi: Entry for xc16x
a70ae331 2207 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2208 * NEWS: Announce the support for the new target.
2209
aaa2ab3d
NH
22102006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2211
2212 * configure.tgt: set emulation for mips-*-netbsd*
2213
82de001f
JJ
22142006-02-14 Jakub Jelinek <jakub@redhat.com>
2215
2216 * config.in: Rebuilt.
2217
431ad2d0
BW
22182006-02-13 Bob Wilson <bob.wilson@acm.org>
2219
2220 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2221 from 1, not 0, in error messages.
2222 (md_assemble): Simplify special-case check for ENTRY instructions.
2223 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2224 operand in error message.
2225
94089a50
JM
22262006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2227
2228 * configure.tgt (arm-*-linux-gnueabi*): Change to
2229 arm-*-linux-*eabi*.
2230
52de4c06
NC
22312006-02-10 Nick Clifton <nickc@redhat.com>
2232
70e45ad9
NC
2233 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2234 32-bit value is propagated into the upper bits of a 64-bit long.
2235
52de4c06
NC
2236 * config/tc-arc.c (init_opcode_tables): Fix cast.
2237 (arc_extoper, md_operand): Likewise.
2238
21af2bbd
BW
22392006-02-09 David Heine <dlheine@tensilica.com>
2240
2241 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2242 each relaxation step.
2243
75a706fc 22442006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2245
75a706fc
L
2246 * configure.in (CHECK_DECLS): Add vsnprintf.
2247 * configure: Regenerate.
2248 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2249 include/declare here, but...
2250 * as.h: Move code detecting VARARGS idiom to the top.
2251 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2252 (vsnprintf): Declare if not already declared.
2253
0d474464
L
22542006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2255
2256 * as.c (close_output_file): New.
2257 (main): Register close_output_file with xatexit before
2258 dump_statistics. Don't call output_file_close.
2259
266abb8f
NS
22602006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2261
2262 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2263 mcf5329_control_regs): New.
2264 (not_current_architecture, selected_arch, selected_cpu): New.
2265 (m68k_archs, m68k_extensions): New.
2266 (archs): Renamed to ...
2267 (m68k_cpus): ... here. Adjust.
2268 (n_arches): Remove.
2269 (md_pseudo_table): Add arch and cpu directives.
2270 (find_cf_chip, m68k_ip): Adjust table scanning.
2271 (no_68851, no_68881): Remove.
2272 (md_assemble): Lazily initialize.
2273 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2274 (md_init_after_args): Move functionality to m68k_init_arch.
2275 (mri_chip): Adjust table scanning.
2276 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2277 options with saner parsing.
2278 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2279 m68k_init_arch): New.
2280 (s_m68k_cpu, s_m68k_arch): New.
2281 (md_show_usage): Adjust.
2282 (m68k_elf_final_processing): Set CF EF flags.
2283 * config/tc-m68k.h (m68k_init_after_args): Remove.
2284 (tc_init_after_args): Remove.
2285 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2286 (M68k-Directives): Document .arch and .cpu directives.
2287
134dcee5
AM
22882006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2289
a70ae331
AM
2290 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2291 synonyms for equ and defl.
134dcee5
AM
2292 (z80_cons_fix_new): New function.
2293 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2294 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2295 now handled as pseudo-op rather than an instruction.
2296 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2297 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2298 Add entries for def24,def32,d24,d32.
2299 (md_assemble): Improved error handling.
2300 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2301 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2302 (z80_cons_fix_new): Declare.
a70ae331 2303 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2304 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2305
a9931606
PB
23062006-02-02 Paul Brook <paul@codesourcery.com>
2307
2308 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2309
ef8d22e6
PB
23102005-02-02 Paul Brook <paul@codesourcery.com>
2311
2312 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2313 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2314 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2315 T2_OPCODE_RSB): Define.
2316 (thumb32_negate_data_op): New function.
2317 (md_apply_fix): Use it.
2318
e7da6241
BW
23192006-01-31 Bob Wilson <bob.wilson@acm.org>
2320
2321 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2322 fields.
2323 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2324 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2325 subtracted symbols.
2326 (relaxation_requirements): Add pfinish_frag argument and use it to
2327 replace setting tinsn->record_fix fields.
2328 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2329 and vinsn_to_insnbuf. Remove references to record_fix and
2330 slot_sub_symbols fields.
2331 (xtensa_mark_narrow_branches): Delete unused code.
2332 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2333 a symbol.
2334 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2335 record_fix fields.
2336 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2337 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2338 of the record_fix field. Simplify error messages for unexpected
2339 symbolic operands.
2340 (set_expr_symbol_offset_diff): Delete.
2341
79134647
PB
23422006-01-31 Paul Brook <paul@codesourcery.com>
2343
2344 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2345
e74cfd16
PB
23462006-01-31 Paul Brook <paul@codesourcery.com>
2347 Richard Earnshaw <rearnsha@arm.com>
2348
2349 * config/tc-arm.c: Use arm_feature_set.
2350 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2351 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2352 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2353 New variables.
2354 (insns): Use them.
2355 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2356 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2357 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2358 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2359 feature flags.
2360 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2361 (arm_opts): Move old cpu/arch options from here...
2362 (arm_legacy_opts): ... to here.
2363 (md_parse_option): Search arm_legacy_opts.
2364 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2365 (arm_float_abis, arm_eabis): Make const.
2366
d47d412e
BW
23672006-01-25 Bob Wilson <bob.wilson@acm.org>
2368
2369 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2370
b14273fe
JZ
23712006-01-21 Jie Zhang <jie.zhang@analog.com>
2372
2373 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2374 in load immediate intruction.
2375
39cd1c76
JZ
23762006-01-21 Jie Zhang <jie.zhang@analog.com>
2377
2378 * config/bfin-parse.y (value_match): Use correct conversion
2379 specifications in template string for __FILE__ and __LINE__.
2380 (binary): Ditto.
2381 (unary): Ditto.
2382
67a4f2b7
AO
23832006-01-18 Alexandre Oliva <aoliva@redhat.com>
2384
2385 Introduce TLS descriptors for i386 and x86_64.
2386 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2387 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2388 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2389 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2390 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2391 displacement bits.
2392 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2393 (lex_got): Handle @tlsdesc and @tlscall.
2394 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2395
8ad7c533
NC
23962006-01-11 Nick Clifton <nickc@redhat.com>
2397
2398 Fixes for building on 64-bit hosts:
2399 * config/tc-avr.c (mod_index): New union to allow conversion
2400 between pointers and integers.
2401 (md_begin, avr_ldi_expression): Use it.
2402 * config/tc-i370.c (md_assemble): Add cast for argument to print
2403 statement.
2404 * config/tc-tic54x.c (subsym_substitute): Likewise.
2405 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2406 opindex field of fr_cgen structure into a pointer so that it can
2407 be stored in a frag.
2408 * config/tc-mn10300.c (md_assemble): Likewise.
2409 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2410 types.
2411 * config/tc-v850.c: Replace uses of (int) casts with correct
2412 types.
2413
4dcb3903
L
24142006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2415
2416 PR gas/2117
2417 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2418
e0f6ea40
HPN
24192006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2420
2421 PR gas/2101
2422 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2423 a local-label reference.
2424
e88d958a 2425For older changes see ChangeLog-2005
08d56133
NC
2426\f
2427Local Variables:
2428mode: change-log
2429left-margin: 8
2430fill-column: 74
2431version-control: never
2432End:
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