*** empty log message ***
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b3549761
NC
12006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
2
3 * config/tc-score.c (build_relax_frag): Compute correct
4 tc_frag_data.fixp.
5
71a75f6f
MF
62006-10-18 Roy Marples <uberlord@gentoo.org>
7
8 * config/tc-sparc.c (md_parse_option): Treat any target starting with
9 elf32-sparc as a viable target for the -32 switch and any target starting with
10 elf64-sparc as a viable target for the -64 switch.
11 (sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
12 while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
13 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
14
e1b5fdd4
L
152006-10-17 H.J. Lu <hongjiu.lu@intel.com>
16
17 * configure: Regenerated.
18
f8ef9cd7
BS
192006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
20
21 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
22 in addition to testing for '\n'.
23 (TC_EOL_IN_INSN): Provide a default definition if necessary.
24
eb1fe072
NC
252006-10-13 Sterling Augstine <sterling@tensilica.com>
26
27 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
28 a disjoint DW_AT range.
29
ec6e49f4
NC
302006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
31
32 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
33
036dc3f7
PB
342006-10-08 Paul Brook <paul@codesourcery.com>
35
36 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
37 (parse_operands): Use parse_big_immediate for OP_NILO.
38 (neon_cmode_for_logic_imm): Try smaller element sizes.
39 (neon_cmode_for_move_imm): Ditto.
40 (do_neon_logic): Handle .i64 pseudo-op.
41
3bb0c887
AM
422006-09-29 Alan Modra <amodra@bigpond.net.au>
43
44 * po/POTFILES.in: Regenerate.
45
ef05d495
L
462006-09-28 H.J. Lu <hongjiu.lu@intel.com>
47
48 * config/tc-i386.h (CpuMNI): Renamed to ...
49 (CpuSSSE3): This.
50 (CpuUnknownFlags): Updated.
51 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
52 and PROCESSOR_MEROM with PROCESSOR_CORE2.
53 * config/tc-i386.c: Updated.
54 * doc/c-i386.texi: Likewise.
55
56 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
57
d8ad03e9
NC
582006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
59
60 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
61
df3ca5a3
NC
622006-09-27 Nick Clifton <nickc@redhat.com>
63
64 * output-file.c (output_file_close): Prevent an infinite loop
65 reporting that stdoutput could not be closed.
66
2d447fca
JM
672006-09-26 Mark Shinwell <shinwell@codesourcery.com>
68 Joseph Myers <joseph@codesourcery.com>
69 Ian Lance Taylor <ian@wasabisystems.com>
70 Ben Elliston <bje@wasabisystems.com>
71
72 * config/tc-arm.c (arm_cext_iwmmxt2): New.
73 (enum operand_parse_code): New code OP_RIWR_I32z.
74 (parse_operands): Handle OP_RIWR_I32z.
75 (do_iwmmxt_wmerge): New function.
76 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
77 a register.
78 (do_iwmmxt_wrwrwr_or_imm5): New function.
79 (insns): Mark instructions as RIWR_I32z as appropriate.
80 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
81 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
82 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
83 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
84 (md_begin): Handle IWMMXT2.
85 (arm_cpus): Add iwmmxt2.
86 (arm_extensions): Likewise.
87 (arm_archs): Likewise.
88
ba83aca1
BW
892006-09-25 Bob Wilson <bob.wilson@acm.org>
90
91 * doc/as.texinfo (Overview): Revise description of --keep-locals.
92 Add xref to "Symbol Names".
93 (L): Refer to "local symbols" instead of "local labels". Move
94 definition to "Symbol Names" section; add xref to that section.
95 (Symbol Names): Use "Local Symbol Names" section to define local
96 symbols. Add "Local Labels" heading for description of temporary
97 forward/backward labels, and refer to those as "local labels".
98
539e75ad
L
992006-09-23 H.J. Lu <hongjiu.lu@intel.com>
100
101 PR binutils/3235
102 * config/tc-i386.c (match_template): Check address size prefix
103 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
104 operand.
105
5e02f92e
AM
1062006-09-22 Alan Modra <amodra@bigpond.net.au>
107
108 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
109
885afe7b
AM
1102006-09-22 Alan Modra <amodra@bigpond.net.au>
111
112 * as.h (as_perror): Delete declaration.
113 * gdbinit.in (as_perror): Delete breakpoint.
114 * messages.c (as_perror): Delete function.
115 * doc/internals.texi: Remove as_perror description.
116 * listing.c (listing_print: Don't use as_perror.
117 * output-file.c (output_file_create, output_file_close): Likewise.
118 * symbols.c (symbol_create, symbol_clone): Likewise.
119 * write.c (write_contents): Likewise.
120 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
121 * config/tc-tic54x.c (tic54x_mlib): Likewise.
122
3aeeedbb
AM
1232006-09-22 Alan Modra <amodra@bigpond.net.au>
124
125 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
126 (ppc_handle_align): New function.
127 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
128 (SUB_SEGMENT_ALIGN): Define as zero.
129
96e9638b
BW
1302006-09-20 Bob Wilson <bob.wilson@acm.org>
131
132 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
133 (Overview): Skip cross reference in man page.
134
99ad8390
NC
1352006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
136
137 * configure.in: Add new target x86_64-pc-mingw64.
138 * configure: Regenerate.
139 * configure.tgt: Add new target x86_64-pc-mingw64.
140 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
141 * config/tc-i386.c: Add new targets.
142 (md_parse_option): Add targets to OPTION_64.
143 (x86_64_target_format): Add new method for setup proper default target cpu mode.
144 * config/te-pep.h: Add new target definition header.
145 (TE_PEP): New macro: Identifies new target architecture.
146 (COFF_WITH_pex64): Set proper includes in bfd.
147 * NEWS: Mention new target.
148
73332571
BS
1492006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
150
151 * config/bfin-parse.y (binary): Change sub of const to add of negated
152 const.
153
1c0d3aa6
NC
1542006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
155
156 * config/tc-score.c: New file.
157 * config/tc-score.h: Newf file.
158 * configure.tgt: Add Score target.
159 * Makefile.am: Add Score files.
160 * Makefile.in: Regenerate.
161 * NEWS: Mention new target support.
162
4fa3602b
PB
1632006-09-16 Paul Brook <paul@codesourcery.com>
164
165 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
166 * doc/c-arm.texi (movsp): Document offset argument.
167
16dd5e42
PB
1682006-09-16 Paul Brook <paul@codesourcery.com>
169
170 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
171 unsigned int to avoid 64-bit host problems.
172
c4ae04ce
BS
1732006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
174
175 * config/bfin-parse.y (binary): Do some more constant folding for
176 additions.
177
e5d4a5a6
JB
1782006-09-13 Jan Beulich <jbeulich@novell.com>
179
180 * input-file.c (input_file_give_next_buffer): Demote as_bad to
181 as_warn.
182
1a1219cb
AM
1832006-09-13 Alan Modra <amodra@bigpond.net.au>
184
185 PR gas/3165
186 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
187 in parens.
188
f79d9c1d
AM
1892006-09-13 Alan Modra <amodra@bigpond.net.au>
190
191 * input-file.c (input_file_open): Replace as_perror with as_bad
192 so that gas exits with error on file errors. Correct error
193 message.
194 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 195 * input-file.h: Update comment.
f79d9c1d 196
f512f76f
NC
1972006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
198
199 PR gas/3172
200 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
201 registers as a sub-class of wC registers.
202
8d79fd44
AM
2032006-09-11 Alan Modra <amodra@bigpond.net.au>
204
205 PR gas/3165
206 * config/tc-mips.h (enum dwarf2_format): Forward declare.
207 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
208 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
209 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
210
6258339f
NC
2112006-09-08 Nick Clifton <nickc@redhat.com>
212
213 PR gas/3129
214 * doc/as.texinfo (Macro): Improve documentation about separating
215 macro arguments from following text.
216
f91e006c
PB
2172006-09-08 Paul Brook <paul@codesourcery.com>
218
219 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
220
466bbf93
PB
2212006-09-07 Paul Brook <paul@codesourcery.com>
222
223 * config/tc-arm.c (parse_operands): Mark operand as present.
224
428e3f1f
PB
2252006-09-04 Paul Brook <paul@codesourcery.com>
226
227 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
228 (do_neon_dyadic_if_i_d): Avoid setting U bit.
229 (do_neon_mac_maybe_scalar): Ditto.
230 (do_neon_dyadic_narrow): Force operand type to NT_integer.
231 (insns): Remove out of date comments.
232
fb25138b
NC
2332006-08-29 Nick Clifton <nickc@redhat.com>
234
235 * read.c (s_align): Initialize the 'stopc' variable to prevent
236 compiler complaints about it being used without being
237 initialized.
238 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
239 s_float_space, s_struct, cons_worker, equals): Likewise.
240
5091343a
AM
2412006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
242
243 * ecoff.c (ecoff_directive_val): Fix message typo.
244 * config/tc-ns32k.c (convert_iif): Likewise.
245 * config/tc-sh64.c (shmedia_check_limits): Likewise.
246
1f2a7e38
BW
2472006-08-25 Sterling Augustine <sterling@tensilica.com>
248 Bob Wilson <bob.wilson@acm.org>
249
250 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
251 the state of the absolute_literals directive. Remove align frag at
252 the start of the literal pool position.
253
34135039
BW
2542006-08-25 Bob Wilson <bob.wilson@acm.org>
255
256 * doc/c-xtensa.texi: Add @group commands in examples.
257
74869ac7
BW
2582006-08-24 Bob Wilson <bob.wilson@acm.org>
259
260 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
261 (INIT_LITERAL_SECTION_NAME): Delete.
262 (lit_state struct): Remove segment names, init_lit_seg, and
263 fini_lit_seg. Add lit_prefix and current_text_seg.
264 (init_literal_head_h, init_literal_head): Delete.
265 (fini_literal_head_h, fini_literal_head): Delete.
266 (xtensa_begin_directive): Move argument parsing to
267 xtensa_literal_prefix function.
268 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
269 (xtensa_literal_prefix): Parse the directive argument here and
270 record it in the lit_prefix field. Remove code to derive literal
271 section names.
272 (linkonce_len): New.
273 (get_is_linkonce_section): Use linkonce_len. Check for any
274 ".gnu.linkonce.*" section, not just text sections.
275 (md_begin): Remove initialization of deleted lit_state fields.
276 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
277 to init_literal_head and fini_literal_head.
278 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
279 when traversing literal_head list.
280 (match_section_group): New.
281 (cache_literal_section): Rewrite to determine the literal section
282 name on the fly, create the section and return it.
283 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
284 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
285 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
286 Use xtensa_get_property_section from bfd.
287 (retrieve_xtensa_section): Delete.
288 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
289 description to refer to plural literal sections and add xref to
290 the Literal Directive section.
291 (Literal Directive): Describe new rules for deriving literal section
292 names. Add footnote for special case of .init/.fini with
293 --text-section-literals.
294 (Literal Prefix Directive): Replace old naming rules with xref to the
295 Literal Directive section.
296
87a1fd79
JM
2972006-08-21 Joseph Myers <joseph@codesourcery.com>
298
299 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
300 merging with previous long opcode.
301
7148cc28
NC
3022006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
303
304 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
305 * Makefile.in: Regenerate.
306 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
307 renamed. Adjust.
308
3e9e4fcf
JB
3092006-08-16 Julian Brown <julian@codesourcery.com>
310
311 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
312 to use ARM instructions on non-ARM-supporting cores.
313 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
314 mode automatically based on cpu variant.
315 (md_begin): Call above function.
316
267d2029
JB
3172006-08-16 Julian Brown <julian@codesourcery.com>
318
319 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
320 recognized in non-unified syntax mode.
321
4be041b2
TS
3222006-08-15 Thiemo Seufer <ths@mips.com>
323 Nigel Stephens <nigel@mips.com>
324 David Ung <davidu@mips.com>
325
326 * configure.tgt: Handle mips*-sde-elf*.
327
3a93f742
TS
3282006-08-12 Thiemo Seufer <ths@networkno.de>
329
330 * config/tc-mips.c (mips16_ip): Fix argument register handling
331 for restore instruction.
332
1737851b
BW
3332006-08-08 Bob Wilson <bob.wilson@acm.org>
334
335 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
336 (out_sleb128): New.
337 (out_fixed_inc_line_addr): New.
338 (process_entries): Use out_fixed_inc_line_addr when
339 DWARF2_USE_FIXED_ADVANCE_PC is set.
340 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
341
e14e52f8
DD
3422006-08-08 DJ Delorie <dj@redhat.com>
343
344 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
345 vs full symbols so that we never have more than one pointer value
346 for any given symbol in our symbol table.
347
802f5d9e
NC
3482006-08-08 Sterling Augustine <sterling@tensilica.com>
349
350 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
351 and emit DW_AT_ranges when code in compilation unit is not
352 contiguous.
353 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
354 is not contiguous.
355 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
356 (out_debug_ranges): New function to emit .debug_ranges section
357 when code is not contiguous.
358
720abc60
NC
3592006-08-08 Nick Clifton <nickc@redhat.com>
360
361 * config/tc-arm.c (WARN_DEPRECATED): Enable.
362
f0927246
NC
3632006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
364
365 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
366 only block.
367 (pe_directive_secrel) [TE_PE]: New function.
368 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
369 loc, loc_mark_labels.
370 [TE_PE]: Handle secrel32.
371 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
372 call.
373 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
374 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
375 (md_section_align): Only round section sizes here for AOUT
376 targets.
377 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
378 (tc_pe_dwarf2_emit_offset): New function.
379 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
380 (cons_fix_new_arm): Handle O_secrel.
381 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
382 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
383 of OBJ_ELF only block.
384 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
385 tc_pe_dwarf2_emit_offset.
386
55e6e397
RS
3872006-08-04 Richard Sandiford <richard@codesourcery.com>
388
389 * config/tc-sh.c (apply_full_field_fix): New function.
390 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
391 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
392 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
393 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
394
9cd19b17
NC
3952006-08-03 Nick Clifton <nickc@redhat.com>
396
397 PR gas/2991
398 * config.in: Regenerate.
399
97f87066
JM
4002006-08-03 Joseph Myers <joseph@codesourcery.com>
401
402 * config/tc-arm.c (parse_operands): Handle invalid register name
403 for OP_RIWR_RIWC.
404
41adaa5c
JM
4052006-08-03 Joseph Myers <joseph@codesourcery.com>
406
407 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
408 (parse_operands): Handle it.
409 (insns): Use it for tmcr and tmrc.
410
9d7cbccd
NC
4112006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
412
413 PR binutils/2983
414 * config/tc-i386.c (md_parse_option): Treat any target starting
415 with elf64_x86_64 as a viable target for the -64 switch.
416 (i386_target_format): For 64-bit ELF flavoured output use
417 ELF_TARGET_FORMAT64.
418 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
419
c973bc5c
NC
4202006-08-02 Nick Clifton <nickc@redhat.com>
421
422 PR gas/2991
423 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
424 bfd/aclocal.m4.
425 * configure.in: Run BFD_BINARY_FOPEN.
426 * configure: Regenerate.
427 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
428 file to include.
429
cfde7f70
L
4302006-08-01 H.J. Lu <hongjiu.lu@intel.com>
431
432 * config/tc-i386.c (md_assemble): Don't update
433 cpu_arch_isa_flags.
434
b4c71f56
TS
4352006-08-01 Thiemo Seufer <ths@mips.com>
436
437 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
438
54f4ddb3
TS
4392006-08-01 Thiemo Seufer <ths@mips.com>
440
441 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
442 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
443 BFD_RELOC_32 and BFD_RELOC_16.
444 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
445 md_convert_frag, md_obj_end): Fix comment formatting.
446
d103cf61
TS
4472006-07-31 Thiemo Seufer <ths@mips.com>
448
449 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
450 handling for BFD_RELOC_MIPS16_JMP.
451
601e61cd
NC
4522006-07-24 Andreas Schwab <schwab@suse.de>
453
454 PR/2756
455 * read.c (read_a_source_file): Ignore unknown text after line
456 comment character. Fix misleading comment.
457
b45619c0
NC
4582006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
459
460 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
461 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
462 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
463 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
464 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
465 doc/c-z80.texi, doc/internals.texi: Fix some typos.
466
784906c5
NC
4672006-07-21 Nick Clifton <nickc@redhat.com>
468
469 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
470 linker testsuite.
471
d5f010e9
TS
4722006-07-20 Thiemo Seufer <ths@mips.com>
473 Nigel Stephens <nigel@mips.com>
474
475 * config/tc-mips.c (md_parse_option): Don't infer optimisation
476 options from debug options.
477
35d3d567
TS
4782006-07-20 Thiemo Seufer <ths@mips.com>
479
480 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
481 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
482
401a54cf
PB
4832006-07-19 Paul Brook <paul@codesourcery.com>
484
485 * config/tc-arm.c (insns): Fix rbit Arm opcode.
486
16805f35
PB
4872006-07-18 Paul Brook <paul@codesourcery.com>
488
489 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
490 (md_convert_frag): Use correct reloc for add_pc. Use
491 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
492 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
493 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
494
d9e05e4e
AM
4952006-07-17 Mat Hostetter <mat@lcs.mit.edu>
496
497 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
498 when file and line unknown.
499
f43abd2b
TS
5002006-07-17 Thiemo Seufer <ths@mips.com>
501
502 * read.c (s_struct): Use IS_ELF.
503 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
504 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
505 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
506 s_mips_mask): Likewise.
507
a2902af6
TS
5082006-07-16 Thiemo Seufer <ths@mips.com>
509 David Ung <davidu@mips.com>
510
511 * read.c (s_struct): Handle ELF section changing.
512 * config/tc-mips.c (s_align): Leave enabling auto-align to the
513 generic code.
514 (s_change_sec): Try section changing only if we output ELF.
515
d32cad65
L
5162006-07-15 H.J. Lu <hongjiu.lu@intel.com>
517
518 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
519 CpuAmdFam10.
520 (smallest_imm_type): Remove Cpu086.
521 (i386_target_format): Likewise.
522
523 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
524 Update CpuXXX.
525
050dfa73
MM
5262006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
527 Michael Meissner <michael.meissner@amd.com>
528
529 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
530 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
531 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
532 architecture.
533 (i386_align_code): Ditto.
534 (md_assemble_code): Add support for insertq/extrq instructions,
535 swapping as needed for intel syntax.
536 (swap_imm_operands): New function to swap immediate operands.
537 (swap_operands): Deal with 4 operand instructions.
538 (build_modrm_byte): Add support for insertq instruction.
539
6b2de085
L
5402006-07-13 H.J. Lu <hongjiu.lu@intel.com>
541
542 * config/tc-i386.h (Size64): Fix a typo in comment.
543
01eaea5a
NC
5442006-07-12 Nick Clifton <nickc@redhat.com>
545
546 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 547 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
548 already been checked here.
549
1e85aad8
JW
5502006-07-07 James E Wilson <wilson@specifix.com>
551
552 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
553
1370e33d
NC
5542006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
555 Nick Clifton <nickc@redhat.com>
556
557 PR binutils/2877
558 * doc/as.texi: Fix spelling typo: branchs => branches.
559 * doc/c-m68hc11.texi: Likewise.
560 * config/tc-m68hc11.c: Likewise.
561 Support old spelling of command line switch for backwards
562 compatibility.
563
5f0fe04b
TS
5642006-07-04 Thiemo Seufer <ths@mips.com>
565 David Ung <davidu@mips.com>
566
567 * config/tc-mips.c (s_is_linkonce): New function.
568 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
569 weak, external, and linkonce symbols.
570 (pic_need_relax): Use s_is_linkonce.
571
85234291
L
5722006-06-24 H.J. Lu <hongjiu.lu@intel.com>
573
574 * doc/as.texinfo (Org): Remove space.
575 (P2align): Add "@var{abs-expr},".
576
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L
5772006-06-23 H.J. Lu <hongjiu.lu@intel.com>
578
579 * config/tc-i386.c (cpu_arch_tune_set): New.
580 (cpu_arch_isa): Likewise.
581 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
582 nops with short or long nop sequences based on -march=/.arch
583 and -mtune=.
584 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
585 set cpu_arch_tune and cpu_arch_tune_flags.
586 (md_parse_option): For -march=, set cpu_arch_isa and set
587 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
588 0. Set cpu_arch_tune_set to 1 for -mtune=.
589 (i386_target_format): Don't set cpu_arch_tune.
590
d4dc2f22
TS
5912006-06-23 Nigel Stephens <nigel@mips.com>
592
593 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
594 generated .sbss.* and .gnu.linkonce.sb.*.
595
a8dbcb85
TS
5962006-06-23 Thiemo Seufer <ths@mips.com>
597 David Ung <davidu@mips.com>
598
599 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
600 label_list.
601 * config/tc-mips.c (label_list): Define per-segment label_list.
602 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
603 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
604 mips_from_file_after_relocs, mips_define_label): Use per-segment
605 label_list.
606
3994f87e
TS
6072006-06-22 Thiemo Seufer <ths@mips.com>
608
609 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
610 (append_insn): Use it.
611 (md_apply_fix): Whitespace formatting.
612 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
613 mips16_extended_frag): Remove register specifier.
614 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
615 constants.
616
fa073d69
MS
6172006-06-21 Mark Shinwell <shinwell@codesourcery.com>
618
619 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
620 a directive saving VFP registers for ARMv6 or later.
621 (s_arm_unwind_save): Add parameter arch_v6 and call
622 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
623 appropriate.
624 (md_pseudo_table): Add entry for new "vsave" directive.
625 * doc/c-arm.texi: Correct error in example for "save"
626 directive (fstmdf -> fstmdx). Also document "vsave" directive.
627
8e77b565 6282006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
629 Anatoly Sokolov <aesok@post.ru>
630
631 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
632 and atmega644p devices. Rename atmega164/atmega324 devices to
633 atmega164p/atmega324p.
634 * doc/c-avr.texi: Document new mcu and arch options.
635
8b1ad454
NC
6362006-06-17 Nick Clifton <nickc@redhat.com>
637
638 * config/tc-arm.c (enum parse_operand_result): Move outside of
639 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
640
9103f4f4
L
6412006-06-16 H.J. Lu <hongjiu.lu@intel.com>
642
643 * config/tc-i386.h (processor_type): New.
644 (arch_entry): Add type.
645
646 * config/tc-i386.c (cpu_arch_tune): New.
647 (cpu_arch_tune_flags): Likewise.
648 (cpu_arch_isa_flags): Likewise.
649 (cpu_arch): Updated.
650 (set_cpu_arch): Also update cpu_arch_isa_flags.
651 (md_assemble): Update cpu_arch_isa_flags.
652 (OPTION_MARCH): New.
653 (OPTION_MTUNE): Likewise.
654 (md_longopts): Add -march= and -mtune=.
655 (md_parse_option): Support -march= and -mtune=.
656 (md_show_usage): Add -march=CPU/-mtune=CPU.
657 (i386_target_format): Also update cpu_arch_isa_flags,
658 cpu_arch_tune and cpu_arch_tune_flags.
659
660 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
661
662 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
663
4962c51a
MS
6642006-06-15 Mark Shinwell <shinwell@codesourcery.com>
665
666 * config/tc-arm.c (enum parse_operand_result): New.
667 (struct group_reloc_table_entry): New.
668 (enum group_reloc_type): New.
669 (group_reloc_table): New array.
670 (find_group_reloc_table_entry): New function.
671 (parse_shifter_operand_group_reloc): New function.
672 (parse_address_main): New function, incorporating code
673 from the old parse_address function. To be used via...
674 (parse_address): wrapper for parse_address_main; and
675 (parse_address_group_reloc): new function, likewise.
676 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
677 OP_ADDRGLDRS, OP_ADDRGLDC.
678 (parse_operands): Support for these new operand codes.
679 New macro po_misc_or_fail_no_backtrack.
680 (encode_arm_cp_address): Preserve group relocations.
681 (insns): Modify to use the above operand codes where group
682 relocations are permitted.
683 (md_apply_fix): Handle the group relocations
684 ALU_PC_G0_NC through LDC_SB_G2.
685 (tc_gen_reloc): Likewise.
686 (arm_force_relocation): Leave group relocations for the linker.
687 (arm_fix_adjustable): Likewise.
688
cd2f129f
JB
6892006-06-15 Julian Brown <julian@codesourcery.com>
690
691 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
692 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
693 relocs properly.
694
46e883c5
L
6952006-06-12 H.J. Lu <hongjiu.lu@intel.com>
696
697 * config/tc-i386.c (process_suffix): Don't add rex64 for
698 "xchg %rax,%rax".
699
1787fe5b
TS
7002006-06-09 Thiemo Seufer <ths@mips.com>
701
702 * config/tc-mips.c (mips_ip): Maintain argument count.
703
96f989c2
AM
7042006-06-09 Alan Modra <amodra@bigpond.net.au>
705
706 * config/tc-iq2000.c: Include sb.h.
707
7c752c2a
TS
7082006-06-08 Nigel Stephens <nigel@mips.com>
709
710 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
711 aliases for better compatibility with SGI tools.
712
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AM
7132006-06-08 Alan Modra <amodra@bigpond.net.au>
714
715 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
716 * Makefile.am (GASLIBS): Expand @BFDLIB@.
717 (BFDVER_H): Delete.
718 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
719 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
720 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
721 Run "make dep-am".
722 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
723 * Makefile.in: Regenerate.
724 * doc/Makefile.in: Regenerate.
725 * configure: Regenerate.
726
6648b7cf
JM
7272006-06-07 Joseph S. Myers <joseph@codesourcery.com>
728
729 * po/Make-in (pdf, ps): New dummy targets.
730
037e8744
JB
7312006-06-07 Julian Brown <julian@codesourcery.com>
732
733 * config/tc-arm.c (stdarg.h): include.
734 (arm_it): Add uncond_value field. Add isvec and issingle to operand
735 array.
736 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
737 REG_TYPE_NSDQ (single, double or quad vector reg).
738 (reg_expected_msgs): Update.
739 (BAD_FPU): Add macro for unsupported FPU instruction error.
740 (parse_neon_type): Support 'd' as an alias for .f64.
741 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
742 sets of registers.
743 (parse_vfp_reg_list): Don't update first arg on error.
744 (parse_neon_mov): Support extra syntax for VFP moves.
745 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
746 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
747 (parse_operands): Support isvec, issingle operands fields, new parse
748 codes above.
749 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
750 msr variants.
751 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
752 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
753 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
754 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
755 shapes.
756 (neon_shape): Redefine in terms of above.
757 (neon_shape_class): New enumeration, table of shape classes.
758 (neon_shape_el): New enumeration. One element of a shape.
759 (neon_shape_el_size): Register widths of above, where appropriate.
760 (neon_shape_info): New struct. Info for shape table.
761 (neon_shape_tab): New array.
762 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
763 (neon_check_shape): Rewrite as...
764 (neon_select_shape): New function to classify instruction shapes,
765 driven by new table neon_shape_tab array.
766 (neon_quad): New function. Return 1 if shape should set Q flag in
767 instructions (or equivalent), 0 otherwise.
768 (type_chk_of_el_type): Support F64.
769 (el_type_of_type_chk): Likewise.
770 (neon_check_type): Add support for VFP type checking (VFP data
771 elements fill their containing registers).
772 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
773 in thumb mode for VFP instructions.
774 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
775 and encode the current instruction as if it were that opcode.
776 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
777 arguments, call function in PFN.
778 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
779 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
780 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
781 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
782 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
783 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
784 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
785 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
786 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
787 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
788 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
789 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
790 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
791 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
792 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
793 neon_quad.
794 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
795 between VFP and Neon turns out to belong to Neon. Perform
796 architecture check and fill in condition field if appropriate.
797 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
798 (do_neon_cvt): Add support for VFP variants of instructions.
799 (neon_cvt_flavour): Extend to cover VFP conversions.
800 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
801 vmov variants.
802 (do_neon_ldr_str): Handle single-precision VFP load/store.
803 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
804 NS_NULL not NS_IGNORE.
805 (opcode_tag): Add OT_csuffixF for operands which either take a
806 conditional suffix, or have 0xF in the condition field.
807 (md_assemble): Add support for OT_csuffixF.
808 (NCE): Replace macro with...
809 (NCE_tag, NCE, NCEF): New macros.
810 (nCE): Replace macro with...
811 (nCE_tag, nCE, nCEF): New macros.
812 (insns): Add support for VFP insns or VFP versions of insns msr,
813 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
814 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
815 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
816 VFP/Neon insns together.
817
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AM
8182006-06-07 Alan Modra <amodra@bigpond.net.au>
819 Ladislav Michl <ladis@linux-mips.org>
820
821 * app.c: Don't include headers already included by as.h.
822 * as.c: Likewise.
823 * atof-generic.c: Likewise.
824 * cgen.c: Likewise.
825 * dwarf2dbg.c: Likewise.
826 * expr.c: Likewise.
827 * input-file.c: Likewise.
828 * input-scrub.c: Likewise.
829 * macro.c: Likewise.
830 * output-file.c: Likewise.
831 * read.c: Likewise.
832 * sb.c: Likewise.
833 * config/bfin-lex.l: Likewise.
834 * config/obj-coff.h: Likewise.
835 * config/obj-elf.h: Likewise.
836 * config/obj-som.h: Likewise.
837 * config/tc-arc.c: Likewise.
838 * config/tc-arm.c: Likewise.
839 * config/tc-avr.c: Likewise.
840 * config/tc-bfin.c: Likewise.
841 * config/tc-cris.c: Likewise.
842 * config/tc-d10v.c: Likewise.
843 * config/tc-d30v.c: Likewise.
844 * config/tc-dlx.h: Likewise.
845 * config/tc-fr30.c: Likewise.
846 * config/tc-frv.c: Likewise.
847 * config/tc-h8300.c: Likewise.
848 * config/tc-hppa.c: Likewise.
849 * config/tc-i370.c: Likewise.
850 * config/tc-i860.c: Likewise.
851 * config/tc-i960.c: Likewise.
852 * config/tc-ip2k.c: Likewise.
853 * config/tc-iq2000.c: Likewise.
854 * config/tc-m32c.c: Likewise.
855 * config/tc-m32r.c: Likewise.
856 * config/tc-maxq.c: Likewise.
857 * config/tc-mcore.c: Likewise.
858 * config/tc-mips.c: Likewise.
859 * config/tc-mmix.c: Likewise.
860 * config/tc-mn10200.c: Likewise.
861 * config/tc-mn10300.c: Likewise.
862 * config/tc-msp430.c: Likewise.
863 * config/tc-mt.c: Likewise.
864 * config/tc-ns32k.c: Likewise.
865 * config/tc-openrisc.c: Likewise.
866 * config/tc-ppc.c: Likewise.
867 * config/tc-s390.c: Likewise.
868 * config/tc-sh.c: Likewise.
869 * config/tc-sh64.c: Likewise.
870 * config/tc-sparc.c: Likewise.
871 * config/tc-tic30.c: Likewise.
872 * config/tc-tic4x.c: Likewise.
873 * config/tc-tic54x.c: Likewise.
874 * config/tc-v850.c: Likewise.
875 * config/tc-vax.c: Likewise.
876 * config/tc-xc16x.c: Likewise.
877 * config/tc-xstormy16.c: Likewise.
878 * config/tc-xtensa.c: Likewise.
879 * config/tc-z80.c: Likewise.
880 * config/tc-z8k.c: Likewise.
881 * macro.h: Don't include sb.h or ansidecl.h.
882 * sb.h: Don't include stdio.h or ansidecl.h.
883 * cond.c: Include sb.h.
884 * itbl-lex.l: Include as.h instead of other system headers.
885 * itbl-parse.y: Likewise.
886 * itbl-ops.c: Similarly.
887 * itbl-ops.h: Don't include as.h or ansidecl.h.
888 * config/bfin-defs.h: Don't include bfd.h or as.h.
889 * config/bfin-parse.y: Include as.h instead of other system headers.
890
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8912006-06-06 Ben Elliston <bje@au.ibm.com>
892 Anton Blanchard <anton@samba.org>
893
894 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
895 (md_show_usage): Document it.
896 (ppc_setup_opcodes): Test power6 opcode flag bits.
897 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
898
65263ce3
TS
8992006-06-06 Thiemo Seufer <ths@mips.com>
900 Chao-ying Fu <fu@mips.com>
901
902 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
903 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
904 (macro_build): Update comment.
905 (mips_ip): Allow DSP64 instructions for MIPS64R2.
906 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
907 CPU_HAS_MDMX.
908 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
909 MIPS_CPU_ASE_MDMX flags for sb1.
910
a9e24354
TS
9112006-06-05 Thiemo Seufer <ths@mips.com>
912
913 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
914 appropriate.
915 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
916 (mips_ip): Make overflowed/underflowed constant arguments in DSP
917 and MT instructions a fatal error. Use INSERT_OPERAND where
918 appropriate. Improve warnings for break and wait code overflows.
919 Use symbolic constant of OP_MASK_COPZ.
920 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
921
4cfe2c59
DJ
9222006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
923
924 * po/Make-in (top_builddir): Define.
925
e10fad12
JM
9262006-06-02 Joseph S. Myers <joseph@codesourcery.com>
927
928 * doc/Makefile.am (TEXI2DVI): Define.
929 * doc/Makefile.in: Regenerate.
930 * doc/c-arc.texi: Fix typo.
931
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AM
9322006-06-01 Alan Modra <amodra@bigpond.net.au>
933
934 * config/obj-ieee.c: Delete.
935 * config/obj-ieee.h: Delete.
936 * Makefile.am (OBJ_FORMATS): Remove ieee.
937 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
938 (obj-ieee.o): Remove rule.
939 * Makefile.in: Regenerate.
940 * configure.in (atof): Remove tahoe.
941 (OBJ_MAYBE_IEEE): Don't define.
942 * configure: Regenerate.
943 * config.in: Regenerate.
944 * doc/Makefile.in: Regenerate.
945 * po/POTFILES.in: Regenerate.
946
20e95c23
DJ
9472006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
948
949 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
950 and LIBINTL_DEP everywhere.
951 (INTLLIBS): Remove.
952 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
953 * acinclude.m4: Include new gettext macros.
954 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
955 Remove local code for po/Makefile.
956 * Makefile.in, configure, doc/Makefile.in: Regenerated.
957
eebf07fb
NC
9582006-05-30 Nick Clifton <nickc@redhat.com>
959
960 * po/es.po: Updated Spanish translation.
961
b6aee19e
DC
9622006-05-06 Denis Chertykov <denisc@overta.ru>
963
964 * doc/c-avr.texi: New file.
965 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
966 * doc/all.texi: Set AVR
967 * doc/as.texinfo: Include c-avr.texi
968
f8fdc850
JZ
9692006-05-28 Jie Zhang <jie.zhang@analog.com>
970
971 * config/bfin-parse.y (check_macfunc): Loose the condition of
972 calling check_multiply_halfregs ().
973
a3205465
JZ
9742006-05-25 Jie Zhang <jie.zhang@analog.com>
975
976 * config/bfin-parse.y (asm_1): Better check and deal with
977 vector and scalar Multiply 16-Bit Operands instructions.
978
9b52905e
NC
9792006-05-24 Nick Clifton <nickc@redhat.com>
980
981 * config/tc-hppa.c: Convert to ISO C90 format.
982 * config/tc-hppa.h: Likewise.
983
9842006-05-24 Carlos O'Donell <carlos@systemhalted.org>
985 Randolph Chung <randolph@tausq.org>
986
987 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
988 is_tls_ieoff, is_tls_leoff): Define.
989 (fix_new_hppa): Handle TLS.
990 (cons_fix_new_hppa): Likewise.
991 (pa_ip): Likewise.
992 (md_apply_fix): Handle TLS relocs.
993 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
994
28c9d252
NC
9952006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
996
997 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
998
ad3fea08
TS
9992006-05-23 Thiemo Seufer <ths@mips.com>
1000 David Ung <davidu@mips.com>
1001 Nigel Stephens <nigel@mips.com>
1002
1003 [ gas/ChangeLog ]
1004 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1005 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1006 ISA_HAS_MXHC1): New macros.
1007 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1008 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1009 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1010 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1011 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1012 (mips_after_parse_args): Change default handling of float register
1013 size to account for 32bit code with 64bit FP. Better sanity checking
1014 of ISA/ASE/ABI option combinations.
1015 (s_mipsset): Support switching of GPR and FPR sizes via
1016 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1017 options.
1018 (mips_elf_final_processing): We should record the use of 64bit FP
1019 registers in 32bit code but we don't, because ELF header flags are
1020 a scarce ressource.
1021 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1022 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1023 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1024 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1025 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1026 missing -march options. Document .set arch=CPU. Move .set smartmips
1027 to ASE page. Use @code for .set FOO examples.
1028
8b64503a
JZ
10292006-05-23 Jie Zhang <jie.zhang@analog.com>
1030
1031 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1032 if needed.
1033
403022e0
JZ
10342006-05-23 Jie Zhang <jie.zhang@analog.com>
1035
1036 * config/bfin-defs.h (bfin_equals): Remove declaration.
1037 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1038 * config/tc-bfin.c (bfin_name_is_register): Remove.
1039 (bfin_equals): Remove.
1040 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1041 (bfin_name_is_register): Remove declaration.
1042
7455baf8
TS
10432006-05-19 Thiemo Seufer <ths@mips.com>
1044 Nigel Stephens <nigel@mips.com>
1045
1046 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1047 (mips_oddfpreg_ok): New function.
1048 (mips_ip): Use it.
1049
707bfff6
TS
10502006-05-19 Thiemo Seufer <ths@mips.com>
1051 David Ung <davidu@mips.com>
1052
1053 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1054 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1055 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1056 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1057 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1058 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1059 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1060 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1061 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1062 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1063 reg_names_o32, reg_names_n32n64): Define register classes.
1064 (reg_lookup): New function, use register classes.
1065 (md_begin): Reserve register names in the symbol table. Simplify
1066 OBJ_ELF defines.
1067 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1068 Use reg_lookup.
1069 (mips16_ip): Use reg_lookup.
1070 (tc_get_register): Likewise.
1071 (tc_mips_regname_to_dw2regnum): New function.
1072
1df69f4f
TS
10732006-05-19 Thiemo Seufer <ths@mips.com>
1074
1075 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1076 Un-constify string argument.
1077 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1078 Likewise.
1079 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1080 Likewise.
1081 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1082 Likewise.
1083 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1084 Likewise.
1085 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1086 Likewise.
1087 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1088 Likewise.
1089
377260ba
NS
10902006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1091
1092 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1093 cfloat/m68881 to correct architecture before using it.
1094
cce7653b
NC
10952006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1096
1097 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1098 constant values.
1099
b0796911
PB
11002006-05-15 Paul Brook <paul@codesourcery.com>
1101
1102 * config/tc-arm.c (arm_adjust_symtab): Use
1103 bfd_is_arm_special_symbol_name.
1104
64b607e6
BW
11052006-05-15 Bob Wilson <bob.wilson@acm.org>
1106
1107 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1108 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1109 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1110 Handle errors from calls to xtensa_opcode_is_* functions.
1111
9b3f89ee
TS
11122006-05-14 Thiemo Seufer <ths@mips.com>
1113
1114 * config/tc-mips.c (macro_build): Test for currently active
1115 mips16 option.
1116 (mips16_ip): Reject invalid opcodes.
1117
370b66a1
CD
11182006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1119
1120 * doc/as.texinfo: Rename "Index" to "AS Index",
1121 and "ABORT" to "ABORT (COFF)".
1122
b6895b4f
PB
11232006-05-11 Paul Brook <paul@codesourcery.com>
1124
1125 * config/tc-arm.c (parse_half): New function.
1126 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1127 (parse_operands): Ditto.
1128 (do_mov16): Reject invalid relocations.
1129 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1130 (insns): Replace Iffff with HALF.
1131 (md_apply_fix): Add MOVW and MOVT relocs.
1132 (tc_gen_reloc): Ditto.
1133 * doc/c-arm.texi: Document relocation operators
1134
e28387c3
PB
11352006-05-11 Paul Brook <paul@codesourcery.com>
1136
1137 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1138
89ee2ebe
TS
11392006-05-11 Thiemo Seufer <ths@mips.com>
1140
1141 * config/tc-mips.c (append_insn): Don't check the range of j or
1142 jal addresses.
1143
53baae48
NC
11442006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1145
1146 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1147 relocs against external symbols for WinCE targets.
1148 (md_apply_fix): Likewise.
1149
4e2a74a8
TS
11502006-05-09 David Ung <davidu@mips.com>
1151
1152 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1153 j or jal address.
1154
337ff0a5
NC
11552006-05-09 Nick Clifton <nickc@redhat.com>
1156
1157 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1158 against symbols which are not going to be placed into the symbol
1159 table.
1160
8c9f705e
BE
11612006-05-09 Ben Elliston <bje@au.ibm.com>
1162
1163 * expr.c (operand): Remove `if (0 && ..)' statement and
1164 subsequently unused target_op label. Collapse `if (1 || ..)'
1165 statement.
1166 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1167 separately above the switch.
1168
2fd0d2ac
NC
11692006-05-08 Nick Clifton <nickc@redhat.com>
1170
1171 PR gas/2623
1172 * config/tc-msp430.c (line_separator_character): Define as |.
1173
e16bfa71
TS
11742006-05-08 Thiemo Seufer <ths@mips.com>
1175 Nigel Stephens <nigel@mips.com>
1176 David Ung <davidu@mips.com>
1177
1178 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1179 (mips_opts): Likewise.
1180 (file_ase_smartmips): New variable.
1181 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1182 (macro_build): Handle SmartMIPS instructions.
1183 (mips_ip): Likewise.
1184 (md_longopts): Add argument handling for smartmips.
1185 (md_parse_options, mips_after_parse_args): Likewise.
1186 (s_mipsset): Add .set smartmips support.
1187 (md_show_usage): Document -msmartmips/-mno-smartmips.
1188 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1189 .set smartmips.
1190 * doc/c-mips.texi: Likewise.
1191
32638454
AM
11922006-05-08 Alan Modra <amodra@bigpond.net.au>
1193
1194 * write.c (relax_segment): Add pass count arg. Don't error on
1195 negative org/space on first two passes.
1196 (relax_seg_info): New struct.
1197 (relax_seg, write_object_file): Adjust.
1198 * write.h (relax_segment): Update prototype.
1199
b7fc2769
JB
12002006-05-05 Julian Brown <julian@codesourcery.com>
1201
1202 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1203 checking.
1204 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1205 architecture version checks.
1206 (insns): Allow overlapping instructions to be used in VFP mode.
1207
7f841127
L
12082006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1209
1210 PR gas/2598
1211 * config/obj-elf.c (obj_elf_change_section): Allow user
1212 specified SHF_ALPHA_GPREL.
1213
73160847
NC
12142006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1215
1216 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1217 for PMEM related expressions.
1218
56487c55
NC
12192006-05-05 Nick Clifton <nickc@redhat.com>
1220
1221 PR gas/2582
1222 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1223 insertion of a directory separator character into a string at a
1224 given offset. Uses heuristics to decide when to use a backslash
1225 character rather than a forward-slash character.
1226 (dwarf2_directive_loc): Use the macro.
1227 (out_debug_info): Likewise.
1228
d43b4baf
TS
12292006-05-05 Thiemo Seufer <ths@mips.com>
1230 David Ung <davidu@mips.com>
1231
1232 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1233 instruction.
1234 (macro): Add new case M_CACHE_AB.
1235
088fa78e
KH
12362006-05-04 Kazu Hirata <kazu@codesourcery.com>
1237
1238 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1239 (opcode_lookup): Issue a warning for opcode with
1240 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1241 identical to OT_cinfix3.
1242 (TxC3w, TC3w, tC3w): New.
1243 (insns): Use tC3w and TC3w for comparison instructions with
1244 's' suffix.
1245
c9049d30
AM
12462006-05-04 Alan Modra <amodra@bigpond.net.au>
1247
1248 * subsegs.h (struct frchain): Delete frch_seg.
1249 (frchain_root): Delete.
1250 (seg_info): Define as macro.
1251 * subsegs.c (frchain_root): Delete.
1252 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1253 (subsegs_begin, subseg_change): Adjust for above.
1254 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1255 rather than to one big list.
1256 (subseg_get): Don't special case abs, und sections.
1257 (subseg_new, subseg_force_new): Don't set frchainP here.
1258 (seg_info): Delete.
1259 (subsegs_print_statistics): Adjust frag chain control list traversal.
1260 * debug.c (dmp_frags): Likewise.
1261 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1262 at frchain_root. Make use of known frchain ordering.
1263 (last_frag_for_seg): Likewise.
1264 (get_frag_fix): Likewise. Add seg param.
1265 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1266 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1267 (SUB_SEGMENT_ALIGN): Likewise.
1268 (subsegs_finish): Adjust frchain list traversal.
1269 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1270 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1271 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1272 (xtensa_fix_b_j_loop_end_frags): Likewise.
1273 (xtensa_fix_close_loop_end_frags): Likewise.
1274 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1275 (retrieve_segment_info): Delete frch_seg initialisation.
1276
f592407e
AM
12772006-05-03 Alan Modra <amodra@bigpond.net.au>
1278
1279 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1280 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1281 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1282 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1283
df7849c5
JM
12842006-05-02 Joseph Myers <joseph@codesourcery.com>
1285
1286 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1287 here.
1288 (md_apply_fix3): Multiply offset by 4 here for
1289 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1290
2d545b82
L
12912006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1292 Jan Beulich <jbeulich@novell.com>
1293
1294 * config/tc-i386.c (output_invalid_buf): Change size for
1295 unsigned char.
1296 * config/tc-tic30.c (output_invalid_buf): Likewise.
1297
1298 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1299 unsigned char.
1300 * config/tc-tic30.c (output_invalid): Likewise.
1301
38fc1cb1
DJ
13022006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1303
1304 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1305 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1306 (asconfig.texi): Don't set top_srcdir.
1307 * doc/as.texinfo: Don't use top_srcdir.
1308 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1309
2d545b82
L
13102006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1311
1312 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1313 * config/tc-tic30.c (output_invalid_buf): Likewise.
1314
1315 * config/tc-i386.c (output_invalid): Use snprintf instead of
1316 sprintf.
1317 * config/tc-ia64.c (declare_register_set): Likewise.
1318 (emit_one_bundle): Likewise.
1319 (check_dependencies): Likewise.
1320 * config/tc-tic30.c (output_invalid): Likewise.
1321
a8bc6c78
PB
13222006-05-02 Paul Brook <paul@codesourcery.com>
1323
1324 * config/tc-arm.c (arm_optimize_expr): New function.
1325 * config/tc-arm.h (md_optimize_expr): Define
1326 (arm_optimize_expr): Add prototype.
1327 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1328
58633d9a
BE
13292006-05-02 Ben Elliston <bje@au.ibm.com>
1330
22772e33
BE
1331 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1332 field unsigned.
1333
58633d9a
BE
1334 * sb.h (sb_list_vector): Move to sb.c.
1335 * sb.c (free_list): Use type of sb_list_vector directly.
1336 (sb_build): Fix off-by-one error in assertion about `size'.
1337
89cdfe57
BE
13382006-05-01 Ben Elliston <bje@au.ibm.com>
1339
1340 * listing.c (listing_listing): Remove useless loop.
1341 * macro.c (macro_expand): Remove is_positional local variable.
1342 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1343 and simplify surrounding expressions, where possible.
1344 (assign_symbol): Likewise.
1345 (s_weakref): Likewise.
1346 * symbols.c (colon): Likewise.
1347
c35da140
AM
13482006-05-01 James Lemke <jwlemke@wasabisystems.com>
1349
1350 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1351
9bcd4f99
TS
13522006-04-30 Thiemo Seufer <ths@mips.com>
1353 David Ung <davidu@mips.com>
1354
1355 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1356 (mips_immed): New table that records various handling of udi
1357 instruction patterns.
1358 (mips_ip): Adds udi handling.
1359
001ae1a4
AM
13602006-04-28 Alan Modra <amodra@bigpond.net.au>
1361
1362 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1363 of list rather than beginning.
1364
136da414
JB
13652006-04-26 Julian Brown <julian@codesourcery.com>
1366
1367 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1368 (is_quarter_float): Rename from above. Simplify slightly.
1369 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1370 number.
1371 (parse_neon_mov): Parse floating-point constants.
1372 (neon_qfloat_bits): Fix encoding.
1373 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1374 preference to integer encoding when using the F32 type.
1375
dcbf9037
JB
13762006-04-26 Julian Brown <julian@codesourcery.com>
1377
1378 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1379 zero-initialising structures containing it will lead to invalid types).
1380 (arm_it): Add vectype to each operand.
1381 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1382 defined field.
1383 (neon_typed_alias): New structure. Extra information for typed
1384 register aliases.
1385 (reg_entry): Add neon type info field.
1386 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1387 Break out alternative syntax for coprocessor registers, etc. into...
1388 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1389 out from arm_reg_parse.
1390 (parse_neon_type): Move. Return SUCCESS/FAIL.
1391 (first_error): New function. Call to ensure first error which occurs is
1392 reported.
1393 (parse_neon_operand_type): Parse exactly one type.
1394 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1395 (parse_typed_reg_or_scalar): New function. Handle core of both
1396 arm_typed_reg_parse and parse_scalar.
1397 (arm_typed_reg_parse): Parse a register with an optional type.
1398 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1399 result.
1400 (parse_scalar): Parse a Neon scalar with optional type.
1401 (parse_reg_list): Use first_error.
1402 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1403 (neon_alias_types_same): New function. Return true if two (alias) types
1404 are the same.
1405 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1406 of elements.
1407 (insert_reg_alias): Return new reg_entry not void.
1408 (insert_neon_reg_alias): New function. Insert type/index information as
1409 well as register for alias.
1410 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1411 make typed register aliases accordingly.
1412 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1413 of line.
1414 (s_unreq): Delete type information if present.
1415 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1416 (s_arm_unwind_save_mmxwcg): Likewise.
1417 (s_arm_unwind_movsp): Likewise.
1418 (s_arm_unwind_setfp): Likewise.
1419 (parse_shift): Likewise.
1420 (parse_shifter_operand): Likewise.
1421 (parse_address): Likewise.
1422 (parse_tb): Likewise.
1423 (tc_arm_regname_to_dw2regnum): Likewise.
1424 (md_pseudo_table): Add dn, qn.
1425 (parse_neon_mov): Handle typed operands.
1426 (parse_operands): Likewise.
1427 (neon_type_mask): Add N_SIZ.
1428 (N_ALLMODS): New macro.
1429 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1430 (el_type_of_type_chk): Add some safeguards.
1431 (modify_types_allowed): Fix logic bug.
1432 (neon_check_type): Handle operands with types.
1433 (neon_three_same): Remove redundant optional arg handling.
1434 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1435 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1436 (do_neon_step): Adjust accordingly.
1437 (neon_cmode_for_logic_imm): Use first_error.
1438 (do_neon_bitfield): Call neon_check_type.
1439 (neon_dyadic): Rename to...
1440 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1441 to allow modification of type of the destination.
1442 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1443 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1444 (do_neon_compare): Make destination be an untyped bitfield.
1445 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1446 (neon_mul_mac): Return early in case of errors.
1447 (neon_move_immediate): Use first_error.
1448 (neon_mac_reg_scalar_long): Fix type to include scalar.
1449 (do_neon_dup): Likewise.
1450 (do_neon_mov): Likewise (in several places).
1451 (do_neon_tbl_tbx): Fix type.
1452 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1453 (do_neon_ld_dup): Exit early in case of errors and/or use
1454 first_error.
1455 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1456 Handle .dn/.qn directives.
1457 (REGDEF): Add zero for reg_entry neon field.
1458
5287ad62
JB
14592006-04-26 Julian Brown <julian@codesourcery.com>
1460
1461 * config/tc-arm.c (limits.h): Include.
1462 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1463 (fpu_vfp_v3_or_neon_ext): Declare constants.
1464 (neon_el_type): New enumeration of types for Neon vector elements.
1465 (neon_type_el): New struct. Define type and size of a vector element.
1466 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1467 instruction.
1468 (neon_type): Define struct. The type of an instruction.
1469 (arm_it): Add 'vectype' for the current instruction.
1470 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1471 (vfp_sp_reg_pos): Rename to...
1472 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1473 tags.
1474 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1475 (Neon D or Q register).
1476 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1477 register.
1478 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1479 (my_get_expression): Allow above constant as argument to accept
1480 64-bit constants with optional prefix.
1481 (arm_reg_parse): Add extra argument to return the specific type of
1482 register in when either a D or Q register (REG_TYPE_NDQ) is
1483 requested. Can be NULL.
1484 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1485 (parse_reg_list): Update for new arm_reg_parse args.
1486 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1487 (parse_neon_el_struct_list): New function. Parse element/structure
1488 register lists for VLD<n>/VST<n> instructions.
1489 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1490 (s_arm_unwind_save_mmxwr): Likewise.
1491 (s_arm_unwind_save_mmxwcg): Likewise.
1492 (s_arm_unwind_movsp): Likewise.
1493 (s_arm_unwind_setfp): Likewise.
1494 (parse_big_immediate): New function. Parse an immediate, which may be
1495 64 bits wide. Put results in inst.operands[i].
1496 (parse_shift): Update for new arm_reg_parse args.
1497 (parse_address): Likewise. Add parsing of alignment specifiers.
1498 (parse_neon_mov): Parse the operands of a VMOV instruction.
1499 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1500 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1501 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1502 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1503 (parse_operands): Handle new codes above.
1504 (encode_arm_vfp_sp_reg): Rename to...
1505 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1506 selected VFP version only supports D0-D15.
1507 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1508 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1509 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1510 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1511 encode_arm_vfp_reg name, and allow 32 D regs.
1512 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1513 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1514 regs.
1515 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1516 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1517 constant-load and conversion insns introduced with VFPv3.
1518 (neon_tab_entry): New struct.
1519 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1520 those which are the targets of pseudo-instructions.
1521 (neon_opc): Enumerate opcodes, use as indices into...
1522 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1523 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1524 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1525 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1526 neon_enc_tab.
1527 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1528 Neon instructions.
1529 (neon_type_mask): New. Compact type representation for type checking.
1530 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1531 permitted type combinations.
1532 (N_IGNORE_TYPE): New macro.
1533 (neon_check_shape): New function. Check an instruction shape for
1534 multiple alternatives. Return the specific shape for the current
1535 instruction.
1536 (neon_modify_type_size): New function. Modify a vector type and size,
1537 depending on the bit mask in argument 1.
1538 (neon_type_promote): New function. Convert a given "key" type (of an
1539 operand) into the correct type for a different operand, based on a bit
1540 mask.
1541 (type_chk_of_el_type): New function. Convert a type and size into the
1542 compact representation used for type checking.
1543 (el_type_of_type_ckh): New function. Reverse of above (only when a
1544 single bit is set in the bit mask).
1545 (modify_types_allowed): New function. Alter a mask of allowed types
1546 based on a bit mask of modifications.
1547 (neon_check_type): New function. Check the type of the current
1548 instruction against the variable argument list. The "key" type of the
1549 instruction is returned.
1550 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1551 a Neon data-processing instruction depending on whether we're in ARM
1552 mode or Thumb-2 mode.
1553 (neon_logbits): New function.
1554 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1555 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1556 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1557 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1558 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1559 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1560 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1561 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1562 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1563 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1564 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1565 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1566 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1567 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1568 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1569 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1570 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1571 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1572 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1573 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1574 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1575 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1576 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1577 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1578 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1579 helpers.
1580 (parse_neon_type): New function. Parse Neon type specifier.
1581 (opcode_lookup): Allow parsing of Neon type specifiers.
1582 (REGNUM2, REGSETH, REGSET2): New macros.
1583 (reg_names): Add new VFPv3 and Neon registers.
1584 (NUF, nUF, NCE, nCE): New macros for opcode table.
1585 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1586 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1587 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1588 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1589 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1590 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1591 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1592 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1593 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1594 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1595 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1596 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1597 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1598 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1599 fto[us][lh][sd].
1600 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1601 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1602 (arm_option_cpu_value): Add vfp3 and neon.
1603 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1604 VFPv1 attribute.
1605
1946c96e
BW
16062006-04-25 Bob Wilson <bob.wilson@acm.org>
1607
1608 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1609 syntax instead of hardcoded opcodes with ".w18" suffixes.
1610 (wide_branch_opcode): New.
1611 (build_transition): Use it to check for wide branch opcodes with
1612 either ".w18" or ".w15" suffixes.
1613
5033a645
BW
16142006-04-25 Bob Wilson <bob.wilson@acm.org>
1615
1616 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1617 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1618 frag's is_literal flag.
1619
395fa56f
BW
16202006-04-25 Bob Wilson <bob.wilson@acm.org>
1621
1622 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1623
708587a4
KH
16242006-04-23 Kazu Hirata <kazu@codesourcery.com>
1625
1626 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1627 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1628 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1629 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1630 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1631
8463be01
PB
16322005-04-20 Paul Brook <paul@codesourcery.com>
1633
1634 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1635 all targets.
1636 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1637
f26a5955
AM
16382006-04-19 Alan Modra <amodra@bigpond.net.au>
1639
1640 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1641 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1642 Make some cpus unsupported on ELF. Run "make dep-am".
1643 * Makefile.in: Regenerate.
1644
241a6c40
AM
16452006-04-19 Alan Modra <amodra@bigpond.net.au>
1646
1647 * configure.in (--enable-targets): Indent help message.
1648 * configure: Regenerate.
1649
bb8f5920
L
16502006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1651
1652 PR gas/2533
1653 * config/tc-i386.c (i386_immediate): Check illegal immediate
1654 register operand.
1655
23d9d9de
AM
16562006-04-18 Alan Modra <amodra@bigpond.net.au>
1657
64e74474
AM
1658 * config/tc-i386.c: Formatting.
1659 (output_disp, output_imm): ISO C90 params.
1660
6cbe03fb
AM
1661 * frags.c (frag_offset_fixed_p): Constify args.
1662 * frags.h (frag_offset_fixed_p): Ditto.
1663
23d9d9de
AM
1664 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1665 (COFF_MAGIC): Delete.
a37d486e
AM
1666
1667 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1668
e7403566
DJ
16692006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1670
1671 * po/POTFILES.in: Regenerated.
1672
58ab4f3d
MM
16732006-04-16 Mark Mitchell <mark@codesourcery.com>
1674
1675 * doc/as.texinfo: Mention that some .type syntaxes are not
1676 supported on all architectures.
1677
482fd9f9
BW
16782006-04-14 Sterling Augustine <sterling@tensilica.com>
1679
1680 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1681 instructions when such transformations have been disabled.
1682
05d58145
BW
16832006-04-10 Sterling Augustine <sterling@tensilica.com>
1684
1685 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1686 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1687 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1688 decoding the loop instructions. Remove current_offset variable.
1689 (xtensa_fix_short_loop_frags): Likewise.
1690 (min_bytes_to_other_loop_end): Remove current_offset argument.
1691
9e75b3fa
AM
16922006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1693
a37d486e 1694 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1695 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1696
d727e8c2
NC
16972006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1698
1699 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1700 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1701 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1702 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1703 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1704 at90can64, at90usb646, at90usb647, at90usb1286 and
1705 at90usb1287.
1706 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1707
d252fdde
PB
17082006-04-07 Paul Brook <paul@codesourcery.com>
1709
1710 * config/tc-arm.c (parse_operands): Set default error message.
1711
ab1eb5fe
PB
17122006-04-07 Paul Brook <paul@codesourcery.com>
1713
1714 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1715
7ae2971b
PB
17162006-04-07 Paul Brook <paul@codesourcery.com>
1717
1718 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1719
53365c0d
PB
17202006-04-07 Paul Brook <paul@codesourcery.com>
1721
1722 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1723 (move_or_literal_pool): Handle Thumb-2 instructions.
1724 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1725
45aa61fe
AM
17262006-04-07 Alan Modra <amodra@bigpond.net.au>
1727
1728 PR 2512.
1729 * config/tc-i386.c (match_template): Move 64-bit operand tests
1730 inside loop.
1731
108a6f8e
CD
17322006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1733
1734 * po/Make-in: Add install-html target.
1735 * Makefile.am: Add install-html and install-html-recursive targets.
1736 * Makefile.in: Regenerate.
1737 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1738 * configure: Regenerate.
1739 * doc/Makefile.am: Add install-html and install-html-am targets.
1740 * doc/Makefile.in: Regenerate.
1741
ec651a3b
AM
17422006-04-06 Alan Modra <amodra@bigpond.net.au>
1743
1744 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1745 second scan.
1746
910600e9
RS
17472006-04-05 Richard Sandiford <richard@codesourcery.com>
1748 Daniel Jacobowitz <dan@codesourcery.com>
1749
1750 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1751 (GOTT_BASE, GOTT_INDEX): New.
1752 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1753 GOTT_INDEX when generating VxWorks PIC.
1754 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1755 use the generic *-*-vxworks* stanza instead.
1756
99630778
AM
17572006-04-04 Alan Modra <amodra@bigpond.net.au>
1758
1759 PR 997
1760 * frags.c (frag_offset_fixed_p): New function.
1761 * frags.h (frag_offset_fixed_p): Declare.
1762 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1763 (resolve_expression): Likewise.
1764
a02728c8
BW
17652006-04-03 Sterling Augustine <sterling@tensilica.com>
1766
1767 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1768 of the same length but different numbers of slots.
1769
9dfde49d
AS
17702006-03-30 Andreas Schwab <schwab@suse.de>
1771
1772 * configure.in: Fix help string for --enable-targets option.
1773 * configure: Regenerate.
1774
2da12c60
NS
17752006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1776
6d89cc8f
NS
1777 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1778 (m68k_ip): ... here. Use for all chips. Protect against buffer
1779 overrun and avoid excessive copying.
1780
2da12c60
NS
1781 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1782 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1783 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1784 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1785 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1786 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1787 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1788 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1789 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1790 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1791 (struct m68k_cpu): Change chip field to control_regs.
1792 (current_chip): Remove.
1793 (control_regs): New.
1794 (m68k_archs, m68k_extensions): Adjust.
1795 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1796 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1797 (find_cf_chip): Reimplement for new organization of cpu table.
1798 (select_control_regs): Remove.
1799 (mri_chip): Adjust.
1800 (struct save_opts): Save control regs, not chip.
1801 (s_save, s_restore): Adjust.
1802 (m68k_lookup_cpu): Give deprecated warning when necessary.
1803 (m68k_init_arch): Adjust.
1804 (md_show_usage): Adjust for new cpu table organization.
1805
1ac4baed
BS
18062006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1807
1808 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1809 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1810 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1811 "elf/bfin.h".
1812 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1813 (any_gotrel): New rule.
1814 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1815 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1816 "elf/bfin.h".
1817 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1818 (bfin_pic_ptr): New function.
1819 (md_pseudo_table): Add it for ".picptr".
1820 (OPTION_FDPIC): New macro.
1821 (md_longopts): Add -mfdpic.
1822 (md_parse_option): Handle it.
1823 (md_begin): Set BFD flags.
1824 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1825 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1826 us for GOT relocs.
1827 * Makefile.am (bfin-parse.o): Update dependencies.
1828 (DEPTC_bfin_elf): Likewise.
1829 * Makefile.in: Regenerate.
1830
a9d34880
RS
18312006-03-25 Richard Sandiford <richard@codesourcery.com>
1832
1833 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1834 mcfemac instead of mcfmac.
1835
9ca26584
AJ
18362006-03-23 Michael Matz <matz@suse.de>
1837
1838 * config/tc-i386.c (type_names): Correct placement of 'static'.
1839 (reloc): Map some more relocs to their 64 bit counterpart when
1840 size is 8.
1841 (output_insn): Work around breakage if DEBUG386 is defined.
1842 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1843 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1844 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1845 different from i386.
1846 (output_imm): Ditto.
1847 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1848 Imm64.
1849 (md_convert_frag): Jumps can now be larger than 2GB away, error
1850 out in that case.
1851 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1852 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1853
0a44bf69
RS
18542006-03-22 Richard Sandiford <richard@codesourcery.com>
1855 Daniel Jacobowitz <dan@codesourcery.com>
1856 Phil Edwards <phil@codesourcery.com>
1857 Zack Weinberg <zack@codesourcery.com>
1858 Mark Mitchell <mark@codesourcery.com>
1859 Nathan Sidwell <nathan@codesourcery.com>
1860
1861 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1862 (md_begin): Complain about -G being used for PIC. Don't change
1863 the text, data and bss alignments on VxWorks.
1864 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1865 generating VxWorks PIC.
1866 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1867 (macro): Likewise, but do not treat la $25 specially for
1868 VxWorks PIC, and do not handle jal.
1869 (OPTION_MVXWORKS_PIC): New macro.
1870 (md_longopts): Add -mvxworks-pic.
1871 (md_parse_option): Don't complain about using PIC and -G together here.
1872 Handle OPTION_MVXWORKS_PIC.
1873 (md_estimate_size_before_relax): Always use the first relaxation
1874 sequence on VxWorks.
1875 * config/tc-mips.h (VXWORKS_PIC): New.
1876
080eb7fe
PB
18772006-03-21 Paul Brook <paul@codesourcery.com>
1878
1879 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1880
03aaa593
BW
18812006-03-21 Sterling Augustine <sterling@tensilica.com>
1882
1883 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1884 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1885 (get_loop_align_size): New.
1886 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1887 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1888 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1889 (get_noop_aligned_address): Use get_loop_align_size.
1890 (get_aligned_diff): Likewise.
1891
3e94bf1a
PB
18922006-03-21 Paul Brook <paul@codesourcery.com>
1893
1894 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1895
dfa9f0d5
PB
18962006-03-20 Paul Brook <paul@codesourcery.com>
1897
1898 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1899 (do_t_branch): Encode branches inside IT blocks as unconditional.
1900 (do_t_cps): New function.
1901 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1902 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1903 (opcode_lookup): Allow conditional suffixes on all instructions in
1904 Thumb mode.
1905 (md_assemble): Advance condexec state before checking for errors.
1906 (insns): Use do_t_cps.
1907
6e1cb1a6
PB
19082006-03-20 Paul Brook <paul@codesourcery.com>
1909
1910 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1911 outputting the insn.
1912
0a966e2d
JBG
19132006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1914
1915 * config/tc-vax.c: Update copyright year.
1916 * config/tc-vax.h: Likewise.
1917
a49fcc17
JBG
19182006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1919
1920 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1921 make it static.
1922 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1923
f5208ef2
PB
19242006-03-17 Paul Brook <paul@codesourcery.com>
1925
1926 * config/tc-arm.c (insns): Add ldm and stm.
1927
cb4c78d6
BE
19282006-03-17 Ben Elliston <bje@au.ibm.com>
1929
1930 PR gas/2446
1931 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1932
c16d2bf0
PB
19332006-03-16 Paul Brook <paul@codesourcery.com>
1934
1935 * config/tc-arm.c (insns): Add "svc".
1936
80ca4e2c
BW
19372006-03-13 Bob Wilson <bob.wilson@acm.org>
1938
1939 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1940 flag and avoid double underscore prefixes.
1941
3a4a14e9
PB
19422006-03-10 Paul Brook <paul@codesourcery.com>
1943
1944 * config/tc-arm.c (md_begin): Handle EABIv5.
1945 (arm_eabis): Add EF_ARM_EABI_VER5.
1946 * doc/c-arm.texi: Document -meabi=5.
1947
518051dc
BE
19482006-03-10 Ben Elliston <bje@au.ibm.com>
1949
1950 * app.c (do_scrub_chars): Simplify string handling.
1951
00a97672
RS
19522006-03-07 Richard Sandiford <richard@codesourcery.com>
1953 Daniel Jacobowitz <dan@codesourcery.com>
1954 Zack Weinberg <zack@codesourcery.com>
1955 Nathan Sidwell <nathan@codesourcery.com>
1956 Paul Brook <paul@codesourcery.com>
1957 Ricardo Anguiano <anguiano@codesourcery.com>
1958 Phil Edwards <phil@codesourcery.com>
1959
1960 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1961 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1962 R_ARM_ABS12 reloc.
1963 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1964 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1965 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1966
b29757dc
BW
19672006-03-06 Bob Wilson <bob.wilson@acm.org>
1968
1969 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1970 even when using the text-section-literals option.
1971
0b2e31dc
NS
19722006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1973
1974 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1975 and cf.
1976 (m68k_ip): <case 'J'> Check we have some control regs.
1977 (md_parse_option): Allow raw arch switch.
1978 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1979 whether 68881 or cfloat was meant by -mfloat.
1980 (md_show_usage): Adjust extension display.
1981 (m68k_elf_final_processing): Adjust.
1982
df406460
NC
19832006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1984
1985 * config/tc-avr.c (avr_mod_hash_value): New function.
1986 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1987 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1988 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1989 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1990 of (int).
1991 (tc_gen_reloc): Handle substractions of symbols, if possible do
1992 fixups, abort otherwise.
1993 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1994 tc_fix_adjustable): Define.
1995
53022e4a
JW
19962006-03-02 James E Wilson <wilson@specifix.com>
1997
1998 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1999 change the template, then clear md.slot[curr].end_of_insn_group.
2000
9f6f925e
JB
20012006-02-28 Jan Beulich <jbeulich@novell.com>
2002
2003 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2004
0e31b3e1
JB
20052006-02-28 Jan Beulich <jbeulich@novell.com>
2006
2007 PR/1070
2008 * macro.c (getstring): Don't treat parentheses special anymore.
2009 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2010 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2011 characters.
2012
10cd14b4
AM
20132006-02-28 Mat <mat@csail.mit.edu>
2014
2015 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2016
63752a75
JJ
20172006-02-27 Jakub Jelinek <jakub@redhat.com>
2018
2019 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2020 field.
2021 (CFI_signal_frame): Define.
2022 (cfi_pseudo_table): Add .cfi_signal_frame.
2023 (dot_cfi): Handle CFI_signal_frame.
2024 (output_cie): Handle cie->signal_frame.
2025 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2026 different. Copy signal_frame from FDE to newly created CIE.
2027 * doc/as.texinfo: Document .cfi_signal_frame.
2028
f7d9e5c3
CD
20292006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2030
2031 * doc/Makefile.am: Add html target.
2032 * doc/Makefile.in: Regenerate.
2033 * po/Make-in: Add html target.
2034
331d2d0d
L
20352006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2036
8502d882 2037 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2038 Instructions.
2039
8502d882 2040 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2041 (CpuUnknownFlags): Add CpuMNI.
2042
10156f83
DM
20432006-02-24 David S. Miller <davem@sunset.davemloft.net>
2044
2045 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2046 (hpriv_reg_table): New table for hyperprivileged registers.
2047 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2048 register encoding.
2049
6772dd07
DD
20502006-02-24 DJ Delorie <dj@redhat.com>
2051
2052 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2053 (tc_gen_reloc): Don't define.
2054 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2055 (OPTION_LINKRELAX): New.
2056 (md_longopts): Add it.
2057 (m32c_relax): New.
2058 (md_parse_options): Set it.
2059 (md_assemble): Emit relaxation relocs as needed.
2060 (md_convert_frag): Emit relaxation relocs as needed.
2061 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2062 (m32c_apply_fix): New.
2063 (tc_gen_reloc): New.
2064 (m32c_force_relocation): Force out jump relocs when relaxing.
2065 (m32c_fix_adjustable): Return false if relaxing.
2066
62b3e311
PB
20672006-02-24 Paul Brook <paul@codesourcery.com>
2068
2069 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2070 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2071 (struct asm_barrier_opt): Define.
2072 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2073 (parse_psr): Accept V7M psr names.
2074 (parse_barrier): New function.
2075 (enum operand_parse_code): Add OP_oBARRIER.
2076 (parse_operands): Implement OP_oBARRIER.
2077 (do_barrier): New function.
2078 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2079 (do_t_cpsi): Add V7M restrictions.
2080 (do_t_mrs, do_t_msr): Validate V7M variants.
2081 (md_assemble): Check for NULL variants.
2082 (v7m_psrs, barrier_opt_names): New tables.
2083 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2084 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2085 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2086 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2087 (struct cpu_arch_ver_table): Define.
2088 (cpu_arch_ver): New.
2089 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2090 Tag_CPU_arch_profile.
2091 * doc/c-arm.texi: Document new cpu and arch options.
2092
59cf82fe
L
20932006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2094
2095 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2096
19a7219f
L
20972006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2098
2099 * config/tc-ia64.c: Update copyright years.
2100
7f3dfb9c
L
21012006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2102
2103 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2104 SDM 2.2.
2105
f40d1643
PB
21062005-02-22 Paul Brook <paul@codesourcery.com>
2107
2108 * config/tc-arm.c (do_pld): Remove incorrect write to
2109 inst.instruction.
2110 (encode_thumb32_addr_mode): Use correct operand.
2111
216d22bc
PB
21122006-02-21 Paul Brook <paul@codesourcery.com>
2113
2114 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2115
d70c5fc7
NC
21162006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2117 Anil Paranjape <anilp1@kpitcummins.com>
2118 Shilin Shakti <shilins@kpitcummins.com>
2119
2120 * Makefile.am: Add xc16x related entry.
2121 * Makefile.in: Regenerate.
2122 * configure.in: Added xc16x related entry.
2123 * configure: Regenerate.
2124 * config/tc-xc16x.h: New file
2125 * config/tc-xc16x.c: New file
2126 * doc/c-xc16x.texi: New file for xc16x
2127 * doc/all.texi: Entry for xc16x
2128 * doc/Makefile.texi: Added c-xc16x.texi
2129 * NEWS: Announce the support for the new target.
2130
aaa2ab3d
NH
21312006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2132
2133 * configure.tgt: set emulation for mips-*-netbsd*
2134
82de001f
JJ
21352006-02-14 Jakub Jelinek <jakub@redhat.com>
2136
2137 * config.in: Rebuilt.
2138
431ad2d0
BW
21392006-02-13 Bob Wilson <bob.wilson@acm.org>
2140
2141 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2142 from 1, not 0, in error messages.
2143 (md_assemble): Simplify special-case check for ENTRY instructions.
2144 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2145 operand in error message.
2146
94089a50
JM
21472006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2148
2149 * configure.tgt (arm-*-linux-gnueabi*): Change to
2150 arm-*-linux-*eabi*.
2151
52de4c06
NC
21522006-02-10 Nick Clifton <nickc@redhat.com>
2153
70e45ad9
NC
2154 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2155 32-bit value is propagated into the upper bits of a 64-bit long.
2156
52de4c06
NC
2157 * config/tc-arc.c (init_opcode_tables): Fix cast.
2158 (arc_extoper, md_operand): Likewise.
2159
21af2bbd
BW
21602006-02-09 David Heine <dlheine@tensilica.com>
2161
2162 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2163 each relaxation step.
2164
75a706fc
L
21652006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2166
2167 * configure.in (CHECK_DECLS): Add vsnprintf.
2168 * configure: Regenerate.
2169 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2170 include/declare here, but...
2171 * as.h: Move code detecting VARARGS idiom to the top.
2172 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2173 (vsnprintf): Declare if not already declared.
2174
0d474464
L
21752006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2176
2177 * as.c (close_output_file): New.
2178 (main): Register close_output_file with xatexit before
2179 dump_statistics. Don't call output_file_close.
2180
266abb8f
NS
21812006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2182
2183 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2184 mcf5329_control_regs): New.
2185 (not_current_architecture, selected_arch, selected_cpu): New.
2186 (m68k_archs, m68k_extensions): New.
2187 (archs): Renamed to ...
2188 (m68k_cpus): ... here. Adjust.
2189 (n_arches): Remove.
2190 (md_pseudo_table): Add arch and cpu directives.
2191 (find_cf_chip, m68k_ip): Adjust table scanning.
2192 (no_68851, no_68881): Remove.
2193 (md_assemble): Lazily initialize.
2194 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2195 (md_init_after_args): Move functionality to m68k_init_arch.
2196 (mri_chip): Adjust table scanning.
2197 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2198 options with saner parsing.
2199 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2200 m68k_init_arch): New.
2201 (s_m68k_cpu, s_m68k_arch): New.
2202 (md_show_usage): Adjust.
2203 (m68k_elf_final_processing): Set CF EF flags.
2204 * config/tc-m68k.h (m68k_init_after_args): Remove.
2205 (tc_init_after_args): Remove.
2206 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2207 (M68k-Directives): Document .arch and .cpu directives.
2208
134dcee5
AM
22092006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2210
2211 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2212 synonyms for equ and defl.
2213 (z80_cons_fix_new): New function.
2214 (emit_byte): Disallow relative jumps to absolute locations.
2215 (emit_data): Only handle defb, prototype changed, because defb is
2216 now handled as pseudo-op rather than an instruction.
2217 (instab): Entries for defb,defw,db,dw moved from here...
2218 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2219 Add entries for def24,def32,d24,d32.
2220 (md_assemble): Improved error handling.
2221 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2222 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2223 (z80_cons_fix_new): Declare.
2224 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2225 (def24,d24,def32,d32): New pseudo-ops.
2226
a9931606
PB
22272006-02-02 Paul Brook <paul@codesourcery.com>
2228
2229 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2230
ef8d22e6
PB
22312005-02-02 Paul Brook <paul@codesourcery.com>
2232
2233 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2234 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2235 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2236 T2_OPCODE_RSB): Define.
2237 (thumb32_negate_data_op): New function.
2238 (md_apply_fix): Use it.
2239
e7da6241
BW
22402006-01-31 Bob Wilson <bob.wilson@acm.org>
2241
2242 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2243 fields.
2244 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2245 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2246 subtracted symbols.
2247 (relaxation_requirements): Add pfinish_frag argument and use it to
2248 replace setting tinsn->record_fix fields.
2249 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2250 and vinsn_to_insnbuf. Remove references to record_fix and
2251 slot_sub_symbols fields.
2252 (xtensa_mark_narrow_branches): Delete unused code.
2253 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2254 a symbol.
2255 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2256 record_fix fields.
2257 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2258 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2259 of the record_fix field. Simplify error messages for unexpected
2260 symbolic operands.
2261 (set_expr_symbol_offset_diff): Delete.
2262
79134647
PB
22632006-01-31 Paul Brook <paul@codesourcery.com>
2264
2265 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2266
e74cfd16
PB
22672006-01-31 Paul Brook <paul@codesourcery.com>
2268 Richard Earnshaw <rearnsha@arm.com>
2269
2270 * config/tc-arm.c: Use arm_feature_set.
2271 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2272 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2273 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2274 New variables.
2275 (insns): Use them.
2276 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2277 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2278 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2279 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2280 feature flags.
2281 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2282 (arm_opts): Move old cpu/arch options from here...
2283 (arm_legacy_opts): ... to here.
2284 (md_parse_option): Search arm_legacy_opts.
2285 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2286 (arm_float_abis, arm_eabis): Make const.
2287
d47d412e
BW
22882006-01-25 Bob Wilson <bob.wilson@acm.org>
2289
2290 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2291
b14273fe
JZ
22922006-01-21 Jie Zhang <jie.zhang@analog.com>
2293
2294 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2295 in load immediate intruction.
2296
39cd1c76
JZ
22972006-01-21 Jie Zhang <jie.zhang@analog.com>
2298
2299 * config/bfin-parse.y (value_match): Use correct conversion
2300 specifications in template string for __FILE__ and __LINE__.
2301 (binary): Ditto.
2302 (unary): Ditto.
2303
67a4f2b7
AO
23042006-01-18 Alexandre Oliva <aoliva@redhat.com>
2305
2306 Introduce TLS descriptors for i386 and x86_64.
2307 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2308 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2309 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2310 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2311 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2312 displacement bits.
2313 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2314 (lex_got): Handle @tlsdesc and @tlscall.
2315 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2316
8ad7c533
NC
23172006-01-11 Nick Clifton <nickc@redhat.com>
2318
2319 Fixes for building on 64-bit hosts:
2320 * config/tc-avr.c (mod_index): New union to allow conversion
2321 between pointers and integers.
2322 (md_begin, avr_ldi_expression): Use it.
2323 * config/tc-i370.c (md_assemble): Add cast for argument to print
2324 statement.
2325 * config/tc-tic54x.c (subsym_substitute): Likewise.
2326 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2327 opindex field of fr_cgen structure into a pointer so that it can
2328 be stored in a frag.
2329 * config/tc-mn10300.c (md_assemble): Likewise.
2330 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2331 types.
2332 * config/tc-v850.c: Replace uses of (int) casts with correct
2333 types.
2334
4dcb3903
L
23352006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2336
2337 PR gas/2117
2338 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2339
e0f6ea40
HPN
23402006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2341
2342 PR gas/2101
2343 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2344 a local-label reference.
2345
e88d958a 2346For older changes see ChangeLog-2005
08d56133
NC
2347\f
2348Local Variables:
2349mode: change-log
2350left-margin: 8
2351fill-column: 74
2352version-control: never
2353End:
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