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2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
9d5de888
CF		 12013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
2
3 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
4 (fpr_write_mask): Test MSA registers.
5 (can_swap_branch_p): Check fpr write followed by fpr read.
6
3fc1d038
NC		 72013-10-18 Nick Clifton <nickc@redhat.com>
8
9 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
10
56d438b1
CF		 112013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
13
14 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
15 (md_longopts): Add mmsa and mno-msa.
16 (mips_ases): Add msa.
17 (RTYPE_MASK): Update.
18 (RTYPE_MSA): New define.
19 (OT_REG_ELEMENT): Replace with...
20 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
21 (mips_operand_token): Replace reg_element with index.
22 (mips_parse_argument_token): Treat vector indices as separate tokens.
23 Handle register indices.
24 (md_begin): Add MSA register names.
25 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
26 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
27 (match_mdmx_imm_reg_operand): Update accordingly.
28 (match_imm_index_operand): New function.
29 (match_reg_index_operand): New function.
30 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
31 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
32 (md_show_usage): Print -mmsa and -mno-msa.
33 * doc/as.texinfo: Document -mmsa and -mno-msa.
34 * doc/c-mips.texi: Document -mmsa and -mno-msa.
35 Document .set msa and .set nomsa.
36
b2e951ec
NC		 372013-10-14 Nick Clifton <nickc@redhat.com>
38
39 * read.c (add_include_dir): Use xrealloc.
40 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
41 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
42
ae335a4e
SL		 432013-10-13 Sandra Loosemore <sandra@codesourcery.com>
44
45 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
46 also test/refer to "sstatus". Reformat the warning message.
47
0e1c2434
SK		 482013-10-10 Sean Keys <skeys@ipdatasys.com>
49
50 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
51
47cd3fa7
JB		 522013-10-10 Jan Beulich <jbeulich@suse.com>
53
54 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
55 swapping for bndmk, bndldx, and bndstx.
56
6085f853
NC		 572013-10-09 Nick Clifton <nickc@redhat.com>
58
b7b2bb1d
NC		 59 PR gas/16025
60 * config/tc-epiphany.c (md_convert_frag): Add missing break
61 statement.
62
6085f853
NC		 63 PR gas/16026
64 * config/tc-mn10200.c (md_convert_frag): Add missing break
65 statement.
66
cecf1424
JB		 672013-10-08 Jan Beulich <jbeulich@suse.com>
68
69 * tc-i386.c (check_word_reg): Remove misplaced "else".
70 (check_long_reg): Restore symmetry with check_word_reg.
71
d3bfe16e
JB		 722013-10-08 Jan Beulich <jbeulich@suse.com>
73
74 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
75 LR/PC check.
76
38d77545
NC		 772013-10-08 Nick Clifton <nickc@redhat.com>
78
79 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
80 for "<foo>a". Issue error messages for unrecognised or corrrupt
81 size extensions.
82
fe8b4cc3
KT		 832013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
84
85 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
86 possible.
87
c7b0bd56
SE		 882013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
89
90 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
91 * doc/c-i386.texi: Add -march=bdver4 option.
92
cc9afea3
AM		 932013-09-20 Alan Modra <amodra@gmail.com>
94
95 * configure: Regenerate.
96
58ca03a2
TG		 972013-09-18 Tristan Gingold <gingold@adacore.com>
98
99 * NEWS: Add marker for 2.24.
100
ab905915
NC		 1012013-09-18 Nick Clifton <nickc@redhat.com>
102
103 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
104 (move_data): New variable.
105 (md_parse_option): Parse -md.
106 (msp430_section): New function. Catch references to the .bss or
107 .data sections and generate a special symbol for use by the libcrt
108 library.
109 (md_pseudo_table): Intercept .section directives.
110 (md_longopt): Add -md
111 (md_show_usage): Likewise.
112 (msp430_operands): Generate a warning message if a NOP is inserted
113 into the instruction stream.
114 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
115
f1c38003
SE		 1162013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
117
118 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 119 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 120
1d50d57c
WN		 1212013-09-16 Will Newton <will.newton@linaro.org>
122
123 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
124 disallowing element size 64 with interleave other than 1.
125
173d3447
CF		 1262013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
127
128 * config/tc-mips.c (match_insn): Set error when $31 is used for
129 bltzal* and bgezal*.
130
ac21e7da
TG		 1312013-09-04 Tristan Gingold <gingold@adacore.com>
132
133 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
134 symbols.
135
74db7efb
NC		 1362013-09-04 Roland McGrath <mcgrathr@google.com>
137
138 PR gas/15914
139 * config/tc-arm.c (T16_32_TAB): Add _udf.
140 (do_t_udf): New function.
141 (insns): Add "udf".
142
664a88c6
DD		 1432013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
144
145 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
146 assembler errors at correct position.
147
9aff4b7a
NC		 1482013-08-23 Yuri Chornoivan <yurchor@ukr.net>
149
150 PR binutils/15834
151 * config/tc-ia64.c: Fix typos.
152 * config/tc-sparc.c: Likewise.
153 * config/tc-z80.c: Likewise.
154 * doc/c-i386.texi: Likewise.
155 * doc/c-m32r.texi: Likewise.
156
4f2374c7
WN		 1572013-08-23 Will Newton <will.newton@linaro.org>
158
9aff4b7a 159 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 160 for pre-indexed addressing modes.
161
b4e6cb80
AM		 1622013-08-21 Alan Modra <amodra@gmail.com>
163
164 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
165 range check label number for use with fb_low_counter array.
166
1661c76c
RS		 1672013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
168
169 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
170 (mips_parse_argument_token, validate_micromips_insn, md_begin)
171 (check_regno, match_float_constant, check_completed_insn, append_insn)
172 (match_insn, match_mips16_insn, match_insns, macro_start)
173 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
174 (mips16_ip, mips_set_option_string, md_parse_option)
175 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
176 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
177 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
178 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
179 Start error messages with a lower-case letter. Do not end error
180 messages with a period. Wrap long messages to 80 character-lines.
181 Use "cannot" instead of "can't" and "can not".
182
b0e6f033
RS		 1832013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
184
185 * config/tc-mips.c (imm_expr): Expand comment.
186 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
187 when populated.
188
e423441d
RS		 1892013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
190
191 * config/tc-mips.c (imm2_expr): Delete.
192 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
193
5e0dc5ba
RS		 1942013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
195
196 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
197 (macro): Remove M_DEXT and M_DINS handling.
198
60f20e8b
RS		 1992013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
200
201 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
202 lax_max with lax_match.
203 (match_int_operand): Update accordingly. Don't report an error
204 for !lax_match-only cases.
205 (match_insn): Replace more_alts with lax_match and use it to
206 initialize the mips_arg_info field. Add a complete_p parameter.
207 Handle implicit VU0 suffixes here.
208 (match_invalid_for_isa, match_insns, match_mips16_insns): New
209 functions.
210 (mips_ip, mips16_ip): Use them.
211
d436c1c2
RS		 2122013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
213
214 * config/tc-mips.c (match_expression): Report uses of registers here.
215 Add a "must be an immediate expression" error. Handle elided offsets
216 here rather than...
217 (match_int_operand): ...here.
218
1a00e612
RS		 2192013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
220
221 * config/tc-mips.c (mips_arg_info): Remove soft_match.
222 (match_out_of_range, match_not_constant): New functions.
223 (match_const_int): Remove fallback parameter and check for soft_match.
224 Use match_not_constant.
225 (match_mapped_int_operand, match_addiusp_operand)
226 (match_perf_reg_operand, match_save_restore_list_operand)
227 (match_mdmx_imm_reg_operand): Update accordingly. Use
228 match_out_of_range and set_insn_error* instead of as_bad.
229 (match_int_operand): Likewise. Use match_not_constant in the
230 !allows_nonconst case.
231 (match_float_constant): Report invalid float constants.
232 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
233 match_float_constant to check for invalid constants. Fail the
234 match if match_const_int or match_float_constant return false.
235 (mips_ip): Update accordingly.
236 (mips16_ip): Likewise. Undo null termination of instruction name
237 once lookup is complete.
238
e3de51ce
RS		 2392013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
240
241 * config/tc-mips.c (mips_insn_error_format): New enum.
242 (mips_insn_error): New struct.
243 (insn_error): Change to a mips_insn_error.
244 (clear_insn_error, set_insn_error_format, set_insn_error)
245 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
246 functions.
247 (mips_parse_argument_token, md_assemble, match_insn)
248 (match_mips16_insn): Use them instead of manipulating insn_error
249 directly.
250 (mips_ip, mips16_ip): Likewise. Simplify control flow.
251
97d87491
RS		 2522013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
253
254 * config/tc-mips.c (normalize_constant_expr): Move further up file.
255 (normalize_address_expr): Likewise.
256 (match_insn, match_mips16_insn): New functions, split out from...
257 (mips_ip, mips16_ip): ...here.
258
0f35dbc4
RS		 2592013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
260
261 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
262 OP_OPTIONAL_REG.
263 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
264 for optional operands.
265
27285eed
AM		 2662013-08-16 Alan Modra <amodra@gmail.com>
267
268 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
269 modifiers generally.
270
cbe02d4f
AM		 2712013-08-16 Alan Modra <amodra@gmail.com>
272
273 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
274
3c02c47f
DE		 2752013-08-14 David Edelsohn <dje.gcc@gmail.com>
276
277 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
278 argument as alignment.
279
4046d87a
NC		 2802013-08-09 Nick Clifton <nickc@redhat.com>
281
282 * config/tc-rl78.c (elf_flags): New variable.
283 (enum options): Add OPTION_G10.
284 (md_longopts): Add mg10.
285 (md_parse_option): Parse -mg10.
286 (rl78_elf_final_processing): New function.
287 * config/tc-rl78.c (tc_final_processing): Define.
288 * doc/c-rl78.texi: Document -mg10 option.
289
ee5734f0
RS		 2902013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
291
292 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
293 suffixes to be elided too.
294 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
295 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
296 to be omitted too.
297
13896403
RS		 2982013-08-05 John Tytgat <john@bass-software.com>
299
300 * po/POTFILES.in: Regenerate.
301
d6787ef9
EB		 3022013-08-05 Eric Botcazou <ebotcazou@adacore.com>
303 Konrad Eisele <konrad@gaisler.com>
304
305 * config/tc-sparc.c (sparc_arch_types): Add leon.
306 (sparc_arch): Move sparc4 around and add leon.
307 (sparc_target_format): Document -Aleon.
308 * doc/c-sparc.texi: Likewise.
309
da8bca91
RS		 3102013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
311
312 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
313
14daeee3
RS		 3142013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
315 Richard Sandiford <rdsandiford@googlemail.com>
316
317 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
318 (RWARN): Bump to 0x8000000.
319 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
320 (RTYPE_R5900_ACC): New register types.
321 (RTYPE_MASK): Include them.
322 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
323 macros.
324 (reg_names): Include them.
325 (mips_parse_register_1): New function, split out from...
326 (mips_parse_register): ...here. Add a channels_ptr parameter.
327 Look for VU0 channel suffixes when nonnull.
328 (reg_lookup): Update the call to mips_parse_register.
329 (mips_parse_vu0_channels): New function.
330 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
331 (mips_operand_token): Add a "channels" field to the union.
332 Extend the comment above "ch" to OT_DOUBLE_CHAR.
333 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
334 (mips_parse_argument_token): Handle channel suffixes here too.
335 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
336 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
337 Handle '#' formats.
338 (md_begin): Register $vfN and $vfI registers.
339 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
340 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
341 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
342 (match_vu0_suffix_operand): New function.
343 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
344 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
345 (mips_lookup_insn): New function.
346 (mips_ip): Use it. Allow "+K" operands to be elided at the end
347 of an instruction. Handle '#' sequences.
348
c0ebe874
RS		 3492013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
350
351 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
352 values and use it instead of sreg, treg, xreg, etc.
353
3ccad066
RS		 3542013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
355
356 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
357 and mips_int_operand_max.
358 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
359 Delete.
360 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
361 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
362 instead of mips16_immed_operand.
363
0acfaea6
RS		 3642013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
365
366 * config/tc-mips.c (mips16_macro): Don't use move_register.
367 (mips16_ip): Allow macros to use 'p'.
368
fc76e730
RS		 3692013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
370
371 * config/tc-mips.c (MAX_OPERANDS): New macro.
372 (mips_operand_array): New structure.
373 (mips_operands, mips16_operands, micromips_operands): New arrays.
374 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
375 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
376 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
377 (micromips_to_32_reg_q_map): Delete.
378 (insn_operands, insn_opno, insn_extract_operand): New functions.
379 (validate_mips_insn): Take a mips_operand_array as argument and
380 use it to build up a list of operands. Extend to handle INSN_MACRO
381 and MIPS16.
382 (validate_mips16_insn): New function.
383 (validate_micromips_insn): Take a mips_operand_array as argument.
384 Handle INSN_MACRO.
385 (md_begin): Initialize mips_operands, mips16_operands and
386 micromips_operands. Call validate_mips_insn and
387 validate_micromips_insn for macro instructions too.
388 Call validate_mips16_insn for MIPS16 instructions.
389 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
390 New functions.
391 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
392 them. Handle INSN_UDI.
393 (get_append_method): Use gpr_read_mask.
394
26545944
RS		 3952013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
396
397 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
398 flags for MIPS16 and non-MIPS16 instructions.
399 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
400 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
401 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
402 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
403 and non-MIPS16 instructions. Fix formatting.
404
85fcb30f
RS		 4052013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
406
407 * config/tc-mips.c (reg_needs_delay): Move later in file.
408 Use gpr_write_mask.
409 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
410
43234a1e
L		 4112013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
412 Alexander Ivchenko <alexander.ivchenko@intel.com>
413 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
414 Sergey Lega <sergey.s.lega@intel.com>
415 Anna Tikhonova <anna.tikhonova@intel.com>
416 Ilya Tocar <ilya.tocar@intel.com>
417 Andrey Turetskiy <andrey.turetskiy@intel.com>
418 Ilya Verbin <ilya.verbin@intel.com>
419 Kirill Yukhin <kirill.yukhin@intel.com>
420 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
421
422 * config/tc-i386-intel.c (O_zmmword_ptr): New.
423 (i386_types): Add zmmword.
424 (i386_intel_simplify_register): Allow regzmm.
425 (i386_intel_simplify): Handle zmmwords.
426 (i386_intel_operand): Handle RC/SAE, vector operations and
427 zmmwords.
428 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
429 (struct RC_Operation): New.
430 (struct Mask_Operation): New.
431 (struct Broadcast_Operation): New.
432 (vex_prefix): Size of bytes increased to 4 to support EVEX
433 encoding.
434 (enum i386_error): Add new error codes: unsupported_broadcast,
435 broadcast_not_on_src_operand, broadcast_needed,
436 unsupported_masking, mask_not_on_destination, no_default_mask,
437 unsupported_rc_sae, rc_sae_operand_not_last_imm,
438 invalid_register_operand, try_vector_disp8.
439 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
440 rounding, broadcast, memshift.
441 (struct RC_name): New.
442 (RC_NamesTable): New.
443 (evexlig): New.
444 (evexwig): New.
445 (extra_symbol_chars): Add '{'.
446 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
447 (i386_operand_type): Add regzmm, regmask and vec_disp8.
448 (match_mem_size): Handle zmmwords.
449 (operand_type_match): Handle zmm-registers.
450 (mode_from_disp_size): Handle vec_disp8.
451 (fits_in_vec_disp8): New.
452 (md_begin): Handle {} properly.
453 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
454 (build_vex_prefix): Handle vrex.
455 (build_evex_prefix): New.
456 (process_immext): Adjust to properly handle EVEX.
457 (md_assemble): Add EVEX encoding support.
458 (swap_2_operands): Correctly handle operands with masking,
459 broadcasting or RC/SAE.
460 (check_VecOperands): Support EVEX features.
461 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
462 (match_template): Support regzmm and handle new error codes.
463 (process_suffix): Handle zmmwords and zmm-registers.
464 (check_byte_reg): Extend to zmm-registers.
465 (process_operands): Extend to zmm-registers.
466 (build_modrm_byte): Handle EVEX.
467 (output_insn): Adjust to properly handle EVEX case.
468 (disp_size): Handle vec_disp8.
469 (output_disp): Support compressed disp8*N evex feature.
470 (output_imm): Handle RC/SAE immediates properly.
471 (check_VecOperations): New.
472 (i386_immediate): Handle EVEX features.
473 (i386_index_check): Handle zmmwords and zmm-registers.
474 (RC_SAE_immediate): New.
475 (i386_att_operand): Handle EVEX features.
476 (parse_real_register): Add a check for ZMM/Mask registers.
477 (OPTION_MEVEXLIG): New.
478 (OPTION_MEVEXWIG): New.
479 (md_longopts): Add mevexlig and mevexwig.
480 (md_parse_option): Handle mevexlig and mevexwig options.
481 (md_show_usage): Add description for mevexlig and mevexwig.
482 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
483 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
484
a0046408
L		 4852013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
486
487 * config/tc-i386.c (cpu_arch): Add .sha.
488 * doc/c-i386.texi: Document sha/.sha.
489
7e8b059b
L		 4902013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
491 Kirill Yukhin <kirill.yukhin@intel.com>
492 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
493
494 * config/tc-i386.c (BND_PREFIX): New.
495 (struct _i386_insn): Add new field bnd_prefix.
496 (add_bnd_prefix): New.
497 (cpu_arch): Add MPX.
498 (i386_operand_type): Add regbnd.
499 (md_assemble): Handle BND prefixes.
500 (parse_insn): Likewise.
501 (output_branch): Likewise.
502 (output_jump): Likewise.
503 (build_modrm_byte): Handle regbnd.
504 (OPTION_MADD_BND_PREFIX): New.
505 (md_longopts): Add entry for 'madd-bnd-prefix'.
506 (md_parse_option): Handle madd-bnd-prefix option.
507 (md_show_usage): Add description for madd-bnd-prefix
508 option.
509 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
510
7fa9fcb6
TG		 5112013-07-24 Tristan Gingold <gingold@adacore.com>
512
513 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
514 xcoff targets.
515
614eb277
AK		 5162013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
517
518 * config/tc-s390.c (s390_machine): Don't force the .machine
519 argument to lower case.
520
e673710a
KT		 5212013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
522
523 * config/tc-arm.c (s_arm_arch_extension): Improve error message
524 for invalid extension.
525
69091a2c
YZ		 5262013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
527
528 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
529 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
530 (aarch64_abi): New variable.
531 (ilp32_p): Change to be a macro.
532 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
533 (struct aarch64_option_abi_value_table): New struct.
534 (aarch64_abis): New table.
535 (aarch64_parse_abi): New function.
536 (aarch64_long_opts): Add entry for -mabi=.
537 * doc/as.texinfo (Target AArch64 options): Document -mabi.
538 * doc/c-aarch64.texi: Likewise.
539
faf786e6
NC		 5402013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
541
542 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
543 unsigned comparison.
544
f0c00282
NC		 5452013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
546
cbe02d4f 547 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 548 RX610.
cbe02d4f 549 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 550 check floating point operation support for target RX100 and
551 RX200.
cbe02d4f
AM		 552 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
553 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
554 RX200, RX600, and RX610
f0c00282 555
8c997c27
NC		 5562013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
557
558 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
559
8be59acb
NC		 5602013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
561
562 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
563 * doc/c-avr.texi: Likewise.
564
4a06e5a2
RS		 5652013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
568 error with older GCCs.
569 (mips16_macro_build): Dereference args.
570
a92713e6
RS		 5712013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
572
573 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
574 New functions, split out from...
575 (reg_lookup): ...here. Remove itbl support.
576 (reglist_lookup): Delete.
577 (mips_operand_token_type): New enum.
578 (mips_operand_token): New structure.
579 (mips_operand_tokens): New variable.
580 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
581 (mips_parse_arguments): New functions.
582 (md_begin): Initialize mips_operand_tokens.
583 (mips_arg_info): Add a token field. Remove optional_reg field.
584 (match_char, match_expression): New functions.
585 (match_const_int): Use match_expression. Remove "s" argument
586 and return a boolean result. Remove O_register handling.
587 (match_regno, match_reg, match_reg_range): New functions.
588 (match_int_operand, match_mapped_int_operand, match_msb_operand)
589 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
590 (match_addiusp_operand, match_clo_clz_dest_operand)
591 (match_lwm_swm_list_operand, match_entry_exit_operand)
592 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
593 (match_tied_reg_operand): Remove "s" argument and return a boolean
594 result. Match tokens rather than text. Update calls to
595 match_const_int. Rely on match_regno to call check_regno.
596 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
597 "arg" argument. Return a boolean result.
598 (parse_float_constant): Replace with...
599 (match_float_constant): ...this new function.
600 (match_operand): Remove "s" argument and return a boolean result.
601 Update calls to subfunctions.
602 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
603 rather than string-parsing routines. Update handling of optional
604 registers for token scheme.
605
89565f1b
RS		 6062013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
607
608 * config/tc-mips.c (parse_float_constant): Split out from...
609 (mips_ip): ...here.
610
3c14a432
RS		 6112013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
612
613 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
614 Delete.
615
364215c8
RS		 6162013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
617
618 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
619 (match_entry_exit_operand): New function.
620 (match_save_restore_list_operand): Likewise.
621 (match_operand): Use them.
622 (check_absolute_expr): Delete.
623 (mips16_ip): Rewrite main parsing loop to use mips_operands.
624
9e12b7a2
RS		 6252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
626
627 * config/tc-mips.c: Enable functions commented out in previous patch.
628 (SKIP_SPACE_TABS): Move further up file.
629 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
630 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
631 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
632 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
633 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
634 (micromips_imm_b_map, micromips_imm_c_map): Delete.
635 (mips_lookup_reg_pair): Delete.
636 (macro): Use report_bad_range and report_bad_field.
637 (mips_immed, expr_const_in_range): Delete.
638 (mips_ip): Rewrite main parsing loop to use new functions.
639
a1d78564
RS		 6402013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
641
642 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
643 Change return type to bfd_boolean.
644 (report_bad_range, report_bad_field): New functions.
645 (mips_arg_info): New structure.
646 (match_const_int, convert_reg_type, check_regno, match_int_operand)
647 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
648 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
649 (match_addiusp_operand, match_clo_clz_dest_operand)
650 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
651 (match_pc_operand, match_tied_reg_operand, match_operand)
652 (check_completed_insn): New functions, commented out for now.
653
e077a1c8
RS		 6542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
655
656 * config/tc-mips.c (insn_insert_operand): New function.
657 (macro_build, mips16_macro_build): Put null character check
658 in the for loop and convert continues to breaks. Use operand
659 structures to handle constant operands.
660
ab902481
RS		 6612013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
662
663 * config/tc-mips.c (validate_mips_insn): Move further up file.
664 Add insn_bits and decode_operand arguments. Use the mips_operand
665 fields to work out which bits an operand occupies. Detect double
666 definitions.
667 (validate_micromips_insn): Move further up file. Call into
668 validate_mips_insn.
669
2f8b73cc
RS		 6702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
671
672 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
673
c8276761
RS		 6742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
675
676 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
677 and "~".
678 (macro): Update accordingly.
679
77bd4346
RS		 6802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
683 (imm_reloc): Delete.
684 (md_assemble): Remove imm_reloc handling.
685 (mips_ip): Update commentary. Use offset_expr and offset_reloc
686 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
687 Use a temporary array rather than imm_reloc when parsing
688 constant expressions. Remove imm_reloc initialization.
689 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
690 for the relaxable field. Use a relax_char variable to track the
691 type of this field. Remove imm_reloc initialization.
692
cc537e56
RS		 6932013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
694
695 * config/tc-mips.c (mips16_ip): Handle "I".
696
ba92f887
MR		 6972013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
698
699 * config/tc-mips.c (mips_flag_nan2008): New variable.
700 (options): Add OPTION_NAN enum value.
701 (md_longopts): Handle it.
702 (md_parse_option): Likewise.
703 (s_nan): New function.
704 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
705 (md_show_usage): Add -mnan.
706
707 * doc/as.texinfo (Overview): Add -mnan.
708 * doc/c-mips.texi (MIPS Opts): Document -mnan.
709 (MIPS NaN Encodings): New node. Document .nan directive.
710 (MIPS-Dependent): List the new node.
711
c1094734
TG		 7122013-07-09 Tristan Gingold <gingold@adacore.com>
713
714 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
715
0cbbe1b8
RS		 7162013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
717
718 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
719 for 'A' and assume that the constant has been elided if the result
720 is an O_register.
721
f2ae14a1
RS		 7222013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
723
724 * config/tc-mips.c (gprel16_reloc_p): New function.
725 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
726 BFD_RELOC_UNUSED.
727 (offset_high_part, small_offset_p): New functions.
728 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
729 register load and store macros, handle the 16-bit offset case first.
730 If a 16-bit offset is not suitable for the instruction we're
731 generating, load it into the temporary register using
732 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
733 M_L_DAB code once the address has been constructed. For double load
734 and store macros, again handle the 16-bit offset case first.
735 If the second register cannot be accessed from the same high
736 part as the first, load it into AT using ADDRESS_ADDI_INSN.
737 Fix the handling of LD in cases where the first register is the
738 same as the base. Also handle the case where the offset is
739 not 16 bits and the second register cannot be accessed from the
740 same high part as the first. For unaligned loads and stores,
741 fuse the offbits == 12 and old "ab" handling. Apply this handling
742 whenever the second offset needs a different high part from the first.
743 Construct the offset using ADDRESS_ADDI_INSN where possible,
744 for offbits == 16 as well as offbits == 12. Use offset_reloc
745 when constructing the individual loads and stores.
746 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
747 and offset_reloc before matching against a particular opcode.
748 Handle elided 'A' constants. Allow 'A' constants to use
749 relocation operators.
750
5c324c16
RS		 7512013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
752
753 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
754 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
755 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
756
23e69e47
RS		 7572013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
758
759 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
760 Require the msb to be <= 31 for "+s". Check that the size is <= 31
761 for both "+s" and "+S".
762
27c5c572
RS		 7632013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
764
765 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
766 (mips_ip, mips16_ip): Handle "+i".
767
e76ff5ab
RS		 7682013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
769
770 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
771 (micromips_to_32_reg_h_map): Rename to...
772 (micromips_to_32_reg_h_map1): ...this.
773 (micromips_to_32_reg_i_map): Rename to...
774 (micromips_to_32_reg_h_map2): ...this.
775 (mips_lookup_reg_pair): New function.
776 (gpr_write_mask, macro): Adjust after above renaming.
777 (validate_micromips_insn): Remove "mi" handling.
778 (mips_ip): Likewise. Parse both registers in a pair for "mh".
779
fa7616a4
RS		 7802013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
783 (mips_ip): Remove "+D" and "+T" handling.
784
fb798c50
AK		 7852013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
786
787 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
788 relocs.
789
2c0a3565
MS		 7902013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
791
4aa2c5e2
MS		 792 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
793
7942013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
795
2c0a3565
MS		 796 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
797 (aarch64_force_relocation): Likewise.
798
f40da81b
AM		 7992013-07-02 Alan Modra <amodra@gmail.com>
800
801 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
802
81566a9b
MR		 8032013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
804
805 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
806 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
807 Replace @sc{mips16} with literal `MIPS16'.
808 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
809
a6bb11b2
YZ		 8102013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
811
812 * config/tc-aarch64.c (reloc_table): Replace
813 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
814 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
815 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
816 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
817 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
818 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
819 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
820 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
821 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
822 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
823 (aarch64_force_relocation): Likewise.
824
cec5225b
YZ		 8252013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
826
827 * config/tc-aarch64.c (ilp32_p): New static variable.
828 (elf64_aarch64_target_format): Return the target according to the
829 value of 'ilp32_p'.
830 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
831 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
832 (aarch64_dwarf2_addr_size): New function.
833 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
834 (DWARF2_ADDR_SIZE): New define.
835
e335d9cb
RS		 8362013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
837
838 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
839
18870af7
RS		 8402013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
841
842 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
843
833794fc
MR		 8442013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
845
846 * config/tc-mips.c (mips_set_options): Add insn32 member.
847 (mips_opts): Initialize it.
848 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
849 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
850 (md_longopts): Add "minsn32" and "mno-insn32" options.
851 (is_size_valid): Handle insn32 mode.
852 (md_assemble): Pass instruction string down to macro.
853 (brk_fmt): Add second dimension and insn32 mode initializers.
854 (mfhl_fmt): Likewise.
855 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
856 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
857 (macro_build_jalr, move_register): Handle insn32 mode.
858 (macro_build_branch_rs): Likewise.
859 (macro): Handle insn32 mode.
860 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
861 (mips_ip): Handle insn32 mode.
862 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
863 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
864 (mips_handle_align): Handle insn32 mode.
865 (md_show_usage): Add -minsn32 and -mno-insn32.
866
867 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
868 -mno-insn32 options.
869 (-minsn32, -mno-insn32): New options.
870 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
871 options.
872 (MIPS assembly options): New node. Document .set insn32 and
873 .set noinsn32.
874 (MIPS-Dependent): List the new node.
875
d1706f38
NC		 8762013-06-25 Nick Clifton <nickc@redhat.com>
877
878 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
879 the PC in indirect addressing on 430xv2 parts.
880 (msp430_operands): Add version test to hardware bug encoding
881 restrictions.
882
477330fc
RM		 8832013-06-24 Roland McGrath <mcgrathr@google.com>
884
d996d970
RM		 885 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
886 so it skips whitespace before it.
887 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
888
477330fc
RM		 889 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
890 (arm_reg_parse_multi): Skip whitespace first.
891 (parse_reg_list): Likewise.
892 (parse_vfp_reg_list): Likewise.
893 (s_arm_unwind_save_mmxwcg): Likewise.
894
24382199
NC		 8952013-06-24 Nick Clifton <nickc@redhat.com>
896
897 PR gas/15623
898 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
899
c3678916
RS		 9002013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
901
902 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
903
42429eac
RS		 9042013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
905
906 * config/tc-mips.c: Assert that offsetT and valueT are at least
907 8 bytes in size.
908 (GPR_SMIN, GPR_SMAX): New macros.
909 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
910
f3ded42a
RS		 9112013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
914 conditions. Remove any code deselected by them.
915 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
916
e8044f35
RS		 9172013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
918
919 * NEWS: Note removal of ECOFF support.
920 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
921 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
922 (MULTI_CFILES): Remove config/e-mipsecoff.c.
923 * Makefile.in: Regenerate.
924 * configure.in: Remove MIPS ECOFF references.
925 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
926 Delete cases.
927 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
928 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
929 (mips-*-*): ...this single case.
930 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
931 MIPS emulations to be e-mipself*.
932 * configure: Regenerate.
933 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
934 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
935 (mips-*-sysv*): Remove coff and ecoff cases.
936 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
937 * ecoff.c: Remove reference to MIPS ECOFF.
938 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
939 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
940 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
941 (mips_hi_fixup): Tweak comment.
942 (append_insn): Require a howto.
943 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
944
98508b2a
RS		 9452013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
946
947 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
948 Use "CPU" instead of "cpu".
949 * doc/c-mips.texi: Likewise.
950 (MIPS Opts): Rename to MIPS Options.
951 (MIPS option stack): Rename to MIPS Option Stack.
952 (MIPS ASE instruction generation overrides): Rename to
953 MIPS ASE Instruction Generation Overrides (for now).
954 (MIPS floating-point): Rename to MIPS Floating-Point.
955
fc16f8cc
RS		 9562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
957
958 * doc/c-mips.texi (MIPS Macros): New section.
959 (MIPS Object): Replace with...
960 (MIPS Small Data): ...this new section.
961
5a7560b5
RS		 9622013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
963
964 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
965 Capitalize name. Use @kindex instead of @cindex for .set entries.
966
a1b86ab7
RS		 9672013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
968
969 * doc/c-mips.texi (MIPS Stabs): Remove section.
970
c6278170
RS		 9712013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
972
973 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
974 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
975 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
976 (ISA_SUPPORTS_VIRT64_ASE): Delete.
977 (mips_ase): New structure.
978 (mips_ases): New table.
979 (FP64_ASES): New macro.
980 (mips_ase_groups): New array.
981 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
982 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
983 functions.
984 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
985 (md_parse_option): Use mips_ases and mips_set_ase instead of
986 separate case statements for each ASE option.
987 (mips_after_parse_args): Use FP64_ASES. Use
988 mips_check_isa_supports_ases to check the ASEs against
989 other options.
990 (s_mipsset): Use mips_ases and mips_set_ase instead of
991 separate if statements for each ASE option. Use
992 mips_check_isa_supports_ases, even when a non-ASE option
993 is specified.
994
63a4bc21
KT		 9952013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
996
997 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
998
c31f3936
RS		 9992013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1000
1001 * config/tc-mips.c (md_shortopts, options, md_longopts)
1002 (md_longopts_size): Move earlier in file.
1003
846ef2d0
RS		 10042013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1005
1006 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1007 with a single "ase" bitmask.
1008 (mips_opts): Update accordingly.
1009 (file_ase, file_ase_explicit): New variables.
1010 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1011 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1012 (ISA_HAS_ROR): Adjust for mips_set_options change.
1013 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1014 (mips_ip): Adjust for mips_set_options change.
1015 (md_parse_option): Likewise. Update file_ase_explicit.
1016 (mips_after_parse_args): Adjust for mips_set_options change.
1017 Use bitmask operations to select the default ASEs. Set file_ase
1018 rather than individual per-ASE variables.
1019 (s_mipsset): Adjust for mips_set_options change.
1020 (mips_elf_final_processing): Test file_ase rather than
1021 file_ase_mdmx. Remove commented-out code.
1022
d16afab6
RS		 10232013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1024
1025 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1026 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1027 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1028 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1029 (mips_after_parse_args): Use the new "ase" field to choose
1030 the default ASEs.
1031 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1032 "ase" field.
1033
e83a675f
RE		 10342013-06-18 Richard Earnshaw <rearnsha@arm.com>
1035
1036 * config/tc-arm.c (symbol_preemptible): New function.
1037 (relax_branch): Use it.
1038
7f3c4072
CM		 10392013-06-17 Catherine Moore <clm@codesourcery.com>
1040 Maciej W. Rozycki <macro@codesourcery.com>
1041 Chao-Ying Fu <fu@mips.com>
1042
1043 * config/tc-mips.c (mips_set_options): Add ase_eva.
1044 (mips_set_options mips_opts): Add ase_eva.
1045 (file_ase_eva): Declare.
1046 (ISA_SUPPORTS_EVA_ASE): Define.
1047 (IS_SEXT_9BIT_NUM): Define.
1048 (MIPS_CPU_ASE_EVA): Define.
1049 (is_opcode_valid): Add support for ase_eva.
1050 (macro_build): Likewise.
1051 (macro): Likewise.
1052 (validate_mips_insn): Likewise.
1053 (validate_micromips_insn): Likewise.
1054 (mips_ip): Likewise.
1055 (options): Add OPTION_EVA and OPTION_NO_EVA.
1056 (md_longopts): Add -meva and -mno-eva.
1057 (md_parse_option): Process new options.
1058 (mips_after_parse_args): Check for valid EVA combinations.
1059 (s_mipsset): Likewise.
1060
e410add4
RS		 10612013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1062
1063 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1064 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1065 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1066 (dwarf2_gen_line_info_1): Update call accordingly.
1067 (dwarf2_move_insn): New function.
1068 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1069
6a50d470
RS		 10702013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1071
1072 Revert:
1073
1074 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1075
1076 PR gas/13024
1077 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1078 (dwarf2_gen_line_info_1): Delete.
1079 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1080 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1081 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1082 (dwarf2_directive_loc): Push previous .locs instead of generating
1083 them immediately.
1084
f122319e
CF		 10852013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1086
1087 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1088 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1089
909c7f9c
NC		 10902013-06-13 Nick Clifton <nickc@redhat.com>
1091
1092 PR gas/15602
1093 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1094 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1095 function. Generates an error if the adjusted offset is out of a
1096 16-bit range.
1097
5d5755a7
SL		 10982013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1099
1100 * config/tc-nios2.c (md_apply_fix): Mask constant
1101 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1102
3bf0dbfb
MR		 11032013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1104
1105 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1106 MIPS-3D instructions either.
1107 (md_convert_frag): Update the COPx branch mask accordingly.
1108
1109 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1110 option.
1111 * doc/as.texinfo (Overview): Add --relax-branch and
1112 --no-relax-branch.
1113 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1114 --no-relax-branch.
1115
9daf7bab
SL		 11162013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1117
1118 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1119 omitted.
1120
d301a56b
RS		 11212013-06-08 Catherine Moore <clm@codesourcery.com>
1122
1123 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1124 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1125 (append_insn): Change INSN_xxxx to ASE_xxxx.
1126
7bab7634
DC		 11272013-06-01 George Thomas <george.thomas@atmel.com>
1128
cbe02d4f 1129 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1130 AVR_ISA_XMEGAU
1131
f60cf82f
L		 11322013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1133
1134 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1135 for ELF.
1136
a3f278e2
CM		 11372013-05-31 Paul Brook <paul@codesourcery.com>
1138
a3f278e2
CM		 1139 * config/tc-mips.c (s_ehword): New.
1140
067ec077
CM		 11412013-05-30 Paul Brook <paul@codesourcery.com>
1142
1143 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1144
d6101ac2
MR		 11452013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1146
1147 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1148 convert relocs who have no relocatable field either. Rephrase
1149 the conditional so that the PC-relative check is only applied
1150 for REL targets.
1151
f19ccbda
MR		 11522013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1153
1154 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1155 calculation.
1156
418009c2
YZ		 11572013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1158
1159 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1160 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1161 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1162 (md_apply_fix): Likewise.
1163 (aarch64_force_relocation): Likewise.
1164
0a8897c7
KT		 11652013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1166
1167 * config/tc-arm.c (it_fsm_post_encode): Improve
1168 warning messages about deprecated IT block formats.
1169
89d2a2a3
MS		 11702013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1171
1172 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1173 inside fx_done condition.
1174
c77c0862
RS		 11752013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1176
1177 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1178
c0637f3a
PB		 11792013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1180
1181 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1182 and clean up warning when using PRINT_OPCODE_TABLE.
1183
5656a981
AM		 11842013-05-20 Alan Modra <amodra@gmail.com>
1185
1186 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1187 and data fixups performing shift/high adjust/sign extension on
1188 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1189 when writing data fixups rather than recalculating size.
1190
997b26e8
JBG		 11912013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1192
1193 * doc/c-msp430.texi: Fix typo.
1194
9f6e76f4
TG		 11952013-05-16 Tristan Gingold <gingold@adacore.com>
1196
1197 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1198 are also TOC symbols.
1199
638d3803
NC		 12002013-05-16 Nick Clifton <nickc@redhat.com>
1201
1202 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1203 Add -mcpu command to specify core type.
997b26e8 1204 * doc/c-msp430.texi: Update documentation.
638d3803 1205
b015e599
AP		 12062013-05-09 Andrew Pinski <apinski@cavium.com>
1207
1208 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1209 (mips_opts): Update for the new field.
1210 (file_ase_virt): New variable.
1211 (ISA_SUPPORTS_VIRT_ASE): New macro.
1212 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1213 (MIPS_CPU_ASE_VIRT): New define.
1214 (is_opcode_valid): Handle ase_virt.
1215 (macro_build): Handle "+J".
1216 (validate_mips_insn): Likewise.
1217 (mips_ip): Likewise.
1218 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1219 (md_longopts): Add mvirt and mnovirt
1220 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1221 (mips_after_parse_args): Handle ase_virt field.
1222 (s_mipsset): Handle "virt" and "novirt".
1223 (mips_elf_final_processing): Add a comment about virt ASE might need
1224 a new flag.
1225 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1226 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1227 Document ".set virt" and ".set novirt".
1228
da8094d7
AM		 12292013-05-09 Alan Modra <amodra@gmail.com>
1230
1231 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1232 control of operand flag bits.
1233
c5f8c205
AM		 12342013-05-07 Alan Modra <amodra@gmail.com>
1235
1236 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1237 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1238 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1239 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1240 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1241 Shift and sign-extend fieldval for use by some VLE reloc
1242 operand->insert functions.
1243
b47468a6
CM		 12442013-05-06 Paul Brook <paul@codesourcery.com>
1245 Catherine Moore <clm@codesourcery.com>
1246
c5f8c205
AM		 1247 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1248 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1249 (md_apply_fix): Likewise.
1250 (tc_gen_reloc): Likewise.
1251
2de39019
CM		 12522013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1253
1254 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1255 (mips_fix_adjustable): Adjust pc-relative check to use
1256 limited_pc_reloc_p.
1257
754e2bb9
RS		 12582013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1259
1260 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1261 (s_mips_stab): Do not restrict to stabn only.
1262
13761a11
NC		 12632013-05-02 Nick Clifton <nickc@redhat.com>
1264
1265 * config/tc-msp430.c: Add support for the MSP430X architecture.
1266 Add code to insert a NOP instruction after any instruction that
1267 might change the interrupt state.
1268 Add support for the LARGE memory model.
1269 Add code to initialise the .MSP430.attributes section.
1270 * config/tc-msp430.h: Add support for the MSP430X architecture.
1271 * doc/c-msp430.texi: Document the new -mL and -mN command line
1272 options.
1273 * NEWS: Mention support for the MSP430X architecture.
1274
df26367c
MR		 12752013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1276
1277 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1278 alpha*-*-linux*ecoff*.
1279
f02d8318
CF		 12802013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1281
1282 * config/tc-mips.c (mips_ip): Add sizelo.
1283 For "+C", "+G", and "+H", set sizelo and compare against it.
1284
b40bf0a2
NC		 12852013-04-29 Nick Clifton <nickc@redhat.com>
1286
1287 * as.c (Options): Add -gdwarf-sections.
1288 (parse_args): Likewise.
1289 * as.h (flag_dwarf_sections): Declare.
1290 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1291 (process_entries): When -gdwarf-sections is enabled generate
1292 fragmentary .debug_line sections.
1293 (out_debug_line): Set the section for the .debug_line section end
1294 symbol.
1295 * doc/as.texinfo: Document -gdwarf-sections.
1296 * NEWS: Mention -gdwarf-sections.
1297
8eeccb77 12982013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1299
1300 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1301 according to the target parameter. Don't call s_segm since s_segm
1302 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1303 initialized yet.
1304 (md_begin): Call s_segm according to target parameter from command
1305 line.
1306
49926cd0
AM		 13072013-04-25 Alan Modra <amodra@gmail.com>
1308
1309 * configure.in: Allow little-endian linux.
1310 * configure: Regenerate.
1311
e3031850
SL		 13122013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1313
1314 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1315 "fstatus" control register to "eccinj".
1316
cb948fc0
KT		 13172013-04-19 Kai Tietz <ktietz@redhat.com>
1318
1319 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1320
4455e9ad
JB		 13212013-04-15 Julian Brown <julian@codesourcery.com>
1322
1323 * expr.c (add_to_result, subtract_from_result): Make global.
1324 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1325 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1326 subtract_from_result to handle extra bit of precision for .sleb128
1327 directive operands.
1328
956a6ba3
JB		 13292013-04-10 Julian Brown <julian@codesourcery.com>
1330
1331 * read.c (convert_to_bignum): Add sign parameter. Use it
1332 instead of X_unsigned to determine sign of resulting bignum.
1333 (emit_expr): Pass extra argument to convert_to_bignum.
1334 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1335 X_extrabit to convert_to_bignum.
1336 (parse_bitfield_cons): Set X_extrabit.
1337 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1338 Initialise X_extrabit field as appropriate.
1339 (add_to_result): New.
1340 (subtract_from_result): New.
1341 (expr): Use above.
1342 * expr.h (expressionS): Add X_extrabit field.
1343
eb9f3f00
JB		 13442013-04-10 Jan Beulich <jbeulich@suse.com>
1345
1346 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1347 register being PC when is_t or writeback, and use distinct
1348 diagnostic for the latter case.
1349
ccb84d65
JB		 13502013-04-10 Jan Beulich <jbeulich@suse.com>
1351
1352 * gas/config/tc-arm.c (parse_operands): Re-write
1353 po_barrier_or_imm().
1354 (do_barrier): Remove bogus constraint().
1355 (do_t_barrier): Remove.
1356
4d13caa0
NC		 13572013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1358
1359 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1360 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1361 ATmega2564RFR2
1362 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1363
16d02dc9
JB		 13642013-04-09 Jan Beulich <jbeulich@suse.com>
1365
1366 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1367 Use local variable Rt in more places.
1368 (do_vmsr): Accept all control registers.
1369
05ac0ffb
JB		 13702013-04-09 Jan Beulich <jbeulich@suse.com>
1371
1372 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1373 if there was none specified for moves between scalar and core
1374 register.
1375
2d51fb74
JB		 13762013-04-09 Jan Beulich <jbeulich@suse.com>
1377
1378 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1379 NEON_ALL_LANES case.
1380
94dcf8bf
JB		 13812013-04-08 Jan Beulich <jbeulich@suse.com>
1382
1383 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1384 PC-relative VSTR.
1385
1472d06f
JB		 13862013-04-08 Jan Beulich <jbeulich@suse.com>
1387
1388 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1389 entry to sp_fiq.
1390
0c76cae8
AM		 13912013-04-03 Alan Modra <amodra@gmail.com>
1392
1393 * doc/as.texinfo: Add support to generate man options for h8300.
1394 * doc/c-h8300.texi: Likewise.
1395
92eb40d9
RR		 13962013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1397
1398 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1399 Cortex-A57.
1400
51dcdd4d
NC		 14012013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1402
1403 PR binutils/15068
1404 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1405
c5d685bf
NC		 14062013-03-26 Nick Clifton <nickc@redhat.com>
1407
9b978282
NC		 1408 PR gas/15295
1409 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1410 start of the file each time.
1411
c5d685bf
NC		 1412 PR gas/15178
1413 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1414 FreeBSD targets.
1415
9699c833
TG		 14162013-03-26 Douglas B Rupp <rupp@gnat.com>
1417
1418 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1419 after fixup.
1420
4755303e
WN		 14212013-03-21 Will Newton <will.newton@linaro.org>
1422
1423 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1424 pc-relative str instructions in Thumb mode.
1425
81f5558e
NC		 14262013-03-21 Michael Schewe <michael.schewe@gmx.net>
1427
1428 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1429 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1430 R_H8_DISP32A16.
1431 * config/tc-h8300.h: Remove duplicated defines.
1432
71863e73
NC		 14332013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1434
1435 PR gas/15282
1436 * tc-avr.c (mcu_has_3_byte_pc): New function.
1437 (tc_cfi_frame_initial_instructions): Call it to find return
1438 address size.
1439
795b8e6b
NC		 14402013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1441
1442 PR gas/15095
1443 * config/tc-tic6x.c (tic6x_try_encode): Handle
1444 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1445 encode register pair numbers when required.
1446
ba86b375
WN		 14472013-03-15 Will Newton <will.newton@linaro.org>
1448
1449 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1450 in vstr in Thumb mode for pre-ARMv7 cores.
1451
9e6f3811
AS		 14522013-03-14 Andreas Schwab <schwab@suse.de>
1453
1454 * doc/c-arc.texi (ARC Directives): Revert last change and use
1455 @itemize instead of @table.
1456 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1457
b10bf8c5
NC		 14582013-03-14 Nick Clifton <nickc@redhat.com>
1459
1460 PR gas/15273
1461 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1462 NULL message, instead just check ARM_CPU_IS_ANY directly.
1463
ba724cfc
NC		 14642013-03-14 Nick Clifton <nickc@redhat.com>
1465
1466 PR gas/15212
9e6f3811 1467 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1468 for table format.
1469 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1470 to the @item directives.
1471 (ARM-Neon-Alignment): Move to correct place in the document.
1472 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1473 formatting.
1474 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1475 @smallexample.
1476
531a94fd
SL		 14772013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1478
1479 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1480 case. Add default BAD_CASE to switch.
1481
dad60f8e
SL		 14822013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1483
1484 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1485 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1486
dd5181d5
KT		 14872013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1488
1489 * config/tc-arm.c (crc_ext_armv8): New feature set.
1490 (UNPRED_REG): New macro.
1491 (do_crc32_1): New function.
1492 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1493 do_crc32ch, do_crc32cw): Likewise.
1494 (TUEc): New macro.
1495 (insns): Add entries for crc32 mnemonics.
1496 (arm_extensions): Add entry for crc.
1497
8e723a10
CLT		 14982013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1499
1500 * write.h (struct fix): Add fx_dot_frag field.
1501 (dot_frag): Declare.
1502 * write.c (dot_frag): New variable.
1503 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1504 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1505 * expr.c (expr): Save value of frag_now in dot_frag when setting
1506 dot_value.
1507 * read.c (emit_expr): Likewise. Delete comments.
1508
be05d201
L		 15092013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1510
1511 * config/tc-i386.c (flag_code_names): Removed.
1512 (i386_index_check): Rewrote.
1513
62b0d0d5
YZ		 15142013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1515
1516 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1517 add comment.
1518 (aarch64_double_precision_fmovable): New function.
1519 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1520 function; handle hexadecimal representation of IEEE754 encoding.
1521 (parse_operands): Update the call to parse_aarch64_imm_float.
1522
165de32a
L		 15232013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1524
1525 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1526 (check_hle): Updated.
1527 (md_assemble): Likewise.
1528 (parse_insn): Likewise.
1529
d5de92cf
L		 15302013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1531
1532 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1533 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1534 (parse_insn): Remove expecting_string_instruction. Set
1535 i.rep_prefix.
1536
e60bb1dd
YZ		 15372013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1538
1539 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1540
aeebdd9b
YZ		 15412013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1542
1543 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1544 for system registers.
1545
4107ae22
DD		 15462013-02-27 DJ Delorie <dj@redhat.com>
1547
1548 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1549 (rl78_op): Handle %code().
1550 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1551 (tc_gen_reloc): Likwise; convert to a computed reloc.
1552 (md_apply_fix): Likewise.
1553
151fa98f
NC		 15542013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1555
1556 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1557
70a8bc5b 15582013-02-25 Terry Guo <terry.guo@arm.com>
1559
1560 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1561 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1562 list of accepted CPUs.
1563
5c111e37
L		 15642013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1565
1566 PR gas/15159
1567 * config/tc-i386.c (cpu_arch): Add ".smap".
1568
1569 * doc/c-i386.texi: Document smap.
1570
8a75745d
MR		 15712013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1572
1573 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1574 mips_assembling_insn appropriately.
1575 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1576
79850f26
MR		 15772013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1578
cf29fc61 1579 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1580 extraneous braces.
1581
4c261dff
NC		 15822013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1583
5c111e37 1584 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1585
ea33f281
NC		 15862013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1587
1588 * configure.tgt: Add nios2-*-rtems*.
1589
a1ccaec9
YZ		 15902013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1591
1592 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1593 NULL.
1594
0aa27725
RS		 15952013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1596
1597 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1598 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1599
da4339ed
NC		 16002013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1601
1602 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1603 core.
1604
36591ba1 16052013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1606 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1607
1608 Based on patches from Altera Corporation.
1609
1610 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1611 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1612 * Makefile.in: Regenerated.
1613 * configure.tgt: Add case for nios2*-linux*.
1614 * config/obj-elf.c: Conditionally include elf/nios2.h.
1615 * config/tc-nios2.c: New file.
1616 * config/tc-nios2.h: New file.
1617 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1618 * doc/Makefile.in: Regenerated.
1619 * doc/all.texi: Set NIOSII.
1620 * doc/as.texinfo (Overview): Add Nios II options.
1621 (Machine Dependencies): Include c-nios2.texi.
1622 * doc/c-nios2.texi: New file.
1623 * NEWS: Note Altera Nios II support.
1624
94d4433a
AM		 16252013-02-06 Alan Modra <amodra@gmail.com>
1626
1627 PR gas/14255
1628 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1629 Don't skip fixups with fx_subsy non-NULL.
1630 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1631 with fx_subsy non-NULL.
1632
ace9af6f
L		 16332013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1634
1635 * doc/c-metag.texi: Add "@c man" markers.
1636
89d67ed9
AM		 16372013-02-04 Alan Modra <amodra@gmail.com>
1638
1639 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1640 related code.
1641 (TC_ADJUST_RELOC_COUNT): Delete.
1642 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1643
89072bd6
AM		 16442013-02-04 Alan Modra <amodra@gmail.com>
1645
1646 * po/POTFILES.in: Regenerate.
1647
f9b2d544
NC		 16482013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1649
1650 * config/tc-metag.c: Make SWAP instruction less permissive with
1651 its operands.
1652
392ca752
DD		 16532013-01-29 DJ Delorie <dj@redhat.com>
1654
1655 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1656 relocs in .word/.etc statements.
1657
427d0db6
RM		 16582013-01-29 Roland McGrath <mcgrathr@google.com>
1659
1660 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1661 immediate value for 8-bit offset" error so it shows line info.
1662
4faf939a
JM		 16632013-01-24 Joseph Myers <joseph@codesourcery.com>
1664
1665 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1666 for 64-bit output.
1667
78c8d46c
NC		 16682013-01-24 Nick Clifton <nickc@redhat.com>
1669
1670 * config/tc-v850.c: Add support for e3v5 architecture.
1671 * doc/c-v850.texi: Mention new support.
1672
fb5b7503
NC		 16732013-01-23 Nick Clifton <nickc@redhat.com>
1674
1675 PR gas/15039
1676 * config/tc-avr.c: Include dwarf2dbg.h.
1677
8ce3d284
L		 16782013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1679
1680 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1681 (tc_i386_fix_adjustable): Likewise.
1682 (lex_got): Likewise.
1683 (tc_gen_reloc): Likewise.
1684
f5555712
YZ		 16852013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1686
1687 * config/tc-aarch64.c (output_operand_error_record): Change to output
1688 the out-of-range error message as value-expected message if there is
1689 only one single value in the expected range.
1690 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1691 LSL #0 as a programmer-friendly feature.
1692
8fd4256d
L		 16932013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1694
1695 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1696 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1697 BFD_RELOC_64_SIZE relocations.
1698 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1699 for it.
1700 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1701 relocations against local symbols.
1702
a5840dce
AM		 17032013-01-16 Alan Modra <amodra@gmail.com>
1704
1705 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1706 finding some sort of toc syntax error, and break to avoid
1707 compiler uninit warning.
1708
af89796a
L		 17092013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1710
1711 PR gas/15019
1712 * config/tc-i386.c (lex_got): Increment length by 1 if the
1713 relocation token is removed.
1714
dd42f060
NC		 17152013-01-15 Nick Clifton <nickc@redhat.com>
1716
1717 * config/tc-v850.c (md_assemble): Allow signed values for
1718 V850E_IMMEDIATE.
1719
464e3686
SK		 17202013-01-11 Sean Keys <skeys@ipdatasys.com>
1721
1722 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1723 git to cvs.
464e3686 1724
5817ffd1
PB		 17252013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1726
1727 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1728 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1729 * config/tc-ppc.c (md_show_usage): Likewise.
1730 (ppc_handle_align): Handle power8's group ending nop.
1731
f4b1f6a9
SK		 17322013-01-10 Sean Keys <skeys@ipdatasys.com>
1733
1734 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1735 that the assember exits after the opcodes have been printed.
f4b1f6a9 1736
34bca508
L		 17372013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1738
1739 * app.c: Remove trailing white spaces.
1740 * as.c: Likewise.
1741 * as.h: Likewise.
1742 * cond.c: Likewise.
1743 * dw2gencfi.c: Likewise.
1744 * dwarf2dbg.h: Likewise.
1745 * ecoff.c: Likewise.
1746 * input-file.c: Likewise.
1747 * itbl-lex.h: Likewise.
1748 * output-file.c: Likewise.
1749 * read.c: Likewise.
1750 * sb.c: Likewise.
1751 * subsegs.c: Likewise.
1752 * symbols.c: Likewise.
1753 * write.c: Likewise.
1754 * config/tc-i386.c: Likewise.
1755 * doc/Makefile.am: Likewise.
1756 * doc/Makefile.in: Likewise.
1757 * doc/c-aarch64.texi: Likewise.
1758 * doc/c-alpha.texi: Likewise.
1759 * doc/c-arc.texi: Likewise.
1760 * doc/c-arm.texi: Likewise.
1761 * doc/c-avr.texi: Likewise.
1762 * doc/c-bfin.texi: Likewise.
1763 * doc/c-cr16.texi: Likewise.
1764 * doc/c-d10v.texi: Likewise.
1765 * doc/c-d30v.texi: Likewise.
1766 * doc/c-h8300.texi: Likewise.
1767 * doc/c-hppa.texi: Likewise.
1768 * doc/c-i370.texi: Likewise.
1769 * doc/c-i386.texi: Likewise.
1770 * doc/c-i860.texi: Likewise.
1771 * doc/c-m32c.texi: Likewise.
1772 * doc/c-m32r.texi: Likewise.
1773 * doc/c-m68hc11.texi: Likewise.
1774 * doc/c-m68k.texi: Likewise.
1775 * doc/c-microblaze.texi: Likewise.
1776 * doc/c-mips.texi: Likewise.
1777 * doc/c-msp430.texi: Likewise.
1778 * doc/c-mt.texi: Likewise.
1779 * doc/c-s390.texi: Likewise.
1780 * doc/c-score.texi: Likewise.
1781 * doc/c-sh.texi: Likewise.
1782 * doc/c-sh64.texi: Likewise.
1783 * doc/c-tic54x.texi: Likewise.
1784 * doc/c-tic6x.texi: Likewise.
1785 * doc/c-v850.texi: Likewise.
1786 * doc/c-xc16x.texi: Likewise.
1787 * doc/c-xgate.texi: Likewise.
1788 * doc/c-xtensa.texi: Likewise.
1789 * doc/c-z80.texi: Likewise.
1790 * doc/internals.texi: Likewise.
1791
4c665b71
RM		 17922013-01-10 Roland McGrath <mcgrathr@google.com>
1793
1794 * hash.c (hash_new_sized): Make it global.
1795 * hash.h: Declare it.
1796 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1797 pass a small size.
1798
a3c62988
NC		 17992013-01-10 Will Newton <will.newton@imgtec.com>
1800
1801 * Makefile.am: Add Meta.
1802 * Makefile.in: Regenerate.
1803 * config/tc-metag.c: New file.
1804 * config/tc-metag.h: New file.
1805 * configure.tgt: Add Meta.
1806 * doc/Makefile.am: Add Meta.
1807 * doc/Makefile.in: Regenerate.
1808 * doc/all.texi: Add Meta.
1809 * doc/as.texiinfo: Document Meta options.
1810 * doc/c-metag.texi: New file.
1811
b37df7c4
SE		 18122013-01-09 Steve Ellcey <sellcey@mips.com>
1813
1814 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1815 calls.
1816 * config/tc-mips.c (internalError): Remove, replace with abort.
1817
a3251895
YZ		 18182013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1819
1820 * config/tc-aarch64.c (parse_operands): Change to compare the result
1821 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1822
8ab8155f
NC		 18232013-01-07 Nick Clifton <nickc@redhat.com>
1824
1825 PR gas/14887
1826 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1827 anticipated character.
1828 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1829 here as it is no longer needed.
1830
a4ac1c42
AS		 18312013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1832
1833 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1834 * doc/c-score.texi (SCORE-Opts): Likewise.
1835 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1836
e407c74b
NC		 18372013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1838
1839 * config/tc-mips.c: Add support for MIPS r5900.
1840 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1841 lq and sq.
1842 (can_swap_branch_p, get_append_method): Detect some conditional
1843 short loops to fix a bug on the r5900 by NOP in the branch delay
1844 slot.
1845 (M_MUL): Support 3 operands in multu on r5900.
1846 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1847 (s_mipsset): Force 32 bit floating point on r5900.
1848 (mips_ip): Check parameter range of instructions mfps and mtps on
1849 r5900.
1850 * configure.in: Detect CPU type when target string contains r5900
1851 (e.g. mips64r5900el-linux-gnu).
1852
62658407
L		 18532013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1854
1855 * as.c (parse_args): Update copyright year to 2013.
1856
95830fd1
YZ		 18572013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1858
1859 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1860 and "cortex57".
1861
517bb291 18622013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1863
517bb291
NC		 1864 PR gas/14987
1865 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1866 closing bracket.
d709e4e6 1867
517bb291 1868For older changes see ChangeLog-2012
08d56133 1869\f
517bb291 1870Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1871
1872Copying and distribution of this file, with or without modification,
1873are permitted in any medium without royalty provided the copyright
1874notice and this notice are preserved.
1875
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NC		 1876Local Variables:
1877mode: change-log
1878left-margin: 8
1879fill-column: 74
1880version-control: never
1881End:
GDB Binutils - Deliverables
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