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sim: drop duplicate break statements in sim-fpu
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
3d540e93
NC		 12010-04-09 Nick Clifton <nickc@redhat.com>
2
3 * as.c (create_obj_attrs_section): Remove unused variable addr.
4 * listing.c (listing_listing): Remove unused variable message.
5 * read.c: Remove unnecessary register type qualifiers.
6 (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
7 defined.
8
e760a81b
EW		 92010-04-07 Eric B. Weddington <eric.weddington@atmel.com>
10
11 * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a,
12 atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2,
13 atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328,
14 atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a,
15 atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a,
16 atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a,
17 atmega88pa, attiny461a, attiny84a, m3000.
18 Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd,
19 atmega8hvd, attiny327, m3000f, m3000s, m3001b.
20 * doc/c-avr.texi: Same.
21
2de7820f
JZ		 222010-04-07 Jie Zhang <jie@codesourcery.com>
23
24 * config/tc-arm.c (make_mapping_symbol): Handle the case
25 that multiple mapping symbols have the same value 0.
26
397841b5
AM		 272010-04-07 Alan Modra <amodra@gmail.com>
28
29 * configure: Regenerate.
30
bd32c6bd
NC		 312010-04-06 Nick Clifton <nickc@redhat.com>
32
33 * po/ru.po: New Russian translation.
34 * configure.in (ALL_LINGUAS): Add ru.
35 * configure: Regenerate.
36
b36562f6
L		 372010-03-30 H.J. Lu <hongjiu.lu@intel.com>
38
39 PR gas/11456
40 * input-scrub.c (input_scrub_next_buffer): Use memmove instead
41 of memcpy to copy overlap memory.
42
40b36596
JM		 432010-03-25 Joseph Myers <joseph@codesourcery.com>
44
45 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
46 (TARGET_CPU_HFILES): Add config/tc-tic6x.h.
47 * Makefile.in: Regenerate.
48 * NEWS: Add news entry for TI C6X support.
49 * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
50 TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
51 operands if TC_KEEP_OPERAND_SPACES.
52 * configure.tgt (tic6x-*-*): New.
53 * config/tc-ia64.h (TC_PREDICATE_START_CHAR,
54 TC_PREDICATE_END_CHAR): Define.
55 * config/tc-tic6x.c, config/tc-tic6x.h: New.
56 * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
57 * doc/Makefile.in: Regenerate.
58 * doc/all.texi (TIC6X): Define.
59 * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
60 * doc/c-tic6x.texi: New.
61
cff8d58a
L		 622010-03-22 H.J. Lu <hongjiu.lu@intel.com>
63
64 * config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
65
86e026a4
L		 662010-03-21 H.J. Lu <hongjiu.lu@intel.com>
67
68 * config/tc-i386.c (i386_error): Replace oprand_size_mismatch
69 with operand_size_mismatch.
70 (operand_size_match): Updated.
71 (match_template): Likewise.
72
a65babc9
L		 732010-03-21 H.J. Lu <hongjiu.lu@intel.com>
74
75 * config/tc-i386.c (i386_error): New.
76 (_i386_insn): Replace err_msg with error.
77 (operand_size_match): Set error instead of err_msg on failure.
78 (operand_type_match): Likewise.
79 (operand_type_register_match): Likewise.
80 (VEX_check_operands): Likewise.
81 (match_template): Likewise. Use error instead of err_msg with
82 as_bad.
83
0f020cef
JZ		 842010-03-19 Jie Zhang <jie@codesourcery.com>
85
86 * config/tc-arm.c (make_mapping_symbol): Hanle the case
87 that two mapping symbols have the same value.
88
a5b82cbe
DJ		 892010-03-18 Daniel Jacobowitz <dan@codesourcery.com>
90
91 * doc/c-arm.texi (.setfp): Correct example.
92
b43420e6
NC		 932010-03-18 Wei Guozhi <carrot@google.com>
94
95 PR gas/11323
96 * config/tc-arm.c (reloc_names): New relocation names.
97 (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
98 (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
99 * doc/c-arm.texi (ARM-Relocations): Document the new relocation.
100
4e4e1355
TS		 1012010-03-15 Thomas Schwinge <thomas@codesourcery.com>
102
d905c788
TS		 103 * dw2gencfi.c (output_cie): Consider emitting the S augmentation in all
104 cases, and not only for .eh_frame.
105
4e4e1355
TS		 106 * dw2gencfi.c (output_cie): Make it more explicit which code paths
107 belong to .eh_frame only.
108
dc86b458
SB		 1092010-03-13 Segher Boessenkool <segher@kernel.crashing.org>
110
111 * config/tc-v850.c (v850_insert_operand): Handle out-of-range
112 assembler constants on 64-bit hosts.
113
ee9e7c78
MF		 1142010-03-10 Mike Frysinger <michael.frysinger@analog.com>
115
116 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
117 Strip trailing whitespace.
118
a23c851a
MF		 1192010-03-10 Mike Frysinger <michael.frysinger@analog.com>
120
121 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
122 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
123 BFIN_CPU_BF506.
124 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
125
9982501a
JZ		 1262010-03-10 Jie Zhang <jie@codesourcery.com>
127
128 * doc/as.texinfo: Add Blackfin options.
129 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
130 * config/tc-bfin.c (md_show_usage): Show usage for all
131 Blackfin specific options.
132
4199fe12
AM		 1332010-03-09 Alan Modra <amodra@gmail.com>
134
135 PR gas/11356
136 * listing.c (listing_newline): Correct backslash quote logic.
137
40cf28aa
RO		 1382010-03-08 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
139
140 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
141 (ELF_TARGET_FORMAT64): Define.
142
26b6f191
PB		 1432010-03-05 Paul Brook <paul@codesourcery.com>
144
145 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
146
772657e9
AS		 1472010-03-02 Andrew Stubbs <ams@codesourcery.com>
148
149 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
150 reading uninitialized data.
151
bd56defd
TG		 1522010-03-01 Tristan Gingold <gingold@adacore.com>
153
154 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
155
743d7f19
DE		 1562010-02-26 Doug Evans <dje@sebabeach.org>
157
158 * configure.tgt: Fix mep cpu case.
159
f8a8e9d6
JZ		 1602010-02-26 Jie Zhang <jie@codesourcery.com>
161
162 * config/tc-arm.c (do_t_strexd): Remove
163 operand[1] != operand[2] contraint.
164
3fde54a2
JZ		 1652010-02-26 Jie Zhang <jie@codesourcery.com>
166
167 * config/tc-arm.c (neon_select_shape): No need to match
168 the remaining operands in the shape when one operand does
169 not match.
170
e23c0ad8
JZ		 1712010-02-26 Jie Zhang <jie@codesourcery.com>
172
173 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
174 alignment.
175
fae0b242
DE		 1762010-02-25 Doug Evans <dje@sebabeach.org>
177
178 * cgen.c: Whitespace fixes.
179 (weak_operand_overflow_check): Formatting fix.
180
a6c56050
L		 1812010-02-25 H.J. Lu <hongjiu.lu@intel.com>
182
183 * config/tc-i386.c (match_template): Update error messages.
184
891edac4
L		 1852010-02-25 H.J. Lu <hongjiu.lu@intel.com>
186
187 * config/tc-i386.c (_i386_insn): Add err_msg.
188 (operand_size_match): Set err_msg on failure.
189 (operand_type_match): Likewise.
190 (operand_type_register_match): Likewise.
191 (VEX_check_operands): Likewise.
192 (match_template): Likewise. Use i.err_msg with as_bad.
193
c67a084a
NC		 1942010-02-25 Wu Zhangjin <wuzhangjin@gmail.com>
195
196 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
197 mips_fix_loongson2f_jump): New variables.
198 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
199 -mno-fix-loongson2f-nop/jump.
200 (md_parse_option): Initialize variables via above options.
201 (options): New enums for the above options.
202 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
203 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
204 New functions.
205 (append_insn): call fix_loongson2f().
206 (mips_handle_align): Replace the implicit nops.
207 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
208 for the new mips_handle_align().
209 * doc/c-mips.texi: Document the new options.
210
56adecf4
DG		 2112010-02-23 Daniel Gutson <dgutson@codesourcery.com>
212
213 * config/tc-arm.c (do_rd_rm_rn): Added warning
214 for obsolete insns.
215
17e57237
NC		 2162010-02-23 Andrew Zabolotny <anpaza@mail.ru>
217
218 PR binutils/11297
219 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
220 (avr_cons_fix_new): Handle fixups of a single byte.
221
8a59fff3
MGD		 2222010-02-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
223
224 PR 9861
225 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
226 compiler's predefines.
227
487565fe
AM		 2282010-02-19 Alan Modra <amodra@gmail.com>
229
230 * configure.tgt: Whiltespace. Sort moxie entry.
231
cd21e546
MGD		 2322010-02-18 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
233
234 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
235 * doc/c-arm.texi: Likewise.
236
77551a33
DG		 2372010-02-12 Daniel Gutson <dgutson@codesourcery.com>
238
239 * config/tc-arm.c (asm_opcode): operands type
240 change.
241 (BAD_PC_ADDRESSING): New macro message.
242 (BAD_PC_WRITEBACK): Likewise.
243 (MIX_ARM_THUMB_OPERANDS): New macro.
244 (operand_parse_code): Added enum values.
245 (parse_operands): Added thumb/arm distinction,
246 plus new enum values handling.
247 (encode_arm_addr_mode_2): Validations enhanced.
248 (encode_arm_addr_mode_3): Likewise.
249 (do_rm_rd_rn): Likewise.
250 (encode_thumb32_addr_mode): Likewise.
251 (do_t_ldrex): Likewise.
252 (do_t_ldst): Likewise.
253 (do_t_strex): Likewise.
254 (md_assemble): Call parse_operands with
255 a new parameter.
256 (OPS_1): New macro.
257 (OPS_2): Likewise.
258 (OPS_3): Likewise.
259 (OPS_4): Likewise.
260 (OPS_5): Likewise.
261 (OPS_6): Likewise.
262 (insns): Updated insns operands.
263
9d0e8497
TG		 2642010-02-12 Tristan Gingold <gingold@adacore.com>
265 Douglas B Rupp <rupp@gnat.com>
266
267 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
268 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
269 (pseudo_func): Add an entry for slotcount.
270 (md_begin): Initialize slotcount pseudo symbol.
271 (ia64_parse_name): Handle @slotcount parameter.
272 (ia64_gen_real_reloc_type): Handle slotcount.
273 (md_apply_fix): Ditto.
274 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
275
6fa78d94
SA		 2762010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
277
278 * config/tc-xtensa.c (istack_init): Don't call memset.
279
a89c407e
SA		 2802010-02-11 Sterling Augustine <sterling@tensilica.com>
281
282 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
283 well as suffixes.
284
6fa78d94 2852010-02-11 Sterling Augustine <sterling@tensilica.com>
a89c407e
SA		 286
287 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
288
24981e7b
L		 2892010-02-11 H.J. Lu <hongjiu.lu@intel.com>
290
291 * config/tc-i386.c (build_modrm_byte): Reformat.
292
c75ef631
L		 2932010-02-11 H.J. Lu <hongjiu.lu@intel.com>
294
295 * config/tc-i386.c: Update copyright.
296
a683cc34
SP		 2972010-02-10 Quentin Neill <quentin.neill@amd.com>
298 Sebastian Pop <sebastian.pop@amd.com>
299
300 * config/tc-i386.c (vec_imm4) New operand type.
301 (fits_in_imm4): New.
302 (VEX_check_operands): New.
303 (check_reverse): Call VEX_check_operands.
304 (build_modrm_byte): Reintroduce code for 5
305 operand insns. Fix whitespace.
306
cdc51b07
RS		 3072010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
308
309 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
310 -mpwr6 and -mpwr7.
311
3a1e9c4a
SA		 3122010-02-09 Sterling Augustine <sterling@tensilica.com>
313
314 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
315 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
316 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
317
486499d0
CL		 3182010-02-08 Christophe Lyon <christophe.lyon@st.com>
319
320 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
321 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
322 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
323 BFD_RELOC_ARM_PCREL_CALL)
324
19ef5f3d
SA		 3252010-02-08 Sterling Augustine <sterling@tensilica.com>
326
327 * config/tc-xtensa.c (frag_format_size): Generalize logic to
328 handle more instruction sizes and fetch widths.
329 (branch_align_power): Likewise.
330 (text_align_power): Likewise.
331 (bytes_to_stretch): Likewise.
332
ce3d2015
AM		 3332010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
334
335 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
336 (ppc_mach): Handle titan.
337 * doc/c-ppc.texi: Mention -mtitan.
338
19ef5f3d
SA		 3392010-02-05 Sterling Augustine <sterling@tensilica.com>
340
341 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
342 replace with...
343 (xtensa_fetch_width) ...this.
344
1e4cb857
JM		 3452010-02-05 Joseph Myers <joseph@codesourcery.com>
346
347 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
348 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
349 * Makefile.in: Regenerate.
350
68339fdf
SP		 3512010-02-03 Quentin Neill <quentin.neill@amd.com>
352
353 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
354 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
355 * config/tc-i386.h (processor_type): Same.
356 * doc/c-i386.texi: Change amdfam15 to bdver1.
357
99b253c5
NC		 3582010-01-29 Nick Clifton <nickc@redhat.com>
359
360 PR 11136
361 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
362 NS_NULL.
363
31907d5e
DK		 3642010-01-27 Dave Korn <dave.korn.cygwin@gmail.com>
365
366 * NEWS: Mention new feature.
367 * config/obj-coff.c (obj_coff_section): Accept digits and use
368 to override default section alignment power if specified.
369 * doc/as.texinfo (.section directive): Update documentation.
370
539f890d
L		 3712010-01-27 H.J. Lu <hongjiu.lu@intel.com>
372
373 * config/tc-i386.c (avxscalar): New.
374 (OPTION_MAVXSCALAR): Likewise.
375 (build_vex_prefix): Select vector_length for scalar instructions
376 based on avxscalar.
377 (md_longopts): Add OPTION_MAVXSCALAR.
378 (md_parse_option): Handle OPTION_MAVXSCALAR.
379 (md_show_usage): Add -mavxscalar=.
380
381 * doc/c-i386.texi: Document -mavxscalar=.
382
80de6e00
L		 3832010-01-24 H.J. Lu <hongjiu.lu@intel.com>
384
385 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
386 0xc4 individually.
387
c865e45b
RS		 3882010-01-23 Richard Sandiford <r.sandiford@uk.ibm.com>
389
390 * write.h (fix_at_start): Declare.
391 * write.c (fix_new_internal): Add at_beginning parameter.
392 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
393 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
394 (fix_new, fix_new_exp): Update accordingly.
395 (fix_at_start): New function.
396 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
397 (ppc_ref): New function, for OBJ_XCOFF.
398 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
399 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
400
53e5c8fe
RO		 4012010-01-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
402
403 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
404 on 64-bit Solaris/x86.
405 Include obj-format.h earlier.
406
55786da2 4072010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
99b253c5 408
55786da2
AK		 409 * config/tc-s390.c (s390_elf_final_processing): New function.
410 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
411 (s390_elf_final_processing): Added prototype.
412
413
760f3a89
NC		 4142010-01-20 Nick Clifton <nickc@redhat.com>
415
416 PR 11109
417 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
418 code to handle round-to-zero for VCVT conversions.
419 (do_neon_cvt): New. Call do_neon_cvt_1.
420 (do_neon_cvtr): New. Call do_neon_cvt_1.
421 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
422 insn.
423
37a1f277
TG		 4242010-01-18 Tristan Gingold <gingold@adacore.com>
425
426 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
760f3a89 427
a6461c02
SP		 4282010-01-15 Sebastian Pop <sebastian.pop@amd.com>
429
430 * config/tc-i386.c (md_assemble): Before accessing the IMM field
431 check that it's not an XOP insn.
432
62fb9fe1
JZ		 4332010-01-14 Jie Zhang <jie.zhang@analog.com>
434
435 * config/bfin-aux.h: Remove argument names in function
436 declarations.
437 * config/bfin-lex.l (parse_int): Fix shadowed variable name
438 warning.
439 * config/bfin-parse.y (value_match): Remove argument names
440 in declaration.
441 (notethat): Likewise.
442 (yyerror): Likewise.
443
afa62d5e
DJ		 4442010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
445
446 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
447
52b010e4
NC		 4482010-01-13 Nick Clifton <nickc@redhat.com>
449
450 * config/tc-h8300.c (h8300_elf_section): New function - issue a
451 warning message if a new section is created without setting any
452 attributes for it.
453 (md_pseudo_table): Intercept section creation pseudos.
454 (md_pcrel_from): Replace abort with an error message.
455 * config/obj-elf.c (obj_elf_section_name): Export this function.
456 * config/obj-elf.h (obj_elf_section_name): Prototype.
457
cc761f75
AM		 4582010-01-12 Alan Modra <amodra@gmail.com>
459
460 PR 11122
461 * listing.c (print_source): Add one to line number.
462
3725885a
RW		 4632010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
464
465 * Makefile.in: Regenerate.
466 * configure: Regenerate.
467 * doc/Makefile.in: Regenerate.
468
5256a5b0
L		 4692010-01-08 H.J. Lu <hongjiu.lu@intel.com>
470
471 * version.c (parse_args): Change to "Copyright 2010".
472
69dd9865
SP		 4732010-01-06 Quentin Neill <quentin.neill@amd.com>
474
475 * config/tc-i386.c (cpu_arch): Add amdfam15.
476 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
477 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
478 * doc/c-i386.texi: Add amdfam15.
479
4316f0d2
DG		 4802010-01-04 Daniel Gutson <dgutson@codesourcery.com>
481
482 * config/tc-arm.c (do_neon_logic): Accept imm value
483 in the third operand too.
484 (operand_parse_code): OP_RNDQ_IMVNb renamed to
485 OP_RNDQ_Ibig.
486 (parse_operands): OP_NILO case removed, applied renaming.
487 (insns): Neon shape changed for some logic instructions.
488
b1a769ed
DG		 4892010-01-04 Daniel Gutson <dgutson@codesourcery.com>
490
491 * config/tc-arm.c (do_neon_ldx_stx): Added
492 validation for vector load/store insns.
493
0dc93057
AM		 4942010-01-04 Edmar Wienskoski <edmar@freescale.com>
495
496 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
497
88714cb8
DG		 4982010-01-03 Daniel Gutson <dgutson@codesourcery.com>
499
500 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
501 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
502 (NEON_ENCODE): New macro.
503 (check_neon_suffixes): New macro.
504 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
505 (do_vfp_nsyn_opcode): Likewise.
506 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
507 (do_vfp_nsyn_cmp): Likewise.
508 (do_neon_shl_imm): Likewise.
509 (do_neon_qshl_imm): Likewise.
510 (neon_dyadic_misc): Likewise.
511 (do_neon_mac_maybe_scalar): Likewise.
512 (do_neon_qdmulh): Likewise.
513 (do_neon_qmovn): Likewise.
514 (do_neon_qmovun): Likewise.
515 (do_neon_movn): Likewise.
516 (neon_mac_reg_scalar_long): Likewise.
517 (do_neon_vmull): Likewise.
518 (do_neon_trn): Likewise.
519 (do_neon_ldx_stx): Likewise.
520 (neon_dp_fixup): Changed signature and set the flag.
521 (neon_three_same): Call the above with new signature.
522 (neon_two_same): Likewise.
523 (neon_imm_shift): Likewise.
524 (neon_mul_mac): Likewise.
525 (do_neon_abs_neg): Likewise.
526 (neon_mixed_length): Likewise.
527 (do_neon_ext): Likewise.
528 (do_neon_mov): Likewise.
529 (do_neon_tbl_tbx): Likewise.
530 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
531 (neon_compare): Likewise.
532 (do_neon_shll): Likewise.
533 (do_neon_cvt): Likewise.
534 (do_neon_mvn): Likewise.
535 (do_neon_dup): Likewise.
0dc93057 536 (md_assemble): Call check_neon_suffixes ().
99f1a7a7 537
43ecc30f 538For older changes see ChangeLog-2009
08d56133
NC		 539\f
540Local Variables:
541mode: change-log
542left-margin: 8
543fill-column: 74
544version-control: never
545End:
GDB Binutils - Deliverables
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