Revert "Add support for AArch64 trace unit registers."
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a203d9b7
YZ
12013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
2
3 Revert
4
5 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
6
7 * config/tc-aarch64.c (set_other_error): New function.
8 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
9 the variable to which it points with 'o'.
10 (parse_operands): Update; check for write to read-only system
11 registers or read from write-only ones.
12
c3320543
L
132013-11-17 H.J. Lu <hongjiu.lu@intel.com>
14
15 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
16 indicate if instruction has the BND prefix. Return
17 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
18 bnd_prefix isn't zero.
19 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
20 if needed.
21 (output_jump): Update reloc call.
22 (output_interseg_jump): Likewise.
23 (output_disp): Likewise.
24 (output_imm): Likewise.
25 (x86_cons_fix_new): Likewise.
26 (lex_got): Add an argument, bnd_prefix, to indicate if
27 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
28 if needed.
29 (x86_cons): Update lex_got call.
30 (i386_immediate): Likewise.
31 (i386_displacement): Likewise.
32 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
33 BFD_RELOC_X86_64_PLT32_BND.
34 (tc_gen_reloc): Likewise.
35 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
36
75468c93
YZ
372013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
38
39 * config/tc-aarch64.c (set_other_error): New function.
40 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
41 the variable to which it points with 'o'.
42 (parse_operands): Update; check for write to read-only system
43 registers or read from write-only ones.
44
ad8ecc81
MZ
452013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
46
47 * config/tc-i386.c (check_VecOperands): Reorder checks.
48
b83a9376
CM
492013-11-11 Catherine Moore <clm@codesourcery.com>
50
51 * config/mips/tc-mips.c (convert_reg_type): Use
52 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
53 (reg_needs_delay): Likewise.
54 (insns_between): Likewise.
55
e2b5892e
JBG
562013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
57
58 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
59
49eec193
YZ
602013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
61
62 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
63 call aarch64_sys_reg_deprecated_p and warn about the deprecated
64 system registers.
65
68a64283
YZ
662013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
67
68 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
69
8db49cc2
WN
702013-11-05 Will Newton <will.newton@linaro.org>
71
72 PR gas/16103
73 * config/tc-aarch64.c (parse_operands): Avoid trying to
74 parse a vector register as an immediate.
75
e4630f71
JB
762013-11-04 Jan Beulich <jbeulich@suse.com>
77
78 * config/tc-i386.c (check_long_reg): Correct comment indentation.
79 (check_qword_reg): Correct comment and its indentation.
80 (check_word_reg): Extend comment and correct its indentation. Also
81 check for 64-bit register.
82
6911b7dc
AM
832013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
84
85 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
86 (ppc_elf_localentry): New function.
87 (ppc_force_relocation): Force relocs on all branches to localenty
88 symbols.
89 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
90
ee67d69a
AM
912013-10-30 Alan Modra <amodra@gmail.com>
92
93 * config/tc-ppc.c: Include elf/ppc64.h.
94 (ppc_abiversion): New variable.
95 (md_pseudo_table): Add .abiversion.
96 (ppc_elf_abiversion, ppc_elf_end): New functions.
97 * config/tc-ppc.h (md_end): Define.
98
f9c6b907
AM
992013-10-30 Alan Modra <amodra@gmail.com>
100
101 * config/tc-ppc.c (SEX16): Don't mask.
102 (REPORT_OVERFLOW_HI): Define as zero.
103 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
104 @tprel@high, and @tprel@higha modifiers.
105 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
106 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
107 Handle new relocs.
108 (md_apply_fix): Similarly.
109
9d5de888
CF
1102013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
111
112 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
113 (fpr_write_mask): Test MSA registers.
114 (can_swap_branch_p): Check fpr write followed by fpr read.
115
3fc1d038
NC
1162013-10-18 Nick Clifton <nickc@redhat.com>
117
118 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
119
56d438b1
CF
1202013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
121 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
122
123 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
124 (md_longopts): Add mmsa and mno-msa.
125 (mips_ases): Add msa.
126 (RTYPE_MASK): Update.
127 (RTYPE_MSA): New define.
128 (OT_REG_ELEMENT): Replace with...
129 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
130 (mips_operand_token): Replace reg_element with index.
131 (mips_parse_argument_token): Treat vector indices as separate tokens.
132 Handle register indices.
133 (md_begin): Add MSA register names.
134 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
135 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
136 (match_mdmx_imm_reg_operand): Update accordingly.
137 (match_imm_index_operand): New function.
138 (match_reg_index_operand): New function.
139 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
140 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
141 (md_show_usage): Print -mmsa and -mno-msa.
142 * doc/as.texinfo: Document -mmsa and -mno-msa.
143 * doc/c-mips.texi: Document -mmsa and -mno-msa.
144 Document .set msa and .set nomsa.
145
b2e951ec
NC
1462013-10-14 Nick Clifton <nickc@redhat.com>
147
148 * read.c (add_include_dir): Use xrealloc.
149 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
150 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
151
ae335a4e
SL
1522013-10-13 Sandra Loosemore <sandra@codesourcery.com>
153
154 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
155 also test/refer to "sstatus". Reformat the warning message.
156
0e1c2434
SK
1572013-10-10 Sean Keys <skeys@ipdatasys.com>
158
159 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
160
47cd3fa7
JB
1612013-10-10 Jan Beulich <jbeulich@suse.com>
162
163 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
164 swapping for bndmk, bndldx, and bndstx.
165
6085f853
NC
1662013-10-09 Nick Clifton <nickc@redhat.com>
167
b7b2bb1d
NC
168 PR gas/16025
169 * config/tc-epiphany.c (md_convert_frag): Add missing break
170 statement.
171
6085f853
NC
172 PR gas/16026
173 * config/tc-mn10200.c (md_convert_frag): Add missing break
174 statement.
175
cecf1424
JB
1762013-10-08 Jan Beulich <jbeulich@suse.com>
177
178 * tc-i386.c (check_word_reg): Remove misplaced "else".
179 (check_long_reg): Restore symmetry with check_word_reg.
180
d3bfe16e
JB
1812013-10-08 Jan Beulich <jbeulich@suse.com>
182
183 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
184 LR/PC check.
185
38d77545
NC
1862013-10-08 Nick Clifton <nickc@redhat.com>
187
188 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
189 for "<foo>a". Issue error messages for unrecognised or corrrupt
190 size extensions.
191
fe8b4cc3
KT
1922013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
193
194 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
195 possible.
196
c7b0bd56
SE
1972013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
198
199 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
200 * doc/c-i386.texi: Add -march=bdver4 option.
201
cc9afea3
AM
2022013-09-20 Alan Modra <amodra@gmail.com>
203
204 * configure: Regenerate.
205
58ca03a2
TG
2062013-09-18 Tristan Gingold <gingold@adacore.com>
207
208 * NEWS: Add marker for 2.24.
209
ab905915
NC
2102013-09-18 Nick Clifton <nickc@redhat.com>
211
212 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
213 (move_data): New variable.
214 (md_parse_option): Parse -md.
215 (msp430_section): New function. Catch references to the .bss or
216 .data sections and generate a special symbol for use by the libcrt
217 library.
218 (md_pseudo_table): Intercept .section directives.
219 (md_longopt): Add -md
220 (md_show_usage): Likewise.
221 (msp430_operands): Generate a warning message if a NOP is inserted
222 into the instruction stream.
223 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
224
f1c38003
SE
2252013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
226
227 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 228 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 229
1d50d57c
WN
2302013-09-16 Will Newton <will.newton@linaro.org>
231
232 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
233 disallowing element size 64 with interleave other than 1.
234
173d3447
CF
2352013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
236
237 * config/tc-mips.c (match_insn): Set error when $31 is used for
238 bltzal* and bgezal*.
239
ac21e7da
TG
2402013-09-04 Tristan Gingold <gingold@adacore.com>
241
242 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
243 symbols.
244
74db7efb
NC
2452013-09-04 Roland McGrath <mcgrathr@google.com>
246
247 PR gas/15914
248 * config/tc-arm.c (T16_32_TAB): Add _udf.
249 (do_t_udf): New function.
250 (insns): Add "udf".
251
664a88c6
DD
2522013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
253
254 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
255 assembler errors at correct position.
256
9aff4b7a
NC
2572013-08-23 Yuri Chornoivan <yurchor@ukr.net>
258
259 PR binutils/15834
260 * config/tc-ia64.c: Fix typos.
261 * config/tc-sparc.c: Likewise.
262 * config/tc-z80.c: Likewise.
263 * doc/c-i386.texi: Likewise.
264 * doc/c-m32r.texi: Likewise.
265
4f2374c7
WN
2662013-08-23 Will Newton <will.newton@linaro.org>
267
9aff4b7a 268 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
269 for pre-indexed addressing modes.
270
b4e6cb80
AM
2712013-08-21 Alan Modra <amodra@gmail.com>
272
273 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
274 range check label number for use with fb_low_counter array.
275
1661c76c
RS
2762013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
277
278 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
279 (mips_parse_argument_token, validate_micromips_insn, md_begin)
280 (check_regno, match_float_constant, check_completed_insn, append_insn)
281 (match_insn, match_mips16_insn, match_insns, macro_start)
282 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
283 (mips16_ip, mips_set_option_string, md_parse_option)
284 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
285 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
286 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
287 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
288 Start error messages with a lower-case letter. Do not end error
289 messages with a period. Wrap long messages to 80 character-lines.
290 Use "cannot" instead of "can't" and "can not".
291
b0e6f033
RS
2922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
293
294 * config/tc-mips.c (imm_expr): Expand comment.
295 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
296 when populated.
297
e423441d
RS
2982013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
299
300 * config/tc-mips.c (imm2_expr): Delete.
301 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
302
5e0dc5ba
RS
3032013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
304
305 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
306 (macro): Remove M_DEXT and M_DINS handling.
307
60f20e8b
RS
3082013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
309
310 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
311 lax_max with lax_match.
312 (match_int_operand): Update accordingly. Don't report an error
313 for !lax_match-only cases.
314 (match_insn): Replace more_alts with lax_match and use it to
315 initialize the mips_arg_info field. Add a complete_p parameter.
316 Handle implicit VU0 suffixes here.
317 (match_invalid_for_isa, match_insns, match_mips16_insns): New
318 functions.
319 (mips_ip, mips16_ip): Use them.
320
d436c1c2
RS
3212013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
322
323 * config/tc-mips.c (match_expression): Report uses of registers here.
324 Add a "must be an immediate expression" error. Handle elided offsets
325 here rather than...
326 (match_int_operand): ...here.
327
1a00e612
RS
3282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
329
330 * config/tc-mips.c (mips_arg_info): Remove soft_match.
331 (match_out_of_range, match_not_constant): New functions.
332 (match_const_int): Remove fallback parameter and check for soft_match.
333 Use match_not_constant.
334 (match_mapped_int_operand, match_addiusp_operand)
335 (match_perf_reg_operand, match_save_restore_list_operand)
336 (match_mdmx_imm_reg_operand): Update accordingly. Use
337 match_out_of_range and set_insn_error* instead of as_bad.
338 (match_int_operand): Likewise. Use match_not_constant in the
339 !allows_nonconst case.
340 (match_float_constant): Report invalid float constants.
341 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
342 match_float_constant to check for invalid constants. Fail the
343 match if match_const_int or match_float_constant return false.
344 (mips_ip): Update accordingly.
345 (mips16_ip): Likewise. Undo null termination of instruction name
346 once lookup is complete.
347
e3de51ce
RS
3482013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
349
350 * config/tc-mips.c (mips_insn_error_format): New enum.
351 (mips_insn_error): New struct.
352 (insn_error): Change to a mips_insn_error.
353 (clear_insn_error, set_insn_error_format, set_insn_error)
354 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
355 functions.
356 (mips_parse_argument_token, md_assemble, match_insn)
357 (match_mips16_insn): Use them instead of manipulating insn_error
358 directly.
359 (mips_ip, mips16_ip): Likewise. Simplify control flow.
360
97d87491
RS
3612013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
362
363 * config/tc-mips.c (normalize_constant_expr): Move further up file.
364 (normalize_address_expr): Likewise.
365 (match_insn, match_mips16_insn): New functions, split out from...
366 (mips_ip, mips16_ip): ...here.
367
0f35dbc4
RS
3682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
369
370 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
371 OP_OPTIONAL_REG.
372 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
373 for optional operands.
374
27285eed
AM
3752013-08-16 Alan Modra <amodra@gmail.com>
376
377 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
378 modifiers generally.
379
cbe02d4f
AM
3802013-08-16 Alan Modra <amodra@gmail.com>
381
382 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
383
3c02c47f
DE
3842013-08-14 David Edelsohn <dje.gcc@gmail.com>
385
386 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
387 argument as alignment.
388
4046d87a
NC
3892013-08-09 Nick Clifton <nickc@redhat.com>
390
391 * config/tc-rl78.c (elf_flags): New variable.
392 (enum options): Add OPTION_G10.
393 (md_longopts): Add mg10.
394 (md_parse_option): Parse -mg10.
395 (rl78_elf_final_processing): New function.
396 * config/tc-rl78.c (tc_final_processing): Define.
397 * doc/c-rl78.texi: Document -mg10 option.
398
ee5734f0
RS
3992013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
400
401 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
402 suffixes to be elided too.
403 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
404 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
405 to be omitted too.
406
13896403
RS
4072013-08-05 John Tytgat <john@bass-software.com>
408
409 * po/POTFILES.in: Regenerate.
410
d6787ef9
EB
4112013-08-05 Eric Botcazou <ebotcazou@adacore.com>
412 Konrad Eisele <konrad@gaisler.com>
413
414 * config/tc-sparc.c (sparc_arch_types): Add leon.
415 (sparc_arch): Move sparc4 around and add leon.
416 (sparc_target_format): Document -Aleon.
417 * doc/c-sparc.texi: Likewise.
418
da8bca91
RS
4192013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
420
421 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
422
14daeee3
RS
4232013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
424 Richard Sandiford <rdsandiford@googlemail.com>
425
426 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
427 (RWARN): Bump to 0x8000000.
428 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
429 (RTYPE_R5900_ACC): New register types.
430 (RTYPE_MASK): Include them.
431 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
432 macros.
433 (reg_names): Include them.
434 (mips_parse_register_1): New function, split out from...
435 (mips_parse_register): ...here. Add a channels_ptr parameter.
436 Look for VU0 channel suffixes when nonnull.
437 (reg_lookup): Update the call to mips_parse_register.
438 (mips_parse_vu0_channels): New function.
439 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
440 (mips_operand_token): Add a "channels" field to the union.
441 Extend the comment above "ch" to OT_DOUBLE_CHAR.
442 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
443 (mips_parse_argument_token): Handle channel suffixes here too.
444 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
445 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
446 Handle '#' formats.
447 (md_begin): Register $vfN and $vfI registers.
448 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
449 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
450 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
451 (match_vu0_suffix_operand): New function.
452 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
453 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
454 (mips_lookup_insn): New function.
455 (mips_ip): Use it. Allow "+K" operands to be elided at the end
456 of an instruction. Handle '#' sequences.
457
c0ebe874
RS
4582013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
459
460 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
461 values and use it instead of sreg, treg, xreg, etc.
462
3ccad066
RS
4632013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
464
465 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
466 and mips_int_operand_max.
467 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
468 Delete.
469 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
470 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
471 instead of mips16_immed_operand.
472
0acfaea6
RS
4732013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
474
475 * config/tc-mips.c (mips16_macro): Don't use move_register.
476 (mips16_ip): Allow macros to use 'p'.
477
fc76e730
RS
4782013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
479
480 * config/tc-mips.c (MAX_OPERANDS): New macro.
481 (mips_operand_array): New structure.
482 (mips_operands, mips16_operands, micromips_operands): New arrays.
483 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
484 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
485 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
486 (micromips_to_32_reg_q_map): Delete.
487 (insn_operands, insn_opno, insn_extract_operand): New functions.
488 (validate_mips_insn): Take a mips_operand_array as argument and
489 use it to build up a list of operands. Extend to handle INSN_MACRO
490 and MIPS16.
491 (validate_mips16_insn): New function.
492 (validate_micromips_insn): Take a mips_operand_array as argument.
493 Handle INSN_MACRO.
494 (md_begin): Initialize mips_operands, mips16_operands and
495 micromips_operands. Call validate_mips_insn and
496 validate_micromips_insn for macro instructions too.
497 Call validate_mips16_insn for MIPS16 instructions.
498 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
499 New functions.
500 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
501 them. Handle INSN_UDI.
502 (get_append_method): Use gpr_read_mask.
503
26545944
RS
5042013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
505
506 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
507 flags for MIPS16 and non-MIPS16 instructions.
508 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
509 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
510 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
511 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
512 and non-MIPS16 instructions. Fix formatting.
513
85fcb30f
RS
5142013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
515
516 * config/tc-mips.c (reg_needs_delay): Move later in file.
517 Use gpr_write_mask.
518 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
519
43234a1e
L
5202013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
521 Alexander Ivchenko <alexander.ivchenko@intel.com>
522 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
523 Sergey Lega <sergey.s.lega@intel.com>
524 Anna Tikhonova <anna.tikhonova@intel.com>
525 Ilya Tocar <ilya.tocar@intel.com>
526 Andrey Turetskiy <andrey.turetskiy@intel.com>
527 Ilya Verbin <ilya.verbin@intel.com>
528 Kirill Yukhin <kirill.yukhin@intel.com>
529 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
530
531 * config/tc-i386-intel.c (O_zmmword_ptr): New.
532 (i386_types): Add zmmword.
533 (i386_intel_simplify_register): Allow regzmm.
534 (i386_intel_simplify): Handle zmmwords.
535 (i386_intel_operand): Handle RC/SAE, vector operations and
536 zmmwords.
537 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
538 (struct RC_Operation): New.
539 (struct Mask_Operation): New.
540 (struct Broadcast_Operation): New.
541 (vex_prefix): Size of bytes increased to 4 to support EVEX
542 encoding.
543 (enum i386_error): Add new error codes: unsupported_broadcast,
544 broadcast_not_on_src_operand, broadcast_needed,
545 unsupported_masking, mask_not_on_destination, no_default_mask,
546 unsupported_rc_sae, rc_sae_operand_not_last_imm,
547 invalid_register_operand, try_vector_disp8.
548 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
549 rounding, broadcast, memshift.
550 (struct RC_name): New.
551 (RC_NamesTable): New.
552 (evexlig): New.
553 (evexwig): New.
554 (extra_symbol_chars): Add '{'.
555 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
556 (i386_operand_type): Add regzmm, regmask and vec_disp8.
557 (match_mem_size): Handle zmmwords.
558 (operand_type_match): Handle zmm-registers.
559 (mode_from_disp_size): Handle vec_disp8.
560 (fits_in_vec_disp8): New.
561 (md_begin): Handle {} properly.
562 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
563 (build_vex_prefix): Handle vrex.
564 (build_evex_prefix): New.
565 (process_immext): Adjust to properly handle EVEX.
566 (md_assemble): Add EVEX encoding support.
567 (swap_2_operands): Correctly handle operands with masking,
568 broadcasting or RC/SAE.
569 (check_VecOperands): Support EVEX features.
570 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
571 (match_template): Support regzmm and handle new error codes.
572 (process_suffix): Handle zmmwords and zmm-registers.
573 (check_byte_reg): Extend to zmm-registers.
574 (process_operands): Extend to zmm-registers.
575 (build_modrm_byte): Handle EVEX.
576 (output_insn): Adjust to properly handle EVEX case.
577 (disp_size): Handle vec_disp8.
578 (output_disp): Support compressed disp8*N evex feature.
579 (output_imm): Handle RC/SAE immediates properly.
580 (check_VecOperations): New.
581 (i386_immediate): Handle EVEX features.
582 (i386_index_check): Handle zmmwords and zmm-registers.
583 (RC_SAE_immediate): New.
584 (i386_att_operand): Handle EVEX features.
585 (parse_real_register): Add a check for ZMM/Mask registers.
586 (OPTION_MEVEXLIG): New.
587 (OPTION_MEVEXWIG): New.
588 (md_longopts): Add mevexlig and mevexwig.
589 (md_parse_option): Handle mevexlig and mevexwig options.
590 (md_show_usage): Add description for mevexlig and mevexwig.
591 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
592 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
593
a0046408
L
5942013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
595
596 * config/tc-i386.c (cpu_arch): Add .sha.
597 * doc/c-i386.texi: Document sha/.sha.
598
7e8b059b
L
5992013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
600 Kirill Yukhin <kirill.yukhin@intel.com>
601 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
602
603 * config/tc-i386.c (BND_PREFIX): New.
604 (struct _i386_insn): Add new field bnd_prefix.
605 (add_bnd_prefix): New.
606 (cpu_arch): Add MPX.
607 (i386_operand_type): Add regbnd.
608 (md_assemble): Handle BND prefixes.
609 (parse_insn): Likewise.
610 (output_branch): Likewise.
611 (output_jump): Likewise.
612 (build_modrm_byte): Handle regbnd.
613 (OPTION_MADD_BND_PREFIX): New.
614 (md_longopts): Add entry for 'madd-bnd-prefix'.
615 (md_parse_option): Handle madd-bnd-prefix option.
616 (md_show_usage): Add description for madd-bnd-prefix
617 option.
618 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
619
7fa9fcb6
TG
6202013-07-24 Tristan Gingold <gingold@adacore.com>
621
622 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
623 xcoff targets.
624
614eb277
AK
6252013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
626
627 * config/tc-s390.c (s390_machine): Don't force the .machine
628 argument to lower case.
629
e673710a
KT
6302013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
631
632 * config/tc-arm.c (s_arm_arch_extension): Improve error message
633 for invalid extension.
634
69091a2c
YZ
6352013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
636
637 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
638 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
639 (aarch64_abi): New variable.
640 (ilp32_p): Change to be a macro.
641 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
642 (struct aarch64_option_abi_value_table): New struct.
643 (aarch64_abis): New table.
644 (aarch64_parse_abi): New function.
645 (aarch64_long_opts): Add entry for -mabi=.
646 * doc/as.texinfo (Target AArch64 options): Document -mabi.
647 * doc/c-aarch64.texi: Likewise.
648
faf786e6
NC
6492013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
650
651 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
652 unsigned comparison.
653
f0c00282
NC
6542013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
655
cbe02d4f 656 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 657 RX610.
cbe02d4f 658 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
659 check floating point operation support for target RX100 and
660 RX200.
cbe02d4f
AM
661 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
662 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
663 RX200, RX600, and RX610
f0c00282 664
8c997c27
NC
6652013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
666
667 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
668
8be59acb
NC
6692013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
670
671 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
672 * doc/c-avr.texi: Likewise.
673
4a06e5a2
RS
6742013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
675
676 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
677 error with older GCCs.
678 (mips16_macro_build): Dereference args.
679
a92713e6
RS
6802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
683 New functions, split out from...
684 (reg_lookup): ...here. Remove itbl support.
685 (reglist_lookup): Delete.
686 (mips_operand_token_type): New enum.
687 (mips_operand_token): New structure.
688 (mips_operand_tokens): New variable.
689 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
690 (mips_parse_arguments): New functions.
691 (md_begin): Initialize mips_operand_tokens.
692 (mips_arg_info): Add a token field. Remove optional_reg field.
693 (match_char, match_expression): New functions.
694 (match_const_int): Use match_expression. Remove "s" argument
695 and return a boolean result. Remove O_register handling.
696 (match_regno, match_reg, match_reg_range): New functions.
697 (match_int_operand, match_mapped_int_operand, match_msb_operand)
698 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
699 (match_addiusp_operand, match_clo_clz_dest_operand)
700 (match_lwm_swm_list_operand, match_entry_exit_operand)
701 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
702 (match_tied_reg_operand): Remove "s" argument and return a boolean
703 result. Match tokens rather than text. Update calls to
704 match_const_int. Rely on match_regno to call check_regno.
705 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
706 "arg" argument. Return a boolean result.
707 (parse_float_constant): Replace with...
708 (match_float_constant): ...this new function.
709 (match_operand): Remove "s" argument and return a boolean result.
710 Update calls to subfunctions.
711 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
712 rather than string-parsing routines. Update handling of optional
713 registers for token scheme.
714
89565f1b
RS
7152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
716
717 * config/tc-mips.c (parse_float_constant): Split out from...
718 (mips_ip): ...here.
719
3c14a432
RS
7202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
721
722 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
723 Delete.
724
364215c8
RS
7252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
726
727 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
728 (match_entry_exit_operand): New function.
729 (match_save_restore_list_operand): Likewise.
730 (match_operand): Use them.
731 (check_absolute_expr): Delete.
732 (mips16_ip): Rewrite main parsing loop to use mips_operands.
733
9e12b7a2
RS
7342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
735
736 * config/tc-mips.c: Enable functions commented out in previous patch.
737 (SKIP_SPACE_TABS): Move further up file.
738 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
739 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
740 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
741 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
742 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
743 (micromips_imm_b_map, micromips_imm_c_map): Delete.
744 (mips_lookup_reg_pair): Delete.
745 (macro): Use report_bad_range and report_bad_field.
746 (mips_immed, expr_const_in_range): Delete.
747 (mips_ip): Rewrite main parsing loop to use new functions.
748
a1d78564
RS
7492013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
750
751 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
752 Change return type to bfd_boolean.
753 (report_bad_range, report_bad_field): New functions.
754 (mips_arg_info): New structure.
755 (match_const_int, convert_reg_type, check_regno, match_int_operand)
756 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
757 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
758 (match_addiusp_operand, match_clo_clz_dest_operand)
759 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
760 (match_pc_operand, match_tied_reg_operand, match_operand)
761 (check_completed_insn): New functions, commented out for now.
762
e077a1c8
RS
7632013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
764
765 * config/tc-mips.c (insn_insert_operand): New function.
766 (macro_build, mips16_macro_build): Put null character check
767 in the for loop and convert continues to breaks. Use operand
768 structures to handle constant operands.
769
ab902481
RS
7702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
771
772 * config/tc-mips.c (validate_mips_insn): Move further up file.
773 Add insn_bits and decode_operand arguments. Use the mips_operand
774 fields to work out which bits an operand occupies. Detect double
775 definitions.
776 (validate_micromips_insn): Move further up file. Call into
777 validate_mips_insn.
778
2f8b73cc
RS
7792013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
780
781 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
782
c8276761
RS
7832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
784
785 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
786 and "~".
787 (macro): Update accordingly.
788
77bd4346
RS
7892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
790
791 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
792 (imm_reloc): Delete.
793 (md_assemble): Remove imm_reloc handling.
794 (mips_ip): Update commentary. Use offset_expr and offset_reloc
795 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
796 Use a temporary array rather than imm_reloc when parsing
797 constant expressions. Remove imm_reloc initialization.
798 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
799 for the relaxable field. Use a relax_char variable to track the
800 type of this field. Remove imm_reloc initialization.
801
cc537e56
RS
8022013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
803
804 * config/tc-mips.c (mips16_ip): Handle "I".
805
ba92f887
MR
8062013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
807
808 * config/tc-mips.c (mips_flag_nan2008): New variable.
809 (options): Add OPTION_NAN enum value.
810 (md_longopts): Handle it.
811 (md_parse_option): Likewise.
812 (s_nan): New function.
813 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
814 (md_show_usage): Add -mnan.
815
816 * doc/as.texinfo (Overview): Add -mnan.
817 * doc/c-mips.texi (MIPS Opts): Document -mnan.
818 (MIPS NaN Encodings): New node. Document .nan directive.
819 (MIPS-Dependent): List the new node.
820
c1094734
TG
8212013-07-09 Tristan Gingold <gingold@adacore.com>
822
823 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
824
0cbbe1b8
RS
8252013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
828 for 'A' and assume that the constant has been elided if the result
829 is an O_register.
830
f2ae14a1
RS
8312013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
832
833 * config/tc-mips.c (gprel16_reloc_p): New function.
834 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
835 BFD_RELOC_UNUSED.
836 (offset_high_part, small_offset_p): New functions.
837 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
838 register load and store macros, handle the 16-bit offset case first.
839 If a 16-bit offset is not suitable for the instruction we're
840 generating, load it into the temporary register using
841 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
842 M_L_DAB code once the address has been constructed. For double load
843 and store macros, again handle the 16-bit offset case first.
844 If the second register cannot be accessed from the same high
845 part as the first, load it into AT using ADDRESS_ADDI_INSN.
846 Fix the handling of LD in cases where the first register is the
847 same as the base. Also handle the case where the offset is
848 not 16 bits and the second register cannot be accessed from the
849 same high part as the first. For unaligned loads and stores,
850 fuse the offbits == 12 and old "ab" handling. Apply this handling
851 whenever the second offset needs a different high part from the first.
852 Construct the offset using ADDRESS_ADDI_INSN where possible,
853 for offbits == 16 as well as offbits == 12. Use offset_reloc
854 when constructing the individual loads and stores.
855 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
856 and offset_reloc before matching against a particular opcode.
857 Handle elided 'A' constants. Allow 'A' constants to use
858 relocation operators.
859
5c324c16
RS
8602013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
861
862 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
863 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
864 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
865
23e69e47
RS
8662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
867
868 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
869 Require the msb to be <= 31 for "+s". Check that the size is <= 31
870 for both "+s" and "+S".
871
27c5c572
RS
8722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
873
874 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
875 (mips_ip, mips16_ip): Handle "+i".
876
e76ff5ab
RS
8772013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
878
879 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
880 (micromips_to_32_reg_h_map): Rename to...
881 (micromips_to_32_reg_h_map1): ...this.
882 (micromips_to_32_reg_i_map): Rename to...
883 (micromips_to_32_reg_h_map2): ...this.
884 (mips_lookup_reg_pair): New function.
885 (gpr_write_mask, macro): Adjust after above renaming.
886 (validate_micromips_insn): Remove "mi" handling.
887 (mips_ip): Likewise. Parse both registers in a pair for "mh".
888
fa7616a4
RS
8892013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
892 (mips_ip): Remove "+D" and "+T" handling.
893
fb798c50
AK
8942013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
895
896 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
897 relocs.
898
2c0a3565
MS
8992013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
900
4aa2c5e2
MS
901 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
902
9032013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
904
2c0a3565
MS
905 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
906 (aarch64_force_relocation): Likewise.
907
f40da81b
AM
9082013-07-02 Alan Modra <amodra@gmail.com>
909
910 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
911
81566a9b
MR
9122013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
913
914 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
915 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
916 Replace @sc{mips16} with literal `MIPS16'.
917 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
918
a6bb11b2
YZ
9192013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
920
921 * config/tc-aarch64.c (reloc_table): Replace
922 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
923 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
924 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
925 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
926 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
927 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
928 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
929 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
930 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
931 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
932 (aarch64_force_relocation): Likewise.
933
cec5225b
YZ
9342013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
935
936 * config/tc-aarch64.c (ilp32_p): New static variable.
937 (elf64_aarch64_target_format): Return the target according to the
938 value of 'ilp32_p'.
939 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
940 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
941 (aarch64_dwarf2_addr_size): New function.
942 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
943 (DWARF2_ADDR_SIZE): New define.
944
e335d9cb
RS
9452013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
946
947 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
948
18870af7
RS
9492013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
950
951 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
952
833794fc
MR
9532013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
954
955 * config/tc-mips.c (mips_set_options): Add insn32 member.
956 (mips_opts): Initialize it.
957 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
958 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
959 (md_longopts): Add "minsn32" and "mno-insn32" options.
960 (is_size_valid): Handle insn32 mode.
961 (md_assemble): Pass instruction string down to macro.
962 (brk_fmt): Add second dimension and insn32 mode initializers.
963 (mfhl_fmt): Likewise.
964 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
965 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
966 (macro_build_jalr, move_register): Handle insn32 mode.
967 (macro_build_branch_rs): Likewise.
968 (macro): Handle insn32 mode.
969 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
970 (mips_ip): Handle insn32 mode.
971 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
972 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
973 (mips_handle_align): Handle insn32 mode.
974 (md_show_usage): Add -minsn32 and -mno-insn32.
975
976 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
977 -mno-insn32 options.
978 (-minsn32, -mno-insn32): New options.
979 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
980 options.
981 (MIPS assembly options): New node. Document .set insn32 and
982 .set noinsn32.
983 (MIPS-Dependent): List the new node.
984
d1706f38
NC
9852013-06-25 Nick Clifton <nickc@redhat.com>
986
987 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
988 the PC in indirect addressing on 430xv2 parts.
989 (msp430_operands): Add version test to hardware bug encoding
990 restrictions.
991
477330fc
RM
9922013-06-24 Roland McGrath <mcgrathr@google.com>
993
d996d970
RM
994 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
995 so it skips whitespace before it.
996 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
997
477330fc
RM
998 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
999 (arm_reg_parse_multi): Skip whitespace first.
1000 (parse_reg_list): Likewise.
1001 (parse_vfp_reg_list): Likewise.
1002 (s_arm_unwind_save_mmxwcg): Likewise.
1003
24382199
NC
10042013-06-24 Nick Clifton <nickc@redhat.com>
1005
1006 PR gas/15623
1007 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1008
c3678916
RS
10092013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1010
1011 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1012
42429eac
RS
10132013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1014
1015 * config/tc-mips.c: Assert that offsetT and valueT are at least
1016 8 bytes in size.
1017 (GPR_SMIN, GPR_SMAX): New macros.
1018 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1019
f3ded42a
RS
10202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1021
1022 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1023 conditions. Remove any code deselected by them.
1024 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1025
e8044f35
RS
10262013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1027
1028 * NEWS: Note removal of ECOFF support.
1029 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1030 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1031 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1032 * Makefile.in: Regenerate.
1033 * configure.in: Remove MIPS ECOFF references.
1034 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1035 Delete cases.
1036 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1037 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1038 (mips-*-*): ...this single case.
1039 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1040 MIPS emulations to be e-mipself*.
1041 * configure: Regenerate.
1042 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1043 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1044 (mips-*-sysv*): Remove coff and ecoff cases.
1045 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1046 * ecoff.c: Remove reference to MIPS ECOFF.
1047 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1048 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1049 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1050 (mips_hi_fixup): Tweak comment.
1051 (append_insn): Require a howto.
1052 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1053
98508b2a
RS
10542013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1055
1056 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1057 Use "CPU" instead of "cpu".
1058 * doc/c-mips.texi: Likewise.
1059 (MIPS Opts): Rename to MIPS Options.
1060 (MIPS option stack): Rename to MIPS Option Stack.
1061 (MIPS ASE instruction generation overrides): Rename to
1062 MIPS ASE Instruction Generation Overrides (for now).
1063 (MIPS floating-point): Rename to MIPS Floating-Point.
1064
fc16f8cc
RS
10652013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1066
1067 * doc/c-mips.texi (MIPS Macros): New section.
1068 (MIPS Object): Replace with...
1069 (MIPS Small Data): ...this new section.
1070
5a7560b5
RS
10712013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1072
1073 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1074 Capitalize name. Use @kindex instead of @cindex for .set entries.
1075
a1b86ab7
RS
10762013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1077
1078 * doc/c-mips.texi (MIPS Stabs): Remove section.
1079
c6278170
RS
10802013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1081
1082 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1083 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1084 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1085 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1086 (mips_ase): New structure.
1087 (mips_ases): New table.
1088 (FP64_ASES): New macro.
1089 (mips_ase_groups): New array.
1090 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1091 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1092 functions.
1093 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1094 (md_parse_option): Use mips_ases and mips_set_ase instead of
1095 separate case statements for each ASE option.
1096 (mips_after_parse_args): Use FP64_ASES. Use
1097 mips_check_isa_supports_ases to check the ASEs against
1098 other options.
1099 (s_mipsset): Use mips_ases and mips_set_ase instead of
1100 separate if statements for each ASE option. Use
1101 mips_check_isa_supports_ases, even when a non-ASE option
1102 is specified.
1103
63a4bc21
KT
11042013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1105
1106 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1107
c31f3936
RS
11082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1109
1110 * config/tc-mips.c (md_shortopts, options, md_longopts)
1111 (md_longopts_size): Move earlier in file.
1112
846ef2d0
RS
11132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1114
1115 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1116 with a single "ase" bitmask.
1117 (mips_opts): Update accordingly.
1118 (file_ase, file_ase_explicit): New variables.
1119 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1120 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1121 (ISA_HAS_ROR): Adjust for mips_set_options change.
1122 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1123 (mips_ip): Adjust for mips_set_options change.
1124 (md_parse_option): Likewise. Update file_ase_explicit.
1125 (mips_after_parse_args): Adjust for mips_set_options change.
1126 Use bitmask operations to select the default ASEs. Set file_ase
1127 rather than individual per-ASE variables.
1128 (s_mipsset): Adjust for mips_set_options change.
1129 (mips_elf_final_processing): Test file_ase rather than
1130 file_ase_mdmx. Remove commented-out code.
1131
d16afab6
RS
11322013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1133
1134 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1135 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1136 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1137 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1138 (mips_after_parse_args): Use the new "ase" field to choose
1139 the default ASEs.
1140 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1141 "ase" field.
1142
e83a675f
RE
11432013-06-18 Richard Earnshaw <rearnsha@arm.com>
1144
1145 * config/tc-arm.c (symbol_preemptible): New function.
1146 (relax_branch): Use it.
1147
7f3c4072
CM
11482013-06-17 Catherine Moore <clm@codesourcery.com>
1149 Maciej W. Rozycki <macro@codesourcery.com>
1150 Chao-Ying Fu <fu@mips.com>
1151
1152 * config/tc-mips.c (mips_set_options): Add ase_eva.
1153 (mips_set_options mips_opts): Add ase_eva.
1154 (file_ase_eva): Declare.
1155 (ISA_SUPPORTS_EVA_ASE): Define.
1156 (IS_SEXT_9BIT_NUM): Define.
1157 (MIPS_CPU_ASE_EVA): Define.
1158 (is_opcode_valid): Add support for ase_eva.
1159 (macro_build): Likewise.
1160 (macro): Likewise.
1161 (validate_mips_insn): Likewise.
1162 (validate_micromips_insn): Likewise.
1163 (mips_ip): Likewise.
1164 (options): Add OPTION_EVA and OPTION_NO_EVA.
1165 (md_longopts): Add -meva and -mno-eva.
1166 (md_parse_option): Process new options.
1167 (mips_after_parse_args): Check for valid EVA combinations.
1168 (s_mipsset): Likewise.
1169
e410add4
RS
11702013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1171
1172 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1173 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1174 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1175 (dwarf2_gen_line_info_1): Update call accordingly.
1176 (dwarf2_move_insn): New function.
1177 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1178
6a50d470
RS
11792013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1180
1181 Revert:
1182
1183 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1184
1185 PR gas/13024
1186 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1187 (dwarf2_gen_line_info_1): Delete.
1188 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1189 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1190 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1191 (dwarf2_directive_loc): Push previous .locs instead of generating
1192 them immediately.
1193
f122319e
CF
11942013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1195
1196 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1197 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1198
909c7f9c
NC
11992013-06-13 Nick Clifton <nickc@redhat.com>
1200
1201 PR gas/15602
1202 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1203 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1204 function. Generates an error if the adjusted offset is out of a
1205 16-bit range.
1206
5d5755a7
SL
12072013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1208
1209 * config/tc-nios2.c (md_apply_fix): Mask constant
1210 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1211
3bf0dbfb
MR
12122013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1213
1214 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1215 MIPS-3D instructions either.
1216 (md_convert_frag): Update the COPx branch mask accordingly.
1217
1218 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1219 option.
1220 * doc/as.texinfo (Overview): Add --relax-branch and
1221 --no-relax-branch.
1222 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1223 --no-relax-branch.
1224
9daf7bab
SL
12252013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1226
1227 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1228 omitted.
1229
d301a56b
RS
12302013-06-08 Catherine Moore <clm@codesourcery.com>
1231
1232 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1233 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1234 (append_insn): Change INSN_xxxx to ASE_xxxx.
1235
7bab7634
DC
12362013-06-01 George Thomas <george.thomas@atmel.com>
1237
cbe02d4f 1238 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1239 AVR_ISA_XMEGAU
1240
f60cf82f
L
12412013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1242
1243 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1244 for ELF.
1245
a3f278e2
CM
12462013-05-31 Paul Brook <paul@codesourcery.com>
1247
a3f278e2
CM
1248 * config/tc-mips.c (s_ehword): New.
1249
067ec077
CM
12502013-05-30 Paul Brook <paul@codesourcery.com>
1251
1252 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1253
d6101ac2
MR
12542013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1255
1256 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1257 convert relocs who have no relocatable field either. Rephrase
1258 the conditional so that the PC-relative check is only applied
1259 for REL targets.
1260
f19ccbda
MR
12612013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1262
1263 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1264 calculation.
1265
418009c2
YZ
12662013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1267
1268 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1269 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1270 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1271 (md_apply_fix): Likewise.
1272 (aarch64_force_relocation): Likewise.
1273
0a8897c7
KT
12742013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1275
1276 * config/tc-arm.c (it_fsm_post_encode): Improve
1277 warning messages about deprecated IT block formats.
1278
89d2a2a3
MS
12792013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1280
1281 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1282 inside fx_done condition.
1283
c77c0862
RS
12842013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1285
1286 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1287
c0637f3a
PB
12882013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1289
1290 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1291 and clean up warning when using PRINT_OPCODE_TABLE.
1292
5656a981
AM
12932013-05-20 Alan Modra <amodra@gmail.com>
1294
1295 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1296 and data fixups performing shift/high adjust/sign extension on
1297 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1298 when writing data fixups rather than recalculating size.
1299
997b26e8
JBG
13002013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1301
1302 * doc/c-msp430.texi: Fix typo.
1303
9f6e76f4
TG
13042013-05-16 Tristan Gingold <gingold@adacore.com>
1305
1306 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1307 are also TOC symbols.
1308
638d3803
NC
13092013-05-16 Nick Clifton <nickc@redhat.com>
1310
1311 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1312 Add -mcpu command to specify core type.
997b26e8 1313 * doc/c-msp430.texi: Update documentation.
638d3803 1314
b015e599
AP
13152013-05-09 Andrew Pinski <apinski@cavium.com>
1316
1317 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1318 (mips_opts): Update for the new field.
1319 (file_ase_virt): New variable.
1320 (ISA_SUPPORTS_VIRT_ASE): New macro.
1321 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1322 (MIPS_CPU_ASE_VIRT): New define.
1323 (is_opcode_valid): Handle ase_virt.
1324 (macro_build): Handle "+J".
1325 (validate_mips_insn): Likewise.
1326 (mips_ip): Likewise.
1327 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1328 (md_longopts): Add mvirt and mnovirt
1329 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1330 (mips_after_parse_args): Handle ase_virt field.
1331 (s_mipsset): Handle "virt" and "novirt".
1332 (mips_elf_final_processing): Add a comment about virt ASE might need
1333 a new flag.
1334 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1335 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1336 Document ".set virt" and ".set novirt".
1337
da8094d7
AM
13382013-05-09 Alan Modra <amodra@gmail.com>
1339
1340 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1341 control of operand flag bits.
1342
c5f8c205
AM
13432013-05-07 Alan Modra <amodra@gmail.com>
1344
1345 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1346 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1347 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1348 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1349 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1350 Shift and sign-extend fieldval for use by some VLE reloc
1351 operand->insert functions.
1352
b47468a6
CM
13532013-05-06 Paul Brook <paul@codesourcery.com>
1354 Catherine Moore <clm@codesourcery.com>
1355
c5f8c205
AM
1356 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1357 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1358 (md_apply_fix): Likewise.
1359 (tc_gen_reloc): Likewise.
1360
2de39019
CM
13612013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1362
1363 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1364 (mips_fix_adjustable): Adjust pc-relative check to use
1365 limited_pc_reloc_p.
1366
754e2bb9
RS
13672013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1368
1369 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1370 (s_mips_stab): Do not restrict to stabn only.
1371
13761a11
NC
13722013-05-02 Nick Clifton <nickc@redhat.com>
1373
1374 * config/tc-msp430.c: Add support for the MSP430X architecture.
1375 Add code to insert a NOP instruction after any instruction that
1376 might change the interrupt state.
1377 Add support for the LARGE memory model.
1378 Add code to initialise the .MSP430.attributes section.
1379 * config/tc-msp430.h: Add support for the MSP430X architecture.
1380 * doc/c-msp430.texi: Document the new -mL and -mN command line
1381 options.
1382 * NEWS: Mention support for the MSP430X architecture.
1383
df26367c
MR
13842013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1385
1386 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1387 alpha*-*-linux*ecoff*.
1388
f02d8318
CF
13892013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1390
1391 * config/tc-mips.c (mips_ip): Add sizelo.
1392 For "+C", "+G", and "+H", set sizelo and compare against it.
1393
b40bf0a2
NC
13942013-04-29 Nick Clifton <nickc@redhat.com>
1395
1396 * as.c (Options): Add -gdwarf-sections.
1397 (parse_args): Likewise.
1398 * as.h (flag_dwarf_sections): Declare.
1399 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1400 (process_entries): When -gdwarf-sections is enabled generate
1401 fragmentary .debug_line sections.
1402 (out_debug_line): Set the section for the .debug_line section end
1403 symbol.
1404 * doc/as.texinfo: Document -gdwarf-sections.
1405 * NEWS: Mention -gdwarf-sections.
1406
8eeccb77 14072013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1408
1409 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1410 according to the target parameter. Don't call s_segm since s_segm
1411 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1412 initialized yet.
1413 (md_begin): Call s_segm according to target parameter from command
1414 line.
1415
49926cd0
AM
14162013-04-25 Alan Modra <amodra@gmail.com>
1417
1418 * configure.in: Allow little-endian linux.
1419 * configure: Regenerate.
1420
e3031850
SL
14212013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1422
1423 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1424 "fstatus" control register to "eccinj".
1425
cb948fc0
KT
14262013-04-19 Kai Tietz <ktietz@redhat.com>
1427
1428 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1429
4455e9ad
JB
14302013-04-15 Julian Brown <julian@codesourcery.com>
1431
1432 * expr.c (add_to_result, subtract_from_result): Make global.
1433 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1434 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1435 subtract_from_result to handle extra bit of precision for .sleb128
1436 directive operands.
1437
956a6ba3
JB
14382013-04-10 Julian Brown <julian@codesourcery.com>
1439
1440 * read.c (convert_to_bignum): Add sign parameter. Use it
1441 instead of X_unsigned to determine sign of resulting bignum.
1442 (emit_expr): Pass extra argument to convert_to_bignum.
1443 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1444 X_extrabit to convert_to_bignum.
1445 (parse_bitfield_cons): Set X_extrabit.
1446 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1447 Initialise X_extrabit field as appropriate.
1448 (add_to_result): New.
1449 (subtract_from_result): New.
1450 (expr): Use above.
1451 * expr.h (expressionS): Add X_extrabit field.
1452
eb9f3f00
JB
14532013-04-10 Jan Beulich <jbeulich@suse.com>
1454
1455 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1456 register being PC when is_t or writeback, and use distinct
1457 diagnostic for the latter case.
1458
ccb84d65
JB
14592013-04-10 Jan Beulich <jbeulich@suse.com>
1460
1461 * gas/config/tc-arm.c (parse_operands): Re-write
1462 po_barrier_or_imm().
1463 (do_barrier): Remove bogus constraint().
1464 (do_t_barrier): Remove.
1465
4d13caa0
NC
14662013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1467
1468 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1469 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1470 ATmega2564RFR2
1471 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1472
16d02dc9
JB
14732013-04-09 Jan Beulich <jbeulich@suse.com>
1474
1475 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1476 Use local variable Rt in more places.
1477 (do_vmsr): Accept all control registers.
1478
05ac0ffb
JB
14792013-04-09 Jan Beulich <jbeulich@suse.com>
1480
1481 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1482 if there was none specified for moves between scalar and core
1483 register.
1484
2d51fb74
JB
14852013-04-09 Jan Beulich <jbeulich@suse.com>
1486
1487 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1488 NEON_ALL_LANES case.
1489
94dcf8bf
JB
14902013-04-08 Jan Beulich <jbeulich@suse.com>
1491
1492 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1493 PC-relative VSTR.
1494
1472d06f
JB
14952013-04-08 Jan Beulich <jbeulich@suse.com>
1496
1497 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1498 entry to sp_fiq.
1499
0c76cae8
AM
15002013-04-03 Alan Modra <amodra@gmail.com>
1501
1502 * doc/as.texinfo: Add support to generate man options for h8300.
1503 * doc/c-h8300.texi: Likewise.
1504
92eb40d9
RR
15052013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1506
1507 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1508 Cortex-A57.
1509
51dcdd4d
NC
15102013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1511
1512 PR binutils/15068
1513 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1514
c5d685bf
NC
15152013-03-26 Nick Clifton <nickc@redhat.com>
1516
9b978282
NC
1517 PR gas/15295
1518 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1519 start of the file each time.
1520
c5d685bf
NC
1521 PR gas/15178
1522 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1523 FreeBSD targets.
1524
9699c833
TG
15252013-03-26 Douglas B Rupp <rupp@gnat.com>
1526
1527 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1528 after fixup.
1529
4755303e
WN
15302013-03-21 Will Newton <will.newton@linaro.org>
1531
1532 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1533 pc-relative str instructions in Thumb mode.
1534
81f5558e
NC
15352013-03-21 Michael Schewe <michael.schewe@gmx.net>
1536
1537 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1538 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1539 R_H8_DISP32A16.
1540 * config/tc-h8300.h: Remove duplicated defines.
1541
71863e73
NC
15422013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1543
1544 PR gas/15282
1545 * tc-avr.c (mcu_has_3_byte_pc): New function.
1546 (tc_cfi_frame_initial_instructions): Call it to find return
1547 address size.
1548
795b8e6b
NC
15492013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1550
1551 PR gas/15095
1552 * config/tc-tic6x.c (tic6x_try_encode): Handle
1553 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1554 encode register pair numbers when required.
1555
ba86b375
WN
15562013-03-15 Will Newton <will.newton@linaro.org>
1557
1558 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1559 in vstr in Thumb mode for pre-ARMv7 cores.
1560
9e6f3811
AS
15612013-03-14 Andreas Schwab <schwab@suse.de>
1562
1563 * doc/c-arc.texi (ARC Directives): Revert last change and use
1564 @itemize instead of @table.
1565 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1566
b10bf8c5
NC
15672013-03-14 Nick Clifton <nickc@redhat.com>
1568
1569 PR gas/15273
1570 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1571 NULL message, instead just check ARM_CPU_IS_ANY directly.
1572
ba724cfc
NC
15732013-03-14 Nick Clifton <nickc@redhat.com>
1574
1575 PR gas/15212
9e6f3811 1576 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1577 for table format.
1578 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1579 to the @item directives.
1580 (ARM-Neon-Alignment): Move to correct place in the document.
1581 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1582 formatting.
1583 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1584 @smallexample.
1585
531a94fd
SL
15862013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1587
1588 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1589 case. Add default BAD_CASE to switch.
1590
dad60f8e
SL
15912013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1592
1593 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1594 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1595
dd5181d5
KT
15962013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1597
1598 * config/tc-arm.c (crc_ext_armv8): New feature set.
1599 (UNPRED_REG): New macro.
1600 (do_crc32_1): New function.
1601 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1602 do_crc32ch, do_crc32cw): Likewise.
1603 (TUEc): New macro.
1604 (insns): Add entries for crc32 mnemonics.
1605 (arm_extensions): Add entry for crc.
1606
8e723a10
CLT
16072013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1608
1609 * write.h (struct fix): Add fx_dot_frag field.
1610 (dot_frag): Declare.
1611 * write.c (dot_frag): New variable.
1612 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1613 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1614 * expr.c (expr): Save value of frag_now in dot_frag when setting
1615 dot_value.
1616 * read.c (emit_expr): Likewise. Delete comments.
1617
be05d201
L
16182013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1619
1620 * config/tc-i386.c (flag_code_names): Removed.
1621 (i386_index_check): Rewrote.
1622
62b0d0d5
YZ
16232013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1624
1625 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1626 add comment.
1627 (aarch64_double_precision_fmovable): New function.
1628 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1629 function; handle hexadecimal representation of IEEE754 encoding.
1630 (parse_operands): Update the call to parse_aarch64_imm_float.
1631
165de32a
L
16322013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1633
1634 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1635 (check_hle): Updated.
1636 (md_assemble): Likewise.
1637 (parse_insn): Likewise.
1638
d5de92cf
L
16392013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1640
1641 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1642 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1643 (parse_insn): Remove expecting_string_instruction. Set
1644 i.rep_prefix.
1645
e60bb1dd
YZ
16462013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1647
1648 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1649
aeebdd9b
YZ
16502013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1651
1652 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1653 for system registers.
1654
4107ae22
DD
16552013-02-27 DJ Delorie <dj@redhat.com>
1656
1657 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1658 (rl78_op): Handle %code().
1659 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1660 (tc_gen_reloc): Likwise; convert to a computed reloc.
1661 (md_apply_fix): Likewise.
1662
151fa98f
NC
16632013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1664
1665 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1666
70a8bc5b 16672013-02-25 Terry Guo <terry.guo@arm.com>
1668
1669 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1670 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1671 list of accepted CPUs.
1672
5c111e37
L
16732013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1674
1675 PR gas/15159
1676 * config/tc-i386.c (cpu_arch): Add ".smap".
1677
1678 * doc/c-i386.texi: Document smap.
1679
8a75745d
MR
16802013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1681
1682 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1683 mips_assembling_insn appropriately.
1684 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1685
79850f26
MR
16862013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1687
cf29fc61 1688 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1689 extraneous braces.
1690
4c261dff
NC
16912013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1692
5c111e37 1693 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1694
ea33f281
NC
16952013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1696
1697 * configure.tgt: Add nios2-*-rtems*.
1698
a1ccaec9
YZ
16992013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1700
1701 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1702 NULL.
1703
0aa27725
RS
17042013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1705
1706 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1707 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1708
da4339ed
NC
17092013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1710
1711 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1712 core.
1713
36591ba1 17142013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1715 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1716
1717 Based on patches from Altera Corporation.
1718
1719 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1720 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1721 * Makefile.in: Regenerated.
1722 * configure.tgt: Add case for nios2*-linux*.
1723 * config/obj-elf.c: Conditionally include elf/nios2.h.
1724 * config/tc-nios2.c: New file.
1725 * config/tc-nios2.h: New file.
1726 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1727 * doc/Makefile.in: Regenerated.
1728 * doc/all.texi: Set NIOSII.
1729 * doc/as.texinfo (Overview): Add Nios II options.
1730 (Machine Dependencies): Include c-nios2.texi.
1731 * doc/c-nios2.texi: New file.
1732 * NEWS: Note Altera Nios II support.
1733
94d4433a
AM
17342013-02-06 Alan Modra <amodra@gmail.com>
1735
1736 PR gas/14255
1737 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1738 Don't skip fixups with fx_subsy non-NULL.
1739 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1740 with fx_subsy non-NULL.
1741
ace9af6f
L
17422013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1743
1744 * doc/c-metag.texi: Add "@c man" markers.
1745
89d67ed9
AM
17462013-02-04 Alan Modra <amodra@gmail.com>
1747
1748 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1749 related code.
1750 (TC_ADJUST_RELOC_COUNT): Delete.
1751 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1752
89072bd6
AM
17532013-02-04 Alan Modra <amodra@gmail.com>
1754
1755 * po/POTFILES.in: Regenerate.
1756
f9b2d544
NC
17572013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1758
1759 * config/tc-metag.c: Make SWAP instruction less permissive with
1760 its operands.
1761
392ca752
DD
17622013-01-29 DJ Delorie <dj@redhat.com>
1763
1764 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1765 relocs in .word/.etc statements.
1766
427d0db6
RM
17672013-01-29 Roland McGrath <mcgrathr@google.com>
1768
1769 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1770 immediate value for 8-bit offset" error so it shows line info.
1771
4faf939a
JM
17722013-01-24 Joseph Myers <joseph@codesourcery.com>
1773
1774 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1775 for 64-bit output.
1776
78c8d46c
NC
17772013-01-24 Nick Clifton <nickc@redhat.com>
1778
1779 * config/tc-v850.c: Add support for e3v5 architecture.
1780 * doc/c-v850.texi: Mention new support.
1781
fb5b7503
NC
17822013-01-23 Nick Clifton <nickc@redhat.com>
1783
1784 PR gas/15039
1785 * config/tc-avr.c: Include dwarf2dbg.h.
1786
8ce3d284
L
17872013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1788
1789 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1790 (tc_i386_fix_adjustable): Likewise.
1791 (lex_got): Likewise.
1792 (tc_gen_reloc): Likewise.
1793
f5555712
YZ
17942013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1795
1796 * config/tc-aarch64.c (output_operand_error_record): Change to output
1797 the out-of-range error message as value-expected message if there is
1798 only one single value in the expected range.
1799 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1800 LSL #0 as a programmer-friendly feature.
1801
8fd4256d
L
18022013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1803
1804 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1805 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1806 BFD_RELOC_64_SIZE relocations.
1807 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1808 for it.
1809 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1810 relocations against local symbols.
1811
a5840dce
AM
18122013-01-16 Alan Modra <amodra@gmail.com>
1813
1814 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1815 finding some sort of toc syntax error, and break to avoid
1816 compiler uninit warning.
1817
af89796a
L
18182013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1819
1820 PR gas/15019
1821 * config/tc-i386.c (lex_got): Increment length by 1 if the
1822 relocation token is removed.
1823
dd42f060
NC
18242013-01-15 Nick Clifton <nickc@redhat.com>
1825
1826 * config/tc-v850.c (md_assemble): Allow signed values for
1827 V850E_IMMEDIATE.
1828
464e3686
SK
18292013-01-11 Sean Keys <skeys@ipdatasys.com>
1830
1831 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1832 git to cvs.
464e3686 1833
5817ffd1
PB
18342013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1835
1836 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1837 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1838 * config/tc-ppc.c (md_show_usage): Likewise.
1839 (ppc_handle_align): Handle power8's group ending nop.
1840
f4b1f6a9
SK
18412013-01-10 Sean Keys <skeys@ipdatasys.com>
1842
1843 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1844 that the assember exits after the opcodes have been printed.
f4b1f6a9 1845
34bca508
L
18462013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1847
1848 * app.c: Remove trailing white spaces.
1849 * as.c: Likewise.
1850 * as.h: Likewise.
1851 * cond.c: Likewise.
1852 * dw2gencfi.c: Likewise.
1853 * dwarf2dbg.h: Likewise.
1854 * ecoff.c: Likewise.
1855 * input-file.c: Likewise.
1856 * itbl-lex.h: Likewise.
1857 * output-file.c: Likewise.
1858 * read.c: Likewise.
1859 * sb.c: Likewise.
1860 * subsegs.c: Likewise.
1861 * symbols.c: Likewise.
1862 * write.c: Likewise.
1863 * config/tc-i386.c: Likewise.
1864 * doc/Makefile.am: Likewise.
1865 * doc/Makefile.in: Likewise.
1866 * doc/c-aarch64.texi: Likewise.
1867 * doc/c-alpha.texi: Likewise.
1868 * doc/c-arc.texi: Likewise.
1869 * doc/c-arm.texi: Likewise.
1870 * doc/c-avr.texi: Likewise.
1871 * doc/c-bfin.texi: Likewise.
1872 * doc/c-cr16.texi: Likewise.
1873 * doc/c-d10v.texi: Likewise.
1874 * doc/c-d30v.texi: Likewise.
1875 * doc/c-h8300.texi: Likewise.
1876 * doc/c-hppa.texi: Likewise.
1877 * doc/c-i370.texi: Likewise.
1878 * doc/c-i386.texi: Likewise.
1879 * doc/c-i860.texi: Likewise.
1880 * doc/c-m32c.texi: Likewise.
1881 * doc/c-m32r.texi: Likewise.
1882 * doc/c-m68hc11.texi: Likewise.
1883 * doc/c-m68k.texi: Likewise.
1884 * doc/c-microblaze.texi: Likewise.
1885 * doc/c-mips.texi: Likewise.
1886 * doc/c-msp430.texi: Likewise.
1887 * doc/c-mt.texi: Likewise.
1888 * doc/c-s390.texi: Likewise.
1889 * doc/c-score.texi: Likewise.
1890 * doc/c-sh.texi: Likewise.
1891 * doc/c-sh64.texi: Likewise.
1892 * doc/c-tic54x.texi: Likewise.
1893 * doc/c-tic6x.texi: Likewise.
1894 * doc/c-v850.texi: Likewise.
1895 * doc/c-xc16x.texi: Likewise.
1896 * doc/c-xgate.texi: Likewise.
1897 * doc/c-xtensa.texi: Likewise.
1898 * doc/c-z80.texi: Likewise.
1899 * doc/internals.texi: Likewise.
1900
4c665b71
RM
19012013-01-10 Roland McGrath <mcgrathr@google.com>
1902
1903 * hash.c (hash_new_sized): Make it global.
1904 * hash.h: Declare it.
1905 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1906 pass a small size.
1907
a3c62988
NC
19082013-01-10 Will Newton <will.newton@imgtec.com>
1909
1910 * Makefile.am: Add Meta.
1911 * Makefile.in: Regenerate.
1912 * config/tc-metag.c: New file.
1913 * config/tc-metag.h: New file.
1914 * configure.tgt: Add Meta.
1915 * doc/Makefile.am: Add Meta.
1916 * doc/Makefile.in: Regenerate.
1917 * doc/all.texi: Add Meta.
1918 * doc/as.texiinfo: Document Meta options.
1919 * doc/c-metag.texi: New file.
1920
b37df7c4
SE
19212013-01-09 Steve Ellcey <sellcey@mips.com>
1922
1923 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1924 calls.
1925 * config/tc-mips.c (internalError): Remove, replace with abort.
1926
a3251895
YZ
19272013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1928
1929 * config/tc-aarch64.c (parse_operands): Change to compare the result
1930 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1931
8ab8155f
NC
19322013-01-07 Nick Clifton <nickc@redhat.com>
1933
1934 PR gas/14887
1935 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1936 anticipated character.
1937 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1938 here as it is no longer needed.
1939
a4ac1c42
AS
19402013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1941
1942 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1943 * doc/c-score.texi (SCORE-Opts): Likewise.
1944 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1945
e407c74b
NC
19462013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1947
1948 * config/tc-mips.c: Add support for MIPS r5900.
1949 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1950 lq and sq.
1951 (can_swap_branch_p, get_append_method): Detect some conditional
1952 short loops to fix a bug on the r5900 by NOP in the branch delay
1953 slot.
1954 (M_MUL): Support 3 operands in multu on r5900.
1955 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1956 (s_mipsset): Force 32 bit floating point on r5900.
1957 (mips_ip): Check parameter range of instructions mfps and mtps on
1958 r5900.
1959 * configure.in: Detect CPU type when target string contains r5900
1960 (e.g. mips64r5900el-linux-gnu).
1961
62658407
L
19622013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1963
1964 * as.c (parse_args): Update copyright year to 2013.
1965
95830fd1
YZ
19662013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1967
1968 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1969 and "cortex57".
1970
517bb291 19712013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1972
517bb291
NC
1973 PR gas/14987
1974 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1975 closing bracket.
d709e4e6 1976
517bb291 1977For older changes see ChangeLog-2012
08d56133 1978\f
517bb291 1979Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC
1980
1981Copying and distribution of this file, with or without modification,
1982are permitted in any medium without royalty provided the copyright
1983notice and this notice are preserved.
1984
08d56133
NC
1985Local Variables:
1986mode: change-log
1987left-margin: 8
1988fill-column: 74
1989version-control: never
1990End:
This page took 0.644738 seconds and 4 git commands to generate.