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[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a6bb11b2
YZ		 12013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
2
3 * config/tc-aarch64.c (reloc_table): Replace
4 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
5 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
6 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
7 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
8 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
9 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
10 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
11 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
12 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
13 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
14 (aarch64_force_relocation): Likewise.
15
cec5225b
YZ		 162013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
17
18 * config/tc-aarch64.c (ilp32_p): New static variable.
19 (elf64_aarch64_target_format): Return the target according to the
20 value of 'ilp32_p'.
21 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
22 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
23 (aarch64_dwarf2_addr_size): New function.
24 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
25 (DWARF2_ADDR_SIZE): New define.
26
e335d9cb
RS		 272013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
28
29 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
30
18870af7
RS		 312013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
32
33 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
34
833794fc
MR		 352013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
36
37 * config/tc-mips.c (mips_set_options): Add insn32 member.
38 (mips_opts): Initialize it.
39 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
40 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
41 (md_longopts): Add "minsn32" and "mno-insn32" options.
42 (is_size_valid): Handle insn32 mode.
43 (md_assemble): Pass instruction string down to macro.
44 (brk_fmt): Add second dimension and insn32 mode initializers.
45 (mfhl_fmt): Likewise.
46 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
47 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
48 (macro_build_jalr, move_register): Handle insn32 mode.
49 (macro_build_branch_rs): Likewise.
50 (macro): Handle insn32 mode.
51 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
52 (mips_ip): Handle insn32 mode.
53 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
54 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
55 (mips_handle_align): Handle insn32 mode.
56 (md_show_usage): Add -minsn32 and -mno-insn32.
57
58 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
59 -mno-insn32 options.
60 (-minsn32, -mno-insn32): New options.
61 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
62 options.
63 (MIPS assembly options): New node. Document .set insn32 and
64 .set noinsn32.
65 (MIPS-Dependent): List the new node.
66
d1706f38
NC		 672013-06-25 Nick Clifton <nickc@redhat.com>
68
69 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
70 the PC in indirect addressing on 430xv2 parts.
71 (msp430_operands): Add version test to hardware bug encoding
72 restrictions.
73
477330fc
RM		 742013-06-24 Roland McGrath <mcgrathr@google.com>
75
d996d970
RM		 76 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
77 so it skips whitespace before it.
78 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
79
477330fc
RM		 80 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
81 (arm_reg_parse_multi): Skip whitespace first.
82 (parse_reg_list): Likewise.
83 (parse_vfp_reg_list): Likewise.
84 (s_arm_unwind_save_mmxwcg): Likewise.
85
24382199
NC		 862013-06-24 Nick Clifton <nickc@redhat.com>
87
88 PR gas/15623
89 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
90
c3678916
RS		 912013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
92
93 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
94
42429eac
RS		 952013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
96
97 * config/tc-mips.c: Assert that offsetT and valueT are at least
98 8 bytes in size.
99 (GPR_SMIN, GPR_SMAX): New macros.
100 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
101
f3ded42a
RS		 1022013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
103
104 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
105 conditions. Remove any code deselected by them.
106 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
107
e8044f35
RS		 1082013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
109
110 * NEWS: Note removal of ECOFF support.
111 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
112 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
113 (MULTI_CFILES): Remove config/e-mipsecoff.c.
114 * Makefile.in: Regenerate.
115 * configure.in: Remove MIPS ECOFF references.
116 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
117 Delete cases.
118 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
119 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
120 (mips-*-*): ...this single case.
121 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
122 MIPS emulations to be e-mipself*.
123 * configure: Regenerate.
124 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
125 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
126 (mips-*-sysv*): Remove coff and ecoff cases.
127 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
128 * ecoff.c: Remove reference to MIPS ECOFF.
129 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
130 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
131 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
132 (mips_hi_fixup): Tweak comment.
133 (append_insn): Require a howto.
134 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
135
98508b2a
RS		 1362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
137
138 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
139 Use "CPU" instead of "cpu".
140 * doc/c-mips.texi: Likewise.
141 (MIPS Opts): Rename to MIPS Options.
142 (MIPS option stack): Rename to MIPS Option Stack.
143 (MIPS ASE instruction generation overrides): Rename to
144 MIPS ASE Instruction Generation Overrides (for now).
145 (MIPS floating-point): Rename to MIPS Floating-Point.
146
fc16f8cc
RS		 1472013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
148
149 * doc/c-mips.texi (MIPS Macros): New section.
150 (MIPS Object): Replace with...
151 (MIPS Small Data): ...this new section.
152
5a7560b5
RS		 1532013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
154
155 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
156 Capitalize name. Use @kindex instead of @cindex for .set entries.
157
a1b86ab7
RS		 1582013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
159
160 * doc/c-mips.texi (MIPS Stabs): Remove section.
161
c6278170
RS		 1622013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
163
164 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
165 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
166 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
167 (ISA_SUPPORTS_VIRT64_ASE): Delete.
168 (mips_ase): New structure.
169 (mips_ases): New table.
170 (FP64_ASES): New macro.
171 (mips_ase_groups): New array.
172 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
173 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
174 functions.
175 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
176 (md_parse_option): Use mips_ases and mips_set_ase instead of
177 separate case statements for each ASE option.
178 (mips_after_parse_args): Use FP64_ASES. Use
179 mips_check_isa_supports_ases to check the ASEs against
180 other options.
181 (s_mipsset): Use mips_ases and mips_set_ase instead of
182 separate if statements for each ASE option. Use
183 mips_check_isa_supports_ases, even when a non-ASE option
184 is specified.
185
63a4bc21
KT		 1862013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
187
188 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
189
c31f3936
RS		 1902013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
191
192 * config/tc-mips.c (md_shortopts, options, md_longopts)
193 (md_longopts_size): Move earlier in file.
194
846ef2d0
RS		 1952013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
196
197 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
198 with a single "ase" bitmask.
199 (mips_opts): Update accordingly.
200 (file_ase, file_ase_explicit): New variables.
201 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
202 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
203 (ISA_HAS_ROR): Adjust for mips_set_options change.
204 (is_opcode_valid): Take the base ase mask directly from mips_opts.
205 (mips_ip): Adjust for mips_set_options change.
206 (md_parse_option): Likewise. Update file_ase_explicit.
207 (mips_after_parse_args): Adjust for mips_set_options change.
208 Use bitmask operations to select the default ASEs. Set file_ase
209 rather than individual per-ASE variables.
210 (s_mipsset): Adjust for mips_set_options change.
211 (mips_elf_final_processing): Test file_ase rather than
212 file_ase_mdmx. Remove commented-out code.
213
d16afab6
RS		 2142013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
215
216 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
217 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
218 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
219 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
220 (mips_after_parse_args): Use the new "ase" field to choose
221 the default ASEs.
222 (mips_cpu_info_table): Move ASEs from the "flags" field to the
223 "ase" field.
224
e83a675f
RE		 2252013-06-18 Richard Earnshaw <rearnsha@arm.com>
226
227 * config/tc-arm.c (symbol_preemptible): New function.
228 (relax_branch): Use it.
229
7f3c4072
CM		 2302013-06-17 Catherine Moore <clm@codesourcery.com>
231 Maciej W. Rozycki <macro@codesourcery.com>
232 Chao-Ying Fu <fu@mips.com>
233
234 * config/tc-mips.c (mips_set_options): Add ase_eva.
235 (mips_set_options mips_opts): Add ase_eva.
236 (file_ase_eva): Declare.
237 (ISA_SUPPORTS_EVA_ASE): Define.
238 (IS_SEXT_9BIT_NUM): Define.
239 (MIPS_CPU_ASE_EVA): Define.
240 (is_opcode_valid): Add support for ase_eva.
241 (macro_build): Likewise.
242 (macro): Likewise.
243 (validate_mips_insn): Likewise.
244 (validate_micromips_insn): Likewise.
245 (mips_ip): Likewise.
246 (options): Add OPTION_EVA and OPTION_NO_EVA.
247 (md_longopts): Add -meva and -mno-eva.
248 (md_parse_option): Process new options.
249 (mips_after_parse_args): Check for valid EVA combinations.
250 (s_mipsset): Likewise.
251
e410add4
RS		 2522013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
253
254 * dwarf2dbg.h (dwarf2_move_insn): Declare.
255 * dwarf2dbg.c (line_subseg): Add pmove_tail.
256 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
257 (dwarf2_gen_line_info_1): Update call accordingly.
258 (dwarf2_move_insn): New function.
259 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
260
6a50d470
RS		 2612013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
262
263 Revert:
264
265 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
266
267 PR gas/13024
268 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
269 (dwarf2_gen_line_info_1): Delete.
270 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
271 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
272 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
273 (dwarf2_directive_loc): Push previous .locs instead of generating
274 them immediately.
275
f122319e
CF		 2762013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
277
278 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
279 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
280
909c7f9c
NC		 2812013-06-13 Nick Clifton <nickc@redhat.com>
282
283 PR gas/15602
284 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
285 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
286 function. Generates an error if the adjusted offset is out of a
287 16-bit range.
288
5d5755a7
SL		 2892013-06-12 Sandra Loosemore <sandra@codesourcery.com>
290
291 * config/tc-nios2.c (md_apply_fix): Mask constant
292 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
293
3bf0dbfb
MR		 2942013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
295
296 * config/tc-mips.c (append_insn): Don't do branch relaxation for
297 MIPS-3D instructions either.
298 (md_convert_frag): Update the COPx branch mask accordingly.
299
300 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
301 option.
302 * doc/as.texinfo (Overview): Add --relax-branch and
303 --no-relax-branch.
304 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
305 --no-relax-branch.
306
9daf7bab
SL		 3072013-06-09 Sandra Loosemore <sandra@codesourcery.com>
308
309 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
310 omitted.
311
d301a56b
RS		 3122013-06-08 Catherine Moore <clm@codesourcery.com>
313
314 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
315 (is_opcode_valid_16): Pass ase value to opcode_is_member.
316 (append_insn): Change INSN_xxxx to ASE_xxxx.
317
7bab7634
DC		 3182013-06-01 George Thomas <george.thomas@atmel.com>
319
320 * gas/config/tc-avr.c: Change ISA for devices with USB support to
321 AVR_ISA_XMEGAU
322
f60cf82f
L		 3232013-05-31 H.J. Lu <hongjiu.lu@intel.com>
324
325 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
326 for ELF.
327
a3f278e2
CM		 3282013-05-31 Paul Brook <paul@codesourcery.com>
329
330 gas/
331 * config/tc-mips.c (s_ehword): New.
332
067ec077
CM		 3332013-05-30 Paul Brook <paul@codesourcery.com>
334
335 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
336
d6101ac2
MR		 3372013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
338
339 * write.c (resolve_reloc_expr_symbols): On REL targets don't
340 convert relocs who have no relocatable field either. Rephrase
341 the conditional so that the PC-relative check is only applied
342 for REL targets.
343
f19ccbda
MR		 3442013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
345
346 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
347 calculation.
348
418009c2
YZ		 3492013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
350
351 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 352 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 353 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
354 (md_apply_fix): Likewise.
355 (aarch64_force_relocation): Likewise.
356
0a8897c7
KT		 3572013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
358
359 * config/tc-arm.c (it_fsm_post_encode): Improve
360 warning messages about deprecated IT block formats.
361
89d2a2a3
MS		 3622013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
363
364 * config/tc-aarch64.c (md_apply_fix): Move value range checking
365 inside fx_done condition.
366
c77c0862
RS		 3672013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
368
369 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
370
c0637f3a
PB		 3712013-05-20 Peter Bergner <bergner@vnet.ibm.com>
372
373 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
374 and clean up warning when using PRINT_OPCODE_TABLE.
375
5656a981
AM		 3762013-05-20 Alan Modra <amodra@gmail.com>
377
378 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
379 and data fixups performing shift/high adjust/sign extension on
380 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
381 when writing data fixups rather than recalculating size.
382
997b26e8
JBG		 3832013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
384
385 * doc/c-msp430.texi: Fix typo.
386
9f6e76f4
TG		 3872013-05-16 Tristan Gingold <gingold@adacore.com>
388
389 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
390 are also TOC symbols.
391
638d3803
NC		 3922013-05-16 Nick Clifton <nickc@redhat.com>
393
394 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
395 Add -mcpu command to specify core type.
997b26e8 396 * doc/c-msp430.texi: Update documentation.
638d3803 397
b015e599
AP		 3982013-05-09 Andrew Pinski <apinski@cavium.com>
399
400 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
401 (mips_opts): Update for the new field.
402 (file_ase_virt): New variable.
403 (ISA_SUPPORTS_VIRT_ASE): New macro.
404 (ISA_SUPPORTS_VIRT64_ASE): New macro.
405 (MIPS_CPU_ASE_VIRT): New define.
406 (is_opcode_valid): Handle ase_virt.
407 (macro_build): Handle "+J".
408 (validate_mips_insn): Likewise.
409 (mips_ip): Likewise.
410 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
411 (md_longopts): Add mvirt and mnovirt
412 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
413 (mips_after_parse_args): Handle ase_virt field.
414 (s_mipsset): Handle "virt" and "novirt".
415 (mips_elf_final_processing): Add a comment about virt ASE might need
416 a new flag.
417 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
418 * doc/c-mips.texi: Document -mvirt and -mno-virt.
419 Document ".set virt" and ".set novirt".
420
da8094d7
AM		 4212013-05-09 Alan Modra <amodra@gmail.com>
422
423 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
424 control of operand flag bits.
425
c5f8c205
AM		 4262013-05-07 Alan Modra <amodra@gmail.com>
427
428 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
429 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
430 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
431 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
432 (md_apply_fix): Set fx_no_overflow for assorted relocations.
433 Shift and sign-extend fieldval for use by some VLE reloc
434 operand->insert functions.
435
b47468a6
CM		 4362013-05-06 Paul Brook <paul@codesourcery.com>
437 Catherine Moore <clm@codesourcery.com>
438
c5f8c205
AM		 439 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
440 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 441 (md_apply_fix): Likewise.
442 (tc_gen_reloc): Likewise.
443
2de39019
CM		 4442013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
445
446 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
447 (mips_fix_adjustable): Adjust pc-relative check to use
448 limited_pc_reloc_p.
449
754e2bb9
RS		 4502013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
451
452 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
453 (s_mips_stab): Do not restrict to stabn only.
454
13761a11
NC		 4552013-05-02 Nick Clifton <nickc@redhat.com>
456
457 * config/tc-msp430.c: Add support for the MSP430X architecture.
458 Add code to insert a NOP instruction after any instruction that
459 might change the interrupt state.
460 Add support for the LARGE memory model.
461 Add code to initialise the .MSP430.attributes section.
462 * config/tc-msp430.h: Add support for the MSP430X architecture.
463 * doc/c-msp430.texi: Document the new -mL and -mN command line
464 options.
465 * NEWS: Mention support for the MSP430X architecture.
466
df26367c
MR		 4672013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
468
469 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
470 alpha*-*-linux*ecoff*.
471
f02d8318
CF		 4722013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
473
474 * config/tc-mips.c (mips_ip): Add sizelo.
475 For "+C", "+G", and "+H", set sizelo and compare against it.
476
b40bf0a2
NC		 4772013-04-29 Nick Clifton <nickc@redhat.com>
478
479 * as.c (Options): Add -gdwarf-sections.
480 (parse_args): Likewise.
481 * as.h (flag_dwarf_sections): Declare.
482 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
483 (process_entries): When -gdwarf-sections is enabled generate
484 fragmentary .debug_line sections.
485 (out_debug_line): Set the section for the .debug_line section end
486 symbol.
487 * doc/as.texinfo: Document -gdwarf-sections.
488 * NEWS: Mention -gdwarf-sections.
489
8eeccb77 4902013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 491
492 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
493 according to the target parameter. Don't call s_segm since s_segm
494 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
495 initialized yet.
496 (md_begin): Call s_segm according to target parameter from command
497 line.
498
49926cd0
AM		 4992013-04-25 Alan Modra <amodra@gmail.com>
500
501 * configure.in: Allow little-endian linux.
502 * configure: Regenerate.
503
e3031850
SL		 5042013-04-24 Sandra Loosemore <sandra@codesourcery.com>
505
506 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
507 "fstatus" control register to "eccinj".
508
cb948fc0
KT		 5092013-04-19 Kai Tietz <ktietz@redhat.com>
510
511 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
512
4455e9ad
JB		 5132013-04-15 Julian Brown <julian@codesourcery.com>
514
515 * expr.c (add_to_result, subtract_from_result): Make global.
516 * expr.h (add_to_result, subtract_from_result): Add prototypes.
517 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
518 subtract_from_result to handle extra bit of precision for .sleb128
519 directive operands.
520
956a6ba3
JB		 5212013-04-10 Julian Brown <julian@codesourcery.com>
522
523 * read.c (convert_to_bignum): Add sign parameter. Use it
524 instead of X_unsigned to determine sign of resulting bignum.
525 (emit_expr): Pass extra argument to convert_to_bignum.
526 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
527 X_extrabit to convert_to_bignum.
528 (parse_bitfield_cons): Set X_extrabit.
529 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
530 Initialise X_extrabit field as appropriate.
531 (add_to_result): New.
532 (subtract_from_result): New.
533 (expr): Use above.
534 * expr.h (expressionS): Add X_extrabit field.
535
eb9f3f00
JB		 5362013-04-10 Jan Beulich <jbeulich@suse.com>
537
538 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
539 register being PC when is_t or writeback, and use distinct
540 diagnostic for the latter case.
541
ccb84d65
JB		 5422013-04-10 Jan Beulich <jbeulich@suse.com>
543
544 * gas/config/tc-arm.c (parse_operands): Re-write
545 po_barrier_or_imm().
546 (do_barrier): Remove bogus constraint().
547 (do_t_barrier): Remove.
548
4d13caa0
NC		 5492013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
550
551 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
552 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
553 ATmega2564RFR2
554 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
555
16d02dc9
JB		 5562013-04-09 Jan Beulich <jbeulich@suse.com>
557
558 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
559 Use local variable Rt in more places.
560 (do_vmsr): Accept all control registers.
561
05ac0ffb
JB		 5622013-04-09 Jan Beulich <jbeulich@suse.com>
563
564 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
565 if there was none specified for moves between scalar and core
566 register.
567
2d51fb74
JB		 5682013-04-09 Jan Beulich <jbeulich@suse.com>
569
570 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
571 NEON_ALL_LANES case.
572
94dcf8bf
JB		 5732013-04-08 Jan Beulich <jbeulich@suse.com>
574
575 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
576 PC-relative VSTR.
577
1472d06f
JB		 5782013-04-08 Jan Beulich <jbeulich@suse.com>
579
580 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
581 entry to sp_fiq.
582
0c76cae8
AM		 5832013-04-03 Alan Modra <amodra@gmail.com>
584
585 * doc/as.texinfo: Add support to generate man options for h8300.
586 * doc/c-h8300.texi: Likewise.
587
92eb40d9
RR		 5882013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
589
590 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
591 Cortex-A57.
592
51dcdd4d
NC		 5932013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
594
595 PR binutils/15068
596 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
597
c5d685bf
NC		 5982013-03-26 Nick Clifton <nickc@redhat.com>
599
9b978282
NC		 600 PR gas/15295
601 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
602 start of the file each time.
603
c5d685bf
NC		 604 PR gas/15178
605 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
606 FreeBSD targets.
607
9699c833
TG		 6082013-03-26 Douglas B Rupp <rupp@gnat.com>
609
610 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
611 after fixup.
612
4755303e
WN		 6132013-03-21 Will Newton <will.newton@linaro.org>
614
615 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
616 pc-relative str instructions in Thumb mode.
617
81f5558e
NC		 6182013-03-21 Michael Schewe <michael.schewe@gmx.net>
619
620 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
621 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
622 R_H8_DISP32A16.
623 * config/tc-h8300.h: Remove duplicated defines.
624
71863e73
NC		 6252013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
626
627 PR gas/15282
628 * tc-avr.c (mcu_has_3_byte_pc): New function.
629 (tc_cfi_frame_initial_instructions): Call it to find return
630 address size.
631
795b8e6b
NC		 6322013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
633
634 PR gas/15095
635 * config/tc-tic6x.c (tic6x_try_encode): Handle
636 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
637 encode register pair numbers when required.
638
ba86b375
WN		 6392013-03-15 Will Newton <will.newton@linaro.org>
640
641 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
642 in vstr in Thumb mode for pre-ARMv7 cores.
643
9e6f3811
AS		 6442013-03-14 Andreas Schwab <schwab@suse.de>
645
646 * doc/c-arc.texi (ARC Directives): Revert last change and use
647 @itemize instead of @table.
648 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
649
b10bf8c5
NC		 6502013-03-14 Nick Clifton <nickc@redhat.com>
651
652 PR gas/15273
653 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
654 NULL message, instead just check ARM_CPU_IS_ANY directly.
655
ba724cfc
NC		 6562013-03-14 Nick Clifton <nickc@redhat.com>
657
658 PR gas/15212
9e6f3811 659 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 660 for table format.
661 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
662 to the @item directives.
663 (ARM-Neon-Alignment): Move to correct place in the document.
664 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
665 formatting.
666 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
667 @smallexample.
668
531a94fd
SL		 6692013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
670
671 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
672 case. Add default BAD_CASE to switch.
673
dad60f8e
SL		 6742013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
675
676 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
677 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
678
dd5181d5
KT		 6792013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
680
681 * config/tc-arm.c (crc_ext_armv8): New feature set.
682 (UNPRED_REG): New macro.
683 (do_crc32_1): New function.
684 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
685 do_crc32ch, do_crc32cw): Likewise.
686 (TUEc): New macro.
687 (insns): Add entries for crc32 mnemonics.
688 (arm_extensions): Add entry for crc.
689
8e723a10
CLT		 6902013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
691
692 * write.h (struct fix): Add fx_dot_frag field.
693 (dot_frag): Declare.
694 * write.c (dot_frag): New variable.
695 (fix_new_internal): Set fx_dot_frag field with dot_frag.
696 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
697 * expr.c (expr): Save value of frag_now in dot_frag when setting
698 dot_value.
699 * read.c (emit_expr): Likewise. Delete comments.
700
be05d201
L		 7012013-03-07 H.J. Lu <hongjiu.lu@intel.com>
702
703 * config/tc-i386.c (flag_code_names): Removed.
704 (i386_index_check): Rewrote.
705
62b0d0d5
YZ		 7062013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
707
708 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
709 add comment.
710 (aarch64_double_precision_fmovable): New function.
711 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
712 function; handle hexadecimal representation of IEEE754 encoding.
713 (parse_operands): Update the call to parse_aarch64_imm_float.
714
165de32a
L		 7152013-02-28 H.J. Lu <hongjiu.lu@intel.com>
716
717 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
718 (check_hle): Updated.
719 (md_assemble): Likewise.
720 (parse_insn): Likewise.
721
d5de92cf
L		 7222013-02-28 H.J. Lu <hongjiu.lu@intel.com>
723
724 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 725 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 726 (parse_insn): Remove expecting_string_instruction. Set
727 i.rep_prefix.
728
e60bb1dd
YZ		 7292013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
730
731 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
732
aeebdd9b
YZ		 7332013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
734
735 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
736 for system registers.
737
4107ae22
DD		 7382013-02-27 DJ Delorie <dj@redhat.com>
739
740 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
741 (rl78_op): Handle %code().
742 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
743 (tc_gen_reloc): Likwise; convert to a computed reloc.
744 (md_apply_fix): Likewise.
745
151fa98f
NC		 7462013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
747
748 * config/rl78-parse.y: Fix encoding of DIVWU insn.
749
70a8bc5b 7502013-02-25 Terry Guo <terry.guo@arm.com>
751
752 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
753 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
754 list of accepted CPUs.
755
5c111e37
L		 7562013-02-19 H.J. Lu <hongjiu.lu@intel.com>
757
758 PR gas/15159
759 * config/tc-i386.c (cpu_arch): Add ".smap".
760
761 * doc/c-i386.texi: Document smap.
762
8a75745d
MR		 7632013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
764
765 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
766 mips_assembling_insn appropriately.
767 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
768
79850f26
MR		 7692013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
770
cf29fc61 771 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 772 extraneous braces.
773
4c261dff
NC		 7742013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
775
5c111e37 776 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 777
ea33f281
NC		 7782013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
779
780 * configure.tgt: Add nios2-*-rtems*.
781
a1ccaec9
YZ		 7822013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
783
784 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
785 NULL.
786
0aa27725
RS		 7872013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
788
789 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
790 (macro): Use it. Assert that trunc.w.s is not used for r5900.
791
da4339ed
NC		 7922013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
793
794 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
795 core.
796
36591ba1 7972013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 798 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 799
800 Based on patches from Altera Corporation.
801
802 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
803 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
804 * Makefile.in: Regenerated.
805 * configure.tgt: Add case for nios2*-linux*.
806 * config/obj-elf.c: Conditionally include elf/nios2.h.
807 * config/tc-nios2.c: New file.
808 * config/tc-nios2.h: New file.
809 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
810 * doc/Makefile.in: Regenerated.
811 * doc/all.texi: Set NIOSII.
812 * doc/as.texinfo (Overview): Add Nios II options.
813 (Machine Dependencies): Include c-nios2.texi.
814 * doc/c-nios2.texi: New file.
815 * NEWS: Note Altera Nios II support.
816
94d4433a
AM		 8172013-02-06 Alan Modra <amodra@gmail.com>
818
819 PR gas/14255
820 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
821 Don't skip fixups with fx_subsy non-NULL.
822 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
823 with fx_subsy non-NULL.
824
ace9af6f
L		 8252013-02-04 H.J. Lu <hongjiu.lu@intel.com>
826
827 * doc/c-metag.texi: Add "@c man" markers.
828
89d67ed9
AM		 8292013-02-04 Alan Modra <amodra@gmail.com>
830
831 * write.c (fixup_segment): Return void. Delete seg_reloc_count
832 related code.
833 (TC_ADJUST_RELOC_COUNT): Delete.
834 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
835
89072bd6
AM		 8362013-02-04 Alan Modra <amodra@gmail.com>
837
838 * po/POTFILES.in: Regenerate.
839
f9b2d544
NC		 8402013-01-30 Markos Chandras <markos.chandras@imgtec.com>
841
842 * config/tc-metag.c: Make SWAP instruction less permissive with
843 its operands.
844
392ca752
DD		 8452013-01-29 DJ Delorie <dj@redhat.com>
846
847 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
848 relocs in .word/.etc statements.
849
427d0db6
RM		 8502013-01-29 Roland McGrath <mcgrathr@google.com>
851
852 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
853 immediate value for 8-bit offset" error so it shows line info.
854
4faf939a
JM		 8552013-01-24 Joseph Myers <joseph@codesourcery.com>
856
857 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
858 for 64-bit output.
859
78c8d46c
NC		 8602013-01-24 Nick Clifton <nickc@redhat.com>
861
862 * config/tc-v850.c: Add support for e3v5 architecture.
863 * doc/c-v850.texi: Mention new support.
864
fb5b7503
NC		 8652013-01-23 Nick Clifton <nickc@redhat.com>
866
867 PR gas/15039
868 * config/tc-avr.c: Include dwarf2dbg.h.
869
8ce3d284
L		 8702013-01-18 H.J. Lu <hongjiu.lu@intel.com>
871
872 * config/tc-i386.c (reloc): Support size relocation only for ELF.
873 (tc_i386_fix_adjustable): Likewise.
874 (lex_got): Likewise.
875 (tc_gen_reloc): Likewise.
876
f5555712
YZ		 8772013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
878
879 * config/tc-aarch64.c (output_operand_error_record): Change to output
880 the out-of-range error message as value-expected message if there is
881 only one single value in the expected range.
882 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
883 LSL #0 as a programmer-friendly feature.
884
8fd4256d
L		 8852013-01-16 H.J. Lu <hongjiu.lu@intel.com>
886
887 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
888 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
889 BFD_RELOC_64_SIZE relocations.
890 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
891 for it.
892 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
893 relocations against local symbols.
894
a5840dce
AM		 8952013-01-16 Alan Modra <amodra@gmail.com>
896
897 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
898 finding some sort of toc syntax error, and break to avoid
899 compiler uninit warning.
900
af89796a
L		 9012013-01-15 H.J. Lu <hongjiu.lu@intel.com>
902
903 PR gas/15019
904 * config/tc-i386.c (lex_got): Increment length by 1 if the
905 relocation token is removed.
906
dd42f060
NC		 9072013-01-15 Nick Clifton <nickc@redhat.com>
908
909 * config/tc-v850.c (md_assemble): Allow signed values for
910 V850E_IMMEDIATE.
911
464e3686
SK		 9122013-01-11 Sean Keys <skeys@ipdatasys.com>
913
914 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 915 git to cvs.
464e3686 916
5817ffd1
PB		 9172013-01-10 Peter Bergner <bergner@vnet.ibm.com>
918
919 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
920 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
921 * config/tc-ppc.c (md_show_usage): Likewise.
922 (ppc_handle_align): Handle power8's group ending nop.
923
f4b1f6a9
SK		 9242013-01-10 Sean Keys <skeys@ipdatasys.com>
925
926 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 927 that the assember exits after the opcodes have been printed.
f4b1f6a9 928
34bca508
L		 9292013-01-10 H.J. Lu <hongjiu.lu@intel.com>
930
931 * app.c: Remove trailing white spaces.
932 * as.c: Likewise.
933 * as.h: Likewise.
934 * cond.c: Likewise.
935 * dw2gencfi.c: Likewise.
936 * dwarf2dbg.h: Likewise.
937 * ecoff.c: Likewise.
938 * input-file.c: Likewise.
939 * itbl-lex.h: Likewise.
940 * output-file.c: Likewise.
941 * read.c: Likewise.
942 * sb.c: Likewise.
943 * subsegs.c: Likewise.
944 * symbols.c: Likewise.
945 * write.c: Likewise.
946 * config/tc-i386.c: Likewise.
947 * doc/Makefile.am: Likewise.
948 * doc/Makefile.in: Likewise.
949 * doc/c-aarch64.texi: Likewise.
950 * doc/c-alpha.texi: Likewise.
951 * doc/c-arc.texi: Likewise.
952 * doc/c-arm.texi: Likewise.
953 * doc/c-avr.texi: Likewise.
954 * doc/c-bfin.texi: Likewise.
955 * doc/c-cr16.texi: Likewise.
956 * doc/c-d10v.texi: Likewise.
957 * doc/c-d30v.texi: Likewise.
958 * doc/c-h8300.texi: Likewise.
959 * doc/c-hppa.texi: Likewise.
960 * doc/c-i370.texi: Likewise.
961 * doc/c-i386.texi: Likewise.
962 * doc/c-i860.texi: Likewise.
963 * doc/c-m32c.texi: Likewise.
964 * doc/c-m32r.texi: Likewise.
965 * doc/c-m68hc11.texi: Likewise.
966 * doc/c-m68k.texi: Likewise.
967 * doc/c-microblaze.texi: Likewise.
968 * doc/c-mips.texi: Likewise.
969 * doc/c-msp430.texi: Likewise.
970 * doc/c-mt.texi: Likewise.
971 * doc/c-s390.texi: Likewise.
972 * doc/c-score.texi: Likewise.
973 * doc/c-sh.texi: Likewise.
974 * doc/c-sh64.texi: Likewise.
975 * doc/c-tic54x.texi: Likewise.
976 * doc/c-tic6x.texi: Likewise.
977 * doc/c-v850.texi: Likewise.
978 * doc/c-xc16x.texi: Likewise.
979 * doc/c-xgate.texi: Likewise.
980 * doc/c-xtensa.texi: Likewise.
981 * doc/c-z80.texi: Likewise.
982 * doc/internals.texi: Likewise.
983
4c665b71
RM		 9842013-01-10 Roland McGrath <mcgrathr@google.com>
985
986 * hash.c (hash_new_sized): Make it global.
987 * hash.h: Declare it.
988 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
989 pass a small size.
990
a3c62988
NC		 9912013-01-10 Will Newton <will.newton@imgtec.com>
992
993 * Makefile.am: Add Meta.
994 * Makefile.in: Regenerate.
995 * config/tc-metag.c: New file.
996 * config/tc-metag.h: New file.
997 * configure.tgt: Add Meta.
998 * doc/Makefile.am: Add Meta.
999 * doc/Makefile.in: Regenerate.
1000 * doc/all.texi: Add Meta.
1001 * doc/as.texiinfo: Document Meta options.
1002 * doc/c-metag.texi: New file.
1003
b37df7c4
SE		 10042013-01-09 Steve Ellcey <sellcey@mips.com>
1005
1006 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1007 calls.
1008 * config/tc-mips.c (internalError): Remove, replace with abort.
1009
a3251895
YZ		 10102013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1011
1012 * config/tc-aarch64.c (parse_operands): Change to compare the result
1013 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1014
8ab8155f
NC		 10152013-01-07 Nick Clifton <nickc@redhat.com>
1016
1017 PR gas/14887
1018 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1019 anticipated character.
1020 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1021 here as it is no longer needed.
1022
a4ac1c42
AS		 10232013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1024
1025 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1026 * doc/c-score.texi (SCORE-Opts): Likewise.
1027 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1028
e407c74b
NC		 10292013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1030
1031 * config/tc-mips.c: Add support for MIPS r5900.
1032 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1033 lq and sq.
1034 (can_swap_branch_p, get_append_method): Detect some conditional
1035 short loops to fix a bug on the r5900 by NOP in the branch delay
1036 slot.
1037 (M_MUL): Support 3 operands in multu on r5900.
1038 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1039 (s_mipsset): Force 32 bit floating point on r5900.
1040 (mips_ip): Check parameter range of instructions mfps and mtps on
1041 r5900.
1042 * configure.in: Detect CPU type when target string contains r5900
1043 (e.g. mips64r5900el-linux-gnu).
1044
62658407
L		 10452013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1046
1047 * as.c (parse_args): Update copyright year to 2013.
1048
95830fd1
YZ		 10492013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1050
1051 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1052 and "cortex57".
1053
517bb291 10542013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1055
517bb291
NC		 1056 PR gas/14987
1057 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1058 closing bracket.
d709e4e6 1059
517bb291 1060For older changes see ChangeLog-2012
08d56133 1061\f
517bb291 1062Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1063
1064Copying and distribution of this file, with or without modification,
1065are permitted in any medium without royalty provided the copyright
1066notice and this notice are preserved.
1067
08d56133
NC		 1068Local Variables:
1069mode: change-log
1070left-margin: 8
1071fill-column: 74
1072version-control: never
1073End:
GDB Binutils - Deliverables
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