* gdb.threads/linux-dp.exp: Adjust regexps used to scan thread
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a7284bf1
BW
12006-11-27 Sterling Augustine <sterling@tensilica.com>
2
3 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
4 as the first slot_subtype, not the frag subtype.
5
2caa7ca0
BW
62006-11-27 Bob Wilson <bob.wilson@acm.org>
7
8 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
9 (directive_state): Disable scheduling by default.
10 (xtensa_add_config_info): New.
11 (xtensa_end): Call xtensa_add_config_info.
12
062cf837
EB
132006-11-27 Eric Botcazou <ebotcazou@adacore.com>
14
15 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
16 their unaligned counterparts in debugging sections.
17
cefdba39
AM
182006-11-24 Alan Modra <amodra@bigpond.net.au>
19
20 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
21
e821645d
DJ
222006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
23
24 * config/tc-arm.h (md_cons_align): Define.
25 (mapping_state): New prototype.
26 * config/tc-arm.c (mapping_state): Make global.
27
5ab504f9
AM
282006-11-22 Alan Modra <amodra@bigpond.net.au>
29
30 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
31
98a16ee1
ML
322006-11-16 Mei ligang <ligang@sunnorth.com.cn>
33
5ab504f9
AM
34 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
35 branch instruction, handle it specially.
98a16ee1
ML
36 (score_insns): Modify 32 bit branch instruction.
37
0023dd27
AM
382006-11-16 Alan Modra <amodra@bigpond.net.au>
39
40 * symbols.c (resolve_symbol_value): Formatting.
41
bdf128d6
JB
422006-11-15 Jan Beulich <jbeulich@novell.com>
43
44 PR/3469
45 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
46 chain by linking it to itself.
47 (resolve_symbol_value): Also check symbol_shadow_p().
48 (symbol_shadow_p): New.
49 * symbols.h (symbol_shadow_p): Declare.
50
25fe350b
MS
512006-11-12 Mark Shinwell <shinwell@codesourcery.com>
52
53 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
54 (insns): Adjust accordingly.
55 (md_apply_fix): Alter comments to use CBZ instead of CZB.
56
0ffdc86c
NC
572006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
58
59 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
60 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
61
6afdfa61
NC
622006-11-10 Nick Clifton <nickc@redhat.com>
63
64 PR gas/3456:
65 * config/obj-elf.c (obj_elf_version): Do not include the name
66 field's padding in the namesz value.
67
d84bcf09
TS
682006-11-09 Thiemo Seufer <ths@mips.com>
69
70 * config/tc-mips.c: Fix outdated comment.
71
b7d9ef37
L
722006-11-08 H.J. Lu <hongjiu.lu@intel.com>
73
74 * config/tc-i386.h (CpuPNI): Removed.
75 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
76 * config/tc-i386.c (md_assemble): Likewise.
77
05e7221f
AM
782006-11-08 Alan Modra <amodra@bigpond.net.au>
79
80 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
81
df1f3cda
DD
822006-11-06 David Daney <ddaney@avtrex.com>
83
84 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
85
82100185
TS
862006-11-06 Thiemo Seufer <ths@mips.com>
87
88 * doc/c-mips.texi (-march): Document sb1a.
89
a360e743
TS
902006-11-06 Thiemo Seufer <ths@mips.com>
91
92 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
93 34k always has DSP ASE.
94
64817874
TS
952006-11-03 Thiemo Seufer <ths@mips.com>
96
97 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
98 MIPS16 instructions referencing other sections, unless they are
99 external branches.
100
7764b395
TS
1012006-11-03 Thiemo Seufer <ths@mips.com>
102
103 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
104 release 1 CPU.
105
ae424f82
JJ
1062006-11-03 Jakub Jelinek <jakub@redhat.com>
107
9b8ae42e
JJ
108 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
109 personality and lsda.
110 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
111 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
112 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
113 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
114 (output_cie): Output personality including its encoding and LSDA encoding.
115 (output_fde): Output LSDA.
116 (select_cie_for_fde): Don't share CIE if personality, its encoding or
117 LSDA encoding are different. Copy the 3 fields from fde_entry to
118 cie_entry.
119 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
120
ae424f82
JJ
121 * subsegs.h (struct frchain): Add frch_cfi_data field.
122 * dw2gencfi.c: Include subsegs.h.
123 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
124 (struct frch_cfi_data): New type.
125 (unused_cfi_data): New variable.
126 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
127 and cfa_save_stack static vars into a structure pointed from
128 each frchain.
129 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
130 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
131 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
132 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
133 Likewise.
134
d1e50f8a
DJ
1352006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
136
137 * config/tc-h8300.c (build_bytes): Fix const warning.
138
06d2da93
NC
1392006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
140
141 * tc-score.c (do16_rdrs): Handle not! instruction especially.
142
3ba67470
PB
1432006-10-31 Paul Brook <paul@codesourcery.com>
144
145 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
146 for EABIv4.
147
7a1d4c38
PB
1482006-10-31 Paul Brook <paul@codesourcery.com>
149
150 gas/
151 * config/tc-arm.c (object_arch): New variable.
152 (s_arm_object_arch): New function.
153 (md_pseudo_table): Add object_arch.
154 (aeabi_set_public_attributes): Obey object_arch.
155 * doc/c-arm.texi: Document .object_arch.
156
b138abaa
NC
1572006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
158
159 * tc-score.c (data_op2): Check invalid operands.
160 (my_get_expression): Const operand of some instructions can not be
161 symbol in assembly.
162 (get_insn_class_from_type): Handle instruction type Insn_internal.
163 (do_macro_ldst_label): Modify inst.type.
164 (Insn_PIC): Delete.
165 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 166
c79b7c30
RC
1672006-10-29 Randolph Chung <tausq@debian.org>
168
169 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
170 (hppa_regname_to_dw2regnum): New funcions.
171 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
172 (tc_cfi_frame_initial_instructions)
173 (tc_regname_to_dw2regnum): Define.
174 (hppa_cfi_frame_initial_instructions)
175 (hppa_regname_to_dw2regnum): Declare.
176 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
177 (DWARF2_CIE_DATA_ALIGNMENT): Define.
178
e2785c44
NC
1792006-10-29 Nick Clifton <nickc@redhat.com>
180
181 * config/tc-spu.c (md_assemble): Cast printf string size parameter
182 to int in order to avoid a compiler warning.
183
86157c20
AS
1842006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
185
186 * config/tc-sh.c (md_assemble): Define size of branches.
187
ba5f0fda
BE
1882006-10-26 Ben Elliston <bje@au.ibm.com>
189
190 * dw2gencfi.c (cfi_add_CFA_offset):
191 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
192
033cd5fd
BE
193 * write.c (chain_frchains_together_1): Assert that this function
194 never returns a pointer to the auto variable `dummy'.
195
e9f53129
AM
1962006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
197 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
198 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
199 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
200 Alan Modra <amodra@bigpond.net.au>
201
202 * config/tc-spu.c: New file.
203 * config/tc-spu.h: New file.
204 * configure.tgt: Add SPU support.
205 * Makefile.am: Likewise. Run "make dep-am".
206 * Makefile.in: Regenerate.
207 * po/POTFILES.in: Regenerate.
208
7b383517
BE
2092006-10-25 Ben Elliston <bje@au.ibm.com>
210
211 * expr.c (expr): Replace O_add case in switch (op_left) explaining
212 why it can never occur.
5ab504f9 213
ede602d7
AM
2142006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
215
216 * doc/c-ppc.texi (-mcell): Document.
217 * config/tc-ppc.c (parse_cpu): Parse -mcell.
218 (md_show_usage): Document -mcell.
219
7918206c
MM
2202006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
221
222 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
223
878bcc43
AM
2242006-10-23 Alan Modra <amodra@bigpond.net.au>
225
226 * config/tc-m68hc11.c (md_assemble): Quiet warning.
227
8620418b
MF
2282006-10-19 Mike Frysinger <vapier@gentoo.org>
229
230 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
231 (x86_64_section_letter): Likewise.
232
b3549761
NC
2332006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
234
235 * config/tc-score.c (build_relax_frag): Compute correct
236 tc_frag_data.fixp.
237
71a75f6f
MF
2382006-10-18 Roy Marples <uberlord@gentoo.org>
239
240 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
241 elf32-sparc as a viable target for the -32 switch and any target
242 starting with elf64-sparc as a viable target for the -64 switch.
243 (sparc_target_format): For 64-bit ELF flavoured output use
244 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
245 ELF_TARGET_FORMAT.
71a75f6f
MF
246 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
247
e1b5fdd4
L
2482006-10-17 H.J. Lu <hongjiu.lu@intel.com>
249
250 * configure: Regenerated.
251
f8ef9cd7
BS
2522006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
253
254 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
255 in addition to testing for '\n'.
256 (TC_EOL_IN_INSN): Provide a default definition if necessary.
257
eb1fe072
NC
2582006-10-13 Sterling Augstine <sterling@tensilica.com>
259
260 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
261 a disjoint DW_AT range.
262
ec6e49f4
NC
2632006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
264
265 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
266
036dc3f7
PB
2672006-10-08 Paul Brook <paul@codesourcery.com>
268
269 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
270 (parse_operands): Use parse_big_immediate for OP_NILO.
271 (neon_cmode_for_logic_imm): Try smaller element sizes.
272 (neon_cmode_for_move_imm): Ditto.
273 (do_neon_logic): Handle .i64 pseudo-op.
274
3bb0c887
AM
2752006-09-29 Alan Modra <amodra@bigpond.net.au>
276
277 * po/POTFILES.in: Regenerate.
278
ef05d495
L
2792006-09-28 H.J. Lu <hongjiu.lu@intel.com>
280
281 * config/tc-i386.h (CpuMNI): Renamed to ...
282 (CpuSSSE3): This.
283 (CpuUnknownFlags): Updated.
284 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
285 and PROCESSOR_MEROM with PROCESSOR_CORE2.
286 * config/tc-i386.c: Updated.
287 * doc/c-i386.texi: Likewise.
a70ae331 288
ef05d495
L
289 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
290
d8ad03e9
NC
2912006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
292
293 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
294
df3ca5a3
NC
2952006-09-27 Nick Clifton <nickc@redhat.com>
296
297 * output-file.c (output_file_close): Prevent an infinite loop
298 reporting that stdoutput could not be closed.
299
2d447fca
JM
3002006-09-26 Mark Shinwell <shinwell@codesourcery.com>
301 Joseph Myers <joseph@codesourcery.com>
302 Ian Lance Taylor <ian@wasabisystems.com>
303 Ben Elliston <bje@wasabisystems.com>
304
305 * config/tc-arm.c (arm_cext_iwmmxt2): New.
306 (enum operand_parse_code): New code OP_RIWR_I32z.
307 (parse_operands): Handle OP_RIWR_I32z.
308 (do_iwmmxt_wmerge): New function.
309 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
310 a register.
311 (do_iwmmxt_wrwrwr_or_imm5): New function.
312 (insns): Mark instructions as RIWR_I32z as appropriate.
313 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
314 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
315 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
316 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
317 (md_begin): Handle IWMMXT2.
318 (arm_cpus): Add iwmmxt2.
319 (arm_extensions): Likewise.
320 (arm_archs): Likewise.
321
ba83aca1
BW
3222006-09-25 Bob Wilson <bob.wilson@acm.org>
323
324 * doc/as.texinfo (Overview): Revise description of --keep-locals.
325 Add xref to "Symbol Names".
326 (L): Refer to "local symbols" instead of "local labels". Move
327 definition to "Symbol Names" section; add xref to that section.
328 (Symbol Names): Use "Local Symbol Names" section to define local
329 symbols. Add "Local Labels" heading for description of temporary
330 forward/backward labels, and refer to those as "local labels".
331
539e75ad
L
3322006-09-23 H.J. Lu <hongjiu.lu@intel.com>
333
334 PR binutils/3235
335 * config/tc-i386.c (match_template): Check address size prefix
336 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
337 operand.
338
5e02f92e
AM
3392006-09-22 Alan Modra <amodra@bigpond.net.au>
340
341 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
342
885afe7b
AM
3432006-09-22 Alan Modra <amodra@bigpond.net.au>
344
345 * as.h (as_perror): Delete declaration.
346 * gdbinit.in (as_perror): Delete breakpoint.
347 * messages.c (as_perror): Delete function.
348 * doc/internals.texi: Remove as_perror description.
349 * listing.c (listing_print: Don't use as_perror.
350 * output-file.c (output_file_create, output_file_close): Likewise.
351 * symbols.c (symbol_create, symbol_clone): Likewise.
352 * write.c (write_contents): Likewise.
353 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
354 * config/tc-tic54x.c (tic54x_mlib): Likewise.
355
3aeeedbb
AM
3562006-09-22 Alan Modra <amodra@bigpond.net.au>
357
358 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
359 (ppc_handle_align): New function.
360 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
361 (SUB_SEGMENT_ALIGN): Define as zero.
362
96e9638b
BW
3632006-09-20 Bob Wilson <bob.wilson@acm.org>
364
365 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
366 (Overview): Skip cross reference in man page.
367
99ad8390
NC
3682006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
369
370 * configure.in: Add new target x86_64-pc-mingw64.
371 * configure: Regenerate.
372 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
373 * config/obj-coff.h: Add handling for TE_PEP target specific code
374 and definitions.
99ad8390
NC
375 * config/tc-i386.c: Add new targets.
376 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
377 (x86_64_target_format): Add new method for setup proper default
378 target cpu mode.
99ad8390
NC
379 * config/te-pep.h: Add new target definition header.
380 (TE_PEP): New macro: Identifies new target architecture.
381 (COFF_WITH_pex64): Set proper includes in bfd.
382 * NEWS: Mention new target.
383
73332571
BS
3842006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
385
386 * config/bfin-parse.y (binary): Change sub of const to add of negated
387 const.
388
1c0d3aa6
NC
3892006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
390
391 * config/tc-score.c: New file.
392 * config/tc-score.h: Newf file.
393 * configure.tgt: Add Score target.
394 * Makefile.am: Add Score files.
395 * Makefile.in: Regenerate.
396 * NEWS: Mention new target support.
397
4fa3602b
PB
3982006-09-16 Paul Brook <paul@codesourcery.com>
399
400 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
401 * doc/c-arm.texi (movsp): Document offset argument.
402
16dd5e42
PB
4032006-09-16 Paul Brook <paul@codesourcery.com>
404
405 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
406 unsigned int to avoid 64-bit host problems.
407
c4ae04ce
BS
4082006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
409
410 * config/bfin-parse.y (binary): Do some more constant folding for
411 additions.
412
e5d4a5a6
JB
4132006-09-13 Jan Beulich <jbeulich@novell.com>
414
415 * input-file.c (input_file_give_next_buffer): Demote as_bad to
416 as_warn.
417
1a1219cb
AM
4182006-09-13 Alan Modra <amodra@bigpond.net.au>
419
420 PR gas/3165
421 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
422 in parens.
423
f79d9c1d
AM
4242006-09-13 Alan Modra <amodra@bigpond.net.au>
425
426 * input-file.c (input_file_open): Replace as_perror with as_bad
427 so that gas exits with error on file errors. Correct error
428 message.
429 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 430 * input-file.h: Update comment.
f79d9c1d 431
f512f76f
NC
4322006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
433
434 PR gas/3172
435 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
436 registers as a sub-class of wC registers.
437
8d79fd44
AM
4382006-09-11 Alan Modra <amodra@bigpond.net.au>
439
440 PR gas/3165
441 * config/tc-mips.h (enum dwarf2_format): Forward declare.
442 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
443 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
444 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
445
6258339f
NC
4462006-09-08 Nick Clifton <nickc@redhat.com>
447
448 PR gas/3129
449 * doc/as.texinfo (Macro): Improve documentation about separating
450 macro arguments from following text.
451
f91e006c
PB
4522006-09-08 Paul Brook <paul@codesourcery.com>
453
454 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
455
466bbf93
PB
4562006-09-07 Paul Brook <paul@codesourcery.com>
457
458 * config/tc-arm.c (parse_operands): Mark operand as present.
459
428e3f1f
PB
4602006-09-04 Paul Brook <paul@codesourcery.com>
461
462 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
463 (do_neon_dyadic_if_i_d): Avoid setting U bit.
464 (do_neon_mac_maybe_scalar): Ditto.
465 (do_neon_dyadic_narrow): Force operand type to NT_integer.
466 (insns): Remove out of date comments.
467
fb25138b
NC
4682006-08-29 Nick Clifton <nickc@redhat.com>
469
470 * read.c (s_align): Initialize the 'stopc' variable to prevent
471 compiler complaints about it being used without being
472 initialized.
473 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
474 s_float_space, s_struct, cons_worker, equals): Likewise.
475
5091343a
AM
4762006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
477
478 * ecoff.c (ecoff_directive_val): Fix message typo.
479 * config/tc-ns32k.c (convert_iif): Likewise.
480 * config/tc-sh64.c (shmedia_check_limits): Likewise.
481
1f2a7e38
BW
4822006-08-25 Sterling Augustine <sterling@tensilica.com>
483 Bob Wilson <bob.wilson@acm.org>
484
485 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
486 the state of the absolute_literals directive. Remove align frag at
487 the start of the literal pool position.
488
34135039
BW
4892006-08-25 Bob Wilson <bob.wilson@acm.org>
490
491 * doc/c-xtensa.texi: Add @group commands in examples.
492
74869ac7
BW
4932006-08-24 Bob Wilson <bob.wilson@acm.org>
494
495 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
496 (INIT_LITERAL_SECTION_NAME): Delete.
497 (lit_state struct): Remove segment names, init_lit_seg, and
498 fini_lit_seg. Add lit_prefix and current_text_seg.
499 (init_literal_head_h, init_literal_head): Delete.
500 (fini_literal_head_h, fini_literal_head): Delete.
501 (xtensa_begin_directive): Move argument parsing to
502 xtensa_literal_prefix function.
503 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
504 (xtensa_literal_prefix): Parse the directive argument here and
505 record it in the lit_prefix field. Remove code to derive literal
506 section names.
507 (linkonce_len): New.
508 (get_is_linkonce_section): Use linkonce_len. Check for any
509 ".gnu.linkonce.*" section, not just text sections.
510 (md_begin): Remove initialization of deleted lit_state fields.
511 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
512 to init_literal_head and fini_literal_head.
513 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
514 when traversing literal_head list.
515 (match_section_group): New.
516 (cache_literal_section): Rewrite to determine the literal section
517 name on the fly, create the section and return it.
518 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
519 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
520 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
521 Use xtensa_get_property_section from bfd.
522 (retrieve_xtensa_section): Delete.
523 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
524 description to refer to plural literal sections and add xref to
525 the Literal Directive section.
526 (Literal Directive): Describe new rules for deriving literal section
527 names. Add footnote for special case of .init/.fini with
528 --text-section-literals.
529 (Literal Prefix Directive): Replace old naming rules with xref to the
530 Literal Directive section.
531
87a1fd79
JM
5322006-08-21 Joseph Myers <joseph@codesourcery.com>
533
534 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
535 merging with previous long opcode.
536
7148cc28
NC
5372006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
538
539 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
540 * Makefile.in: Regenerate.
541 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
542 renamed. Adjust.
543
3e9e4fcf
JB
5442006-08-16 Julian Brown <julian@codesourcery.com>
545
546 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
547 to use ARM instructions on non-ARM-supporting cores.
548 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
549 mode automatically based on cpu variant.
550 (md_begin): Call above function.
551
267d2029
JB
5522006-08-16 Julian Brown <julian@codesourcery.com>
553
554 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
555 recognized in non-unified syntax mode.
556
4be041b2
TS
5572006-08-15 Thiemo Seufer <ths@mips.com>
558 Nigel Stephens <nigel@mips.com>
559 David Ung <davidu@mips.com>
560
561 * configure.tgt: Handle mips*-sde-elf*.
562
3a93f742
TS
5632006-08-12 Thiemo Seufer <ths@networkno.de>
564
565 * config/tc-mips.c (mips16_ip): Fix argument register handling
566 for restore instruction.
567
1737851b
BW
5682006-08-08 Bob Wilson <bob.wilson@acm.org>
569
570 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
571 (out_sleb128): New.
572 (out_fixed_inc_line_addr): New.
573 (process_entries): Use out_fixed_inc_line_addr when
574 DWARF2_USE_FIXED_ADVANCE_PC is set.
575 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
576
e14e52f8
DD
5772006-08-08 DJ Delorie <dj@redhat.com>
578
579 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
580 vs full symbols so that we never have more than one pointer value
581 for any given symbol in our symbol table.
582
802f5d9e
NC
5832006-08-08 Sterling Augustine <sterling@tensilica.com>
584
585 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
586 and emit DW_AT_ranges when code in compilation unit is not
587 contiguous.
588 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
589 is not contiguous.
590 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
591 (out_debug_ranges): New function to emit .debug_ranges section
592 when code is not contiguous.
593
720abc60
NC
5942006-08-08 Nick Clifton <nickc@redhat.com>
595
596 * config/tc-arm.c (WARN_DEPRECATED): Enable.
597
f0927246
NC
5982006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
599
600 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
601 only block.
602 (pe_directive_secrel) [TE_PE]: New function.
603 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
604 loc, loc_mark_labels.
605 [TE_PE]: Handle secrel32.
606 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
607 call.
608 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
609 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
610 (md_section_align): Only round section sizes here for AOUT
611 targets.
612 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
613 (tc_pe_dwarf2_emit_offset): New function.
614 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
615 (cons_fix_new_arm): Handle O_secrel.
616 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
617 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
618 of OBJ_ELF only block.
619 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
620 tc_pe_dwarf2_emit_offset.
621
55e6e397
RS
6222006-08-04 Richard Sandiford <richard@codesourcery.com>
623
624 * config/tc-sh.c (apply_full_field_fix): New function.
625 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
626 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
627 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
628 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
629
9cd19b17
NC
6302006-08-03 Nick Clifton <nickc@redhat.com>
631
632 PR gas/2991
633 * config.in: Regenerate.
634
97f87066
JM
6352006-08-03 Joseph Myers <joseph@codesourcery.com>
636
637 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 638 for OP_RIWR_RIWC.
97f87066 639
41adaa5c
JM
6402006-08-03 Joseph Myers <joseph@codesourcery.com>
641
642 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
643 (parse_operands): Handle it.
644 (insns): Use it for tmcr and tmrc.
645
9d7cbccd
NC
6462006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
647
648 PR binutils/2983
649 * config/tc-i386.c (md_parse_option): Treat any target starting
650 with elf64_x86_64 as a viable target for the -64 switch.
651 (i386_target_format): For 64-bit ELF flavoured output use
652 ELF_TARGET_FORMAT64.
653 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
654
c973bc5c
NC
6552006-08-02 Nick Clifton <nickc@redhat.com>
656
657 PR gas/2991
658 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
659 bfd/aclocal.m4.
660 * configure.in: Run BFD_BINARY_FOPEN.
661 * configure: Regenerate.
662 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
663 file to include.
664
cfde7f70
L
6652006-08-01 H.J. Lu <hongjiu.lu@intel.com>
666
667 * config/tc-i386.c (md_assemble): Don't update
668 cpu_arch_isa_flags.
669
b4c71f56
TS
6702006-08-01 Thiemo Seufer <ths@mips.com>
671
672 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
673
54f4ddb3
TS
6742006-08-01 Thiemo Seufer <ths@mips.com>
675
676 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
677 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
678 BFD_RELOC_32 and BFD_RELOC_16.
679 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
680 md_convert_frag, md_obj_end): Fix comment formatting.
681
d103cf61
TS
6822006-07-31 Thiemo Seufer <ths@mips.com>
683
684 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
685 handling for BFD_RELOC_MIPS16_JMP.
686
601e61cd
NC
6872006-07-24 Andreas Schwab <schwab@suse.de>
688
689 PR/2756
690 * read.c (read_a_source_file): Ignore unknown text after line
691 comment character. Fix misleading comment.
692
b45619c0
NC
6932006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
694
695 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
696 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
697 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
698 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
699 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
700 doc/c-z80.texi, doc/internals.texi: Fix some typos.
701
784906c5
NC
7022006-07-21 Nick Clifton <nickc@redhat.com>
703
704 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
705 linker testsuite.
706
d5f010e9
TS
7072006-07-20 Thiemo Seufer <ths@mips.com>
708 Nigel Stephens <nigel@mips.com>
709
710 * config/tc-mips.c (md_parse_option): Don't infer optimisation
711 options from debug options.
712
35d3d567
TS
7132006-07-20 Thiemo Seufer <ths@mips.com>
714
715 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
716 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
717
401a54cf
PB
7182006-07-19 Paul Brook <paul@codesourcery.com>
719
720 * config/tc-arm.c (insns): Fix rbit Arm opcode.
721
16805f35
PB
7222006-07-18 Paul Brook <paul@codesourcery.com>
723
724 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
725 (md_convert_frag): Use correct reloc for add_pc. Use
726 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
727 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
728 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
729
d9e05e4e
AM
7302006-07-17 Mat Hostetter <mat@lcs.mit.edu>
731
732 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
733 when file and line unknown.
734
f43abd2b
TS
7352006-07-17 Thiemo Seufer <ths@mips.com>
736
737 * read.c (s_struct): Use IS_ELF.
738 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
739 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
740 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
741 s_mips_mask): Likewise.
742
a2902af6
TS
7432006-07-16 Thiemo Seufer <ths@mips.com>
744 David Ung <davidu@mips.com>
745
746 * read.c (s_struct): Handle ELF section changing.
747 * config/tc-mips.c (s_align): Leave enabling auto-align to the
748 generic code.
749 (s_change_sec): Try section changing only if we output ELF.
750
d32cad65
L
7512006-07-15 H.J. Lu <hongjiu.lu@intel.com>
752
753 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
754 CpuAmdFam10.
755 (smallest_imm_type): Remove Cpu086.
756 (i386_target_format): Likewise.
757
758 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
759 Update CpuXXX.
760
050dfa73
MM
7612006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
762 Michael Meissner <michael.meissner@amd.com>
763
764 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
765 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
766 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
767 architecture.
768 (i386_align_code): Ditto.
769 (md_assemble_code): Add support for insertq/extrq instructions,
770 swapping as needed for intel syntax.
771 (swap_imm_operands): New function to swap immediate operands.
772 (swap_operands): Deal with 4 operand instructions.
773 (build_modrm_byte): Add support for insertq instruction.
774
6b2de085
L
7752006-07-13 H.J. Lu <hongjiu.lu@intel.com>
776
777 * config/tc-i386.h (Size64): Fix a typo in comment.
778
01eaea5a
NC
7792006-07-12 Nick Clifton <nickc@redhat.com>
780
781 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 782 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
783 already been checked here.
784
1e85aad8
JW
7852006-07-07 James E Wilson <wilson@specifix.com>
786
787 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
788
1370e33d
NC
7892006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
790 Nick Clifton <nickc@redhat.com>
791
792 PR binutils/2877
793 * doc/as.texi: Fix spelling typo: branchs => branches.
794 * doc/c-m68hc11.texi: Likewise.
795 * config/tc-m68hc11.c: Likewise.
796 Support old spelling of command line switch for backwards
797 compatibility.
798
5f0fe04b
TS
7992006-07-04 Thiemo Seufer <ths@mips.com>
800 David Ung <davidu@mips.com>
801
802 * config/tc-mips.c (s_is_linkonce): New function.
803 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
804 weak, external, and linkonce symbols.
805 (pic_need_relax): Use s_is_linkonce.
806
85234291
L
8072006-06-24 H.J. Lu <hongjiu.lu@intel.com>
808
809 * doc/as.texinfo (Org): Remove space.
810 (P2align): Add "@var{abs-expr},".
811
ccc9c027
L
8122006-06-23 H.J. Lu <hongjiu.lu@intel.com>
813
814 * config/tc-i386.c (cpu_arch_tune_set): New.
815 (cpu_arch_isa): Likewise.
816 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
817 nops with short or long nop sequences based on -march=/.arch
818 and -mtune=.
819 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
820 set cpu_arch_tune and cpu_arch_tune_flags.
821 (md_parse_option): For -march=, set cpu_arch_isa and set
822 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
823 0. Set cpu_arch_tune_set to 1 for -mtune=.
824 (i386_target_format): Don't set cpu_arch_tune.
825
d4dc2f22
TS
8262006-06-23 Nigel Stephens <nigel@mips.com>
827
828 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
829 generated .sbss.* and .gnu.linkonce.sb.*.
830
a8dbcb85
TS
8312006-06-23 Thiemo Seufer <ths@mips.com>
832 David Ung <davidu@mips.com>
833
834 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
835 label_list.
836 * config/tc-mips.c (label_list): Define per-segment label_list.
837 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
838 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
839 mips_from_file_after_relocs, mips_define_label): Use per-segment
840 label_list.
841
3994f87e
TS
8422006-06-22 Thiemo Seufer <ths@mips.com>
843
844 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
845 (append_insn): Use it.
846 (md_apply_fix): Whitespace formatting.
847 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
848 mips16_extended_frag): Remove register specifier.
849 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
850 constants.
851
fa073d69
MS
8522006-06-21 Mark Shinwell <shinwell@codesourcery.com>
853
854 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
855 a directive saving VFP registers for ARMv6 or later.
856 (s_arm_unwind_save): Add parameter arch_v6 and call
857 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
858 appropriate.
859 (md_pseudo_table): Add entry for new "vsave" directive.
860 * doc/c-arm.texi: Correct error in example for "save"
861 directive (fstmdf -> fstmdx). Also document "vsave" directive.
862
8e77b565 8632006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
864 Anatoly Sokolov <aesok@post.ru>
865
a70ae331
AM
866 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
867 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
868 atmega164p/atmega324p.
869 * doc/c-avr.texi: Document new mcu and arch options.
870
8b1ad454
NC
8712006-06-17 Nick Clifton <nickc@redhat.com>
872
873 * config/tc-arm.c (enum parse_operand_result): Move outside of
874 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
875
9103f4f4
L
8762006-06-16 H.J. Lu <hongjiu.lu@intel.com>
877
878 * config/tc-i386.h (processor_type): New.
879 (arch_entry): Add type.
880
881 * config/tc-i386.c (cpu_arch_tune): New.
882 (cpu_arch_tune_flags): Likewise.
883 (cpu_arch_isa_flags): Likewise.
884 (cpu_arch): Updated.
885 (set_cpu_arch): Also update cpu_arch_isa_flags.
886 (md_assemble): Update cpu_arch_isa_flags.
887 (OPTION_MARCH): New.
888 (OPTION_MTUNE): Likewise.
889 (md_longopts): Add -march= and -mtune=.
890 (md_parse_option): Support -march= and -mtune=.
891 (md_show_usage): Add -march=CPU/-mtune=CPU.
892 (i386_target_format): Also update cpu_arch_isa_flags,
893 cpu_arch_tune and cpu_arch_tune_flags.
894
895 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
896
897 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
898
4962c51a
MS
8992006-06-15 Mark Shinwell <shinwell@codesourcery.com>
900
901 * config/tc-arm.c (enum parse_operand_result): New.
902 (struct group_reloc_table_entry): New.
903 (enum group_reloc_type): New.
904 (group_reloc_table): New array.
905 (find_group_reloc_table_entry): New function.
906 (parse_shifter_operand_group_reloc): New function.
907 (parse_address_main): New function, incorporating code
908 from the old parse_address function. To be used via...
909 (parse_address): wrapper for parse_address_main; and
910 (parse_address_group_reloc): new function, likewise.
911 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
912 OP_ADDRGLDRS, OP_ADDRGLDC.
913 (parse_operands): Support for these new operand codes.
914 New macro po_misc_or_fail_no_backtrack.
915 (encode_arm_cp_address): Preserve group relocations.
916 (insns): Modify to use the above operand codes where group
917 relocations are permitted.
918 (md_apply_fix): Handle the group relocations
919 ALU_PC_G0_NC through LDC_SB_G2.
920 (tc_gen_reloc): Likewise.
921 (arm_force_relocation): Leave group relocations for the linker.
922 (arm_fix_adjustable): Likewise.
923
cd2f129f
JB
9242006-06-15 Julian Brown <julian@codesourcery.com>
925
926 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
927 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
928 relocs properly.
929
46e883c5
L
9302006-06-12 H.J. Lu <hongjiu.lu@intel.com>
931
932 * config/tc-i386.c (process_suffix): Don't add rex64 for
933 "xchg %rax,%rax".
934
1787fe5b
TS
9352006-06-09 Thiemo Seufer <ths@mips.com>
936
937 * config/tc-mips.c (mips_ip): Maintain argument count.
938
96f989c2
AM
9392006-06-09 Alan Modra <amodra@bigpond.net.au>
940
941 * config/tc-iq2000.c: Include sb.h.
942
7c752c2a
TS
9432006-06-08 Nigel Stephens <nigel@mips.com>
944
945 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
946 aliases for better compatibility with SGI tools.
947
03bf704f
AM
9482006-06-08 Alan Modra <amodra@bigpond.net.au>
949
950 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
951 * Makefile.am (GASLIBS): Expand @BFDLIB@.
952 (BFDVER_H): Delete.
953 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
954 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
955 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
956 Run "make dep-am".
957 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
958 * Makefile.in: Regenerate.
959 * doc/Makefile.in: Regenerate.
960 * configure: Regenerate.
961
6648b7cf
JM
9622006-06-07 Joseph S. Myers <joseph@codesourcery.com>
963
964 * po/Make-in (pdf, ps): New dummy targets.
965
037e8744
JB
9662006-06-07 Julian Brown <julian@codesourcery.com>
967
968 * config/tc-arm.c (stdarg.h): include.
969 (arm_it): Add uncond_value field. Add isvec and issingle to operand
970 array.
971 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
972 REG_TYPE_NSDQ (single, double or quad vector reg).
973 (reg_expected_msgs): Update.
974 (BAD_FPU): Add macro for unsupported FPU instruction error.
975 (parse_neon_type): Support 'd' as an alias for .f64.
976 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
977 sets of registers.
978 (parse_vfp_reg_list): Don't update first arg on error.
979 (parse_neon_mov): Support extra syntax for VFP moves.
980 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
981 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
982 (parse_operands): Support isvec, issingle operands fields, new parse
983 codes above.
984 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
985 msr variants.
986 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
987 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
988 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
989 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
990 shapes.
991 (neon_shape): Redefine in terms of above.
992 (neon_shape_class): New enumeration, table of shape classes.
993 (neon_shape_el): New enumeration. One element of a shape.
994 (neon_shape_el_size): Register widths of above, where appropriate.
995 (neon_shape_info): New struct. Info for shape table.
996 (neon_shape_tab): New array.
997 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
998 (neon_check_shape): Rewrite as...
999 (neon_select_shape): New function to classify instruction shapes,
1000 driven by new table neon_shape_tab array.
1001 (neon_quad): New function. Return 1 if shape should set Q flag in
1002 instructions (or equivalent), 0 otherwise.
1003 (type_chk_of_el_type): Support F64.
1004 (el_type_of_type_chk): Likewise.
1005 (neon_check_type): Add support for VFP type checking (VFP data
1006 elements fill their containing registers).
1007 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1008 in thumb mode for VFP instructions.
1009 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1010 and encode the current instruction as if it were that opcode.
1011 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1012 arguments, call function in PFN.
1013 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1014 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1015 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1016 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1017 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1018 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1019 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1020 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1021 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1022 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1023 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1024 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1025 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1026 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1027 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1028 neon_quad.
1029 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1030 between VFP and Neon turns out to belong to Neon. Perform
1031 architecture check and fill in condition field if appropriate.
1032 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1033 (do_neon_cvt): Add support for VFP variants of instructions.
1034 (neon_cvt_flavour): Extend to cover VFP conversions.
1035 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1036 vmov variants.
1037 (do_neon_ldr_str): Handle single-precision VFP load/store.
1038 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1039 NS_NULL not NS_IGNORE.
1040 (opcode_tag): Add OT_csuffixF for operands which either take a
1041 conditional suffix, or have 0xF in the condition field.
1042 (md_assemble): Add support for OT_csuffixF.
1043 (NCE): Replace macro with...
1044 (NCE_tag, NCE, NCEF): New macros.
1045 (nCE): Replace macro with...
1046 (nCE_tag, nCE, nCEF): New macros.
1047 (insns): Add support for VFP insns or VFP versions of insns msr,
1048 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1049 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1050 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1051 VFP/Neon insns together.
1052
ebd1c875
AM
10532006-06-07 Alan Modra <amodra@bigpond.net.au>
1054 Ladislav Michl <ladis@linux-mips.org>
1055
1056 * app.c: Don't include headers already included by as.h.
1057 * as.c: Likewise.
1058 * atof-generic.c: Likewise.
1059 * cgen.c: Likewise.
1060 * dwarf2dbg.c: Likewise.
1061 * expr.c: Likewise.
1062 * input-file.c: Likewise.
1063 * input-scrub.c: Likewise.
1064 * macro.c: Likewise.
1065 * output-file.c: Likewise.
1066 * read.c: Likewise.
1067 * sb.c: Likewise.
1068 * config/bfin-lex.l: Likewise.
1069 * config/obj-coff.h: Likewise.
1070 * config/obj-elf.h: Likewise.
1071 * config/obj-som.h: Likewise.
1072 * config/tc-arc.c: Likewise.
1073 * config/tc-arm.c: Likewise.
1074 * config/tc-avr.c: Likewise.
1075 * config/tc-bfin.c: Likewise.
1076 * config/tc-cris.c: Likewise.
1077 * config/tc-d10v.c: Likewise.
1078 * config/tc-d30v.c: Likewise.
1079 * config/tc-dlx.h: Likewise.
1080 * config/tc-fr30.c: Likewise.
1081 * config/tc-frv.c: Likewise.
1082 * config/tc-h8300.c: Likewise.
1083 * config/tc-hppa.c: Likewise.
1084 * config/tc-i370.c: Likewise.
1085 * config/tc-i860.c: Likewise.
1086 * config/tc-i960.c: Likewise.
1087 * config/tc-ip2k.c: Likewise.
1088 * config/tc-iq2000.c: Likewise.
1089 * config/tc-m32c.c: Likewise.
1090 * config/tc-m32r.c: Likewise.
1091 * config/tc-maxq.c: Likewise.
1092 * config/tc-mcore.c: Likewise.
1093 * config/tc-mips.c: Likewise.
1094 * config/tc-mmix.c: Likewise.
1095 * config/tc-mn10200.c: Likewise.
1096 * config/tc-mn10300.c: Likewise.
1097 * config/tc-msp430.c: Likewise.
1098 * config/tc-mt.c: Likewise.
1099 * config/tc-ns32k.c: Likewise.
1100 * config/tc-openrisc.c: Likewise.
1101 * config/tc-ppc.c: Likewise.
1102 * config/tc-s390.c: Likewise.
1103 * config/tc-sh.c: Likewise.
1104 * config/tc-sh64.c: Likewise.
1105 * config/tc-sparc.c: Likewise.
1106 * config/tc-tic30.c: Likewise.
1107 * config/tc-tic4x.c: Likewise.
1108 * config/tc-tic54x.c: Likewise.
1109 * config/tc-v850.c: Likewise.
1110 * config/tc-vax.c: Likewise.
1111 * config/tc-xc16x.c: Likewise.
1112 * config/tc-xstormy16.c: Likewise.
1113 * config/tc-xtensa.c: Likewise.
1114 * config/tc-z80.c: Likewise.
1115 * config/tc-z8k.c: Likewise.
1116 * macro.h: Don't include sb.h or ansidecl.h.
1117 * sb.h: Don't include stdio.h or ansidecl.h.
1118 * cond.c: Include sb.h.
1119 * itbl-lex.l: Include as.h instead of other system headers.
1120 * itbl-parse.y: Likewise.
1121 * itbl-ops.c: Similarly.
1122 * itbl-ops.h: Don't include as.h or ansidecl.h.
1123 * config/bfin-defs.h: Don't include bfd.h or as.h.
1124 * config/bfin-parse.y: Include as.h instead of other system headers.
1125
9622b051
AM
11262006-06-06 Ben Elliston <bje@au.ibm.com>
1127 Anton Blanchard <anton@samba.org>
1128
1129 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1130 (md_show_usage): Document it.
1131 (ppc_setup_opcodes): Test power6 opcode flag bits.
1132 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1133
65263ce3
TS
11342006-06-06 Thiemo Seufer <ths@mips.com>
1135 Chao-ying Fu <fu@mips.com>
1136
1137 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1138 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1139 (macro_build): Update comment.
1140 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1141 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1142 CPU_HAS_MDMX.
1143 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1144 MIPS_CPU_ASE_MDMX flags for sb1.
1145
a9e24354
TS
11462006-06-05 Thiemo Seufer <ths@mips.com>
1147
1148 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1149 appropriate.
1150 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1151 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1152 and MT instructions a fatal error. Use INSERT_OPERAND where
1153 appropriate. Improve warnings for break and wait code overflows.
1154 Use symbolic constant of OP_MASK_COPZ.
1155 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1156
4cfe2c59
DJ
11572006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1158
1159 * po/Make-in (top_builddir): Define.
1160
e10fad12
JM
11612006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1162
1163 * doc/Makefile.am (TEXI2DVI): Define.
1164 * doc/Makefile.in: Regenerate.
1165 * doc/c-arc.texi: Fix typo.
1166
12e64c2c
AM
11672006-06-01 Alan Modra <amodra@bigpond.net.au>
1168
1169 * config/obj-ieee.c: Delete.
1170 * config/obj-ieee.h: Delete.
1171 * Makefile.am (OBJ_FORMATS): Remove ieee.
1172 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1173 (obj-ieee.o): Remove rule.
1174 * Makefile.in: Regenerate.
1175 * configure.in (atof): Remove tahoe.
1176 (OBJ_MAYBE_IEEE): Don't define.
1177 * configure: Regenerate.
1178 * config.in: Regenerate.
1179 * doc/Makefile.in: Regenerate.
1180 * po/POTFILES.in: Regenerate.
1181
20e95c23
DJ
11822006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1183
1184 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1185 and LIBINTL_DEP everywhere.
1186 (INTLLIBS): Remove.
1187 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1188 * acinclude.m4: Include new gettext macros.
1189 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1190 Remove local code for po/Makefile.
1191 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1192
eebf07fb
NC
11932006-05-30 Nick Clifton <nickc@redhat.com>
1194
1195 * po/es.po: Updated Spanish translation.
1196
b6aee19e
DC
11972006-05-06 Denis Chertykov <denisc@overta.ru>
1198
1199 * doc/c-avr.texi: New file.
1200 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1201 * doc/all.texi: Set AVR
1202 * doc/as.texinfo: Include c-avr.texi
1203
f8fdc850 12042006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1205
f8fdc850
JZ
1206 * config/bfin-parse.y (check_macfunc): Loose the condition of
1207 calling check_multiply_halfregs ().
1208
a3205465
JZ
12092006-05-25 Jie Zhang <jie.zhang@analog.com>
1210
1211 * config/bfin-parse.y (asm_1): Better check and deal with
1212 vector and scalar Multiply 16-Bit Operands instructions.
1213
9b52905e
NC
12142006-05-24 Nick Clifton <nickc@redhat.com>
1215
1216 * config/tc-hppa.c: Convert to ISO C90 format.
1217 * config/tc-hppa.h: Likewise.
1218
12192006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1220 Randolph Chung <randolph@tausq.org>
a70ae331 1221
9b52905e
NC
1222 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1223 is_tls_ieoff, is_tls_leoff): Define.
1224 (fix_new_hppa): Handle TLS.
1225 (cons_fix_new_hppa): Likewise.
1226 (pa_ip): Likewise.
1227 (md_apply_fix): Handle TLS relocs.
1228 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1229
a70ae331 12302006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1231
1232 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1233
ad3fea08
TS
12342006-05-23 Thiemo Seufer <ths@mips.com>
1235 David Ung <davidu@mips.com>
1236 Nigel Stephens <nigel@mips.com>
1237
1238 [ gas/ChangeLog ]
1239 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1240 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1241 ISA_HAS_MXHC1): New macros.
1242 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1243 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1244 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1245 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1246 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1247 (mips_after_parse_args): Change default handling of float register
1248 size to account for 32bit code with 64bit FP. Better sanity checking
1249 of ISA/ASE/ABI option combinations.
1250 (s_mipsset): Support switching of GPR and FPR sizes via
1251 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1252 options.
1253 (mips_elf_final_processing): We should record the use of 64bit FP
1254 registers in 32bit code but we don't, because ELF header flags are
1255 a scarce ressource.
1256 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1257 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1258 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1259 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1260 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1261 missing -march options. Document .set arch=CPU. Move .set smartmips
1262 to ASE page. Use @code for .set FOO examples.
1263
8b64503a
JZ
12642006-05-23 Jie Zhang <jie.zhang@analog.com>
1265
1266 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1267 if needed.
1268
403022e0
JZ
12692006-05-23 Jie Zhang <jie.zhang@analog.com>
1270
1271 * config/bfin-defs.h (bfin_equals): Remove declaration.
1272 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1273 * config/tc-bfin.c (bfin_name_is_register): Remove.
1274 (bfin_equals): Remove.
1275 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1276 (bfin_name_is_register): Remove declaration.
1277
7455baf8
TS
12782006-05-19 Thiemo Seufer <ths@mips.com>
1279 Nigel Stephens <nigel@mips.com>
1280
1281 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1282 (mips_oddfpreg_ok): New function.
1283 (mips_ip): Use it.
1284
707bfff6
TS
12852006-05-19 Thiemo Seufer <ths@mips.com>
1286 David Ung <davidu@mips.com>
1287
1288 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1289 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1290 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1291 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1292 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1293 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1294 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1295 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1296 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1297 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1298 reg_names_o32, reg_names_n32n64): Define register classes.
1299 (reg_lookup): New function, use register classes.
1300 (md_begin): Reserve register names in the symbol table. Simplify
1301 OBJ_ELF defines.
1302 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1303 Use reg_lookup.
1304 (mips16_ip): Use reg_lookup.
1305 (tc_get_register): Likewise.
1306 (tc_mips_regname_to_dw2regnum): New function.
1307
1df69f4f
TS
13082006-05-19 Thiemo Seufer <ths@mips.com>
1309
1310 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1311 Un-constify string argument.
1312 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1313 Likewise.
1314 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1315 Likewise.
1316 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1317 Likewise.
1318 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1319 Likewise.
1320 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1321 Likewise.
1322 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1323 Likewise.
1324
377260ba
NS
13252006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1326
1327 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1328 cfloat/m68881 to correct architecture before using it.
1329
cce7653b
NC
13302006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1331
a70ae331 1332 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1333 constant values.
1334
b0796911
PB
13352006-05-15 Paul Brook <paul@codesourcery.com>
1336
1337 * config/tc-arm.c (arm_adjust_symtab): Use
1338 bfd_is_arm_special_symbol_name.
1339
64b607e6
BW
13402006-05-15 Bob Wilson <bob.wilson@acm.org>
1341
1342 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1343 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1344 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1345 Handle errors from calls to xtensa_opcode_is_* functions.
1346
9b3f89ee
TS
13472006-05-14 Thiemo Seufer <ths@mips.com>
1348
1349 * config/tc-mips.c (macro_build): Test for currently active
1350 mips16 option.
1351 (mips16_ip): Reject invalid opcodes.
1352
370b66a1
CD
13532006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1354
1355 * doc/as.texinfo: Rename "Index" to "AS Index",
1356 and "ABORT" to "ABORT (COFF)".
1357
b6895b4f
PB
13582006-05-11 Paul Brook <paul@codesourcery.com>
1359
1360 * config/tc-arm.c (parse_half): New function.
1361 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1362 (parse_operands): Ditto.
1363 (do_mov16): Reject invalid relocations.
1364 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1365 (insns): Replace Iffff with HALF.
1366 (md_apply_fix): Add MOVW and MOVT relocs.
1367 (tc_gen_reloc): Ditto.
1368 * doc/c-arm.texi: Document relocation operators
1369
e28387c3
PB
13702006-05-11 Paul Brook <paul@codesourcery.com>
1371
1372 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1373
89ee2ebe
TS
13742006-05-11 Thiemo Seufer <ths@mips.com>
1375
1376 * config/tc-mips.c (append_insn): Don't check the range of j or
1377 jal addresses.
1378
53baae48
NC
13792006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1380
1381 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1382 relocs against external symbols for WinCE targets.
53baae48
NC
1383 (md_apply_fix): Likewise.
1384
4e2a74a8
TS
13852006-05-09 David Ung <davidu@mips.com>
1386
1387 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1388 j or jal address.
1389
337ff0a5
NC
13902006-05-09 Nick Clifton <nickc@redhat.com>
1391
1392 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1393 against symbols which are not going to be placed into the symbol
1394 table.
1395
8c9f705e
BE
13962006-05-09 Ben Elliston <bje@au.ibm.com>
1397
1398 * expr.c (operand): Remove `if (0 && ..)' statement and
1399 subsequently unused target_op label. Collapse `if (1 || ..)'
1400 statement.
1401 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1402 separately above the switch.
1403
2fd0d2ac
NC
14042006-05-08 Nick Clifton <nickc@redhat.com>
1405
1406 PR gas/2623
1407 * config/tc-msp430.c (line_separator_character): Define as |.
1408
e16bfa71
TS
14092006-05-08 Thiemo Seufer <ths@mips.com>
1410 Nigel Stephens <nigel@mips.com>
1411 David Ung <davidu@mips.com>
1412
1413 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1414 (mips_opts): Likewise.
1415 (file_ase_smartmips): New variable.
1416 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1417 (macro_build): Handle SmartMIPS instructions.
1418 (mips_ip): Likewise.
1419 (md_longopts): Add argument handling for smartmips.
1420 (md_parse_options, mips_after_parse_args): Likewise.
1421 (s_mipsset): Add .set smartmips support.
1422 (md_show_usage): Document -msmartmips/-mno-smartmips.
1423 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1424 .set smartmips.
1425 * doc/c-mips.texi: Likewise.
1426
32638454
AM
14272006-05-08 Alan Modra <amodra@bigpond.net.au>
1428
1429 * write.c (relax_segment): Add pass count arg. Don't error on
1430 negative org/space on first two passes.
1431 (relax_seg_info): New struct.
1432 (relax_seg, write_object_file): Adjust.
1433 * write.h (relax_segment): Update prototype.
1434
b7fc2769
JB
14352006-05-05 Julian Brown <julian@codesourcery.com>
1436
1437 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1438 checking.
1439 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1440 architecture version checks.
1441 (insns): Allow overlapping instructions to be used in VFP mode.
1442
7f841127
L
14432006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1444
1445 PR gas/2598
1446 * config/obj-elf.c (obj_elf_change_section): Allow user
1447 specified SHF_ALPHA_GPREL.
1448
73160847
NC
14492006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1450
1451 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1452 for PMEM related expressions.
1453
56487c55
NC
14542006-05-05 Nick Clifton <nickc@redhat.com>
1455
1456 PR gas/2582
1457 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1458 insertion of a directory separator character into a string at a
1459 given offset. Uses heuristics to decide when to use a backslash
1460 character rather than a forward-slash character.
1461 (dwarf2_directive_loc): Use the macro.
1462 (out_debug_info): Likewise.
1463
d43b4baf
TS
14642006-05-05 Thiemo Seufer <ths@mips.com>
1465 David Ung <davidu@mips.com>
1466
1467 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1468 instruction.
1469 (macro): Add new case M_CACHE_AB.
1470
088fa78e
KH
14712006-05-04 Kazu Hirata <kazu@codesourcery.com>
1472
1473 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1474 (opcode_lookup): Issue a warning for opcode with
1475 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1476 identical to OT_cinfix3.
1477 (TxC3w, TC3w, tC3w): New.
1478 (insns): Use tC3w and TC3w for comparison instructions with
1479 's' suffix.
1480
c9049d30
AM
14812006-05-04 Alan Modra <amodra@bigpond.net.au>
1482
1483 * subsegs.h (struct frchain): Delete frch_seg.
1484 (frchain_root): Delete.
1485 (seg_info): Define as macro.
1486 * subsegs.c (frchain_root): Delete.
1487 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1488 (subsegs_begin, subseg_change): Adjust for above.
1489 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1490 rather than to one big list.
1491 (subseg_get): Don't special case abs, und sections.
1492 (subseg_new, subseg_force_new): Don't set frchainP here.
1493 (seg_info): Delete.
1494 (subsegs_print_statistics): Adjust frag chain control list traversal.
1495 * debug.c (dmp_frags): Likewise.
1496 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1497 at frchain_root. Make use of known frchain ordering.
1498 (last_frag_for_seg): Likewise.
1499 (get_frag_fix): Likewise. Add seg param.
1500 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1501 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1502 (SUB_SEGMENT_ALIGN): Likewise.
1503 (subsegs_finish): Adjust frchain list traversal.
1504 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1505 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1506 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1507 (xtensa_fix_b_j_loop_end_frags): Likewise.
1508 (xtensa_fix_close_loop_end_frags): Likewise.
1509 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1510 (retrieve_segment_info): Delete frch_seg initialisation.
1511
f592407e
AM
15122006-05-03 Alan Modra <amodra@bigpond.net.au>
1513
1514 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1515 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1516 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1517 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1518
df7849c5
JM
15192006-05-02 Joseph Myers <joseph@codesourcery.com>
1520
1521 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1522 here.
1523 (md_apply_fix3): Multiply offset by 4 here for
1524 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1525
2d545b82
L
15262006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1527 Jan Beulich <jbeulich@novell.com>
1528
1529 * config/tc-i386.c (output_invalid_buf): Change size for
1530 unsigned char.
1531 * config/tc-tic30.c (output_invalid_buf): Likewise.
1532
1533 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1534 unsigned char.
1535 * config/tc-tic30.c (output_invalid): Likewise.
1536
38fc1cb1
DJ
15372006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1538
1539 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1540 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1541 (asconfig.texi): Don't set top_srcdir.
1542 * doc/as.texinfo: Don't use top_srcdir.
1543 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1544
2d545b82
L
15452006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1546
1547 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1548 * config/tc-tic30.c (output_invalid_buf): Likewise.
1549
1550 * config/tc-i386.c (output_invalid): Use snprintf instead of
1551 sprintf.
1552 * config/tc-ia64.c (declare_register_set): Likewise.
1553 (emit_one_bundle): Likewise.
1554 (check_dependencies): Likewise.
1555 * config/tc-tic30.c (output_invalid): Likewise.
1556
a8bc6c78
PB
15572006-05-02 Paul Brook <paul@codesourcery.com>
1558
1559 * config/tc-arm.c (arm_optimize_expr): New function.
1560 * config/tc-arm.h (md_optimize_expr): Define
1561 (arm_optimize_expr): Add prototype.
1562 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1563
58633d9a
BE
15642006-05-02 Ben Elliston <bje@au.ibm.com>
1565
22772e33
BE
1566 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1567 field unsigned.
1568
58633d9a
BE
1569 * sb.h (sb_list_vector): Move to sb.c.
1570 * sb.c (free_list): Use type of sb_list_vector directly.
1571 (sb_build): Fix off-by-one error in assertion about `size'.
1572
89cdfe57
BE
15732006-05-01 Ben Elliston <bje@au.ibm.com>
1574
1575 * listing.c (listing_listing): Remove useless loop.
1576 * macro.c (macro_expand): Remove is_positional local variable.
1577 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1578 and simplify surrounding expressions, where possible.
1579 (assign_symbol): Likewise.
1580 (s_weakref): Likewise.
1581 * symbols.c (colon): Likewise.
1582
c35da140
AM
15832006-05-01 James Lemke <jwlemke@wasabisystems.com>
1584
1585 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1586
9bcd4f99
TS
15872006-04-30 Thiemo Seufer <ths@mips.com>
1588 David Ung <davidu@mips.com>
1589
1590 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1591 (mips_immed): New table that records various handling of udi
1592 instruction patterns.
1593 (mips_ip): Adds udi handling.
1594
001ae1a4
AM
15952006-04-28 Alan Modra <amodra@bigpond.net.au>
1596
1597 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1598 of list rather than beginning.
1599
136da414
JB
16002006-04-26 Julian Brown <julian@codesourcery.com>
1601
1602 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1603 (is_quarter_float): Rename from above. Simplify slightly.
1604 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1605 number.
1606 (parse_neon_mov): Parse floating-point constants.
1607 (neon_qfloat_bits): Fix encoding.
1608 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1609 preference to integer encoding when using the F32 type.
1610
dcbf9037
JB
16112006-04-26 Julian Brown <julian@codesourcery.com>
1612
1613 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1614 zero-initialising structures containing it will lead to invalid types).
1615 (arm_it): Add vectype to each operand.
1616 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1617 defined field.
1618 (neon_typed_alias): New structure. Extra information for typed
1619 register aliases.
1620 (reg_entry): Add neon type info field.
1621 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1622 Break out alternative syntax for coprocessor registers, etc. into...
1623 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1624 out from arm_reg_parse.
1625 (parse_neon_type): Move. Return SUCCESS/FAIL.
1626 (first_error): New function. Call to ensure first error which occurs is
1627 reported.
1628 (parse_neon_operand_type): Parse exactly one type.
1629 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1630 (parse_typed_reg_or_scalar): New function. Handle core of both
1631 arm_typed_reg_parse and parse_scalar.
1632 (arm_typed_reg_parse): Parse a register with an optional type.
1633 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1634 result.
1635 (parse_scalar): Parse a Neon scalar with optional type.
1636 (parse_reg_list): Use first_error.
1637 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1638 (neon_alias_types_same): New function. Return true if two (alias) types
1639 are the same.
1640 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1641 of elements.
1642 (insert_reg_alias): Return new reg_entry not void.
1643 (insert_neon_reg_alias): New function. Insert type/index information as
1644 well as register for alias.
1645 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1646 make typed register aliases accordingly.
1647 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1648 of line.
1649 (s_unreq): Delete type information if present.
1650 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1651 (s_arm_unwind_save_mmxwcg): Likewise.
1652 (s_arm_unwind_movsp): Likewise.
1653 (s_arm_unwind_setfp): Likewise.
1654 (parse_shift): Likewise.
1655 (parse_shifter_operand): Likewise.
1656 (parse_address): Likewise.
1657 (parse_tb): Likewise.
1658 (tc_arm_regname_to_dw2regnum): Likewise.
1659 (md_pseudo_table): Add dn, qn.
1660 (parse_neon_mov): Handle typed operands.
1661 (parse_operands): Likewise.
1662 (neon_type_mask): Add N_SIZ.
1663 (N_ALLMODS): New macro.
1664 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1665 (el_type_of_type_chk): Add some safeguards.
1666 (modify_types_allowed): Fix logic bug.
1667 (neon_check_type): Handle operands with types.
1668 (neon_three_same): Remove redundant optional arg handling.
1669 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1670 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1671 (do_neon_step): Adjust accordingly.
1672 (neon_cmode_for_logic_imm): Use first_error.
1673 (do_neon_bitfield): Call neon_check_type.
1674 (neon_dyadic): Rename to...
1675 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1676 to allow modification of type of the destination.
1677 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1678 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1679 (do_neon_compare): Make destination be an untyped bitfield.
1680 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1681 (neon_mul_mac): Return early in case of errors.
1682 (neon_move_immediate): Use first_error.
1683 (neon_mac_reg_scalar_long): Fix type to include scalar.
1684 (do_neon_dup): Likewise.
1685 (do_neon_mov): Likewise (in several places).
1686 (do_neon_tbl_tbx): Fix type.
1687 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1688 (do_neon_ld_dup): Exit early in case of errors and/or use
1689 first_error.
1690 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1691 Handle .dn/.qn directives.
1692 (REGDEF): Add zero for reg_entry neon field.
1693
5287ad62
JB
16942006-04-26 Julian Brown <julian@codesourcery.com>
1695
1696 * config/tc-arm.c (limits.h): Include.
1697 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1698 (fpu_vfp_v3_or_neon_ext): Declare constants.
1699 (neon_el_type): New enumeration of types for Neon vector elements.
1700 (neon_type_el): New struct. Define type and size of a vector element.
1701 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1702 instruction.
1703 (neon_type): Define struct. The type of an instruction.
1704 (arm_it): Add 'vectype' for the current instruction.
1705 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1706 (vfp_sp_reg_pos): Rename to...
1707 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1708 tags.
1709 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1710 (Neon D or Q register).
1711 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1712 register.
1713 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1714 (my_get_expression): Allow above constant as argument to accept
1715 64-bit constants with optional prefix.
1716 (arm_reg_parse): Add extra argument to return the specific type of
1717 register in when either a D or Q register (REG_TYPE_NDQ) is
1718 requested. Can be NULL.
1719 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1720 (parse_reg_list): Update for new arm_reg_parse args.
1721 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1722 (parse_neon_el_struct_list): New function. Parse element/structure
1723 register lists for VLD<n>/VST<n> instructions.
1724 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1725 (s_arm_unwind_save_mmxwr): Likewise.
1726 (s_arm_unwind_save_mmxwcg): Likewise.
1727 (s_arm_unwind_movsp): Likewise.
1728 (s_arm_unwind_setfp): Likewise.
1729 (parse_big_immediate): New function. Parse an immediate, which may be
1730 64 bits wide. Put results in inst.operands[i].
1731 (parse_shift): Update for new arm_reg_parse args.
1732 (parse_address): Likewise. Add parsing of alignment specifiers.
1733 (parse_neon_mov): Parse the operands of a VMOV instruction.
1734 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1735 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1736 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1737 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1738 (parse_operands): Handle new codes above.
1739 (encode_arm_vfp_sp_reg): Rename to...
1740 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1741 selected VFP version only supports D0-D15.
1742 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1743 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1744 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1745 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1746 encode_arm_vfp_reg name, and allow 32 D regs.
1747 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1748 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1749 regs.
1750 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1751 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1752 constant-load and conversion insns introduced with VFPv3.
1753 (neon_tab_entry): New struct.
1754 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1755 those which are the targets of pseudo-instructions.
1756 (neon_opc): Enumerate opcodes, use as indices into...
1757 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1758 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1759 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1760 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1761 neon_enc_tab.
1762 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1763 Neon instructions.
1764 (neon_type_mask): New. Compact type representation for type checking.
1765 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1766 permitted type combinations.
1767 (N_IGNORE_TYPE): New macro.
1768 (neon_check_shape): New function. Check an instruction shape for
1769 multiple alternatives. Return the specific shape for the current
1770 instruction.
1771 (neon_modify_type_size): New function. Modify a vector type and size,
1772 depending on the bit mask in argument 1.
1773 (neon_type_promote): New function. Convert a given "key" type (of an
1774 operand) into the correct type for a different operand, based on a bit
1775 mask.
1776 (type_chk_of_el_type): New function. Convert a type and size into the
1777 compact representation used for type checking.
1778 (el_type_of_type_ckh): New function. Reverse of above (only when a
1779 single bit is set in the bit mask).
1780 (modify_types_allowed): New function. Alter a mask of allowed types
1781 based on a bit mask of modifications.
1782 (neon_check_type): New function. Check the type of the current
1783 instruction against the variable argument list. The "key" type of the
1784 instruction is returned.
1785 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1786 a Neon data-processing instruction depending on whether we're in ARM
1787 mode or Thumb-2 mode.
1788 (neon_logbits): New function.
1789 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1790 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1791 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1792 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1793 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1794 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1795 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1796 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1797 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1798 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1799 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1800 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1801 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1802 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1803 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1804 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1805 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1806 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1807 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1808 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1809 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1810 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1811 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1812 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1813 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1814 helpers.
1815 (parse_neon_type): New function. Parse Neon type specifier.
1816 (opcode_lookup): Allow parsing of Neon type specifiers.
1817 (REGNUM2, REGSETH, REGSET2): New macros.
1818 (reg_names): Add new VFPv3 and Neon registers.
1819 (NUF, nUF, NCE, nCE): New macros for opcode table.
1820 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1821 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1822 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1823 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1824 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1825 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1826 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1827 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1828 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1829 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1830 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1831 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1832 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1833 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1834 fto[us][lh][sd].
1835 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1836 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1837 (arm_option_cpu_value): Add vfp3 and neon.
1838 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1839 VFPv1 attribute.
1840
1946c96e
BW
18412006-04-25 Bob Wilson <bob.wilson@acm.org>
1842
1843 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1844 syntax instead of hardcoded opcodes with ".w18" suffixes.
1845 (wide_branch_opcode): New.
1846 (build_transition): Use it to check for wide branch opcodes with
1847 either ".w18" or ".w15" suffixes.
1848
5033a645
BW
18492006-04-25 Bob Wilson <bob.wilson@acm.org>
1850
1851 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1852 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1853 frag's is_literal flag.
1854
395fa56f
BW
18552006-04-25 Bob Wilson <bob.wilson@acm.org>
1856
1857 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1858
708587a4
KH
18592006-04-23 Kazu Hirata <kazu@codesourcery.com>
1860
1861 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1862 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1863 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1864 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1865 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1866
8463be01
PB
18672005-04-20 Paul Brook <paul@codesourcery.com>
1868
1869 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1870 all targets.
1871 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1872
f26a5955
AM
18732006-04-19 Alan Modra <amodra@bigpond.net.au>
1874
1875 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1876 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1877 Make some cpus unsupported on ELF. Run "make dep-am".
1878 * Makefile.in: Regenerate.
1879
241a6c40
AM
18802006-04-19 Alan Modra <amodra@bigpond.net.au>
1881
1882 * configure.in (--enable-targets): Indent help message.
1883 * configure: Regenerate.
1884
bb8f5920
L
18852006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1886
1887 PR gas/2533
1888 * config/tc-i386.c (i386_immediate): Check illegal immediate
1889 register operand.
1890
23d9d9de
AM
18912006-04-18 Alan Modra <amodra@bigpond.net.au>
1892
64e74474
AM
1893 * config/tc-i386.c: Formatting.
1894 (output_disp, output_imm): ISO C90 params.
1895
6cbe03fb
AM
1896 * frags.c (frag_offset_fixed_p): Constify args.
1897 * frags.h (frag_offset_fixed_p): Ditto.
1898
23d9d9de
AM
1899 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1900 (COFF_MAGIC): Delete.
a37d486e
AM
1901
1902 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1903
e7403566
DJ
19042006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1905
1906 * po/POTFILES.in: Regenerated.
1907
58ab4f3d
MM
19082006-04-16 Mark Mitchell <mark@codesourcery.com>
1909
1910 * doc/as.texinfo: Mention that some .type syntaxes are not
1911 supported on all architectures.
1912
482fd9f9
BW
19132006-04-14 Sterling Augustine <sterling@tensilica.com>
1914
1915 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1916 instructions when such transformations have been disabled.
1917
05d58145
BW
19182006-04-10 Sterling Augustine <sterling@tensilica.com>
1919
1920 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1921 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1922 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1923 decoding the loop instructions. Remove current_offset variable.
1924 (xtensa_fix_short_loop_frags): Likewise.
1925 (min_bytes_to_other_loop_end): Remove current_offset argument.
1926
9e75b3fa
AM
19272006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1928
a37d486e 1929 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1930 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1931
d727e8c2
NC
19322006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1933
1934 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1935 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1936 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1937 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1938 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1939 at90can64, at90usb646, at90usb647, at90usb1286 and
1940 at90usb1287.
1941 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1942
d252fdde
PB
19432006-04-07 Paul Brook <paul@codesourcery.com>
1944
1945 * config/tc-arm.c (parse_operands): Set default error message.
1946
ab1eb5fe
PB
19472006-04-07 Paul Brook <paul@codesourcery.com>
1948
1949 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1950
7ae2971b
PB
19512006-04-07 Paul Brook <paul@codesourcery.com>
1952
1953 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1954
53365c0d
PB
19552006-04-07 Paul Brook <paul@codesourcery.com>
1956
1957 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1958 (move_or_literal_pool): Handle Thumb-2 instructions.
1959 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1960
45aa61fe
AM
19612006-04-07 Alan Modra <amodra@bigpond.net.au>
1962
1963 PR 2512.
1964 * config/tc-i386.c (match_template): Move 64-bit operand tests
1965 inside loop.
1966
108a6f8e
CD
19672006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1968
1969 * po/Make-in: Add install-html target.
1970 * Makefile.am: Add install-html and install-html-recursive targets.
1971 * Makefile.in: Regenerate.
1972 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1973 * configure: Regenerate.
1974 * doc/Makefile.am: Add install-html and install-html-am targets.
1975 * doc/Makefile.in: Regenerate.
1976
ec651a3b
AM
19772006-04-06 Alan Modra <amodra@bigpond.net.au>
1978
1979 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1980 second scan.
1981
910600e9
RS
19822006-04-05 Richard Sandiford <richard@codesourcery.com>
1983 Daniel Jacobowitz <dan@codesourcery.com>
1984
1985 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1986 (GOTT_BASE, GOTT_INDEX): New.
1987 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1988 GOTT_INDEX when generating VxWorks PIC.
1989 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1990 use the generic *-*-vxworks* stanza instead.
1991
99630778
AM
19922006-04-04 Alan Modra <amodra@bigpond.net.au>
1993
1994 PR 997
1995 * frags.c (frag_offset_fixed_p): New function.
1996 * frags.h (frag_offset_fixed_p): Declare.
1997 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1998 (resolve_expression): Likewise.
1999
a02728c8
BW
20002006-04-03 Sterling Augustine <sterling@tensilica.com>
2001
2002 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2003 of the same length but different numbers of slots.
2004
9dfde49d
AS
20052006-03-30 Andreas Schwab <schwab@suse.de>
2006
2007 * configure.in: Fix help string for --enable-targets option.
2008 * configure: Regenerate.
2009
2da12c60
NS
20102006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2011
6d89cc8f
NS
2012 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2013 (m68k_ip): ... here. Use for all chips. Protect against buffer
2014 overrun and avoid excessive copying.
2015
2da12c60
NS
2016 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2017 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2018 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2019 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2020 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2021 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2022 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
2023 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2024 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2025 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2026 (struct m68k_cpu): Change chip field to control_regs.
2027 (current_chip): Remove.
2028 (control_regs): New.
2029 (m68k_archs, m68k_extensions): Adjust.
2030 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2031 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2032 (find_cf_chip): Reimplement for new organization of cpu table.
2033 (select_control_regs): Remove.
2034 (mri_chip): Adjust.
2035 (struct save_opts): Save control regs, not chip.
2036 (s_save, s_restore): Adjust.
2037 (m68k_lookup_cpu): Give deprecated warning when necessary.
2038 (m68k_init_arch): Adjust.
2039 (md_show_usage): Adjust for new cpu table organization.
2040
1ac4baed
BS
20412006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2042
2043 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2044 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2045 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2046 "elf/bfin.h".
2047 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2048 (any_gotrel): New rule.
2049 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2050 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2051 "elf/bfin.h".
2052 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2053 (bfin_pic_ptr): New function.
2054 (md_pseudo_table): Add it for ".picptr".
2055 (OPTION_FDPIC): New macro.
2056 (md_longopts): Add -mfdpic.
2057 (md_parse_option): Handle it.
2058 (md_begin): Set BFD flags.
2059 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2060 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2061 us for GOT relocs.
2062 * Makefile.am (bfin-parse.o): Update dependencies.
2063 (DEPTC_bfin_elf): Likewise.
2064 * Makefile.in: Regenerate.
2065
a9d34880
RS
20662006-03-25 Richard Sandiford <richard@codesourcery.com>
2067
2068 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2069 mcfemac instead of mcfmac.
2070
9ca26584
AJ
20712006-03-23 Michael Matz <matz@suse.de>
2072
2073 * config/tc-i386.c (type_names): Correct placement of 'static'.
2074 (reloc): Map some more relocs to their 64 bit counterpart when
2075 size is 8.
2076 (output_insn): Work around breakage if DEBUG386 is defined.
2077 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2078 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2079 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2080 different from i386.
2081 (output_imm): Ditto.
2082 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2083 Imm64.
2084 (md_convert_frag): Jumps can now be larger than 2GB away, error
2085 out in that case.
2086 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2087 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2088
0a44bf69
RS
20892006-03-22 Richard Sandiford <richard@codesourcery.com>
2090 Daniel Jacobowitz <dan@codesourcery.com>
2091 Phil Edwards <phil@codesourcery.com>
2092 Zack Weinberg <zack@codesourcery.com>
2093 Mark Mitchell <mark@codesourcery.com>
2094 Nathan Sidwell <nathan@codesourcery.com>
2095
2096 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2097 (md_begin): Complain about -G being used for PIC. Don't change
2098 the text, data and bss alignments on VxWorks.
2099 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2100 generating VxWorks PIC.
2101 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2102 (macro): Likewise, but do not treat la $25 specially for
2103 VxWorks PIC, and do not handle jal.
2104 (OPTION_MVXWORKS_PIC): New macro.
2105 (md_longopts): Add -mvxworks-pic.
2106 (md_parse_option): Don't complain about using PIC and -G together here.
2107 Handle OPTION_MVXWORKS_PIC.
2108 (md_estimate_size_before_relax): Always use the first relaxation
2109 sequence on VxWorks.
2110 * config/tc-mips.h (VXWORKS_PIC): New.
2111
080eb7fe
PB
21122006-03-21 Paul Brook <paul@codesourcery.com>
2113
2114 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2115
03aaa593
BW
21162006-03-21 Sterling Augustine <sterling@tensilica.com>
2117
2118 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2119 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2120 (get_loop_align_size): New.
2121 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2122 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2123 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2124 (get_noop_aligned_address): Use get_loop_align_size.
2125 (get_aligned_diff): Likewise.
2126
3e94bf1a
PB
21272006-03-21 Paul Brook <paul@codesourcery.com>
2128
2129 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2130
dfa9f0d5
PB
21312006-03-20 Paul Brook <paul@codesourcery.com>
2132
2133 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2134 (do_t_branch): Encode branches inside IT blocks as unconditional.
2135 (do_t_cps): New function.
2136 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2137 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2138 (opcode_lookup): Allow conditional suffixes on all instructions in
2139 Thumb mode.
2140 (md_assemble): Advance condexec state before checking for errors.
2141 (insns): Use do_t_cps.
2142
6e1cb1a6
PB
21432006-03-20 Paul Brook <paul@codesourcery.com>
2144
2145 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2146 outputting the insn.
2147
0a966e2d
JBG
21482006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2149
2150 * config/tc-vax.c: Update copyright year.
2151 * config/tc-vax.h: Likewise.
2152
a49fcc17
JBG
21532006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2154
2155 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2156 make it static.
2157 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2158
f5208ef2
PB
21592006-03-17 Paul Brook <paul@codesourcery.com>
2160
2161 * config/tc-arm.c (insns): Add ldm and stm.
2162
cb4c78d6
BE
21632006-03-17 Ben Elliston <bje@au.ibm.com>
2164
2165 PR gas/2446
2166 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2167
c16d2bf0
PB
21682006-03-16 Paul Brook <paul@codesourcery.com>
2169
2170 * config/tc-arm.c (insns): Add "svc".
2171
80ca4e2c
BW
21722006-03-13 Bob Wilson <bob.wilson@acm.org>
2173
2174 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2175 flag and avoid double underscore prefixes.
2176
3a4a14e9
PB
21772006-03-10 Paul Brook <paul@codesourcery.com>
2178
2179 * config/tc-arm.c (md_begin): Handle EABIv5.
2180 (arm_eabis): Add EF_ARM_EABI_VER5.
2181 * doc/c-arm.texi: Document -meabi=5.
2182
518051dc
BE
21832006-03-10 Ben Elliston <bje@au.ibm.com>
2184
2185 * app.c (do_scrub_chars): Simplify string handling.
2186
00a97672
RS
21872006-03-07 Richard Sandiford <richard@codesourcery.com>
2188 Daniel Jacobowitz <dan@codesourcery.com>
2189 Zack Weinberg <zack@codesourcery.com>
2190 Nathan Sidwell <nathan@codesourcery.com>
2191 Paul Brook <paul@codesourcery.com>
2192 Ricardo Anguiano <anguiano@codesourcery.com>
2193 Phil Edwards <phil@codesourcery.com>
2194
2195 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2196 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2197 R_ARM_ABS12 reloc.
2198 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2199 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2200 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2201
b29757dc
BW
22022006-03-06 Bob Wilson <bob.wilson@acm.org>
2203
2204 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2205 even when using the text-section-literals option.
2206
0b2e31dc
NS
22072006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2208
2209 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2210 and cf.
2211 (m68k_ip): <case 'J'> Check we have some control regs.
2212 (md_parse_option): Allow raw arch switch.
2213 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2214 whether 68881 or cfloat was meant by -mfloat.
2215 (md_show_usage): Adjust extension display.
2216 (m68k_elf_final_processing): Adjust.
2217
df406460
NC
22182006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2219
2220 * config/tc-avr.c (avr_mod_hash_value): New function.
2221 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2222 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2223 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2224 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2225 of (int).
2226 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2227 fixups, abort otherwise.
df406460
NC
2228 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2229 tc_fix_adjustable): Define.
a70ae331 2230
53022e4a
JW
22312006-03-02 James E Wilson <wilson@specifix.com>
2232
2233 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2234 change the template, then clear md.slot[curr].end_of_insn_group.
2235
9f6f925e
JB
22362006-02-28 Jan Beulich <jbeulich@novell.com>
2237
2238 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2239
0e31b3e1
JB
22402006-02-28 Jan Beulich <jbeulich@novell.com>
2241
2242 PR/1070
2243 * macro.c (getstring): Don't treat parentheses special anymore.
2244 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2245 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2246 characters.
2247
10cd14b4
AM
22482006-02-28 Mat <mat@csail.mit.edu>
2249
2250 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2251
63752a75
JJ
22522006-02-27 Jakub Jelinek <jakub@redhat.com>
2253
2254 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2255 field.
2256 (CFI_signal_frame): Define.
2257 (cfi_pseudo_table): Add .cfi_signal_frame.
2258 (dot_cfi): Handle CFI_signal_frame.
2259 (output_cie): Handle cie->signal_frame.
2260 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2261 different. Copy signal_frame from FDE to newly created CIE.
2262 * doc/as.texinfo: Document .cfi_signal_frame.
2263
f7d9e5c3
CD
22642006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2265
2266 * doc/Makefile.am: Add html target.
2267 * doc/Makefile.in: Regenerate.
2268 * po/Make-in: Add html target.
2269
331d2d0d
L
22702006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2271
8502d882 2272 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2273 Instructions.
2274
8502d882 2275 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2276 (CpuUnknownFlags): Add CpuMNI.
2277
10156f83
DM
22782006-02-24 David S. Miller <davem@sunset.davemloft.net>
2279
2280 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2281 (hpriv_reg_table): New table for hyperprivileged registers.
2282 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2283 register encoding.
2284
6772dd07
DD
22852006-02-24 DJ Delorie <dj@redhat.com>
2286
2287 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2288 (tc_gen_reloc): Don't define.
2289 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2290 (OPTION_LINKRELAX): New.
2291 (md_longopts): Add it.
2292 (m32c_relax): New.
2293 (md_parse_options): Set it.
2294 (md_assemble): Emit relaxation relocs as needed.
2295 (md_convert_frag): Emit relaxation relocs as needed.
2296 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2297 (m32c_apply_fix): New.
2298 (tc_gen_reloc): New.
2299 (m32c_force_relocation): Force out jump relocs when relaxing.
2300 (m32c_fix_adjustable): Return false if relaxing.
2301
62b3e311
PB
23022006-02-24 Paul Brook <paul@codesourcery.com>
2303
2304 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2305 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2306 (struct asm_barrier_opt): Define.
2307 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2308 (parse_psr): Accept V7M psr names.
2309 (parse_barrier): New function.
2310 (enum operand_parse_code): Add OP_oBARRIER.
2311 (parse_operands): Implement OP_oBARRIER.
2312 (do_barrier): New function.
2313 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2314 (do_t_cpsi): Add V7M restrictions.
2315 (do_t_mrs, do_t_msr): Validate V7M variants.
2316 (md_assemble): Check for NULL variants.
2317 (v7m_psrs, barrier_opt_names): New tables.
2318 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2319 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2320 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2321 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2322 (struct cpu_arch_ver_table): Define.
2323 (cpu_arch_ver): New.
2324 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2325 Tag_CPU_arch_profile.
2326 * doc/c-arm.texi: Document new cpu and arch options.
2327
59cf82fe
L
23282006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2329
2330 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2331
19a7219f
L
23322006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2333
2334 * config/tc-ia64.c: Update copyright years.
2335
7f3dfb9c
L
23362006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2337
2338 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2339 SDM 2.2.
2340
f40d1643
PB
23412005-02-22 Paul Brook <paul@codesourcery.com>
2342
2343 * config/tc-arm.c (do_pld): Remove incorrect write to
2344 inst.instruction.
2345 (encode_thumb32_addr_mode): Use correct operand.
2346
216d22bc
PB
23472006-02-21 Paul Brook <paul@codesourcery.com>
2348
2349 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2350
d70c5fc7
NC
23512006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2352 Anil Paranjape <anilp1@kpitcummins.com>
2353 Shilin Shakti <shilins@kpitcummins.com>
2354
2355 * Makefile.am: Add xc16x related entry.
2356 * Makefile.in: Regenerate.
2357 * configure.in: Added xc16x related entry.
2358 * configure: Regenerate.
2359 * config/tc-xc16x.h: New file
2360 * config/tc-xc16x.c: New file
2361 * doc/c-xc16x.texi: New file for xc16x
2362 * doc/all.texi: Entry for xc16x
a70ae331 2363 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2364 * NEWS: Announce the support for the new target.
2365
aaa2ab3d
NH
23662006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2367
2368 * configure.tgt: set emulation for mips-*-netbsd*
2369
82de001f
JJ
23702006-02-14 Jakub Jelinek <jakub@redhat.com>
2371
2372 * config.in: Rebuilt.
2373
431ad2d0
BW
23742006-02-13 Bob Wilson <bob.wilson@acm.org>
2375
2376 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2377 from 1, not 0, in error messages.
2378 (md_assemble): Simplify special-case check for ENTRY instructions.
2379 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2380 operand in error message.
2381
94089a50
JM
23822006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2383
2384 * configure.tgt (arm-*-linux-gnueabi*): Change to
2385 arm-*-linux-*eabi*.
2386
52de4c06
NC
23872006-02-10 Nick Clifton <nickc@redhat.com>
2388
70e45ad9
NC
2389 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2390 32-bit value is propagated into the upper bits of a 64-bit long.
2391
52de4c06
NC
2392 * config/tc-arc.c (init_opcode_tables): Fix cast.
2393 (arc_extoper, md_operand): Likewise.
2394
21af2bbd
BW
23952006-02-09 David Heine <dlheine@tensilica.com>
2396
2397 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2398 each relaxation step.
2399
75a706fc 24002006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2401
75a706fc
L
2402 * configure.in (CHECK_DECLS): Add vsnprintf.
2403 * configure: Regenerate.
2404 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2405 include/declare here, but...
2406 * as.h: Move code detecting VARARGS idiom to the top.
2407 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2408 (vsnprintf): Declare if not already declared.
2409
0d474464
L
24102006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2411
2412 * as.c (close_output_file): New.
2413 (main): Register close_output_file with xatexit before
2414 dump_statistics. Don't call output_file_close.
2415
266abb8f
NS
24162006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2417
2418 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2419 mcf5329_control_regs): New.
2420 (not_current_architecture, selected_arch, selected_cpu): New.
2421 (m68k_archs, m68k_extensions): New.
2422 (archs): Renamed to ...
2423 (m68k_cpus): ... here. Adjust.
2424 (n_arches): Remove.
2425 (md_pseudo_table): Add arch and cpu directives.
2426 (find_cf_chip, m68k_ip): Adjust table scanning.
2427 (no_68851, no_68881): Remove.
2428 (md_assemble): Lazily initialize.
2429 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2430 (md_init_after_args): Move functionality to m68k_init_arch.
2431 (mri_chip): Adjust table scanning.
2432 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2433 options with saner parsing.
2434 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2435 m68k_init_arch): New.
2436 (s_m68k_cpu, s_m68k_arch): New.
2437 (md_show_usage): Adjust.
2438 (m68k_elf_final_processing): Set CF EF flags.
2439 * config/tc-m68k.h (m68k_init_after_args): Remove.
2440 (tc_init_after_args): Remove.
2441 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2442 (M68k-Directives): Document .arch and .cpu directives.
2443
134dcee5
AM
24442006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2445
a70ae331
AM
2446 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2447 synonyms for equ and defl.
134dcee5
AM
2448 (z80_cons_fix_new): New function.
2449 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2450 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2451 now handled as pseudo-op rather than an instruction.
2452 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2453 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2454 Add entries for def24,def32,d24,d32.
2455 (md_assemble): Improved error handling.
2456 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2457 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2458 (z80_cons_fix_new): Declare.
a70ae331 2459 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2460 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2461
a9931606
PB
24622006-02-02 Paul Brook <paul@codesourcery.com>
2463
2464 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2465
ef8d22e6
PB
24662005-02-02 Paul Brook <paul@codesourcery.com>
2467
2468 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2469 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2470 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2471 T2_OPCODE_RSB): Define.
2472 (thumb32_negate_data_op): New function.
2473 (md_apply_fix): Use it.
2474
e7da6241
BW
24752006-01-31 Bob Wilson <bob.wilson@acm.org>
2476
2477 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2478 fields.
2479 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2480 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2481 subtracted symbols.
2482 (relaxation_requirements): Add pfinish_frag argument and use it to
2483 replace setting tinsn->record_fix fields.
2484 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2485 and vinsn_to_insnbuf. Remove references to record_fix and
2486 slot_sub_symbols fields.
2487 (xtensa_mark_narrow_branches): Delete unused code.
2488 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2489 a symbol.
2490 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2491 record_fix fields.
2492 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2493 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2494 of the record_fix field. Simplify error messages for unexpected
2495 symbolic operands.
2496 (set_expr_symbol_offset_diff): Delete.
2497
79134647
PB
24982006-01-31 Paul Brook <paul@codesourcery.com>
2499
2500 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2501
e74cfd16
PB
25022006-01-31 Paul Brook <paul@codesourcery.com>
2503 Richard Earnshaw <rearnsha@arm.com>
2504
2505 * config/tc-arm.c: Use arm_feature_set.
2506 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2507 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2508 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2509 New variables.
2510 (insns): Use them.
2511 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2512 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2513 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2514 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2515 feature flags.
2516 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2517 (arm_opts): Move old cpu/arch options from here...
2518 (arm_legacy_opts): ... to here.
2519 (md_parse_option): Search arm_legacy_opts.
2520 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2521 (arm_float_abis, arm_eabis): Make const.
2522
d47d412e
BW
25232006-01-25 Bob Wilson <bob.wilson@acm.org>
2524
2525 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2526
b14273fe
JZ
25272006-01-21 Jie Zhang <jie.zhang@analog.com>
2528
2529 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2530 in load immediate intruction.
2531
39cd1c76
JZ
25322006-01-21 Jie Zhang <jie.zhang@analog.com>
2533
2534 * config/bfin-parse.y (value_match): Use correct conversion
2535 specifications in template string for __FILE__ and __LINE__.
2536 (binary): Ditto.
2537 (unary): Ditto.
2538
67a4f2b7
AO
25392006-01-18 Alexandre Oliva <aoliva@redhat.com>
2540
2541 Introduce TLS descriptors for i386 and x86_64.
2542 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2543 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2544 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2545 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2546 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2547 displacement bits.
2548 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2549 (lex_got): Handle @tlsdesc and @tlscall.
2550 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2551
8ad7c533
NC
25522006-01-11 Nick Clifton <nickc@redhat.com>
2553
2554 Fixes for building on 64-bit hosts:
2555 * config/tc-avr.c (mod_index): New union to allow conversion
2556 between pointers and integers.
2557 (md_begin, avr_ldi_expression): Use it.
2558 * config/tc-i370.c (md_assemble): Add cast for argument to print
2559 statement.
2560 * config/tc-tic54x.c (subsym_substitute): Likewise.
2561 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2562 opindex field of fr_cgen structure into a pointer so that it can
2563 be stored in a frag.
2564 * config/tc-mn10300.c (md_assemble): Likewise.
2565 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2566 types.
2567 * config/tc-v850.c: Replace uses of (int) casts with correct
2568 types.
2569
4dcb3903
L
25702006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2571
2572 PR gas/2117
2573 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2574
e0f6ea40
HPN
25752006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2576
2577 PR gas/2101
2578 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2579 a local-label reference.
2580
e88d958a 2581For older changes see ChangeLog-2005
08d56133
NC
2582\f
2583Local Variables:
2584mode: change-log
2585left-margin: 8
2586fill-column: 74
2587version-control: never
2588End:
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