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Reorder invalid default mask check
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ad8ecc81
MZ		 12013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
2
3 * config/tc-i386.c (check_VecOperands): Reorder checks.
4
b83a9376
CM		 52013-11-11 Catherine Moore <clm@codesourcery.com>
6
7 * config/mips/tc-mips.c (convert_reg_type): Use
8 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
9 (reg_needs_delay): Likewise.
10 (insns_between): Likewise.
11
e2b5892e
JBG		 122013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
13
14 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
15
49eec193
YZ		 162013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
17
18 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
19 call aarch64_sys_reg_deprecated_p and warn about the deprecated
20 system registers.
21
68a64283
YZ		 222013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
23
24 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
25
8db49cc2
WN		 262013-11-05 Will Newton <will.newton@linaro.org>
27
28 PR gas/16103
29 * config/tc-aarch64.c (parse_operands): Avoid trying to
30 parse a vector register as an immediate.
31
e4630f71
JB		 322013-11-04 Jan Beulich <jbeulich@suse.com>
33
34 * config/tc-i386.c (check_long_reg): Correct comment indentation.
35 (check_qword_reg): Correct comment and its indentation.
36 (check_word_reg): Extend comment and correct its indentation. Also
37 check for 64-bit register.
38
6911b7dc
AM		 392013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
40
41 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
42 (ppc_elf_localentry): New function.
43 (ppc_force_relocation): Force relocs on all branches to localenty
44 symbols.
45 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
46
ee67d69a
AM		 472013-10-30 Alan Modra <amodra@gmail.com>
48
49 * config/tc-ppc.c: Include elf/ppc64.h.
50 (ppc_abiversion): New variable.
51 (md_pseudo_table): Add .abiversion.
52 (ppc_elf_abiversion, ppc_elf_end): New functions.
53 * config/tc-ppc.h (md_end): Define.
54
f9c6b907
AM		 552013-10-30 Alan Modra <amodra@gmail.com>
56
57 * config/tc-ppc.c (SEX16): Don't mask.
58 (REPORT_OVERFLOW_HI): Define as zero.
59 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
60 @tprel@high, and @tprel@higha modifiers.
61 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
62 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
63 Handle new relocs.
64 (md_apply_fix): Similarly.
65
9d5de888
CF		 662013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
67
68 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
69 (fpr_write_mask): Test MSA registers.
70 (can_swap_branch_p): Check fpr write followed by fpr read.
71
3fc1d038
NC		 722013-10-18 Nick Clifton <nickc@redhat.com>
73
74 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
75
56d438b1
CF		 762013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
77 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
78
79 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
80 (md_longopts): Add mmsa and mno-msa.
81 (mips_ases): Add msa.
82 (RTYPE_MASK): Update.
83 (RTYPE_MSA): New define.
84 (OT_REG_ELEMENT): Replace with...
85 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
86 (mips_operand_token): Replace reg_element with index.
87 (mips_parse_argument_token): Treat vector indices as separate tokens.
88 Handle register indices.
89 (md_begin): Add MSA register names.
90 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
91 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
92 (match_mdmx_imm_reg_operand): Update accordingly.
93 (match_imm_index_operand): New function.
94 (match_reg_index_operand): New function.
95 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
96 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
97 (md_show_usage): Print -mmsa and -mno-msa.
98 * doc/as.texinfo: Document -mmsa and -mno-msa.
99 * doc/c-mips.texi: Document -mmsa and -mno-msa.
100 Document .set msa and .set nomsa.
101
b2e951ec
NC		 1022013-10-14 Nick Clifton <nickc@redhat.com>
103
104 * read.c (add_include_dir): Use xrealloc.
105 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
106 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
107
ae335a4e
SL		 1082013-10-13 Sandra Loosemore <sandra@codesourcery.com>
109
110 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
111 also test/refer to "sstatus". Reformat the warning message.
112
0e1c2434
SK		 1132013-10-10 Sean Keys <skeys@ipdatasys.com>
114
115 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
116
47cd3fa7
JB		 1172013-10-10 Jan Beulich <jbeulich@suse.com>
118
119 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
120 swapping for bndmk, bndldx, and bndstx.
121
6085f853
NC		 1222013-10-09 Nick Clifton <nickc@redhat.com>
123
b7b2bb1d
NC		 124 PR gas/16025
125 * config/tc-epiphany.c (md_convert_frag): Add missing break
126 statement.
127
6085f853
NC		 128 PR gas/16026
129 * config/tc-mn10200.c (md_convert_frag): Add missing break
130 statement.
131
cecf1424
JB		 1322013-10-08 Jan Beulich <jbeulich@suse.com>
133
134 * tc-i386.c (check_word_reg): Remove misplaced "else".
135 (check_long_reg): Restore symmetry with check_word_reg.
136
d3bfe16e
JB		 1372013-10-08 Jan Beulich <jbeulich@suse.com>
138
139 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
140 LR/PC check.
141
38d77545
NC		 1422013-10-08 Nick Clifton <nickc@redhat.com>
143
144 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
145 for "<foo>a". Issue error messages for unrecognised or corrrupt
146 size extensions.
147
fe8b4cc3
KT		 1482013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
149
150 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
151 possible.
152
c7b0bd56
SE		 1532013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
154
155 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
156 * doc/c-i386.texi: Add -march=bdver4 option.
157
cc9afea3
AM		 1582013-09-20 Alan Modra <amodra@gmail.com>
159
160 * configure: Regenerate.
161
58ca03a2
TG		 1622013-09-18 Tristan Gingold <gingold@adacore.com>
163
164 * NEWS: Add marker for 2.24.
165
ab905915
NC		 1662013-09-18 Nick Clifton <nickc@redhat.com>
167
168 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
169 (move_data): New variable.
170 (md_parse_option): Parse -md.
171 (msp430_section): New function. Catch references to the .bss or
172 .data sections and generate a special symbol for use by the libcrt
173 library.
174 (md_pseudo_table): Intercept .section directives.
175 (md_longopt): Add -md
176 (md_show_usage): Likewise.
177 (msp430_operands): Generate a warning message if a NOP is inserted
178 into the instruction stream.
179 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
180
f1c38003
SE		 1812013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
182
183 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 184 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 185
1d50d57c
WN		 1862013-09-16 Will Newton <will.newton@linaro.org>
187
188 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
189 disallowing element size 64 with interleave other than 1.
190
173d3447
CF		 1912013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
192
193 * config/tc-mips.c (match_insn): Set error when $31 is used for
194 bltzal* and bgezal*.
195
ac21e7da
TG		 1962013-09-04 Tristan Gingold <gingold@adacore.com>
197
198 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
199 symbols.
200
74db7efb
NC		 2012013-09-04 Roland McGrath <mcgrathr@google.com>
202
203 PR gas/15914
204 * config/tc-arm.c (T16_32_TAB): Add _udf.
205 (do_t_udf): New function.
206 (insns): Add "udf".
207
664a88c6
DD		 2082013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
209
210 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
211 assembler errors at correct position.
212
9aff4b7a
NC		 2132013-08-23 Yuri Chornoivan <yurchor@ukr.net>
214
215 PR binutils/15834
216 * config/tc-ia64.c: Fix typos.
217 * config/tc-sparc.c: Likewise.
218 * config/tc-z80.c: Likewise.
219 * doc/c-i386.texi: Likewise.
220 * doc/c-m32r.texi: Likewise.
221
4f2374c7
WN		 2222013-08-23 Will Newton <will.newton@linaro.org>
223
9aff4b7a 224 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 225 for pre-indexed addressing modes.
226
b4e6cb80
AM		 2272013-08-21 Alan Modra <amodra@gmail.com>
228
229 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
230 range check label number for use with fb_low_counter array.
231
1661c76c
RS		 2322013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
233
234 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
235 (mips_parse_argument_token, validate_micromips_insn, md_begin)
236 (check_regno, match_float_constant, check_completed_insn, append_insn)
237 (match_insn, match_mips16_insn, match_insns, macro_start)
238 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
239 (mips16_ip, mips_set_option_string, md_parse_option)
240 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
241 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
242 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
243 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
244 Start error messages with a lower-case letter. Do not end error
245 messages with a period. Wrap long messages to 80 character-lines.
246 Use "cannot" instead of "can't" and "can not".
247
b0e6f033
RS		 2482013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
249
250 * config/tc-mips.c (imm_expr): Expand comment.
251 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
252 when populated.
253
e423441d
RS		 2542013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
255
256 * config/tc-mips.c (imm2_expr): Delete.
257 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
258
5e0dc5ba
RS		 2592013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
260
261 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
262 (macro): Remove M_DEXT and M_DINS handling.
263
60f20e8b
RS		 2642013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
265
266 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
267 lax_max with lax_match.
268 (match_int_operand): Update accordingly. Don't report an error
269 for !lax_match-only cases.
270 (match_insn): Replace more_alts with lax_match and use it to
271 initialize the mips_arg_info field. Add a complete_p parameter.
272 Handle implicit VU0 suffixes here.
273 (match_invalid_for_isa, match_insns, match_mips16_insns): New
274 functions.
275 (mips_ip, mips16_ip): Use them.
276
d436c1c2
RS		 2772013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
278
279 * config/tc-mips.c (match_expression): Report uses of registers here.
280 Add a "must be an immediate expression" error. Handle elided offsets
281 here rather than...
282 (match_int_operand): ...here.
283
1a00e612
RS		 2842013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
285
286 * config/tc-mips.c (mips_arg_info): Remove soft_match.
287 (match_out_of_range, match_not_constant): New functions.
288 (match_const_int): Remove fallback parameter and check for soft_match.
289 Use match_not_constant.
290 (match_mapped_int_operand, match_addiusp_operand)
291 (match_perf_reg_operand, match_save_restore_list_operand)
292 (match_mdmx_imm_reg_operand): Update accordingly. Use
293 match_out_of_range and set_insn_error* instead of as_bad.
294 (match_int_operand): Likewise. Use match_not_constant in the
295 !allows_nonconst case.
296 (match_float_constant): Report invalid float constants.
297 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
298 match_float_constant to check for invalid constants. Fail the
299 match if match_const_int or match_float_constant return false.
300 (mips_ip): Update accordingly.
301 (mips16_ip): Likewise. Undo null termination of instruction name
302 once lookup is complete.
303
e3de51ce
RS		 3042013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
305
306 * config/tc-mips.c (mips_insn_error_format): New enum.
307 (mips_insn_error): New struct.
308 (insn_error): Change to a mips_insn_error.
309 (clear_insn_error, set_insn_error_format, set_insn_error)
310 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
311 functions.
312 (mips_parse_argument_token, md_assemble, match_insn)
313 (match_mips16_insn): Use them instead of manipulating insn_error
314 directly.
315 (mips_ip, mips16_ip): Likewise. Simplify control flow.
316
97d87491
RS		 3172013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
318
319 * config/tc-mips.c (normalize_constant_expr): Move further up file.
320 (normalize_address_expr): Likewise.
321 (match_insn, match_mips16_insn): New functions, split out from...
322 (mips_ip, mips16_ip): ...here.
323
0f35dbc4
RS		 3242013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
325
326 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
327 OP_OPTIONAL_REG.
328 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
329 for optional operands.
330
27285eed
AM		 3312013-08-16 Alan Modra <amodra@gmail.com>
332
333 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
334 modifiers generally.
335
cbe02d4f
AM		 3362013-08-16 Alan Modra <amodra@gmail.com>
337
338 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
339
3c02c47f
DE		 3402013-08-14 David Edelsohn <dje.gcc@gmail.com>
341
342 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
343 argument as alignment.
344
4046d87a
NC		 3452013-08-09 Nick Clifton <nickc@redhat.com>
346
347 * config/tc-rl78.c (elf_flags): New variable.
348 (enum options): Add OPTION_G10.
349 (md_longopts): Add mg10.
350 (md_parse_option): Parse -mg10.
351 (rl78_elf_final_processing): New function.
352 * config/tc-rl78.c (tc_final_processing): Define.
353 * doc/c-rl78.texi: Document -mg10 option.
354
ee5734f0
RS		 3552013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
356
357 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
358 suffixes to be elided too.
359 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
360 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
361 to be omitted too.
362
13896403
RS		 3632013-08-05 John Tytgat <john@bass-software.com>
364
365 * po/POTFILES.in: Regenerate.
366
d6787ef9
EB		 3672013-08-05 Eric Botcazou <ebotcazou@adacore.com>
368 Konrad Eisele <konrad@gaisler.com>
369
370 * config/tc-sparc.c (sparc_arch_types): Add leon.
371 (sparc_arch): Move sparc4 around and add leon.
372 (sparc_target_format): Document -Aleon.
373 * doc/c-sparc.texi: Likewise.
374
da8bca91
RS		 3752013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
378
14daeee3
RS		 3792013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
380 Richard Sandiford <rdsandiford@googlemail.com>
381
382 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
383 (RWARN): Bump to 0x8000000.
384 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
385 (RTYPE_R5900_ACC): New register types.
386 (RTYPE_MASK): Include them.
387 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
388 macros.
389 (reg_names): Include them.
390 (mips_parse_register_1): New function, split out from...
391 (mips_parse_register): ...here. Add a channels_ptr parameter.
392 Look for VU0 channel suffixes when nonnull.
393 (reg_lookup): Update the call to mips_parse_register.
394 (mips_parse_vu0_channels): New function.
395 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
396 (mips_operand_token): Add a "channels" field to the union.
397 Extend the comment above "ch" to OT_DOUBLE_CHAR.
398 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
399 (mips_parse_argument_token): Handle channel suffixes here too.
400 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
401 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
402 Handle '#' formats.
403 (md_begin): Register $vfN and $vfI registers.
404 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
405 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
406 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
407 (match_vu0_suffix_operand): New function.
408 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
409 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
410 (mips_lookup_insn): New function.
411 (mips_ip): Use it. Allow "+K" operands to be elided at the end
412 of an instruction. Handle '#' sequences.
413
c0ebe874
RS		 4142013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
415
416 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
417 values and use it instead of sreg, treg, xreg, etc.
418
3ccad066
RS		 4192013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
420
421 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
422 and mips_int_operand_max.
423 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
424 Delete.
425 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
426 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
427 instead of mips16_immed_operand.
428
0acfaea6
RS		 4292013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
430
431 * config/tc-mips.c (mips16_macro): Don't use move_register.
432 (mips16_ip): Allow macros to use 'p'.
433
fc76e730
RS		 4342013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
435
436 * config/tc-mips.c (MAX_OPERANDS): New macro.
437 (mips_operand_array): New structure.
438 (mips_operands, mips16_operands, micromips_operands): New arrays.
439 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
440 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
441 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
442 (micromips_to_32_reg_q_map): Delete.
443 (insn_operands, insn_opno, insn_extract_operand): New functions.
444 (validate_mips_insn): Take a mips_operand_array as argument and
445 use it to build up a list of operands. Extend to handle INSN_MACRO
446 and MIPS16.
447 (validate_mips16_insn): New function.
448 (validate_micromips_insn): Take a mips_operand_array as argument.
449 Handle INSN_MACRO.
450 (md_begin): Initialize mips_operands, mips16_operands and
451 micromips_operands. Call validate_mips_insn and
452 validate_micromips_insn for macro instructions too.
453 Call validate_mips16_insn for MIPS16 instructions.
454 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
455 New functions.
456 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
457 them. Handle INSN_UDI.
458 (get_append_method): Use gpr_read_mask.
459
26545944
RS		 4602013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
461
462 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
463 flags for MIPS16 and non-MIPS16 instructions.
464 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
465 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
466 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
467 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
468 and non-MIPS16 instructions. Fix formatting.
469
85fcb30f
RS		 4702013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
471
472 * config/tc-mips.c (reg_needs_delay): Move later in file.
473 Use gpr_write_mask.
474 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
475
43234a1e
L		 4762013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
477 Alexander Ivchenko <alexander.ivchenko@intel.com>
478 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
479 Sergey Lega <sergey.s.lega@intel.com>
480 Anna Tikhonova <anna.tikhonova@intel.com>
481 Ilya Tocar <ilya.tocar@intel.com>
482 Andrey Turetskiy <andrey.turetskiy@intel.com>
483 Ilya Verbin <ilya.verbin@intel.com>
484 Kirill Yukhin <kirill.yukhin@intel.com>
485 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
486
487 * config/tc-i386-intel.c (O_zmmword_ptr): New.
488 (i386_types): Add zmmword.
489 (i386_intel_simplify_register): Allow regzmm.
490 (i386_intel_simplify): Handle zmmwords.
491 (i386_intel_operand): Handle RC/SAE, vector operations and
492 zmmwords.
493 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
494 (struct RC_Operation): New.
495 (struct Mask_Operation): New.
496 (struct Broadcast_Operation): New.
497 (vex_prefix): Size of bytes increased to 4 to support EVEX
498 encoding.
499 (enum i386_error): Add new error codes: unsupported_broadcast,
500 broadcast_not_on_src_operand, broadcast_needed,
501 unsupported_masking, mask_not_on_destination, no_default_mask,
502 unsupported_rc_sae, rc_sae_operand_not_last_imm,
503 invalid_register_operand, try_vector_disp8.
504 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
505 rounding, broadcast, memshift.
506 (struct RC_name): New.
507 (RC_NamesTable): New.
508 (evexlig): New.
509 (evexwig): New.
510 (extra_symbol_chars): Add '{'.
511 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
512 (i386_operand_type): Add regzmm, regmask and vec_disp8.
513 (match_mem_size): Handle zmmwords.
514 (operand_type_match): Handle zmm-registers.
515 (mode_from_disp_size): Handle vec_disp8.
516 (fits_in_vec_disp8): New.
517 (md_begin): Handle {} properly.
518 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
519 (build_vex_prefix): Handle vrex.
520 (build_evex_prefix): New.
521 (process_immext): Adjust to properly handle EVEX.
522 (md_assemble): Add EVEX encoding support.
523 (swap_2_operands): Correctly handle operands with masking,
524 broadcasting or RC/SAE.
525 (check_VecOperands): Support EVEX features.
526 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
527 (match_template): Support regzmm and handle new error codes.
528 (process_suffix): Handle zmmwords and zmm-registers.
529 (check_byte_reg): Extend to zmm-registers.
530 (process_operands): Extend to zmm-registers.
531 (build_modrm_byte): Handle EVEX.
532 (output_insn): Adjust to properly handle EVEX case.
533 (disp_size): Handle vec_disp8.
534 (output_disp): Support compressed disp8*N evex feature.
535 (output_imm): Handle RC/SAE immediates properly.
536 (check_VecOperations): New.
537 (i386_immediate): Handle EVEX features.
538 (i386_index_check): Handle zmmwords and zmm-registers.
539 (RC_SAE_immediate): New.
540 (i386_att_operand): Handle EVEX features.
541 (parse_real_register): Add a check for ZMM/Mask registers.
542 (OPTION_MEVEXLIG): New.
543 (OPTION_MEVEXWIG): New.
544 (md_longopts): Add mevexlig and mevexwig.
545 (md_parse_option): Handle mevexlig and mevexwig options.
546 (md_show_usage): Add description for mevexlig and mevexwig.
547 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
548 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
549
a0046408
L		 5502013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
551
552 * config/tc-i386.c (cpu_arch): Add .sha.
553 * doc/c-i386.texi: Document sha/.sha.
554
7e8b059b
L		 5552013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
556 Kirill Yukhin <kirill.yukhin@intel.com>
557 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
558
559 * config/tc-i386.c (BND_PREFIX): New.
560 (struct _i386_insn): Add new field bnd_prefix.
561 (add_bnd_prefix): New.
562 (cpu_arch): Add MPX.
563 (i386_operand_type): Add regbnd.
564 (md_assemble): Handle BND prefixes.
565 (parse_insn): Likewise.
566 (output_branch): Likewise.
567 (output_jump): Likewise.
568 (build_modrm_byte): Handle regbnd.
569 (OPTION_MADD_BND_PREFIX): New.
570 (md_longopts): Add entry for 'madd-bnd-prefix'.
571 (md_parse_option): Handle madd-bnd-prefix option.
572 (md_show_usage): Add description for madd-bnd-prefix
573 option.
574 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
575
7fa9fcb6
TG		 5762013-07-24 Tristan Gingold <gingold@adacore.com>
577
578 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
579 xcoff targets.
580
614eb277
AK		 5812013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
582
583 * config/tc-s390.c (s390_machine): Don't force the .machine
584 argument to lower case.
585
e673710a
KT		 5862013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
587
588 * config/tc-arm.c (s_arm_arch_extension): Improve error message
589 for invalid extension.
590
69091a2c
YZ		 5912013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
592
593 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
594 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
595 (aarch64_abi): New variable.
596 (ilp32_p): Change to be a macro.
597 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
598 (struct aarch64_option_abi_value_table): New struct.
599 (aarch64_abis): New table.
600 (aarch64_parse_abi): New function.
601 (aarch64_long_opts): Add entry for -mabi=.
602 * doc/as.texinfo (Target AArch64 options): Document -mabi.
603 * doc/c-aarch64.texi: Likewise.
604
faf786e6
NC		 6052013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
606
607 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
608 unsigned comparison.
609
f0c00282
NC		 6102013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
611
cbe02d4f 612 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 613 RX610.
cbe02d4f 614 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 615 check floating point operation support for target RX100 and
616 RX200.
cbe02d4f
AM		 617 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
618 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
619 RX200, RX600, and RX610
f0c00282 620
8c997c27
NC		 6212013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
622
623 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
624
8be59acb
NC		 6252013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
626
627 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
628 * doc/c-avr.texi: Likewise.
629
4a06e5a2
RS		 6302013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
631
632 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
633 error with older GCCs.
634 (mips16_macro_build): Dereference args.
635
a92713e6
RS		 6362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
637
638 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
639 New functions, split out from...
640 (reg_lookup): ...here. Remove itbl support.
641 (reglist_lookup): Delete.
642 (mips_operand_token_type): New enum.
643 (mips_operand_token): New structure.
644 (mips_operand_tokens): New variable.
645 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
646 (mips_parse_arguments): New functions.
647 (md_begin): Initialize mips_operand_tokens.
648 (mips_arg_info): Add a token field. Remove optional_reg field.
649 (match_char, match_expression): New functions.
650 (match_const_int): Use match_expression. Remove "s" argument
651 and return a boolean result. Remove O_register handling.
652 (match_regno, match_reg, match_reg_range): New functions.
653 (match_int_operand, match_mapped_int_operand, match_msb_operand)
654 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
655 (match_addiusp_operand, match_clo_clz_dest_operand)
656 (match_lwm_swm_list_operand, match_entry_exit_operand)
657 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
658 (match_tied_reg_operand): Remove "s" argument and return a boolean
659 result. Match tokens rather than text. Update calls to
660 match_const_int. Rely on match_regno to call check_regno.
661 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
662 "arg" argument. Return a boolean result.
663 (parse_float_constant): Replace with...
664 (match_float_constant): ...this new function.
665 (match_operand): Remove "s" argument and return a boolean result.
666 Update calls to subfunctions.
667 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
668 rather than string-parsing routines. Update handling of optional
669 registers for token scheme.
670
89565f1b
RS		 6712013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
672
673 * config/tc-mips.c (parse_float_constant): Split out from...
674 (mips_ip): ...here.
675
3c14a432
RS		 6762013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
677
678 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
679 Delete.
680
364215c8
RS		 6812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
682
683 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
684 (match_entry_exit_operand): New function.
685 (match_save_restore_list_operand): Likewise.
686 (match_operand): Use them.
687 (check_absolute_expr): Delete.
688 (mips16_ip): Rewrite main parsing loop to use mips_operands.
689
9e12b7a2
RS		 6902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
691
692 * config/tc-mips.c: Enable functions commented out in previous patch.
693 (SKIP_SPACE_TABS): Move further up file.
694 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
695 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
696 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
697 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
698 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
699 (micromips_imm_b_map, micromips_imm_c_map): Delete.
700 (mips_lookup_reg_pair): Delete.
701 (macro): Use report_bad_range and report_bad_field.
702 (mips_immed, expr_const_in_range): Delete.
703 (mips_ip): Rewrite main parsing loop to use new functions.
704
a1d78564
RS		 7052013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
706
707 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
708 Change return type to bfd_boolean.
709 (report_bad_range, report_bad_field): New functions.
710 (mips_arg_info): New structure.
711 (match_const_int, convert_reg_type, check_regno, match_int_operand)
712 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
713 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
714 (match_addiusp_operand, match_clo_clz_dest_operand)
715 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
716 (match_pc_operand, match_tied_reg_operand, match_operand)
717 (check_completed_insn): New functions, commented out for now.
718
e077a1c8
RS		 7192013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
720
721 * config/tc-mips.c (insn_insert_operand): New function.
722 (macro_build, mips16_macro_build): Put null character check
723 in the for loop and convert continues to breaks. Use operand
724 structures to handle constant operands.
725
ab902481
RS		 7262013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
727
728 * config/tc-mips.c (validate_mips_insn): Move further up file.
729 Add insn_bits and decode_operand arguments. Use the mips_operand
730 fields to work out which bits an operand occupies. Detect double
731 definitions.
732 (validate_micromips_insn): Move further up file. Call into
733 validate_mips_insn.
734
2f8b73cc
RS		 7352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
736
737 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
738
c8276761
RS		 7392013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
740
741 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
742 and "~".
743 (macro): Update accordingly.
744
77bd4346
RS		 7452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
746
747 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
748 (imm_reloc): Delete.
749 (md_assemble): Remove imm_reloc handling.
750 (mips_ip): Update commentary. Use offset_expr and offset_reloc
751 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
752 Use a temporary array rather than imm_reloc when parsing
753 constant expressions. Remove imm_reloc initialization.
754 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
755 for the relaxable field. Use a relax_char variable to track the
756 type of this field. Remove imm_reloc initialization.
757
cc537e56
RS		 7582013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
759
760 * config/tc-mips.c (mips16_ip): Handle "I".
761
ba92f887
MR		 7622013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
763
764 * config/tc-mips.c (mips_flag_nan2008): New variable.
765 (options): Add OPTION_NAN enum value.
766 (md_longopts): Handle it.
767 (md_parse_option): Likewise.
768 (s_nan): New function.
769 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
770 (md_show_usage): Add -mnan.
771
772 * doc/as.texinfo (Overview): Add -mnan.
773 * doc/c-mips.texi (MIPS Opts): Document -mnan.
774 (MIPS NaN Encodings): New node. Document .nan directive.
775 (MIPS-Dependent): List the new node.
776
c1094734
TG		 7772013-07-09 Tristan Gingold <gingold@adacore.com>
778
779 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
780
0cbbe1b8
RS		 7812013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
782
783 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
784 for 'A' and assume that the constant has been elided if the result
785 is an O_register.
786
f2ae14a1
RS		 7872013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
788
789 * config/tc-mips.c (gprel16_reloc_p): New function.
790 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
791 BFD_RELOC_UNUSED.
792 (offset_high_part, small_offset_p): New functions.
793 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
794 register load and store macros, handle the 16-bit offset case first.
795 If a 16-bit offset is not suitable for the instruction we're
796 generating, load it into the temporary register using
797 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
798 M_L_DAB code once the address has been constructed. For double load
799 and store macros, again handle the 16-bit offset case first.
800 If the second register cannot be accessed from the same high
801 part as the first, load it into AT using ADDRESS_ADDI_INSN.
802 Fix the handling of LD in cases where the first register is the
803 same as the base. Also handle the case where the offset is
804 not 16 bits and the second register cannot be accessed from the
805 same high part as the first. For unaligned loads and stores,
806 fuse the offbits == 12 and old "ab" handling. Apply this handling
807 whenever the second offset needs a different high part from the first.
808 Construct the offset using ADDRESS_ADDI_INSN where possible,
809 for offbits == 16 as well as offbits == 12. Use offset_reloc
810 when constructing the individual loads and stores.
811 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
812 and offset_reloc before matching against a particular opcode.
813 Handle elided 'A' constants. Allow 'A' constants to use
814 relocation operators.
815
5c324c16
RS		 8162013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
817
818 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
819 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
820 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
821
23e69e47
RS		 8222013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
823
824 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
825 Require the msb to be <= 31 for "+s". Check that the size is <= 31
826 for both "+s" and "+S".
827
27c5c572
RS		 8282013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
829
830 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
831 (mips_ip, mips16_ip): Handle "+i".
832
e76ff5ab
RS		 8332013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
834
835 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
836 (micromips_to_32_reg_h_map): Rename to...
837 (micromips_to_32_reg_h_map1): ...this.
838 (micromips_to_32_reg_i_map): Rename to...
839 (micromips_to_32_reg_h_map2): ...this.
840 (mips_lookup_reg_pair): New function.
841 (gpr_write_mask, macro): Adjust after above renaming.
842 (validate_micromips_insn): Remove "mi" handling.
843 (mips_ip): Likewise. Parse both registers in a pair for "mh".
844
fa7616a4
RS		 8452013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
846
847 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
848 (mips_ip): Remove "+D" and "+T" handling.
849
fb798c50
AK		 8502013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
851
852 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
853 relocs.
854
2c0a3565
MS		 8552013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
856
4aa2c5e2
MS		 857 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
858
8592013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
860
2c0a3565
MS		 861 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
862 (aarch64_force_relocation): Likewise.
863
f40da81b
AM		 8642013-07-02 Alan Modra <amodra@gmail.com>
865
866 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
867
81566a9b
MR		 8682013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
869
870 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
871 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
872 Replace @sc{mips16} with literal `MIPS16'.
873 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
874
a6bb11b2
YZ		 8752013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
876
877 * config/tc-aarch64.c (reloc_table): Replace
878 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
879 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
880 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
881 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
882 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
883 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
884 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
885 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
886 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
887 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
888 (aarch64_force_relocation): Likewise.
889
cec5225b
YZ		 8902013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
891
892 * config/tc-aarch64.c (ilp32_p): New static variable.
893 (elf64_aarch64_target_format): Return the target according to the
894 value of 'ilp32_p'.
895 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
896 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
897 (aarch64_dwarf2_addr_size): New function.
898 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
899 (DWARF2_ADDR_SIZE): New define.
900
e335d9cb
RS		 9012013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
902
903 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
904
18870af7
RS		 9052013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
906
907 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
908
833794fc
MR		 9092013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
910
911 * config/tc-mips.c (mips_set_options): Add insn32 member.
912 (mips_opts): Initialize it.
913 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
914 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
915 (md_longopts): Add "minsn32" and "mno-insn32" options.
916 (is_size_valid): Handle insn32 mode.
917 (md_assemble): Pass instruction string down to macro.
918 (brk_fmt): Add second dimension and insn32 mode initializers.
919 (mfhl_fmt): Likewise.
920 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
921 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
922 (macro_build_jalr, move_register): Handle insn32 mode.
923 (macro_build_branch_rs): Likewise.
924 (macro): Handle insn32 mode.
925 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
926 (mips_ip): Handle insn32 mode.
927 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
928 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
929 (mips_handle_align): Handle insn32 mode.
930 (md_show_usage): Add -minsn32 and -mno-insn32.
931
932 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
933 -mno-insn32 options.
934 (-minsn32, -mno-insn32): New options.
935 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
936 options.
937 (MIPS assembly options): New node. Document .set insn32 and
938 .set noinsn32.
939 (MIPS-Dependent): List the new node.
940
d1706f38
NC		 9412013-06-25 Nick Clifton <nickc@redhat.com>
942
943 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
944 the PC in indirect addressing on 430xv2 parts.
945 (msp430_operands): Add version test to hardware bug encoding
946 restrictions.
947
477330fc
RM		 9482013-06-24 Roland McGrath <mcgrathr@google.com>
949
d996d970
RM		 950 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
951 so it skips whitespace before it.
952 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
953
477330fc
RM		 954 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
955 (arm_reg_parse_multi): Skip whitespace first.
956 (parse_reg_list): Likewise.
957 (parse_vfp_reg_list): Likewise.
958 (s_arm_unwind_save_mmxwcg): Likewise.
959
24382199
NC		 9602013-06-24 Nick Clifton <nickc@redhat.com>
961
962 PR gas/15623
963 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
964
c3678916
RS		 9652013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
966
967 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
968
42429eac
RS		 9692013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
970
971 * config/tc-mips.c: Assert that offsetT and valueT are at least
972 8 bytes in size.
973 (GPR_SMIN, GPR_SMAX): New macros.
974 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
975
f3ded42a
RS		 9762013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
977
978 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
979 conditions. Remove any code deselected by them.
980 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
981
e8044f35
RS		 9822013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
983
984 * NEWS: Note removal of ECOFF support.
985 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
986 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
987 (MULTI_CFILES): Remove config/e-mipsecoff.c.
988 * Makefile.in: Regenerate.
989 * configure.in: Remove MIPS ECOFF references.
990 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
991 Delete cases.
992 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
993 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
994 (mips-*-*): ...this single case.
995 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
996 MIPS emulations to be e-mipself*.
997 * configure: Regenerate.
998 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
999 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1000 (mips-*-sysv*): Remove coff and ecoff cases.
1001 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1002 * ecoff.c: Remove reference to MIPS ECOFF.
1003 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1004 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1005 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1006 (mips_hi_fixup): Tweak comment.
1007 (append_insn): Require a howto.
1008 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1009
98508b2a
RS		 10102013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1011
1012 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1013 Use "CPU" instead of "cpu".
1014 * doc/c-mips.texi: Likewise.
1015 (MIPS Opts): Rename to MIPS Options.
1016 (MIPS option stack): Rename to MIPS Option Stack.
1017 (MIPS ASE instruction generation overrides): Rename to
1018 MIPS ASE Instruction Generation Overrides (for now).
1019 (MIPS floating-point): Rename to MIPS Floating-Point.
1020
fc16f8cc
RS		 10212013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1022
1023 * doc/c-mips.texi (MIPS Macros): New section.
1024 (MIPS Object): Replace with...
1025 (MIPS Small Data): ...this new section.
1026
5a7560b5
RS		 10272013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1028
1029 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1030 Capitalize name. Use @kindex instead of @cindex for .set entries.
1031
a1b86ab7
RS		 10322013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1033
1034 * doc/c-mips.texi (MIPS Stabs): Remove section.
1035
c6278170
RS		 10362013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1037
1038 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1039 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1040 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1041 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1042 (mips_ase): New structure.
1043 (mips_ases): New table.
1044 (FP64_ASES): New macro.
1045 (mips_ase_groups): New array.
1046 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1047 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1048 functions.
1049 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1050 (md_parse_option): Use mips_ases and mips_set_ase instead of
1051 separate case statements for each ASE option.
1052 (mips_after_parse_args): Use FP64_ASES. Use
1053 mips_check_isa_supports_ases to check the ASEs against
1054 other options.
1055 (s_mipsset): Use mips_ases and mips_set_ase instead of
1056 separate if statements for each ASE option. Use
1057 mips_check_isa_supports_ases, even when a non-ASE option
1058 is specified.
1059
63a4bc21
KT		 10602013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1061
1062 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1063
c31f3936
RS		 10642013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1065
1066 * config/tc-mips.c (md_shortopts, options, md_longopts)
1067 (md_longopts_size): Move earlier in file.
1068
846ef2d0
RS		 10692013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1070
1071 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1072 with a single "ase" bitmask.
1073 (mips_opts): Update accordingly.
1074 (file_ase, file_ase_explicit): New variables.
1075 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1076 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1077 (ISA_HAS_ROR): Adjust for mips_set_options change.
1078 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1079 (mips_ip): Adjust for mips_set_options change.
1080 (md_parse_option): Likewise. Update file_ase_explicit.
1081 (mips_after_parse_args): Adjust for mips_set_options change.
1082 Use bitmask operations to select the default ASEs. Set file_ase
1083 rather than individual per-ASE variables.
1084 (s_mipsset): Adjust for mips_set_options change.
1085 (mips_elf_final_processing): Test file_ase rather than
1086 file_ase_mdmx. Remove commented-out code.
1087
d16afab6
RS		 10882013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1089
1090 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1091 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1092 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1093 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1094 (mips_after_parse_args): Use the new "ase" field to choose
1095 the default ASEs.
1096 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1097 "ase" field.
1098
e83a675f
RE		 10992013-06-18 Richard Earnshaw <rearnsha@arm.com>
1100
1101 * config/tc-arm.c (symbol_preemptible): New function.
1102 (relax_branch): Use it.
1103
7f3c4072
CM		 11042013-06-17 Catherine Moore <clm@codesourcery.com>
1105 Maciej W. Rozycki <macro@codesourcery.com>
1106 Chao-Ying Fu <fu@mips.com>
1107
1108 * config/tc-mips.c (mips_set_options): Add ase_eva.
1109 (mips_set_options mips_opts): Add ase_eva.
1110 (file_ase_eva): Declare.
1111 (ISA_SUPPORTS_EVA_ASE): Define.
1112 (IS_SEXT_9BIT_NUM): Define.
1113 (MIPS_CPU_ASE_EVA): Define.
1114 (is_opcode_valid): Add support for ase_eva.
1115 (macro_build): Likewise.
1116 (macro): Likewise.
1117 (validate_mips_insn): Likewise.
1118 (validate_micromips_insn): Likewise.
1119 (mips_ip): Likewise.
1120 (options): Add OPTION_EVA and OPTION_NO_EVA.
1121 (md_longopts): Add -meva and -mno-eva.
1122 (md_parse_option): Process new options.
1123 (mips_after_parse_args): Check for valid EVA combinations.
1124 (s_mipsset): Likewise.
1125
e410add4
RS		 11262013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1127
1128 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1129 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1130 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1131 (dwarf2_gen_line_info_1): Update call accordingly.
1132 (dwarf2_move_insn): New function.
1133 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1134
6a50d470
RS		 11352013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1136
1137 Revert:
1138
1139 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1140
1141 PR gas/13024
1142 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1143 (dwarf2_gen_line_info_1): Delete.
1144 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1145 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1146 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1147 (dwarf2_directive_loc): Push previous .locs instead of generating
1148 them immediately.
1149
f122319e
CF		 11502013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1151
1152 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1153 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1154
909c7f9c
NC		 11552013-06-13 Nick Clifton <nickc@redhat.com>
1156
1157 PR gas/15602
1158 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1159 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1160 function. Generates an error if the adjusted offset is out of a
1161 16-bit range.
1162
5d5755a7
SL		 11632013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1164
1165 * config/tc-nios2.c (md_apply_fix): Mask constant
1166 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1167
3bf0dbfb
MR		 11682013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1169
1170 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1171 MIPS-3D instructions either.
1172 (md_convert_frag): Update the COPx branch mask accordingly.
1173
1174 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1175 option.
1176 * doc/as.texinfo (Overview): Add --relax-branch and
1177 --no-relax-branch.
1178 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1179 --no-relax-branch.
1180
9daf7bab
SL		 11812013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1182
1183 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1184 omitted.
1185
d301a56b
RS		 11862013-06-08 Catherine Moore <clm@codesourcery.com>
1187
1188 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1189 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1190 (append_insn): Change INSN_xxxx to ASE_xxxx.
1191
7bab7634
DC		 11922013-06-01 George Thomas <george.thomas@atmel.com>
1193
cbe02d4f 1194 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1195 AVR_ISA_XMEGAU
1196
f60cf82f
L		 11972013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1198
1199 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1200 for ELF.
1201
a3f278e2
CM		 12022013-05-31 Paul Brook <paul@codesourcery.com>
1203
a3f278e2
CM		 1204 * config/tc-mips.c (s_ehword): New.
1205
067ec077
CM		 12062013-05-30 Paul Brook <paul@codesourcery.com>
1207
1208 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1209
d6101ac2
MR		 12102013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1211
1212 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1213 convert relocs who have no relocatable field either. Rephrase
1214 the conditional so that the PC-relative check is only applied
1215 for REL targets.
1216
f19ccbda
MR		 12172013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1218
1219 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1220 calculation.
1221
418009c2
YZ		 12222013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1223
1224 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1225 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1226 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1227 (md_apply_fix): Likewise.
1228 (aarch64_force_relocation): Likewise.
1229
0a8897c7
KT		 12302013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1231
1232 * config/tc-arm.c (it_fsm_post_encode): Improve
1233 warning messages about deprecated IT block formats.
1234
89d2a2a3
MS		 12352013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1236
1237 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1238 inside fx_done condition.
1239
c77c0862
RS		 12402013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1241
1242 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1243
c0637f3a
PB		 12442013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1245
1246 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1247 and clean up warning when using PRINT_OPCODE_TABLE.
1248
5656a981
AM		 12492013-05-20 Alan Modra <amodra@gmail.com>
1250
1251 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1252 and data fixups performing shift/high adjust/sign extension on
1253 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1254 when writing data fixups rather than recalculating size.
1255
997b26e8
JBG		 12562013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1257
1258 * doc/c-msp430.texi: Fix typo.
1259
9f6e76f4
TG		 12602013-05-16 Tristan Gingold <gingold@adacore.com>
1261
1262 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1263 are also TOC symbols.
1264
638d3803
NC		 12652013-05-16 Nick Clifton <nickc@redhat.com>
1266
1267 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1268 Add -mcpu command to specify core type.
997b26e8 1269 * doc/c-msp430.texi: Update documentation.
638d3803 1270
b015e599
AP		 12712013-05-09 Andrew Pinski <apinski@cavium.com>
1272
1273 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1274 (mips_opts): Update for the new field.
1275 (file_ase_virt): New variable.
1276 (ISA_SUPPORTS_VIRT_ASE): New macro.
1277 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1278 (MIPS_CPU_ASE_VIRT): New define.
1279 (is_opcode_valid): Handle ase_virt.
1280 (macro_build): Handle "+J".
1281 (validate_mips_insn): Likewise.
1282 (mips_ip): Likewise.
1283 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1284 (md_longopts): Add mvirt and mnovirt
1285 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1286 (mips_after_parse_args): Handle ase_virt field.
1287 (s_mipsset): Handle "virt" and "novirt".
1288 (mips_elf_final_processing): Add a comment about virt ASE might need
1289 a new flag.
1290 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1291 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1292 Document ".set virt" and ".set novirt".
1293
da8094d7
AM		 12942013-05-09 Alan Modra <amodra@gmail.com>
1295
1296 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1297 control of operand flag bits.
1298
c5f8c205
AM		 12992013-05-07 Alan Modra <amodra@gmail.com>
1300
1301 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1302 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1303 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1304 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1305 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1306 Shift and sign-extend fieldval for use by some VLE reloc
1307 operand->insert functions.
1308
b47468a6
CM		 13092013-05-06 Paul Brook <paul@codesourcery.com>
1310 Catherine Moore <clm@codesourcery.com>
1311
c5f8c205
AM		 1312 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1313 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1314 (md_apply_fix): Likewise.
1315 (tc_gen_reloc): Likewise.
1316
2de39019
CM		 13172013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1318
1319 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1320 (mips_fix_adjustable): Adjust pc-relative check to use
1321 limited_pc_reloc_p.
1322
754e2bb9
RS		 13232013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1324
1325 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1326 (s_mips_stab): Do not restrict to stabn only.
1327
13761a11
NC		 13282013-05-02 Nick Clifton <nickc@redhat.com>
1329
1330 * config/tc-msp430.c: Add support for the MSP430X architecture.
1331 Add code to insert a NOP instruction after any instruction that
1332 might change the interrupt state.
1333 Add support for the LARGE memory model.
1334 Add code to initialise the .MSP430.attributes section.
1335 * config/tc-msp430.h: Add support for the MSP430X architecture.
1336 * doc/c-msp430.texi: Document the new -mL and -mN command line
1337 options.
1338 * NEWS: Mention support for the MSP430X architecture.
1339
df26367c
MR		 13402013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1341
1342 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1343 alpha*-*-linux*ecoff*.
1344
f02d8318
CF		 13452013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1346
1347 * config/tc-mips.c (mips_ip): Add sizelo.
1348 For "+C", "+G", and "+H", set sizelo and compare against it.
1349
b40bf0a2
NC		 13502013-04-29 Nick Clifton <nickc@redhat.com>
1351
1352 * as.c (Options): Add -gdwarf-sections.
1353 (parse_args): Likewise.
1354 * as.h (flag_dwarf_sections): Declare.
1355 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1356 (process_entries): When -gdwarf-sections is enabled generate
1357 fragmentary .debug_line sections.
1358 (out_debug_line): Set the section for the .debug_line section end
1359 symbol.
1360 * doc/as.texinfo: Document -gdwarf-sections.
1361 * NEWS: Mention -gdwarf-sections.
1362
8eeccb77 13632013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1364
1365 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1366 according to the target parameter. Don't call s_segm since s_segm
1367 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1368 initialized yet.
1369 (md_begin): Call s_segm according to target parameter from command
1370 line.
1371
49926cd0
AM		 13722013-04-25 Alan Modra <amodra@gmail.com>
1373
1374 * configure.in: Allow little-endian linux.
1375 * configure: Regenerate.
1376
e3031850
SL		 13772013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1378
1379 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1380 "fstatus" control register to "eccinj".
1381
cb948fc0
KT		 13822013-04-19 Kai Tietz <ktietz@redhat.com>
1383
1384 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1385
4455e9ad
JB		 13862013-04-15 Julian Brown <julian@codesourcery.com>
1387
1388 * expr.c (add_to_result, subtract_from_result): Make global.
1389 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1390 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1391 subtract_from_result to handle extra bit of precision for .sleb128
1392 directive operands.
1393
956a6ba3
JB		 13942013-04-10 Julian Brown <julian@codesourcery.com>
1395
1396 * read.c (convert_to_bignum): Add sign parameter. Use it
1397 instead of X_unsigned to determine sign of resulting bignum.
1398 (emit_expr): Pass extra argument to convert_to_bignum.
1399 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1400 X_extrabit to convert_to_bignum.
1401 (parse_bitfield_cons): Set X_extrabit.
1402 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1403 Initialise X_extrabit field as appropriate.
1404 (add_to_result): New.
1405 (subtract_from_result): New.
1406 (expr): Use above.
1407 * expr.h (expressionS): Add X_extrabit field.
1408
eb9f3f00
JB		 14092013-04-10 Jan Beulich <jbeulich@suse.com>
1410
1411 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1412 register being PC when is_t or writeback, and use distinct
1413 diagnostic for the latter case.
1414
ccb84d65
JB		 14152013-04-10 Jan Beulich <jbeulich@suse.com>
1416
1417 * gas/config/tc-arm.c (parse_operands): Re-write
1418 po_barrier_or_imm().
1419 (do_barrier): Remove bogus constraint().
1420 (do_t_barrier): Remove.
1421
4d13caa0
NC		 14222013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1423
1424 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1425 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1426 ATmega2564RFR2
1427 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1428
16d02dc9
JB		 14292013-04-09 Jan Beulich <jbeulich@suse.com>
1430
1431 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1432 Use local variable Rt in more places.
1433 (do_vmsr): Accept all control registers.
1434
05ac0ffb
JB		 14352013-04-09 Jan Beulich <jbeulich@suse.com>
1436
1437 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1438 if there was none specified for moves between scalar and core
1439 register.
1440
2d51fb74
JB		 14412013-04-09 Jan Beulich <jbeulich@suse.com>
1442
1443 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1444 NEON_ALL_LANES case.
1445
94dcf8bf
JB		 14462013-04-08 Jan Beulich <jbeulich@suse.com>
1447
1448 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1449 PC-relative VSTR.
1450
1472d06f
JB		 14512013-04-08 Jan Beulich <jbeulich@suse.com>
1452
1453 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1454 entry to sp_fiq.
1455
0c76cae8
AM		 14562013-04-03 Alan Modra <amodra@gmail.com>
1457
1458 * doc/as.texinfo: Add support to generate man options for h8300.
1459 * doc/c-h8300.texi: Likewise.
1460
92eb40d9
RR		 14612013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1462
1463 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1464 Cortex-A57.
1465
51dcdd4d
NC		 14662013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1467
1468 PR binutils/15068
1469 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1470
c5d685bf
NC		 14712013-03-26 Nick Clifton <nickc@redhat.com>
1472
9b978282
NC		 1473 PR gas/15295
1474 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1475 start of the file each time.
1476
c5d685bf
NC		 1477 PR gas/15178
1478 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1479 FreeBSD targets.
1480
9699c833
TG		 14812013-03-26 Douglas B Rupp <rupp@gnat.com>
1482
1483 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1484 after fixup.
1485
4755303e
WN		 14862013-03-21 Will Newton <will.newton@linaro.org>
1487
1488 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1489 pc-relative str instructions in Thumb mode.
1490
81f5558e
NC		 14912013-03-21 Michael Schewe <michael.schewe@gmx.net>
1492
1493 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1494 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1495 R_H8_DISP32A16.
1496 * config/tc-h8300.h: Remove duplicated defines.
1497
71863e73
NC		 14982013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1499
1500 PR gas/15282
1501 * tc-avr.c (mcu_has_3_byte_pc): New function.
1502 (tc_cfi_frame_initial_instructions): Call it to find return
1503 address size.
1504
795b8e6b
NC		 15052013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1506
1507 PR gas/15095
1508 * config/tc-tic6x.c (tic6x_try_encode): Handle
1509 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1510 encode register pair numbers when required.
1511
ba86b375
WN		 15122013-03-15 Will Newton <will.newton@linaro.org>
1513
1514 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1515 in vstr in Thumb mode for pre-ARMv7 cores.
1516
9e6f3811
AS		 15172013-03-14 Andreas Schwab <schwab@suse.de>
1518
1519 * doc/c-arc.texi (ARC Directives): Revert last change and use
1520 @itemize instead of @table.
1521 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1522
b10bf8c5
NC		 15232013-03-14 Nick Clifton <nickc@redhat.com>
1524
1525 PR gas/15273
1526 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1527 NULL message, instead just check ARM_CPU_IS_ANY directly.
1528
ba724cfc
NC		 15292013-03-14 Nick Clifton <nickc@redhat.com>
1530
1531 PR gas/15212
9e6f3811 1532 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1533 for table format.
1534 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1535 to the @item directives.
1536 (ARM-Neon-Alignment): Move to correct place in the document.
1537 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1538 formatting.
1539 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1540 @smallexample.
1541
531a94fd
SL		 15422013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1543
1544 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1545 case. Add default BAD_CASE to switch.
1546
dad60f8e
SL		 15472013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1548
1549 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1550 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1551
dd5181d5
KT		 15522013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1553
1554 * config/tc-arm.c (crc_ext_armv8): New feature set.
1555 (UNPRED_REG): New macro.
1556 (do_crc32_1): New function.
1557 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1558 do_crc32ch, do_crc32cw): Likewise.
1559 (TUEc): New macro.
1560 (insns): Add entries for crc32 mnemonics.
1561 (arm_extensions): Add entry for crc.
1562
8e723a10
CLT		 15632013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1564
1565 * write.h (struct fix): Add fx_dot_frag field.
1566 (dot_frag): Declare.
1567 * write.c (dot_frag): New variable.
1568 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1569 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1570 * expr.c (expr): Save value of frag_now in dot_frag when setting
1571 dot_value.
1572 * read.c (emit_expr): Likewise. Delete comments.
1573
be05d201
L		 15742013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1575
1576 * config/tc-i386.c (flag_code_names): Removed.
1577 (i386_index_check): Rewrote.
1578
62b0d0d5
YZ		 15792013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1580
1581 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1582 add comment.
1583 (aarch64_double_precision_fmovable): New function.
1584 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1585 function; handle hexadecimal representation of IEEE754 encoding.
1586 (parse_operands): Update the call to parse_aarch64_imm_float.
1587
165de32a
L		 15882013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1589
1590 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1591 (check_hle): Updated.
1592 (md_assemble): Likewise.
1593 (parse_insn): Likewise.
1594
d5de92cf
L		 15952013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1596
1597 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1598 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1599 (parse_insn): Remove expecting_string_instruction. Set
1600 i.rep_prefix.
1601
e60bb1dd
YZ		 16022013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1603
1604 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1605
aeebdd9b
YZ		 16062013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1607
1608 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1609 for system registers.
1610
4107ae22
DD		 16112013-02-27 DJ Delorie <dj@redhat.com>
1612
1613 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1614 (rl78_op): Handle %code().
1615 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1616 (tc_gen_reloc): Likwise; convert to a computed reloc.
1617 (md_apply_fix): Likewise.
1618
151fa98f
NC		 16192013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1620
1621 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1622
70a8bc5b 16232013-02-25 Terry Guo <terry.guo@arm.com>
1624
1625 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1626 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1627 list of accepted CPUs.
1628
5c111e37
L		 16292013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1630
1631 PR gas/15159
1632 * config/tc-i386.c (cpu_arch): Add ".smap".
1633
1634 * doc/c-i386.texi: Document smap.
1635
8a75745d
MR		 16362013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1637
1638 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1639 mips_assembling_insn appropriately.
1640 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1641
79850f26
MR		 16422013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1643
cf29fc61 1644 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1645 extraneous braces.
1646
4c261dff
NC		 16472013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1648
5c111e37 1649 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1650
ea33f281
NC		 16512013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1652
1653 * configure.tgt: Add nios2-*-rtems*.
1654
a1ccaec9
YZ		 16552013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1656
1657 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1658 NULL.
1659
0aa27725
RS		 16602013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1661
1662 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1663 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1664
da4339ed
NC		 16652013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1666
1667 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1668 core.
1669
36591ba1 16702013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1671 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1672
1673 Based on patches from Altera Corporation.
1674
1675 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1676 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1677 * Makefile.in: Regenerated.
1678 * configure.tgt: Add case for nios2*-linux*.
1679 * config/obj-elf.c: Conditionally include elf/nios2.h.
1680 * config/tc-nios2.c: New file.
1681 * config/tc-nios2.h: New file.
1682 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1683 * doc/Makefile.in: Regenerated.
1684 * doc/all.texi: Set NIOSII.
1685 * doc/as.texinfo (Overview): Add Nios II options.
1686 (Machine Dependencies): Include c-nios2.texi.
1687 * doc/c-nios2.texi: New file.
1688 * NEWS: Note Altera Nios II support.
1689
94d4433a
AM		 16902013-02-06 Alan Modra <amodra@gmail.com>
1691
1692 PR gas/14255
1693 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1694 Don't skip fixups with fx_subsy non-NULL.
1695 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1696 with fx_subsy non-NULL.
1697
ace9af6f
L		 16982013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1699
1700 * doc/c-metag.texi: Add "@c man" markers.
1701
89d67ed9
AM		 17022013-02-04 Alan Modra <amodra@gmail.com>
1703
1704 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1705 related code.
1706 (TC_ADJUST_RELOC_COUNT): Delete.
1707 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1708
89072bd6
AM		 17092013-02-04 Alan Modra <amodra@gmail.com>
1710
1711 * po/POTFILES.in: Regenerate.
1712
f9b2d544
NC		 17132013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1714
1715 * config/tc-metag.c: Make SWAP instruction less permissive with
1716 its operands.
1717
392ca752
DD		 17182013-01-29 DJ Delorie <dj@redhat.com>
1719
1720 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1721 relocs in .word/.etc statements.
1722
427d0db6
RM		 17232013-01-29 Roland McGrath <mcgrathr@google.com>
1724
1725 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1726 immediate value for 8-bit offset" error so it shows line info.
1727
4faf939a
JM		 17282013-01-24 Joseph Myers <joseph@codesourcery.com>
1729
1730 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1731 for 64-bit output.
1732
78c8d46c
NC		 17332013-01-24 Nick Clifton <nickc@redhat.com>
1734
1735 * config/tc-v850.c: Add support for e3v5 architecture.
1736 * doc/c-v850.texi: Mention new support.
1737
fb5b7503
NC		 17382013-01-23 Nick Clifton <nickc@redhat.com>
1739
1740 PR gas/15039
1741 * config/tc-avr.c: Include dwarf2dbg.h.
1742
8ce3d284
L		 17432013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1744
1745 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1746 (tc_i386_fix_adjustable): Likewise.
1747 (lex_got): Likewise.
1748 (tc_gen_reloc): Likewise.
1749
f5555712
YZ		 17502013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1751
1752 * config/tc-aarch64.c (output_operand_error_record): Change to output
1753 the out-of-range error message as value-expected message if there is
1754 only one single value in the expected range.
1755 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1756 LSL #0 as a programmer-friendly feature.
1757
8fd4256d
L		 17582013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1759
1760 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1761 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1762 BFD_RELOC_64_SIZE relocations.
1763 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1764 for it.
1765 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1766 relocations against local symbols.
1767
a5840dce
AM		 17682013-01-16 Alan Modra <amodra@gmail.com>
1769
1770 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1771 finding some sort of toc syntax error, and break to avoid
1772 compiler uninit warning.
1773
af89796a
L		 17742013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1775
1776 PR gas/15019
1777 * config/tc-i386.c (lex_got): Increment length by 1 if the
1778 relocation token is removed.
1779
dd42f060
NC		 17802013-01-15 Nick Clifton <nickc@redhat.com>
1781
1782 * config/tc-v850.c (md_assemble): Allow signed values for
1783 V850E_IMMEDIATE.
1784
464e3686
SK		 17852013-01-11 Sean Keys <skeys@ipdatasys.com>
1786
1787 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1788 git to cvs.
464e3686 1789
5817ffd1
PB		 17902013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1791
1792 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1793 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1794 * config/tc-ppc.c (md_show_usage): Likewise.
1795 (ppc_handle_align): Handle power8's group ending nop.
1796
f4b1f6a9
SK		 17972013-01-10 Sean Keys <skeys@ipdatasys.com>
1798
1799 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1800 that the assember exits after the opcodes have been printed.
f4b1f6a9 1801
34bca508
L		 18022013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1803
1804 * app.c: Remove trailing white spaces.
1805 * as.c: Likewise.
1806 * as.h: Likewise.
1807 * cond.c: Likewise.
1808 * dw2gencfi.c: Likewise.
1809 * dwarf2dbg.h: Likewise.
1810 * ecoff.c: Likewise.
1811 * input-file.c: Likewise.
1812 * itbl-lex.h: Likewise.
1813 * output-file.c: Likewise.
1814 * read.c: Likewise.
1815 * sb.c: Likewise.
1816 * subsegs.c: Likewise.
1817 * symbols.c: Likewise.
1818 * write.c: Likewise.
1819 * config/tc-i386.c: Likewise.
1820 * doc/Makefile.am: Likewise.
1821 * doc/Makefile.in: Likewise.
1822 * doc/c-aarch64.texi: Likewise.
1823 * doc/c-alpha.texi: Likewise.
1824 * doc/c-arc.texi: Likewise.
1825 * doc/c-arm.texi: Likewise.
1826 * doc/c-avr.texi: Likewise.
1827 * doc/c-bfin.texi: Likewise.
1828 * doc/c-cr16.texi: Likewise.
1829 * doc/c-d10v.texi: Likewise.
1830 * doc/c-d30v.texi: Likewise.
1831 * doc/c-h8300.texi: Likewise.
1832 * doc/c-hppa.texi: Likewise.
1833 * doc/c-i370.texi: Likewise.
1834 * doc/c-i386.texi: Likewise.
1835 * doc/c-i860.texi: Likewise.
1836 * doc/c-m32c.texi: Likewise.
1837 * doc/c-m32r.texi: Likewise.
1838 * doc/c-m68hc11.texi: Likewise.
1839 * doc/c-m68k.texi: Likewise.
1840 * doc/c-microblaze.texi: Likewise.
1841 * doc/c-mips.texi: Likewise.
1842 * doc/c-msp430.texi: Likewise.
1843 * doc/c-mt.texi: Likewise.
1844 * doc/c-s390.texi: Likewise.
1845 * doc/c-score.texi: Likewise.
1846 * doc/c-sh.texi: Likewise.
1847 * doc/c-sh64.texi: Likewise.
1848 * doc/c-tic54x.texi: Likewise.
1849 * doc/c-tic6x.texi: Likewise.
1850 * doc/c-v850.texi: Likewise.
1851 * doc/c-xc16x.texi: Likewise.
1852 * doc/c-xgate.texi: Likewise.
1853 * doc/c-xtensa.texi: Likewise.
1854 * doc/c-z80.texi: Likewise.
1855 * doc/internals.texi: Likewise.
1856
4c665b71
RM		 18572013-01-10 Roland McGrath <mcgrathr@google.com>
1858
1859 * hash.c (hash_new_sized): Make it global.
1860 * hash.h: Declare it.
1861 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1862 pass a small size.
1863
a3c62988
NC		 18642013-01-10 Will Newton <will.newton@imgtec.com>
1865
1866 * Makefile.am: Add Meta.
1867 * Makefile.in: Regenerate.
1868 * config/tc-metag.c: New file.
1869 * config/tc-metag.h: New file.
1870 * configure.tgt: Add Meta.
1871 * doc/Makefile.am: Add Meta.
1872 * doc/Makefile.in: Regenerate.
1873 * doc/all.texi: Add Meta.
1874 * doc/as.texiinfo: Document Meta options.
1875 * doc/c-metag.texi: New file.
1876
b37df7c4
SE		 18772013-01-09 Steve Ellcey <sellcey@mips.com>
1878
1879 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1880 calls.
1881 * config/tc-mips.c (internalError): Remove, replace with abort.
1882
a3251895
YZ		 18832013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1884
1885 * config/tc-aarch64.c (parse_operands): Change to compare the result
1886 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1887
8ab8155f
NC		 18882013-01-07 Nick Clifton <nickc@redhat.com>
1889
1890 PR gas/14887
1891 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1892 anticipated character.
1893 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1894 here as it is no longer needed.
1895
a4ac1c42
AS		 18962013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1897
1898 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1899 * doc/c-score.texi (SCORE-Opts): Likewise.
1900 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1901
e407c74b
NC		 19022013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1903
1904 * config/tc-mips.c: Add support for MIPS r5900.
1905 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1906 lq and sq.
1907 (can_swap_branch_p, get_append_method): Detect some conditional
1908 short loops to fix a bug on the r5900 by NOP in the branch delay
1909 slot.
1910 (M_MUL): Support 3 operands in multu on r5900.
1911 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1912 (s_mipsset): Force 32 bit floating point on r5900.
1913 (mips_ip): Check parameter range of instructions mfps and mtps on
1914 r5900.
1915 * configure.in: Detect CPU type when target string contains r5900
1916 (e.g. mips64r5900el-linux-gnu).
1917
62658407
L		 19182013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1919
1920 * as.c (parse_args): Update copyright year to 2013.
1921
95830fd1
YZ		 19222013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1923
1924 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1925 and "cortex57".
1926
517bb291 19272013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1928
517bb291
NC		 1929 PR gas/14987
1930 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1931 closing bracket.
d709e4e6 1932
517bb291 1933For older changes see ChangeLog-2012
08d56133 1934\f
517bb291 1935Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1936
1937Copying and distribution of this file, with or without modification,
1938are permitted in any medium without royalty provided the copyright
1939notice and this notice are preserved.
1940
08d56133
NC		 1941Local Variables:
1942mode: change-log
1943left-margin: 8
1944fill-column: 74
1945version-control: never
1946End:
GDB Binutils - Deliverables
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