* gprof.texi: Use TeX-style quotes and em-dashes consistently.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
539e75ad
L
12006-09-23 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR binutils/3235
4 * config/tc-i386.c (match_template): Check address size prefix
5 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
6 operand.
7
5e02f92e
AM
82006-09-22 Alan Modra <amodra@bigpond.net.au>
9
10 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
11
885afe7b
AM
122006-09-22 Alan Modra <amodra@bigpond.net.au>
13
14 * as.h (as_perror): Delete declaration.
15 * gdbinit.in (as_perror): Delete breakpoint.
16 * messages.c (as_perror): Delete function.
17 * doc/internals.texi: Remove as_perror description.
18 * listing.c (listing_print: Don't use as_perror.
19 * output-file.c (output_file_create, output_file_close): Likewise.
20 * symbols.c (symbol_create, symbol_clone): Likewise.
21 * write.c (write_contents): Likewise.
22 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
23 * config/tc-tic54x.c (tic54x_mlib): Likewise.
24
3aeeedbb
AM
252006-09-22 Alan Modra <amodra@bigpond.net.au>
26
27 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
28 (ppc_handle_align): New function.
29 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
30 (SUB_SEGMENT_ALIGN): Define as zero.
31
96e9638b
BW
322006-09-20 Bob Wilson <bob.wilson@acm.org>
33
34 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
35 (Overview): Skip cross reference in man page.
36
99ad8390
NC
372006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
38
39 * configure.in: Add new target x86_64-pc-mingw64.
40 * configure: Regenerate.
41 * configure.tgt: Add new target x86_64-pc-mingw64.
42 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
43 * config/tc-i386.c: Add new targets.
44 (md_parse_option): Add targets to OPTION_64.
45 (x86_64_target_format): Add new method for setup proper default target cpu mode.
46 * config/te-pep.h: Add new target definition header.
47 (TE_PEP): New macro: Identifies new target architecture.
48 (COFF_WITH_pex64): Set proper includes in bfd.
49 * NEWS: Mention new target.
50
73332571
BS
512006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
52
53 * config/bfin-parse.y (binary): Change sub of const to add of negated
54 const.
55
1c0d3aa6
NC
562006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
57
58 * config/tc-score.c: New file.
59 * config/tc-score.h: Newf file.
60 * configure.tgt: Add Score target.
61 * Makefile.am: Add Score files.
62 * Makefile.in: Regenerate.
63 * NEWS: Mention new target support.
64
4fa3602b
PB
652006-09-16 Paul Brook <paul@codesourcery.com>
66
67 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
68 * doc/c-arm.texi (movsp): Document offset argument.
69
16dd5e42
PB
702006-09-16 Paul Brook <paul@codesourcery.com>
71
72 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
73 unsigned int to avoid 64-bit host problems.
74
c4ae04ce
BS
752006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
76
77 * config/bfin-parse.y (binary): Do some more constant folding for
78 additions.
79
e5d4a5a6
JB
802006-09-13 Jan Beulich <jbeulich@novell.com>
81
82 * input-file.c (input_file_give_next_buffer): Demote as_bad to
83 as_warn.
84
1a1219cb
AM
852006-09-13 Alan Modra <amodra@bigpond.net.au>
86
87 PR gas/3165
88 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
89 in parens.
90
f79d9c1d
AM
912006-09-13 Alan Modra <amodra@bigpond.net.au>
92
93 * input-file.c (input_file_open): Replace as_perror with as_bad
94 so that gas exits with error on file errors. Correct error
95 message.
96 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 97 * input-file.h: Update comment.
f79d9c1d 98
f512f76f
NC
992006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
100
101 PR gas/3172
102 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
103 registers as a sub-class of wC registers.
104
8d79fd44
AM
1052006-09-11 Alan Modra <amodra@bigpond.net.au>
106
107 PR gas/3165
108 * config/tc-mips.h (enum dwarf2_format): Forward declare.
109 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
110 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
111 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
112
6258339f
NC
1132006-09-08 Nick Clifton <nickc@redhat.com>
114
115 PR gas/3129
116 * doc/as.texinfo (Macro): Improve documentation about separating
117 macro arguments from following text.
118
f91e006c
PB
1192006-09-08 Paul Brook <paul@codesourcery.com>
120
121 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
122
466bbf93
PB
1232006-09-07 Paul Brook <paul@codesourcery.com>
124
125 * config/tc-arm.c (parse_operands): Mark operand as present.
126
428e3f1f
PB
1272006-09-04 Paul Brook <paul@codesourcery.com>
128
129 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
130 (do_neon_dyadic_if_i_d): Avoid setting U bit.
131 (do_neon_mac_maybe_scalar): Ditto.
132 (do_neon_dyadic_narrow): Force operand type to NT_integer.
133 (insns): Remove out of date comments.
134
fb25138b
NC
1352006-08-29 Nick Clifton <nickc@redhat.com>
136
137 * read.c (s_align): Initialize the 'stopc' variable to prevent
138 compiler complaints about it being used without being
139 initialized.
140 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
141 s_float_space, s_struct, cons_worker, equals): Likewise.
142
5091343a
AM
1432006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
144
145 * ecoff.c (ecoff_directive_val): Fix message typo.
146 * config/tc-ns32k.c (convert_iif): Likewise.
147 * config/tc-sh64.c (shmedia_check_limits): Likewise.
148
1f2a7e38
BW
1492006-08-25 Sterling Augustine <sterling@tensilica.com>
150 Bob Wilson <bob.wilson@acm.org>
151
152 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
153 the state of the absolute_literals directive. Remove align frag at
154 the start of the literal pool position.
155
34135039
BW
1562006-08-25 Bob Wilson <bob.wilson@acm.org>
157
158 * doc/c-xtensa.texi: Add @group commands in examples.
159
74869ac7
BW
1602006-08-24 Bob Wilson <bob.wilson@acm.org>
161
162 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
163 (INIT_LITERAL_SECTION_NAME): Delete.
164 (lit_state struct): Remove segment names, init_lit_seg, and
165 fini_lit_seg. Add lit_prefix and current_text_seg.
166 (init_literal_head_h, init_literal_head): Delete.
167 (fini_literal_head_h, fini_literal_head): Delete.
168 (xtensa_begin_directive): Move argument parsing to
169 xtensa_literal_prefix function.
170 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
171 (xtensa_literal_prefix): Parse the directive argument here and
172 record it in the lit_prefix field. Remove code to derive literal
173 section names.
174 (linkonce_len): New.
175 (get_is_linkonce_section): Use linkonce_len. Check for any
176 ".gnu.linkonce.*" section, not just text sections.
177 (md_begin): Remove initialization of deleted lit_state fields.
178 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
179 to init_literal_head and fini_literal_head.
180 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
181 when traversing literal_head list.
182 (match_section_group): New.
183 (cache_literal_section): Rewrite to determine the literal section
184 name on the fly, create the section and return it.
185 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
186 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
187 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
188 Use xtensa_get_property_section from bfd.
189 (retrieve_xtensa_section): Delete.
190 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
191 description to refer to plural literal sections and add xref to
192 the Literal Directive section.
193 (Literal Directive): Describe new rules for deriving literal section
194 names. Add footnote for special case of .init/.fini with
195 --text-section-literals.
196 (Literal Prefix Directive): Replace old naming rules with xref to the
197 Literal Directive section.
198
87a1fd79
JM
1992006-08-21 Joseph Myers <joseph@codesourcery.com>
200
201 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
202 merging with previous long opcode.
203
7148cc28
NC
2042006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
205
206 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
207 * Makefile.in: Regenerate.
208 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
209 renamed. Adjust.
210
3e9e4fcf
JB
2112006-08-16 Julian Brown <julian@codesourcery.com>
212
213 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
214 to use ARM instructions on non-ARM-supporting cores.
215 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
216 mode automatically based on cpu variant.
217 (md_begin): Call above function.
218
267d2029
JB
2192006-08-16 Julian Brown <julian@codesourcery.com>
220
221 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
222 recognized in non-unified syntax mode.
223
4be041b2
TS
2242006-08-15 Thiemo Seufer <ths@mips.com>
225 Nigel Stephens <nigel@mips.com>
226 David Ung <davidu@mips.com>
227
228 * configure.tgt: Handle mips*-sde-elf*.
229
3a93f742
TS
2302006-08-12 Thiemo Seufer <ths@networkno.de>
231
232 * config/tc-mips.c (mips16_ip): Fix argument register handling
233 for restore instruction.
234
1737851b
BW
2352006-08-08 Bob Wilson <bob.wilson@acm.org>
236
237 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
238 (out_sleb128): New.
239 (out_fixed_inc_line_addr): New.
240 (process_entries): Use out_fixed_inc_line_addr when
241 DWARF2_USE_FIXED_ADVANCE_PC is set.
242 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
243
e14e52f8
DD
2442006-08-08 DJ Delorie <dj@redhat.com>
245
246 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
247 vs full symbols so that we never have more than one pointer value
248 for any given symbol in our symbol table.
249
802f5d9e
NC
2502006-08-08 Sterling Augustine <sterling@tensilica.com>
251
252 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
253 and emit DW_AT_ranges when code in compilation unit is not
254 contiguous.
255 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
256 is not contiguous.
257 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
258 (out_debug_ranges): New function to emit .debug_ranges section
259 when code is not contiguous.
260
720abc60
NC
2612006-08-08 Nick Clifton <nickc@redhat.com>
262
263 * config/tc-arm.c (WARN_DEPRECATED): Enable.
264
f0927246
NC
2652006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
266
267 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
268 only block.
269 (pe_directive_secrel) [TE_PE]: New function.
270 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
271 loc, loc_mark_labels.
272 [TE_PE]: Handle secrel32.
273 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
274 call.
275 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
276 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
277 (md_section_align): Only round section sizes here for AOUT
278 targets.
279 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
280 (tc_pe_dwarf2_emit_offset): New function.
281 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
282 (cons_fix_new_arm): Handle O_secrel.
283 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
284 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
285 of OBJ_ELF only block.
286 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
287 tc_pe_dwarf2_emit_offset.
288
55e6e397
RS
2892006-08-04 Richard Sandiford <richard@codesourcery.com>
290
291 * config/tc-sh.c (apply_full_field_fix): New function.
292 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
293 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
294 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
295 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
296
9cd19b17
NC
2972006-08-03 Nick Clifton <nickc@redhat.com>
298
299 PR gas/2991
300 * config.in: Regenerate.
301
97f87066
JM
3022006-08-03 Joseph Myers <joseph@codesourcery.com>
303
304 * config/tc-arm.c (parse_operands): Handle invalid register name
305 for OP_RIWR_RIWC.
306
41adaa5c
JM
3072006-08-03 Joseph Myers <joseph@codesourcery.com>
308
309 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
310 (parse_operands): Handle it.
311 (insns): Use it for tmcr and tmrc.
312
9d7cbccd
NC
3132006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
314
315 PR binutils/2983
316 * config/tc-i386.c (md_parse_option): Treat any target starting
317 with elf64_x86_64 as a viable target for the -64 switch.
318 (i386_target_format): For 64-bit ELF flavoured output use
319 ELF_TARGET_FORMAT64.
320 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
321
c973bc5c
NC
3222006-08-02 Nick Clifton <nickc@redhat.com>
323
324 PR gas/2991
325 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
326 bfd/aclocal.m4.
327 * configure.in: Run BFD_BINARY_FOPEN.
328 * configure: Regenerate.
329 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
330 file to include.
331
cfde7f70
L
3322006-08-01 H.J. Lu <hongjiu.lu@intel.com>
333
334 * config/tc-i386.c (md_assemble): Don't update
335 cpu_arch_isa_flags.
336
b4c71f56
TS
3372006-08-01 Thiemo Seufer <ths@mips.com>
338
339 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
340
54f4ddb3
TS
3412006-08-01 Thiemo Seufer <ths@mips.com>
342
343 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
344 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
345 BFD_RELOC_32 and BFD_RELOC_16.
346 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
347 md_convert_frag, md_obj_end): Fix comment formatting.
348
d103cf61
TS
3492006-07-31 Thiemo Seufer <ths@mips.com>
350
351 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
352 handling for BFD_RELOC_MIPS16_JMP.
353
601e61cd
NC
3542006-07-24 Andreas Schwab <schwab@suse.de>
355
356 PR/2756
357 * read.c (read_a_source_file): Ignore unknown text after line
358 comment character. Fix misleading comment.
359
b45619c0
NC
3602006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
361
362 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
363 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
364 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
365 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
366 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
367 doc/c-z80.texi, doc/internals.texi: Fix some typos.
368
784906c5
NC
3692006-07-21 Nick Clifton <nickc@redhat.com>
370
371 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
372 linker testsuite.
373
d5f010e9
TS
3742006-07-20 Thiemo Seufer <ths@mips.com>
375 Nigel Stephens <nigel@mips.com>
376
377 * config/tc-mips.c (md_parse_option): Don't infer optimisation
378 options from debug options.
379
35d3d567
TS
3802006-07-20 Thiemo Seufer <ths@mips.com>
381
382 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
383 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
384
401a54cf
PB
3852006-07-19 Paul Brook <paul@codesourcery.com>
386
387 * config/tc-arm.c (insns): Fix rbit Arm opcode.
388
16805f35
PB
3892006-07-18 Paul Brook <paul@codesourcery.com>
390
391 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
392 (md_convert_frag): Use correct reloc for add_pc. Use
393 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
394 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
395 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
396
d9e05e4e
AM
3972006-07-17 Mat Hostetter <mat@lcs.mit.edu>
398
399 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
400 when file and line unknown.
401
f43abd2b
TS
4022006-07-17 Thiemo Seufer <ths@mips.com>
403
404 * read.c (s_struct): Use IS_ELF.
405 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
406 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
407 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
408 s_mips_mask): Likewise.
409
a2902af6
TS
4102006-07-16 Thiemo Seufer <ths@mips.com>
411 David Ung <davidu@mips.com>
412
413 * read.c (s_struct): Handle ELF section changing.
414 * config/tc-mips.c (s_align): Leave enabling auto-align to the
415 generic code.
416 (s_change_sec): Try section changing only if we output ELF.
417
d32cad65
L
4182006-07-15 H.J. Lu <hongjiu.lu@intel.com>
419
420 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
421 CpuAmdFam10.
422 (smallest_imm_type): Remove Cpu086.
423 (i386_target_format): Likewise.
424
425 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
426 Update CpuXXX.
427
050dfa73
MM
4282006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
429 Michael Meissner <michael.meissner@amd.com>
430
431 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
432 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
433 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
434 architecture.
435 (i386_align_code): Ditto.
436 (md_assemble_code): Add support for insertq/extrq instructions,
437 swapping as needed for intel syntax.
438 (swap_imm_operands): New function to swap immediate operands.
439 (swap_operands): Deal with 4 operand instructions.
440 (build_modrm_byte): Add support for insertq instruction.
441
6b2de085
L
4422006-07-13 H.J. Lu <hongjiu.lu@intel.com>
443
444 * config/tc-i386.h (Size64): Fix a typo in comment.
445
01eaea5a
NC
4462006-07-12 Nick Clifton <nickc@redhat.com>
447
448 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 449 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
450 already been checked here.
451
1e85aad8
JW
4522006-07-07 James E Wilson <wilson@specifix.com>
453
454 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
455
1370e33d
NC
4562006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
457 Nick Clifton <nickc@redhat.com>
458
459 PR binutils/2877
460 * doc/as.texi: Fix spelling typo: branchs => branches.
461 * doc/c-m68hc11.texi: Likewise.
462 * config/tc-m68hc11.c: Likewise.
463 Support old spelling of command line switch for backwards
464 compatibility.
465
5f0fe04b
TS
4662006-07-04 Thiemo Seufer <ths@mips.com>
467 David Ung <davidu@mips.com>
468
469 * config/tc-mips.c (s_is_linkonce): New function.
470 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
471 weak, external, and linkonce symbols.
472 (pic_need_relax): Use s_is_linkonce.
473
85234291
L
4742006-06-24 H.J. Lu <hongjiu.lu@intel.com>
475
476 * doc/as.texinfo (Org): Remove space.
477 (P2align): Add "@var{abs-expr},".
478
ccc9c027
L
4792006-06-23 H.J. Lu <hongjiu.lu@intel.com>
480
481 * config/tc-i386.c (cpu_arch_tune_set): New.
482 (cpu_arch_isa): Likewise.
483 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
484 nops with short or long nop sequences based on -march=/.arch
485 and -mtune=.
486 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
487 set cpu_arch_tune and cpu_arch_tune_flags.
488 (md_parse_option): For -march=, set cpu_arch_isa and set
489 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
490 0. Set cpu_arch_tune_set to 1 for -mtune=.
491 (i386_target_format): Don't set cpu_arch_tune.
492
d4dc2f22
TS
4932006-06-23 Nigel Stephens <nigel@mips.com>
494
495 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
496 generated .sbss.* and .gnu.linkonce.sb.*.
497
a8dbcb85
TS
4982006-06-23 Thiemo Seufer <ths@mips.com>
499 David Ung <davidu@mips.com>
500
501 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
502 label_list.
503 * config/tc-mips.c (label_list): Define per-segment label_list.
504 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
505 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
506 mips_from_file_after_relocs, mips_define_label): Use per-segment
507 label_list.
508
3994f87e
TS
5092006-06-22 Thiemo Seufer <ths@mips.com>
510
511 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
512 (append_insn): Use it.
513 (md_apply_fix): Whitespace formatting.
514 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
515 mips16_extended_frag): Remove register specifier.
516 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
517 constants.
518
fa073d69
MS
5192006-06-21 Mark Shinwell <shinwell@codesourcery.com>
520
521 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
522 a directive saving VFP registers for ARMv6 or later.
523 (s_arm_unwind_save): Add parameter arch_v6 and call
524 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
525 appropriate.
526 (md_pseudo_table): Add entry for new "vsave" directive.
527 * doc/c-arm.texi: Correct error in example for "save"
528 directive (fstmdf -> fstmdx). Also document "vsave" directive.
529
8e77b565 5302006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
531 Anatoly Sokolov <aesok@post.ru>
532
533 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
534 and atmega644p devices. Rename atmega164/atmega324 devices to
535 atmega164p/atmega324p.
536 * doc/c-avr.texi: Document new mcu and arch options.
537
8b1ad454
NC
5382006-06-17 Nick Clifton <nickc@redhat.com>
539
540 * config/tc-arm.c (enum parse_operand_result): Move outside of
541 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
542
9103f4f4
L
5432006-06-16 H.J. Lu <hongjiu.lu@intel.com>
544
545 * config/tc-i386.h (processor_type): New.
546 (arch_entry): Add type.
547
548 * config/tc-i386.c (cpu_arch_tune): New.
549 (cpu_arch_tune_flags): Likewise.
550 (cpu_arch_isa_flags): Likewise.
551 (cpu_arch): Updated.
552 (set_cpu_arch): Also update cpu_arch_isa_flags.
553 (md_assemble): Update cpu_arch_isa_flags.
554 (OPTION_MARCH): New.
555 (OPTION_MTUNE): Likewise.
556 (md_longopts): Add -march= and -mtune=.
557 (md_parse_option): Support -march= and -mtune=.
558 (md_show_usage): Add -march=CPU/-mtune=CPU.
559 (i386_target_format): Also update cpu_arch_isa_flags,
560 cpu_arch_tune and cpu_arch_tune_flags.
561
562 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
563
564 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
565
4962c51a
MS
5662006-06-15 Mark Shinwell <shinwell@codesourcery.com>
567
568 * config/tc-arm.c (enum parse_operand_result): New.
569 (struct group_reloc_table_entry): New.
570 (enum group_reloc_type): New.
571 (group_reloc_table): New array.
572 (find_group_reloc_table_entry): New function.
573 (parse_shifter_operand_group_reloc): New function.
574 (parse_address_main): New function, incorporating code
575 from the old parse_address function. To be used via...
576 (parse_address): wrapper for parse_address_main; and
577 (parse_address_group_reloc): new function, likewise.
578 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
579 OP_ADDRGLDRS, OP_ADDRGLDC.
580 (parse_operands): Support for these new operand codes.
581 New macro po_misc_or_fail_no_backtrack.
582 (encode_arm_cp_address): Preserve group relocations.
583 (insns): Modify to use the above operand codes where group
584 relocations are permitted.
585 (md_apply_fix): Handle the group relocations
586 ALU_PC_G0_NC through LDC_SB_G2.
587 (tc_gen_reloc): Likewise.
588 (arm_force_relocation): Leave group relocations for the linker.
589 (arm_fix_adjustable): Likewise.
590
cd2f129f
JB
5912006-06-15 Julian Brown <julian@codesourcery.com>
592
593 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
594 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
595 relocs properly.
596
46e883c5
L
5972006-06-12 H.J. Lu <hongjiu.lu@intel.com>
598
599 * config/tc-i386.c (process_suffix): Don't add rex64 for
600 "xchg %rax,%rax".
601
1787fe5b
TS
6022006-06-09 Thiemo Seufer <ths@mips.com>
603
604 * config/tc-mips.c (mips_ip): Maintain argument count.
605
96f989c2
AM
6062006-06-09 Alan Modra <amodra@bigpond.net.au>
607
608 * config/tc-iq2000.c: Include sb.h.
609
7c752c2a
TS
6102006-06-08 Nigel Stephens <nigel@mips.com>
611
612 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
613 aliases for better compatibility with SGI tools.
614
03bf704f
AM
6152006-06-08 Alan Modra <amodra@bigpond.net.au>
616
617 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
618 * Makefile.am (GASLIBS): Expand @BFDLIB@.
619 (BFDVER_H): Delete.
620 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
621 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
622 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
623 Run "make dep-am".
624 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
625 * Makefile.in: Regenerate.
626 * doc/Makefile.in: Regenerate.
627 * configure: Regenerate.
628
6648b7cf
JM
6292006-06-07 Joseph S. Myers <joseph@codesourcery.com>
630
631 * po/Make-in (pdf, ps): New dummy targets.
632
037e8744
JB
6332006-06-07 Julian Brown <julian@codesourcery.com>
634
635 * config/tc-arm.c (stdarg.h): include.
636 (arm_it): Add uncond_value field. Add isvec and issingle to operand
637 array.
638 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
639 REG_TYPE_NSDQ (single, double or quad vector reg).
640 (reg_expected_msgs): Update.
641 (BAD_FPU): Add macro for unsupported FPU instruction error.
642 (parse_neon_type): Support 'd' as an alias for .f64.
643 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
644 sets of registers.
645 (parse_vfp_reg_list): Don't update first arg on error.
646 (parse_neon_mov): Support extra syntax for VFP moves.
647 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
648 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
649 (parse_operands): Support isvec, issingle operands fields, new parse
650 codes above.
651 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
652 msr variants.
653 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
654 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
655 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
656 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
657 shapes.
658 (neon_shape): Redefine in terms of above.
659 (neon_shape_class): New enumeration, table of shape classes.
660 (neon_shape_el): New enumeration. One element of a shape.
661 (neon_shape_el_size): Register widths of above, where appropriate.
662 (neon_shape_info): New struct. Info for shape table.
663 (neon_shape_tab): New array.
664 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
665 (neon_check_shape): Rewrite as...
666 (neon_select_shape): New function to classify instruction shapes,
667 driven by new table neon_shape_tab array.
668 (neon_quad): New function. Return 1 if shape should set Q flag in
669 instructions (or equivalent), 0 otherwise.
670 (type_chk_of_el_type): Support F64.
671 (el_type_of_type_chk): Likewise.
672 (neon_check_type): Add support for VFP type checking (VFP data
673 elements fill their containing registers).
674 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
675 in thumb mode for VFP instructions.
676 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
677 and encode the current instruction as if it were that opcode.
678 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
679 arguments, call function in PFN.
680 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
681 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
682 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
683 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
684 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
685 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
686 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
687 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
688 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
689 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
690 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
691 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
692 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
693 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
694 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
695 neon_quad.
696 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
697 between VFP and Neon turns out to belong to Neon. Perform
698 architecture check and fill in condition field if appropriate.
699 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
700 (do_neon_cvt): Add support for VFP variants of instructions.
701 (neon_cvt_flavour): Extend to cover VFP conversions.
702 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
703 vmov variants.
704 (do_neon_ldr_str): Handle single-precision VFP load/store.
705 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
706 NS_NULL not NS_IGNORE.
707 (opcode_tag): Add OT_csuffixF for operands which either take a
708 conditional suffix, or have 0xF in the condition field.
709 (md_assemble): Add support for OT_csuffixF.
710 (NCE): Replace macro with...
711 (NCE_tag, NCE, NCEF): New macros.
712 (nCE): Replace macro with...
713 (nCE_tag, nCE, nCEF): New macros.
714 (insns): Add support for VFP insns or VFP versions of insns msr,
715 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
716 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
717 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
718 VFP/Neon insns together.
719
ebd1c875
AM
7202006-06-07 Alan Modra <amodra@bigpond.net.au>
721 Ladislav Michl <ladis@linux-mips.org>
722
723 * app.c: Don't include headers already included by as.h.
724 * as.c: Likewise.
725 * atof-generic.c: Likewise.
726 * cgen.c: Likewise.
727 * dwarf2dbg.c: Likewise.
728 * expr.c: Likewise.
729 * input-file.c: Likewise.
730 * input-scrub.c: Likewise.
731 * macro.c: Likewise.
732 * output-file.c: Likewise.
733 * read.c: Likewise.
734 * sb.c: Likewise.
735 * config/bfin-lex.l: Likewise.
736 * config/obj-coff.h: Likewise.
737 * config/obj-elf.h: Likewise.
738 * config/obj-som.h: Likewise.
739 * config/tc-arc.c: Likewise.
740 * config/tc-arm.c: Likewise.
741 * config/tc-avr.c: Likewise.
742 * config/tc-bfin.c: Likewise.
743 * config/tc-cris.c: Likewise.
744 * config/tc-d10v.c: Likewise.
745 * config/tc-d30v.c: Likewise.
746 * config/tc-dlx.h: Likewise.
747 * config/tc-fr30.c: Likewise.
748 * config/tc-frv.c: Likewise.
749 * config/tc-h8300.c: Likewise.
750 * config/tc-hppa.c: Likewise.
751 * config/tc-i370.c: Likewise.
752 * config/tc-i860.c: Likewise.
753 * config/tc-i960.c: Likewise.
754 * config/tc-ip2k.c: Likewise.
755 * config/tc-iq2000.c: Likewise.
756 * config/tc-m32c.c: Likewise.
757 * config/tc-m32r.c: Likewise.
758 * config/tc-maxq.c: Likewise.
759 * config/tc-mcore.c: Likewise.
760 * config/tc-mips.c: Likewise.
761 * config/tc-mmix.c: Likewise.
762 * config/tc-mn10200.c: Likewise.
763 * config/tc-mn10300.c: Likewise.
764 * config/tc-msp430.c: Likewise.
765 * config/tc-mt.c: Likewise.
766 * config/tc-ns32k.c: Likewise.
767 * config/tc-openrisc.c: Likewise.
768 * config/tc-ppc.c: Likewise.
769 * config/tc-s390.c: Likewise.
770 * config/tc-sh.c: Likewise.
771 * config/tc-sh64.c: Likewise.
772 * config/tc-sparc.c: Likewise.
773 * config/tc-tic30.c: Likewise.
774 * config/tc-tic4x.c: Likewise.
775 * config/tc-tic54x.c: Likewise.
776 * config/tc-v850.c: Likewise.
777 * config/tc-vax.c: Likewise.
778 * config/tc-xc16x.c: Likewise.
779 * config/tc-xstormy16.c: Likewise.
780 * config/tc-xtensa.c: Likewise.
781 * config/tc-z80.c: Likewise.
782 * config/tc-z8k.c: Likewise.
783 * macro.h: Don't include sb.h or ansidecl.h.
784 * sb.h: Don't include stdio.h or ansidecl.h.
785 * cond.c: Include sb.h.
786 * itbl-lex.l: Include as.h instead of other system headers.
787 * itbl-parse.y: Likewise.
788 * itbl-ops.c: Similarly.
789 * itbl-ops.h: Don't include as.h or ansidecl.h.
790 * config/bfin-defs.h: Don't include bfd.h or as.h.
791 * config/bfin-parse.y: Include as.h instead of other system headers.
792
9622b051
AM
7932006-06-06 Ben Elliston <bje@au.ibm.com>
794 Anton Blanchard <anton@samba.org>
795
796 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
797 (md_show_usage): Document it.
798 (ppc_setup_opcodes): Test power6 opcode flag bits.
799 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
800
65263ce3
TS
8012006-06-06 Thiemo Seufer <ths@mips.com>
802 Chao-ying Fu <fu@mips.com>
803
804 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
805 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
806 (macro_build): Update comment.
807 (mips_ip): Allow DSP64 instructions for MIPS64R2.
808 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
809 CPU_HAS_MDMX.
810 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
811 MIPS_CPU_ASE_MDMX flags for sb1.
812
a9e24354
TS
8132006-06-05 Thiemo Seufer <ths@mips.com>
814
815 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
816 appropriate.
817 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
818 (mips_ip): Make overflowed/underflowed constant arguments in DSP
819 and MT instructions a fatal error. Use INSERT_OPERAND where
820 appropriate. Improve warnings for break and wait code overflows.
821 Use symbolic constant of OP_MASK_COPZ.
822 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
823
4cfe2c59
DJ
8242006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
825
826 * po/Make-in (top_builddir): Define.
827
e10fad12
JM
8282006-06-02 Joseph S. Myers <joseph@codesourcery.com>
829
830 * doc/Makefile.am (TEXI2DVI): Define.
831 * doc/Makefile.in: Regenerate.
832 * doc/c-arc.texi: Fix typo.
833
12e64c2c
AM
8342006-06-01 Alan Modra <amodra@bigpond.net.au>
835
836 * config/obj-ieee.c: Delete.
837 * config/obj-ieee.h: Delete.
838 * Makefile.am (OBJ_FORMATS): Remove ieee.
839 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
840 (obj-ieee.o): Remove rule.
841 * Makefile.in: Regenerate.
842 * configure.in (atof): Remove tahoe.
843 (OBJ_MAYBE_IEEE): Don't define.
844 * configure: Regenerate.
845 * config.in: Regenerate.
846 * doc/Makefile.in: Regenerate.
847 * po/POTFILES.in: Regenerate.
848
20e95c23
DJ
8492006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
850
851 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
852 and LIBINTL_DEP everywhere.
853 (INTLLIBS): Remove.
854 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
855 * acinclude.m4: Include new gettext macros.
856 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
857 Remove local code for po/Makefile.
858 * Makefile.in, configure, doc/Makefile.in: Regenerated.
859
eebf07fb
NC
8602006-05-30 Nick Clifton <nickc@redhat.com>
861
862 * po/es.po: Updated Spanish translation.
863
b6aee19e
DC
8642006-05-06 Denis Chertykov <denisc@overta.ru>
865
866 * doc/c-avr.texi: New file.
867 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
868 * doc/all.texi: Set AVR
869 * doc/as.texinfo: Include c-avr.texi
870
f8fdc850
JZ
8712006-05-28 Jie Zhang <jie.zhang@analog.com>
872
873 * config/bfin-parse.y (check_macfunc): Loose the condition of
874 calling check_multiply_halfregs ().
875
a3205465
JZ
8762006-05-25 Jie Zhang <jie.zhang@analog.com>
877
878 * config/bfin-parse.y (asm_1): Better check and deal with
879 vector and scalar Multiply 16-Bit Operands instructions.
880
9b52905e
NC
8812006-05-24 Nick Clifton <nickc@redhat.com>
882
883 * config/tc-hppa.c: Convert to ISO C90 format.
884 * config/tc-hppa.h: Likewise.
885
8862006-05-24 Carlos O'Donell <carlos@systemhalted.org>
887 Randolph Chung <randolph@tausq.org>
888
889 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
890 is_tls_ieoff, is_tls_leoff): Define.
891 (fix_new_hppa): Handle TLS.
892 (cons_fix_new_hppa): Likewise.
893 (pa_ip): Likewise.
894 (md_apply_fix): Handle TLS relocs.
895 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
896
28c9d252
NC
8972006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
898
899 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
900
ad3fea08
TS
9012006-05-23 Thiemo Seufer <ths@mips.com>
902 David Ung <davidu@mips.com>
903 Nigel Stephens <nigel@mips.com>
904
905 [ gas/ChangeLog ]
906 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
907 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
908 ISA_HAS_MXHC1): New macros.
909 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
910 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
911 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
912 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
913 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
914 (mips_after_parse_args): Change default handling of float register
915 size to account for 32bit code with 64bit FP. Better sanity checking
916 of ISA/ASE/ABI option combinations.
917 (s_mipsset): Support switching of GPR and FPR sizes via
918 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
919 options.
920 (mips_elf_final_processing): We should record the use of 64bit FP
921 registers in 32bit code but we don't, because ELF header flags are
922 a scarce ressource.
923 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
924 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
925 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
926 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
927 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
928 missing -march options. Document .set arch=CPU. Move .set smartmips
929 to ASE page. Use @code for .set FOO examples.
930
8b64503a
JZ
9312006-05-23 Jie Zhang <jie.zhang@analog.com>
932
933 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
934 if needed.
935
403022e0
JZ
9362006-05-23 Jie Zhang <jie.zhang@analog.com>
937
938 * config/bfin-defs.h (bfin_equals): Remove declaration.
939 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
940 * config/tc-bfin.c (bfin_name_is_register): Remove.
941 (bfin_equals): Remove.
942 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
943 (bfin_name_is_register): Remove declaration.
944
7455baf8
TS
9452006-05-19 Thiemo Seufer <ths@mips.com>
946 Nigel Stephens <nigel@mips.com>
947
948 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
949 (mips_oddfpreg_ok): New function.
950 (mips_ip): Use it.
951
707bfff6
TS
9522006-05-19 Thiemo Seufer <ths@mips.com>
953 David Ung <davidu@mips.com>
954
955 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
956 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
957 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
958 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
959 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
960 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
961 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
962 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
963 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
964 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
965 reg_names_o32, reg_names_n32n64): Define register classes.
966 (reg_lookup): New function, use register classes.
967 (md_begin): Reserve register names in the symbol table. Simplify
968 OBJ_ELF defines.
969 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
970 Use reg_lookup.
971 (mips16_ip): Use reg_lookup.
972 (tc_get_register): Likewise.
973 (tc_mips_regname_to_dw2regnum): New function.
974
1df69f4f
TS
9752006-05-19 Thiemo Seufer <ths@mips.com>
976
977 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
978 Un-constify string argument.
979 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
980 Likewise.
981 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
982 Likewise.
983 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
984 Likewise.
985 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
986 Likewise.
987 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
988 Likewise.
989 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
990 Likewise.
991
377260ba
NS
9922006-05-19 Nathan Sidwell <nathan@codesourcery.com>
993
994 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
995 cfloat/m68881 to correct architecture before using it.
996
cce7653b
NC
9972006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
998
999 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1000 constant values.
1001
b0796911
PB
10022006-05-15 Paul Brook <paul@codesourcery.com>
1003
1004 * config/tc-arm.c (arm_adjust_symtab): Use
1005 bfd_is_arm_special_symbol_name.
1006
64b607e6
BW
10072006-05-15 Bob Wilson <bob.wilson@acm.org>
1008
1009 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1010 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1011 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1012 Handle errors from calls to xtensa_opcode_is_* functions.
1013
9b3f89ee
TS
10142006-05-14 Thiemo Seufer <ths@mips.com>
1015
1016 * config/tc-mips.c (macro_build): Test for currently active
1017 mips16 option.
1018 (mips16_ip): Reject invalid opcodes.
1019
370b66a1
CD
10202006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1021
1022 * doc/as.texinfo: Rename "Index" to "AS Index",
1023 and "ABORT" to "ABORT (COFF)".
1024
b6895b4f
PB
10252006-05-11 Paul Brook <paul@codesourcery.com>
1026
1027 * config/tc-arm.c (parse_half): New function.
1028 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1029 (parse_operands): Ditto.
1030 (do_mov16): Reject invalid relocations.
1031 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1032 (insns): Replace Iffff with HALF.
1033 (md_apply_fix): Add MOVW and MOVT relocs.
1034 (tc_gen_reloc): Ditto.
1035 * doc/c-arm.texi: Document relocation operators
1036
e28387c3
PB
10372006-05-11 Paul Brook <paul@codesourcery.com>
1038
1039 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1040
89ee2ebe
TS
10412006-05-11 Thiemo Seufer <ths@mips.com>
1042
1043 * config/tc-mips.c (append_insn): Don't check the range of j or
1044 jal addresses.
1045
53baae48
NC
10462006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1047
1048 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1049 relocs against external symbols for WinCE targets.
1050 (md_apply_fix): Likewise.
1051
4e2a74a8
TS
10522006-05-09 David Ung <davidu@mips.com>
1053
1054 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1055 j or jal address.
1056
337ff0a5
NC
10572006-05-09 Nick Clifton <nickc@redhat.com>
1058
1059 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1060 against symbols which are not going to be placed into the symbol
1061 table.
1062
8c9f705e
BE
10632006-05-09 Ben Elliston <bje@au.ibm.com>
1064
1065 * expr.c (operand): Remove `if (0 && ..)' statement and
1066 subsequently unused target_op label. Collapse `if (1 || ..)'
1067 statement.
1068 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1069 separately above the switch.
1070
2fd0d2ac
NC
10712006-05-08 Nick Clifton <nickc@redhat.com>
1072
1073 PR gas/2623
1074 * config/tc-msp430.c (line_separator_character): Define as |.
1075
e16bfa71
TS
10762006-05-08 Thiemo Seufer <ths@mips.com>
1077 Nigel Stephens <nigel@mips.com>
1078 David Ung <davidu@mips.com>
1079
1080 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1081 (mips_opts): Likewise.
1082 (file_ase_smartmips): New variable.
1083 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1084 (macro_build): Handle SmartMIPS instructions.
1085 (mips_ip): Likewise.
1086 (md_longopts): Add argument handling for smartmips.
1087 (md_parse_options, mips_after_parse_args): Likewise.
1088 (s_mipsset): Add .set smartmips support.
1089 (md_show_usage): Document -msmartmips/-mno-smartmips.
1090 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1091 .set smartmips.
1092 * doc/c-mips.texi: Likewise.
1093
32638454
AM
10942006-05-08 Alan Modra <amodra@bigpond.net.au>
1095
1096 * write.c (relax_segment): Add pass count arg. Don't error on
1097 negative org/space on first two passes.
1098 (relax_seg_info): New struct.
1099 (relax_seg, write_object_file): Adjust.
1100 * write.h (relax_segment): Update prototype.
1101
b7fc2769
JB
11022006-05-05 Julian Brown <julian@codesourcery.com>
1103
1104 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1105 checking.
1106 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1107 architecture version checks.
1108 (insns): Allow overlapping instructions to be used in VFP mode.
1109
7f841127
L
11102006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1111
1112 PR gas/2598
1113 * config/obj-elf.c (obj_elf_change_section): Allow user
1114 specified SHF_ALPHA_GPREL.
1115
73160847
NC
11162006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1117
1118 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1119 for PMEM related expressions.
1120
56487c55
NC
11212006-05-05 Nick Clifton <nickc@redhat.com>
1122
1123 PR gas/2582
1124 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1125 insertion of a directory separator character into a string at a
1126 given offset. Uses heuristics to decide when to use a backslash
1127 character rather than a forward-slash character.
1128 (dwarf2_directive_loc): Use the macro.
1129 (out_debug_info): Likewise.
1130
d43b4baf
TS
11312006-05-05 Thiemo Seufer <ths@mips.com>
1132 David Ung <davidu@mips.com>
1133
1134 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1135 instruction.
1136 (macro): Add new case M_CACHE_AB.
1137
088fa78e
KH
11382006-05-04 Kazu Hirata <kazu@codesourcery.com>
1139
1140 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1141 (opcode_lookup): Issue a warning for opcode with
1142 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1143 identical to OT_cinfix3.
1144 (TxC3w, TC3w, tC3w): New.
1145 (insns): Use tC3w and TC3w for comparison instructions with
1146 's' suffix.
1147
c9049d30
AM
11482006-05-04 Alan Modra <amodra@bigpond.net.au>
1149
1150 * subsegs.h (struct frchain): Delete frch_seg.
1151 (frchain_root): Delete.
1152 (seg_info): Define as macro.
1153 * subsegs.c (frchain_root): Delete.
1154 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1155 (subsegs_begin, subseg_change): Adjust for above.
1156 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1157 rather than to one big list.
1158 (subseg_get): Don't special case abs, und sections.
1159 (subseg_new, subseg_force_new): Don't set frchainP here.
1160 (seg_info): Delete.
1161 (subsegs_print_statistics): Adjust frag chain control list traversal.
1162 * debug.c (dmp_frags): Likewise.
1163 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1164 at frchain_root. Make use of known frchain ordering.
1165 (last_frag_for_seg): Likewise.
1166 (get_frag_fix): Likewise. Add seg param.
1167 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1168 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1169 (SUB_SEGMENT_ALIGN): Likewise.
1170 (subsegs_finish): Adjust frchain list traversal.
1171 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1172 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1173 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1174 (xtensa_fix_b_j_loop_end_frags): Likewise.
1175 (xtensa_fix_close_loop_end_frags): Likewise.
1176 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1177 (retrieve_segment_info): Delete frch_seg initialisation.
1178
f592407e
AM
11792006-05-03 Alan Modra <amodra@bigpond.net.au>
1180
1181 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1182 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1183 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1184 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1185
df7849c5
JM
11862006-05-02 Joseph Myers <joseph@codesourcery.com>
1187
1188 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1189 here.
1190 (md_apply_fix3): Multiply offset by 4 here for
1191 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1192
2d545b82
L
11932006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1194 Jan Beulich <jbeulich@novell.com>
1195
1196 * config/tc-i386.c (output_invalid_buf): Change size for
1197 unsigned char.
1198 * config/tc-tic30.c (output_invalid_buf): Likewise.
1199
1200 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1201 unsigned char.
1202 * config/tc-tic30.c (output_invalid): Likewise.
1203
38fc1cb1
DJ
12042006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1205
1206 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1207 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1208 (asconfig.texi): Don't set top_srcdir.
1209 * doc/as.texinfo: Don't use top_srcdir.
1210 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1211
2d545b82
L
12122006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1213
1214 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1215 * config/tc-tic30.c (output_invalid_buf): Likewise.
1216
1217 * config/tc-i386.c (output_invalid): Use snprintf instead of
1218 sprintf.
1219 * config/tc-ia64.c (declare_register_set): Likewise.
1220 (emit_one_bundle): Likewise.
1221 (check_dependencies): Likewise.
1222 * config/tc-tic30.c (output_invalid): Likewise.
1223
a8bc6c78
PB
12242006-05-02 Paul Brook <paul@codesourcery.com>
1225
1226 * config/tc-arm.c (arm_optimize_expr): New function.
1227 * config/tc-arm.h (md_optimize_expr): Define
1228 (arm_optimize_expr): Add prototype.
1229 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1230
58633d9a
BE
12312006-05-02 Ben Elliston <bje@au.ibm.com>
1232
22772e33
BE
1233 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1234 field unsigned.
1235
58633d9a
BE
1236 * sb.h (sb_list_vector): Move to sb.c.
1237 * sb.c (free_list): Use type of sb_list_vector directly.
1238 (sb_build): Fix off-by-one error in assertion about `size'.
1239
89cdfe57
BE
12402006-05-01 Ben Elliston <bje@au.ibm.com>
1241
1242 * listing.c (listing_listing): Remove useless loop.
1243 * macro.c (macro_expand): Remove is_positional local variable.
1244 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1245 and simplify surrounding expressions, where possible.
1246 (assign_symbol): Likewise.
1247 (s_weakref): Likewise.
1248 * symbols.c (colon): Likewise.
1249
c35da140
AM
12502006-05-01 James Lemke <jwlemke@wasabisystems.com>
1251
1252 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1253
9bcd4f99
TS
12542006-04-30 Thiemo Seufer <ths@mips.com>
1255 David Ung <davidu@mips.com>
1256
1257 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1258 (mips_immed): New table that records various handling of udi
1259 instruction patterns.
1260 (mips_ip): Adds udi handling.
1261
001ae1a4
AM
12622006-04-28 Alan Modra <amodra@bigpond.net.au>
1263
1264 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1265 of list rather than beginning.
1266
136da414
JB
12672006-04-26 Julian Brown <julian@codesourcery.com>
1268
1269 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1270 (is_quarter_float): Rename from above. Simplify slightly.
1271 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1272 number.
1273 (parse_neon_mov): Parse floating-point constants.
1274 (neon_qfloat_bits): Fix encoding.
1275 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1276 preference to integer encoding when using the F32 type.
1277
dcbf9037
JB
12782006-04-26 Julian Brown <julian@codesourcery.com>
1279
1280 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1281 zero-initialising structures containing it will lead to invalid types).
1282 (arm_it): Add vectype to each operand.
1283 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1284 defined field.
1285 (neon_typed_alias): New structure. Extra information for typed
1286 register aliases.
1287 (reg_entry): Add neon type info field.
1288 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1289 Break out alternative syntax for coprocessor registers, etc. into...
1290 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1291 out from arm_reg_parse.
1292 (parse_neon_type): Move. Return SUCCESS/FAIL.
1293 (first_error): New function. Call to ensure first error which occurs is
1294 reported.
1295 (parse_neon_operand_type): Parse exactly one type.
1296 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1297 (parse_typed_reg_or_scalar): New function. Handle core of both
1298 arm_typed_reg_parse and parse_scalar.
1299 (arm_typed_reg_parse): Parse a register with an optional type.
1300 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1301 result.
1302 (parse_scalar): Parse a Neon scalar with optional type.
1303 (parse_reg_list): Use first_error.
1304 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1305 (neon_alias_types_same): New function. Return true if two (alias) types
1306 are the same.
1307 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1308 of elements.
1309 (insert_reg_alias): Return new reg_entry not void.
1310 (insert_neon_reg_alias): New function. Insert type/index information as
1311 well as register for alias.
1312 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1313 make typed register aliases accordingly.
1314 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1315 of line.
1316 (s_unreq): Delete type information if present.
1317 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1318 (s_arm_unwind_save_mmxwcg): Likewise.
1319 (s_arm_unwind_movsp): Likewise.
1320 (s_arm_unwind_setfp): Likewise.
1321 (parse_shift): Likewise.
1322 (parse_shifter_operand): Likewise.
1323 (parse_address): Likewise.
1324 (parse_tb): Likewise.
1325 (tc_arm_regname_to_dw2regnum): Likewise.
1326 (md_pseudo_table): Add dn, qn.
1327 (parse_neon_mov): Handle typed operands.
1328 (parse_operands): Likewise.
1329 (neon_type_mask): Add N_SIZ.
1330 (N_ALLMODS): New macro.
1331 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1332 (el_type_of_type_chk): Add some safeguards.
1333 (modify_types_allowed): Fix logic bug.
1334 (neon_check_type): Handle operands with types.
1335 (neon_three_same): Remove redundant optional arg handling.
1336 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1337 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1338 (do_neon_step): Adjust accordingly.
1339 (neon_cmode_for_logic_imm): Use first_error.
1340 (do_neon_bitfield): Call neon_check_type.
1341 (neon_dyadic): Rename to...
1342 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1343 to allow modification of type of the destination.
1344 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1345 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1346 (do_neon_compare): Make destination be an untyped bitfield.
1347 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1348 (neon_mul_mac): Return early in case of errors.
1349 (neon_move_immediate): Use first_error.
1350 (neon_mac_reg_scalar_long): Fix type to include scalar.
1351 (do_neon_dup): Likewise.
1352 (do_neon_mov): Likewise (in several places).
1353 (do_neon_tbl_tbx): Fix type.
1354 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1355 (do_neon_ld_dup): Exit early in case of errors and/or use
1356 first_error.
1357 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1358 Handle .dn/.qn directives.
1359 (REGDEF): Add zero for reg_entry neon field.
1360
5287ad62
JB
13612006-04-26 Julian Brown <julian@codesourcery.com>
1362
1363 * config/tc-arm.c (limits.h): Include.
1364 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1365 (fpu_vfp_v3_or_neon_ext): Declare constants.
1366 (neon_el_type): New enumeration of types for Neon vector elements.
1367 (neon_type_el): New struct. Define type and size of a vector element.
1368 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1369 instruction.
1370 (neon_type): Define struct. The type of an instruction.
1371 (arm_it): Add 'vectype' for the current instruction.
1372 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1373 (vfp_sp_reg_pos): Rename to...
1374 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1375 tags.
1376 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1377 (Neon D or Q register).
1378 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1379 register.
1380 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1381 (my_get_expression): Allow above constant as argument to accept
1382 64-bit constants with optional prefix.
1383 (arm_reg_parse): Add extra argument to return the specific type of
1384 register in when either a D or Q register (REG_TYPE_NDQ) is
1385 requested. Can be NULL.
1386 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1387 (parse_reg_list): Update for new arm_reg_parse args.
1388 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1389 (parse_neon_el_struct_list): New function. Parse element/structure
1390 register lists for VLD<n>/VST<n> instructions.
1391 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1392 (s_arm_unwind_save_mmxwr): Likewise.
1393 (s_arm_unwind_save_mmxwcg): Likewise.
1394 (s_arm_unwind_movsp): Likewise.
1395 (s_arm_unwind_setfp): Likewise.
1396 (parse_big_immediate): New function. Parse an immediate, which may be
1397 64 bits wide. Put results in inst.operands[i].
1398 (parse_shift): Update for new arm_reg_parse args.
1399 (parse_address): Likewise. Add parsing of alignment specifiers.
1400 (parse_neon_mov): Parse the operands of a VMOV instruction.
1401 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1402 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1403 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1404 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1405 (parse_operands): Handle new codes above.
1406 (encode_arm_vfp_sp_reg): Rename to...
1407 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1408 selected VFP version only supports D0-D15.
1409 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1410 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1411 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1412 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1413 encode_arm_vfp_reg name, and allow 32 D regs.
1414 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1415 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1416 regs.
1417 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1418 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1419 constant-load and conversion insns introduced with VFPv3.
1420 (neon_tab_entry): New struct.
1421 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1422 those which are the targets of pseudo-instructions.
1423 (neon_opc): Enumerate opcodes, use as indices into...
1424 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1425 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1426 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1427 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1428 neon_enc_tab.
1429 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1430 Neon instructions.
1431 (neon_type_mask): New. Compact type representation for type checking.
1432 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1433 permitted type combinations.
1434 (N_IGNORE_TYPE): New macro.
1435 (neon_check_shape): New function. Check an instruction shape for
1436 multiple alternatives. Return the specific shape for the current
1437 instruction.
1438 (neon_modify_type_size): New function. Modify a vector type and size,
1439 depending on the bit mask in argument 1.
1440 (neon_type_promote): New function. Convert a given "key" type (of an
1441 operand) into the correct type for a different operand, based on a bit
1442 mask.
1443 (type_chk_of_el_type): New function. Convert a type and size into the
1444 compact representation used for type checking.
1445 (el_type_of_type_ckh): New function. Reverse of above (only when a
1446 single bit is set in the bit mask).
1447 (modify_types_allowed): New function. Alter a mask of allowed types
1448 based on a bit mask of modifications.
1449 (neon_check_type): New function. Check the type of the current
1450 instruction against the variable argument list. The "key" type of the
1451 instruction is returned.
1452 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1453 a Neon data-processing instruction depending on whether we're in ARM
1454 mode or Thumb-2 mode.
1455 (neon_logbits): New function.
1456 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1457 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1458 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1459 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1460 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1461 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1462 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1463 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1464 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1465 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1466 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1467 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1468 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1469 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1470 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1471 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1472 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1473 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1474 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1475 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1476 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1477 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1478 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1479 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1480 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1481 helpers.
1482 (parse_neon_type): New function. Parse Neon type specifier.
1483 (opcode_lookup): Allow parsing of Neon type specifiers.
1484 (REGNUM2, REGSETH, REGSET2): New macros.
1485 (reg_names): Add new VFPv3 and Neon registers.
1486 (NUF, nUF, NCE, nCE): New macros for opcode table.
1487 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1488 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1489 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1490 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1491 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1492 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1493 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1494 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1495 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1496 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1497 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1498 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1499 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1500 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1501 fto[us][lh][sd].
1502 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1503 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1504 (arm_option_cpu_value): Add vfp3 and neon.
1505 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1506 VFPv1 attribute.
1507
1946c96e
BW
15082006-04-25 Bob Wilson <bob.wilson@acm.org>
1509
1510 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1511 syntax instead of hardcoded opcodes with ".w18" suffixes.
1512 (wide_branch_opcode): New.
1513 (build_transition): Use it to check for wide branch opcodes with
1514 either ".w18" or ".w15" suffixes.
1515
5033a645
BW
15162006-04-25 Bob Wilson <bob.wilson@acm.org>
1517
1518 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1519 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1520 frag's is_literal flag.
1521
395fa56f
BW
15222006-04-25 Bob Wilson <bob.wilson@acm.org>
1523
1524 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1525
708587a4
KH
15262006-04-23 Kazu Hirata <kazu@codesourcery.com>
1527
1528 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1529 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1530 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1531 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1532 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1533
8463be01
PB
15342005-04-20 Paul Brook <paul@codesourcery.com>
1535
1536 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1537 all targets.
1538 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1539
f26a5955
AM
15402006-04-19 Alan Modra <amodra@bigpond.net.au>
1541
1542 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1543 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1544 Make some cpus unsupported on ELF. Run "make dep-am".
1545 * Makefile.in: Regenerate.
1546
241a6c40
AM
15472006-04-19 Alan Modra <amodra@bigpond.net.au>
1548
1549 * configure.in (--enable-targets): Indent help message.
1550 * configure: Regenerate.
1551
bb8f5920
L
15522006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1553
1554 PR gas/2533
1555 * config/tc-i386.c (i386_immediate): Check illegal immediate
1556 register operand.
1557
23d9d9de
AM
15582006-04-18 Alan Modra <amodra@bigpond.net.au>
1559
64e74474
AM
1560 * config/tc-i386.c: Formatting.
1561 (output_disp, output_imm): ISO C90 params.
1562
6cbe03fb
AM
1563 * frags.c (frag_offset_fixed_p): Constify args.
1564 * frags.h (frag_offset_fixed_p): Ditto.
1565
23d9d9de
AM
1566 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1567 (COFF_MAGIC): Delete.
a37d486e
AM
1568
1569 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1570
e7403566
DJ
15712006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1572
1573 * po/POTFILES.in: Regenerated.
1574
58ab4f3d
MM
15752006-04-16 Mark Mitchell <mark@codesourcery.com>
1576
1577 * doc/as.texinfo: Mention that some .type syntaxes are not
1578 supported on all architectures.
1579
482fd9f9
BW
15802006-04-14 Sterling Augustine <sterling@tensilica.com>
1581
1582 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1583 instructions when such transformations have been disabled.
1584
05d58145
BW
15852006-04-10 Sterling Augustine <sterling@tensilica.com>
1586
1587 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1588 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1589 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1590 decoding the loop instructions. Remove current_offset variable.
1591 (xtensa_fix_short_loop_frags): Likewise.
1592 (min_bytes_to_other_loop_end): Remove current_offset argument.
1593
9e75b3fa
AM
15942006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1595
a37d486e 1596 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1597 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1598
d727e8c2
NC
15992006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1600
1601 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1602 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1603 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1604 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1605 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1606 at90can64, at90usb646, at90usb647, at90usb1286 and
1607 at90usb1287.
1608 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1609
d252fdde
PB
16102006-04-07 Paul Brook <paul@codesourcery.com>
1611
1612 * config/tc-arm.c (parse_operands): Set default error message.
1613
ab1eb5fe
PB
16142006-04-07 Paul Brook <paul@codesourcery.com>
1615
1616 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1617
7ae2971b
PB
16182006-04-07 Paul Brook <paul@codesourcery.com>
1619
1620 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1621
53365c0d
PB
16222006-04-07 Paul Brook <paul@codesourcery.com>
1623
1624 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1625 (move_or_literal_pool): Handle Thumb-2 instructions.
1626 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1627
45aa61fe
AM
16282006-04-07 Alan Modra <amodra@bigpond.net.au>
1629
1630 PR 2512.
1631 * config/tc-i386.c (match_template): Move 64-bit operand tests
1632 inside loop.
1633
108a6f8e
CD
16342006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1635
1636 * po/Make-in: Add install-html target.
1637 * Makefile.am: Add install-html and install-html-recursive targets.
1638 * Makefile.in: Regenerate.
1639 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1640 * configure: Regenerate.
1641 * doc/Makefile.am: Add install-html and install-html-am targets.
1642 * doc/Makefile.in: Regenerate.
1643
ec651a3b
AM
16442006-04-06 Alan Modra <amodra@bigpond.net.au>
1645
1646 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1647 second scan.
1648
910600e9
RS
16492006-04-05 Richard Sandiford <richard@codesourcery.com>
1650 Daniel Jacobowitz <dan@codesourcery.com>
1651
1652 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1653 (GOTT_BASE, GOTT_INDEX): New.
1654 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1655 GOTT_INDEX when generating VxWorks PIC.
1656 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1657 use the generic *-*-vxworks* stanza instead.
1658
99630778
AM
16592006-04-04 Alan Modra <amodra@bigpond.net.au>
1660
1661 PR 997
1662 * frags.c (frag_offset_fixed_p): New function.
1663 * frags.h (frag_offset_fixed_p): Declare.
1664 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1665 (resolve_expression): Likewise.
1666
a02728c8
BW
16672006-04-03 Sterling Augustine <sterling@tensilica.com>
1668
1669 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1670 of the same length but different numbers of slots.
1671
9dfde49d
AS
16722006-03-30 Andreas Schwab <schwab@suse.de>
1673
1674 * configure.in: Fix help string for --enable-targets option.
1675 * configure: Regenerate.
1676
2da12c60
NS
16772006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1678
6d89cc8f
NS
1679 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1680 (m68k_ip): ... here. Use for all chips. Protect against buffer
1681 overrun and avoid excessive copying.
1682
2da12c60
NS
1683 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1684 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1685 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1686 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1687 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1688 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1689 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1690 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1691 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1692 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1693 (struct m68k_cpu): Change chip field to control_regs.
1694 (current_chip): Remove.
1695 (control_regs): New.
1696 (m68k_archs, m68k_extensions): Adjust.
1697 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1698 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1699 (find_cf_chip): Reimplement for new organization of cpu table.
1700 (select_control_regs): Remove.
1701 (mri_chip): Adjust.
1702 (struct save_opts): Save control regs, not chip.
1703 (s_save, s_restore): Adjust.
1704 (m68k_lookup_cpu): Give deprecated warning when necessary.
1705 (m68k_init_arch): Adjust.
1706 (md_show_usage): Adjust for new cpu table organization.
1707
1ac4baed
BS
17082006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1709
1710 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1711 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1712 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1713 "elf/bfin.h".
1714 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1715 (any_gotrel): New rule.
1716 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1717 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1718 "elf/bfin.h".
1719 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1720 (bfin_pic_ptr): New function.
1721 (md_pseudo_table): Add it for ".picptr".
1722 (OPTION_FDPIC): New macro.
1723 (md_longopts): Add -mfdpic.
1724 (md_parse_option): Handle it.
1725 (md_begin): Set BFD flags.
1726 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1727 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1728 us for GOT relocs.
1729 * Makefile.am (bfin-parse.o): Update dependencies.
1730 (DEPTC_bfin_elf): Likewise.
1731 * Makefile.in: Regenerate.
1732
a9d34880
RS
17332006-03-25 Richard Sandiford <richard@codesourcery.com>
1734
1735 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1736 mcfemac instead of mcfmac.
1737
9ca26584
AJ
17382006-03-23 Michael Matz <matz@suse.de>
1739
1740 * config/tc-i386.c (type_names): Correct placement of 'static'.
1741 (reloc): Map some more relocs to their 64 bit counterpart when
1742 size is 8.
1743 (output_insn): Work around breakage if DEBUG386 is defined.
1744 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1745 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1746 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1747 different from i386.
1748 (output_imm): Ditto.
1749 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1750 Imm64.
1751 (md_convert_frag): Jumps can now be larger than 2GB away, error
1752 out in that case.
1753 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1754 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1755
0a44bf69
RS
17562006-03-22 Richard Sandiford <richard@codesourcery.com>
1757 Daniel Jacobowitz <dan@codesourcery.com>
1758 Phil Edwards <phil@codesourcery.com>
1759 Zack Weinberg <zack@codesourcery.com>
1760 Mark Mitchell <mark@codesourcery.com>
1761 Nathan Sidwell <nathan@codesourcery.com>
1762
1763 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1764 (md_begin): Complain about -G being used for PIC. Don't change
1765 the text, data and bss alignments on VxWorks.
1766 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1767 generating VxWorks PIC.
1768 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1769 (macro): Likewise, but do not treat la $25 specially for
1770 VxWorks PIC, and do not handle jal.
1771 (OPTION_MVXWORKS_PIC): New macro.
1772 (md_longopts): Add -mvxworks-pic.
1773 (md_parse_option): Don't complain about using PIC and -G together here.
1774 Handle OPTION_MVXWORKS_PIC.
1775 (md_estimate_size_before_relax): Always use the first relaxation
1776 sequence on VxWorks.
1777 * config/tc-mips.h (VXWORKS_PIC): New.
1778
080eb7fe
PB
17792006-03-21 Paul Brook <paul@codesourcery.com>
1780
1781 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1782
03aaa593
BW
17832006-03-21 Sterling Augustine <sterling@tensilica.com>
1784
1785 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1786 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1787 (get_loop_align_size): New.
1788 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1789 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1790 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1791 (get_noop_aligned_address): Use get_loop_align_size.
1792 (get_aligned_diff): Likewise.
1793
3e94bf1a
PB
17942006-03-21 Paul Brook <paul@codesourcery.com>
1795
1796 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1797
dfa9f0d5
PB
17982006-03-20 Paul Brook <paul@codesourcery.com>
1799
1800 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1801 (do_t_branch): Encode branches inside IT blocks as unconditional.
1802 (do_t_cps): New function.
1803 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1804 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1805 (opcode_lookup): Allow conditional suffixes on all instructions in
1806 Thumb mode.
1807 (md_assemble): Advance condexec state before checking for errors.
1808 (insns): Use do_t_cps.
1809
6e1cb1a6
PB
18102006-03-20 Paul Brook <paul@codesourcery.com>
1811
1812 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1813 outputting the insn.
1814
0a966e2d
JBG
18152006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1816
1817 * config/tc-vax.c: Update copyright year.
1818 * config/tc-vax.h: Likewise.
1819
a49fcc17
JBG
18202006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1821
1822 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1823 make it static.
1824 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1825
f5208ef2
PB
18262006-03-17 Paul Brook <paul@codesourcery.com>
1827
1828 * config/tc-arm.c (insns): Add ldm and stm.
1829
cb4c78d6
BE
18302006-03-17 Ben Elliston <bje@au.ibm.com>
1831
1832 PR gas/2446
1833 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1834
c16d2bf0
PB
18352006-03-16 Paul Brook <paul@codesourcery.com>
1836
1837 * config/tc-arm.c (insns): Add "svc".
1838
80ca4e2c
BW
18392006-03-13 Bob Wilson <bob.wilson@acm.org>
1840
1841 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1842 flag and avoid double underscore prefixes.
1843
3a4a14e9
PB
18442006-03-10 Paul Brook <paul@codesourcery.com>
1845
1846 * config/tc-arm.c (md_begin): Handle EABIv5.
1847 (arm_eabis): Add EF_ARM_EABI_VER5.
1848 * doc/c-arm.texi: Document -meabi=5.
1849
518051dc
BE
18502006-03-10 Ben Elliston <bje@au.ibm.com>
1851
1852 * app.c (do_scrub_chars): Simplify string handling.
1853
00a97672
RS
18542006-03-07 Richard Sandiford <richard@codesourcery.com>
1855 Daniel Jacobowitz <dan@codesourcery.com>
1856 Zack Weinberg <zack@codesourcery.com>
1857 Nathan Sidwell <nathan@codesourcery.com>
1858 Paul Brook <paul@codesourcery.com>
1859 Ricardo Anguiano <anguiano@codesourcery.com>
1860 Phil Edwards <phil@codesourcery.com>
1861
1862 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1863 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1864 R_ARM_ABS12 reloc.
1865 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1866 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1867 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1868
b29757dc
BW
18692006-03-06 Bob Wilson <bob.wilson@acm.org>
1870
1871 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1872 even when using the text-section-literals option.
1873
0b2e31dc
NS
18742006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1875
1876 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1877 and cf.
1878 (m68k_ip): <case 'J'> Check we have some control regs.
1879 (md_parse_option): Allow raw arch switch.
1880 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1881 whether 68881 or cfloat was meant by -mfloat.
1882 (md_show_usage): Adjust extension display.
1883 (m68k_elf_final_processing): Adjust.
1884
df406460
NC
18852006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1886
1887 * config/tc-avr.c (avr_mod_hash_value): New function.
1888 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1889 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1890 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1891 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1892 of (int).
1893 (tc_gen_reloc): Handle substractions of symbols, if possible do
1894 fixups, abort otherwise.
1895 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1896 tc_fix_adjustable): Define.
1897
53022e4a
JW
18982006-03-02 James E Wilson <wilson@specifix.com>
1899
1900 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1901 change the template, then clear md.slot[curr].end_of_insn_group.
1902
9f6f925e
JB
19032006-02-28 Jan Beulich <jbeulich@novell.com>
1904
1905 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1906
0e31b3e1
JB
19072006-02-28 Jan Beulich <jbeulich@novell.com>
1908
1909 PR/1070
1910 * macro.c (getstring): Don't treat parentheses special anymore.
1911 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1912 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1913 characters.
1914
10cd14b4
AM
19152006-02-28 Mat <mat@csail.mit.edu>
1916
1917 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1918
63752a75
JJ
19192006-02-27 Jakub Jelinek <jakub@redhat.com>
1920
1921 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1922 field.
1923 (CFI_signal_frame): Define.
1924 (cfi_pseudo_table): Add .cfi_signal_frame.
1925 (dot_cfi): Handle CFI_signal_frame.
1926 (output_cie): Handle cie->signal_frame.
1927 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1928 different. Copy signal_frame from FDE to newly created CIE.
1929 * doc/as.texinfo: Document .cfi_signal_frame.
1930
f7d9e5c3
CD
19312006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1932
1933 * doc/Makefile.am: Add html target.
1934 * doc/Makefile.in: Regenerate.
1935 * po/Make-in: Add html target.
1936
331d2d0d
L
19372006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1938
8502d882 1939 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
1940 Instructions.
1941
8502d882 1942 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
1943 (CpuUnknownFlags): Add CpuMNI.
1944
10156f83
DM
19452006-02-24 David S. Miller <davem@sunset.davemloft.net>
1946
1947 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1948 (hpriv_reg_table): New table for hyperprivileged registers.
1949 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1950 register encoding.
1951
6772dd07
DD
19522006-02-24 DJ Delorie <dj@redhat.com>
1953
1954 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1955 (tc_gen_reloc): Don't define.
1956 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1957 (OPTION_LINKRELAX): New.
1958 (md_longopts): Add it.
1959 (m32c_relax): New.
1960 (md_parse_options): Set it.
1961 (md_assemble): Emit relaxation relocs as needed.
1962 (md_convert_frag): Emit relaxation relocs as needed.
1963 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1964 (m32c_apply_fix): New.
1965 (tc_gen_reloc): New.
1966 (m32c_force_relocation): Force out jump relocs when relaxing.
1967 (m32c_fix_adjustable): Return false if relaxing.
1968
62b3e311
PB
19692006-02-24 Paul Brook <paul@codesourcery.com>
1970
1971 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1972 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1973 (struct asm_barrier_opt): Define.
1974 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1975 (parse_psr): Accept V7M psr names.
1976 (parse_barrier): New function.
1977 (enum operand_parse_code): Add OP_oBARRIER.
1978 (parse_operands): Implement OP_oBARRIER.
1979 (do_barrier): New function.
1980 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1981 (do_t_cpsi): Add V7M restrictions.
1982 (do_t_mrs, do_t_msr): Validate V7M variants.
1983 (md_assemble): Check for NULL variants.
1984 (v7m_psrs, barrier_opt_names): New tables.
1985 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1986 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1987 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1988 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1989 (struct cpu_arch_ver_table): Define.
1990 (cpu_arch_ver): New.
1991 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1992 Tag_CPU_arch_profile.
1993 * doc/c-arm.texi: Document new cpu and arch options.
1994
59cf82fe
L
19952006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1996
1997 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1998
19a7219f
L
19992006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2000
2001 * config/tc-ia64.c: Update copyright years.
2002
7f3dfb9c
L
20032006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2004
2005 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2006 SDM 2.2.
2007
f40d1643
PB
20082005-02-22 Paul Brook <paul@codesourcery.com>
2009
2010 * config/tc-arm.c (do_pld): Remove incorrect write to
2011 inst.instruction.
2012 (encode_thumb32_addr_mode): Use correct operand.
2013
216d22bc
PB
20142006-02-21 Paul Brook <paul@codesourcery.com>
2015
2016 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2017
d70c5fc7
NC
20182006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2019 Anil Paranjape <anilp1@kpitcummins.com>
2020 Shilin Shakti <shilins@kpitcummins.com>
2021
2022 * Makefile.am: Add xc16x related entry.
2023 * Makefile.in: Regenerate.
2024 * configure.in: Added xc16x related entry.
2025 * configure: Regenerate.
2026 * config/tc-xc16x.h: New file
2027 * config/tc-xc16x.c: New file
2028 * doc/c-xc16x.texi: New file for xc16x
2029 * doc/all.texi: Entry for xc16x
2030 * doc/Makefile.texi: Added c-xc16x.texi
2031 * NEWS: Announce the support for the new target.
2032
aaa2ab3d
NH
20332006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2034
2035 * configure.tgt: set emulation for mips-*-netbsd*
2036
82de001f
JJ
20372006-02-14 Jakub Jelinek <jakub@redhat.com>
2038
2039 * config.in: Rebuilt.
2040
431ad2d0
BW
20412006-02-13 Bob Wilson <bob.wilson@acm.org>
2042
2043 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2044 from 1, not 0, in error messages.
2045 (md_assemble): Simplify special-case check for ENTRY instructions.
2046 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2047 operand in error message.
2048
94089a50
JM
20492006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2050
2051 * configure.tgt (arm-*-linux-gnueabi*): Change to
2052 arm-*-linux-*eabi*.
2053
52de4c06
NC
20542006-02-10 Nick Clifton <nickc@redhat.com>
2055
70e45ad9
NC
2056 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2057 32-bit value is propagated into the upper bits of a 64-bit long.
2058
52de4c06
NC
2059 * config/tc-arc.c (init_opcode_tables): Fix cast.
2060 (arc_extoper, md_operand): Likewise.
2061
21af2bbd
BW
20622006-02-09 David Heine <dlheine@tensilica.com>
2063
2064 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2065 each relaxation step.
2066
75a706fc
L
20672006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2068
2069 * configure.in (CHECK_DECLS): Add vsnprintf.
2070 * configure: Regenerate.
2071 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2072 include/declare here, but...
2073 * as.h: Move code detecting VARARGS idiom to the top.
2074 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2075 (vsnprintf): Declare if not already declared.
2076
0d474464
L
20772006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2078
2079 * as.c (close_output_file): New.
2080 (main): Register close_output_file with xatexit before
2081 dump_statistics. Don't call output_file_close.
2082
266abb8f
NS
20832006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2084
2085 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2086 mcf5329_control_regs): New.
2087 (not_current_architecture, selected_arch, selected_cpu): New.
2088 (m68k_archs, m68k_extensions): New.
2089 (archs): Renamed to ...
2090 (m68k_cpus): ... here. Adjust.
2091 (n_arches): Remove.
2092 (md_pseudo_table): Add arch and cpu directives.
2093 (find_cf_chip, m68k_ip): Adjust table scanning.
2094 (no_68851, no_68881): Remove.
2095 (md_assemble): Lazily initialize.
2096 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2097 (md_init_after_args): Move functionality to m68k_init_arch.
2098 (mri_chip): Adjust table scanning.
2099 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2100 options with saner parsing.
2101 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2102 m68k_init_arch): New.
2103 (s_m68k_cpu, s_m68k_arch): New.
2104 (md_show_usage): Adjust.
2105 (m68k_elf_final_processing): Set CF EF flags.
2106 * config/tc-m68k.h (m68k_init_after_args): Remove.
2107 (tc_init_after_args): Remove.
2108 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2109 (M68k-Directives): Document .arch and .cpu directives.
2110
134dcee5
AM
21112006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2112
2113 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2114 synonyms for equ and defl.
2115 (z80_cons_fix_new): New function.
2116 (emit_byte): Disallow relative jumps to absolute locations.
2117 (emit_data): Only handle defb, prototype changed, because defb is
2118 now handled as pseudo-op rather than an instruction.
2119 (instab): Entries for defb,defw,db,dw moved from here...
2120 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2121 Add entries for def24,def32,d24,d32.
2122 (md_assemble): Improved error handling.
2123 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2124 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2125 (z80_cons_fix_new): Declare.
2126 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2127 (def24,d24,def32,d32): New pseudo-ops.
2128
a9931606
PB
21292006-02-02 Paul Brook <paul@codesourcery.com>
2130
2131 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2132
ef8d22e6
PB
21332005-02-02 Paul Brook <paul@codesourcery.com>
2134
2135 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2136 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2137 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2138 T2_OPCODE_RSB): Define.
2139 (thumb32_negate_data_op): New function.
2140 (md_apply_fix): Use it.
2141
e7da6241
BW
21422006-01-31 Bob Wilson <bob.wilson@acm.org>
2143
2144 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2145 fields.
2146 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2147 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2148 subtracted symbols.
2149 (relaxation_requirements): Add pfinish_frag argument and use it to
2150 replace setting tinsn->record_fix fields.
2151 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2152 and vinsn_to_insnbuf. Remove references to record_fix and
2153 slot_sub_symbols fields.
2154 (xtensa_mark_narrow_branches): Delete unused code.
2155 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2156 a symbol.
2157 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2158 record_fix fields.
2159 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2160 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2161 of the record_fix field. Simplify error messages for unexpected
2162 symbolic operands.
2163 (set_expr_symbol_offset_diff): Delete.
2164
79134647
PB
21652006-01-31 Paul Brook <paul@codesourcery.com>
2166
2167 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2168
e74cfd16
PB
21692006-01-31 Paul Brook <paul@codesourcery.com>
2170 Richard Earnshaw <rearnsha@arm.com>
2171
2172 * config/tc-arm.c: Use arm_feature_set.
2173 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2174 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2175 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2176 New variables.
2177 (insns): Use them.
2178 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2179 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2180 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2181 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2182 feature flags.
2183 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2184 (arm_opts): Move old cpu/arch options from here...
2185 (arm_legacy_opts): ... to here.
2186 (md_parse_option): Search arm_legacy_opts.
2187 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2188 (arm_float_abis, arm_eabis): Make const.
2189
d47d412e
BW
21902006-01-25 Bob Wilson <bob.wilson@acm.org>
2191
2192 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2193
b14273fe
JZ
21942006-01-21 Jie Zhang <jie.zhang@analog.com>
2195
2196 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2197 in load immediate intruction.
2198
39cd1c76
JZ
21992006-01-21 Jie Zhang <jie.zhang@analog.com>
2200
2201 * config/bfin-parse.y (value_match): Use correct conversion
2202 specifications in template string for __FILE__ and __LINE__.
2203 (binary): Ditto.
2204 (unary): Ditto.
2205
67a4f2b7
AO
22062006-01-18 Alexandre Oliva <aoliva@redhat.com>
2207
2208 Introduce TLS descriptors for i386 and x86_64.
2209 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2210 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2211 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2212 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2213 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2214 displacement bits.
2215 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2216 (lex_got): Handle @tlsdesc and @tlscall.
2217 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2218
8ad7c533
NC
22192006-01-11 Nick Clifton <nickc@redhat.com>
2220
2221 Fixes for building on 64-bit hosts:
2222 * config/tc-avr.c (mod_index): New union to allow conversion
2223 between pointers and integers.
2224 (md_begin, avr_ldi_expression): Use it.
2225 * config/tc-i370.c (md_assemble): Add cast for argument to print
2226 statement.
2227 * config/tc-tic54x.c (subsym_substitute): Likewise.
2228 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2229 opindex field of fr_cgen structure into a pointer so that it can
2230 be stored in a frag.
2231 * config/tc-mn10300.c (md_assemble): Likewise.
2232 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2233 types.
2234 * config/tc-v850.c: Replace uses of (int) casts with correct
2235 types.
2236
4dcb3903
L
22372006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2238
2239 PR gas/2117
2240 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2241
e0f6ea40
HPN
22422006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2243
2244 PR gas/2101
2245 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2246 a local-label reference.
2247
e88d958a 2248For older changes see ChangeLog-2005
08d56133
NC
2249\f
2250Local Variables:
2251mode: change-log
2252left-margin: 8
2253fill-column: 74
2254version-control: never
2255End:
This page took 0.35865 seconds and 4 git commands to generate.