Rename "read_reg" into "read_addr_from_reg" in struct dwarf_expr_context_funcs
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
75468c93
YZ
12013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
2
3 * config/tc-aarch64.c (set_other_error): New function.
4 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
5 the variable to which it points with 'o'.
6 (parse_operands): Update; check for write to read-only system
7 registers or read from write-only ones.
8
9
ad8ecc81
MZ
102013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
11
12 * config/tc-i386.c (check_VecOperands): Reorder checks.
13
b83a9376
CM
142013-11-11 Catherine Moore <clm@codesourcery.com>
15
16 * config/mips/tc-mips.c (convert_reg_type): Use
17 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
18 (reg_needs_delay): Likewise.
19 (insns_between): Likewise.
20
e2b5892e
JBG
212013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
22
23 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
24
49eec193
YZ
252013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
26
27 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
28 call aarch64_sys_reg_deprecated_p and warn about the deprecated
29 system registers.
30
68a64283
YZ
312013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
32
33 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
34
8db49cc2
WN
352013-11-05 Will Newton <will.newton@linaro.org>
36
37 PR gas/16103
38 * config/tc-aarch64.c (parse_operands): Avoid trying to
39 parse a vector register as an immediate.
40
e4630f71
JB
412013-11-04 Jan Beulich <jbeulich@suse.com>
42
43 * config/tc-i386.c (check_long_reg): Correct comment indentation.
44 (check_qword_reg): Correct comment and its indentation.
45 (check_word_reg): Extend comment and correct its indentation. Also
46 check for 64-bit register.
47
6911b7dc
AM
482013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
49
50 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
51 (ppc_elf_localentry): New function.
52 (ppc_force_relocation): Force relocs on all branches to localenty
53 symbols.
54 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
55
ee67d69a
AM
562013-10-30 Alan Modra <amodra@gmail.com>
57
58 * config/tc-ppc.c: Include elf/ppc64.h.
59 (ppc_abiversion): New variable.
60 (md_pseudo_table): Add .abiversion.
61 (ppc_elf_abiversion, ppc_elf_end): New functions.
62 * config/tc-ppc.h (md_end): Define.
63
f9c6b907
AM
642013-10-30 Alan Modra <amodra@gmail.com>
65
66 * config/tc-ppc.c (SEX16): Don't mask.
67 (REPORT_OVERFLOW_HI): Define as zero.
68 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
69 @tprel@high, and @tprel@higha modifiers.
70 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
71 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
72 Handle new relocs.
73 (md_apply_fix): Similarly.
74
9d5de888
CF
752013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
76
77 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
78 (fpr_write_mask): Test MSA registers.
79 (can_swap_branch_p): Check fpr write followed by fpr read.
80
3fc1d038
NC
812013-10-18 Nick Clifton <nickc@redhat.com>
82
83 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
84
56d438b1
CF
852013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
86 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
87
88 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
89 (md_longopts): Add mmsa and mno-msa.
90 (mips_ases): Add msa.
91 (RTYPE_MASK): Update.
92 (RTYPE_MSA): New define.
93 (OT_REG_ELEMENT): Replace with...
94 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
95 (mips_operand_token): Replace reg_element with index.
96 (mips_parse_argument_token): Treat vector indices as separate tokens.
97 Handle register indices.
98 (md_begin): Add MSA register names.
99 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
100 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
101 (match_mdmx_imm_reg_operand): Update accordingly.
102 (match_imm_index_operand): New function.
103 (match_reg_index_operand): New function.
104 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
105 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
106 (md_show_usage): Print -mmsa and -mno-msa.
107 * doc/as.texinfo: Document -mmsa and -mno-msa.
108 * doc/c-mips.texi: Document -mmsa and -mno-msa.
109 Document .set msa and .set nomsa.
110
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NC
1112013-10-14 Nick Clifton <nickc@redhat.com>
112
113 * read.c (add_include_dir): Use xrealloc.
114 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
115 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
116
ae335a4e
SL
1172013-10-13 Sandra Loosemore <sandra@codesourcery.com>
118
119 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
120 also test/refer to "sstatus". Reformat the warning message.
121
0e1c2434
SK
1222013-10-10 Sean Keys <skeys@ipdatasys.com>
123
124 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
125
47cd3fa7
JB
1262013-10-10 Jan Beulich <jbeulich@suse.com>
127
128 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
129 swapping for bndmk, bndldx, and bndstx.
130
6085f853
NC
1312013-10-09 Nick Clifton <nickc@redhat.com>
132
b7b2bb1d
NC
133 PR gas/16025
134 * config/tc-epiphany.c (md_convert_frag): Add missing break
135 statement.
136
6085f853
NC
137 PR gas/16026
138 * config/tc-mn10200.c (md_convert_frag): Add missing break
139 statement.
140
cecf1424
JB
1412013-10-08 Jan Beulich <jbeulich@suse.com>
142
143 * tc-i386.c (check_word_reg): Remove misplaced "else".
144 (check_long_reg): Restore symmetry with check_word_reg.
145
d3bfe16e
JB
1462013-10-08 Jan Beulich <jbeulich@suse.com>
147
148 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
149 LR/PC check.
150
38d77545
NC
1512013-10-08 Nick Clifton <nickc@redhat.com>
152
153 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
154 for "<foo>a". Issue error messages for unrecognised or corrrupt
155 size extensions.
156
fe8b4cc3
KT
1572013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
158
159 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
160 possible.
161
c7b0bd56
SE
1622013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
163
164 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
165 * doc/c-i386.texi: Add -march=bdver4 option.
166
cc9afea3
AM
1672013-09-20 Alan Modra <amodra@gmail.com>
168
169 * configure: Regenerate.
170
58ca03a2
TG
1712013-09-18 Tristan Gingold <gingold@adacore.com>
172
173 * NEWS: Add marker for 2.24.
174
ab905915
NC
1752013-09-18 Nick Clifton <nickc@redhat.com>
176
177 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
178 (move_data): New variable.
179 (md_parse_option): Parse -md.
180 (msp430_section): New function. Catch references to the .bss or
181 .data sections and generate a special symbol for use by the libcrt
182 library.
183 (md_pseudo_table): Intercept .section directives.
184 (md_longopt): Add -md
185 (md_show_usage): Likewise.
186 (msp430_operands): Generate a warning message if a NOP is inserted
187 into the instruction stream.
188 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
189
f1c38003
SE
1902013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
191
192 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 193 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 194
1d50d57c
WN
1952013-09-16 Will Newton <will.newton@linaro.org>
196
197 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
198 disallowing element size 64 with interleave other than 1.
199
173d3447
CF
2002013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
201
202 * config/tc-mips.c (match_insn): Set error when $31 is used for
203 bltzal* and bgezal*.
204
ac21e7da
TG
2052013-09-04 Tristan Gingold <gingold@adacore.com>
206
207 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
208 symbols.
209
74db7efb
NC
2102013-09-04 Roland McGrath <mcgrathr@google.com>
211
212 PR gas/15914
213 * config/tc-arm.c (T16_32_TAB): Add _udf.
214 (do_t_udf): New function.
215 (insns): Add "udf".
216
664a88c6
DD
2172013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
218
219 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
220 assembler errors at correct position.
221
9aff4b7a
NC
2222013-08-23 Yuri Chornoivan <yurchor@ukr.net>
223
224 PR binutils/15834
225 * config/tc-ia64.c: Fix typos.
226 * config/tc-sparc.c: Likewise.
227 * config/tc-z80.c: Likewise.
228 * doc/c-i386.texi: Likewise.
229 * doc/c-m32r.texi: Likewise.
230
4f2374c7
WN
2312013-08-23 Will Newton <will.newton@linaro.org>
232
9aff4b7a 233 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN
234 for pre-indexed addressing modes.
235
b4e6cb80
AM
2362013-08-21 Alan Modra <amodra@gmail.com>
237
238 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
239 range check label number for use with fb_low_counter array.
240
1661c76c
RS
2412013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
242
243 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
244 (mips_parse_argument_token, validate_micromips_insn, md_begin)
245 (check_regno, match_float_constant, check_completed_insn, append_insn)
246 (match_insn, match_mips16_insn, match_insns, macro_start)
247 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
248 (mips16_ip, mips_set_option_string, md_parse_option)
249 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
250 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
251 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
252 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
253 Start error messages with a lower-case letter. Do not end error
254 messages with a period. Wrap long messages to 80 character-lines.
255 Use "cannot" instead of "can't" and "can not".
256
b0e6f033
RS
2572013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
258
259 * config/tc-mips.c (imm_expr): Expand comment.
260 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
261 when populated.
262
e423441d
RS
2632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
264
265 * config/tc-mips.c (imm2_expr): Delete.
266 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
267
5e0dc5ba
RS
2682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
271 (macro): Remove M_DEXT and M_DINS handling.
272
60f20e8b
RS
2732013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
276 lax_max with lax_match.
277 (match_int_operand): Update accordingly. Don't report an error
278 for !lax_match-only cases.
279 (match_insn): Replace more_alts with lax_match and use it to
280 initialize the mips_arg_info field. Add a complete_p parameter.
281 Handle implicit VU0 suffixes here.
282 (match_invalid_for_isa, match_insns, match_mips16_insns): New
283 functions.
284 (mips_ip, mips16_ip): Use them.
285
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RS
2862013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
287
288 * config/tc-mips.c (match_expression): Report uses of registers here.
289 Add a "must be an immediate expression" error. Handle elided offsets
290 here rather than...
291 (match_int_operand): ...here.
292
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RS
2932013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
294
295 * config/tc-mips.c (mips_arg_info): Remove soft_match.
296 (match_out_of_range, match_not_constant): New functions.
297 (match_const_int): Remove fallback parameter and check for soft_match.
298 Use match_not_constant.
299 (match_mapped_int_operand, match_addiusp_operand)
300 (match_perf_reg_operand, match_save_restore_list_operand)
301 (match_mdmx_imm_reg_operand): Update accordingly. Use
302 match_out_of_range and set_insn_error* instead of as_bad.
303 (match_int_operand): Likewise. Use match_not_constant in the
304 !allows_nonconst case.
305 (match_float_constant): Report invalid float constants.
306 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
307 match_float_constant to check for invalid constants. Fail the
308 match if match_const_int or match_float_constant return false.
309 (mips_ip): Update accordingly.
310 (mips16_ip): Likewise. Undo null termination of instruction name
311 once lookup is complete.
312
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RS
3132013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
314
315 * config/tc-mips.c (mips_insn_error_format): New enum.
316 (mips_insn_error): New struct.
317 (insn_error): Change to a mips_insn_error.
318 (clear_insn_error, set_insn_error_format, set_insn_error)
319 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
320 functions.
321 (mips_parse_argument_token, md_assemble, match_insn)
322 (match_mips16_insn): Use them instead of manipulating insn_error
323 directly.
324 (mips_ip, mips16_ip): Likewise. Simplify control flow.
325
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RS
3262013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
327
328 * config/tc-mips.c (normalize_constant_expr): Move further up file.
329 (normalize_address_expr): Likewise.
330 (match_insn, match_mips16_insn): New functions, split out from...
331 (mips_ip, mips16_ip): ...here.
332
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RS
3332013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
334
335 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
336 OP_OPTIONAL_REG.
337 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
338 for optional operands.
339
27285eed
AM
3402013-08-16 Alan Modra <amodra@gmail.com>
341
342 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
343 modifiers generally.
344
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AM
3452013-08-16 Alan Modra <amodra@gmail.com>
346
347 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
348
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DE
3492013-08-14 David Edelsohn <dje.gcc@gmail.com>
350
351 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
352 argument as alignment.
353
4046d87a
NC
3542013-08-09 Nick Clifton <nickc@redhat.com>
355
356 * config/tc-rl78.c (elf_flags): New variable.
357 (enum options): Add OPTION_G10.
358 (md_longopts): Add mg10.
359 (md_parse_option): Parse -mg10.
360 (rl78_elf_final_processing): New function.
361 * config/tc-rl78.c (tc_final_processing): Define.
362 * doc/c-rl78.texi: Document -mg10 option.
363
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RS
3642013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
365
366 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
367 suffixes to be elided too.
368 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
369 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
370 to be omitted too.
371
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RS
3722013-08-05 John Tytgat <john@bass-software.com>
373
374 * po/POTFILES.in: Regenerate.
375
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EB
3762013-08-05 Eric Botcazou <ebotcazou@adacore.com>
377 Konrad Eisele <konrad@gaisler.com>
378
379 * config/tc-sparc.c (sparc_arch_types): Add leon.
380 (sparc_arch): Move sparc4 around and add leon.
381 (sparc_target_format): Document -Aleon.
382 * doc/c-sparc.texi: Likewise.
383
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RS
3842013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
385
386 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
387
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RS
3882013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
389 Richard Sandiford <rdsandiford@googlemail.com>
390
391 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
392 (RWARN): Bump to 0x8000000.
393 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
394 (RTYPE_R5900_ACC): New register types.
395 (RTYPE_MASK): Include them.
396 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
397 macros.
398 (reg_names): Include them.
399 (mips_parse_register_1): New function, split out from...
400 (mips_parse_register): ...here. Add a channels_ptr parameter.
401 Look for VU0 channel suffixes when nonnull.
402 (reg_lookup): Update the call to mips_parse_register.
403 (mips_parse_vu0_channels): New function.
404 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
405 (mips_operand_token): Add a "channels" field to the union.
406 Extend the comment above "ch" to OT_DOUBLE_CHAR.
407 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
408 (mips_parse_argument_token): Handle channel suffixes here too.
409 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
410 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
411 Handle '#' formats.
412 (md_begin): Register $vfN and $vfI registers.
413 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
414 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
415 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
416 (match_vu0_suffix_operand): New function.
417 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
418 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
419 (mips_lookup_insn): New function.
420 (mips_ip): Use it. Allow "+K" operands to be elided at the end
421 of an instruction. Handle '#' sequences.
422
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4232013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
424
425 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
426 values and use it instead of sreg, treg, xreg, etc.
427
3ccad066
RS
4282013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
429
430 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
431 and mips_int_operand_max.
432 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
433 Delete.
434 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
435 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
436 instead of mips16_immed_operand.
437
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4382013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
439
440 * config/tc-mips.c (mips16_macro): Don't use move_register.
441 (mips16_ip): Allow macros to use 'p'.
442
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4432013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
444
445 * config/tc-mips.c (MAX_OPERANDS): New macro.
446 (mips_operand_array): New structure.
447 (mips_operands, mips16_operands, micromips_operands): New arrays.
448 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
449 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
450 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
451 (micromips_to_32_reg_q_map): Delete.
452 (insn_operands, insn_opno, insn_extract_operand): New functions.
453 (validate_mips_insn): Take a mips_operand_array as argument and
454 use it to build up a list of operands. Extend to handle INSN_MACRO
455 and MIPS16.
456 (validate_mips16_insn): New function.
457 (validate_micromips_insn): Take a mips_operand_array as argument.
458 Handle INSN_MACRO.
459 (md_begin): Initialize mips_operands, mips16_operands and
460 micromips_operands. Call validate_mips_insn and
461 validate_micromips_insn for macro instructions too.
462 Call validate_mips16_insn for MIPS16 instructions.
463 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
464 New functions.
465 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
466 them. Handle INSN_UDI.
467 (get_append_method): Use gpr_read_mask.
468
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4692013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
472 flags for MIPS16 and non-MIPS16 instructions.
473 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
474 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
475 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
476 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
477 and non-MIPS16 instructions. Fix formatting.
478
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4792013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
480
481 * config/tc-mips.c (reg_needs_delay): Move later in file.
482 Use gpr_write_mask.
483 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
484
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4852013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
486 Alexander Ivchenko <alexander.ivchenko@intel.com>
487 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
488 Sergey Lega <sergey.s.lega@intel.com>
489 Anna Tikhonova <anna.tikhonova@intel.com>
490 Ilya Tocar <ilya.tocar@intel.com>
491 Andrey Turetskiy <andrey.turetskiy@intel.com>
492 Ilya Verbin <ilya.verbin@intel.com>
493 Kirill Yukhin <kirill.yukhin@intel.com>
494 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
495
496 * config/tc-i386-intel.c (O_zmmword_ptr): New.
497 (i386_types): Add zmmword.
498 (i386_intel_simplify_register): Allow regzmm.
499 (i386_intel_simplify): Handle zmmwords.
500 (i386_intel_operand): Handle RC/SAE, vector operations and
501 zmmwords.
502 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
503 (struct RC_Operation): New.
504 (struct Mask_Operation): New.
505 (struct Broadcast_Operation): New.
506 (vex_prefix): Size of bytes increased to 4 to support EVEX
507 encoding.
508 (enum i386_error): Add new error codes: unsupported_broadcast,
509 broadcast_not_on_src_operand, broadcast_needed,
510 unsupported_masking, mask_not_on_destination, no_default_mask,
511 unsupported_rc_sae, rc_sae_operand_not_last_imm,
512 invalid_register_operand, try_vector_disp8.
513 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
514 rounding, broadcast, memshift.
515 (struct RC_name): New.
516 (RC_NamesTable): New.
517 (evexlig): New.
518 (evexwig): New.
519 (extra_symbol_chars): Add '{'.
520 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
521 (i386_operand_type): Add regzmm, regmask and vec_disp8.
522 (match_mem_size): Handle zmmwords.
523 (operand_type_match): Handle zmm-registers.
524 (mode_from_disp_size): Handle vec_disp8.
525 (fits_in_vec_disp8): New.
526 (md_begin): Handle {} properly.
527 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
528 (build_vex_prefix): Handle vrex.
529 (build_evex_prefix): New.
530 (process_immext): Adjust to properly handle EVEX.
531 (md_assemble): Add EVEX encoding support.
532 (swap_2_operands): Correctly handle operands with masking,
533 broadcasting or RC/SAE.
534 (check_VecOperands): Support EVEX features.
535 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
536 (match_template): Support regzmm and handle new error codes.
537 (process_suffix): Handle zmmwords and zmm-registers.
538 (check_byte_reg): Extend to zmm-registers.
539 (process_operands): Extend to zmm-registers.
540 (build_modrm_byte): Handle EVEX.
541 (output_insn): Adjust to properly handle EVEX case.
542 (disp_size): Handle vec_disp8.
543 (output_disp): Support compressed disp8*N evex feature.
544 (output_imm): Handle RC/SAE immediates properly.
545 (check_VecOperations): New.
546 (i386_immediate): Handle EVEX features.
547 (i386_index_check): Handle zmmwords and zmm-registers.
548 (RC_SAE_immediate): New.
549 (i386_att_operand): Handle EVEX features.
550 (parse_real_register): Add a check for ZMM/Mask registers.
551 (OPTION_MEVEXLIG): New.
552 (OPTION_MEVEXWIG): New.
553 (md_longopts): Add mevexlig and mevexwig.
554 (md_parse_option): Handle mevexlig and mevexwig options.
555 (md_show_usage): Add description for mevexlig and mevexwig.
556 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
557 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
558
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5592013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
560
561 * config/tc-i386.c (cpu_arch): Add .sha.
562 * doc/c-i386.texi: Document sha/.sha.
563
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5642013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
565 Kirill Yukhin <kirill.yukhin@intel.com>
566 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
567
568 * config/tc-i386.c (BND_PREFIX): New.
569 (struct _i386_insn): Add new field bnd_prefix.
570 (add_bnd_prefix): New.
571 (cpu_arch): Add MPX.
572 (i386_operand_type): Add regbnd.
573 (md_assemble): Handle BND prefixes.
574 (parse_insn): Likewise.
575 (output_branch): Likewise.
576 (output_jump): Likewise.
577 (build_modrm_byte): Handle regbnd.
578 (OPTION_MADD_BND_PREFIX): New.
579 (md_longopts): Add entry for 'madd-bnd-prefix'.
580 (md_parse_option): Handle madd-bnd-prefix option.
581 (md_show_usage): Add description for madd-bnd-prefix
582 option.
583 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
584
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5852013-07-24 Tristan Gingold <gingold@adacore.com>
586
587 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
588 xcoff targets.
589
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5902013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
591
592 * config/tc-s390.c (s390_machine): Don't force the .machine
593 argument to lower case.
594
e673710a
KT
5952013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
596
597 * config/tc-arm.c (s_arm_arch_extension): Improve error message
598 for invalid extension.
599
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6002013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
601
602 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
603 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
604 (aarch64_abi): New variable.
605 (ilp32_p): Change to be a macro.
606 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
607 (struct aarch64_option_abi_value_table): New struct.
608 (aarch64_abis): New table.
609 (aarch64_parse_abi): New function.
610 (aarch64_long_opts): Add entry for -mabi=.
611 * doc/as.texinfo (Target AArch64 options): Document -mabi.
612 * doc/c-aarch64.texi: Likewise.
613
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NC
6142013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
615
616 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
617 unsigned comparison.
618
f0c00282
NC
6192013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
620
cbe02d4f 621 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 622 RX610.
cbe02d4f 623 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC
624 check floating point operation support for target RX100 and
625 RX200.
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AM
626 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
627 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
628 RX200, RX600, and RX610
f0c00282 629
8c997c27
NC
6302013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
631
632 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
633
8be59acb
NC
6342013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
635
636 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
637 * doc/c-avr.texi: Likewise.
638
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6392013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
640
641 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
642 error with older GCCs.
643 (mips16_macro_build): Dereference args.
644
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RS
6452013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
646
647 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
648 New functions, split out from...
649 (reg_lookup): ...here. Remove itbl support.
650 (reglist_lookup): Delete.
651 (mips_operand_token_type): New enum.
652 (mips_operand_token): New structure.
653 (mips_operand_tokens): New variable.
654 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
655 (mips_parse_arguments): New functions.
656 (md_begin): Initialize mips_operand_tokens.
657 (mips_arg_info): Add a token field. Remove optional_reg field.
658 (match_char, match_expression): New functions.
659 (match_const_int): Use match_expression. Remove "s" argument
660 and return a boolean result. Remove O_register handling.
661 (match_regno, match_reg, match_reg_range): New functions.
662 (match_int_operand, match_mapped_int_operand, match_msb_operand)
663 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
664 (match_addiusp_operand, match_clo_clz_dest_operand)
665 (match_lwm_swm_list_operand, match_entry_exit_operand)
666 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
667 (match_tied_reg_operand): Remove "s" argument and return a boolean
668 result. Match tokens rather than text. Update calls to
669 match_const_int. Rely on match_regno to call check_regno.
670 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
671 "arg" argument. Return a boolean result.
672 (parse_float_constant): Replace with...
673 (match_float_constant): ...this new function.
674 (match_operand): Remove "s" argument and return a boolean result.
675 Update calls to subfunctions.
676 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
677 rather than string-parsing routines. Update handling of optional
678 registers for token scheme.
679
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6802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
681
682 * config/tc-mips.c (parse_float_constant): Split out from...
683 (mips_ip): ...here.
684
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6852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
686
687 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
688 Delete.
689
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6902013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
691
692 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
693 (match_entry_exit_operand): New function.
694 (match_save_restore_list_operand): Likewise.
695 (match_operand): Use them.
696 (check_absolute_expr): Delete.
697 (mips16_ip): Rewrite main parsing loop to use mips_operands.
698
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6992013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
700
701 * config/tc-mips.c: Enable functions commented out in previous patch.
702 (SKIP_SPACE_TABS): Move further up file.
703 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
704 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
705 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
706 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
707 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
708 (micromips_imm_b_map, micromips_imm_c_map): Delete.
709 (mips_lookup_reg_pair): Delete.
710 (macro): Use report_bad_range and report_bad_field.
711 (mips_immed, expr_const_in_range): Delete.
712 (mips_ip): Rewrite main parsing loop to use new functions.
713
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7142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
715
716 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
717 Change return type to bfd_boolean.
718 (report_bad_range, report_bad_field): New functions.
719 (mips_arg_info): New structure.
720 (match_const_int, convert_reg_type, check_regno, match_int_operand)
721 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
722 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
723 (match_addiusp_operand, match_clo_clz_dest_operand)
724 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
725 (match_pc_operand, match_tied_reg_operand, match_operand)
726 (check_completed_insn): New functions, commented out for now.
727
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7282013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
729
730 * config/tc-mips.c (insn_insert_operand): New function.
731 (macro_build, mips16_macro_build): Put null character check
732 in the for loop and convert continues to breaks. Use operand
733 structures to handle constant operands.
734
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7352013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
736
737 * config/tc-mips.c (validate_mips_insn): Move further up file.
738 Add insn_bits and decode_operand arguments. Use the mips_operand
739 fields to work out which bits an operand occupies. Detect double
740 definitions.
741 (validate_micromips_insn): Move further up file. Call into
742 validate_mips_insn.
743
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7442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
747
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7482013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
749
750 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
751 and "~".
752 (macro): Update accordingly.
753
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7542013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
755
756 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
757 (imm_reloc): Delete.
758 (md_assemble): Remove imm_reloc handling.
759 (mips_ip): Update commentary. Use offset_expr and offset_reloc
760 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
761 Use a temporary array rather than imm_reloc when parsing
762 constant expressions. Remove imm_reloc initialization.
763 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
764 for the relaxable field. Use a relax_char variable to track the
765 type of this field. Remove imm_reloc initialization.
766
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7672013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
768
769 * config/tc-mips.c (mips16_ip): Handle "I".
770
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7712013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
772
773 * config/tc-mips.c (mips_flag_nan2008): New variable.
774 (options): Add OPTION_NAN enum value.
775 (md_longopts): Handle it.
776 (md_parse_option): Likewise.
777 (s_nan): New function.
778 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
779 (md_show_usage): Add -mnan.
780
781 * doc/as.texinfo (Overview): Add -mnan.
782 * doc/c-mips.texi (MIPS Opts): Document -mnan.
783 (MIPS NaN Encodings): New node. Document .nan directive.
784 (MIPS-Dependent): List the new node.
785
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7862013-07-09 Tristan Gingold <gingold@adacore.com>
787
788 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
789
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RS
7902013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
791
792 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
793 for 'A' and assume that the constant has been elided if the result
794 is an O_register.
795
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7962013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
797
798 * config/tc-mips.c (gprel16_reloc_p): New function.
799 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
800 BFD_RELOC_UNUSED.
801 (offset_high_part, small_offset_p): New functions.
802 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
803 register load and store macros, handle the 16-bit offset case first.
804 If a 16-bit offset is not suitable for the instruction we're
805 generating, load it into the temporary register using
806 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
807 M_L_DAB code once the address has been constructed. For double load
808 and store macros, again handle the 16-bit offset case first.
809 If the second register cannot be accessed from the same high
810 part as the first, load it into AT using ADDRESS_ADDI_INSN.
811 Fix the handling of LD in cases where the first register is the
812 same as the base. Also handle the case where the offset is
813 not 16 bits and the second register cannot be accessed from the
814 same high part as the first. For unaligned loads and stores,
815 fuse the offbits == 12 and old "ab" handling. Apply this handling
816 whenever the second offset needs a different high part from the first.
817 Construct the offset using ADDRESS_ADDI_INSN where possible,
818 for offbits == 16 as well as offbits == 12. Use offset_reloc
819 when constructing the individual loads and stores.
820 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
821 and offset_reloc before matching against a particular opcode.
822 Handle elided 'A' constants. Allow 'A' constants to use
823 relocation operators.
824
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8252013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
828 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
829 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
830
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8312013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
832
833 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
834 Require the msb to be <= 31 for "+s". Check that the size is <= 31
835 for both "+s" and "+S".
836
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8372013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
838
839 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
840 (mips_ip, mips16_ip): Handle "+i".
841
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8422013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
843
844 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
845 (micromips_to_32_reg_h_map): Rename to...
846 (micromips_to_32_reg_h_map1): ...this.
847 (micromips_to_32_reg_i_map): Rename to...
848 (micromips_to_32_reg_h_map2): ...this.
849 (mips_lookup_reg_pair): New function.
850 (gpr_write_mask, macro): Adjust after above renaming.
851 (validate_micromips_insn): Remove "mi" handling.
852 (mips_ip): Likewise. Parse both registers in a pair for "mh".
853
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8542013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
855
856 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
857 (mips_ip): Remove "+D" and "+T" handling.
858
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8592013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
860
861 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
862 relocs.
863
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8642013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
865
4aa2c5e2
MS
866 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
867
8682013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
869
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MS
870 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
871 (aarch64_force_relocation): Likewise.
872
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8732013-07-02 Alan Modra <amodra@gmail.com>
874
875 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
876
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8772013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
878
879 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
880 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
881 Replace @sc{mips16} with literal `MIPS16'.
882 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
883
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8842013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
885
886 * config/tc-aarch64.c (reloc_table): Replace
887 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
888 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
889 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
890 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
891 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
892 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
893 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
894 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
895 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
896 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
897 (aarch64_force_relocation): Likewise.
898
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8992013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
900
901 * config/tc-aarch64.c (ilp32_p): New static variable.
902 (elf64_aarch64_target_format): Return the target according to the
903 value of 'ilp32_p'.
904 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
905 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
906 (aarch64_dwarf2_addr_size): New function.
907 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
908 (DWARF2_ADDR_SIZE): New define.
909
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9102013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
911
912 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
913
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9142013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
915
916 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
917
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MR
9182013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
919
920 * config/tc-mips.c (mips_set_options): Add insn32 member.
921 (mips_opts): Initialize it.
922 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
923 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
924 (md_longopts): Add "minsn32" and "mno-insn32" options.
925 (is_size_valid): Handle insn32 mode.
926 (md_assemble): Pass instruction string down to macro.
927 (brk_fmt): Add second dimension and insn32 mode initializers.
928 (mfhl_fmt): Likewise.
929 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
930 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
931 (macro_build_jalr, move_register): Handle insn32 mode.
932 (macro_build_branch_rs): Likewise.
933 (macro): Handle insn32 mode.
934 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
935 (mips_ip): Handle insn32 mode.
936 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
937 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
938 (mips_handle_align): Handle insn32 mode.
939 (md_show_usage): Add -minsn32 and -mno-insn32.
940
941 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
942 -mno-insn32 options.
943 (-minsn32, -mno-insn32): New options.
944 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
945 options.
946 (MIPS assembly options): New node. Document .set insn32 and
947 .set noinsn32.
948 (MIPS-Dependent): List the new node.
949
d1706f38
NC
9502013-06-25 Nick Clifton <nickc@redhat.com>
951
952 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
953 the PC in indirect addressing on 430xv2 parts.
954 (msp430_operands): Add version test to hardware bug encoding
955 restrictions.
956
477330fc
RM
9572013-06-24 Roland McGrath <mcgrathr@google.com>
958
d996d970
RM
959 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
960 so it skips whitespace before it.
961 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
962
477330fc
RM
963 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
964 (arm_reg_parse_multi): Skip whitespace first.
965 (parse_reg_list): Likewise.
966 (parse_vfp_reg_list): Likewise.
967 (s_arm_unwind_save_mmxwcg): Likewise.
968
24382199
NC
9692013-06-24 Nick Clifton <nickc@redhat.com>
970
971 PR gas/15623
972 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
973
c3678916
RS
9742013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
975
976 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
977
42429eac
RS
9782013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
979
980 * config/tc-mips.c: Assert that offsetT and valueT are at least
981 8 bytes in size.
982 (GPR_SMIN, GPR_SMAX): New macros.
983 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
984
f3ded42a
RS
9852013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
986
987 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
988 conditions. Remove any code deselected by them.
989 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
990
e8044f35
RS
9912013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
992
993 * NEWS: Note removal of ECOFF support.
994 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
995 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
996 (MULTI_CFILES): Remove config/e-mipsecoff.c.
997 * Makefile.in: Regenerate.
998 * configure.in: Remove MIPS ECOFF references.
999 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1000 Delete cases.
1001 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1002 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1003 (mips-*-*): ...this single case.
1004 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1005 MIPS emulations to be e-mipself*.
1006 * configure: Regenerate.
1007 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1008 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1009 (mips-*-sysv*): Remove coff and ecoff cases.
1010 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1011 * ecoff.c: Remove reference to MIPS ECOFF.
1012 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1013 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1014 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1015 (mips_hi_fixup): Tweak comment.
1016 (append_insn): Require a howto.
1017 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1018
98508b2a
RS
10192013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1020
1021 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1022 Use "CPU" instead of "cpu".
1023 * doc/c-mips.texi: Likewise.
1024 (MIPS Opts): Rename to MIPS Options.
1025 (MIPS option stack): Rename to MIPS Option Stack.
1026 (MIPS ASE instruction generation overrides): Rename to
1027 MIPS ASE Instruction Generation Overrides (for now).
1028 (MIPS floating-point): Rename to MIPS Floating-Point.
1029
fc16f8cc
RS
10302013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1031
1032 * doc/c-mips.texi (MIPS Macros): New section.
1033 (MIPS Object): Replace with...
1034 (MIPS Small Data): ...this new section.
1035
5a7560b5
RS
10362013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1037
1038 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1039 Capitalize name. Use @kindex instead of @cindex for .set entries.
1040
a1b86ab7
RS
10412013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1042
1043 * doc/c-mips.texi (MIPS Stabs): Remove section.
1044
c6278170
RS
10452013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1046
1047 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1048 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1049 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1050 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1051 (mips_ase): New structure.
1052 (mips_ases): New table.
1053 (FP64_ASES): New macro.
1054 (mips_ase_groups): New array.
1055 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1056 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1057 functions.
1058 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1059 (md_parse_option): Use mips_ases and mips_set_ase instead of
1060 separate case statements for each ASE option.
1061 (mips_after_parse_args): Use FP64_ASES. Use
1062 mips_check_isa_supports_ases to check the ASEs against
1063 other options.
1064 (s_mipsset): Use mips_ases and mips_set_ase instead of
1065 separate if statements for each ASE option. Use
1066 mips_check_isa_supports_ases, even when a non-ASE option
1067 is specified.
1068
63a4bc21
KT
10692013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1070
1071 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1072
c31f3936
RS
10732013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1074
1075 * config/tc-mips.c (md_shortopts, options, md_longopts)
1076 (md_longopts_size): Move earlier in file.
1077
846ef2d0
RS
10782013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1079
1080 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1081 with a single "ase" bitmask.
1082 (mips_opts): Update accordingly.
1083 (file_ase, file_ase_explicit): New variables.
1084 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1085 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1086 (ISA_HAS_ROR): Adjust for mips_set_options change.
1087 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1088 (mips_ip): Adjust for mips_set_options change.
1089 (md_parse_option): Likewise. Update file_ase_explicit.
1090 (mips_after_parse_args): Adjust for mips_set_options change.
1091 Use bitmask operations to select the default ASEs. Set file_ase
1092 rather than individual per-ASE variables.
1093 (s_mipsset): Adjust for mips_set_options change.
1094 (mips_elf_final_processing): Test file_ase rather than
1095 file_ase_mdmx. Remove commented-out code.
1096
d16afab6
RS
10972013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1098
1099 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1100 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1101 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1102 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1103 (mips_after_parse_args): Use the new "ase" field to choose
1104 the default ASEs.
1105 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1106 "ase" field.
1107
e83a675f
RE
11082013-06-18 Richard Earnshaw <rearnsha@arm.com>
1109
1110 * config/tc-arm.c (symbol_preemptible): New function.
1111 (relax_branch): Use it.
1112
7f3c4072
CM
11132013-06-17 Catherine Moore <clm@codesourcery.com>
1114 Maciej W. Rozycki <macro@codesourcery.com>
1115 Chao-Ying Fu <fu@mips.com>
1116
1117 * config/tc-mips.c (mips_set_options): Add ase_eva.
1118 (mips_set_options mips_opts): Add ase_eva.
1119 (file_ase_eva): Declare.
1120 (ISA_SUPPORTS_EVA_ASE): Define.
1121 (IS_SEXT_9BIT_NUM): Define.
1122 (MIPS_CPU_ASE_EVA): Define.
1123 (is_opcode_valid): Add support for ase_eva.
1124 (macro_build): Likewise.
1125 (macro): Likewise.
1126 (validate_mips_insn): Likewise.
1127 (validate_micromips_insn): Likewise.
1128 (mips_ip): Likewise.
1129 (options): Add OPTION_EVA and OPTION_NO_EVA.
1130 (md_longopts): Add -meva and -mno-eva.
1131 (md_parse_option): Process new options.
1132 (mips_after_parse_args): Check for valid EVA combinations.
1133 (s_mipsset): Likewise.
1134
e410add4
RS
11352013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1136
1137 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1138 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1139 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1140 (dwarf2_gen_line_info_1): Update call accordingly.
1141 (dwarf2_move_insn): New function.
1142 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1143
6a50d470
RS
11442013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1145
1146 Revert:
1147
1148 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1149
1150 PR gas/13024
1151 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1152 (dwarf2_gen_line_info_1): Delete.
1153 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1154 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1155 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1156 (dwarf2_directive_loc): Push previous .locs instead of generating
1157 them immediately.
1158
f122319e
CF
11592013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1160
1161 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1162 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1163
909c7f9c
NC
11642013-06-13 Nick Clifton <nickc@redhat.com>
1165
1166 PR gas/15602
1167 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1168 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1169 function. Generates an error if the adjusted offset is out of a
1170 16-bit range.
1171
5d5755a7
SL
11722013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1173
1174 * config/tc-nios2.c (md_apply_fix): Mask constant
1175 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1176
3bf0dbfb
MR
11772013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1178
1179 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1180 MIPS-3D instructions either.
1181 (md_convert_frag): Update the COPx branch mask accordingly.
1182
1183 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1184 option.
1185 * doc/as.texinfo (Overview): Add --relax-branch and
1186 --no-relax-branch.
1187 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1188 --no-relax-branch.
1189
9daf7bab
SL
11902013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1191
1192 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1193 omitted.
1194
d301a56b
RS
11952013-06-08 Catherine Moore <clm@codesourcery.com>
1196
1197 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1198 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1199 (append_insn): Change INSN_xxxx to ASE_xxxx.
1200
7bab7634
DC
12012013-06-01 George Thomas <george.thomas@atmel.com>
1202
cbe02d4f 1203 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC
1204 AVR_ISA_XMEGAU
1205
f60cf82f
L
12062013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1207
1208 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1209 for ELF.
1210
a3f278e2
CM
12112013-05-31 Paul Brook <paul@codesourcery.com>
1212
a3f278e2
CM
1213 * config/tc-mips.c (s_ehword): New.
1214
067ec077
CM
12152013-05-30 Paul Brook <paul@codesourcery.com>
1216
1217 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1218
d6101ac2
MR
12192013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1220
1221 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1222 convert relocs who have no relocatable field either. Rephrase
1223 the conditional so that the PC-relative check is only applied
1224 for REL targets.
1225
f19ccbda
MR
12262013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1227
1228 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1229 calculation.
1230
418009c2
YZ
12312013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1232
1233 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1234 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ
1235 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1236 (md_apply_fix): Likewise.
1237 (aarch64_force_relocation): Likewise.
1238
0a8897c7
KT
12392013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1240
1241 * config/tc-arm.c (it_fsm_post_encode): Improve
1242 warning messages about deprecated IT block formats.
1243
89d2a2a3
MS
12442013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1245
1246 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1247 inside fx_done condition.
1248
c77c0862
RS
12492013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1250
1251 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1252
c0637f3a
PB
12532013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1254
1255 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1256 and clean up warning when using PRINT_OPCODE_TABLE.
1257
5656a981
AM
12582013-05-20 Alan Modra <amodra@gmail.com>
1259
1260 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1261 and data fixups performing shift/high adjust/sign extension on
1262 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1263 when writing data fixups rather than recalculating size.
1264
997b26e8
JBG
12652013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1266
1267 * doc/c-msp430.texi: Fix typo.
1268
9f6e76f4
TG
12692013-05-16 Tristan Gingold <gingold@adacore.com>
1270
1271 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1272 are also TOC symbols.
1273
638d3803
NC
12742013-05-16 Nick Clifton <nickc@redhat.com>
1275
1276 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1277 Add -mcpu command to specify core type.
997b26e8 1278 * doc/c-msp430.texi: Update documentation.
638d3803 1279
b015e599
AP
12802013-05-09 Andrew Pinski <apinski@cavium.com>
1281
1282 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1283 (mips_opts): Update for the new field.
1284 (file_ase_virt): New variable.
1285 (ISA_SUPPORTS_VIRT_ASE): New macro.
1286 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1287 (MIPS_CPU_ASE_VIRT): New define.
1288 (is_opcode_valid): Handle ase_virt.
1289 (macro_build): Handle "+J".
1290 (validate_mips_insn): Likewise.
1291 (mips_ip): Likewise.
1292 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1293 (md_longopts): Add mvirt and mnovirt
1294 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1295 (mips_after_parse_args): Handle ase_virt field.
1296 (s_mipsset): Handle "virt" and "novirt".
1297 (mips_elf_final_processing): Add a comment about virt ASE might need
1298 a new flag.
1299 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1300 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1301 Document ".set virt" and ".set novirt".
1302
da8094d7
AM
13032013-05-09 Alan Modra <amodra@gmail.com>
1304
1305 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1306 control of operand flag bits.
1307
c5f8c205
AM
13082013-05-07 Alan Modra <amodra@gmail.com>
1309
1310 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1311 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1312 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1313 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1314 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1315 Shift and sign-extend fieldval for use by some VLE reloc
1316 operand->insert functions.
1317
b47468a6
CM
13182013-05-06 Paul Brook <paul@codesourcery.com>
1319 Catherine Moore <clm@codesourcery.com>
1320
c5f8c205
AM
1321 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1322 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM
1323 (md_apply_fix): Likewise.
1324 (tc_gen_reloc): Likewise.
1325
2de39019
CM
13262013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1327
1328 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1329 (mips_fix_adjustable): Adjust pc-relative check to use
1330 limited_pc_reloc_p.
1331
754e2bb9
RS
13322013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1333
1334 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1335 (s_mips_stab): Do not restrict to stabn only.
1336
13761a11
NC
13372013-05-02 Nick Clifton <nickc@redhat.com>
1338
1339 * config/tc-msp430.c: Add support for the MSP430X architecture.
1340 Add code to insert a NOP instruction after any instruction that
1341 might change the interrupt state.
1342 Add support for the LARGE memory model.
1343 Add code to initialise the .MSP430.attributes section.
1344 * config/tc-msp430.h: Add support for the MSP430X architecture.
1345 * doc/c-msp430.texi: Document the new -mL and -mN command line
1346 options.
1347 * NEWS: Mention support for the MSP430X architecture.
1348
df26367c
MR
13492013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1350
1351 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1352 alpha*-*-linux*ecoff*.
1353
f02d8318
CF
13542013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1355
1356 * config/tc-mips.c (mips_ip): Add sizelo.
1357 For "+C", "+G", and "+H", set sizelo and compare against it.
1358
b40bf0a2
NC
13592013-04-29 Nick Clifton <nickc@redhat.com>
1360
1361 * as.c (Options): Add -gdwarf-sections.
1362 (parse_args): Likewise.
1363 * as.h (flag_dwarf_sections): Declare.
1364 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1365 (process_entries): When -gdwarf-sections is enabled generate
1366 fragmentary .debug_line sections.
1367 (out_debug_line): Set the section for the .debug_line section end
1368 symbol.
1369 * doc/as.texinfo: Document -gdwarf-sections.
1370 * NEWS: Mention -gdwarf-sections.
1371
8eeccb77 13722013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG
1373
1374 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1375 according to the target parameter. Don't call s_segm since s_segm
1376 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1377 initialized yet.
1378 (md_begin): Call s_segm according to target parameter from command
1379 line.
1380
49926cd0
AM
13812013-04-25 Alan Modra <amodra@gmail.com>
1382
1383 * configure.in: Allow little-endian linux.
1384 * configure: Regenerate.
1385
e3031850
SL
13862013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1387
1388 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1389 "fstatus" control register to "eccinj".
1390
cb948fc0
KT
13912013-04-19 Kai Tietz <ktietz@redhat.com>
1392
1393 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1394
4455e9ad
JB
13952013-04-15 Julian Brown <julian@codesourcery.com>
1396
1397 * expr.c (add_to_result, subtract_from_result): Make global.
1398 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1399 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1400 subtract_from_result to handle extra bit of precision for .sleb128
1401 directive operands.
1402
956a6ba3
JB
14032013-04-10 Julian Brown <julian@codesourcery.com>
1404
1405 * read.c (convert_to_bignum): Add sign parameter. Use it
1406 instead of X_unsigned to determine sign of resulting bignum.
1407 (emit_expr): Pass extra argument to convert_to_bignum.
1408 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1409 X_extrabit to convert_to_bignum.
1410 (parse_bitfield_cons): Set X_extrabit.
1411 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1412 Initialise X_extrabit field as appropriate.
1413 (add_to_result): New.
1414 (subtract_from_result): New.
1415 (expr): Use above.
1416 * expr.h (expressionS): Add X_extrabit field.
1417
eb9f3f00
JB
14182013-04-10 Jan Beulich <jbeulich@suse.com>
1419
1420 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1421 register being PC when is_t or writeback, and use distinct
1422 diagnostic for the latter case.
1423
ccb84d65
JB
14242013-04-10 Jan Beulich <jbeulich@suse.com>
1425
1426 * gas/config/tc-arm.c (parse_operands): Re-write
1427 po_barrier_or_imm().
1428 (do_barrier): Remove bogus constraint().
1429 (do_t_barrier): Remove.
1430
4d13caa0
NC
14312013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1432
1433 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1434 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1435 ATmega2564RFR2
1436 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1437
16d02dc9
JB
14382013-04-09 Jan Beulich <jbeulich@suse.com>
1439
1440 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1441 Use local variable Rt in more places.
1442 (do_vmsr): Accept all control registers.
1443
05ac0ffb
JB
14442013-04-09 Jan Beulich <jbeulich@suse.com>
1445
1446 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1447 if there was none specified for moves between scalar and core
1448 register.
1449
2d51fb74
JB
14502013-04-09 Jan Beulich <jbeulich@suse.com>
1451
1452 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1453 NEON_ALL_LANES case.
1454
94dcf8bf
JB
14552013-04-08 Jan Beulich <jbeulich@suse.com>
1456
1457 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1458 PC-relative VSTR.
1459
1472d06f
JB
14602013-04-08 Jan Beulich <jbeulich@suse.com>
1461
1462 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1463 entry to sp_fiq.
1464
0c76cae8
AM
14652013-04-03 Alan Modra <amodra@gmail.com>
1466
1467 * doc/as.texinfo: Add support to generate man options for h8300.
1468 * doc/c-h8300.texi: Likewise.
1469
92eb40d9
RR
14702013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1471
1472 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1473 Cortex-A57.
1474
51dcdd4d
NC
14752013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1476
1477 PR binutils/15068
1478 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1479
c5d685bf
NC
14802013-03-26 Nick Clifton <nickc@redhat.com>
1481
9b978282
NC
1482 PR gas/15295
1483 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1484 start of the file each time.
1485
c5d685bf
NC
1486 PR gas/15178
1487 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1488 FreeBSD targets.
1489
9699c833
TG
14902013-03-26 Douglas B Rupp <rupp@gnat.com>
1491
1492 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1493 after fixup.
1494
4755303e
WN
14952013-03-21 Will Newton <will.newton@linaro.org>
1496
1497 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1498 pc-relative str instructions in Thumb mode.
1499
81f5558e
NC
15002013-03-21 Michael Schewe <michael.schewe@gmx.net>
1501
1502 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1503 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1504 R_H8_DISP32A16.
1505 * config/tc-h8300.h: Remove duplicated defines.
1506
71863e73
NC
15072013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1508
1509 PR gas/15282
1510 * tc-avr.c (mcu_has_3_byte_pc): New function.
1511 (tc_cfi_frame_initial_instructions): Call it to find return
1512 address size.
1513
795b8e6b
NC
15142013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1515
1516 PR gas/15095
1517 * config/tc-tic6x.c (tic6x_try_encode): Handle
1518 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1519 encode register pair numbers when required.
1520
ba86b375
WN
15212013-03-15 Will Newton <will.newton@linaro.org>
1522
1523 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1524 in vstr in Thumb mode for pre-ARMv7 cores.
1525
9e6f3811
AS
15262013-03-14 Andreas Schwab <schwab@suse.de>
1527
1528 * doc/c-arc.texi (ARC Directives): Revert last change and use
1529 @itemize instead of @table.
1530 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1531
b10bf8c5
NC
15322013-03-14 Nick Clifton <nickc@redhat.com>
1533
1534 PR gas/15273
1535 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1536 NULL message, instead just check ARM_CPU_IS_ANY directly.
1537
ba724cfc
NC
15382013-03-14 Nick Clifton <nickc@redhat.com>
1539
1540 PR gas/15212
9e6f3811 1541 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC
1542 for table format.
1543 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1544 to the @item directives.
1545 (ARM-Neon-Alignment): Move to correct place in the document.
1546 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1547 formatting.
1548 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1549 @smallexample.
1550
531a94fd
SL
15512013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1552
1553 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1554 case. Add default BAD_CASE to switch.
1555
dad60f8e
SL
15562013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1557
1558 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1559 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1560
dd5181d5
KT
15612013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1562
1563 * config/tc-arm.c (crc_ext_armv8): New feature set.
1564 (UNPRED_REG): New macro.
1565 (do_crc32_1): New function.
1566 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1567 do_crc32ch, do_crc32cw): Likewise.
1568 (TUEc): New macro.
1569 (insns): Add entries for crc32 mnemonics.
1570 (arm_extensions): Add entry for crc.
1571
8e723a10
CLT
15722013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1573
1574 * write.h (struct fix): Add fx_dot_frag field.
1575 (dot_frag): Declare.
1576 * write.c (dot_frag): New variable.
1577 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1578 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1579 * expr.c (expr): Save value of frag_now in dot_frag when setting
1580 dot_value.
1581 * read.c (emit_expr): Likewise. Delete comments.
1582
be05d201
L
15832013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1584
1585 * config/tc-i386.c (flag_code_names): Removed.
1586 (i386_index_check): Rewrote.
1587
62b0d0d5
YZ
15882013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1589
1590 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1591 add comment.
1592 (aarch64_double_precision_fmovable): New function.
1593 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1594 function; handle hexadecimal representation of IEEE754 encoding.
1595 (parse_operands): Update the call to parse_aarch64_imm_float.
1596
165de32a
L
15972013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1598
1599 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1600 (check_hle): Updated.
1601 (md_assemble): Likewise.
1602 (parse_insn): Likewise.
1603
d5de92cf
L
16042013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1605
1606 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1607 (md_assemble): Check if REP prefix is OK.
d5de92cf
L
1608 (parse_insn): Remove expecting_string_instruction. Set
1609 i.rep_prefix.
1610
e60bb1dd
YZ
16112013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1612
1613 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1614
aeebdd9b
YZ
16152013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1616
1617 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1618 for system registers.
1619
4107ae22
DD
16202013-02-27 DJ Delorie <dj@redhat.com>
1621
1622 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1623 (rl78_op): Handle %code().
1624 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1625 (tc_gen_reloc): Likwise; convert to a computed reloc.
1626 (md_apply_fix): Likewise.
1627
151fa98f
NC
16282013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1629
1630 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1631
70a8bc5b 16322013-02-25 Terry Guo <terry.guo@arm.com>
1633
1634 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1635 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1636 list of accepted CPUs.
1637
5c111e37
L
16382013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1639
1640 PR gas/15159
1641 * config/tc-i386.c (cpu_arch): Add ".smap".
1642
1643 * doc/c-i386.texi: Document smap.
1644
8a75745d
MR
16452013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1646
1647 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1648 mips_assembling_insn appropriately.
1649 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1650
79850f26
MR
16512013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1652
cf29fc61 1653 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR
1654 extraneous braces.
1655
4c261dff
NC
16562013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1657
5c111e37 1658 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1659
ea33f281
NC
16602013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1661
1662 * configure.tgt: Add nios2-*-rtems*.
1663
a1ccaec9
YZ
16642013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1665
1666 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1667 NULL.
1668
0aa27725
RS
16692013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1670
1671 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1672 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1673
da4339ed
NC
16742013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1675
1676 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1677 core.
1678
36591ba1 16792013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1680 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL
1681
1682 Based on patches from Altera Corporation.
1683
1684 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1685 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1686 * Makefile.in: Regenerated.
1687 * configure.tgt: Add case for nios2*-linux*.
1688 * config/obj-elf.c: Conditionally include elf/nios2.h.
1689 * config/tc-nios2.c: New file.
1690 * config/tc-nios2.h: New file.
1691 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1692 * doc/Makefile.in: Regenerated.
1693 * doc/all.texi: Set NIOSII.
1694 * doc/as.texinfo (Overview): Add Nios II options.
1695 (Machine Dependencies): Include c-nios2.texi.
1696 * doc/c-nios2.texi: New file.
1697 * NEWS: Note Altera Nios II support.
1698
94d4433a
AM
16992013-02-06 Alan Modra <amodra@gmail.com>
1700
1701 PR gas/14255
1702 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1703 Don't skip fixups with fx_subsy non-NULL.
1704 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1705 with fx_subsy non-NULL.
1706
ace9af6f
L
17072013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1708
1709 * doc/c-metag.texi: Add "@c man" markers.
1710
89d67ed9
AM
17112013-02-04 Alan Modra <amodra@gmail.com>
1712
1713 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1714 related code.
1715 (TC_ADJUST_RELOC_COUNT): Delete.
1716 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1717
89072bd6
AM
17182013-02-04 Alan Modra <amodra@gmail.com>
1719
1720 * po/POTFILES.in: Regenerate.
1721
f9b2d544
NC
17222013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1723
1724 * config/tc-metag.c: Make SWAP instruction less permissive with
1725 its operands.
1726
392ca752
DD
17272013-01-29 DJ Delorie <dj@redhat.com>
1728
1729 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1730 relocs in .word/.etc statements.
1731
427d0db6
RM
17322013-01-29 Roland McGrath <mcgrathr@google.com>
1733
1734 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1735 immediate value for 8-bit offset" error so it shows line info.
1736
4faf939a
JM
17372013-01-24 Joseph Myers <joseph@codesourcery.com>
1738
1739 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1740 for 64-bit output.
1741
78c8d46c
NC
17422013-01-24 Nick Clifton <nickc@redhat.com>
1743
1744 * config/tc-v850.c: Add support for e3v5 architecture.
1745 * doc/c-v850.texi: Mention new support.
1746
fb5b7503
NC
17472013-01-23 Nick Clifton <nickc@redhat.com>
1748
1749 PR gas/15039
1750 * config/tc-avr.c: Include dwarf2dbg.h.
1751
8ce3d284
L
17522013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1753
1754 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1755 (tc_i386_fix_adjustable): Likewise.
1756 (lex_got): Likewise.
1757 (tc_gen_reloc): Likewise.
1758
f5555712
YZ
17592013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1760
1761 * config/tc-aarch64.c (output_operand_error_record): Change to output
1762 the out-of-range error message as value-expected message if there is
1763 only one single value in the expected range.
1764 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1765 LSL #0 as a programmer-friendly feature.
1766
8fd4256d
L
17672013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1768
1769 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1770 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1771 BFD_RELOC_64_SIZE relocations.
1772 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1773 for it.
1774 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1775 relocations against local symbols.
1776
a5840dce
AM
17772013-01-16 Alan Modra <amodra@gmail.com>
1778
1779 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1780 finding some sort of toc syntax error, and break to avoid
1781 compiler uninit warning.
1782
af89796a
L
17832013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1784
1785 PR gas/15019
1786 * config/tc-i386.c (lex_got): Increment length by 1 if the
1787 relocation token is removed.
1788
dd42f060
NC
17892013-01-15 Nick Clifton <nickc@redhat.com>
1790
1791 * config/tc-v850.c (md_assemble): Allow signed values for
1792 V850E_IMMEDIATE.
1793
464e3686
SK
17942013-01-11 Sean Keys <skeys@ipdatasys.com>
1795
1796 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1797 git to cvs.
464e3686 1798
5817ffd1
PB
17992013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1800
1801 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1802 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1803 * config/tc-ppc.c (md_show_usage): Likewise.
1804 (ppc_handle_align): Handle power8's group ending nop.
1805
f4b1f6a9
SK
18062013-01-10 Sean Keys <skeys@ipdatasys.com>
1807
1808 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1809 that the assember exits after the opcodes have been printed.
f4b1f6a9 1810
34bca508
L
18112013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1812
1813 * app.c: Remove trailing white spaces.
1814 * as.c: Likewise.
1815 * as.h: Likewise.
1816 * cond.c: Likewise.
1817 * dw2gencfi.c: Likewise.
1818 * dwarf2dbg.h: Likewise.
1819 * ecoff.c: Likewise.
1820 * input-file.c: Likewise.
1821 * itbl-lex.h: Likewise.
1822 * output-file.c: Likewise.
1823 * read.c: Likewise.
1824 * sb.c: Likewise.
1825 * subsegs.c: Likewise.
1826 * symbols.c: Likewise.
1827 * write.c: Likewise.
1828 * config/tc-i386.c: Likewise.
1829 * doc/Makefile.am: Likewise.
1830 * doc/Makefile.in: Likewise.
1831 * doc/c-aarch64.texi: Likewise.
1832 * doc/c-alpha.texi: Likewise.
1833 * doc/c-arc.texi: Likewise.
1834 * doc/c-arm.texi: Likewise.
1835 * doc/c-avr.texi: Likewise.
1836 * doc/c-bfin.texi: Likewise.
1837 * doc/c-cr16.texi: Likewise.
1838 * doc/c-d10v.texi: Likewise.
1839 * doc/c-d30v.texi: Likewise.
1840 * doc/c-h8300.texi: Likewise.
1841 * doc/c-hppa.texi: Likewise.
1842 * doc/c-i370.texi: Likewise.
1843 * doc/c-i386.texi: Likewise.
1844 * doc/c-i860.texi: Likewise.
1845 * doc/c-m32c.texi: Likewise.
1846 * doc/c-m32r.texi: Likewise.
1847 * doc/c-m68hc11.texi: Likewise.
1848 * doc/c-m68k.texi: Likewise.
1849 * doc/c-microblaze.texi: Likewise.
1850 * doc/c-mips.texi: Likewise.
1851 * doc/c-msp430.texi: Likewise.
1852 * doc/c-mt.texi: Likewise.
1853 * doc/c-s390.texi: Likewise.
1854 * doc/c-score.texi: Likewise.
1855 * doc/c-sh.texi: Likewise.
1856 * doc/c-sh64.texi: Likewise.
1857 * doc/c-tic54x.texi: Likewise.
1858 * doc/c-tic6x.texi: Likewise.
1859 * doc/c-v850.texi: Likewise.
1860 * doc/c-xc16x.texi: Likewise.
1861 * doc/c-xgate.texi: Likewise.
1862 * doc/c-xtensa.texi: Likewise.
1863 * doc/c-z80.texi: Likewise.
1864 * doc/internals.texi: Likewise.
1865
4c665b71
RM
18662013-01-10 Roland McGrath <mcgrathr@google.com>
1867
1868 * hash.c (hash_new_sized): Make it global.
1869 * hash.h: Declare it.
1870 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1871 pass a small size.
1872
a3c62988
NC
18732013-01-10 Will Newton <will.newton@imgtec.com>
1874
1875 * Makefile.am: Add Meta.
1876 * Makefile.in: Regenerate.
1877 * config/tc-metag.c: New file.
1878 * config/tc-metag.h: New file.
1879 * configure.tgt: Add Meta.
1880 * doc/Makefile.am: Add Meta.
1881 * doc/Makefile.in: Regenerate.
1882 * doc/all.texi: Add Meta.
1883 * doc/as.texiinfo: Document Meta options.
1884 * doc/c-metag.texi: New file.
1885
b37df7c4
SE
18862013-01-09 Steve Ellcey <sellcey@mips.com>
1887
1888 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1889 calls.
1890 * config/tc-mips.c (internalError): Remove, replace with abort.
1891
a3251895
YZ
18922013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1893
1894 * config/tc-aarch64.c (parse_operands): Change to compare the result
1895 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1896
8ab8155f
NC
18972013-01-07 Nick Clifton <nickc@redhat.com>
1898
1899 PR gas/14887
1900 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1901 anticipated character.
1902 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1903 here as it is no longer needed.
1904
a4ac1c42
AS
19052013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1906
1907 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1908 * doc/c-score.texi (SCORE-Opts): Likewise.
1909 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1910
e407c74b
NC
19112013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1912
1913 * config/tc-mips.c: Add support for MIPS r5900.
1914 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1915 lq and sq.
1916 (can_swap_branch_p, get_append_method): Detect some conditional
1917 short loops to fix a bug on the r5900 by NOP in the branch delay
1918 slot.
1919 (M_MUL): Support 3 operands in multu on r5900.
1920 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1921 (s_mipsset): Force 32 bit floating point on r5900.
1922 (mips_ip): Check parameter range of instructions mfps and mtps on
1923 r5900.
1924 * configure.in: Detect CPU type when target string contains r5900
1925 (e.g. mips64r5900el-linux-gnu).
1926
62658407
L
19272013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1928
1929 * as.c (parse_args): Update copyright year to 2013.
1930
95830fd1
YZ
19312013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1932
1933 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1934 and "cortex57".
1935
517bb291 19362013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1937
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NC
1938 PR gas/14987
1939 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1940 closing bracket.
d709e4e6 1941
517bb291 1942For older changes see ChangeLog-2012
08d56133 1943\f
517bb291 1944Copyright (C) 2013 Free Software Foundation, Inc.
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NC
1945
1946Copying and distribution of this file, with or without modification,
1947are permitted in any medium without royalty provided the copyright
1948notice and this notice are preserved.
1949
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1950Local Variables:
1951mode: change-log
1952left-margin: 8
1953fill-column: 74
1954version-control: never
1955End:
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