gas/
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b7d9ef37
L
12006-11-08 H.J. Lu <hongjiu.lu@intel.com>
2
3 * config/tc-i386.h (CpuPNI): Removed.
4 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
5 * config/tc-i386.c (md_assemble): Likewise.
6
05e7221f
AM
72006-11-08 Alan Modra <amodra@bigpond.net.au>
8
9 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
10
df1f3cda
DD
112006-11-06 David Daney <ddaney@avtrex.com>
12
13 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
14
82100185
TS
152006-11-06 Thiemo Seufer <ths@mips.com>
16
17 * doc/c-mips.texi (-march): Document sb1a.
18
a360e743
TS
192006-11-06 Thiemo Seufer <ths@mips.com>
20
21 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
22 34k always has DSP ASE.
23
64817874
TS
242006-11-03 Thiemo Seufer <ths@mips.com>
25
26 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
27 MIPS16 instructions referencing other sections, unless they are
28 external branches.
29
7764b395
TS
302006-11-03 Thiemo Seufer <ths@mips.com>
31
32 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
33 release 1 CPU.
34
ae424f82
JJ
352006-11-03 Jakub Jelinek <jakub@redhat.com>
36
9b8ae42e
JJ
37 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
38 personality and lsda.
39 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
40 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
41 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
42 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
43 (output_cie): Output personality including its encoding and LSDA encoding.
44 (output_fde): Output LSDA.
45 (select_cie_for_fde): Don't share CIE if personality, its encoding or
46 LSDA encoding are different. Copy the 3 fields from fde_entry to
47 cie_entry.
48 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
49
ae424f82
JJ
50 * subsegs.h (struct frchain): Add frch_cfi_data field.
51 * dw2gencfi.c: Include subsegs.h.
52 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
53 (struct frch_cfi_data): New type.
54 (unused_cfi_data): New variable.
55 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
56 and cfa_save_stack static vars into a structure pointed from
57 each frchain.
58 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
59 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
60 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
61 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
62 Likewise.
63
d1e50f8a
DJ
642006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
65
66 * config/tc-h8300.c (build_bytes): Fix const warning.
67
06d2da93
NC
682006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
69
70 * tc-score.c (do16_rdrs): Handle not! instruction especially.
71
3ba67470
PB
722006-10-31 Paul Brook <paul@codesourcery.com>
73
74 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
75 for EABIv4.
76
7a1d4c38
PB
772006-10-31 Paul Brook <paul@codesourcery.com>
78
79 gas/
80 * config/tc-arm.c (object_arch): New variable.
81 (s_arm_object_arch): New function.
82 (md_pseudo_table): Add object_arch.
83 (aeabi_set_public_attributes): Obey object_arch.
84 * doc/c-arm.texi: Document .object_arch.
85
b138abaa
NC
862006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
87
88 * tc-score.c (data_op2): Check invalid operands.
89 (my_get_expression): Const operand of some instructions can not be
90 symbol in assembly.
91 (get_insn_class_from_type): Handle instruction type Insn_internal.
92 (do_macro_ldst_label): Modify inst.type.
93 (Insn_PIC): Delete.
94 (data_op2): The immediate value in lw is 15 bit signed.
95
c79b7c30
RC
962006-10-29 Randolph Chung <tausq@debian.org>
97
98 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
99 (hppa_regname_to_dw2regnum): New funcions.
100 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
101 (tc_cfi_frame_initial_instructions)
102 (tc_regname_to_dw2regnum): Define.
103 (hppa_cfi_frame_initial_instructions)
104 (hppa_regname_to_dw2regnum): Declare.
105 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
106 (DWARF2_CIE_DATA_ALIGNMENT): Define.
107
e2785c44
NC
1082006-10-29 Nick Clifton <nickc@redhat.com>
109
110 * config/tc-spu.c (md_assemble): Cast printf string size parameter
111 to int in order to avoid a compiler warning.
112
86157c20
AS
1132006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
114
115 * config/tc-sh.c (md_assemble): Define size of branches.
116
ba5f0fda
BE
1172006-10-26 Ben Elliston <bje@au.ibm.com>
118
119 * dw2gencfi.c (cfi_add_CFA_offset):
120 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
121
033cd5fd
BE
122 * write.c (chain_frchains_together_1): Assert that this function
123 never returns a pointer to the auto variable `dummy'.
124
e9f53129
AM
1252006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
126 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
127 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
128 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
129 Alan Modra <amodra@bigpond.net.au>
130
131 * config/tc-spu.c: New file.
132 * config/tc-spu.h: New file.
133 * configure.tgt: Add SPU support.
134 * Makefile.am: Likewise. Run "make dep-am".
135 * Makefile.in: Regenerate.
136 * po/POTFILES.in: Regenerate.
137
7b383517
BE
1382006-10-25 Ben Elliston <bje@au.ibm.com>
139
140 * expr.c (expr): Replace O_add case in switch (op_left) explaining
141 why it can never occur.
142
ede602d7
AM
1432006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
144
145 * doc/c-ppc.texi (-mcell): Document.
146 * config/tc-ppc.c (parse_cpu): Parse -mcell.
147 (md_show_usage): Document -mcell.
148
7918206c
MM
1492006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
150
151 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
152
878bcc43
AM
1532006-10-23 Alan Modra <amodra@bigpond.net.au>
154
155 * config/tc-m68hc11.c (md_assemble): Quiet warning.
156
8620418b
MF
1572006-10-19 Mike Frysinger <vapier@gentoo.org>
158
159 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
160 (x86_64_section_letter): Likewise.
161
b3549761
NC
1622006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
163
164 * config/tc-score.c (build_relax_frag): Compute correct
165 tc_frag_data.fixp.
166
71a75f6f
MF
1672006-10-18 Roy Marples <uberlord@gentoo.org>
168
169 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
170 elf32-sparc as a viable target for the -32 switch and any target
171 starting with elf64-sparc as a viable target for the -64 switch.
172 (sparc_target_format): For 64-bit ELF flavoured output use
173 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
174 ELF_TARGET_FORMAT.
71a75f6f
MF
175 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
176
e1b5fdd4
L
1772006-10-17 H.J. Lu <hongjiu.lu@intel.com>
178
179 * configure: Regenerated.
180
f8ef9cd7
BS
1812006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
182
183 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
184 in addition to testing for '\n'.
185 (TC_EOL_IN_INSN): Provide a default definition if necessary.
186
eb1fe072
NC
1872006-10-13 Sterling Augstine <sterling@tensilica.com>
188
189 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
190 a disjoint DW_AT range.
191
ec6e49f4
NC
1922006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
193
194 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
195
036dc3f7
PB
1962006-10-08 Paul Brook <paul@codesourcery.com>
197
198 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
199 (parse_operands): Use parse_big_immediate for OP_NILO.
200 (neon_cmode_for_logic_imm): Try smaller element sizes.
201 (neon_cmode_for_move_imm): Ditto.
202 (do_neon_logic): Handle .i64 pseudo-op.
203
3bb0c887
AM
2042006-09-29 Alan Modra <amodra@bigpond.net.au>
205
206 * po/POTFILES.in: Regenerate.
207
ef05d495
L
2082006-09-28 H.J. Lu <hongjiu.lu@intel.com>
209
210 * config/tc-i386.h (CpuMNI): Renamed to ...
211 (CpuSSSE3): This.
212 (CpuUnknownFlags): Updated.
213 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
214 and PROCESSOR_MEROM with PROCESSOR_CORE2.
215 * config/tc-i386.c: Updated.
216 * doc/c-i386.texi: Likewise.
a70ae331 217
ef05d495
L
218 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
219
d8ad03e9
NC
2202006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
221
222 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
223
df3ca5a3
NC
2242006-09-27 Nick Clifton <nickc@redhat.com>
225
226 * output-file.c (output_file_close): Prevent an infinite loop
227 reporting that stdoutput could not be closed.
228
2d447fca
JM
2292006-09-26 Mark Shinwell <shinwell@codesourcery.com>
230 Joseph Myers <joseph@codesourcery.com>
231 Ian Lance Taylor <ian@wasabisystems.com>
232 Ben Elliston <bje@wasabisystems.com>
233
234 * config/tc-arm.c (arm_cext_iwmmxt2): New.
235 (enum operand_parse_code): New code OP_RIWR_I32z.
236 (parse_operands): Handle OP_RIWR_I32z.
237 (do_iwmmxt_wmerge): New function.
238 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
239 a register.
240 (do_iwmmxt_wrwrwr_or_imm5): New function.
241 (insns): Mark instructions as RIWR_I32z as appropriate.
242 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
243 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
244 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
245 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
246 (md_begin): Handle IWMMXT2.
247 (arm_cpus): Add iwmmxt2.
248 (arm_extensions): Likewise.
249 (arm_archs): Likewise.
250
ba83aca1
BW
2512006-09-25 Bob Wilson <bob.wilson@acm.org>
252
253 * doc/as.texinfo (Overview): Revise description of --keep-locals.
254 Add xref to "Symbol Names".
255 (L): Refer to "local symbols" instead of "local labels". Move
256 definition to "Symbol Names" section; add xref to that section.
257 (Symbol Names): Use "Local Symbol Names" section to define local
258 symbols. Add "Local Labels" heading for description of temporary
259 forward/backward labels, and refer to those as "local labels".
260
539e75ad
L
2612006-09-23 H.J. Lu <hongjiu.lu@intel.com>
262
263 PR binutils/3235
264 * config/tc-i386.c (match_template): Check address size prefix
265 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
266 operand.
267
5e02f92e
AM
2682006-09-22 Alan Modra <amodra@bigpond.net.au>
269
270 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
271
885afe7b
AM
2722006-09-22 Alan Modra <amodra@bigpond.net.au>
273
274 * as.h (as_perror): Delete declaration.
275 * gdbinit.in (as_perror): Delete breakpoint.
276 * messages.c (as_perror): Delete function.
277 * doc/internals.texi: Remove as_perror description.
278 * listing.c (listing_print: Don't use as_perror.
279 * output-file.c (output_file_create, output_file_close): Likewise.
280 * symbols.c (symbol_create, symbol_clone): Likewise.
281 * write.c (write_contents): Likewise.
282 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
283 * config/tc-tic54x.c (tic54x_mlib): Likewise.
284
3aeeedbb
AM
2852006-09-22 Alan Modra <amodra@bigpond.net.au>
286
287 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
288 (ppc_handle_align): New function.
289 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
290 (SUB_SEGMENT_ALIGN): Define as zero.
291
96e9638b
BW
2922006-09-20 Bob Wilson <bob.wilson@acm.org>
293
294 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
295 (Overview): Skip cross reference in man page.
296
99ad8390
NC
2972006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
298
299 * configure.in: Add new target x86_64-pc-mingw64.
300 * configure: Regenerate.
301 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
302 * config/obj-coff.h: Add handling for TE_PEP target specific code
303 and definitions.
99ad8390
NC
304 * config/tc-i386.c: Add new targets.
305 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
306 (x86_64_target_format): Add new method for setup proper default
307 target cpu mode.
99ad8390
NC
308 * config/te-pep.h: Add new target definition header.
309 (TE_PEP): New macro: Identifies new target architecture.
310 (COFF_WITH_pex64): Set proper includes in bfd.
311 * NEWS: Mention new target.
312
73332571
BS
3132006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
314
315 * config/bfin-parse.y (binary): Change sub of const to add of negated
316 const.
317
1c0d3aa6
NC
3182006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
319
320 * config/tc-score.c: New file.
321 * config/tc-score.h: Newf file.
322 * configure.tgt: Add Score target.
323 * Makefile.am: Add Score files.
324 * Makefile.in: Regenerate.
325 * NEWS: Mention new target support.
326
4fa3602b
PB
3272006-09-16 Paul Brook <paul@codesourcery.com>
328
329 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
330 * doc/c-arm.texi (movsp): Document offset argument.
331
16dd5e42
PB
3322006-09-16 Paul Brook <paul@codesourcery.com>
333
334 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
335 unsigned int to avoid 64-bit host problems.
336
c4ae04ce
BS
3372006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
338
339 * config/bfin-parse.y (binary): Do some more constant folding for
340 additions.
341
e5d4a5a6
JB
3422006-09-13 Jan Beulich <jbeulich@novell.com>
343
344 * input-file.c (input_file_give_next_buffer): Demote as_bad to
345 as_warn.
346
1a1219cb
AM
3472006-09-13 Alan Modra <amodra@bigpond.net.au>
348
349 PR gas/3165
350 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
351 in parens.
352
f79d9c1d
AM
3532006-09-13 Alan Modra <amodra@bigpond.net.au>
354
355 * input-file.c (input_file_open): Replace as_perror with as_bad
356 so that gas exits with error on file errors. Correct error
357 message.
358 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 359 * input-file.h: Update comment.
f79d9c1d 360
f512f76f
NC
3612006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
362
363 PR gas/3172
364 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
365 registers as a sub-class of wC registers.
366
8d79fd44
AM
3672006-09-11 Alan Modra <amodra@bigpond.net.au>
368
369 PR gas/3165
370 * config/tc-mips.h (enum dwarf2_format): Forward declare.
371 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
372 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
373 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
374
6258339f
NC
3752006-09-08 Nick Clifton <nickc@redhat.com>
376
377 PR gas/3129
378 * doc/as.texinfo (Macro): Improve documentation about separating
379 macro arguments from following text.
380
f91e006c
PB
3812006-09-08 Paul Brook <paul@codesourcery.com>
382
383 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
384
466bbf93
PB
3852006-09-07 Paul Brook <paul@codesourcery.com>
386
387 * config/tc-arm.c (parse_operands): Mark operand as present.
388
428e3f1f
PB
3892006-09-04 Paul Brook <paul@codesourcery.com>
390
391 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
392 (do_neon_dyadic_if_i_d): Avoid setting U bit.
393 (do_neon_mac_maybe_scalar): Ditto.
394 (do_neon_dyadic_narrow): Force operand type to NT_integer.
395 (insns): Remove out of date comments.
396
fb25138b
NC
3972006-08-29 Nick Clifton <nickc@redhat.com>
398
399 * read.c (s_align): Initialize the 'stopc' variable to prevent
400 compiler complaints about it being used without being
401 initialized.
402 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
403 s_float_space, s_struct, cons_worker, equals): Likewise.
404
5091343a
AM
4052006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
406
407 * ecoff.c (ecoff_directive_val): Fix message typo.
408 * config/tc-ns32k.c (convert_iif): Likewise.
409 * config/tc-sh64.c (shmedia_check_limits): Likewise.
410
1f2a7e38
BW
4112006-08-25 Sterling Augustine <sterling@tensilica.com>
412 Bob Wilson <bob.wilson@acm.org>
413
414 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
415 the state of the absolute_literals directive. Remove align frag at
416 the start of the literal pool position.
417
34135039
BW
4182006-08-25 Bob Wilson <bob.wilson@acm.org>
419
420 * doc/c-xtensa.texi: Add @group commands in examples.
421
74869ac7
BW
4222006-08-24 Bob Wilson <bob.wilson@acm.org>
423
424 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
425 (INIT_LITERAL_SECTION_NAME): Delete.
426 (lit_state struct): Remove segment names, init_lit_seg, and
427 fini_lit_seg. Add lit_prefix and current_text_seg.
428 (init_literal_head_h, init_literal_head): Delete.
429 (fini_literal_head_h, fini_literal_head): Delete.
430 (xtensa_begin_directive): Move argument parsing to
431 xtensa_literal_prefix function.
432 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
433 (xtensa_literal_prefix): Parse the directive argument here and
434 record it in the lit_prefix field. Remove code to derive literal
435 section names.
436 (linkonce_len): New.
437 (get_is_linkonce_section): Use linkonce_len. Check for any
438 ".gnu.linkonce.*" section, not just text sections.
439 (md_begin): Remove initialization of deleted lit_state fields.
440 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
441 to init_literal_head and fini_literal_head.
442 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
443 when traversing literal_head list.
444 (match_section_group): New.
445 (cache_literal_section): Rewrite to determine the literal section
446 name on the fly, create the section and return it.
447 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
448 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
449 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
450 Use xtensa_get_property_section from bfd.
451 (retrieve_xtensa_section): Delete.
452 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
453 description to refer to plural literal sections and add xref to
454 the Literal Directive section.
455 (Literal Directive): Describe new rules for deriving literal section
456 names. Add footnote for special case of .init/.fini with
457 --text-section-literals.
458 (Literal Prefix Directive): Replace old naming rules with xref to the
459 Literal Directive section.
460
87a1fd79
JM
4612006-08-21 Joseph Myers <joseph@codesourcery.com>
462
463 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
464 merging with previous long opcode.
465
7148cc28
NC
4662006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
467
468 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
469 * Makefile.in: Regenerate.
470 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
471 renamed. Adjust.
472
3e9e4fcf
JB
4732006-08-16 Julian Brown <julian@codesourcery.com>
474
475 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
476 to use ARM instructions on non-ARM-supporting cores.
477 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
478 mode automatically based on cpu variant.
479 (md_begin): Call above function.
480
267d2029
JB
4812006-08-16 Julian Brown <julian@codesourcery.com>
482
483 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
484 recognized in non-unified syntax mode.
485
4be041b2
TS
4862006-08-15 Thiemo Seufer <ths@mips.com>
487 Nigel Stephens <nigel@mips.com>
488 David Ung <davidu@mips.com>
489
490 * configure.tgt: Handle mips*-sde-elf*.
491
3a93f742
TS
4922006-08-12 Thiemo Seufer <ths@networkno.de>
493
494 * config/tc-mips.c (mips16_ip): Fix argument register handling
495 for restore instruction.
496
1737851b
BW
4972006-08-08 Bob Wilson <bob.wilson@acm.org>
498
499 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
500 (out_sleb128): New.
501 (out_fixed_inc_line_addr): New.
502 (process_entries): Use out_fixed_inc_line_addr when
503 DWARF2_USE_FIXED_ADVANCE_PC is set.
504 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
505
e14e52f8
DD
5062006-08-08 DJ Delorie <dj@redhat.com>
507
508 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
509 vs full symbols so that we never have more than one pointer value
510 for any given symbol in our symbol table.
511
802f5d9e
NC
5122006-08-08 Sterling Augustine <sterling@tensilica.com>
513
514 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
515 and emit DW_AT_ranges when code in compilation unit is not
516 contiguous.
517 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
518 is not contiguous.
519 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
520 (out_debug_ranges): New function to emit .debug_ranges section
521 when code is not contiguous.
522
720abc60
NC
5232006-08-08 Nick Clifton <nickc@redhat.com>
524
525 * config/tc-arm.c (WARN_DEPRECATED): Enable.
526
f0927246
NC
5272006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
528
529 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
530 only block.
531 (pe_directive_secrel) [TE_PE]: New function.
532 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
533 loc, loc_mark_labels.
534 [TE_PE]: Handle secrel32.
535 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
536 call.
537 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
538 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
539 (md_section_align): Only round section sizes here for AOUT
540 targets.
541 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
542 (tc_pe_dwarf2_emit_offset): New function.
543 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
544 (cons_fix_new_arm): Handle O_secrel.
545 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
546 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
547 of OBJ_ELF only block.
548 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
549 tc_pe_dwarf2_emit_offset.
550
55e6e397
RS
5512006-08-04 Richard Sandiford <richard@codesourcery.com>
552
553 * config/tc-sh.c (apply_full_field_fix): New function.
554 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
555 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
556 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
557 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
558
9cd19b17
NC
5592006-08-03 Nick Clifton <nickc@redhat.com>
560
561 PR gas/2991
562 * config.in: Regenerate.
563
97f87066
JM
5642006-08-03 Joseph Myers <joseph@codesourcery.com>
565
566 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 567 for OP_RIWR_RIWC.
97f87066 568
41adaa5c
JM
5692006-08-03 Joseph Myers <joseph@codesourcery.com>
570
571 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
572 (parse_operands): Handle it.
573 (insns): Use it for tmcr and tmrc.
574
9d7cbccd
NC
5752006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
576
577 PR binutils/2983
578 * config/tc-i386.c (md_parse_option): Treat any target starting
579 with elf64_x86_64 as a viable target for the -64 switch.
580 (i386_target_format): For 64-bit ELF flavoured output use
581 ELF_TARGET_FORMAT64.
582 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
583
c973bc5c
NC
5842006-08-02 Nick Clifton <nickc@redhat.com>
585
586 PR gas/2991
587 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
588 bfd/aclocal.m4.
589 * configure.in: Run BFD_BINARY_FOPEN.
590 * configure: Regenerate.
591 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
592 file to include.
593
cfde7f70
L
5942006-08-01 H.J. Lu <hongjiu.lu@intel.com>
595
596 * config/tc-i386.c (md_assemble): Don't update
597 cpu_arch_isa_flags.
598
b4c71f56
TS
5992006-08-01 Thiemo Seufer <ths@mips.com>
600
601 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
602
54f4ddb3
TS
6032006-08-01 Thiemo Seufer <ths@mips.com>
604
605 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
606 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
607 BFD_RELOC_32 and BFD_RELOC_16.
608 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
609 md_convert_frag, md_obj_end): Fix comment formatting.
610
d103cf61
TS
6112006-07-31 Thiemo Seufer <ths@mips.com>
612
613 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
614 handling for BFD_RELOC_MIPS16_JMP.
615
601e61cd
NC
6162006-07-24 Andreas Schwab <schwab@suse.de>
617
618 PR/2756
619 * read.c (read_a_source_file): Ignore unknown text after line
620 comment character. Fix misleading comment.
621
b45619c0
NC
6222006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
623
624 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
625 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
626 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
627 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
628 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
629 doc/c-z80.texi, doc/internals.texi: Fix some typos.
630
784906c5
NC
6312006-07-21 Nick Clifton <nickc@redhat.com>
632
633 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
634 linker testsuite.
635
d5f010e9
TS
6362006-07-20 Thiemo Seufer <ths@mips.com>
637 Nigel Stephens <nigel@mips.com>
638
639 * config/tc-mips.c (md_parse_option): Don't infer optimisation
640 options from debug options.
641
35d3d567
TS
6422006-07-20 Thiemo Seufer <ths@mips.com>
643
644 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
645 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
646
401a54cf
PB
6472006-07-19 Paul Brook <paul@codesourcery.com>
648
649 * config/tc-arm.c (insns): Fix rbit Arm opcode.
650
16805f35
PB
6512006-07-18 Paul Brook <paul@codesourcery.com>
652
653 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
654 (md_convert_frag): Use correct reloc for add_pc. Use
655 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
656 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
657 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
658
d9e05e4e
AM
6592006-07-17 Mat Hostetter <mat@lcs.mit.edu>
660
661 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
662 when file and line unknown.
663
f43abd2b
TS
6642006-07-17 Thiemo Seufer <ths@mips.com>
665
666 * read.c (s_struct): Use IS_ELF.
667 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
668 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
669 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
670 s_mips_mask): Likewise.
671
a2902af6
TS
6722006-07-16 Thiemo Seufer <ths@mips.com>
673 David Ung <davidu@mips.com>
674
675 * read.c (s_struct): Handle ELF section changing.
676 * config/tc-mips.c (s_align): Leave enabling auto-align to the
677 generic code.
678 (s_change_sec): Try section changing only if we output ELF.
679
d32cad65
L
6802006-07-15 H.J. Lu <hongjiu.lu@intel.com>
681
682 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
683 CpuAmdFam10.
684 (smallest_imm_type): Remove Cpu086.
685 (i386_target_format): Likewise.
686
687 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
688 Update CpuXXX.
689
050dfa73
MM
6902006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
691 Michael Meissner <michael.meissner@amd.com>
692
693 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
694 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
695 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
696 architecture.
697 (i386_align_code): Ditto.
698 (md_assemble_code): Add support for insertq/extrq instructions,
699 swapping as needed for intel syntax.
700 (swap_imm_operands): New function to swap immediate operands.
701 (swap_operands): Deal with 4 operand instructions.
702 (build_modrm_byte): Add support for insertq instruction.
703
6b2de085
L
7042006-07-13 H.J. Lu <hongjiu.lu@intel.com>
705
706 * config/tc-i386.h (Size64): Fix a typo in comment.
707
01eaea5a
NC
7082006-07-12 Nick Clifton <nickc@redhat.com>
709
710 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 711 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
712 already been checked here.
713
1e85aad8
JW
7142006-07-07 James E Wilson <wilson@specifix.com>
715
716 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
717
1370e33d
NC
7182006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
719 Nick Clifton <nickc@redhat.com>
720
721 PR binutils/2877
722 * doc/as.texi: Fix spelling typo: branchs => branches.
723 * doc/c-m68hc11.texi: Likewise.
724 * config/tc-m68hc11.c: Likewise.
725 Support old spelling of command line switch for backwards
726 compatibility.
727
5f0fe04b
TS
7282006-07-04 Thiemo Seufer <ths@mips.com>
729 David Ung <davidu@mips.com>
730
731 * config/tc-mips.c (s_is_linkonce): New function.
732 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
733 weak, external, and linkonce symbols.
734 (pic_need_relax): Use s_is_linkonce.
735
85234291
L
7362006-06-24 H.J. Lu <hongjiu.lu@intel.com>
737
738 * doc/as.texinfo (Org): Remove space.
739 (P2align): Add "@var{abs-expr},".
740
ccc9c027
L
7412006-06-23 H.J. Lu <hongjiu.lu@intel.com>
742
743 * config/tc-i386.c (cpu_arch_tune_set): New.
744 (cpu_arch_isa): Likewise.
745 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
746 nops with short or long nop sequences based on -march=/.arch
747 and -mtune=.
748 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
749 set cpu_arch_tune and cpu_arch_tune_flags.
750 (md_parse_option): For -march=, set cpu_arch_isa and set
751 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
752 0. Set cpu_arch_tune_set to 1 for -mtune=.
753 (i386_target_format): Don't set cpu_arch_tune.
754
d4dc2f22
TS
7552006-06-23 Nigel Stephens <nigel@mips.com>
756
757 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
758 generated .sbss.* and .gnu.linkonce.sb.*.
759
a8dbcb85
TS
7602006-06-23 Thiemo Seufer <ths@mips.com>
761 David Ung <davidu@mips.com>
762
763 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
764 label_list.
765 * config/tc-mips.c (label_list): Define per-segment label_list.
766 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
767 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
768 mips_from_file_after_relocs, mips_define_label): Use per-segment
769 label_list.
770
3994f87e
TS
7712006-06-22 Thiemo Seufer <ths@mips.com>
772
773 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
774 (append_insn): Use it.
775 (md_apply_fix): Whitespace formatting.
776 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
777 mips16_extended_frag): Remove register specifier.
778 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
779 constants.
780
fa073d69
MS
7812006-06-21 Mark Shinwell <shinwell@codesourcery.com>
782
783 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
784 a directive saving VFP registers for ARMv6 or later.
785 (s_arm_unwind_save): Add parameter arch_v6 and call
786 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
787 appropriate.
788 (md_pseudo_table): Add entry for new "vsave" directive.
789 * doc/c-arm.texi: Correct error in example for "save"
790 directive (fstmdf -> fstmdx). Also document "vsave" directive.
791
8e77b565 7922006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
793 Anatoly Sokolov <aesok@post.ru>
794
a70ae331
AM
795 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
796 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
797 atmega164p/atmega324p.
798 * doc/c-avr.texi: Document new mcu and arch options.
799
8b1ad454
NC
8002006-06-17 Nick Clifton <nickc@redhat.com>
801
802 * config/tc-arm.c (enum parse_operand_result): Move outside of
803 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
804
9103f4f4
L
8052006-06-16 H.J. Lu <hongjiu.lu@intel.com>
806
807 * config/tc-i386.h (processor_type): New.
808 (arch_entry): Add type.
809
810 * config/tc-i386.c (cpu_arch_tune): New.
811 (cpu_arch_tune_flags): Likewise.
812 (cpu_arch_isa_flags): Likewise.
813 (cpu_arch): Updated.
814 (set_cpu_arch): Also update cpu_arch_isa_flags.
815 (md_assemble): Update cpu_arch_isa_flags.
816 (OPTION_MARCH): New.
817 (OPTION_MTUNE): Likewise.
818 (md_longopts): Add -march= and -mtune=.
819 (md_parse_option): Support -march= and -mtune=.
820 (md_show_usage): Add -march=CPU/-mtune=CPU.
821 (i386_target_format): Also update cpu_arch_isa_flags,
822 cpu_arch_tune and cpu_arch_tune_flags.
823
824 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
825
826 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
827
4962c51a
MS
8282006-06-15 Mark Shinwell <shinwell@codesourcery.com>
829
830 * config/tc-arm.c (enum parse_operand_result): New.
831 (struct group_reloc_table_entry): New.
832 (enum group_reloc_type): New.
833 (group_reloc_table): New array.
834 (find_group_reloc_table_entry): New function.
835 (parse_shifter_operand_group_reloc): New function.
836 (parse_address_main): New function, incorporating code
837 from the old parse_address function. To be used via...
838 (parse_address): wrapper for parse_address_main; and
839 (parse_address_group_reloc): new function, likewise.
840 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
841 OP_ADDRGLDRS, OP_ADDRGLDC.
842 (parse_operands): Support for these new operand codes.
843 New macro po_misc_or_fail_no_backtrack.
844 (encode_arm_cp_address): Preserve group relocations.
845 (insns): Modify to use the above operand codes where group
846 relocations are permitted.
847 (md_apply_fix): Handle the group relocations
848 ALU_PC_G0_NC through LDC_SB_G2.
849 (tc_gen_reloc): Likewise.
850 (arm_force_relocation): Leave group relocations for the linker.
851 (arm_fix_adjustable): Likewise.
852
cd2f129f
JB
8532006-06-15 Julian Brown <julian@codesourcery.com>
854
855 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
856 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
857 relocs properly.
858
46e883c5
L
8592006-06-12 H.J. Lu <hongjiu.lu@intel.com>
860
861 * config/tc-i386.c (process_suffix): Don't add rex64 for
862 "xchg %rax,%rax".
863
1787fe5b
TS
8642006-06-09 Thiemo Seufer <ths@mips.com>
865
866 * config/tc-mips.c (mips_ip): Maintain argument count.
867
96f989c2
AM
8682006-06-09 Alan Modra <amodra@bigpond.net.au>
869
870 * config/tc-iq2000.c: Include sb.h.
871
7c752c2a
TS
8722006-06-08 Nigel Stephens <nigel@mips.com>
873
874 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
875 aliases for better compatibility with SGI tools.
876
03bf704f
AM
8772006-06-08 Alan Modra <amodra@bigpond.net.au>
878
879 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
880 * Makefile.am (GASLIBS): Expand @BFDLIB@.
881 (BFDVER_H): Delete.
882 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
883 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
884 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
885 Run "make dep-am".
886 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
887 * Makefile.in: Regenerate.
888 * doc/Makefile.in: Regenerate.
889 * configure: Regenerate.
890
6648b7cf
JM
8912006-06-07 Joseph S. Myers <joseph@codesourcery.com>
892
893 * po/Make-in (pdf, ps): New dummy targets.
894
037e8744
JB
8952006-06-07 Julian Brown <julian@codesourcery.com>
896
897 * config/tc-arm.c (stdarg.h): include.
898 (arm_it): Add uncond_value field. Add isvec and issingle to operand
899 array.
900 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
901 REG_TYPE_NSDQ (single, double or quad vector reg).
902 (reg_expected_msgs): Update.
903 (BAD_FPU): Add macro for unsupported FPU instruction error.
904 (parse_neon_type): Support 'd' as an alias for .f64.
905 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
906 sets of registers.
907 (parse_vfp_reg_list): Don't update first arg on error.
908 (parse_neon_mov): Support extra syntax for VFP moves.
909 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
910 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
911 (parse_operands): Support isvec, issingle operands fields, new parse
912 codes above.
913 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
914 msr variants.
915 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
916 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
917 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
918 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
919 shapes.
920 (neon_shape): Redefine in terms of above.
921 (neon_shape_class): New enumeration, table of shape classes.
922 (neon_shape_el): New enumeration. One element of a shape.
923 (neon_shape_el_size): Register widths of above, where appropriate.
924 (neon_shape_info): New struct. Info for shape table.
925 (neon_shape_tab): New array.
926 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
927 (neon_check_shape): Rewrite as...
928 (neon_select_shape): New function to classify instruction shapes,
929 driven by new table neon_shape_tab array.
930 (neon_quad): New function. Return 1 if shape should set Q flag in
931 instructions (or equivalent), 0 otherwise.
932 (type_chk_of_el_type): Support F64.
933 (el_type_of_type_chk): Likewise.
934 (neon_check_type): Add support for VFP type checking (VFP data
935 elements fill their containing registers).
936 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
937 in thumb mode for VFP instructions.
938 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
939 and encode the current instruction as if it were that opcode.
940 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
941 arguments, call function in PFN.
942 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
943 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
944 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
945 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
946 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
947 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
948 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
949 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
950 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
951 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
952 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
953 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
954 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
955 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
956 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
957 neon_quad.
958 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
959 between VFP and Neon turns out to belong to Neon. Perform
960 architecture check and fill in condition field if appropriate.
961 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
962 (do_neon_cvt): Add support for VFP variants of instructions.
963 (neon_cvt_flavour): Extend to cover VFP conversions.
964 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
965 vmov variants.
966 (do_neon_ldr_str): Handle single-precision VFP load/store.
967 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
968 NS_NULL not NS_IGNORE.
969 (opcode_tag): Add OT_csuffixF for operands which either take a
970 conditional suffix, or have 0xF in the condition field.
971 (md_assemble): Add support for OT_csuffixF.
972 (NCE): Replace macro with...
973 (NCE_tag, NCE, NCEF): New macros.
974 (nCE): Replace macro with...
975 (nCE_tag, nCE, nCEF): New macros.
976 (insns): Add support for VFP insns or VFP versions of insns msr,
977 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
978 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
979 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
980 VFP/Neon insns together.
981
ebd1c875
AM
9822006-06-07 Alan Modra <amodra@bigpond.net.au>
983 Ladislav Michl <ladis@linux-mips.org>
984
985 * app.c: Don't include headers already included by as.h.
986 * as.c: Likewise.
987 * atof-generic.c: Likewise.
988 * cgen.c: Likewise.
989 * dwarf2dbg.c: Likewise.
990 * expr.c: Likewise.
991 * input-file.c: Likewise.
992 * input-scrub.c: Likewise.
993 * macro.c: Likewise.
994 * output-file.c: Likewise.
995 * read.c: Likewise.
996 * sb.c: Likewise.
997 * config/bfin-lex.l: Likewise.
998 * config/obj-coff.h: Likewise.
999 * config/obj-elf.h: Likewise.
1000 * config/obj-som.h: Likewise.
1001 * config/tc-arc.c: Likewise.
1002 * config/tc-arm.c: Likewise.
1003 * config/tc-avr.c: Likewise.
1004 * config/tc-bfin.c: Likewise.
1005 * config/tc-cris.c: Likewise.
1006 * config/tc-d10v.c: Likewise.
1007 * config/tc-d30v.c: Likewise.
1008 * config/tc-dlx.h: Likewise.
1009 * config/tc-fr30.c: Likewise.
1010 * config/tc-frv.c: Likewise.
1011 * config/tc-h8300.c: Likewise.
1012 * config/tc-hppa.c: Likewise.
1013 * config/tc-i370.c: Likewise.
1014 * config/tc-i860.c: Likewise.
1015 * config/tc-i960.c: Likewise.
1016 * config/tc-ip2k.c: Likewise.
1017 * config/tc-iq2000.c: Likewise.
1018 * config/tc-m32c.c: Likewise.
1019 * config/tc-m32r.c: Likewise.
1020 * config/tc-maxq.c: Likewise.
1021 * config/tc-mcore.c: Likewise.
1022 * config/tc-mips.c: Likewise.
1023 * config/tc-mmix.c: Likewise.
1024 * config/tc-mn10200.c: Likewise.
1025 * config/tc-mn10300.c: Likewise.
1026 * config/tc-msp430.c: Likewise.
1027 * config/tc-mt.c: Likewise.
1028 * config/tc-ns32k.c: Likewise.
1029 * config/tc-openrisc.c: Likewise.
1030 * config/tc-ppc.c: Likewise.
1031 * config/tc-s390.c: Likewise.
1032 * config/tc-sh.c: Likewise.
1033 * config/tc-sh64.c: Likewise.
1034 * config/tc-sparc.c: Likewise.
1035 * config/tc-tic30.c: Likewise.
1036 * config/tc-tic4x.c: Likewise.
1037 * config/tc-tic54x.c: Likewise.
1038 * config/tc-v850.c: Likewise.
1039 * config/tc-vax.c: Likewise.
1040 * config/tc-xc16x.c: Likewise.
1041 * config/tc-xstormy16.c: Likewise.
1042 * config/tc-xtensa.c: Likewise.
1043 * config/tc-z80.c: Likewise.
1044 * config/tc-z8k.c: Likewise.
1045 * macro.h: Don't include sb.h or ansidecl.h.
1046 * sb.h: Don't include stdio.h or ansidecl.h.
1047 * cond.c: Include sb.h.
1048 * itbl-lex.l: Include as.h instead of other system headers.
1049 * itbl-parse.y: Likewise.
1050 * itbl-ops.c: Similarly.
1051 * itbl-ops.h: Don't include as.h or ansidecl.h.
1052 * config/bfin-defs.h: Don't include bfd.h or as.h.
1053 * config/bfin-parse.y: Include as.h instead of other system headers.
1054
9622b051
AM
10552006-06-06 Ben Elliston <bje@au.ibm.com>
1056 Anton Blanchard <anton@samba.org>
1057
1058 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1059 (md_show_usage): Document it.
1060 (ppc_setup_opcodes): Test power6 opcode flag bits.
1061 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1062
65263ce3
TS
10632006-06-06 Thiemo Seufer <ths@mips.com>
1064 Chao-ying Fu <fu@mips.com>
1065
1066 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1067 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1068 (macro_build): Update comment.
1069 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1070 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1071 CPU_HAS_MDMX.
1072 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1073 MIPS_CPU_ASE_MDMX flags for sb1.
1074
a9e24354
TS
10752006-06-05 Thiemo Seufer <ths@mips.com>
1076
1077 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1078 appropriate.
1079 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1080 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1081 and MT instructions a fatal error. Use INSERT_OPERAND where
1082 appropriate. Improve warnings for break and wait code overflows.
1083 Use symbolic constant of OP_MASK_COPZ.
1084 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1085
4cfe2c59
DJ
10862006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1087
1088 * po/Make-in (top_builddir): Define.
1089
e10fad12
JM
10902006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1091
1092 * doc/Makefile.am (TEXI2DVI): Define.
1093 * doc/Makefile.in: Regenerate.
1094 * doc/c-arc.texi: Fix typo.
1095
12e64c2c
AM
10962006-06-01 Alan Modra <amodra@bigpond.net.au>
1097
1098 * config/obj-ieee.c: Delete.
1099 * config/obj-ieee.h: Delete.
1100 * Makefile.am (OBJ_FORMATS): Remove ieee.
1101 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1102 (obj-ieee.o): Remove rule.
1103 * Makefile.in: Regenerate.
1104 * configure.in (atof): Remove tahoe.
1105 (OBJ_MAYBE_IEEE): Don't define.
1106 * configure: Regenerate.
1107 * config.in: Regenerate.
1108 * doc/Makefile.in: Regenerate.
1109 * po/POTFILES.in: Regenerate.
1110
20e95c23
DJ
11112006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1112
1113 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1114 and LIBINTL_DEP everywhere.
1115 (INTLLIBS): Remove.
1116 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1117 * acinclude.m4: Include new gettext macros.
1118 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1119 Remove local code for po/Makefile.
1120 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1121
eebf07fb
NC
11222006-05-30 Nick Clifton <nickc@redhat.com>
1123
1124 * po/es.po: Updated Spanish translation.
1125
b6aee19e
DC
11262006-05-06 Denis Chertykov <denisc@overta.ru>
1127
1128 * doc/c-avr.texi: New file.
1129 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1130 * doc/all.texi: Set AVR
1131 * doc/as.texinfo: Include c-avr.texi
1132
f8fdc850 11332006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1134
f8fdc850
JZ
1135 * config/bfin-parse.y (check_macfunc): Loose the condition of
1136 calling check_multiply_halfregs ().
1137
a3205465
JZ
11382006-05-25 Jie Zhang <jie.zhang@analog.com>
1139
1140 * config/bfin-parse.y (asm_1): Better check and deal with
1141 vector and scalar Multiply 16-Bit Operands instructions.
1142
9b52905e
NC
11432006-05-24 Nick Clifton <nickc@redhat.com>
1144
1145 * config/tc-hppa.c: Convert to ISO C90 format.
1146 * config/tc-hppa.h: Likewise.
1147
11482006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1149 Randolph Chung <randolph@tausq.org>
a70ae331 1150
9b52905e
NC
1151 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1152 is_tls_ieoff, is_tls_leoff): Define.
1153 (fix_new_hppa): Handle TLS.
1154 (cons_fix_new_hppa): Likewise.
1155 (pa_ip): Likewise.
1156 (md_apply_fix): Handle TLS relocs.
1157 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1158
a70ae331 11592006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1160
1161 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1162
ad3fea08
TS
11632006-05-23 Thiemo Seufer <ths@mips.com>
1164 David Ung <davidu@mips.com>
1165 Nigel Stephens <nigel@mips.com>
1166
1167 [ gas/ChangeLog ]
1168 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1169 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1170 ISA_HAS_MXHC1): New macros.
1171 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1172 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1173 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1174 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1175 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1176 (mips_after_parse_args): Change default handling of float register
1177 size to account for 32bit code with 64bit FP. Better sanity checking
1178 of ISA/ASE/ABI option combinations.
1179 (s_mipsset): Support switching of GPR and FPR sizes via
1180 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1181 options.
1182 (mips_elf_final_processing): We should record the use of 64bit FP
1183 registers in 32bit code but we don't, because ELF header flags are
1184 a scarce ressource.
1185 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1186 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1187 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1188 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1189 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1190 missing -march options. Document .set arch=CPU. Move .set smartmips
1191 to ASE page. Use @code for .set FOO examples.
1192
8b64503a
JZ
11932006-05-23 Jie Zhang <jie.zhang@analog.com>
1194
1195 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1196 if needed.
1197
403022e0
JZ
11982006-05-23 Jie Zhang <jie.zhang@analog.com>
1199
1200 * config/bfin-defs.h (bfin_equals): Remove declaration.
1201 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1202 * config/tc-bfin.c (bfin_name_is_register): Remove.
1203 (bfin_equals): Remove.
1204 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1205 (bfin_name_is_register): Remove declaration.
1206
7455baf8
TS
12072006-05-19 Thiemo Seufer <ths@mips.com>
1208 Nigel Stephens <nigel@mips.com>
1209
1210 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1211 (mips_oddfpreg_ok): New function.
1212 (mips_ip): Use it.
1213
707bfff6
TS
12142006-05-19 Thiemo Seufer <ths@mips.com>
1215 David Ung <davidu@mips.com>
1216
1217 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1218 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1219 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1220 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1221 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1222 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1223 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1224 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1225 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1226 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1227 reg_names_o32, reg_names_n32n64): Define register classes.
1228 (reg_lookup): New function, use register classes.
1229 (md_begin): Reserve register names in the symbol table. Simplify
1230 OBJ_ELF defines.
1231 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1232 Use reg_lookup.
1233 (mips16_ip): Use reg_lookup.
1234 (tc_get_register): Likewise.
1235 (tc_mips_regname_to_dw2regnum): New function.
1236
1df69f4f
TS
12372006-05-19 Thiemo Seufer <ths@mips.com>
1238
1239 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1240 Un-constify string argument.
1241 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1242 Likewise.
1243 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1244 Likewise.
1245 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1246 Likewise.
1247 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1248 Likewise.
1249 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1250 Likewise.
1251 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1252 Likewise.
1253
377260ba
NS
12542006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1255
1256 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1257 cfloat/m68881 to correct architecture before using it.
1258
cce7653b
NC
12592006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1260
a70ae331 1261 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1262 constant values.
1263
b0796911
PB
12642006-05-15 Paul Brook <paul@codesourcery.com>
1265
1266 * config/tc-arm.c (arm_adjust_symtab): Use
1267 bfd_is_arm_special_symbol_name.
1268
64b607e6
BW
12692006-05-15 Bob Wilson <bob.wilson@acm.org>
1270
1271 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1272 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1273 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1274 Handle errors from calls to xtensa_opcode_is_* functions.
1275
9b3f89ee
TS
12762006-05-14 Thiemo Seufer <ths@mips.com>
1277
1278 * config/tc-mips.c (macro_build): Test for currently active
1279 mips16 option.
1280 (mips16_ip): Reject invalid opcodes.
1281
370b66a1
CD
12822006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1283
1284 * doc/as.texinfo: Rename "Index" to "AS Index",
1285 and "ABORT" to "ABORT (COFF)".
1286
b6895b4f
PB
12872006-05-11 Paul Brook <paul@codesourcery.com>
1288
1289 * config/tc-arm.c (parse_half): New function.
1290 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1291 (parse_operands): Ditto.
1292 (do_mov16): Reject invalid relocations.
1293 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1294 (insns): Replace Iffff with HALF.
1295 (md_apply_fix): Add MOVW and MOVT relocs.
1296 (tc_gen_reloc): Ditto.
1297 * doc/c-arm.texi: Document relocation operators
1298
e28387c3
PB
12992006-05-11 Paul Brook <paul@codesourcery.com>
1300
1301 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1302
89ee2ebe
TS
13032006-05-11 Thiemo Seufer <ths@mips.com>
1304
1305 * config/tc-mips.c (append_insn): Don't check the range of j or
1306 jal addresses.
1307
53baae48
NC
13082006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1309
1310 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1311 relocs against external symbols for WinCE targets.
53baae48
NC
1312 (md_apply_fix): Likewise.
1313
4e2a74a8
TS
13142006-05-09 David Ung <davidu@mips.com>
1315
1316 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1317 j or jal address.
1318
337ff0a5
NC
13192006-05-09 Nick Clifton <nickc@redhat.com>
1320
1321 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1322 against symbols which are not going to be placed into the symbol
1323 table.
1324
8c9f705e
BE
13252006-05-09 Ben Elliston <bje@au.ibm.com>
1326
1327 * expr.c (operand): Remove `if (0 && ..)' statement and
1328 subsequently unused target_op label. Collapse `if (1 || ..)'
1329 statement.
1330 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1331 separately above the switch.
1332
2fd0d2ac
NC
13332006-05-08 Nick Clifton <nickc@redhat.com>
1334
1335 PR gas/2623
1336 * config/tc-msp430.c (line_separator_character): Define as |.
1337
e16bfa71
TS
13382006-05-08 Thiemo Seufer <ths@mips.com>
1339 Nigel Stephens <nigel@mips.com>
1340 David Ung <davidu@mips.com>
1341
1342 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1343 (mips_opts): Likewise.
1344 (file_ase_smartmips): New variable.
1345 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1346 (macro_build): Handle SmartMIPS instructions.
1347 (mips_ip): Likewise.
1348 (md_longopts): Add argument handling for smartmips.
1349 (md_parse_options, mips_after_parse_args): Likewise.
1350 (s_mipsset): Add .set smartmips support.
1351 (md_show_usage): Document -msmartmips/-mno-smartmips.
1352 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1353 .set smartmips.
1354 * doc/c-mips.texi: Likewise.
1355
32638454
AM
13562006-05-08 Alan Modra <amodra@bigpond.net.au>
1357
1358 * write.c (relax_segment): Add pass count arg. Don't error on
1359 negative org/space on first two passes.
1360 (relax_seg_info): New struct.
1361 (relax_seg, write_object_file): Adjust.
1362 * write.h (relax_segment): Update prototype.
1363
b7fc2769
JB
13642006-05-05 Julian Brown <julian@codesourcery.com>
1365
1366 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1367 checking.
1368 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1369 architecture version checks.
1370 (insns): Allow overlapping instructions to be used in VFP mode.
1371
7f841127
L
13722006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1373
1374 PR gas/2598
1375 * config/obj-elf.c (obj_elf_change_section): Allow user
1376 specified SHF_ALPHA_GPREL.
1377
73160847
NC
13782006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1379
1380 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1381 for PMEM related expressions.
1382
56487c55
NC
13832006-05-05 Nick Clifton <nickc@redhat.com>
1384
1385 PR gas/2582
1386 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1387 insertion of a directory separator character into a string at a
1388 given offset. Uses heuristics to decide when to use a backslash
1389 character rather than a forward-slash character.
1390 (dwarf2_directive_loc): Use the macro.
1391 (out_debug_info): Likewise.
1392
d43b4baf
TS
13932006-05-05 Thiemo Seufer <ths@mips.com>
1394 David Ung <davidu@mips.com>
1395
1396 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1397 instruction.
1398 (macro): Add new case M_CACHE_AB.
1399
088fa78e
KH
14002006-05-04 Kazu Hirata <kazu@codesourcery.com>
1401
1402 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1403 (opcode_lookup): Issue a warning for opcode with
1404 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1405 identical to OT_cinfix3.
1406 (TxC3w, TC3w, tC3w): New.
1407 (insns): Use tC3w and TC3w for comparison instructions with
1408 's' suffix.
1409
c9049d30
AM
14102006-05-04 Alan Modra <amodra@bigpond.net.au>
1411
1412 * subsegs.h (struct frchain): Delete frch_seg.
1413 (frchain_root): Delete.
1414 (seg_info): Define as macro.
1415 * subsegs.c (frchain_root): Delete.
1416 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1417 (subsegs_begin, subseg_change): Adjust for above.
1418 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1419 rather than to one big list.
1420 (subseg_get): Don't special case abs, und sections.
1421 (subseg_new, subseg_force_new): Don't set frchainP here.
1422 (seg_info): Delete.
1423 (subsegs_print_statistics): Adjust frag chain control list traversal.
1424 * debug.c (dmp_frags): Likewise.
1425 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1426 at frchain_root. Make use of known frchain ordering.
1427 (last_frag_for_seg): Likewise.
1428 (get_frag_fix): Likewise. Add seg param.
1429 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1430 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1431 (SUB_SEGMENT_ALIGN): Likewise.
1432 (subsegs_finish): Adjust frchain list traversal.
1433 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1434 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1435 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1436 (xtensa_fix_b_j_loop_end_frags): Likewise.
1437 (xtensa_fix_close_loop_end_frags): Likewise.
1438 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1439 (retrieve_segment_info): Delete frch_seg initialisation.
1440
f592407e
AM
14412006-05-03 Alan Modra <amodra@bigpond.net.au>
1442
1443 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1444 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1445 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1446 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1447
df7849c5
JM
14482006-05-02 Joseph Myers <joseph@codesourcery.com>
1449
1450 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1451 here.
1452 (md_apply_fix3): Multiply offset by 4 here for
1453 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1454
2d545b82
L
14552006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1456 Jan Beulich <jbeulich@novell.com>
1457
1458 * config/tc-i386.c (output_invalid_buf): Change size for
1459 unsigned char.
1460 * config/tc-tic30.c (output_invalid_buf): Likewise.
1461
1462 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1463 unsigned char.
1464 * config/tc-tic30.c (output_invalid): Likewise.
1465
38fc1cb1
DJ
14662006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1467
1468 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1469 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1470 (asconfig.texi): Don't set top_srcdir.
1471 * doc/as.texinfo: Don't use top_srcdir.
1472 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1473
2d545b82
L
14742006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1475
1476 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1477 * config/tc-tic30.c (output_invalid_buf): Likewise.
1478
1479 * config/tc-i386.c (output_invalid): Use snprintf instead of
1480 sprintf.
1481 * config/tc-ia64.c (declare_register_set): Likewise.
1482 (emit_one_bundle): Likewise.
1483 (check_dependencies): Likewise.
1484 * config/tc-tic30.c (output_invalid): Likewise.
1485
a8bc6c78
PB
14862006-05-02 Paul Brook <paul@codesourcery.com>
1487
1488 * config/tc-arm.c (arm_optimize_expr): New function.
1489 * config/tc-arm.h (md_optimize_expr): Define
1490 (arm_optimize_expr): Add prototype.
1491 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1492
58633d9a
BE
14932006-05-02 Ben Elliston <bje@au.ibm.com>
1494
22772e33
BE
1495 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1496 field unsigned.
1497
58633d9a
BE
1498 * sb.h (sb_list_vector): Move to sb.c.
1499 * sb.c (free_list): Use type of sb_list_vector directly.
1500 (sb_build): Fix off-by-one error in assertion about `size'.
1501
89cdfe57
BE
15022006-05-01 Ben Elliston <bje@au.ibm.com>
1503
1504 * listing.c (listing_listing): Remove useless loop.
1505 * macro.c (macro_expand): Remove is_positional local variable.
1506 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1507 and simplify surrounding expressions, where possible.
1508 (assign_symbol): Likewise.
1509 (s_weakref): Likewise.
1510 * symbols.c (colon): Likewise.
1511
c35da140
AM
15122006-05-01 James Lemke <jwlemke@wasabisystems.com>
1513
1514 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1515
9bcd4f99
TS
15162006-04-30 Thiemo Seufer <ths@mips.com>
1517 David Ung <davidu@mips.com>
1518
1519 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1520 (mips_immed): New table that records various handling of udi
1521 instruction patterns.
1522 (mips_ip): Adds udi handling.
1523
001ae1a4
AM
15242006-04-28 Alan Modra <amodra@bigpond.net.au>
1525
1526 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1527 of list rather than beginning.
1528
136da414
JB
15292006-04-26 Julian Brown <julian@codesourcery.com>
1530
1531 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1532 (is_quarter_float): Rename from above. Simplify slightly.
1533 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1534 number.
1535 (parse_neon_mov): Parse floating-point constants.
1536 (neon_qfloat_bits): Fix encoding.
1537 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1538 preference to integer encoding when using the F32 type.
1539
dcbf9037
JB
15402006-04-26 Julian Brown <julian@codesourcery.com>
1541
1542 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1543 zero-initialising structures containing it will lead to invalid types).
1544 (arm_it): Add vectype to each operand.
1545 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1546 defined field.
1547 (neon_typed_alias): New structure. Extra information for typed
1548 register aliases.
1549 (reg_entry): Add neon type info field.
1550 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1551 Break out alternative syntax for coprocessor registers, etc. into...
1552 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1553 out from arm_reg_parse.
1554 (parse_neon_type): Move. Return SUCCESS/FAIL.
1555 (first_error): New function. Call to ensure first error which occurs is
1556 reported.
1557 (parse_neon_operand_type): Parse exactly one type.
1558 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1559 (parse_typed_reg_or_scalar): New function. Handle core of both
1560 arm_typed_reg_parse and parse_scalar.
1561 (arm_typed_reg_parse): Parse a register with an optional type.
1562 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1563 result.
1564 (parse_scalar): Parse a Neon scalar with optional type.
1565 (parse_reg_list): Use first_error.
1566 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1567 (neon_alias_types_same): New function. Return true if two (alias) types
1568 are the same.
1569 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1570 of elements.
1571 (insert_reg_alias): Return new reg_entry not void.
1572 (insert_neon_reg_alias): New function. Insert type/index information as
1573 well as register for alias.
1574 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1575 make typed register aliases accordingly.
1576 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1577 of line.
1578 (s_unreq): Delete type information if present.
1579 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1580 (s_arm_unwind_save_mmxwcg): Likewise.
1581 (s_arm_unwind_movsp): Likewise.
1582 (s_arm_unwind_setfp): Likewise.
1583 (parse_shift): Likewise.
1584 (parse_shifter_operand): Likewise.
1585 (parse_address): Likewise.
1586 (parse_tb): Likewise.
1587 (tc_arm_regname_to_dw2regnum): Likewise.
1588 (md_pseudo_table): Add dn, qn.
1589 (parse_neon_mov): Handle typed operands.
1590 (parse_operands): Likewise.
1591 (neon_type_mask): Add N_SIZ.
1592 (N_ALLMODS): New macro.
1593 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1594 (el_type_of_type_chk): Add some safeguards.
1595 (modify_types_allowed): Fix logic bug.
1596 (neon_check_type): Handle operands with types.
1597 (neon_three_same): Remove redundant optional arg handling.
1598 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1599 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1600 (do_neon_step): Adjust accordingly.
1601 (neon_cmode_for_logic_imm): Use first_error.
1602 (do_neon_bitfield): Call neon_check_type.
1603 (neon_dyadic): Rename to...
1604 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1605 to allow modification of type of the destination.
1606 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1607 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1608 (do_neon_compare): Make destination be an untyped bitfield.
1609 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1610 (neon_mul_mac): Return early in case of errors.
1611 (neon_move_immediate): Use first_error.
1612 (neon_mac_reg_scalar_long): Fix type to include scalar.
1613 (do_neon_dup): Likewise.
1614 (do_neon_mov): Likewise (in several places).
1615 (do_neon_tbl_tbx): Fix type.
1616 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1617 (do_neon_ld_dup): Exit early in case of errors and/or use
1618 first_error.
1619 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1620 Handle .dn/.qn directives.
1621 (REGDEF): Add zero for reg_entry neon field.
1622
5287ad62
JB
16232006-04-26 Julian Brown <julian@codesourcery.com>
1624
1625 * config/tc-arm.c (limits.h): Include.
1626 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1627 (fpu_vfp_v3_or_neon_ext): Declare constants.
1628 (neon_el_type): New enumeration of types for Neon vector elements.
1629 (neon_type_el): New struct. Define type and size of a vector element.
1630 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1631 instruction.
1632 (neon_type): Define struct. The type of an instruction.
1633 (arm_it): Add 'vectype' for the current instruction.
1634 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1635 (vfp_sp_reg_pos): Rename to...
1636 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1637 tags.
1638 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1639 (Neon D or Q register).
1640 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1641 register.
1642 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1643 (my_get_expression): Allow above constant as argument to accept
1644 64-bit constants with optional prefix.
1645 (arm_reg_parse): Add extra argument to return the specific type of
1646 register in when either a D or Q register (REG_TYPE_NDQ) is
1647 requested. Can be NULL.
1648 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1649 (parse_reg_list): Update for new arm_reg_parse args.
1650 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1651 (parse_neon_el_struct_list): New function. Parse element/structure
1652 register lists for VLD<n>/VST<n> instructions.
1653 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1654 (s_arm_unwind_save_mmxwr): Likewise.
1655 (s_arm_unwind_save_mmxwcg): Likewise.
1656 (s_arm_unwind_movsp): Likewise.
1657 (s_arm_unwind_setfp): Likewise.
1658 (parse_big_immediate): New function. Parse an immediate, which may be
1659 64 bits wide. Put results in inst.operands[i].
1660 (parse_shift): Update for new arm_reg_parse args.
1661 (parse_address): Likewise. Add parsing of alignment specifiers.
1662 (parse_neon_mov): Parse the operands of a VMOV instruction.
1663 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1664 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1665 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1666 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1667 (parse_operands): Handle new codes above.
1668 (encode_arm_vfp_sp_reg): Rename to...
1669 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1670 selected VFP version only supports D0-D15.
1671 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1672 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1673 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1674 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1675 encode_arm_vfp_reg name, and allow 32 D regs.
1676 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1677 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1678 regs.
1679 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1680 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1681 constant-load and conversion insns introduced with VFPv3.
1682 (neon_tab_entry): New struct.
1683 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1684 those which are the targets of pseudo-instructions.
1685 (neon_opc): Enumerate opcodes, use as indices into...
1686 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1687 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1688 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1689 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1690 neon_enc_tab.
1691 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1692 Neon instructions.
1693 (neon_type_mask): New. Compact type representation for type checking.
1694 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1695 permitted type combinations.
1696 (N_IGNORE_TYPE): New macro.
1697 (neon_check_shape): New function. Check an instruction shape for
1698 multiple alternatives. Return the specific shape for the current
1699 instruction.
1700 (neon_modify_type_size): New function. Modify a vector type and size,
1701 depending on the bit mask in argument 1.
1702 (neon_type_promote): New function. Convert a given "key" type (of an
1703 operand) into the correct type for a different operand, based on a bit
1704 mask.
1705 (type_chk_of_el_type): New function. Convert a type and size into the
1706 compact representation used for type checking.
1707 (el_type_of_type_ckh): New function. Reverse of above (only when a
1708 single bit is set in the bit mask).
1709 (modify_types_allowed): New function. Alter a mask of allowed types
1710 based on a bit mask of modifications.
1711 (neon_check_type): New function. Check the type of the current
1712 instruction against the variable argument list. The "key" type of the
1713 instruction is returned.
1714 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1715 a Neon data-processing instruction depending on whether we're in ARM
1716 mode or Thumb-2 mode.
1717 (neon_logbits): New function.
1718 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1719 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1720 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1721 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1722 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1723 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1724 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1725 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1726 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1727 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1728 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1729 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1730 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1731 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1732 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1733 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1734 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1735 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1736 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1737 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1738 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1739 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1740 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1741 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1742 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1743 helpers.
1744 (parse_neon_type): New function. Parse Neon type specifier.
1745 (opcode_lookup): Allow parsing of Neon type specifiers.
1746 (REGNUM2, REGSETH, REGSET2): New macros.
1747 (reg_names): Add new VFPv3 and Neon registers.
1748 (NUF, nUF, NCE, nCE): New macros for opcode table.
1749 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1750 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1751 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1752 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1753 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1754 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1755 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1756 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1757 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1758 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1759 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1760 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1761 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1762 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1763 fto[us][lh][sd].
1764 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1765 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1766 (arm_option_cpu_value): Add vfp3 and neon.
1767 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1768 VFPv1 attribute.
1769
1946c96e
BW
17702006-04-25 Bob Wilson <bob.wilson@acm.org>
1771
1772 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1773 syntax instead of hardcoded opcodes with ".w18" suffixes.
1774 (wide_branch_opcode): New.
1775 (build_transition): Use it to check for wide branch opcodes with
1776 either ".w18" or ".w15" suffixes.
1777
5033a645
BW
17782006-04-25 Bob Wilson <bob.wilson@acm.org>
1779
1780 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1781 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1782 frag's is_literal flag.
1783
395fa56f
BW
17842006-04-25 Bob Wilson <bob.wilson@acm.org>
1785
1786 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1787
708587a4
KH
17882006-04-23 Kazu Hirata <kazu@codesourcery.com>
1789
1790 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1791 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1792 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1793 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1794 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1795
8463be01
PB
17962005-04-20 Paul Brook <paul@codesourcery.com>
1797
1798 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1799 all targets.
1800 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1801
f26a5955
AM
18022006-04-19 Alan Modra <amodra@bigpond.net.au>
1803
1804 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1805 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1806 Make some cpus unsupported on ELF. Run "make dep-am".
1807 * Makefile.in: Regenerate.
1808
241a6c40
AM
18092006-04-19 Alan Modra <amodra@bigpond.net.au>
1810
1811 * configure.in (--enable-targets): Indent help message.
1812 * configure: Regenerate.
1813
bb8f5920
L
18142006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1815
1816 PR gas/2533
1817 * config/tc-i386.c (i386_immediate): Check illegal immediate
1818 register operand.
1819
23d9d9de
AM
18202006-04-18 Alan Modra <amodra@bigpond.net.au>
1821
64e74474
AM
1822 * config/tc-i386.c: Formatting.
1823 (output_disp, output_imm): ISO C90 params.
1824
6cbe03fb
AM
1825 * frags.c (frag_offset_fixed_p): Constify args.
1826 * frags.h (frag_offset_fixed_p): Ditto.
1827
23d9d9de
AM
1828 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1829 (COFF_MAGIC): Delete.
a37d486e
AM
1830
1831 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1832
e7403566
DJ
18332006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1834
1835 * po/POTFILES.in: Regenerated.
1836
58ab4f3d
MM
18372006-04-16 Mark Mitchell <mark@codesourcery.com>
1838
1839 * doc/as.texinfo: Mention that some .type syntaxes are not
1840 supported on all architectures.
1841
482fd9f9
BW
18422006-04-14 Sterling Augustine <sterling@tensilica.com>
1843
1844 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1845 instructions when such transformations have been disabled.
1846
05d58145
BW
18472006-04-10 Sterling Augustine <sterling@tensilica.com>
1848
1849 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1850 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1851 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1852 decoding the loop instructions. Remove current_offset variable.
1853 (xtensa_fix_short_loop_frags): Likewise.
1854 (min_bytes_to_other_loop_end): Remove current_offset argument.
1855
9e75b3fa
AM
18562006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1857
a37d486e 1858 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1859 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1860
d727e8c2
NC
18612006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1862
1863 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1864 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1865 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1866 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1867 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1868 at90can64, at90usb646, at90usb647, at90usb1286 and
1869 at90usb1287.
1870 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1871
d252fdde
PB
18722006-04-07 Paul Brook <paul@codesourcery.com>
1873
1874 * config/tc-arm.c (parse_operands): Set default error message.
1875
ab1eb5fe
PB
18762006-04-07 Paul Brook <paul@codesourcery.com>
1877
1878 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1879
7ae2971b
PB
18802006-04-07 Paul Brook <paul@codesourcery.com>
1881
1882 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1883
53365c0d
PB
18842006-04-07 Paul Brook <paul@codesourcery.com>
1885
1886 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1887 (move_or_literal_pool): Handle Thumb-2 instructions.
1888 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1889
45aa61fe
AM
18902006-04-07 Alan Modra <amodra@bigpond.net.au>
1891
1892 PR 2512.
1893 * config/tc-i386.c (match_template): Move 64-bit operand tests
1894 inside loop.
1895
108a6f8e
CD
18962006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1897
1898 * po/Make-in: Add install-html target.
1899 * Makefile.am: Add install-html and install-html-recursive targets.
1900 * Makefile.in: Regenerate.
1901 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1902 * configure: Regenerate.
1903 * doc/Makefile.am: Add install-html and install-html-am targets.
1904 * doc/Makefile.in: Regenerate.
1905
ec651a3b
AM
19062006-04-06 Alan Modra <amodra@bigpond.net.au>
1907
1908 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1909 second scan.
1910
910600e9
RS
19112006-04-05 Richard Sandiford <richard@codesourcery.com>
1912 Daniel Jacobowitz <dan@codesourcery.com>
1913
1914 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1915 (GOTT_BASE, GOTT_INDEX): New.
1916 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1917 GOTT_INDEX when generating VxWorks PIC.
1918 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1919 use the generic *-*-vxworks* stanza instead.
1920
99630778
AM
19212006-04-04 Alan Modra <amodra@bigpond.net.au>
1922
1923 PR 997
1924 * frags.c (frag_offset_fixed_p): New function.
1925 * frags.h (frag_offset_fixed_p): Declare.
1926 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1927 (resolve_expression): Likewise.
1928
a02728c8
BW
19292006-04-03 Sterling Augustine <sterling@tensilica.com>
1930
1931 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1932 of the same length but different numbers of slots.
1933
9dfde49d
AS
19342006-03-30 Andreas Schwab <schwab@suse.de>
1935
1936 * configure.in: Fix help string for --enable-targets option.
1937 * configure: Regenerate.
1938
2da12c60
NS
19392006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1940
6d89cc8f
NS
1941 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1942 (m68k_ip): ... here. Use for all chips. Protect against buffer
1943 overrun and avoid excessive copying.
1944
2da12c60
NS
1945 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1946 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1947 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1948 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1949 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1950 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1951 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1952 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1953 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1954 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1955 (struct m68k_cpu): Change chip field to control_regs.
1956 (current_chip): Remove.
1957 (control_regs): New.
1958 (m68k_archs, m68k_extensions): Adjust.
1959 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1960 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1961 (find_cf_chip): Reimplement for new organization of cpu table.
1962 (select_control_regs): Remove.
1963 (mri_chip): Adjust.
1964 (struct save_opts): Save control regs, not chip.
1965 (s_save, s_restore): Adjust.
1966 (m68k_lookup_cpu): Give deprecated warning when necessary.
1967 (m68k_init_arch): Adjust.
1968 (md_show_usage): Adjust for new cpu table organization.
1969
1ac4baed
BS
19702006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1971
1972 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1973 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1974 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1975 "elf/bfin.h".
1976 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1977 (any_gotrel): New rule.
1978 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1979 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1980 "elf/bfin.h".
1981 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1982 (bfin_pic_ptr): New function.
1983 (md_pseudo_table): Add it for ".picptr".
1984 (OPTION_FDPIC): New macro.
1985 (md_longopts): Add -mfdpic.
1986 (md_parse_option): Handle it.
1987 (md_begin): Set BFD flags.
1988 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1989 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1990 us for GOT relocs.
1991 * Makefile.am (bfin-parse.o): Update dependencies.
1992 (DEPTC_bfin_elf): Likewise.
1993 * Makefile.in: Regenerate.
1994
a9d34880
RS
19952006-03-25 Richard Sandiford <richard@codesourcery.com>
1996
1997 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1998 mcfemac instead of mcfmac.
1999
9ca26584
AJ
20002006-03-23 Michael Matz <matz@suse.de>
2001
2002 * config/tc-i386.c (type_names): Correct placement of 'static'.
2003 (reloc): Map some more relocs to their 64 bit counterpart when
2004 size is 8.
2005 (output_insn): Work around breakage if DEBUG386 is defined.
2006 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2007 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2008 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2009 different from i386.
2010 (output_imm): Ditto.
2011 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2012 Imm64.
2013 (md_convert_frag): Jumps can now be larger than 2GB away, error
2014 out in that case.
2015 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2016 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2017
0a44bf69
RS
20182006-03-22 Richard Sandiford <richard@codesourcery.com>
2019 Daniel Jacobowitz <dan@codesourcery.com>
2020 Phil Edwards <phil@codesourcery.com>
2021 Zack Weinberg <zack@codesourcery.com>
2022 Mark Mitchell <mark@codesourcery.com>
2023 Nathan Sidwell <nathan@codesourcery.com>
2024
2025 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2026 (md_begin): Complain about -G being used for PIC. Don't change
2027 the text, data and bss alignments on VxWorks.
2028 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2029 generating VxWorks PIC.
2030 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2031 (macro): Likewise, but do not treat la $25 specially for
2032 VxWorks PIC, and do not handle jal.
2033 (OPTION_MVXWORKS_PIC): New macro.
2034 (md_longopts): Add -mvxworks-pic.
2035 (md_parse_option): Don't complain about using PIC and -G together here.
2036 Handle OPTION_MVXWORKS_PIC.
2037 (md_estimate_size_before_relax): Always use the first relaxation
2038 sequence on VxWorks.
2039 * config/tc-mips.h (VXWORKS_PIC): New.
2040
080eb7fe
PB
20412006-03-21 Paul Brook <paul@codesourcery.com>
2042
2043 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2044
03aaa593
BW
20452006-03-21 Sterling Augustine <sterling@tensilica.com>
2046
2047 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2048 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2049 (get_loop_align_size): New.
2050 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2051 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2052 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2053 (get_noop_aligned_address): Use get_loop_align_size.
2054 (get_aligned_diff): Likewise.
2055
3e94bf1a
PB
20562006-03-21 Paul Brook <paul@codesourcery.com>
2057
2058 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2059
dfa9f0d5
PB
20602006-03-20 Paul Brook <paul@codesourcery.com>
2061
2062 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2063 (do_t_branch): Encode branches inside IT blocks as unconditional.
2064 (do_t_cps): New function.
2065 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2066 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2067 (opcode_lookup): Allow conditional suffixes on all instructions in
2068 Thumb mode.
2069 (md_assemble): Advance condexec state before checking for errors.
2070 (insns): Use do_t_cps.
2071
6e1cb1a6
PB
20722006-03-20 Paul Brook <paul@codesourcery.com>
2073
2074 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2075 outputting the insn.
2076
0a966e2d
JBG
20772006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2078
2079 * config/tc-vax.c: Update copyright year.
2080 * config/tc-vax.h: Likewise.
2081
a49fcc17
JBG
20822006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2083
2084 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2085 make it static.
2086 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2087
f5208ef2
PB
20882006-03-17 Paul Brook <paul@codesourcery.com>
2089
2090 * config/tc-arm.c (insns): Add ldm and stm.
2091
cb4c78d6
BE
20922006-03-17 Ben Elliston <bje@au.ibm.com>
2093
2094 PR gas/2446
2095 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2096
c16d2bf0
PB
20972006-03-16 Paul Brook <paul@codesourcery.com>
2098
2099 * config/tc-arm.c (insns): Add "svc".
2100
80ca4e2c
BW
21012006-03-13 Bob Wilson <bob.wilson@acm.org>
2102
2103 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2104 flag and avoid double underscore prefixes.
2105
3a4a14e9
PB
21062006-03-10 Paul Brook <paul@codesourcery.com>
2107
2108 * config/tc-arm.c (md_begin): Handle EABIv5.
2109 (arm_eabis): Add EF_ARM_EABI_VER5.
2110 * doc/c-arm.texi: Document -meabi=5.
2111
518051dc
BE
21122006-03-10 Ben Elliston <bje@au.ibm.com>
2113
2114 * app.c (do_scrub_chars): Simplify string handling.
2115
00a97672
RS
21162006-03-07 Richard Sandiford <richard@codesourcery.com>
2117 Daniel Jacobowitz <dan@codesourcery.com>
2118 Zack Weinberg <zack@codesourcery.com>
2119 Nathan Sidwell <nathan@codesourcery.com>
2120 Paul Brook <paul@codesourcery.com>
2121 Ricardo Anguiano <anguiano@codesourcery.com>
2122 Phil Edwards <phil@codesourcery.com>
2123
2124 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2125 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2126 R_ARM_ABS12 reloc.
2127 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2128 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2129 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2130
b29757dc
BW
21312006-03-06 Bob Wilson <bob.wilson@acm.org>
2132
2133 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2134 even when using the text-section-literals option.
2135
0b2e31dc
NS
21362006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2137
2138 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2139 and cf.
2140 (m68k_ip): <case 'J'> Check we have some control regs.
2141 (md_parse_option): Allow raw arch switch.
2142 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2143 whether 68881 or cfloat was meant by -mfloat.
2144 (md_show_usage): Adjust extension display.
2145 (m68k_elf_final_processing): Adjust.
2146
df406460
NC
21472006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2148
2149 * config/tc-avr.c (avr_mod_hash_value): New function.
2150 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2151 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2152 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2153 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2154 of (int).
2155 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2156 fixups, abort otherwise.
df406460
NC
2157 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2158 tc_fix_adjustable): Define.
a70ae331 2159
53022e4a
JW
21602006-03-02 James E Wilson <wilson@specifix.com>
2161
2162 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2163 change the template, then clear md.slot[curr].end_of_insn_group.
2164
9f6f925e
JB
21652006-02-28 Jan Beulich <jbeulich@novell.com>
2166
2167 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2168
0e31b3e1
JB
21692006-02-28 Jan Beulich <jbeulich@novell.com>
2170
2171 PR/1070
2172 * macro.c (getstring): Don't treat parentheses special anymore.
2173 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2174 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2175 characters.
2176
10cd14b4
AM
21772006-02-28 Mat <mat@csail.mit.edu>
2178
2179 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2180
63752a75
JJ
21812006-02-27 Jakub Jelinek <jakub@redhat.com>
2182
2183 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2184 field.
2185 (CFI_signal_frame): Define.
2186 (cfi_pseudo_table): Add .cfi_signal_frame.
2187 (dot_cfi): Handle CFI_signal_frame.
2188 (output_cie): Handle cie->signal_frame.
2189 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2190 different. Copy signal_frame from FDE to newly created CIE.
2191 * doc/as.texinfo: Document .cfi_signal_frame.
2192
f7d9e5c3
CD
21932006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2194
2195 * doc/Makefile.am: Add html target.
2196 * doc/Makefile.in: Regenerate.
2197 * po/Make-in: Add html target.
2198
331d2d0d
L
21992006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2200
8502d882 2201 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2202 Instructions.
2203
8502d882 2204 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2205 (CpuUnknownFlags): Add CpuMNI.
2206
10156f83
DM
22072006-02-24 David S. Miller <davem@sunset.davemloft.net>
2208
2209 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2210 (hpriv_reg_table): New table for hyperprivileged registers.
2211 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2212 register encoding.
2213
6772dd07
DD
22142006-02-24 DJ Delorie <dj@redhat.com>
2215
2216 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2217 (tc_gen_reloc): Don't define.
2218 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2219 (OPTION_LINKRELAX): New.
2220 (md_longopts): Add it.
2221 (m32c_relax): New.
2222 (md_parse_options): Set it.
2223 (md_assemble): Emit relaxation relocs as needed.
2224 (md_convert_frag): Emit relaxation relocs as needed.
2225 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2226 (m32c_apply_fix): New.
2227 (tc_gen_reloc): New.
2228 (m32c_force_relocation): Force out jump relocs when relaxing.
2229 (m32c_fix_adjustable): Return false if relaxing.
2230
62b3e311
PB
22312006-02-24 Paul Brook <paul@codesourcery.com>
2232
2233 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2234 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2235 (struct asm_barrier_opt): Define.
2236 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2237 (parse_psr): Accept V7M psr names.
2238 (parse_barrier): New function.
2239 (enum operand_parse_code): Add OP_oBARRIER.
2240 (parse_operands): Implement OP_oBARRIER.
2241 (do_barrier): New function.
2242 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2243 (do_t_cpsi): Add V7M restrictions.
2244 (do_t_mrs, do_t_msr): Validate V7M variants.
2245 (md_assemble): Check for NULL variants.
2246 (v7m_psrs, barrier_opt_names): New tables.
2247 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2248 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2249 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2250 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2251 (struct cpu_arch_ver_table): Define.
2252 (cpu_arch_ver): New.
2253 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2254 Tag_CPU_arch_profile.
2255 * doc/c-arm.texi: Document new cpu and arch options.
2256
59cf82fe
L
22572006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2258
2259 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2260
19a7219f
L
22612006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2262
2263 * config/tc-ia64.c: Update copyright years.
2264
7f3dfb9c
L
22652006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2266
2267 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2268 SDM 2.2.
2269
f40d1643
PB
22702005-02-22 Paul Brook <paul@codesourcery.com>
2271
2272 * config/tc-arm.c (do_pld): Remove incorrect write to
2273 inst.instruction.
2274 (encode_thumb32_addr_mode): Use correct operand.
2275
216d22bc
PB
22762006-02-21 Paul Brook <paul@codesourcery.com>
2277
2278 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2279
d70c5fc7
NC
22802006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2281 Anil Paranjape <anilp1@kpitcummins.com>
2282 Shilin Shakti <shilins@kpitcummins.com>
2283
2284 * Makefile.am: Add xc16x related entry.
2285 * Makefile.in: Regenerate.
2286 * configure.in: Added xc16x related entry.
2287 * configure: Regenerate.
2288 * config/tc-xc16x.h: New file
2289 * config/tc-xc16x.c: New file
2290 * doc/c-xc16x.texi: New file for xc16x
2291 * doc/all.texi: Entry for xc16x
a70ae331 2292 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2293 * NEWS: Announce the support for the new target.
2294
aaa2ab3d
NH
22952006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2296
2297 * configure.tgt: set emulation for mips-*-netbsd*
2298
82de001f
JJ
22992006-02-14 Jakub Jelinek <jakub@redhat.com>
2300
2301 * config.in: Rebuilt.
2302
431ad2d0
BW
23032006-02-13 Bob Wilson <bob.wilson@acm.org>
2304
2305 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2306 from 1, not 0, in error messages.
2307 (md_assemble): Simplify special-case check for ENTRY instructions.
2308 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2309 operand in error message.
2310
94089a50
JM
23112006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2312
2313 * configure.tgt (arm-*-linux-gnueabi*): Change to
2314 arm-*-linux-*eabi*.
2315
52de4c06
NC
23162006-02-10 Nick Clifton <nickc@redhat.com>
2317
70e45ad9
NC
2318 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2319 32-bit value is propagated into the upper bits of a 64-bit long.
2320
52de4c06
NC
2321 * config/tc-arc.c (init_opcode_tables): Fix cast.
2322 (arc_extoper, md_operand): Likewise.
2323
21af2bbd
BW
23242006-02-09 David Heine <dlheine@tensilica.com>
2325
2326 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2327 each relaxation step.
2328
75a706fc 23292006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2330
75a706fc
L
2331 * configure.in (CHECK_DECLS): Add vsnprintf.
2332 * configure: Regenerate.
2333 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2334 include/declare here, but...
2335 * as.h: Move code detecting VARARGS idiom to the top.
2336 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2337 (vsnprintf): Declare if not already declared.
2338
0d474464
L
23392006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2340
2341 * as.c (close_output_file): New.
2342 (main): Register close_output_file with xatexit before
2343 dump_statistics. Don't call output_file_close.
2344
266abb8f
NS
23452006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2346
2347 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2348 mcf5329_control_regs): New.
2349 (not_current_architecture, selected_arch, selected_cpu): New.
2350 (m68k_archs, m68k_extensions): New.
2351 (archs): Renamed to ...
2352 (m68k_cpus): ... here. Adjust.
2353 (n_arches): Remove.
2354 (md_pseudo_table): Add arch and cpu directives.
2355 (find_cf_chip, m68k_ip): Adjust table scanning.
2356 (no_68851, no_68881): Remove.
2357 (md_assemble): Lazily initialize.
2358 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2359 (md_init_after_args): Move functionality to m68k_init_arch.
2360 (mri_chip): Adjust table scanning.
2361 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2362 options with saner parsing.
2363 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2364 m68k_init_arch): New.
2365 (s_m68k_cpu, s_m68k_arch): New.
2366 (md_show_usage): Adjust.
2367 (m68k_elf_final_processing): Set CF EF flags.
2368 * config/tc-m68k.h (m68k_init_after_args): Remove.
2369 (tc_init_after_args): Remove.
2370 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2371 (M68k-Directives): Document .arch and .cpu directives.
2372
134dcee5
AM
23732006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2374
a70ae331
AM
2375 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2376 synonyms for equ and defl.
134dcee5
AM
2377 (z80_cons_fix_new): New function.
2378 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2379 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2380 now handled as pseudo-op rather than an instruction.
2381 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2382 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2383 Add entries for def24,def32,d24,d32.
2384 (md_assemble): Improved error handling.
2385 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2386 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2387 (z80_cons_fix_new): Declare.
a70ae331 2388 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2389 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2390
a9931606
PB
23912006-02-02 Paul Brook <paul@codesourcery.com>
2392
2393 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2394
ef8d22e6
PB
23952005-02-02 Paul Brook <paul@codesourcery.com>
2396
2397 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2398 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2399 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2400 T2_OPCODE_RSB): Define.
2401 (thumb32_negate_data_op): New function.
2402 (md_apply_fix): Use it.
2403
e7da6241
BW
24042006-01-31 Bob Wilson <bob.wilson@acm.org>
2405
2406 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2407 fields.
2408 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2409 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2410 subtracted symbols.
2411 (relaxation_requirements): Add pfinish_frag argument and use it to
2412 replace setting tinsn->record_fix fields.
2413 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2414 and vinsn_to_insnbuf. Remove references to record_fix and
2415 slot_sub_symbols fields.
2416 (xtensa_mark_narrow_branches): Delete unused code.
2417 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2418 a symbol.
2419 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2420 record_fix fields.
2421 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2422 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2423 of the record_fix field. Simplify error messages for unexpected
2424 symbolic operands.
2425 (set_expr_symbol_offset_diff): Delete.
2426
79134647
PB
24272006-01-31 Paul Brook <paul@codesourcery.com>
2428
2429 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2430
e74cfd16
PB
24312006-01-31 Paul Brook <paul@codesourcery.com>
2432 Richard Earnshaw <rearnsha@arm.com>
2433
2434 * config/tc-arm.c: Use arm_feature_set.
2435 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2436 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2437 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2438 New variables.
2439 (insns): Use them.
2440 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2441 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2442 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2443 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2444 feature flags.
2445 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2446 (arm_opts): Move old cpu/arch options from here...
2447 (arm_legacy_opts): ... to here.
2448 (md_parse_option): Search arm_legacy_opts.
2449 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2450 (arm_float_abis, arm_eabis): Make const.
2451
d47d412e
BW
24522006-01-25 Bob Wilson <bob.wilson@acm.org>
2453
2454 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2455
b14273fe
JZ
24562006-01-21 Jie Zhang <jie.zhang@analog.com>
2457
2458 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2459 in load immediate intruction.
2460
39cd1c76
JZ
24612006-01-21 Jie Zhang <jie.zhang@analog.com>
2462
2463 * config/bfin-parse.y (value_match): Use correct conversion
2464 specifications in template string for __FILE__ and __LINE__.
2465 (binary): Ditto.
2466 (unary): Ditto.
2467
67a4f2b7
AO
24682006-01-18 Alexandre Oliva <aoliva@redhat.com>
2469
2470 Introduce TLS descriptors for i386 and x86_64.
2471 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2472 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2473 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2474 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2475 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2476 displacement bits.
2477 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2478 (lex_got): Handle @tlsdesc and @tlscall.
2479 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2480
8ad7c533
NC
24812006-01-11 Nick Clifton <nickc@redhat.com>
2482
2483 Fixes for building on 64-bit hosts:
2484 * config/tc-avr.c (mod_index): New union to allow conversion
2485 between pointers and integers.
2486 (md_begin, avr_ldi_expression): Use it.
2487 * config/tc-i370.c (md_assemble): Add cast for argument to print
2488 statement.
2489 * config/tc-tic54x.c (subsym_substitute): Likewise.
2490 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2491 opindex field of fr_cgen structure into a pointer so that it can
2492 be stored in a frag.
2493 * config/tc-mn10300.c (md_assemble): Likewise.
2494 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2495 types.
2496 * config/tc-v850.c: Replace uses of (int) casts with correct
2497 types.
2498
4dcb3903
L
24992006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2500
2501 PR gas/2117
2502 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2503
e0f6ea40
HPN
25042006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2505
2506 PR gas/2101
2507 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2508 a local-label reference.
2509
e88d958a 2510For older changes see ChangeLog-2005
08d56133
NC
2511\f
2512Local Variables:
2513mode: change-log
2514left-margin: 8
2515fill-column: 74
2516version-control: never
2517End:
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