Add changelog entry for previous delta
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
25fe350b
MS
12006-11-12 Mark Shinwell <shinwell@codesourcery.com>
2
3 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
4 (insns): Adjust accordingly.
5 (md_apply_fix): Alter comments to use CBZ instead of CZB.
6
0ffdc86c
NC
72006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
8
9 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
10 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
11
6afdfa61
NC
122006-11-10 Nick Clifton <nickc@redhat.com>
13
14 PR gas/3456:
15 * config/obj-elf.c (obj_elf_version): Do not include the name
16 field's padding in the namesz value.
17
d84bcf09
TS
182006-11-09 Thiemo Seufer <ths@mips.com>
19
20 * config/tc-mips.c: Fix outdated comment.
21
b7d9ef37
L
222006-11-08 H.J. Lu <hongjiu.lu@intel.com>
23
24 * config/tc-i386.h (CpuPNI): Removed.
25 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
26 * config/tc-i386.c (md_assemble): Likewise.
27
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AM
282006-11-08 Alan Modra <amodra@bigpond.net.au>
29
30 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
31
df1f3cda
DD
322006-11-06 David Daney <ddaney@avtrex.com>
33
34 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
35
82100185
TS
362006-11-06 Thiemo Seufer <ths@mips.com>
37
38 * doc/c-mips.texi (-march): Document sb1a.
39
a360e743
TS
402006-11-06 Thiemo Seufer <ths@mips.com>
41
42 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
43 34k always has DSP ASE.
44
64817874
TS
452006-11-03 Thiemo Seufer <ths@mips.com>
46
47 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
48 MIPS16 instructions referencing other sections, unless they are
49 external branches.
50
7764b395
TS
512006-11-03 Thiemo Seufer <ths@mips.com>
52
53 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
54 release 1 CPU.
55
ae424f82
JJ
562006-11-03 Jakub Jelinek <jakub@redhat.com>
57
9b8ae42e
JJ
58 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
59 personality and lsda.
60 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
61 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
62 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
63 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
64 (output_cie): Output personality including its encoding and LSDA encoding.
65 (output_fde): Output LSDA.
66 (select_cie_for_fde): Don't share CIE if personality, its encoding or
67 LSDA encoding are different. Copy the 3 fields from fde_entry to
68 cie_entry.
69 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
70
ae424f82
JJ
71 * subsegs.h (struct frchain): Add frch_cfi_data field.
72 * dw2gencfi.c: Include subsegs.h.
73 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
74 (struct frch_cfi_data): New type.
75 (unused_cfi_data): New variable.
76 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
77 and cfa_save_stack static vars into a structure pointed from
78 each frchain.
79 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
80 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
81 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
82 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
83 Likewise.
84
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852006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
86
87 * config/tc-h8300.c (build_bytes): Fix const warning.
88
06d2da93
NC
892006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
90
91 * tc-score.c (do16_rdrs): Handle not! instruction especially.
92
3ba67470
PB
932006-10-31 Paul Brook <paul@codesourcery.com>
94
95 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
96 for EABIv4.
97
7a1d4c38
PB
982006-10-31 Paul Brook <paul@codesourcery.com>
99
100 gas/
101 * config/tc-arm.c (object_arch): New variable.
102 (s_arm_object_arch): New function.
103 (md_pseudo_table): Add object_arch.
104 (aeabi_set_public_attributes): Obey object_arch.
105 * doc/c-arm.texi: Document .object_arch.
106
b138abaa
NC
1072006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
108
109 * tc-score.c (data_op2): Check invalid operands.
110 (my_get_expression): Const operand of some instructions can not be
111 symbol in assembly.
112 (get_insn_class_from_type): Handle instruction type Insn_internal.
113 (do_macro_ldst_label): Modify inst.type.
114 (Insn_PIC): Delete.
115 (data_op2): The immediate value in lw is 15 bit signed.
116
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1172006-10-29 Randolph Chung <tausq@debian.org>
118
119 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
120 (hppa_regname_to_dw2regnum): New funcions.
121 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
122 (tc_cfi_frame_initial_instructions)
123 (tc_regname_to_dw2regnum): Define.
124 (hppa_cfi_frame_initial_instructions)
125 (hppa_regname_to_dw2regnum): Declare.
126 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
127 (DWARF2_CIE_DATA_ALIGNMENT): Define.
128
e2785c44
NC
1292006-10-29 Nick Clifton <nickc@redhat.com>
130
131 * config/tc-spu.c (md_assemble): Cast printf string size parameter
132 to int in order to avoid a compiler warning.
133
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1342006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
135
136 * config/tc-sh.c (md_assemble): Define size of branches.
137
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BE
1382006-10-26 Ben Elliston <bje@au.ibm.com>
139
140 * dw2gencfi.c (cfi_add_CFA_offset):
141 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
142
033cd5fd
BE
143 * write.c (chain_frchains_together_1): Assert that this function
144 never returns a pointer to the auto variable `dummy'.
145
e9f53129
AM
1462006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
147 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
148 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
149 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
150 Alan Modra <amodra@bigpond.net.au>
151
152 * config/tc-spu.c: New file.
153 * config/tc-spu.h: New file.
154 * configure.tgt: Add SPU support.
155 * Makefile.am: Likewise. Run "make dep-am".
156 * Makefile.in: Regenerate.
157 * po/POTFILES.in: Regenerate.
158
7b383517
BE
1592006-10-25 Ben Elliston <bje@au.ibm.com>
160
161 * expr.c (expr): Replace O_add case in switch (op_left) explaining
162 why it can never occur.
163
ede602d7
AM
1642006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
165
166 * doc/c-ppc.texi (-mcell): Document.
167 * config/tc-ppc.c (parse_cpu): Parse -mcell.
168 (md_show_usage): Document -mcell.
169
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MM
1702006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
171
172 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
173
878bcc43
AM
1742006-10-23 Alan Modra <amodra@bigpond.net.au>
175
176 * config/tc-m68hc11.c (md_assemble): Quiet warning.
177
8620418b
MF
1782006-10-19 Mike Frysinger <vapier@gentoo.org>
179
180 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
181 (x86_64_section_letter): Likewise.
182
b3549761
NC
1832006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
184
185 * config/tc-score.c (build_relax_frag): Compute correct
186 tc_frag_data.fixp.
187
71a75f6f
MF
1882006-10-18 Roy Marples <uberlord@gentoo.org>
189
190 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
191 elf32-sparc as a viable target for the -32 switch and any target
192 starting with elf64-sparc as a viable target for the -64 switch.
193 (sparc_target_format): For 64-bit ELF flavoured output use
194 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
195 ELF_TARGET_FORMAT.
71a75f6f
MF
196 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
197
e1b5fdd4
L
1982006-10-17 H.J. Lu <hongjiu.lu@intel.com>
199
200 * configure: Regenerated.
201
f8ef9cd7
BS
2022006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
203
204 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
205 in addition to testing for '\n'.
206 (TC_EOL_IN_INSN): Provide a default definition if necessary.
207
eb1fe072
NC
2082006-10-13 Sterling Augstine <sterling@tensilica.com>
209
210 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
211 a disjoint DW_AT range.
212
ec6e49f4
NC
2132006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
214
215 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
216
036dc3f7
PB
2172006-10-08 Paul Brook <paul@codesourcery.com>
218
219 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
220 (parse_operands): Use parse_big_immediate for OP_NILO.
221 (neon_cmode_for_logic_imm): Try smaller element sizes.
222 (neon_cmode_for_move_imm): Ditto.
223 (do_neon_logic): Handle .i64 pseudo-op.
224
3bb0c887
AM
2252006-09-29 Alan Modra <amodra@bigpond.net.au>
226
227 * po/POTFILES.in: Regenerate.
228
ef05d495
L
2292006-09-28 H.J. Lu <hongjiu.lu@intel.com>
230
231 * config/tc-i386.h (CpuMNI): Renamed to ...
232 (CpuSSSE3): This.
233 (CpuUnknownFlags): Updated.
234 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
235 and PROCESSOR_MEROM with PROCESSOR_CORE2.
236 * config/tc-i386.c: Updated.
237 * doc/c-i386.texi: Likewise.
a70ae331 238
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L
239 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
240
d8ad03e9
NC
2412006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
242
243 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
244
df3ca5a3
NC
2452006-09-27 Nick Clifton <nickc@redhat.com>
246
247 * output-file.c (output_file_close): Prevent an infinite loop
248 reporting that stdoutput could not be closed.
249
2d447fca
JM
2502006-09-26 Mark Shinwell <shinwell@codesourcery.com>
251 Joseph Myers <joseph@codesourcery.com>
252 Ian Lance Taylor <ian@wasabisystems.com>
253 Ben Elliston <bje@wasabisystems.com>
254
255 * config/tc-arm.c (arm_cext_iwmmxt2): New.
256 (enum operand_parse_code): New code OP_RIWR_I32z.
257 (parse_operands): Handle OP_RIWR_I32z.
258 (do_iwmmxt_wmerge): New function.
259 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
260 a register.
261 (do_iwmmxt_wrwrwr_or_imm5): New function.
262 (insns): Mark instructions as RIWR_I32z as appropriate.
263 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
264 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
265 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
266 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
267 (md_begin): Handle IWMMXT2.
268 (arm_cpus): Add iwmmxt2.
269 (arm_extensions): Likewise.
270 (arm_archs): Likewise.
271
ba83aca1
BW
2722006-09-25 Bob Wilson <bob.wilson@acm.org>
273
274 * doc/as.texinfo (Overview): Revise description of --keep-locals.
275 Add xref to "Symbol Names".
276 (L): Refer to "local symbols" instead of "local labels". Move
277 definition to "Symbol Names" section; add xref to that section.
278 (Symbol Names): Use "Local Symbol Names" section to define local
279 symbols. Add "Local Labels" heading for description of temporary
280 forward/backward labels, and refer to those as "local labels".
281
539e75ad
L
2822006-09-23 H.J. Lu <hongjiu.lu@intel.com>
283
284 PR binutils/3235
285 * config/tc-i386.c (match_template): Check address size prefix
286 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
287 operand.
288
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AM
2892006-09-22 Alan Modra <amodra@bigpond.net.au>
290
291 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
292
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AM
2932006-09-22 Alan Modra <amodra@bigpond.net.au>
294
295 * as.h (as_perror): Delete declaration.
296 * gdbinit.in (as_perror): Delete breakpoint.
297 * messages.c (as_perror): Delete function.
298 * doc/internals.texi: Remove as_perror description.
299 * listing.c (listing_print: Don't use as_perror.
300 * output-file.c (output_file_create, output_file_close): Likewise.
301 * symbols.c (symbol_create, symbol_clone): Likewise.
302 * write.c (write_contents): Likewise.
303 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
304 * config/tc-tic54x.c (tic54x_mlib): Likewise.
305
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AM
3062006-09-22 Alan Modra <amodra@bigpond.net.au>
307
308 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
309 (ppc_handle_align): New function.
310 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
311 (SUB_SEGMENT_ALIGN): Define as zero.
312
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BW
3132006-09-20 Bob Wilson <bob.wilson@acm.org>
314
315 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
316 (Overview): Skip cross reference in man page.
317
99ad8390
NC
3182006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
319
320 * configure.in: Add new target x86_64-pc-mingw64.
321 * configure: Regenerate.
322 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
323 * config/obj-coff.h: Add handling for TE_PEP target specific code
324 and definitions.
99ad8390
NC
325 * config/tc-i386.c: Add new targets.
326 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
327 (x86_64_target_format): Add new method for setup proper default
328 target cpu mode.
99ad8390
NC
329 * config/te-pep.h: Add new target definition header.
330 (TE_PEP): New macro: Identifies new target architecture.
331 (COFF_WITH_pex64): Set proper includes in bfd.
332 * NEWS: Mention new target.
333
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BS
3342006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
335
336 * config/bfin-parse.y (binary): Change sub of const to add of negated
337 const.
338
1c0d3aa6
NC
3392006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
340
341 * config/tc-score.c: New file.
342 * config/tc-score.h: Newf file.
343 * configure.tgt: Add Score target.
344 * Makefile.am: Add Score files.
345 * Makefile.in: Regenerate.
346 * NEWS: Mention new target support.
347
4fa3602b
PB
3482006-09-16 Paul Brook <paul@codesourcery.com>
349
350 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
351 * doc/c-arm.texi (movsp): Document offset argument.
352
16dd5e42
PB
3532006-09-16 Paul Brook <paul@codesourcery.com>
354
355 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
356 unsigned int to avoid 64-bit host problems.
357
c4ae04ce
BS
3582006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
359
360 * config/bfin-parse.y (binary): Do some more constant folding for
361 additions.
362
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JB
3632006-09-13 Jan Beulich <jbeulich@novell.com>
364
365 * input-file.c (input_file_give_next_buffer): Demote as_bad to
366 as_warn.
367
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AM
3682006-09-13 Alan Modra <amodra@bigpond.net.au>
369
370 PR gas/3165
371 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
372 in parens.
373
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AM
3742006-09-13 Alan Modra <amodra@bigpond.net.au>
375
376 * input-file.c (input_file_open): Replace as_perror with as_bad
377 so that gas exits with error on file errors. Correct error
378 message.
379 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 380 * input-file.h: Update comment.
f79d9c1d 381
f512f76f
NC
3822006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
383
384 PR gas/3172
385 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
386 registers as a sub-class of wC registers.
387
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AM
3882006-09-11 Alan Modra <amodra@bigpond.net.au>
389
390 PR gas/3165
391 * config/tc-mips.h (enum dwarf2_format): Forward declare.
392 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
393 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
394 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
395
6258339f
NC
3962006-09-08 Nick Clifton <nickc@redhat.com>
397
398 PR gas/3129
399 * doc/as.texinfo (Macro): Improve documentation about separating
400 macro arguments from following text.
401
f91e006c
PB
4022006-09-08 Paul Brook <paul@codesourcery.com>
403
404 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
405
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PB
4062006-09-07 Paul Brook <paul@codesourcery.com>
407
408 * config/tc-arm.c (parse_operands): Mark operand as present.
409
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PB
4102006-09-04 Paul Brook <paul@codesourcery.com>
411
412 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
413 (do_neon_dyadic_if_i_d): Avoid setting U bit.
414 (do_neon_mac_maybe_scalar): Ditto.
415 (do_neon_dyadic_narrow): Force operand type to NT_integer.
416 (insns): Remove out of date comments.
417
fb25138b
NC
4182006-08-29 Nick Clifton <nickc@redhat.com>
419
420 * read.c (s_align): Initialize the 'stopc' variable to prevent
421 compiler complaints about it being used without being
422 initialized.
423 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
424 s_float_space, s_struct, cons_worker, equals): Likewise.
425
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AM
4262006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
427
428 * ecoff.c (ecoff_directive_val): Fix message typo.
429 * config/tc-ns32k.c (convert_iif): Likewise.
430 * config/tc-sh64.c (shmedia_check_limits): Likewise.
431
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BW
4322006-08-25 Sterling Augustine <sterling@tensilica.com>
433 Bob Wilson <bob.wilson@acm.org>
434
435 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
436 the state of the absolute_literals directive. Remove align frag at
437 the start of the literal pool position.
438
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BW
4392006-08-25 Bob Wilson <bob.wilson@acm.org>
440
441 * doc/c-xtensa.texi: Add @group commands in examples.
442
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BW
4432006-08-24 Bob Wilson <bob.wilson@acm.org>
444
445 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
446 (INIT_LITERAL_SECTION_NAME): Delete.
447 (lit_state struct): Remove segment names, init_lit_seg, and
448 fini_lit_seg. Add lit_prefix and current_text_seg.
449 (init_literal_head_h, init_literal_head): Delete.
450 (fini_literal_head_h, fini_literal_head): Delete.
451 (xtensa_begin_directive): Move argument parsing to
452 xtensa_literal_prefix function.
453 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
454 (xtensa_literal_prefix): Parse the directive argument here and
455 record it in the lit_prefix field. Remove code to derive literal
456 section names.
457 (linkonce_len): New.
458 (get_is_linkonce_section): Use linkonce_len. Check for any
459 ".gnu.linkonce.*" section, not just text sections.
460 (md_begin): Remove initialization of deleted lit_state fields.
461 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
462 to init_literal_head and fini_literal_head.
463 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
464 when traversing literal_head list.
465 (match_section_group): New.
466 (cache_literal_section): Rewrite to determine the literal section
467 name on the fly, create the section and return it.
468 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
469 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
470 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
471 Use xtensa_get_property_section from bfd.
472 (retrieve_xtensa_section): Delete.
473 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
474 description to refer to plural literal sections and add xref to
475 the Literal Directive section.
476 (Literal Directive): Describe new rules for deriving literal section
477 names. Add footnote for special case of .init/.fini with
478 --text-section-literals.
479 (Literal Prefix Directive): Replace old naming rules with xref to the
480 Literal Directive section.
481
87a1fd79
JM
4822006-08-21 Joseph Myers <joseph@codesourcery.com>
483
484 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
485 merging with previous long opcode.
486
7148cc28
NC
4872006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
488
489 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
490 * Makefile.in: Regenerate.
491 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
492 renamed. Adjust.
493
3e9e4fcf
JB
4942006-08-16 Julian Brown <julian@codesourcery.com>
495
496 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
497 to use ARM instructions on non-ARM-supporting cores.
498 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
499 mode automatically based on cpu variant.
500 (md_begin): Call above function.
501
267d2029
JB
5022006-08-16 Julian Brown <julian@codesourcery.com>
503
504 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
505 recognized in non-unified syntax mode.
506
4be041b2
TS
5072006-08-15 Thiemo Seufer <ths@mips.com>
508 Nigel Stephens <nigel@mips.com>
509 David Ung <davidu@mips.com>
510
511 * configure.tgt: Handle mips*-sde-elf*.
512
3a93f742
TS
5132006-08-12 Thiemo Seufer <ths@networkno.de>
514
515 * config/tc-mips.c (mips16_ip): Fix argument register handling
516 for restore instruction.
517
1737851b
BW
5182006-08-08 Bob Wilson <bob.wilson@acm.org>
519
520 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
521 (out_sleb128): New.
522 (out_fixed_inc_line_addr): New.
523 (process_entries): Use out_fixed_inc_line_addr when
524 DWARF2_USE_FIXED_ADVANCE_PC is set.
525 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
526
e14e52f8
DD
5272006-08-08 DJ Delorie <dj@redhat.com>
528
529 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
530 vs full symbols so that we never have more than one pointer value
531 for any given symbol in our symbol table.
532
802f5d9e
NC
5332006-08-08 Sterling Augustine <sterling@tensilica.com>
534
535 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
536 and emit DW_AT_ranges when code in compilation unit is not
537 contiguous.
538 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
539 is not contiguous.
540 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
541 (out_debug_ranges): New function to emit .debug_ranges section
542 when code is not contiguous.
543
720abc60
NC
5442006-08-08 Nick Clifton <nickc@redhat.com>
545
546 * config/tc-arm.c (WARN_DEPRECATED): Enable.
547
f0927246
NC
5482006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
549
550 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
551 only block.
552 (pe_directive_secrel) [TE_PE]: New function.
553 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
554 loc, loc_mark_labels.
555 [TE_PE]: Handle secrel32.
556 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
557 call.
558 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
559 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
560 (md_section_align): Only round section sizes here for AOUT
561 targets.
562 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
563 (tc_pe_dwarf2_emit_offset): New function.
564 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
565 (cons_fix_new_arm): Handle O_secrel.
566 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
567 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
568 of OBJ_ELF only block.
569 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
570 tc_pe_dwarf2_emit_offset.
571
55e6e397
RS
5722006-08-04 Richard Sandiford <richard@codesourcery.com>
573
574 * config/tc-sh.c (apply_full_field_fix): New function.
575 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
576 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
577 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
578 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
579
9cd19b17
NC
5802006-08-03 Nick Clifton <nickc@redhat.com>
581
582 PR gas/2991
583 * config.in: Regenerate.
584
97f87066
JM
5852006-08-03 Joseph Myers <joseph@codesourcery.com>
586
587 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 588 for OP_RIWR_RIWC.
97f87066 589
41adaa5c
JM
5902006-08-03 Joseph Myers <joseph@codesourcery.com>
591
592 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
593 (parse_operands): Handle it.
594 (insns): Use it for tmcr and tmrc.
595
9d7cbccd
NC
5962006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
597
598 PR binutils/2983
599 * config/tc-i386.c (md_parse_option): Treat any target starting
600 with elf64_x86_64 as a viable target for the -64 switch.
601 (i386_target_format): For 64-bit ELF flavoured output use
602 ELF_TARGET_FORMAT64.
603 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
604
c973bc5c
NC
6052006-08-02 Nick Clifton <nickc@redhat.com>
606
607 PR gas/2991
608 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
609 bfd/aclocal.m4.
610 * configure.in: Run BFD_BINARY_FOPEN.
611 * configure: Regenerate.
612 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
613 file to include.
614
cfde7f70
L
6152006-08-01 H.J. Lu <hongjiu.lu@intel.com>
616
617 * config/tc-i386.c (md_assemble): Don't update
618 cpu_arch_isa_flags.
619
b4c71f56
TS
6202006-08-01 Thiemo Seufer <ths@mips.com>
621
622 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
623
54f4ddb3
TS
6242006-08-01 Thiemo Seufer <ths@mips.com>
625
626 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
627 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
628 BFD_RELOC_32 and BFD_RELOC_16.
629 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
630 md_convert_frag, md_obj_end): Fix comment formatting.
631
d103cf61
TS
6322006-07-31 Thiemo Seufer <ths@mips.com>
633
634 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
635 handling for BFD_RELOC_MIPS16_JMP.
636
601e61cd
NC
6372006-07-24 Andreas Schwab <schwab@suse.de>
638
639 PR/2756
640 * read.c (read_a_source_file): Ignore unknown text after line
641 comment character. Fix misleading comment.
642
b45619c0
NC
6432006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
644
645 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
646 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
647 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
648 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
649 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
650 doc/c-z80.texi, doc/internals.texi: Fix some typos.
651
784906c5
NC
6522006-07-21 Nick Clifton <nickc@redhat.com>
653
654 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
655 linker testsuite.
656
d5f010e9
TS
6572006-07-20 Thiemo Seufer <ths@mips.com>
658 Nigel Stephens <nigel@mips.com>
659
660 * config/tc-mips.c (md_parse_option): Don't infer optimisation
661 options from debug options.
662
35d3d567
TS
6632006-07-20 Thiemo Seufer <ths@mips.com>
664
665 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
666 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
667
401a54cf
PB
6682006-07-19 Paul Brook <paul@codesourcery.com>
669
670 * config/tc-arm.c (insns): Fix rbit Arm opcode.
671
16805f35
PB
6722006-07-18 Paul Brook <paul@codesourcery.com>
673
674 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
675 (md_convert_frag): Use correct reloc for add_pc. Use
676 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
677 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
678 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
679
d9e05e4e
AM
6802006-07-17 Mat Hostetter <mat@lcs.mit.edu>
681
682 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
683 when file and line unknown.
684
f43abd2b
TS
6852006-07-17 Thiemo Seufer <ths@mips.com>
686
687 * read.c (s_struct): Use IS_ELF.
688 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
689 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
690 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
691 s_mips_mask): Likewise.
692
a2902af6
TS
6932006-07-16 Thiemo Seufer <ths@mips.com>
694 David Ung <davidu@mips.com>
695
696 * read.c (s_struct): Handle ELF section changing.
697 * config/tc-mips.c (s_align): Leave enabling auto-align to the
698 generic code.
699 (s_change_sec): Try section changing only if we output ELF.
700
d32cad65
L
7012006-07-15 H.J. Lu <hongjiu.lu@intel.com>
702
703 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
704 CpuAmdFam10.
705 (smallest_imm_type): Remove Cpu086.
706 (i386_target_format): Likewise.
707
708 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
709 Update CpuXXX.
710
050dfa73
MM
7112006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
712 Michael Meissner <michael.meissner@amd.com>
713
714 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
715 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
716 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
717 architecture.
718 (i386_align_code): Ditto.
719 (md_assemble_code): Add support for insertq/extrq instructions,
720 swapping as needed for intel syntax.
721 (swap_imm_operands): New function to swap immediate operands.
722 (swap_operands): Deal with 4 operand instructions.
723 (build_modrm_byte): Add support for insertq instruction.
724
6b2de085
L
7252006-07-13 H.J. Lu <hongjiu.lu@intel.com>
726
727 * config/tc-i386.h (Size64): Fix a typo in comment.
728
01eaea5a
NC
7292006-07-12 Nick Clifton <nickc@redhat.com>
730
731 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 732 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
733 already been checked here.
734
1e85aad8
JW
7352006-07-07 James E Wilson <wilson@specifix.com>
736
737 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
738
1370e33d
NC
7392006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
740 Nick Clifton <nickc@redhat.com>
741
742 PR binutils/2877
743 * doc/as.texi: Fix spelling typo: branchs => branches.
744 * doc/c-m68hc11.texi: Likewise.
745 * config/tc-m68hc11.c: Likewise.
746 Support old spelling of command line switch for backwards
747 compatibility.
748
5f0fe04b
TS
7492006-07-04 Thiemo Seufer <ths@mips.com>
750 David Ung <davidu@mips.com>
751
752 * config/tc-mips.c (s_is_linkonce): New function.
753 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
754 weak, external, and linkonce symbols.
755 (pic_need_relax): Use s_is_linkonce.
756
85234291
L
7572006-06-24 H.J. Lu <hongjiu.lu@intel.com>
758
759 * doc/as.texinfo (Org): Remove space.
760 (P2align): Add "@var{abs-expr},".
761
ccc9c027
L
7622006-06-23 H.J. Lu <hongjiu.lu@intel.com>
763
764 * config/tc-i386.c (cpu_arch_tune_set): New.
765 (cpu_arch_isa): Likewise.
766 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
767 nops with short or long nop sequences based on -march=/.arch
768 and -mtune=.
769 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
770 set cpu_arch_tune and cpu_arch_tune_flags.
771 (md_parse_option): For -march=, set cpu_arch_isa and set
772 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
773 0. Set cpu_arch_tune_set to 1 for -mtune=.
774 (i386_target_format): Don't set cpu_arch_tune.
775
d4dc2f22
TS
7762006-06-23 Nigel Stephens <nigel@mips.com>
777
778 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
779 generated .sbss.* and .gnu.linkonce.sb.*.
780
a8dbcb85
TS
7812006-06-23 Thiemo Seufer <ths@mips.com>
782 David Ung <davidu@mips.com>
783
784 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
785 label_list.
786 * config/tc-mips.c (label_list): Define per-segment label_list.
787 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
788 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
789 mips_from_file_after_relocs, mips_define_label): Use per-segment
790 label_list.
791
3994f87e
TS
7922006-06-22 Thiemo Seufer <ths@mips.com>
793
794 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
795 (append_insn): Use it.
796 (md_apply_fix): Whitespace formatting.
797 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
798 mips16_extended_frag): Remove register specifier.
799 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
800 constants.
801
fa073d69
MS
8022006-06-21 Mark Shinwell <shinwell@codesourcery.com>
803
804 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
805 a directive saving VFP registers for ARMv6 or later.
806 (s_arm_unwind_save): Add parameter arch_v6 and call
807 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
808 appropriate.
809 (md_pseudo_table): Add entry for new "vsave" directive.
810 * doc/c-arm.texi: Correct error in example for "save"
811 directive (fstmdf -> fstmdx). Also document "vsave" directive.
812
8e77b565 8132006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
814 Anatoly Sokolov <aesok@post.ru>
815
a70ae331
AM
816 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
817 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
818 atmega164p/atmega324p.
819 * doc/c-avr.texi: Document new mcu and arch options.
820
8b1ad454
NC
8212006-06-17 Nick Clifton <nickc@redhat.com>
822
823 * config/tc-arm.c (enum parse_operand_result): Move outside of
824 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
825
9103f4f4
L
8262006-06-16 H.J. Lu <hongjiu.lu@intel.com>
827
828 * config/tc-i386.h (processor_type): New.
829 (arch_entry): Add type.
830
831 * config/tc-i386.c (cpu_arch_tune): New.
832 (cpu_arch_tune_flags): Likewise.
833 (cpu_arch_isa_flags): Likewise.
834 (cpu_arch): Updated.
835 (set_cpu_arch): Also update cpu_arch_isa_flags.
836 (md_assemble): Update cpu_arch_isa_flags.
837 (OPTION_MARCH): New.
838 (OPTION_MTUNE): Likewise.
839 (md_longopts): Add -march= and -mtune=.
840 (md_parse_option): Support -march= and -mtune=.
841 (md_show_usage): Add -march=CPU/-mtune=CPU.
842 (i386_target_format): Also update cpu_arch_isa_flags,
843 cpu_arch_tune and cpu_arch_tune_flags.
844
845 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
846
847 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
848
4962c51a
MS
8492006-06-15 Mark Shinwell <shinwell@codesourcery.com>
850
851 * config/tc-arm.c (enum parse_operand_result): New.
852 (struct group_reloc_table_entry): New.
853 (enum group_reloc_type): New.
854 (group_reloc_table): New array.
855 (find_group_reloc_table_entry): New function.
856 (parse_shifter_operand_group_reloc): New function.
857 (parse_address_main): New function, incorporating code
858 from the old parse_address function. To be used via...
859 (parse_address): wrapper for parse_address_main; and
860 (parse_address_group_reloc): new function, likewise.
861 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
862 OP_ADDRGLDRS, OP_ADDRGLDC.
863 (parse_operands): Support for these new operand codes.
864 New macro po_misc_or_fail_no_backtrack.
865 (encode_arm_cp_address): Preserve group relocations.
866 (insns): Modify to use the above operand codes where group
867 relocations are permitted.
868 (md_apply_fix): Handle the group relocations
869 ALU_PC_G0_NC through LDC_SB_G2.
870 (tc_gen_reloc): Likewise.
871 (arm_force_relocation): Leave group relocations for the linker.
872 (arm_fix_adjustable): Likewise.
873
cd2f129f
JB
8742006-06-15 Julian Brown <julian@codesourcery.com>
875
876 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
877 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
878 relocs properly.
879
46e883c5
L
8802006-06-12 H.J. Lu <hongjiu.lu@intel.com>
881
882 * config/tc-i386.c (process_suffix): Don't add rex64 for
883 "xchg %rax,%rax".
884
1787fe5b
TS
8852006-06-09 Thiemo Seufer <ths@mips.com>
886
887 * config/tc-mips.c (mips_ip): Maintain argument count.
888
96f989c2
AM
8892006-06-09 Alan Modra <amodra@bigpond.net.au>
890
891 * config/tc-iq2000.c: Include sb.h.
892
7c752c2a
TS
8932006-06-08 Nigel Stephens <nigel@mips.com>
894
895 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
896 aliases for better compatibility with SGI tools.
897
03bf704f
AM
8982006-06-08 Alan Modra <amodra@bigpond.net.au>
899
900 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
901 * Makefile.am (GASLIBS): Expand @BFDLIB@.
902 (BFDVER_H): Delete.
903 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
904 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
905 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
906 Run "make dep-am".
907 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
908 * Makefile.in: Regenerate.
909 * doc/Makefile.in: Regenerate.
910 * configure: Regenerate.
911
6648b7cf
JM
9122006-06-07 Joseph S. Myers <joseph@codesourcery.com>
913
914 * po/Make-in (pdf, ps): New dummy targets.
915
037e8744
JB
9162006-06-07 Julian Brown <julian@codesourcery.com>
917
918 * config/tc-arm.c (stdarg.h): include.
919 (arm_it): Add uncond_value field. Add isvec and issingle to operand
920 array.
921 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
922 REG_TYPE_NSDQ (single, double or quad vector reg).
923 (reg_expected_msgs): Update.
924 (BAD_FPU): Add macro for unsupported FPU instruction error.
925 (parse_neon_type): Support 'd' as an alias for .f64.
926 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
927 sets of registers.
928 (parse_vfp_reg_list): Don't update first arg on error.
929 (parse_neon_mov): Support extra syntax for VFP moves.
930 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
931 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
932 (parse_operands): Support isvec, issingle operands fields, new parse
933 codes above.
934 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
935 msr variants.
936 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
937 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
938 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
939 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
940 shapes.
941 (neon_shape): Redefine in terms of above.
942 (neon_shape_class): New enumeration, table of shape classes.
943 (neon_shape_el): New enumeration. One element of a shape.
944 (neon_shape_el_size): Register widths of above, where appropriate.
945 (neon_shape_info): New struct. Info for shape table.
946 (neon_shape_tab): New array.
947 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
948 (neon_check_shape): Rewrite as...
949 (neon_select_shape): New function to classify instruction shapes,
950 driven by new table neon_shape_tab array.
951 (neon_quad): New function. Return 1 if shape should set Q flag in
952 instructions (or equivalent), 0 otherwise.
953 (type_chk_of_el_type): Support F64.
954 (el_type_of_type_chk): Likewise.
955 (neon_check_type): Add support for VFP type checking (VFP data
956 elements fill their containing registers).
957 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
958 in thumb mode for VFP instructions.
959 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
960 and encode the current instruction as if it were that opcode.
961 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
962 arguments, call function in PFN.
963 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
964 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
965 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
966 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
967 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
968 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
969 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
970 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
971 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
972 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
973 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
974 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
975 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
976 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
977 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
978 neon_quad.
979 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
980 between VFP and Neon turns out to belong to Neon. Perform
981 architecture check and fill in condition field if appropriate.
982 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
983 (do_neon_cvt): Add support for VFP variants of instructions.
984 (neon_cvt_flavour): Extend to cover VFP conversions.
985 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
986 vmov variants.
987 (do_neon_ldr_str): Handle single-precision VFP load/store.
988 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
989 NS_NULL not NS_IGNORE.
990 (opcode_tag): Add OT_csuffixF for operands which either take a
991 conditional suffix, or have 0xF in the condition field.
992 (md_assemble): Add support for OT_csuffixF.
993 (NCE): Replace macro with...
994 (NCE_tag, NCE, NCEF): New macros.
995 (nCE): Replace macro with...
996 (nCE_tag, nCE, nCEF): New macros.
997 (insns): Add support for VFP insns or VFP versions of insns msr,
998 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
999 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1000 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1001 VFP/Neon insns together.
1002
ebd1c875
AM
10032006-06-07 Alan Modra <amodra@bigpond.net.au>
1004 Ladislav Michl <ladis@linux-mips.org>
1005
1006 * app.c: Don't include headers already included by as.h.
1007 * as.c: Likewise.
1008 * atof-generic.c: Likewise.
1009 * cgen.c: Likewise.
1010 * dwarf2dbg.c: Likewise.
1011 * expr.c: Likewise.
1012 * input-file.c: Likewise.
1013 * input-scrub.c: Likewise.
1014 * macro.c: Likewise.
1015 * output-file.c: Likewise.
1016 * read.c: Likewise.
1017 * sb.c: Likewise.
1018 * config/bfin-lex.l: Likewise.
1019 * config/obj-coff.h: Likewise.
1020 * config/obj-elf.h: Likewise.
1021 * config/obj-som.h: Likewise.
1022 * config/tc-arc.c: Likewise.
1023 * config/tc-arm.c: Likewise.
1024 * config/tc-avr.c: Likewise.
1025 * config/tc-bfin.c: Likewise.
1026 * config/tc-cris.c: Likewise.
1027 * config/tc-d10v.c: Likewise.
1028 * config/tc-d30v.c: Likewise.
1029 * config/tc-dlx.h: Likewise.
1030 * config/tc-fr30.c: Likewise.
1031 * config/tc-frv.c: Likewise.
1032 * config/tc-h8300.c: Likewise.
1033 * config/tc-hppa.c: Likewise.
1034 * config/tc-i370.c: Likewise.
1035 * config/tc-i860.c: Likewise.
1036 * config/tc-i960.c: Likewise.
1037 * config/tc-ip2k.c: Likewise.
1038 * config/tc-iq2000.c: Likewise.
1039 * config/tc-m32c.c: Likewise.
1040 * config/tc-m32r.c: Likewise.
1041 * config/tc-maxq.c: Likewise.
1042 * config/tc-mcore.c: Likewise.
1043 * config/tc-mips.c: Likewise.
1044 * config/tc-mmix.c: Likewise.
1045 * config/tc-mn10200.c: Likewise.
1046 * config/tc-mn10300.c: Likewise.
1047 * config/tc-msp430.c: Likewise.
1048 * config/tc-mt.c: Likewise.
1049 * config/tc-ns32k.c: Likewise.
1050 * config/tc-openrisc.c: Likewise.
1051 * config/tc-ppc.c: Likewise.
1052 * config/tc-s390.c: Likewise.
1053 * config/tc-sh.c: Likewise.
1054 * config/tc-sh64.c: Likewise.
1055 * config/tc-sparc.c: Likewise.
1056 * config/tc-tic30.c: Likewise.
1057 * config/tc-tic4x.c: Likewise.
1058 * config/tc-tic54x.c: Likewise.
1059 * config/tc-v850.c: Likewise.
1060 * config/tc-vax.c: Likewise.
1061 * config/tc-xc16x.c: Likewise.
1062 * config/tc-xstormy16.c: Likewise.
1063 * config/tc-xtensa.c: Likewise.
1064 * config/tc-z80.c: Likewise.
1065 * config/tc-z8k.c: Likewise.
1066 * macro.h: Don't include sb.h or ansidecl.h.
1067 * sb.h: Don't include stdio.h or ansidecl.h.
1068 * cond.c: Include sb.h.
1069 * itbl-lex.l: Include as.h instead of other system headers.
1070 * itbl-parse.y: Likewise.
1071 * itbl-ops.c: Similarly.
1072 * itbl-ops.h: Don't include as.h or ansidecl.h.
1073 * config/bfin-defs.h: Don't include bfd.h or as.h.
1074 * config/bfin-parse.y: Include as.h instead of other system headers.
1075
9622b051
AM
10762006-06-06 Ben Elliston <bje@au.ibm.com>
1077 Anton Blanchard <anton@samba.org>
1078
1079 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1080 (md_show_usage): Document it.
1081 (ppc_setup_opcodes): Test power6 opcode flag bits.
1082 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1083
65263ce3
TS
10842006-06-06 Thiemo Seufer <ths@mips.com>
1085 Chao-ying Fu <fu@mips.com>
1086
1087 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1088 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1089 (macro_build): Update comment.
1090 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1091 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1092 CPU_HAS_MDMX.
1093 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1094 MIPS_CPU_ASE_MDMX flags for sb1.
1095
a9e24354
TS
10962006-06-05 Thiemo Seufer <ths@mips.com>
1097
1098 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1099 appropriate.
1100 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1101 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1102 and MT instructions a fatal error. Use INSERT_OPERAND where
1103 appropriate. Improve warnings for break and wait code overflows.
1104 Use symbolic constant of OP_MASK_COPZ.
1105 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1106
4cfe2c59
DJ
11072006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1108
1109 * po/Make-in (top_builddir): Define.
1110
e10fad12
JM
11112006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1112
1113 * doc/Makefile.am (TEXI2DVI): Define.
1114 * doc/Makefile.in: Regenerate.
1115 * doc/c-arc.texi: Fix typo.
1116
12e64c2c
AM
11172006-06-01 Alan Modra <amodra@bigpond.net.au>
1118
1119 * config/obj-ieee.c: Delete.
1120 * config/obj-ieee.h: Delete.
1121 * Makefile.am (OBJ_FORMATS): Remove ieee.
1122 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1123 (obj-ieee.o): Remove rule.
1124 * Makefile.in: Regenerate.
1125 * configure.in (atof): Remove tahoe.
1126 (OBJ_MAYBE_IEEE): Don't define.
1127 * configure: Regenerate.
1128 * config.in: Regenerate.
1129 * doc/Makefile.in: Regenerate.
1130 * po/POTFILES.in: Regenerate.
1131
20e95c23
DJ
11322006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1133
1134 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1135 and LIBINTL_DEP everywhere.
1136 (INTLLIBS): Remove.
1137 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1138 * acinclude.m4: Include new gettext macros.
1139 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1140 Remove local code for po/Makefile.
1141 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1142
eebf07fb
NC
11432006-05-30 Nick Clifton <nickc@redhat.com>
1144
1145 * po/es.po: Updated Spanish translation.
1146
b6aee19e
DC
11472006-05-06 Denis Chertykov <denisc@overta.ru>
1148
1149 * doc/c-avr.texi: New file.
1150 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1151 * doc/all.texi: Set AVR
1152 * doc/as.texinfo: Include c-avr.texi
1153
f8fdc850 11542006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1155
f8fdc850
JZ
1156 * config/bfin-parse.y (check_macfunc): Loose the condition of
1157 calling check_multiply_halfregs ().
1158
a3205465
JZ
11592006-05-25 Jie Zhang <jie.zhang@analog.com>
1160
1161 * config/bfin-parse.y (asm_1): Better check and deal with
1162 vector and scalar Multiply 16-Bit Operands instructions.
1163
9b52905e
NC
11642006-05-24 Nick Clifton <nickc@redhat.com>
1165
1166 * config/tc-hppa.c: Convert to ISO C90 format.
1167 * config/tc-hppa.h: Likewise.
1168
11692006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1170 Randolph Chung <randolph@tausq.org>
a70ae331 1171
9b52905e
NC
1172 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1173 is_tls_ieoff, is_tls_leoff): Define.
1174 (fix_new_hppa): Handle TLS.
1175 (cons_fix_new_hppa): Likewise.
1176 (pa_ip): Likewise.
1177 (md_apply_fix): Handle TLS relocs.
1178 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1179
a70ae331 11802006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1181
1182 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1183
ad3fea08
TS
11842006-05-23 Thiemo Seufer <ths@mips.com>
1185 David Ung <davidu@mips.com>
1186 Nigel Stephens <nigel@mips.com>
1187
1188 [ gas/ChangeLog ]
1189 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1190 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1191 ISA_HAS_MXHC1): New macros.
1192 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1193 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1194 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1195 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1196 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1197 (mips_after_parse_args): Change default handling of float register
1198 size to account for 32bit code with 64bit FP. Better sanity checking
1199 of ISA/ASE/ABI option combinations.
1200 (s_mipsset): Support switching of GPR and FPR sizes via
1201 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1202 options.
1203 (mips_elf_final_processing): We should record the use of 64bit FP
1204 registers in 32bit code but we don't, because ELF header flags are
1205 a scarce ressource.
1206 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1207 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1208 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1209 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1210 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1211 missing -march options. Document .set arch=CPU. Move .set smartmips
1212 to ASE page. Use @code for .set FOO examples.
1213
8b64503a
JZ
12142006-05-23 Jie Zhang <jie.zhang@analog.com>
1215
1216 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1217 if needed.
1218
403022e0
JZ
12192006-05-23 Jie Zhang <jie.zhang@analog.com>
1220
1221 * config/bfin-defs.h (bfin_equals): Remove declaration.
1222 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1223 * config/tc-bfin.c (bfin_name_is_register): Remove.
1224 (bfin_equals): Remove.
1225 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1226 (bfin_name_is_register): Remove declaration.
1227
7455baf8
TS
12282006-05-19 Thiemo Seufer <ths@mips.com>
1229 Nigel Stephens <nigel@mips.com>
1230
1231 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1232 (mips_oddfpreg_ok): New function.
1233 (mips_ip): Use it.
1234
707bfff6
TS
12352006-05-19 Thiemo Seufer <ths@mips.com>
1236 David Ung <davidu@mips.com>
1237
1238 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1239 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1240 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1241 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1242 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1243 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1244 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1245 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1246 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1247 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1248 reg_names_o32, reg_names_n32n64): Define register classes.
1249 (reg_lookup): New function, use register classes.
1250 (md_begin): Reserve register names in the symbol table. Simplify
1251 OBJ_ELF defines.
1252 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1253 Use reg_lookup.
1254 (mips16_ip): Use reg_lookup.
1255 (tc_get_register): Likewise.
1256 (tc_mips_regname_to_dw2regnum): New function.
1257
1df69f4f
TS
12582006-05-19 Thiemo Seufer <ths@mips.com>
1259
1260 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1261 Un-constify string argument.
1262 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1263 Likewise.
1264 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1265 Likewise.
1266 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1267 Likewise.
1268 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1269 Likewise.
1270 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1271 Likewise.
1272 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1273 Likewise.
1274
377260ba
NS
12752006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1276
1277 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1278 cfloat/m68881 to correct architecture before using it.
1279
cce7653b
NC
12802006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1281
a70ae331 1282 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1283 constant values.
1284
b0796911
PB
12852006-05-15 Paul Brook <paul@codesourcery.com>
1286
1287 * config/tc-arm.c (arm_adjust_symtab): Use
1288 bfd_is_arm_special_symbol_name.
1289
64b607e6
BW
12902006-05-15 Bob Wilson <bob.wilson@acm.org>
1291
1292 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1293 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1294 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1295 Handle errors from calls to xtensa_opcode_is_* functions.
1296
9b3f89ee
TS
12972006-05-14 Thiemo Seufer <ths@mips.com>
1298
1299 * config/tc-mips.c (macro_build): Test for currently active
1300 mips16 option.
1301 (mips16_ip): Reject invalid opcodes.
1302
370b66a1
CD
13032006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1304
1305 * doc/as.texinfo: Rename "Index" to "AS Index",
1306 and "ABORT" to "ABORT (COFF)".
1307
b6895b4f
PB
13082006-05-11 Paul Brook <paul@codesourcery.com>
1309
1310 * config/tc-arm.c (parse_half): New function.
1311 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1312 (parse_operands): Ditto.
1313 (do_mov16): Reject invalid relocations.
1314 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1315 (insns): Replace Iffff with HALF.
1316 (md_apply_fix): Add MOVW and MOVT relocs.
1317 (tc_gen_reloc): Ditto.
1318 * doc/c-arm.texi: Document relocation operators
1319
e28387c3
PB
13202006-05-11 Paul Brook <paul@codesourcery.com>
1321
1322 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1323
89ee2ebe
TS
13242006-05-11 Thiemo Seufer <ths@mips.com>
1325
1326 * config/tc-mips.c (append_insn): Don't check the range of j or
1327 jal addresses.
1328
53baae48
NC
13292006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1330
1331 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1332 relocs against external symbols for WinCE targets.
53baae48
NC
1333 (md_apply_fix): Likewise.
1334
4e2a74a8
TS
13352006-05-09 David Ung <davidu@mips.com>
1336
1337 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1338 j or jal address.
1339
337ff0a5
NC
13402006-05-09 Nick Clifton <nickc@redhat.com>
1341
1342 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1343 against symbols which are not going to be placed into the symbol
1344 table.
1345
8c9f705e
BE
13462006-05-09 Ben Elliston <bje@au.ibm.com>
1347
1348 * expr.c (operand): Remove `if (0 && ..)' statement and
1349 subsequently unused target_op label. Collapse `if (1 || ..)'
1350 statement.
1351 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1352 separately above the switch.
1353
2fd0d2ac
NC
13542006-05-08 Nick Clifton <nickc@redhat.com>
1355
1356 PR gas/2623
1357 * config/tc-msp430.c (line_separator_character): Define as |.
1358
e16bfa71
TS
13592006-05-08 Thiemo Seufer <ths@mips.com>
1360 Nigel Stephens <nigel@mips.com>
1361 David Ung <davidu@mips.com>
1362
1363 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1364 (mips_opts): Likewise.
1365 (file_ase_smartmips): New variable.
1366 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1367 (macro_build): Handle SmartMIPS instructions.
1368 (mips_ip): Likewise.
1369 (md_longopts): Add argument handling for smartmips.
1370 (md_parse_options, mips_after_parse_args): Likewise.
1371 (s_mipsset): Add .set smartmips support.
1372 (md_show_usage): Document -msmartmips/-mno-smartmips.
1373 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1374 .set smartmips.
1375 * doc/c-mips.texi: Likewise.
1376
32638454
AM
13772006-05-08 Alan Modra <amodra@bigpond.net.au>
1378
1379 * write.c (relax_segment): Add pass count arg. Don't error on
1380 negative org/space on first two passes.
1381 (relax_seg_info): New struct.
1382 (relax_seg, write_object_file): Adjust.
1383 * write.h (relax_segment): Update prototype.
1384
b7fc2769
JB
13852006-05-05 Julian Brown <julian@codesourcery.com>
1386
1387 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1388 checking.
1389 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1390 architecture version checks.
1391 (insns): Allow overlapping instructions to be used in VFP mode.
1392
7f841127
L
13932006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1394
1395 PR gas/2598
1396 * config/obj-elf.c (obj_elf_change_section): Allow user
1397 specified SHF_ALPHA_GPREL.
1398
73160847
NC
13992006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1400
1401 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1402 for PMEM related expressions.
1403
56487c55
NC
14042006-05-05 Nick Clifton <nickc@redhat.com>
1405
1406 PR gas/2582
1407 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1408 insertion of a directory separator character into a string at a
1409 given offset. Uses heuristics to decide when to use a backslash
1410 character rather than a forward-slash character.
1411 (dwarf2_directive_loc): Use the macro.
1412 (out_debug_info): Likewise.
1413
d43b4baf
TS
14142006-05-05 Thiemo Seufer <ths@mips.com>
1415 David Ung <davidu@mips.com>
1416
1417 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1418 instruction.
1419 (macro): Add new case M_CACHE_AB.
1420
088fa78e
KH
14212006-05-04 Kazu Hirata <kazu@codesourcery.com>
1422
1423 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1424 (opcode_lookup): Issue a warning for opcode with
1425 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1426 identical to OT_cinfix3.
1427 (TxC3w, TC3w, tC3w): New.
1428 (insns): Use tC3w and TC3w for comparison instructions with
1429 's' suffix.
1430
c9049d30
AM
14312006-05-04 Alan Modra <amodra@bigpond.net.au>
1432
1433 * subsegs.h (struct frchain): Delete frch_seg.
1434 (frchain_root): Delete.
1435 (seg_info): Define as macro.
1436 * subsegs.c (frchain_root): Delete.
1437 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1438 (subsegs_begin, subseg_change): Adjust for above.
1439 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1440 rather than to one big list.
1441 (subseg_get): Don't special case abs, und sections.
1442 (subseg_new, subseg_force_new): Don't set frchainP here.
1443 (seg_info): Delete.
1444 (subsegs_print_statistics): Adjust frag chain control list traversal.
1445 * debug.c (dmp_frags): Likewise.
1446 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1447 at frchain_root. Make use of known frchain ordering.
1448 (last_frag_for_seg): Likewise.
1449 (get_frag_fix): Likewise. Add seg param.
1450 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1451 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1452 (SUB_SEGMENT_ALIGN): Likewise.
1453 (subsegs_finish): Adjust frchain list traversal.
1454 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1455 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1456 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1457 (xtensa_fix_b_j_loop_end_frags): Likewise.
1458 (xtensa_fix_close_loop_end_frags): Likewise.
1459 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1460 (retrieve_segment_info): Delete frch_seg initialisation.
1461
f592407e
AM
14622006-05-03 Alan Modra <amodra@bigpond.net.au>
1463
1464 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1465 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1466 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1467 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1468
df7849c5
JM
14692006-05-02 Joseph Myers <joseph@codesourcery.com>
1470
1471 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1472 here.
1473 (md_apply_fix3): Multiply offset by 4 here for
1474 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1475
2d545b82
L
14762006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1477 Jan Beulich <jbeulich@novell.com>
1478
1479 * config/tc-i386.c (output_invalid_buf): Change size for
1480 unsigned char.
1481 * config/tc-tic30.c (output_invalid_buf): Likewise.
1482
1483 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1484 unsigned char.
1485 * config/tc-tic30.c (output_invalid): Likewise.
1486
38fc1cb1
DJ
14872006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1488
1489 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1490 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1491 (asconfig.texi): Don't set top_srcdir.
1492 * doc/as.texinfo: Don't use top_srcdir.
1493 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1494
2d545b82
L
14952006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1496
1497 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1498 * config/tc-tic30.c (output_invalid_buf): Likewise.
1499
1500 * config/tc-i386.c (output_invalid): Use snprintf instead of
1501 sprintf.
1502 * config/tc-ia64.c (declare_register_set): Likewise.
1503 (emit_one_bundle): Likewise.
1504 (check_dependencies): Likewise.
1505 * config/tc-tic30.c (output_invalid): Likewise.
1506
a8bc6c78
PB
15072006-05-02 Paul Brook <paul@codesourcery.com>
1508
1509 * config/tc-arm.c (arm_optimize_expr): New function.
1510 * config/tc-arm.h (md_optimize_expr): Define
1511 (arm_optimize_expr): Add prototype.
1512 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1513
58633d9a
BE
15142006-05-02 Ben Elliston <bje@au.ibm.com>
1515
22772e33
BE
1516 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1517 field unsigned.
1518
58633d9a
BE
1519 * sb.h (sb_list_vector): Move to sb.c.
1520 * sb.c (free_list): Use type of sb_list_vector directly.
1521 (sb_build): Fix off-by-one error in assertion about `size'.
1522
89cdfe57
BE
15232006-05-01 Ben Elliston <bje@au.ibm.com>
1524
1525 * listing.c (listing_listing): Remove useless loop.
1526 * macro.c (macro_expand): Remove is_positional local variable.
1527 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1528 and simplify surrounding expressions, where possible.
1529 (assign_symbol): Likewise.
1530 (s_weakref): Likewise.
1531 * symbols.c (colon): Likewise.
1532
c35da140
AM
15332006-05-01 James Lemke <jwlemke@wasabisystems.com>
1534
1535 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1536
9bcd4f99
TS
15372006-04-30 Thiemo Seufer <ths@mips.com>
1538 David Ung <davidu@mips.com>
1539
1540 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1541 (mips_immed): New table that records various handling of udi
1542 instruction patterns.
1543 (mips_ip): Adds udi handling.
1544
001ae1a4
AM
15452006-04-28 Alan Modra <amodra@bigpond.net.au>
1546
1547 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1548 of list rather than beginning.
1549
136da414
JB
15502006-04-26 Julian Brown <julian@codesourcery.com>
1551
1552 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1553 (is_quarter_float): Rename from above. Simplify slightly.
1554 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1555 number.
1556 (parse_neon_mov): Parse floating-point constants.
1557 (neon_qfloat_bits): Fix encoding.
1558 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1559 preference to integer encoding when using the F32 type.
1560
dcbf9037
JB
15612006-04-26 Julian Brown <julian@codesourcery.com>
1562
1563 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1564 zero-initialising structures containing it will lead to invalid types).
1565 (arm_it): Add vectype to each operand.
1566 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1567 defined field.
1568 (neon_typed_alias): New structure. Extra information for typed
1569 register aliases.
1570 (reg_entry): Add neon type info field.
1571 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1572 Break out alternative syntax for coprocessor registers, etc. into...
1573 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1574 out from arm_reg_parse.
1575 (parse_neon_type): Move. Return SUCCESS/FAIL.
1576 (first_error): New function. Call to ensure first error which occurs is
1577 reported.
1578 (parse_neon_operand_type): Parse exactly one type.
1579 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1580 (parse_typed_reg_or_scalar): New function. Handle core of both
1581 arm_typed_reg_parse and parse_scalar.
1582 (arm_typed_reg_parse): Parse a register with an optional type.
1583 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1584 result.
1585 (parse_scalar): Parse a Neon scalar with optional type.
1586 (parse_reg_list): Use first_error.
1587 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1588 (neon_alias_types_same): New function. Return true if two (alias) types
1589 are the same.
1590 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1591 of elements.
1592 (insert_reg_alias): Return new reg_entry not void.
1593 (insert_neon_reg_alias): New function. Insert type/index information as
1594 well as register for alias.
1595 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1596 make typed register aliases accordingly.
1597 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1598 of line.
1599 (s_unreq): Delete type information if present.
1600 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1601 (s_arm_unwind_save_mmxwcg): Likewise.
1602 (s_arm_unwind_movsp): Likewise.
1603 (s_arm_unwind_setfp): Likewise.
1604 (parse_shift): Likewise.
1605 (parse_shifter_operand): Likewise.
1606 (parse_address): Likewise.
1607 (parse_tb): Likewise.
1608 (tc_arm_regname_to_dw2regnum): Likewise.
1609 (md_pseudo_table): Add dn, qn.
1610 (parse_neon_mov): Handle typed operands.
1611 (parse_operands): Likewise.
1612 (neon_type_mask): Add N_SIZ.
1613 (N_ALLMODS): New macro.
1614 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1615 (el_type_of_type_chk): Add some safeguards.
1616 (modify_types_allowed): Fix logic bug.
1617 (neon_check_type): Handle operands with types.
1618 (neon_three_same): Remove redundant optional arg handling.
1619 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1620 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1621 (do_neon_step): Adjust accordingly.
1622 (neon_cmode_for_logic_imm): Use first_error.
1623 (do_neon_bitfield): Call neon_check_type.
1624 (neon_dyadic): Rename to...
1625 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1626 to allow modification of type of the destination.
1627 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1628 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1629 (do_neon_compare): Make destination be an untyped bitfield.
1630 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1631 (neon_mul_mac): Return early in case of errors.
1632 (neon_move_immediate): Use first_error.
1633 (neon_mac_reg_scalar_long): Fix type to include scalar.
1634 (do_neon_dup): Likewise.
1635 (do_neon_mov): Likewise (in several places).
1636 (do_neon_tbl_tbx): Fix type.
1637 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1638 (do_neon_ld_dup): Exit early in case of errors and/or use
1639 first_error.
1640 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1641 Handle .dn/.qn directives.
1642 (REGDEF): Add zero for reg_entry neon field.
1643
5287ad62
JB
16442006-04-26 Julian Brown <julian@codesourcery.com>
1645
1646 * config/tc-arm.c (limits.h): Include.
1647 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1648 (fpu_vfp_v3_or_neon_ext): Declare constants.
1649 (neon_el_type): New enumeration of types for Neon vector elements.
1650 (neon_type_el): New struct. Define type and size of a vector element.
1651 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1652 instruction.
1653 (neon_type): Define struct. The type of an instruction.
1654 (arm_it): Add 'vectype' for the current instruction.
1655 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1656 (vfp_sp_reg_pos): Rename to...
1657 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1658 tags.
1659 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1660 (Neon D or Q register).
1661 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1662 register.
1663 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1664 (my_get_expression): Allow above constant as argument to accept
1665 64-bit constants with optional prefix.
1666 (arm_reg_parse): Add extra argument to return the specific type of
1667 register in when either a D or Q register (REG_TYPE_NDQ) is
1668 requested. Can be NULL.
1669 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1670 (parse_reg_list): Update for new arm_reg_parse args.
1671 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1672 (parse_neon_el_struct_list): New function. Parse element/structure
1673 register lists for VLD<n>/VST<n> instructions.
1674 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1675 (s_arm_unwind_save_mmxwr): Likewise.
1676 (s_arm_unwind_save_mmxwcg): Likewise.
1677 (s_arm_unwind_movsp): Likewise.
1678 (s_arm_unwind_setfp): Likewise.
1679 (parse_big_immediate): New function. Parse an immediate, which may be
1680 64 bits wide. Put results in inst.operands[i].
1681 (parse_shift): Update for new arm_reg_parse args.
1682 (parse_address): Likewise. Add parsing of alignment specifiers.
1683 (parse_neon_mov): Parse the operands of a VMOV instruction.
1684 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1685 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1686 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1687 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1688 (parse_operands): Handle new codes above.
1689 (encode_arm_vfp_sp_reg): Rename to...
1690 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1691 selected VFP version only supports D0-D15.
1692 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1693 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1694 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1695 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1696 encode_arm_vfp_reg name, and allow 32 D regs.
1697 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1698 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1699 regs.
1700 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1701 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1702 constant-load and conversion insns introduced with VFPv3.
1703 (neon_tab_entry): New struct.
1704 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1705 those which are the targets of pseudo-instructions.
1706 (neon_opc): Enumerate opcodes, use as indices into...
1707 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1708 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1709 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1710 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1711 neon_enc_tab.
1712 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1713 Neon instructions.
1714 (neon_type_mask): New. Compact type representation for type checking.
1715 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1716 permitted type combinations.
1717 (N_IGNORE_TYPE): New macro.
1718 (neon_check_shape): New function. Check an instruction shape for
1719 multiple alternatives. Return the specific shape for the current
1720 instruction.
1721 (neon_modify_type_size): New function. Modify a vector type and size,
1722 depending on the bit mask in argument 1.
1723 (neon_type_promote): New function. Convert a given "key" type (of an
1724 operand) into the correct type for a different operand, based on a bit
1725 mask.
1726 (type_chk_of_el_type): New function. Convert a type and size into the
1727 compact representation used for type checking.
1728 (el_type_of_type_ckh): New function. Reverse of above (only when a
1729 single bit is set in the bit mask).
1730 (modify_types_allowed): New function. Alter a mask of allowed types
1731 based on a bit mask of modifications.
1732 (neon_check_type): New function. Check the type of the current
1733 instruction against the variable argument list. The "key" type of the
1734 instruction is returned.
1735 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1736 a Neon data-processing instruction depending on whether we're in ARM
1737 mode or Thumb-2 mode.
1738 (neon_logbits): New function.
1739 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1740 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1741 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1742 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1743 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1744 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1745 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1746 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1747 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1748 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1749 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1750 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1751 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1752 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1753 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1754 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1755 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1756 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1757 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1758 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1759 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1760 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1761 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1762 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1763 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1764 helpers.
1765 (parse_neon_type): New function. Parse Neon type specifier.
1766 (opcode_lookup): Allow parsing of Neon type specifiers.
1767 (REGNUM2, REGSETH, REGSET2): New macros.
1768 (reg_names): Add new VFPv3 and Neon registers.
1769 (NUF, nUF, NCE, nCE): New macros for opcode table.
1770 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1771 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1772 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1773 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1774 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1775 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1776 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1777 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1778 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1779 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1780 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1781 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1782 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1783 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1784 fto[us][lh][sd].
1785 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1786 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1787 (arm_option_cpu_value): Add vfp3 and neon.
1788 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1789 VFPv1 attribute.
1790
1946c96e
BW
17912006-04-25 Bob Wilson <bob.wilson@acm.org>
1792
1793 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1794 syntax instead of hardcoded opcodes with ".w18" suffixes.
1795 (wide_branch_opcode): New.
1796 (build_transition): Use it to check for wide branch opcodes with
1797 either ".w18" or ".w15" suffixes.
1798
5033a645
BW
17992006-04-25 Bob Wilson <bob.wilson@acm.org>
1800
1801 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1802 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1803 frag's is_literal flag.
1804
395fa56f
BW
18052006-04-25 Bob Wilson <bob.wilson@acm.org>
1806
1807 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1808
708587a4
KH
18092006-04-23 Kazu Hirata <kazu@codesourcery.com>
1810
1811 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1812 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1813 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1814 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1815 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1816
8463be01
PB
18172005-04-20 Paul Brook <paul@codesourcery.com>
1818
1819 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1820 all targets.
1821 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1822
f26a5955
AM
18232006-04-19 Alan Modra <amodra@bigpond.net.au>
1824
1825 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1826 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1827 Make some cpus unsupported on ELF. Run "make dep-am".
1828 * Makefile.in: Regenerate.
1829
241a6c40
AM
18302006-04-19 Alan Modra <amodra@bigpond.net.au>
1831
1832 * configure.in (--enable-targets): Indent help message.
1833 * configure: Regenerate.
1834
bb8f5920
L
18352006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1836
1837 PR gas/2533
1838 * config/tc-i386.c (i386_immediate): Check illegal immediate
1839 register operand.
1840
23d9d9de
AM
18412006-04-18 Alan Modra <amodra@bigpond.net.au>
1842
64e74474
AM
1843 * config/tc-i386.c: Formatting.
1844 (output_disp, output_imm): ISO C90 params.
1845
6cbe03fb
AM
1846 * frags.c (frag_offset_fixed_p): Constify args.
1847 * frags.h (frag_offset_fixed_p): Ditto.
1848
23d9d9de
AM
1849 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1850 (COFF_MAGIC): Delete.
a37d486e
AM
1851
1852 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1853
e7403566
DJ
18542006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1855
1856 * po/POTFILES.in: Regenerated.
1857
58ab4f3d
MM
18582006-04-16 Mark Mitchell <mark@codesourcery.com>
1859
1860 * doc/as.texinfo: Mention that some .type syntaxes are not
1861 supported on all architectures.
1862
482fd9f9
BW
18632006-04-14 Sterling Augustine <sterling@tensilica.com>
1864
1865 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1866 instructions when such transformations have been disabled.
1867
05d58145
BW
18682006-04-10 Sterling Augustine <sterling@tensilica.com>
1869
1870 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1871 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1872 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1873 decoding the loop instructions. Remove current_offset variable.
1874 (xtensa_fix_short_loop_frags): Likewise.
1875 (min_bytes_to_other_loop_end): Remove current_offset argument.
1876
9e75b3fa
AM
18772006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1878
a37d486e 1879 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1880 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1881
d727e8c2
NC
18822006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1883
1884 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1885 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1886 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1887 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1888 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1889 at90can64, at90usb646, at90usb647, at90usb1286 and
1890 at90usb1287.
1891 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1892
d252fdde
PB
18932006-04-07 Paul Brook <paul@codesourcery.com>
1894
1895 * config/tc-arm.c (parse_operands): Set default error message.
1896
ab1eb5fe
PB
18972006-04-07 Paul Brook <paul@codesourcery.com>
1898
1899 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1900
7ae2971b
PB
19012006-04-07 Paul Brook <paul@codesourcery.com>
1902
1903 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1904
53365c0d
PB
19052006-04-07 Paul Brook <paul@codesourcery.com>
1906
1907 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1908 (move_or_literal_pool): Handle Thumb-2 instructions.
1909 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1910
45aa61fe
AM
19112006-04-07 Alan Modra <amodra@bigpond.net.au>
1912
1913 PR 2512.
1914 * config/tc-i386.c (match_template): Move 64-bit operand tests
1915 inside loop.
1916
108a6f8e
CD
19172006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1918
1919 * po/Make-in: Add install-html target.
1920 * Makefile.am: Add install-html and install-html-recursive targets.
1921 * Makefile.in: Regenerate.
1922 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1923 * configure: Regenerate.
1924 * doc/Makefile.am: Add install-html and install-html-am targets.
1925 * doc/Makefile.in: Regenerate.
1926
ec651a3b
AM
19272006-04-06 Alan Modra <amodra@bigpond.net.au>
1928
1929 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1930 second scan.
1931
910600e9
RS
19322006-04-05 Richard Sandiford <richard@codesourcery.com>
1933 Daniel Jacobowitz <dan@codesourcery.com>
1934
1935 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1936 (GOTT_BASE, GOTT_INDEX): New.
1937 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1938 GOTT_INDEX when generating VxWorks PIC.
1939 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1940 use the generic *-*-vxworks* stanza instead.
1941
99630778
AM
19422006-04-04 Alan Modra <amodra@bigpond.net.au>
1943
1944 PR 997
1945 * frags.c (frag_offset_fixed_p): New function.
1946 * frags.h (frag_offset_fixed_p): Declare.
1947 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1948 (resolve_expression): Likewise.
1949
a02728c8
BW
19502006-04-03 Sterling Augustine <sterling@tensilica.com>
1951
1952 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1953 of the same length but different numbers of slots.
1954
9dfde49d
AS
19552006-03-30 Andreas Schwab <schwab@suse.de>
1956
1957 * configure.in: Fix help string for --enable-targets option.
1958 * configure: Regenerate.
1959
2da12c60
NS
19602006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1961
6d89cc8f
NS
1962 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1963 (m68k_ip): ... here. Use for all chips. Protect against buffer
1964 overrun and avoid excessive copying.
1965
2da12c60
NS
1966 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1967 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1968 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1969 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1970 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1971 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1972 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1973 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1974 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1975 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1976 (struct m68k_cpu): Change chip field to control_regs.
1977 (current_chip): Remove.
1978 (control_regs): New.
1979 (m68k_archs, m68k_extensions): Adjust.
1980 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1981 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1982 (find_cf_chip): Reimplement for new organization of cpu table.
1983 (select_control_regs): Remove.
1984 (mri_chip): Adjust.
1985 (struct save_opts): Save control regs, not chip.
1986 (s_save, s_restore): Adjust.
1987 (m68k_lookup_cpu): Give deprecated warning when necessary.
1988 (m68k_init_arch): Adjust.
1989 (md_show_usage): Adjust for new cpu table organization.
1990
1ac4baed
BS
19912006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1992
1993 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1994 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1995 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1996 "elf/bfin.h".
1997 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1998 (any_gotrel): New rule.
1999 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2000 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2001 "elf/bfin.h".
2002 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2003 (bfin_pic_ptr): New function.
2004 (md_pseudo_table): Add it for ".picptr".
2005 (OPTION_FDPIC): New macro.
2006 (md_longopts): Add -mfdpic.
2007 (md_parse_option): Handle it.
2008 (md_begin): Set BFD flags.
2009 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2010 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2011 us for GOT relocs.
2012 * Makefile.am (bfin-parse.o): Update dependencies.
2013 (DEPTC_bfin_elf): Likewise.
2014 * Makefile.in: Regenerate.
2015
a9d34880
RS
20162006-03-25 Richard Sandiford <richard@codesourcery.com>
2017
2018 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2019 mcfemac instead of mcfmac.
2020
9ca26584
AJ
20212006-03-23 Michael Matz <matz@suse.de>
2022
2023 * config/tc-i386.c (type_names): Correct placement of 'static'.
2024 (reloc): Map some more relocs to their 64 bit counterpart when
2025 size is 8.
2026 (output_insn): Work around breakage if DEBUG386 is defined.
2027 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2028 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2029 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2030 different from i386.
2031 (output_imm): Ditto.
2032 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2033 Imm64.
2034 (md_convert_frag): Jumps can now be larger than 2GB away, error
2035 out in that case.
2036 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2037 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2038
0a44bf69
RS
20392006-03-22 Richard Sandiford <richard@codesourcery.com>
2040 Daniel Jacobowitz <dan@codesourcery.com>
2041 Phil Edwards <phil@codesourcery.com>
2042 Zack Weinberg <zack@codesourcery.com>
2043 Mark Mitchell <mark@codesourcery.com>
2044 Nathan Sidwell <nathan@codesourcery.com>
2045
2046 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2047 (md_begin): Complain about -G being used for PIC. Don't change
2048 the text, data and bss alignments on VxWorks.
2049 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2050 generating VxWorks PIC.
2051 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2052 (macro): Likewise, but do not treat la $25 specially for
2053 VxWorks PIC, and do not handle jal.
2054 (OPTION_MVXWORKS_PIC): New macro.
2055 (md_longopts): Add -mvxworks-pic.
2056 (md_parse_option): Don't complain about using PIC and -G together here.
2057 Handle OPTION_MVXWORKS_PIC.
2058 (md_estimate_size_before_relax): Always use the first relaxation
2059 sequence on VxWorks.
2060 * config/tc-mips.h (VXWORKS_PIC): New.
2061
080eb7fe
PB
20622006-03-21 Paul Brook <paul@codesourcery.com>
2063
2064 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2065
03aaa593
BW
20662006-03-21 Sterling Augustine <sterling@tensilica.com>
2067
2068 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2069 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2070 (get_loop_align_size): New.
2071 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2072 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2073 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2074 (get_noop_aligned_address): Use get_loop_align_size.
2075 (get_aligned_diff): Likewise.
2076
3e94bf1a
PB
20772006-03-21 Paul Brook <paul@codesourcery.com>
2078
2079 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2080
dfa9f0d5
PB
20812006-03-20 Paul Brook <paul@codesourcery.com>
2082
2083 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2084 (do_t_branch): Encode branches inside IT blocks as unconditional.
2085 (do_t_cps): New function.
2086 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2087 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2088 (opcode_lookup): Allow conditional suffixes on all instructions in
2089 Thumb mode.
2090 (md_assemble): Advance condexec state before checking for errors.
2091 (insns): Use do_t_cps.
2092
6e1cb1a6
PB
20932006-03-20 Paul Brook <paul@codesourcery.com>
2094
2095 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2096 outputting the insn.
2097
0a966e2d
JBG
20982006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2099
2100 * config/tc-vax.c: Update copyright year.
2101 * config/tc-vax.h: Likewise.
2102
a49fcc17
JBG
21032006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2104
2105 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2106 make it static.
2107 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2108
f5208ef2
PB
21092006-03-17 Paul Brook <paul@codesourcery.com>
2110
2111 * config/tc-arm.c (insns): Add ldm and stm.
2112
cb4c78d6
BE
21132006-03-17 Ben Elliston <bje@au.ibm.com>
2114
2115 PR gas/2446
2116 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2117
c16d2bf0
PB
21182006-03-16 Paul Brook <paul@codesourcery.com>
2119
2120 * config/tc-arm.c (insns): Add "svc".
2121
80ca4e2c
BW
21222006-03-13 Bob Wilson <bob.wilson@acm.org>
2123
2124 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2125 flag and avoid double underscore prefixes.
2126
3a4a14e9
PB
21272006-03-10 Paul Brook <paul@codesourcery.com>
2128
2129 * config/tc-arm.c (md_begin): Handle EABIv5.
2130 (arm_eabis): Add EF_ARM_EABI_VER5.
2131 * doc/c-arm.texi: Document -meabi=5.
2132
518051dc
BE
21332006-03-10 Ben Elliston <bje@au.ibm.com>
2134
2135 * app.c (do_scrub_chars): Simplify string handling.
2136
00a97672
RS
21372006-03-07 Richard Sandiford <richard@codesourcery.com>
2138 Daniel Jacobowitz <dan@codesourcery.com>
2139 Zack Weinberg <zack@codesourcery.com>
2140 Nathan Sidwell <nathan@codesourcery.com>
2141 Paul Brook <paul@codesourcery.com>
2142 Ricardo Anguiano <anguiano@codesourcery.com>
2143 Phil Edwards <phil@codesourcery.com>
2144
2145 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2146 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2147 R_ARM_ABS12 reloc.
2148 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2149 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2150 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2151
b29757dc
BW
21522006-03-06 Bob Wilson <bob.wilson@acm.org>
2153
2154 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2155 even when using the text-section-literals option.
2156
0b2e31dc
NS
21572006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2158
2159 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2160 and cf.
2161 (m68k_ip): <case 'J'> Check we have some control regs.
2162 (md_parse_option): Allow raw arch switch.
2163 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2164 whether 68881 or cfloat was meant by -mfloat.
2165 (md_show_usage): Adjust extension display.
2166 (m68k_elf_final_processing): Adjust.
2167
df406460
NC
21682006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2169
2170 * config/tc-avr.c (avr_mod_hash_value): New function.
2171 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2172 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2173 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2174 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2175 of (int).
2176 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2177 fixups, abort otherwise.
df406460
NC
2178 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2179 tc_fix_adjustable): Define.
a70ae331 2180
53022e4a
JW
21812006-03-02 James E Wilson <wilson@specifix.com>
2182
2183 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2184 change the template, then clear md.slot[curr].end_of_insn_group.
2185
9f6f925e
JB
21862006-02-28 Jan Beulich <jbeulich@novell.com>
2187
2188 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2189
0e31b3e1
JB
21902006-02-28 Jan Beulich <jbeulich@novell.com>
2191
2192 PR/1070
2193 * macro.c (getstring): Don't treat parentheses special anymore.
2194 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2195 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2196 characters.
2197
10cd14b4
AM
21982006-02-28 Mat <mat@csail.mit.edu>
2199
2200 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2201
63752a75
JJ
22022006-02-27 Jakub Jelinek <jakub@redhat.com>
2203
2204 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2205 field.
2206 (CFI_signal_frame): Define.
2207 (cfi_pseudo_table): Add .cfi_signal_frame.
2208 (dot_cfi): Handle CFI_signal_frame.
2209 (output_cie): Handle cie->signal_frame.
2210 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2211 different. Copy signal_frame from FDE to newly created CIE.
2212 * doc/as.texinfo: Document .cfi_signal_frame.
2213
f7d9e5c3
CD
22142006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2215
2216 * doc/Makefile.am: Add html target.
2217 * doc/Makefile.in: Regenerate.
2218 * po/Make-in: Add html target.
2219
331d2d0d
L
22202006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2221
8502d882 2222 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2223 Instructions.
2224
8502d882 2225 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2226 (CpuUnknownFlags): Add CpuMNI.
2227
10156f83
DM
22282006-02-24 David S. Miller <davem@sunset.davemloft.net>
2229
2230 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2231 (hpriv_reg_table): New table for hyperprivileged registers.
2232 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2233 register encoding.
2234
6772dd07
DD
22352006-02-24 DJ Delorie <dj@redhat.com>
2236
2237 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2238 (tc_gen_reloc): Don't define.
2239 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2240 (OPTION_LINKRELAX): New.
2241 (md_longopts): Add it.
2242 (m32c_relax): New.
2243 (md_parse_options): Set it.
2244 (md_assemble): Emit relaxation relocs as needed.
2245 (md_convert_frag): Emit relaxation relocs as needed.
2246 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2247 (m32c_apply_fix): New.
2248 (tc_gen_reloc): New.
2249 (m32c_force_relocation): Force out jump relocs when relaxing.
2250 (m32c_fix_adjustable): Return false if relaxing.
2251
62b3e311
PB
22522006-02-24 Paul Brook <paul@codesourcery.com>
2253
2254 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2255 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2256 (struct asm_barrier_opt): Define.
2257 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2258 (parse_psr): Accept V7M psr names.
2259 (parse_barrier): New function.
2260 (enum operand_parse_code): Add OP_oBARRIER.
2261 (parse_operands): Implement OP_oBARRIER.
2262 (do_barrier): New function.
2263 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2264 (do_t_cpsi): Add V7M restrictions.
2265 (do_t_mrs, do_t_msr): Validate V7M variants.
2266 (md_assemble): Check for NULL variants.
2267 (v7m_psrs, barrier_opt_names): New tables.
2268 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2269 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2270 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2271 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2272 (struct cpu_arch_ver_table): Define.
2273 (cpu_arch_ver): New.
2274 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2275 Tag_CPU_arch_profile.
2276 * doc/c-arm.texi: Document new cpu and arch options.
2277
59cf82fe
L
22782006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2279
2280 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2281
19a7219f
L
22822006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2283
2284 * config/tc-ia64.c: Update copyright years.
2285
7f3dfb9c
L
22862006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2287
2288 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2289 SDM 2.2.
2290
f40d1643
PB
22912005-02-22 Paul Brook <paul@codesourcery.com>
2292
2293 * config/tc-arm.c (do_pld): Remove incorrect write to
2294 inst.instruction.
2295 (encode_thumb32_addr_mode): Use correct operand.
2296
216d22bc
PB
22972006-02-21 Paul Brook <paul@codesourcery.com>
2298
2299 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2300
d70c5fc7
NC
23012006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2302 Anil Paranjape <anilp1@kpitcummins.com>
2303 Shilin Shakti <shilins@kpitcummins.com>
2304
2305 * Makefile.am: Add xc16x related entry.
2306 * Makefile.in: Regenerate.
2307 * configure.in: Added xc16x related entry.
2308 * configure: Regenerate.
2309 * config/tc-xc16x.h: New file
2310 * config/tc-xc16x.c: New file
2311 * doc/c-xc16x.texi: New file for xc16x
2312 * doc/all.texi: Entry for xc16x
a70ae331 2313 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2314 * NEWS: Announce the support for the new target.
2315
aaa2ab3d
NH
23162006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2317
2318 * configure.tgt: set emulation for mips-*-netbsd*
2319
82de001f
JJ
23202006-02-14 Jakub Jelinek <jakub@redhat.com>
2321
2322 * config.in: Rebuilt.
2323
431ad2d0
BW
23242006-02-13 Bob Wilson <bob.wilson@acm.org>
2325
2326 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2327 from 1, not 0, in error messages.
2328 (md_assemble): Simplify special-case check for ENTRY instructions.
2329 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2330 operand in error message.
2331
94089a50
JM
23322006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2333
2334 * configure.tgt (arm-*-linux-gnueabi*): Change to
2335 arm-*-linux-*eabi*.
2336
52de4c06
NC
23372006-02-10 Nick Clifton <nickc@redhat.com>
2338
70e45ad9
NC
2339 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2340 32-bit value is propagated into the upper bits of a 64-bit long.
2341
52de4c06
NC
2342 * config/tc-arc.c (init_opcode_tables): Fix cast.
2343 (arc_extoper, md_operand): Likewise.
2344
21af2bbd
BW
23452006-02-09 David Heine <dlheine@tensilica.com>
2346
2347 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2348 each relaxation step.
2349
75a706fc 23502006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2351
75a706fc
L
2352 * configure.in (CHECK_DECLS): Add vsnprintf.
2353 * configure: Regenerate.
2354 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2355 include/declare here, but...
2356 * as.h: Move code detecting VARARGS idiom to the top.
2357 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2358 (vsnprintf): Declare if not already declared.
2359
0d474464
L
23602006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2361
2362 * as.c (close_output_file): New.
2363 (main): Register close_output_file with xatexit before
2364 dump_statistics. Don't call output_file_close.
2365
266abb8f
NS
23662006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2367
2368 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2369 mcf5329_control_regs): New.
2370 (not_current_architecture, selected_arch, selected_cpu): New.
2371 (m68k_archs, m68k_extensions): New.
2372 (archs): Renamed to ...
2373 (m68k_cpus): ... here. Adjust.
2374 (n_arches): Remove.
2375 (md_pseudo_table): Add arch and cpu directives.
2376 (find_cf_chip, m68k_ip): Adjust table scanning.
2377 (no_68851, no_68881): Remove.
2378 (md_assemble): Lazily initialize.
2379 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2380 (md_init_after_args): Move functionality to m68k_init_arch.
2381 (mri_chip): Adjust table scanning.
2382 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2383 options with saner parsing.
2384 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2385 m68k_init_arch): New.
2386 (s_m68k_cpu, s_m68k_arch): New.
2387 (md_show_usage): Adjust.
2388 (m68k_elf_final_processing): Set CF EF flags.
2389 * config/tc-m68k.h (m68k_init_after_args): Remove.
2390 (tc_init_after_args): Remove.
2391 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2392 (M68k-Directives): Document .arch and .cpu directives.
2393
134dcee5
AM
23942006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2395
a70ae331
AM
2396 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2397 synonyms for equ and defl.
134dcee5
AM
2398 (z80_cons_fix_new): New function.
2399 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2400 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2401 now handled as pseudo-op rather than an instruction.
2402 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2403 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2404 Add entries for def24,def32,d24,d32.
2405 (md_assemble): Improved error handling.
2406 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2407 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2408 (z80_cons_fix_new): Declare.
a70ae331 2409 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2410 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2411
a9931606
PB
24122006-02-02 Paul Brook <paul@codesourcery.com>
2413
2414 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2415
ef8d22e6
PB
24162005-02-02 Paul Brook <paul@codesourcery.com>
2417
2418 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2419 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2420 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2421 T2_OPCODE_RSB): Define.
2422 (thumb32_negate_data_op): New function.
2423 (md_apply_fix): Use it.
2424
e7da6241
BW
24252006-01-31 Bob Wilson <bob.wilson@acm.org>
2426
2427 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2428 fields.
2429 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2430 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2431 subtracted symbols.
2432 (relaxation_requirements): Add pfinish_frag argument and use it to
2433 replace setting tinsn->record_fix fields.
2434 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2435 and vinsn_to_insnbuf. Remove references to record_fix and
2436 slot_sub_symbols fields.
2437 (xtensa_mark_narrow_branches): Delete unused code.
2438 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2439 a symbol.
2440 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2441 record_fix fields.
2442 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2443 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2444 of the record_fix field. Simplify error messages for unexpected
2445 symbolic operands.
2446 (set_expr_symbol_offset_diff): Delete.
2447
79134647
PB
24482006-01-31 Paul Brook <paul@codesourcery.com>
2449
2450 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2451
e74cfd16
PB
24522006-01-31 Paul Brook <paul@codesourcery.com>
2453 Richard Earnshaw <rearnsha@arm.com>
2454
2455 * config/tc-arm.c: Use arm_feature_set.
2456 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2457 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2458 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2459 New variables.
2460 (insns): Use them.
2461 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2462 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2463 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2464 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2465 feature flags.
2466 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2467 (arm_opts): Move old cpu/arch options from here...
2468 (arm_legacy_opts): ... to here.
2469 (md_parse_option): Search arm_legacy_opts.
2470 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2471 (arm_float_abis, arm_eabis): Make const.
2472
d47d412e
BW
24732006-01-25 Bob Wilson <bob.wilson@acm.org>
2474
2475 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2476
b14273fe
JZ
24772006-01-21 Jie Zhang <jie.zhang@analog.com>
2478
2479 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2480 in load immediate intruction.
2481
39cd1c76
JZ
24822006-01-21 Jie Zhang <jie.zhang@analog.com>
2483
2484 * config/bfin-parse.y (value_match): Use correct conversion
2485 specifications in template string for __FILE__ and __LINE__.
2486 (binary): Ditto.
2487 (unary): Ditto.
2488
67a4f2b7
AO
24892006-01-18 Alexandre Oliva <aoliva@redhat.com>
2490
2491 Introduce TLS descriptors for i386 and x86_64.
2492 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2493 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2494 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2495 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2496 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2497 displacement bits.
2498 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2499 (lex_got): Handle @tlsdesc and @tlscall.
2500 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2501
8ad7c533
NC
25022006-01-11 Nick Clifton <nickc@redhat.com>
2503
2504 Fixes for building on 64-bit hosts:
2505 * config/tc-avr.c (mod_index): New union to allow conversion
2506 between pointers and integers.
2507 (md_begin, avr_ldi_expression): Use it.
2508 * config/tc-i370.c (md_assemble): Add cast for argument to print
2509 statement.
2510 * config/tc-tic54x.c (subsym_substitute): Likewise.
2511 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2512 opindex field of fr_cgen structure into a pointer so that it can
2513 be stored in a frag.
2514 * config/tc-mn10300.c (md_assemble): Likewise.
2515 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2516 types.
2517 * config/tc-v850.c: Replace uses of (int) casts with correct
2518 types.
2519
4dcb3903
L
25202006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2521
2522 PR gas/2117
2523 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2524
e0f6ea40
HPN
25252006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2526
2527 PR gas/2101
2528 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2529 a local-label reference.
2530
e88d958a 2531For older changes see ChangeLog-2005
08d56133
NC
2532\f
2533Local Variables:
2534mode: change-log
2535left-margin: 8
2536fill-column: 74
2537version-control: never
2538End:
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