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* peXXigen.c (rsrc_print_section): Use ptrdiff_t as the type for
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
a75555d1
NC		 12013-12-13 Nick Clifton <nickc@redhat.com>
2
3 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
4 (OPTION_INTR_NOPS): Define.
5 (gen_interrupt_nops): Default to FALSE.
6 (md_parse_opton): Add support for OPTION_INTR_NOPS.
7 (md_longopts): Add -mn.
8 (md_show_usage): Add -mn.
9 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
10 * doc/c-msp430.c: Document -mn.
11
35c08157
KLC		 122013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
13 Wei-Cheng Wang <cole945@gmail.com>
14 Hsiang-Kai Wang <hsiangkai@gmail.com>
15 Hui-Wen Ni <sabrinanitw@gmail.com>
16
17 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
18 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
19 * Makefile.in: Regenerate.
20 * configure.in (nds32): Add nds32 target extension config support.
21 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
22 * configure: Regenerate.
23 * config/tc-nds32.c: New file for nds32.
24 * config/tc-nds32.h: New file for nds32.
25 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
26 * doc/Makefile.in: Regenerate.
27 * doc/as.texinfo: Add nds32 options.
28 * doc/all.texi: Set NDS32.
29 * doc/c-nds32.texi: New file dor nds32 document.
30 * NEWS: Announce Andes nds32 support.
31
f2c7d7ee
RM		 322013-12-10 Roland McGrath <mcgrathr@google.com>
33
34 * Makefile.am (install-exec-bindir): Prefix libtool invocation
35 with $(INSTALL_PROGRAM_ENV).
36 (install-exec-tooldir): Likewise.
37 * Makefile.in: Regenerate.
38
594d8fa8
MF		 392013-12-07 Mike Frysinger <vapier@gentoo.org>
40
41 * config/bfin-aux.h: Remove +x file mode.
42 * config/tc-epiphany.c: Likewise.
43 * config/tc-epiphany.h: Likewise.
44
c2a5914e
TG		 452013-12-03 Tristan Gingold <gingold@adacore.com>
46
47 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
48 overflow on pointers.
49
9a73e520
YZ		 502013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
51
52 Revert
53
54 2013-11-19 Nick Clifton <nickc@redhat.com>
55
56 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
57 for deprecated system registers when parsing pstate fields.
58
03e621be
NC		 592013-11-19 Nick Clifton <nickc@redhat.com>
60
61 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
62 for deprecated system registers when parsing pstate fields.
63
a8d14a88
CM		 642013-11-19 Catherine Moore <clm@codesourcery.com>
65
66 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
67 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
68 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
69 (INSN_DMULT): Define.
70 (INSN_DMULTU): Define.
71 (insns_between): Detect PMC RM7000 errata.
72 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
73 OPTION_NO_FIX_PMC_RM7000.
74 * doc/as.texinfo: Document new options.
75 * doc/c-mips.texi: Likewise.
03e621be 76
cf3f45fa
AM		 772013-11-19 Alexey Makhalov <makhaloff@gmail.com>
78
79 PR gas/16109
80 * app.c (do_scrub_chars): Only insert a newline character if
81 end-of-file has been reached.
82
c06ec724
L		 832013-11-18 H.J. Lu <hongjiu.lu@intel.com>
84
85 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
86 argument.
87
c9fb6e58
YZ		 882013-11-18 Renlin Li <Renlin.Li@arm.com>
89
90 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
91 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
92 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
93 (cpu_arch_ver): Likewise.
94 * doc/c-arm.texi: Document armv7ve.
95
18cf6de4
YZ		 962013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
97
98 * config/tc-aarch64.c (parse_sys_reg): Support
99 S2_<op1>_<Cn>_<Cm>_<op2>.
100
a203d9b7
YZ		 1012013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
102
103 Revert
104
105 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
106
107 * config/tc-aarch64.c (set_other_error): New function.
108 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
109 the variable to which it points with 'o'.
110 (parse_operands): Update; check for write to read-only system
111 registers or read from write-only ones.
112
c3320543
L		 1132013-11-17 H.J. Lu <hongjiu.lu@intel.com>
114
115 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
116 indicate if instruction has the BND prefix. Return
117 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
118 bnd_prefix isn't zero.
119 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
120 if needed.
121 (output_jump): Update reloc call.
122 (output_interseg_jump): Likewise.
123 (output_disp): Likewise.
124 (output_imm): Likewise.
125 (x86_cons_fix_new): Likewise.
126 (lex_got): Add an argument, bnd_prefix, to indicate if
127 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
128 if needed.
129 (x86_cons): Update lex_got call.
130 (i386_immediate): Likewise.
131 (i386_displacement): Likewise.
132 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
133 BFD_RELOC_X86_64_PLT32_BND.
134 (tc_gen_reloc): Likewise.
135 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
136
75468c93
YZ		 1372013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
138
139 * config/tc-aarch64.c (set_other_error): New function.
140 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
141 the variable to which it points with 'o'.
142 (parse_operands): Update; check for write to read-only system
143 registers or read from write-only ones.
144
ad8ecc81
MZ		 1452013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
146
147 * config/tc-i386.c (check_VecOperands): Reorder checks.
148
b83a9376
CM		 1492013-11-11 Catherine Moore <clm@codesourcery.com>
150
151 * config/mips/tc-mips.c (convert_reg_type): Use
152 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
153 (reg_needs_delay): Likewise.
154 (insns_between): Likewise.
155
e2b5892e
JBG		 1562013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
157
158 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
159
49eec193
YZ		 1602013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
161
162 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
163 call aarch64_sys_reg_deprecated_p and warn about the deprecated
164 system registers.
165
68a64283
YZ		 1662013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
167
168 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
169
8db49cc2
WN		 1702013-11-05 Will Newton <will.newton@linaro.org>
171
172 PR gas/16103
173 * config/tc-aarch64.c (parse_operands): Avoid trying to
174 parse a vector register as an immediate.
175
e4630f71
JB		 1762013-11-04 Jan Beulich <jbeulich@suse.com>
177
178 * config/tc-i386.c (check_long_reg): Correct comment indentation.
179 (check_qword_reg): Correct comment and its indentation.
180 (check_word_reg): Extend comment and correct its indentation. Also
181 check for 64-bit register.
182
6911b7dc
AM		 1832013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
184
185 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
186 (ppc_elf_localentry): New function.
187 (ppc_force_relocation): Force relocs on all branches to localenty
188 symbols.
189 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
190
ee67d69a
AM		 1912013-10-30 Alan Modra <amodra@gmail.com>
192
193 * config/tc-ppc.c: Include elf/ppc64.h.
194 (ppc_abiversion): New variable.
195 (md_pseudo_table): Add .abiversion.
196 (ppc_elf_abiversion, ppc_elf_end): New functions.
197 * config/tc-ppc.h (md_end): Define.
198
f9c6b907
AM		 1992013-10-30 Alan Modra <amodra@gmail.com>
200
201 * config/tc-ppc.c (SEX16): Don't mask.
202 (REPORT_OVERFLOW_HI): Define as zero.
203 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
204 @tprel@high, and @tprel@higha modifiers.
205 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
206 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
207 Handle new relocs.
208 (md_apply_fix): Similarly.
209
9d5de888
CF		 2102013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
211
212 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
213 (fpr_write_mask): Test MSA registers.
214 (can_swap_branch_p): Check fpr write followed by fpr read.
215
3fc1d038
NC		 2162013-10-18 Nick Clifton <nickc@redhat.com>
217
218 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
219
56d438b1
CF		 2202013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
221 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
222
223 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
224 (md_longopts): Add mmsa and mno-msa.
225 (mips_ases): Add msa.
226 (RTYPE_MASK): Update.
227 (RTYPE_MSA): New define.
228 (OT_REG_ELEMENT): Replace with...
229 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
230 (mips_operand_token): Replace reg_element with index.
231 (mips_parse_argument_token): Treat vector indices as separate tokens.
232 Handle register indices.
233 (md_begin): Add MSA register names.
234 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
235 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
236 (match_mdmx_imm_reg_operand): Update accordingly.
237 (match_imm_index_operand): New function.
238 (match_reg_index_operand): New function.
239 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
240 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
241 (md_show_usage): Print -mmsa and -mno-msa.
242 * doc/as.texinfo: Document -mmsa and -mno-msa.
243 * doc/c-mips.texi: Document -mmsa and -mno-msa.
244 Document .set msa and .set nomsa.
245
b2e951ec
NC		 2462013-10-14 Nick Clifton <nickc@redhat.com>
247
248 * read.c (add_include_dir): Use xrealloc.
249 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
250 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
251
ae335a4e
SL		 2522013-10-13 Sandra Loosemore <sandra@codesourcery.com>
253
254 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
255 also test/refer to "sstatus". Reformat the warning message.
256
0e1c2434
SK		 2572013-10-10 Sean Keys <skeys@ipdatasys.com>
258
259 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
260
47cd3fa7
JB		 2612013-10-10 Jan Beulich <jbeulich@suse.com>
262
263 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
264 swapping for bndmk, bndldx, and bndstx.
265
6085f853
NC		 2662013-10-09 Nick Clifton <nickc@redhat.com>
267
b7b2bb1d
NC		 268 PR gas/16025
269 * config/tc-epiphany.c (md_convert_frag): Add missing break
270 statement.
271
6085f853
NC		 272 PR gas/16026
273 * config/tc-mn10200.c (md_convert_frag): Add missing break
274 statement.
275
cecf1424
JB		 2762013-10-08 Jan Beulich <jbeulich@suse.com>
277
278 * tc-i386.c (check_word_reg): Remove misplaced "else".
279 (check_long_reg): Restore symmetry with check_word_reg.
280
d3bfe16e
JB		 2812013-10-08 Jan Beulich <jbeulich@suse.com>
282
283 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
284 LR/PC check.
285
38d77545
NC		 2862013-10-08 Nick Clifton <nickc@redhat.com>
287
288 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
289 for "<foo>a". Issue error messages for unrecognised or corrrupt
290 size extensions.
291
fe8b4cc3
KT		 2922013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
293
294 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
295 possible.
296
c7b0bd56
SE		 2972013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
298
299 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
300 * doc/c-i386.texi: Add -march=bdver4 option.
301
cc9afea3
AM		 3022013-09-20 Alan Modra <amodra@gmail.com>
303
304 * configure: Regenerate.
305
58ca03a2
TG		 3062013-09-18 Tristan Gingold <gingold@adacore.com>
307
308 * NEWS: Add marker for 2.24.
309
ab905915
NC		 3102013-09-18 Nick Clifton <nickc@redhat.com>
311
312 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
313 (move_data): New variable.
314 (md_parse_option): Parse -md.
315 (msp430_section): New function. Catch references to the .bss or
316 .data sections and generate a special symbol for use by the libcrt
317 library.
318 (md_pseudo_table): Intercept .section directives.
319 (md_longopt): Add -md
320 (md_show_usage): Likewise.
321 (msp430_operands): Generate a warning message if a NOP is inserted
322 into the instruction stream.
323 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
324
f1c38003
SE		 3252013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
326
327 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 328 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 329
1d50d57c
WN		 3302013-09-16 Will Newton <will.newton@linaro.org>
331
332 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
333 disallowing element size 64 with interleave other than 1.
334
173d3447
CF		 3352013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
336
337 * config/tc-mips.c (match_insn): Set error when $31 is used for
338 bltzal* and bgezal*.
339
ac21e7da
TG		 3402013-09-04 Tristan Gingold <gingold@adacore.com>
341
342 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
343 symbols.
344
74db7efb
NC		 3452013-09-04 Roland McGrath <mcgrathr@google.com>
346
347 PR gas/15914
348 * config/tc-arm.c (T16_32_TAB): Add _udf.
349 (do_t_udf): New function.
350 (insns): Add "udf".
351
664a88c6
DD		 3522013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
353
354 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
355 assembler errors at correct position.
356
9aff4b7a
NC		 3572013-08-23 Yuri Chornoivan <yurchor@ukr.net>
358
359 PR binutils/15834
360 * config/tc-ia64.c: Fix typos.
361 * config/tc-sparc.c: Likewise.
362 * config/tc-z80.c: Likewise.
363 * doc/c-i386.texi: Likewise.
364 * doc/c-m32r.texi: Likewise.
365
4f2374c7
WN		 3662013-08-23 Will Newton <will.newton@linaro.org>
367
9aff4b7a 368 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 369 for pre-indexed addressing modes.
370
b4e6cb80
AM		 3712013-08-21 Alan Modra <amodra@gmail.com>
372
373 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
374 range check label number for use with fb_low_counter array.
375
1661c76c
RS		 3762013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
377
378 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
379 (mips_parse_argument_token, validate_micromips_insn, md_begin)
380 (check_regno, match_float_constant, check_completed_insn, append_insn)
381 (match_insn, match_mips16_insn, match_insns, macro_start)
382 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
383 (mips16_ip, mips_set_option_string, md_parse_option)
384 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
385 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
386 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
387 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
388 Start error messages with a lower-case letter. Do not end error
389 messages with a period. Wrap long messages to 80 character-lines.
390 Use "cannot" instead of "can't" and "can not".
391
b0e6f033
RS		 3922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
393
394 * config/tc-mips.c (imm_expr): Expand comment.
395 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
396 when populated.
397
e423441d
RS		 3982013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
399
400 * config/tc-mips.c (imm2_expr): Delete.
401 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
402
5e0dc5ba
RS		 4032013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
404
405 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
406 (macro): Remove M_DEXT and M_DINS handling.
407
60f20e8b
RS		 4082013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
409
410 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
411 lax_max with lax_match.
412 (match_int_operand): Update accordingly. Don't report an error
413 for !lax_match-only cases.
414 (match_insn): Replace more_alts with lax_match and use it to
415 initialize the mips_arg_info field. Add a complete_p parameter.
416 Handle implicit VU0 suffixes here.
417 (match_invalid_for_isa, match_insns, match_mips16_insns): New
418 functions.
419 (mips_ip, mips16_ip): Use them.
420
d436c1c2
RS		 4212013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
422
423 * config/tc-mips.c (match_expression): Report uses of registers here.
424 Add a "must be an immediate expression" error. Handle elided offsets
425 here rather than...
426 (match_int_operand): ...here.
427
1a00e612
RS		 4282013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
429
430 * config/tc-mips.c (mips_arg_info): Remove soft_match.
431 (match_out_of_range, match_not_constant): New functions.
432 (match_const_int): Remove fallback parameter and check for soft_match.
433 Use match_not_constant.
434 (match_mapped_int_operand, match_addiusp_operand)
435 (match_perf_reg_operand, match_save_restore_list_operand)
436 (match_mdmx_imm_reg_operand): Update accordingly. Use
437 match_out_of_range and set_insn_error* instead of as_bad.
438 (match_int_operand): Likewise. Use match_not_constant in the
439 !allows_nonconst case.
440 (match_float_constant): Report invalid float constants.
441 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
442 match_float_constant to check for invalid constants. Fail the
443 match if match_const_int or match_float_constant return false.
444 (mips_ip): Update accordingly.
445 (mips16_ip): Likewise. Undo null termination of instruction name
446 once lookup is complete.
447
e3de51ce
RS		 4482013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
449
450 * config/tc-mips.c (mips_insn_error_format): New enum.
451 (mips_insn_error): New struct.
452 (insn_error): Change to a mips_insn_error.
453 (clear_insn_error, set_insn_error_format, set_insn_error)
454 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
455 functions.
456 (mips_parse_argument_token, md_assemble, match_insn)
457 (match_mips16_insn): Use them instead of manipulating insn_error
458 directly.
459 (mips_ip, mips16_ip): Likewise. Simplify control flow.
460
97d87491
RS		 4612013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
462
463 * config/tc-mips.c (normalize_constant_expr): Move further up file.
464 (normalize_address_expr): Likewise.
465 (match_insn, match_mips16_insn): New functions, split out from...
466 (mips_ip, mips16_ip): ...here.
467
0f35dbc4
RS		 4682013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
469
470 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
471 OP_OPTIONAL_REG.
472 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
473 for optional operands.
474
27285eed
AM		 4752013-08-16 Alan Modra <amodra@gmail.com>
476
477 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
478 modifiers generally.
479
cbe02d4f
AM		 4802013-08-16 Alan Modra <amodra@gmail.com>
481
482 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
483
3c02c47f
DE		 4842013-08-14 David Edelsohn <dje.gcc@gmail.com>
485
486 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
487 argument as alignment.
488
4046d87a
NC		 4892013-08-09 Nick Clifton <nickc@redhat.com>
490
491 * config/tc-rl78.c (elf_flags): New variable.
492 (enum options): Add OPTION_G10.
493 (md_longopts): Add mg10.
494 (md_parse_option): Parse -mg10.
495 (rl78_elf_final_processing): New function.
496 * config/tc-rl78.c (tc_final_processing): Define.
497 * doc/c-rl78.texi: Document -mg10 option.
498
ee5734f0
RS		 4992013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
500
501 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
502 suffixes to be elided too.
503 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
504 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
505 to be omitted too.
506
13896403
RS		 5072013-08-05 John Tytgat <john@bass-software.com>
508
509 * po/POTFILES.in: Regenerate.
510
d6787ef9
EB		 5112013-08-05 Eric Botcazou <ebotcazou@adacore.com>
512 Konrad Eisele <konrad@gaisler.com>
513
514 * config/tc-sparc.c (sparc_arch_types): Add leon.
515 (sparc_arch): Move sparc4 around and add leon.
516 (sparc_target_format): Document -Aleon.
517 * doc/c-sparc.texi: Likewise.
518
da8bca91
RS		 5192013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
520
521 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
522
14daeee3
RS		 5232013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
524 Richard Sandiford <rdsandiford@googlemail.com>
525
526 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
527 (RWARN): Bump to 0x8000000.
528 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
529 (RTYPE_R5900_ACC): New register types.
530 (RTYPE_MASK): Include them.
531 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
532 macros.
533 (reg_names): Include them.
534 (mips_parse_register_1): New function, split out from...
535 (mips_parse_register): ...here. Add a channels_ptr parameter.
536 Look for VU0 channel suffixes when nonnull.
537 (reg_lookup): Update the call to mips_parse_register.
538 (mips_parse_vu0_channels): New function.
539 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
540 (mips_operand_token): Add a "channels" field to the union.
541 Extend the comment above "ch" to OT_DOUBLE_CHAR.
542 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
543 (mips_parse_argument_token): Handle channel suffixes here too.
544 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
545 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
546 Handle '#' formats.
547 (md_begin): Register $vfN and $vfI registers.
548 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
549 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
550 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
551 (match_vu0_suffix_operand): New function.
552 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
553 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
554 (mips_lookup_insn): New function.
555 (mips_ip): Use it. Allow "+K" operands to be elided at the end
556 of an instruction. Handle '#' sequences.
557
c0ebe874
RS		 5582013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
559
560 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
561 values and use it instead of sreg, treg, xreg, etc.
562
3ccad066
RS		 5632013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
564
565 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
566 and mips_int_operand_max.
567 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
568 Delete.
569 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
570 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
571 instead of mips16_immed_operand.
572
0acfaea6
RS		 5732013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
574
575 * config/tc-mips.c (mips16_macro): Don't use move_register.
576 (mips16_ip): Allow macros to use 'p'.
577
fc76e730
RS		 5782013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c (MAX_OPERANDS): New macro.
581 (mips_operand_array): New structure.
582 (mips_operands, mips16_operands, micromips_operands): New arrays.
583 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
584 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
585 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
586 (micromips_to_32_reg_q_map): Delete.
587 (insn_operands, insn_opno, insn_extract_operand): New functions.
588 (validate_mips_insn): Take a mips_operand_array as argument and
589 use it to build up a list of operands. Extend to handle INSN_MACRO
590 and MIPS16.
591 (validate_mips16_insn): New function.
592 (validate_micromips_insn): Take a mips_operand_array as argument.
593 Handle INSN_MACRO.
594 (md_begin): Initialize mips_operands, mips16_operands and
595 micromips_operands. Call validate_mips_insn and
596 validate_micromips_insn for macro instructions too.
597 Call validate_mips16_insn for MIPS16 instructions.
598 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
599 New functions.
600 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
601 them. Handle INSN_UDI.
602 (get_append_method): Use gpr_read_mask.
603
26545944
RS		 6042013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
605
606 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
607 flags for MIPS16 and non-MIPS16 instructions.
608 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
609 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
610 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
611 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
612 and non-MIPS16 instructions. Fix formatting.
613
85fcb30f
RS		 6142013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
615
616 * config/tc-mips.c (reg_needs_delay): Move later in file.
617 Use gpr_write_mask.
618 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
619
43234a1e
L		 6202013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
621 Alexander Ivchenko <alexander.ivchenko@intel.com>
622 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
623 Sergey Lega <sergey.s.lega@intel.com>
624 Anna Tikhonova <anna.tikhonova@intel.com>
625 Ilya Tocar <ilya.tocar@intel.com>
626 Andrey Turetskiy <andrey.turetskiy@intel.com>
627 Ilya Verbin <ilya.verbin@intel.com>
628 Kirill Yukhin <kirill.yukhin@intel.com>
629 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
630
631 * config/tc-i386-intel.c (O_zmmword_ptr): New.
632 (i386_types): Add zmmword.
633 (i386_intel_simplify_register): Allow regzmm.
634 (i386_intel_simplify): Handle zmmwords.
635 (i386_intel_operand): Handle RC/SAE, vector operations and
636 zmmwords.
637 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
638 (struct RC_Operation): New.
639 (struct Mask_Operation): New.
640 (struct Broadcast_Operation): New.
641 (vex_prefix): Size of bytes increased to 4 to support EVEX
642 encoding.
643 (enum i386_error): Add new error codes: unsupported_broadcast,
644 broadcast_not_on_src_operand, broadcast_needed,
645 unsupported_masking, mask_not_on_destination, no_default_mask,
646 unsupported_rc_sae, rc_sae_operand_not_last_imm,
647 invalid_register_operand, try_vector_disp8.
648 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
649 rounding, broadcast, memshift.
650 (struct RC_name): New.
651 (RC_NamesTable): New.
652 (evexlig): New.
653 (evexwig): New.
654 (extra_symbol_chars): Add '{'.
655 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
656 (i386_operand_type): Add regzmm, regmask and vec_disp8.
657 (match_mem_size): Handle zmmwords.
658 (operand_type_match): Handle zmm-registers.
659 (mode_from_disp_size): Handle vec_disp8.
660 (fits_in_vec_disp8): New.
661 (md_begin): Handle {} properly.
662 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
663 (build_vex_prefix): Handle vrex.
664 (build_evex_prefix): New.
665 (process_immext): Adjust to properly handle EVEX.
666 (md_assemble): Add EVEX encoding support.
667 (swap_2_operands): Correctly handle operands with masking,
668 broadcasting or RC/SAE.
669 (check_VecOperands): Support EVEX features.
670 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
671 (match_template): Support regzmm and handle new error codes.
672 (process_suffix): Handle zmmwords and zmm-registers.
673 (check_byte_reg): Extend to zmm-registers.
674 (process_operands): Extend to zmm-registers.
675 (build_modrm_byte): Handle EVEX.
676 (output_insn): Adjust to properly handle EVEX case.
677 (disp_size): Handle vec_disp8.
678 (output_disp): Support compressed disp8*N evex feature.
679 (output_imm): Handle RC/SAE immediates properly.
680 (check_VecOperations): New.
681 (i386_immediate): Handle EVEX features.
682 (i386_index_check): Handle zmmwords and zmm-registers.
683 (RC_SAE_immediate): New.
684 (i386_att_operand): Handle EVEX features.
685 (parse_real_register): Add a check for ZMM/Mask registers.
686 (OPTION_MEVEXLIG): New.
687 (OPTION_MEVEXWIG): New.
688 (md_longopts): Add mevexlig and mevexwig.
689 (md_parse_option): Handle mevexlig and mevexwig options.
690 (md_show_usage): Add description for mevexlig and mevexwig.
691 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
692 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
693
a0046408
L		 6942013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
695
696 * config/tc-i386.c (cpu_arch): Add .sha.
697 * doc/c-i386.texi: Document sha/.sha.
698
7e8b059b
L		 6992013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
700 Kirill Yukhin <kirill.yukhin@intel.com>
701 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
702
703 * config/tc-i386.c (BND_PREFIX): New.
704 (struct _i386_insn): Add new field bnd_prefix.
705 (add_bnd_prefix): New.
706 (cpu_arch): Add MPX.
707 (i386_operand_type): Add regbnd.
708 (md_assemble): Handle BND prefixes.
709 (parse_insn): Likewise.
710 (output_branch): Likewise.
711 (output_jump): Likewise.
712 (build_modrm_byte): Handle regbnd.
713 (OPTION_MADD_BND_PREFIX): New.
714 (md_longopts): Add entry for 'madd-bnd-prefix'.
715 (md_parse_option): Handle madd-bnd-prefix option.
716 (md_show_usage): Add description for madd-bnd-prefix
717 option.
718 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
719
7fa9fcb6
TG		 7202013-07-24 Tristan Gingold <gingold@adacore.com>
721
722 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
723 xcoff targets.
724
614eb277
AK		 7252013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
726
727 * config/tc-s390.c (s390_machine): Don't force the .machine
728 argument to lower case.
729
e673710a
KT		 7302013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
731
732 * config/tc-arm.c (s_arm_arch_extension): Improve error message
733 for invalid extension.
734
69091a2c
YZ		 7352013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
736
737 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
738 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
739 (aarch64_abi): New variable.
740 (ilp32_p): Change to be a macro.
741 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
742 (struct aarch64_option_abi_value_table): New struct.
743 (aarch64_abis): New table.
744 (aarch64_parse_abi): New function.
745 (aarch64_long_opts): Add entry for -mabi=.
746 * doc/as.texinfo (Target AArch64 options): Document -mabi.
747 * doc/c-aarch64.texi: Likewise.
748
faf786e6
NC		 7492013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
750
751 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
752 unsigned comparison.
753
f0c00282
NC		 7542013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
755
cbe02d4f 756 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 757 RX610.
cbe02d4f 758 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 759 check floating point operation support for target RX100 and
760 RX200.
cbe02d4f
AM		 761 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
762 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
763 RX200, RX600, and RX610
f0c00282 764
8c997c27
NC		 7652013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
766
767 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
768
8be59acb
NC		 7692013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
770
771 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
772 * doc/c-avr.texi: Likewise.
773
4a06e5a2
RS		 7742013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
775
776 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
777 error with older GCCs.
778 (mips16_macro_build): Dereference args.
779
a92713e6
RS		 7802013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
781
782 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
783 New functions, split out from...
784 (reg_lookup): ...here. Remove itbl support.
785 (reglist_lookup): Delete.
786 (mips_operand_token_type): New enum.
787 (mips_operand_token): New structure.
788 (mips_operand_tokens): New variable.
789 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
790 (mips_parse_arguments): New functions.
791 (md_begin): Initialize mips_operand_tokens.
792 (mips_arg_info): Add a token field. Remove optional_reg field.
793 (match_char, match_expression): New functions.
794 (match_const_int): Use match_expression. Remove "s" argument
795 and return a boolean result. Remove O_register handling.
796 (match_regno, match_reg, match_reg_range): New functions.
797 (match_int_operand, match_mapped_int_operand, match_msb_operand)
798 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
799 (match_addiusp_operand, match_clo_clz_dest_operand)
800 (match_lwm_swm_list_operand, match_entry_exit_operand)
801 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
802 (match_tied_reg_operand): Remove "s" argument and return a boolean
803 result. Match tokens rather than text. Update calls to
804 match_const_int. Rely on match_regno to call check_regno.
805 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
806 "arg" argument. Return a boolean result.
807 (parse_float_constant): Replace with...
808 (match_float_constant): ...this new function.
809 (match_operand): Remove "s" argument and return a boolean result.
810 Update calls to subfunctions.
811 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
812 rather than string-parsing routines. Update handling of optional
813 registers for token scheme.
814
89565f1b
RS		 8152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
816
817 * config/tc-mips.c (parse_float_constant): Split out from...
818 (mips_ip): ...here.
819
3c14a432
RS		 8202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
821
822 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
823 Delete.
824
364215c8
RS		 8252013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
826
827 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
828 (match_entry_exit_operand): New function.
829 (match_save_restore_list_operand): Likewise.
830 (match_operand): Use them.
831 (check_absolute_expr): Delete.
832 (mips16_ip): Rewrite main parsing loop to use mips_operands.
833
9e12b7a2
RS		 8342013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
835
836 * config/tc-mips.c: Enable functions commented out in previous patch.
837 (SKIP_SPACE_TABS): Move further up file.
838 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
839 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
840 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
841 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
842 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
843 (micromips_imm_b_map, micromips_imm_c_map): Delete.
844 (mips_lookup_reg_pair): Delete.
845 (macro): Use report_bad_range and report_bad_field.
846 (mips_immed, expr_const_in_range): Delete.
847 (mips_ip): Rewrite main parsing loop to use new functions.
848
a1d78564
RS		 8492013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
850
851 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
852 Change return type to bfd_boolean.
853 (report_bad_range, report_bad_field): New functions.
854 (mips_arg_info): New structure.
855 (match_const_int, convert_reg_type, check_regno, match_int_operand)
856 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
857 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
858 (match_addiusp_operand, match_clo_clz_dest_operand)
859 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
860 (match_pc_operand, match_tied_reg_operand, match_operand)
861 (check_completed_insn): New functions, commented out for now.
862
e077a1c8
RS		 8632013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
864
865 * config/tc-mips.c (insn_insert_operand): New function.
866 (macro_build, mips16_macro_build): Put null character check
867 in the for loop and convert continues to breaks. Use operand
868 structures to handle constant operands.
869
ab902481
RS		 8702013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
871
872 * config/tc-mips.c (validate_mips_insn): Move further up file.
873 Add insn_bits and decode_operand arguments. Use the mips_operand
874 fields to work out which bits an operand occupies. Detect double
875 definitions.
876 (validate_micromips_insn): Move further up file. Call into
877 validate_mips_insn.
878
2f8b73cc
RS		 8792013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
880
881 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
882
c8276761
RS		 8832013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
884
885 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
886 and "~".
887 (macro): Update accordingly.
888
77bd4346
RS		 8892013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
890
891 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
892 (imm_reloc): Delete.
893 (md_assemble): Remove imm_reloc handling.
894 (mips_ip): Update commentary. Use offset_expr and offset_reloc
895 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
896 Use a temporary array rather than imm_reloc when parsing
897 constant expressions. Remove imm_reloc initialization.
898 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
899 for the relaxable field. Use a relax_char variable to track the
900 type of this field. Remove imm_reloc initialization.
901
cc537e56
RS		 9022013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
903
904 * config/tc-mips.c (mips16_ip): Handle "I".
905
ba92f887
MR		 9062013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
907
908 * config/tc-mips.c (mips_flag_nan2008): New variable.
909 (options): Add OPTION_NAN enum value.
910 (md_longopts): Handle it.
911 (md_parse_option): Likewise.
912 (s_nan): New function.
913 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
914 (md_show_usage): Add -mnan.
915
916 * doc/as.texinfo (Overview): Add -mnan.
917 * doc/c-mips.texi (MIPS Opts): Document -mnan.
918 (MIPS NaN Encodings): New node. Document .nan directive.
919 (MIPS-Dependent): List the new node.
920
c1094734
TG		 9212013-07-09 Tristan Gingold <gingold@adacore.com>
922
923 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
924
0cbbe1b8
RS		 9252013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
926
927 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
928 for 'A' and assume that the constant has been elided if the result
929 is an O_register.
930
f2ae14a1
RS		 9312013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
932
933 * config/tc-mips.c (gprel16_reloc_p): New function.
934 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
935 BFD_RELOC_UNUSED.
936 (offset_high_part, small_offset_p): New functions.
937 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
938 register load and store macros, handle the 16-bit offset case first.
939 If a 16-bit offset is not suitable for the instruction we're
940 generating, load it into the temporary register using
941 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
942 M_L_DAB code once the address has been constructed. For double load
943 and store macros, again handle the 16-bit offset case first.
944 If the second register cannot be accessed from the same high
945 part as the first, load it into AT using ADDRESS_ADDI_INSN.
946 Fix the handling of LD in cases where the first register is the
947 same as the base. Also handle the case where the offset is
948 not 16 bits and the second register cannot be accessed from the
949 same high part as the first. For unaligned loads and stores,
950 fuse the offbits == 12 and old "ab" handling. Apply this handling
951 whenever the second offset needs a different high part from the first.
952 Construct the offset using ADDRESS_ADDI_INSN where possible,
953 for offbits == 16 as well as offbits == 12. Use offset_reloc
954 when constructing the individual loads and stores.
955 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
956 and offset_reloc before matching against a particular opcode.
957 Handle elided 'A' constants. Allow 'A' constants to use
958 relocation operators.
959
5c324c16
RS		 9602013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
961
962 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
963 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
964 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
965
23e69e47
RS		 9662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
967
968 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
969 Require the msb to be <= 31 for "+s". Check that the size is <= 31
970 for both "+s" and "+S".
971
27c5c572
RS		 9722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
973
974 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
975 (mips_ip, mips16_ip): Handle "+i".
976
e76ff5ab
RS		 9772013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
978
979 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
980 (micromips_to_32_reg_h_map): Rename to...
981 (micromips_to_32_reg_h_map1): ...this.
982 (micromips_to_32_reg_i_map): Rename to...
983 (micromips_to_32_reg_h_map2): ...this.
984 (mips_lookup_reg_pair): New function.
985 (gpr_write_mask, macro): Adjust after above renaming.
986 (validate_micromips_insn): Remove "mi" handling.
987 (mips_ip): Likewise. Parse both registers in a pair for "mh".
988
fa7616a4
RS		 9892013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
990
991 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
992 (mips_ip): Remove "+D" and "+T" handling.
993
fb798c50
AK		 9942013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
995
996 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
997 relocs.
998
2c0a3565
MS		 9992013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1000
4aa2c5e2
MS		 1001 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1002
10032013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1004
2c0a3565
MS		 1005 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1006 (aarch64_force_relocation): Likewise.
1007
f40da81b
AM		 10082013-07-02 Alan Modra <amodra@gmail.com>
1009
1010 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1011
81566a9b
MR		 10122013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1013
1014 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1015 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1016 Replace @sc{mips16} with literal `MIPS16'.
1017 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1018
a6bb11b2
YZ		 10192013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1020
1021 * config/tc-aarch64.c (reloc_table): Replace
1022 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1023 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1024 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1025 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1026 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1027 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1028 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1029 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1030 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1031 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1032 (aarch64_force_relocation): Likewise.
1033
cec5225b
YZ		 10342013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1035
1036 * config/tc-aarch64.c (ilp32_p): New static variable.
1037 (elf64_aarch64_target_format): Return the target according to the
1038 value of 'ilp32_p'.
1039 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1040 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1041 (aarch64_dwarf2_addr_size): New function.
1042 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1043 (DWARF2_ADDR_SIZE): New define.
1044
e335d9cb
RS		 10452013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1046
1047 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1048
18870af7
RS		 10492013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1050
1051 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1052
833794fc
MR		 10532013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1054
1055 * config/tc-mips.c (mips_set_options): Add insn32 member.
1056 (mips_opts): Initialize it.
1057 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1058 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1059 (md_longopts): Add "minsn32" and "mno-insn32" options.
1060 (is_size_valid): Handle insn32 mode.
1061 (md_assemble): Pass instruction string down to macro.
1062 (brk_fmt): Add second dimension and insn32 mode initializers.
1063 (mfhl_fmt): Likewise.
1064 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1065 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1066 (macro_build_jalr, move_register): Handle insn32 mode.
1067 (macro_build_branch_rs): Likewise.
1068 (macro): Handle insn32 mode.
1069 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1070 (mips_ip): Handle insn32 mode.
1071 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1072 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1073 (mips_handle_align): Handle insn32 mode.
1074 (md_show_usage): Add -minsn32 and -mno-insn32.
1075
1076 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1077 -mno-insn32 options.
1078 (-minsn32, -mno-insn32): New options.
1079 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1080 options.
1081 (MIPS assembly options): New node. Document .set insn32 and
1082 .set noinsn32.
1083 (MIPS-Dependent): List the new node.
1084
d1706f38
NC		 10852013-06-25 Nick Clifton <nickc@redhat.com>
1086
1087 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1088 the PC in indirect addressing on 430xv2 parts.
1089 (msp430_operands): Add version test to hardware bug encoding
1090 restrictions.
1091
477330fc
RM		 10922013-06-24 Roland McGrath <mcgrathr@google.com>
1093
d996d970
RM		 1094 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1095 so it skips whitespace before it.
1096 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1097
477330fc
RM		 1098 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1099 (arm_reg_parse_multi): Skip whitespace first.
1100 (parse_reg_list): Likewise.
1101 (parse_vfp_reg_list): Likewise.
1102 (s_arm_unwind_save_mmxwcg): Likewise.
1103
24382199
NC		 11042013-06-24 Nick Clifton <nickc@redhat.com>
1105
1106 PR gas/15623
1107 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1108
c3678916
RS		 11092013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1110
1111 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1112
42429eac
RS		 11132013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1114
1115 * config/tc-mips.c: Assert that offsetT and valueT are at least
1116 8 bytes in size.
1117 (GPR_SMIN, GPR_SMAX): New macros.
1118 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1119
f3ded42a
RS		 11202013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1121
1122 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1123 conditions. Remove any code deselected by them.
1124 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1125
e8044f35
RS		 11262013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1127
1128 * NEWS: Note removal of ECOFF support.
1129 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1130 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1131 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1132 * Makefile.in: Regenerate.
1133 * configure.in: Remove MIPS ECOFF references.
1134 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1135 Delete cases.
1136 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1137 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1138 (mips-*-*): ...this single case.
1139 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1140 MIPS emulations to be e-mipself*.
1141 * configure: Regenerate.
1142 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1143 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1144 (mips-*-sysv*): Remove coff and ecoff cases.
1145 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1146 * ecoff.c: Remove reference to MIPS ECOFF.
1147 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1148 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1149 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1150 (mips_hi_fixup): Tweak comment.
1151 (append_insn): Require a howto.
1152 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1153
98508b2a
RS		 11542013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1155
1156 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1157 Use "CPU" instead of "cpu".
1158 * doc/c-mips.texi: Likewise.
1159 (MIPS Opts): Rename to MIPS Options.
1160 (MIPS option stack): Rename to MIPS Option Stack.
1161 (MIPS ASE instruction generation overrides): Rename to
1162 MIPS ASE Instruction Generation Overrides (for now).
1163 (MIPS floating-point): Rename to MIPS Floating-Point.
1164
fc16f8cc
RS		 11652013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1166
1167 * doc/c-mips.texi (MIPS Macros): New section.
1168 (MIPS Object): Replace with...
1169 (MIPS Small Data): ...this new section.
1170
5a7560b5
RS		 11712013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1172
1173 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1174 Capitalize name. Use @kindex instead of @cindex for .set entries.
1175
a1b86ab7
RS		 11762013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1177
1178 * doc/c-mips.texi (MIPS Stabs): Remove section.
1179
c6278170
RS		 11802013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1181
1182 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1183 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1184 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1185 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1186 (mips_ase): New structure.
1187 (mips_ases): New table.
1188 (FP64_ASES): New macro.
1189 (mips_ase_groups): New array.
1190 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1191 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1192 functions.
1193 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1194 (md_parse_option): Use mips_ases and mips_set_ase instead of
1195 separate case statements for each ASE option.
1196 (mips_after_parse_args): Use FP64_ASES. Use
1197 mips_check_isa_supports_ases to check the ASEs against
1198 other options.
1199 (s_mipsset): Use mips_ases and mips_set_ase instead of
1200 separate if statements for each ASE option. Use
1201 mips_check_isa_supports_ases, even when a non-ASE option
1202 is specified.
1203
63a4bc21
KT		 12042013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1205
1206 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1207
c31f3936
RS		 12082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1209
1210 * config/tc-mips.c (md_shortopts, options, md_longopts)
1211 (md_longopts_size): Move earlier in file.
1212
846ef2d0
RS		 12132013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1214
1215 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1216 with a single "ase" bitmask.
1217 (mips_opts): Update accordingly.
1218 (file_ase, file_ase_explicit): New variables.
1219 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1220 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1221 (ISA_HAS_ROR): Adjust for mips_set_options change.
1222 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1223 (mips_ip): Adjust for mips_set_options change.
1224 (md_parse_option): Likewise. Update file_ase_explicit.
1225 (mips_after_parse_args): Adjust for mips_set_options change.
1226 Use bitmask operations to select the default ASEs. Set file_ase
1227 rather than individual per-ASE variables.
1228 (s_mipsset): Adjust for mips_set_options change.
1229 (mips_elf_final_processing): Test file_ase rather than
1230 file_ase_mdmx. Remove commented-out code.
1231
d16afab6
RS		 12322013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1233
1234 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1235 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1236 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1237 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1238 (mips_after_parse_args): Use the new "ase" field to choose
1239 the default ASEs.
1240 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1241 "ase" field.
1242
e83a675f
RE		 12432013-06-18 Richard Earnshaw <rearnsha@arm.com>
1244
1245 * config/tc-arm.c (symbol_preemptible): New function.
1246 (relax_branch): Use it.
1247
7f3c4072
CM		 12482013-06-17 Catherine Moore <clm@codesourcery.com>
1249 Maciej W. Rozycki <macro@codesourcery.com>
1250 Chao-Ying Fu <fu@mips.com>
1251
1252 * config/tc-mips.c (mips_set_options): Add ase_eva.
1253 (mips_set_options mips_opts): Add ase_eva.
1254 (file_ase_eva): Declare.
1255 (ISA_SUPPORTS_EVA_ASE): Define.
1256 (IS_SEXT_9BIT_NUM): Define.
1257 (MIPS_CPU_ASE_EVA): Define.
1258 (is_opcode_valid): Add support for ase_eva.
1259 (macro_build): Likewise.
1260 (macro): Likewise.
1261 (validate_mips_insn): Likewise.
1262 (validate_micromips_insn): Likewise.
1263 (mips_ip): Likewise.
1264 (options): Add OPTION_EVA and OPTION_NO_EVA.
1265 (md_longopts): Add -meva and -mno-eva.
1266 (md_parse_option): Process new options.
1267 (mips_after_parse_args): Check for valid EVA combinations.
1268 (s_mipsset): Likewise.
1269
e410add4
RS		 12702013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1271
1272 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1273 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1274 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1275 (dwarf2_gen_line_info_1): Update call accordingly.
1276 (dwarf2_move_insn): New function.
1277 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1278
6a50d470
RS		 12792013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1280
1281 Revert:
1282
1283 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1284
1285 PR gas/13024
1286 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1287 (dwarf2_gen_line_info_1): Delete.
1288 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1289 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1290 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1291 (dwarf2_directive_loc): Push previous .locs instead of generating
1292 them immediately.
1293
f122319e
CF		 12942013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1295
1296 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1297 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1298
909c7f9c
NC		 12992013-06-13 Nick Clifton <nickc@redhat.com>
1300
1301 PR gas/15602
1302 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1303 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1304 function. Generates an error if the adjusted offset is out of a
1305 16-bit range.
1306
5d5755a7
SL		 13072013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1308
1309 * config/tc-nios2.c (md_apply_fix): Mask constant
1310 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1311
3bf0dbfb
MR		 13122013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1313
1314 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1315 MIPS-3D instructions either.
1316 (md_convert_frag): Update the COPx branch mask accordingly.
1317
1318 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1319 option.
1320 * doc/as.texinfo (Overview): Add --relax-branch and
1321 --no-relax-branch.
1322 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1323 --no-relax-branch.
1324
9daf7bab
SL		 13252013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1326
1327 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1328 omitted.
1329
d301a56b
RS		 13302013-06-08 Catherine Moore <clm@codesourcery.com>
1331
1332 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1333 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1334 (append_insn): Change INSN_xxxx to ASE_xxxx.
1335
7bab7634
DC		 13362013-06-01 George Thomas <george.thomas@atmel.com>
1337
cbe02d4f 1338 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1339 AVR_ISA_XMEGAU
1340
f60cf82f
L		 13412013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1342
1343 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1344 for ELF.
1345
a3f278e2
CM		 13462013-05-31 Paul Brook <paul@codesourcery.com>
1347
a3f278e2
CM		 1348 * config/tc-mips.c (s_ehword): New.
1349
067ec077
CM		 13502013-05-30 Paul Brook <paul@codesourcery.com>
1351
1352 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1353
d6101ac2
MR		 13542013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1355
1356 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1357 convert relocs who have no relocatable field either. Rephrase
1358 the conditional so that the PC-relative check is only applied
1359 for REL targets.
1360
f19ccbda
MR		 13612013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1362
1363 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1364 calculation.
1365
418009c2
YZ		 13662013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1367
1368 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1369 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1370 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1371 (md_apply_fix): Likewise.
1372 (aarch64_force_relocation): Likewise.
1373
0a8897c7
KT		 13742013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1375
1376 * config/tc-arm.c (it_fsm_post_encode): Improve
1377 warning messages about deprecated IT block formats.
1378
89d2a2a3
MS		 13792013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1380
1381 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1382 inside fx_done condition.
1383
c77c0862
RS		 13842013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1385
1386 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1387
c0637f3a
PB		 13882013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1389
1390 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1391 and clean up warning when using PRINT_OPCODE_TABLE.
1392
5656a981
AM		 13932013-05-20 Alan Modra <amodra@gmail.com>
1394
1395 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1396 and data fixups performing shift/high adjust/sign extension on
1397 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1398 when writing data fixups rather than recalculating size.
1399
997b26e8
JBG		 14002013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1401
1402 * doc/c-msp430.texi: Fix typo.
1403
9f6e76f4
TG		 14042013-05-16 Tristan Gingold <gingold@adacore.com>
1405
1406 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1407 are also TOC symbols.
1408
638d3803
NC		 14092013-05-16 Nick Clifton <nickc@redhat.com>
1410
1411 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1412 Add -mcpu command to specify core type.
997b26e8 1413 * doc/c-msp430.texi: Update documentation.
638d3803 1414
b015e599
AP		 14152013-05-09 Andrew Pinski <apinski@cavium.com>
1416
1417 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1418 (mips_opts): Update for the new field.
1419 (file_ase_virt): New variable.
1420 (ISA_SUPPORTS_VIRT_ASE): New macro.
1421 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1422 (MIPS_CPU_ASE_VIRT): New define.
1423 (is_opcode_valid): Handle ase_virt.
1424 (macro_build): Handle "+J".
1425 (validate_mips_insn): Likewise.
1426 (mips_ip): Likewise.
1427 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1428 (md_longopts): Add mvirt and mnovirt
1429 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1430 (mips_after_parse_args): Handle ase_virt field.
1431 (s_mipsset): Handle "virt" and "novirt".
1432 (mips_elf_final_processing): Add a comment about virt ASE might need
1433 a new flag.
1434 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1435 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1436 Document ".set virt" and ".set novirt".
1437
da8094d7
AM		 14382013-05-09 Alan Modra <amodra@gmail.com>
1439
1440 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1441 control of operand flag bits.
1442
c5f8c205
AM		 14432013-05-07 Alan Modra <amodra@gmail.com>
1444
1445 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1446 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1447 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1448 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1449 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1450 Shift and sign-extend fieldval for use by some VLE reloc
1451 operand->insert functions.
1452
b47468a6
CM		 14532013-05-06 Paul Brook <paul@codesourcery.com>
1454 Catherine Moore <clm@codesourcery.com>
1455
c5f8c205
AM		 1456 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1457 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1458 (md_apply_fix): Likewise.
1459 (tc_gen_reloc): Likewise.
1460
2de39019
CM		 14612013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1462
1463 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1464 (mips_fix_adjustable): Adjust pc-relative check to use
1465 limited_pc_reloc_p.
1466
754e2bb9
RS		 14672013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1468
1469 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1470 (s_mips_stab): Do not restrict to stabn only.
1471
13761a11
NC		 14722013-05-02 Nick Clifton <nickc@redhat.com>
1473
1474 * config/tc-msp430.c: Add support for the MSP430X architecture.
1475 Add code to insert a NOP instruction after any instruction that
1476 might change the interrupt state.
1477 Add support for the LARGE memory model.
1478 Add code to initialise the .MSP430.attributes section.
1479 * config/tc-msp430.h: Add support for the MSP430X architecture.
1480 * doc/c-msp430.texi: Document the new -mL and -mN command line
1481 options.
1482 * NEWS: Mention support for the MSP430X architecture.
1483
df26367c
MR		 14842013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1485
1486 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1487 alpha*-*-linux*ecoff*.
1488
f02d8318
CF		 14892013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1490
1491 * config/tc-mips.c (mips_ip): Add sizelo.
1492 For "+C", "+G", and "+H", set sizelo and compare against it.
1493
b40bf0a2
NC		 14942013-04-29 Nick Clifton <nickc@redhat.com>
1495
1496 * as.c (Options): Add -gdwarf-sections.
1497 (parse_args): Likewise.
1498 * as.h (flag_dwarf_sections): Declare.
1499 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1500 (process_entries): When -gdwarf-sections is enabled generate
1501 fragmentary .debug_line sections.
1502 (out_debug_line): Set the section for the .debug_line section end
1503 symbol.
1504 * doc/as.texinfo: Document -gdwarf-sections.
1505 * NEWS: Mention -gdwarf-sections.
1506
8eeccb77 15072013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1508
1509 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1510 according to the target parameter. Don't call s_segm since s_segm
1511 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1512 initialized yet.
1513 (md_begin): Call s_segm according to target parameter from command
1514 line.
1515
49926cd0
AM		 15162013-04-25 Alan Modra <amodra@gmail.com>
1517
1518 * configure.in: Allow little-endian linux.
1519 * configure: Regenerate.
1520
e3031850
SL		 15212013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1522
1523 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1524 "fstatus" control register to "eccinj".
1525
cb948fc0
KT		 15262013-04-19 Kai Tietz <ktietz@redhat.com>
1527
1528 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1529
4455e9ad
JB		 15302013-04-15 Julian Brown <julian@codesourcery.com>
1531
1532 * expr.c (add_to_result, subtract_from_result): Make global.
1533 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1534 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1535 subtract_from_result to handle extra bit of precision for .sleb128
1536 directive operands.
1537
956a6ba3
JB		 15382013-04-10 Julian Brown <julian@codesourcery.com>
1539
1540 * read.c (convert_to_bignum): Add sign parameter. Use it
1541 instead of X_unsigned to determine sign of resulting bignum.
1542 (emit_expr): Pass extra argument to convert_to_bignum.
1543 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1544 X_extrabit to convert_to_bignum.
1545 (parse_bitfield_cons): Set X_extrabit.
1546 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1547 Initialise X_extrabit field as appropriate.
1548 (add_to_result): New.
1549 (subtract_from_result): New.
1550 (expr): Use above.
1551 * expr.h (expressionS): Add X_extrabit field.
1552
eb9f3f00
JB		 15532013-04-10 Jan Beulich <jbeulich@suse.com>
1554
1555 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1556 register being PC when is_t or writeback, and use distinct
1557 diagnostic for the latter case.
1558
ccb84d65
JB		 15592013-04-10 Jan Beulich <jbeulich@suse.com>
1560
1561 * gas/config/tc-arm.c (parse_operands): Re-write
1562 po_barrier_or_imm().
1563 (do_barrier): Remove bogus constraint().
1564 (do_t_barrier): Remove.
1565
4d13caa0
NC		 15662013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1567
1568 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1569 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1570 ATmega2564RFR2
1571 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1572
16d02dc9
JB		 15732013-04-09 Jan Beulich <jbeulich@suse.com>
1574
1575 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1576 Use local variable Rt in more places.
1577 (do_vmsr): Accept all control registers.
1578
05ac0ffb
JB		 15792013-04-09 Jan Beulich <jbeulich@suse.com>
1580
1581 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1582 if there was none specified for moves between scalar and core
1583 register.
1584
2d51fb74
JB		 15852013-04-09 Jan Beulich <jbeulich@suse.com>
1586
1587 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1588 NEON_ALL_LANES case.
1589
94dcf8bf
JB		 15902013-04-08 Jan Beulich <jbeulich@suse.com>
1591
1592 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1593 PC-relative VSTR.
1594
1472d06f
JB		 15952013-04-08 Jan Beulich <jbeulich@suse.com>
1596
1597 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1598 entry to sp_fiq.
1599
0c76cae8
AM		 16002013-04-03 Alan Modra <amodra@gmail.com>
1601
1602 * doc/as.texinfo: Add support to generate man options for h8300.
1603 * doc/c-h8300.texi: Likewise.
1604
92eb40d9
RR		 16052013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1606
1607 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1608 Cortex-A57.
1609
51dcdd4d
NC		 16102013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1611
1612 PR binutils/15068
1613 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1614
c5d685bf
NC		 16152013-03-26 Nick Clifton <nickc@redhat.com>
1616
9b978282
NC		 1617 PR gas/15295
1618 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1619 start of the file each time.
1620
c5d685bf
NC		 1621 PR gas/15178
1622 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1623 FreeBSD targets.
1624
9699c833
TG		 16252013-03-26 Douglas B Rupp <rupp@gnat.com>
1626
1627 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1628 after fixup.
1629
4755303e
WN		 16302013-03-21 Will Newton <will.newton@linaro.org>
1631
1632 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1633 pc-relative str instructions in Thumb mode.
1634
81f5558e
NC		 16352013-03-21 Michael Schewe <michael.schewe@gmx.net>
1636
1637 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1638 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1639 R_H8_DISP32A16.
1640 * config/tc-h8300.h: Remove duplicated defines.
1641
71863e73
NC		 16422013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1643
1644 PR gas/15282
1645 * tc-avr.c (mcu_has_3_byte_pc): New function.
1646 (tc_cfi_frame_initial_instructions): Call it to find return
1647 address size.
1648
795b8e6b
NC		 16492013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1650
1651 PR gas/15095
1652 * config/tc-tic6x.c (tic6x_try_encode): Handle
1653 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1654 encode register pair numbers when required.
1655
ba86b375
WN		 16562013-03-15 Will Newton <will.newton@linaro.org>
1657
1658 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1659 in vstr in Thumb mode for pre-ARMv7 cores.
1660
9e6f3811
AS		 16612013-03-14 Andreas Schwab <schwab@suse.de>
1662
1663 * doc/c-arc.texi (ARC Directives): Revert last change and use
1664 @itemize instead of @table.
1665 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1666
b10bf8c5
NC		 16672013-03-14 Nick Clifton <nickc@redhat.com>
1668
1669 PR gas/15273
1670 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1671 NULL message, instead just check ARM_CPU_IS_ANY directly.
1672
ba724cfc
NC		 16732013-03-14 Nick Clifton <nickc@redhat.com>
1674
1675 PR gas/15212
9e6f3811 1676 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1677 for table format.
1678 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1679 to the @item directives.
1680 (ARM-Neon-Alignment): Move to correct place in the document.
1681 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1682 formatting.
1683 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1684 @smallexample.
1685
531a94fd
SL		 16862013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1687
1688 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1689 case. Add default BAD_CASE to switch.
1690
dad60f8e
SL		 16912013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1692
1693 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1694 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1695
dd5181d5
KT		 16962013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1697
1698 * config/tc-arm.c (crc_ext_armv8): New feature set.
1699 (UNPRED_REG): New macro.
1700 (do_crc32_1): New function.
1701 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1702 do_crc32ch, do_crc32cw): Likewise.
1703 (TUEc): New macro.
1704 (insns): Add entries for crc32 mnemonics.
1705 (arm_extensions): Add entry for crc.
1706
8e723a10
CLT		 17072013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1708
1709 * write.h (struct fix): Add fx_dot_frag field.
1710 (dot_frag): Declare.
1711 * write.c (dot_frag): New variable.
1712 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1713 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1714 * expr.c (expr): Save value of frag_now in dot_frag when setting
1715 dot_value.
1716 * read.c (emit_expr): Likewise. Delete comments.
1717
be05d201
L		 17182013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1719
1720 * config/tc-i386.c (flag_code_names): Removed.
1721 (i386_index_check): Rewrote.
1722
62b0d0d5
YZ		 17232013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1724
1725 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1726 add comment.
1727 (aarch64_double_precision_fmovable): New function.
1728 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1729 function; handle hexadecimal representation of IEEE754 encoding.
1730 (parse_operands): Update the call to parse_aarch64_imm_float.
1731
165de32a
L		 17322013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1733
1734 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1735 (check_hle): Updated.
1736 (md_assemble): Likewise.
1737 (parse_insn): Likewise.
1738
d5de92cf
L		 17392013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1740
1741 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1742 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1743 (parse_insn): Remove expecting_string_instruction. Set
1744 i.rep_prefix.
1745
e60bb1dd
YZ		 17462013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1747
1748 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1749
aeebdd9b
YZ		 17502013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1751
1752 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1753 for system registers.
1754
4107ae22
DD		 17552013-02-27 DJ Delorie <dj@redhat.com>
1756
1757 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1758 (rl78_op): Handle %code().
1759 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1760 (tc_gen_reloc): Likwise; convert to a computed reloc.
1761 (md_apply_fix): Likewise.
1762
151fa98f
NC		 17632013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1764
1765 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1766
70a8bc5b 17672013-02-25 Terry Guo <terry.guo@arm.com>
1768
1769 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1770 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1771 list of accepted CPUs.
1772
5c111e37
L		 17732013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1774
1775 PR gas/15159
1776 * config/tc-i386.c (cpu_arch): Add ".smap".
1777
1778 * doc/c-i386.texi: Document smap.
1779
8a75745d
MR		 17802013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1781
1782 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1783 mips_assembling_insn appropriately.
1784 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1785
79850f26
MR		 17862013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1787
cf29fc61 1788 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1789 extraneous braces.
1790
4c261dff
NC		 17912013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1792
5c111e37 1793 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1794
ea33f281
NC		 17952013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1796
1797 * configure.tgt: Add nios2-*-rtems*.
1798
a1ccaec9
YZ		 17992013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1800
1801 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1802 NULL.
1803
0aa27725
RS		 18042013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1805
1806 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1807 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1808
da4339ed
NC		 18092013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1810
1811 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1812 core.
1813
36591ba1 18142013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1815 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1816
1817 Based on patches from Altera Corporation.
1818
1819 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1820 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1821 * Makefile.in: Regenerated.
1822 * configure.tgt: Add case for nios2*-linux*.
1823 * config/obj-elf.c: Conditionally include elf/nios2.h.
1824 * config/tc-nios2.c: New file.
1825 * config/tc-nios2.h: New file.
1826 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1827 * doc/Makefile.in: Regenerated.
1828 * doc/all.texi: Set NIOSII.
1829 * doc/as.texinfo (Overview): Add Nios II options.
1830 (Machine Dependencies): Include c-nios2.texi.
1831 * doc/c-nios2.texi: New file.
1832 * NEWS: Note Altera Nios II support.
1833
94d4433a
AM		 18342013-02-06 Alan Modra <amodra@gmail.com>
1835
1836 PR gas/14255
1837 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1838 Don't skip fixups with fx_subsy non-NULL.
1839 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1840 with fx_subsy non-NULL.
1841
ace9af6f
L		 18422013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1843
1844 * doc/c-metag.texi: Add "@c man" markers.
1845
89d67ed9
AM		 18462013-02-04 Alan Modra <amodra@gmail.com>
1847
1848 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1849 related code.
1850 (TC_ADJUST_RELOC_COUNT): Delete.
1851 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1852
89072bd6
AM		 18532013-02-04 Alan Modra <amodra@gmail.com>
1854
1855 * po/POTFILES.in: Regenerate.
1856
f9b2d544
NC		 18572013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1858
1859 * config/tc-metag.c: Make SWAP instruction less permissive with
1860 its operands.
1861
392ca752
DD		 18622013-01-29 DJ Delorie <dj@redhat.com>
1863
1864 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1865 relocs in .word/.etc statements.
1866
427d0db6
RM		 18672013-01-29 Roland McGrath <mcgrathr@google.com>
1868
1869 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1870 immediate value for 8-bit offset" error so it shows line info.
1871
4faf939a
JM		 18722013-01-24 Joseph Myers <joseph@codesourcery.com>
1873
1874 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1875 for 64-bit output.
1876
78c8d46c
NC		 18772013-01-24 Nick Clifton <nickc@redhat.com>
1878
1879 * config/tc-v850.c: Add support for e3v5 architecture.
1880 * doc/c-v850.texi: Mention new support.
1881
fb5b7503
NC		 18822013-01-23 Nick Clifton <nickc@redhat.com>
1883
1884 PR gas/15039
1885 * config/tc-avr.c: Include dwarf2dbg.h.
1886
8ce3d284
L		 18872013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1888
1889 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1890 (tc_i386_fix_adjustable): Likewise.
1891 (lex_got): Likewise.
1892 (tc_gen_reloc): Likewise.
1893
f5555712
YZ		 18942013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1895
1896 * config/tc-aarch64.c (output_operand_error_record): Change to output
1897 the out-of-range error message as value-expected message if there is
1898 only one single value in the expected range.
1899 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1900 LSL #0 as a programmer-friendly feature.
1901
8fd4256d
L		 19022013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1903
1904 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1905 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1906 BFD_RELOC_64_SIZE relocations.
1907 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1908 for it.
1909 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1910 relocations against local symbols.
1911
a5840dce
AM		 19122013-01-16 Alan Modra <amodra@gmail.com>
1913
1914 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1915 finding some sort of toc syntax error, and break to avoid
1916 compiler uninit warning.
1917
af89796a
L		 19182013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1919
1920 PR gas/15019
1921 * config/tc-i386.c (lex_got): Increment length by 1 if the
1922 relocation token is removed.
1923
dd42f060
NC		 19242013-01-15 Nick Clifton <nickc@redhat.com>
1925
1926 * config/tc-v850.c (md_assemble): Allow signed values for
1927 V850E_IMMEDIATE.
1928
464e3686
SK		 19292013-01-11 Sean Keys <skeys@ipdatasys.com>
1930
1931 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1932 git to cvs.
464e3686 1933
5817ffd1
PB		 19342013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1935
1936 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1937 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1938 * config/tc-ppc.c (md_show_usage): Likewise.
1939 (ppc_handle_align): Handle power8's group ending nop.
1940
f4b1f6a9
SK		 19412013-01-10 Sean Keys <skeys@ipdatasys.com>
1942
1943 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1944 that the assember exits after the opcodes have been printed.
f4b1f6a9 1945
34bca508
L		 19462013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1947
1948 * app.c: Remove trailing white spaces.
1949 * as.c: Likewise.
1950 * as.h: Likewise.
1951 * cond.c: Likewise.
1952 * dw2gencfi.c: Likewise.
1953 * dwarf2dbg.h: Likewise.
1954 * ecoff.c: Likewise.
1955 * input-file.c: Likewise.
1956 * itbl-lex.h: Likewise.
1957 * output-file.c: Likewise.
1958 * read.c: Likewise.
1959 * sb.c: Likewise.
1960 * subsegs.c: Likewise.
1961 * symbols.c: Likewise.
1962 * write.c: Likewise.
1963 * config/tc-i386.c: Likewise.
1964 * doc/Makefile.am: Likewise.
1965 * doc/Makefile.in: Likewise.
1966 * doc/c-aarch64.texi: Likewise.
1967 * doc/c-alpha.texi: Likewise.
1968 * doc/c-arc.texi: Likewise.
1969 * doc/c-arm.texi: Likewise.
1970 * doc/c-avr.texi: Likewise.
1971 * doc/c-bfin.texi: Likewise.
1972 * doc/c-cr16.texi: Likewise.
1973 * doc/c-d10v.texi: Likewise.
1974 * doc/c-d30v.texi: Likewise.
1975 * doc/c-h8300.texi: Likewise.
1976 * doc/c-hppa.texi: Likewise.
1977 * doc/c-i370.texi: Likewise.
1978 * doc/c-i386.texi: Likewise.
1979 * doc/c-i860.texi: Likewise.
1980 * doc/c-m32c.texi: Likewise.
1981 * doc/c-m32r.texi: Likewise.
1982 * doc/c-m68hc11.texi: Likewise.
1983 * doc/c-m68k.texi: Likewise.
1984 * doc/c-microblaze.texi: Likewise.
1985 * doc/c-mips.texi: Likewise.
1986 * doc/c-msp430.texi: Likewise.
1987 * doc/c-mt.texi: Likewise.
1988 * doc/c-s390.texi: Likewise.
1989 * doc/c-score.texi: Likewise.
1990 * doc/c-sh.texi: Likewise.
1991 * doc/c-sh64.texi: Likewise.
1992 * doc/c-tic54x.texi: Likewise.
1993 * doc/c-tic6x.texi: Likewise.
1994 * doc/c-v850.texi: Likewise.
1995 * doc/c-xc16x.texi: Likewise.
1996 * doc/c-xgate.texi: Likewise.
1997 * doc/c-xtensa.texi: Likewise.
1998 * doc/c-z80.texi: Likewise.
1999 * doc/internals.texi: Likewise.
2000
4c665b71
RM		 20012013-01-10 Roland McGrath <mcgrathr@google.com>
2002
2003 * hash.c (hash_new_sized): Make it global.
2004 * hash.h: Declare it.
2005 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2006 pass a small size.
2007
a3c62988
NC		 20082013-01-10 Will Newton <will.newton@imgtec.com>
2009
2010 * Makefile.am: Add Meta.
2011 * Makefile.in: Regenerate.
2012 * config/tc-metag.c: New file.
2013 * config/tc-metag.h: New file.
2014 * configure.tgt: Add Meta.
2015 * doc/Makefile.am: Add Meta.
2016 * doc/Makefile.in: Regenerate.
2017 * doc/all.texi: Add Meta.
2018 * doc/as.texiinfo: Document Meta options.
2019 * doc/c-metag.texi: New file.
2020
b37df7c4
SE		 20212013-01-09 Steve Ellcey <sellcey@mips.com>
2022
2023 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2024 calls.
2025 * config/tc-mips.c (internalError): Remove, replace with abort.
2026
a3251895
YZ		 20272013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2028
2029 * config/tc-aarch64.c (parse_operands): Change to compare the result
2030 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2031
8ab8155f
NC		 20322013-01-07 Nick Clifton <nickc@redhat.com>
2033
2034 PR gas/14887
2035 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2036 anticipated character.
2037 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2038 here as it is no longer needed.
2039
a4ac1c42
AS		 20402013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2041
2042 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2043 * doc/c-score.texi (SCORE-Opts): Likewise.
2044 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2045
e407c74b
NC		 20462013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2047
2048 * config/tc-mips.c: Add support for MIPS r5900.
2049 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2050 lq and sq.
2051 (can_swap_branch_p, get_append_method): Detect some conditional
2052 short loops to fix a bug on the r5900 by NOP in the branch delay
2053 slot.
2054 (M_MUL): Support 3 operands in multu on r5900.
2055 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2056 (s_mipsset): Force 32 bit floating point on r5900.
2057 (mips_ip): Check parameter range of instructions mfps and mtps on
2058 r5900.
2059 * configure.in: Detect CPU type when target string contains r5900
2060 (e.g. mips64r5900el-linux-gnu).
2061
62658407
L		 20622013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2063
2064 * as.c (parse_args): Update copyright year to 2013.
2065
95830fd1
YZ		 20662013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2067
2068 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2069 and "cortex57".
2070
517bb291 20712013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 2072
517bb291
NC		 2073 PR gas/14987
2074 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2075 closing bracket.
d709e4e6 2076
517bb291 2077For older changes see ChangeLog-2012
08d56133 2078\f
517bb291 2079Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 2080
2081Copying and distribution of this file, with or without modification,
2082are permitted in any medium without royalty provided the copyright
2083notice and this notice are preserved.
2084
08d56133
NC		 2085Local Variables:
2086mode: change-log
2087left-margin: 8
2088fill-column: 74
2089version-control: never
2090End:
GDB Binutils - Deliverables
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