* dw2gencfi.c (cfi_add_CFA_offset):
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ba5f0fda
BE
12006-10-26 Ben Elliston <bje@au.ibm.com>
2
3 * dw2gencfi.c (cfi_add_CFA_offset):
4 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
5
e9f53129
AM
62006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
7 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
8 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
9 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
10 Alan Modra <amodra@bigpond.net.au>
11
12 * config/tc-spu.c: New file.
13 * config/tc-spu.h: New file.
14 * configure.tgt: Add SPU support.
15 * Makefile.am: Likewise. Run "make dep-am".
16 * Makefile.in: Regenerate.
17 * po/POTFILES.in: Regenerate.
18
7b383517
BE
192006-10-25 Ben Elliston <bje@au.ibm.com>
20
21 * expr.c (expr): Replace O_add case in switch (op_left) explaining
22 why it can never occur.
23
ede602d7
AM
242006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
25
26 * doc/c-ppc.texi (-mcell): Document.
27 * config/tc-ppc.c (parse_cpu): Parse -mcell.
28 (md_show_usage): Document -mcell.
29
7918206c
MM
302006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
31
32 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
33
878bcc43
AM
342006-10-23 Alan Modra <amodra@bigpond.net.au>
35
36 * config/tc-m68hc11.c (md_assemble): Quiet warning.
37
8620418b
MF
382006-10-19 Mike Frysinger <vapier@gentoo.org>
39
40 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
41 (x86_64_section_letter): Likewise.
42
b3549761
NC
432006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
44
45 * config/tc-score.c (build_relax_frag): Compute correct
46 tc_frag_data.fixp.
47
71a75f6f
MF
482006-10-18 Roy Marples <uberlord@gentoo.org>
49
50 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
51 elf32-sparc as a viable target for the -32 switch and any target
52 starting with elf64-sparc as a viable target for the -64 switch.
53 (sparc_target_format): For 64-bit ELF flavoured output use
54 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
55 ELF_TARGET_FORMAT.
71a75f6f
MF
56 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
57
e1b5fdd4
L
582006-10-17 H.J. Lu <hongjiu.lu@intel.com>
59
60 * configure: Regenerated.
61
f8ef9cd7
BS
622006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
63
64 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
65 in addition to testing for '\n'.
66 (TC_EOL_IN_INSN): Provide a default definition if necessary.
67
eb1fe072
NC
682006-10-13 Sterling Augstine <sterling@tensilica.com>
69
70 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
71 a disjoint DW_AT range.
72
ec6e49f4
NC
732006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
74
75 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
76
036dc3f7
PB
772006-10-08 Paul Brook <paul@codesourcery.com>
78
79 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
80 (parse_operands): Use parse_big_immediate for OP_NILO.
81 (neon_cmode_for_logic_imm): Try smaller element sizes.
82 (neon_cmode_for_move_imm): Ditto.
83 (do_neon_logic): Handle .i64 pseudo-op.
84
3bb0c887
AM
852006-09-29 Alan Modra <amodra@bigpond.net.au>
86
87 * po/POTFILES.in: Regenerate.
88
ef05d495
L
892006-09-28 H.J. Lu <hongjiu.lu@intel.com>
90
91 * config/tc-i386.h (CpuMNI): Renamed to ...
92 (CpuSSSE3): This.
93 (CpuUnknownFlags): Updated.
94 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
95 and PROCESSOR_MEROM with PROCESSOR_CORE2.
96 * config/tc-i386.c: Updated.
97 * doc/c-i386.texi: Likewise.
a70ae331 98
ef05d495
L
99 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
100
d8ad03e9
NC
1012006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
102
103 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
104
df3ca5a3
NC
1052006-09-27 Nick Clifton <nickc@redhat.com>
106
107 * output-file.c (output_file_close): Prevent an infinite loop
108 reporting that stdoutput could not be closed.
109
2d447fca
JM
1102006-09-26 Mark Shinwell <shinwell@codesourcery.com>
111 Joseph Myers <joseph@codesourcery.com>
112 Ian Lance Taylor <ian@wasabisystems.com>
113 Ben Elliston <bje@wasabisystems.com>
114
115 * config/tc-arm.c (arm_cext_iwmmxt2): New.
116 (enum operand_parse_code): New code OP_RIWR_I32z.
117 (parse_operands): Handle OP_RIWR_I32z.
118 (do_iwmmxt_wmerge): New function.
119 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
120 a register.
121 (do_iwmmxt_wrwrwr_or_imm5): New function.
122 (insns): Mark instructions as RIWR_I32z as appropriate.
123 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
124 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
125 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
126 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
127 (md_begin): Handle IWMMXT2.
128 (arm_cpus): Add iwmmxt2.
129 (arm_extensions): Likewise.
130 (arm_archs): Likewise.
131
ba83aca1
BW
1322006-09-25 Bob Wilson <bob.wilson@acm.org>
133
134 * doc/as.texinfo (Overview): Revise description of --keep-locals.
135 Add xref to "Symbol Names".
136 (L): Refer to "local symbols" instead of "local labels". Move
137 definition to "Symbol Names" section; add xref to that section.
138 (Symbol Names): Use "Local Symbol Names" section to define local
139 symbols. Add "Local Labels" heading for description of temporary
140 forward/backward labels, and refer to those as "local labels".
141
539e75ad
L
1422006-09-23 H.J. Lu <hongjiu.lu@intel.com>
143
144 PR binutils/3235
145 * config/tc-i386.c (match_template): Check address size prefix
146 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
147 operand.
148
5e02f92e
AM
1492006-09-22 Alan Modra <amodra@bigpond.net.au>
150
151 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
152
885afe7b
AM
1532006-09-22 Alan Modra <amodra@bigpond.net.au>
154
155 * as.h (as_perror): Delete declaration.
156 * gdbinit.in (as_perror): Delete breakpoint.
157 * messages.c (as_perror): Delete function.
158 * doc/internals.texi: Remove as_perror description.
159 * listing.c (listing_print: Don't use as_perror.
160 * output-file.c (output_file_create, output_file_close): Likewise.
161 * symbols.c (symbol_create, symbol_clone): Likewise.
162 * write.c (write_contents): Likewise.
163 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
164 * config/tc-tic54x.c (tic54x_mlib): Likewise.
165
3aeeedbb
AM
1662006-09-22 Alan Modra <amodra@bigpond.net.au>
167
168 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
169 (ppc_handle_align): New function.
170 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
171 (SUB_SEGMENT_ALIGN): Define as zero.
172
96e9638b
BW
1732006-09-20 Bob Wilson <bob.wilson@acm.org>
174
175 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
176 (Overview): Skip cross reference in man page.
177
99ad8390
NC
1782006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
179
180 * configure.in: Add new target x86_64-pc-mingw64.
181 * configure: Regenerate.
182 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
183 * config/obj-coff.h: Add handling for TE_PEP target specific code
184 and definitions.
99ad8390
NC
185 * config/tc-i386.c: Add new targets.
186 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
187 (x86_64_target_format): Add new method for setup proper default
188 target cpu mode.
99ad8390
NC
189 * config/te-pep.h: Add new target definition header.
190 (TE_PEP): New macro: Identifies new target architecture.
191 (COFF_WITH_pex64): Set proper includes in bfd.
192 * NEWS: Mention new target.
193
73332571
BS
1942006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
195
196 * config/bfin-parse.y (binary): Change sub of const to add of negated
197 const.
198
1c0d3aa6
NC
1992006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
200
201 * config/tc-score.c: New file.
202 * config/tc-score.h: Newf file.
203 * configure.tgt: Add Score target.
204 * Makefile.am: Add Score files.
205 * Makefile.in: Regenerate.
206 * NEWS: Mention new target support.
207
4fa3602b
PB
2082006-09-16 Paul Brook <paul@codesourcery.com>
209
210 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
211 * doc/c-arm.texi (movsp): Document offset argument.
212
16dd5e42
PB
2132006-09-16 Paul Brook <paul@codesourcery.com>
214
215 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
216 unsigned int to avoid 64-bit host problems.
217
c4ae04ce
BS
2182006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
219
220 * config/bfin-parse.y (binary): Do some more constant folding for
221 additions.
222
e5d4a5a6
JB
2232006-09-13 Jan Beulich <jbeulich@novell.com>
224
225 * input-file.c (input_file_give_next_buffer): Demote as_bad to
226 as_warn.
227
1a1219cb
AM
2282006-09-13 Alan Modra <amodra@bigpond.net.au>
229
230 PR gas/3165
231 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
232 in parens.
233
f79d9c1d
AM
2342006-09-13 Alan Modra <amodra@bigpond.net.au>
235
236 * input-file.c (input_file_open): Replace as_perror with as_bad
237 so that gas exits with error on file errors. Correct error
238 message.
239 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 240 * input-file.h: Update comment.
f79d9c1d 241
f512f76f
NC
2422006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
243
244 PR gas/3172
245 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
246 registers as a sub-class of wC registers.
247
8d79fd44
AM
2482006-09-11 Alan Modra <amodra@bigpond.net.au>
249
250 PR gas/3165
251 * config/tc-mips.h (enum dwarf2_format): Forward declare.
252 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
253 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
254 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
255
6258339f
NC
2562006-09-08 Nick Clifton <nickc@redhat.com>
257
258 PR gas/3129
259 * doc/as.texinfo (Macro): Improve documentation about separating
260 macro arguments from following text.
261
f91e006c
PB
2622006-09-08 Paul Brook <paul@codesourcery.com>
263
264 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
265
466bbf93
PB
2662006-09-07 Paul Brook <paul@codesourcery.com>
267
268 * config/tc-arm.c (parse_operands): Mark operand as present.
269
428e3f1f
PB
2702006-09-04 Paul Brook <paul@codesourcery.com>
271
272 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
273 (do_neon_dyadic_if_i_d): Avoid setting U bit.
274 (do_neon_mac_maybe_scalar): Ditto.
275 (do_neon_dyadic_narrow): Force operand type to NT_integer.
276 (insns): Remove out of date comments.
277
fb25138b
NC
2782006-08-29 Nick Clifton <nickc@redhat.com>
279
280 * read.c (s_align): Initialize the 'stopc' variable to prevent
281 compiler complaints about it being used without being
282 initialized.
283 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
284 s_float_space, s_struct, cons_worker, equals): Likewise.
285
5091343a
AM
2862006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
287
288 * ecoff.c (ecoff_directive_val): Fix message typo.
289 * config/tc-ns32k.c (convert_iif): Likewise.
290 * config/tc-sh64.c (shmedia_check_limits): Likewise.
291
1f2a7e38
BW
2922006-08-25 Sterling Augustine <sterling@tensilica.com>
293 Bob Wilson <bob.wilson@acm.org>
294
295 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
296 the state of the absolute_literals directive. Remove align frag at
297 the start of the literal pool position.
298
34135039
BW
2992006-08-25 Bob Wilson <bob.wilson@acm.org>
300
301 * doc/c-xtensa.texi: Add @group commands in examples.
302
74869ac7
BW
3032006-08-24 Bob Wilson <bob.wilson@acm.org>
304
305 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
306 (INIT_LITERAL_SECTION_NAME): Delete.
307 (lit_state struct): Remove segment names, init_lit_seg, and
308 fini_lit_seg. Add lit_prefix and current_text_seg.
309 (init_literal_head_h, init_literal_head): Delete.
310 (fini_literal_head_h, fini_literal_head): Delete.
311 (xtensa_begin_directive): Move argument parsing to
312 xtensa_literal_prefix function.
313 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
314 (xtensa_literal_prefix): Parse the directive argument here and
315 record it in the lit_prefix field. Remove code to derive literal
316 section names.
317 (linkonce_len): New.
318 (get_is_linkonce_section): Use linkonce_len. Check for any
319 ".gnu.linkonce.*" section, not just text sections.
320 (md_begin): Remove initialization of deleted lit_state fields.
321 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
322 to init_literal_head and fini_literal_head.
323 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
324 when traversing literal_head list.
325 (match_section_group): New.
326 (cache_literal_section): Rewrite to determine the literal section
327 name on the fly, create the section and return it.
328 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
329 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
330 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
331 Use xtensa_get_property_section from bfd.
332 (retrieve_xtensa_section): Delete.
333 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
334 description to refer to plural literal sections and add xref to
335 the Literal Directive section.
336 (Literal Directive): Describe new rules for deriving literal section
337 names. Add footnote for special case of .init/.fini with
338 --text-section-literals.
339 (Literal Prefix Directive): Replace old naming rules with xref to the
340 Literal Directive section.
341
87a1fd79
JM
3422006-08-21 Joseph Myers <joseph@codesourcery.com>
343
344 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
345 merging with previous long opcode.
346
7148cc28
NC
3472006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
348
349 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
350 * Makefile.in: Regenerate.
351 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
352 renamed. Adjust.
353
3e9e4fcf
JB
3542006-08-16 Julian Brown <julian@codesourcery.com>
355
356 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
357 to use ARM instructions on non-ARM-supporting cores.
358 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
359 mode automatically based on cpu variant.
360 (md_begin): Call above function.
361
267d2029
JB
3622006-08-16 Julian Brown <julian@codesourcery.com>
363
364 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
365 recognized in non-unified syntax mode.
366
4be041b2
TS
3672006-08-15 Thiemo Seufer <ths@mips.com>
368 Nigel Stephens <nigel@mips.com>
369 David Ung <davidu@mips.com>
370
371 * configure.tgt: Handle mips*-sde-elf*.
372
3a93f742
TS
3732006-08-12 Thiemo Seufer <ths@networkno.de>
374
375 * config/tc-mips.c (mips16_ip): Fix argument register handling
376 for restore instruction.
377
1737851b
BW
3782006-08-08 Bob Wilson <bob.wilson@acm.org>
379
380 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
381 (out_sleb128): New.
382 (out_fixed_inc_line_addr): New.
383 (process_entries): Use out_fixed_inc_line_addr when
384 DWARF2_USE_FIXED_ADVANCE_PC is set.
385 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
386
e14e52f8
DD
3872006-08-08 DJ Delorie <dj@redhat.com>
388
389 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
390 vs full symbols so that we never have more than one pointer value
391 for any given symbol in our symbol table.
392
802f5d9e
NC
3932006-08-08 Sterling Augustine <sterling@tensilica.com>
394
395 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
396 and emit DW_AT_ranges when code in compilation unit is not
397 contiguous.
398 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
399 is not contiguous.
400 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
401 (out_debug_ranges): New function to emit .debug_ranges section
402 when code is not contiguous.
403
720abc60
NC
4042006-08-08 Nick Clifton <nickc@redhat.com>
405
406 * config/tc-arm.c (WARN_DEPRECATED): Enable.
407
f0927246
NC
4082006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
409
410 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
411 only block.
412 (pe_directive_secrel) [TE_PE]: New function.
413 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
414 loc, loc_mark_labels.
415 [TE_PE]: Handle secrel32.
416 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
417 call.
418 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
419 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
420 (md_section_align): Only round section sizes here for AOUT
421 targets.
422 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
423 (tc_pe_dwarf2_emit_offset): New function.
424 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
425 (cons_fix_new_arm): Handle O_secrel.
426 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
427 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
428 of OBJ_ELF only block.
429 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
430 tc_pe_dwarf2_emit_offset.
431
55e6e397
RS
4322006-08-04 Richard Sandiford <richard@codesourcery.com>
433
434 * config/tc-sh.c (apply_full_field_fix): New function.
435 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
436 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
437 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
438 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
439
9cd19b17
NC
4402006-08-03 Nick Clifton <nickc@redhat.com>
441
442 PR gas/2991
443 * config.in: Regenerate.
444
97f87066
JM
4452006-08-03 Joseph Myers <joseph@codesourcery.com>
446
447 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 448 for OP_RIWR_RIWC.
97f87066 449
41adaa5c
JM
4502006-08-03 Joseph Myers <joseph@codesourcery.com>
451
452 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
453 (parse_operands): Handle it.
454 (insns): Use it for tmcr and tmrc.
455
9d7cbccd
NC
4562006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
457
458 PR binutils/2983
459 * config/tc-i386.c (md_parse_option): Treat any target starting
460 with elf64_x86_64 as a viable target for the -64 switch.
461 (i386_target_format): For 64-bit ELF flavoured output use
462 ELF_TARGET_FORMAT64.
463 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
464
c973bc5c
NC
4652006-08-02 Nick Clifton <nickc@redhat.com>
466
467 PR gas/2991
468 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
469 bfd/aclocal.m4.
470 * configure.in: Run BFD_BINARY_FOPEN.
471 * configure: Regenerate.
472 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
473 file to include.
474
cfde7f70
L
4752006-08-01 H.J. Lu <hongjiu.lu@intel.com>
476
477 * config/tc-i386.c (md_assemble): Don't update
478 cpu_arch_isa_flags.
479
b4c71f56
TS
4802006-08-01 Thiemo Seufer <ths@mips.com>
481
482 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
483
54f4ddb3
TS
4842006-08-01 Thiemo Seufer <ths@mips.com>
485
486 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
487 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
488 BFD_RELOC_32 and BFD_RELOC_16.
489 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
490 md_convert_frag, md_obj_end): Fix comment formatting.
491
d103cf61
TS
4922006-07-31 Thiemo Seufer <ths@mips.com>
493
494 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
495 handling for BFD_RELOC_MIPS16_JMP.
496
601e61cd
NC
4972006-07-24 Andreas Schwab <schwab@suse.de>
498
499 PR/2756
500 * read.c (read_a_source_file): Ignore unknown text after line
501 comment character. Fix misleading comment.
502
b45619c0
NC
5032006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
504
505 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
506 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
507 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
508 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
509 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
510 doc/c-z80.texi, doc/internals.texi: Fix some typos.
511
784906c5
NC
5122006-07-21 Nick Clifton <nickc@redhat.com>
513
514 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
515 linker testsuite.
516
d5f010e9
TS
5172006-07-20 Thiemo Seufer <ths@mips.com>
518 Nigel Stephens <nigel@mips.com>
519
520 * config/tc-mips.c (md_parse_option): Don't infer optimisation
521 options from debug options.
522
35d3d567
TS
5232006-07-20 Thiemo Seufer <ths@mips.com>
524
525 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
526 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
527
401a54cf
PB
5282006-07-19 Paul Brook <paul@codesourcery.com>
529
530 * config/tc-arm.c (insns): Fix rbit Arm opcode.
531
16805f35
PB
5322006-07-18 Paul Brook <paul@codesourcery.com>
533
534 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
535 (md_convert_frag): Use correct reloc for add_pc. Use
536 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
537 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
538 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
539
d9e05e4e
AM
5402006-07-17 Mat Hostetter <mat@lcs.mit.edu>
541
542 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
543 when file and line unknown.
544
f43abd2b
TS
5452006-07-17 Thiemo Seufer <ths@mips.com>
546
547 * read.c (s_struct): Use IS_ELF.
548 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
549 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
550 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
551 s_mips_mask): Likewise.
552
a2902af6
TS
5532006-07-16 Thiemo Seufer <ths@mips.com>
554 David Ung <davidu@mips.com>
555
556 * read.c (s_struct): Handle ELF section changing.
557 * config/tc-mips.c (s_align): Leave enabling auto-align to the
558 generic code.
559 (s_change_sec): Try section changing only if we output ELF.
560
d32cad65
L
5612006-07-15 H.J. Lu <hongjiu.lu@intel.com>
562
563 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
564 CpuAmdFam10.
565 (smallest_imm_type): Remove Cpu086.
566 (i386_target_format): Likewise.
567
568 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
569 Update CpuXXX.
570
050dfa73
MM
5712006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
572 Michael Meissner <michael.meissner@amd.com>
573
574 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
575 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
576 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
577 architecture.
578 (i386_align_code): Ditto.
579 (md_assemble_code): Add support for insertq/extrq instructions,
580 swapping as needed for intel syntax.
581 (swap_imm_operands): New function to swap immediate operands.
582 (swap_operands): Deal with 4 operand instructions.
583 (build_modrm_byte): Add support for insertq instruction.
584
6b2de085
L
5852006-07-13 H.J. Lu <hongjiu.lu@intel.com>
586
587 * config/tc-i386.h (Size64): Fix a typo in comment.
588
01eaea5a
NC
5892006-07-12 Nick Clifton <nickc@redhat.com>
590
591 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 592 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
593 already been checked here.
594
1e85aad8
JW
5952006-07-07 James E Wilson <wilson@specifix.com>
596
597 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
598
1370e33d
NC
5992006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
600 Nick Clifton <nickc@redhat.com>
601
602 PR binutils/2877
603 * doc/as.texi: Fix spelling typo: branchs => branches.
604 * doc/c-m68hc11.texi: Likewise.
605 * config/tc-m68hc11.c: Likewise.
606 Support old spelling of command line switch for backwards
607 compatibility.
608
5f0fe04b
TS
6092006-07-04 Thiemo Seufer <ths@mips.com>
610 David Ung <davidu@mips.com>
611
612 * config/tc-mips.c (s_is_linkonce): New function.
613 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
614 weak, external, and linkonce symbols.
615 (pic_need_relax): Use s_is_linkonce.
616
85234291
L
6172006-06-24 H.J. Lu <hongjiu.lu@intel.com>
618
619 * doc/as.texinfo (Org): Remove space.
620 (P2align): Add "@var{abs-expr},".
621
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L
6222006-06-23 H.J. Lu <hongjiu.lu@intel.com>
623
624 * config/tc-i386.c (cpu_arch_tune_set): New.
625 (cpu_arch_isa): Likewise.
626 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
627 nops with short or long nop sequences based on -march=/.arch
628 and -mtune=.
629 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
630 set cpu_arch_tune and cpu_arch_tune_flags.
631 (md_parse_option): For -march=, set cpu_arch_isa and set
632 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
633 0. Set cpu_arch_tune_set to 1 for -mtune=.
634 (i386_target_format): Don't set cpu_arch_tune.
635
d4dc2f22
TS
6362006-06-23 Nigel Stephens <nigel@mips.com>
637
638 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
639 generated .sbss.* and .gnu.linkonce.sb.*.
640
a8dbcb85
TS
6412006-06-23 Thiemo Seufer <ths@mips.com>
642 David Ung <davidu@mips.com>
643
644 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
645 label_list.
646 * config/tc-mips.c (label_list): Define per-segment label_list.
647 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
648 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
649 mips_from_file_after_relocs, mips_define_label): Use per-segment
650 label_list.
651
3994f87e
TS
6522006-06-22 Thiemo Seufer <ths@mips.com>
653
654 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
655 (append_insn): Use it.
656 (md_apply_fix): Whitespace formatting.
657 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
658 mips16_extended_frag): Remove register specifier.
659 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
660 constants.
661
fa073d69
MS
6622006-06-21 Mark Shinwell <shinwell@codesourcery.com>
663
664 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
665 a directive saving VFP registers for ARMv6 or later.
666 (s_arm_unwind_save): Add parameter arch_v6 and call
667 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
668 appropriate.
669 (md_pseudo_table): Add entry for new "vsave" directive.
670 * doc/c-arm.texi: Correct error in example for "save"
671 directive (fstmdf -> fstmdx). Also document "vsave" directive.
672
8e77b565 6732006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
674 Anatoly Sokolov <aesok@post.ru>
675
a70ae331
AM
676 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
677 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
678 atmega164p/atmega324p.
679 * doc/c-avr.texi: Document new mcu and arch options.
680
8b1ad454
NC
6812006-06-17 Nick Clifton <nickc@redhat.com>
682
683 * config/tc-arm.c (enum parse_operand_result): Move outside of
684 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
685
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L
6862006-06-16 H.J. Lu <hongjiu.lu@intel.com>
687
688 * config/tc-i386.h (processor_type): New.
689 (arch_entry): Add type.
690
691 * config/tc-i386.c (cpu_arch_tune): New.
692 (cpu_arch_tune_flags): Likewise.
693 (cpu_arch_isa_flags): Likewise.
694 (cpu_arch): Updated.
695 (set_cpu_arch): Also update cpu_arch_isa_flags.
696 (md_assemble): Update cpu_arch_isa_flags.
697 (OPTION_MARCH): New.
698 (OPTION_MTUNE): Likewise.
699 (md_longopts): Add -march= and -mtune=.
700 (md_parse_option): Support -march= and -mtune=.
701 (md_show_usage): Add -march=CPU/-mtune=CPU.
702 (i386_target_format): Also update cpu_arch_isa_flags,
703 cpu_arch_tune and cpu_arch_tune_flags.
704
705 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
706
707 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
708
4962c51a
MS
7092006-06-15 Mark Shinwell <shinwell@codesourcery.com>
710
711 * config/tc-arm.c (enum parse_operand_result): New.
712 (struct group_reloc_table_entry): New.
713 (enum group_reloc_type): New.
714 (group_reloc_table): New array.
715 (find_group_reloc_table_entry): New function.
716 (parse_shifter_operand_group_reloc): New function.
717 (parse_address_main): New function, incorporating code
718 from the old parse_address function. To be used via...
719 (parse_address): wrapper for parse_address_main; and
720 (parse_address_group_reloc): new function, likewise.
721 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
722 OP_ADDRGLDRS, OP_ADDRGLDC.
723 (parse_operands): Support for these new operand codes.
724 New macro po_misc_or_fail_no_backtrack.
725 (encode_arm_cp_address): Preserve group relocations.
726 (insns): Modify to use the above operand codes where group
727 relocations are permitted.
728 (md_apply_fix): Handle the group relocations
729 ALU_PC_G0_NC through LDC_SB_G2.
730 (tc_gen_reloc): Likewise.
731 (arm_force_relocation): Leave group relocations for the linker.
732 (arm_fix_adjustable): Likewise.
733
cd2f129f
JB
7342006-06-15 Julian Brown <julian@codesourcery.com>
735
736 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
737 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
738 relocs properly.
739
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L
7402006-06-12 H.J. Lu <hongjiu.lu@intel.com>
741
742 * config/tc-i386.c (process_suffix): Don't add rex64 for
743 "xchg %rax,%rax".
744
1787fe5b
TS
7452006-06-09 Thiemo Seufer <ths@mips.com>
746
747 * config/tc-mips.c (mips_ip): Maintain argument count.
748
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7492006-06-09 Alan Modra <amodra@bigpond.net.au>
750
751 * config/tc-iq2000.c: Include sb.h.
752
7c752c2a
TS
7532006-06-08 Nigel Stephens <nigel@mips.com>
754
755 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
756 aliases for better compatibility with SGI tools.
757
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AM
7582006-06-08 Alan Modra <amodra@bigpond.net.au>
759
760 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
761 * Makefile.am (GASLIBS): Expand @BFDLIB@.
762 (BFDVER_H): Delete.
763 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
764 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
765 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
766 Run "make dep-am".
767 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
768 * Makefile.in: Regenerate.
769 * doc/Makefile.in: Regenerate.
770 * configure: Regenerate.
771
6648b7cf
JM
7722006-06-07 Joseph S. Myers <joseph@codesourcery.com>
773
774 * po/Make-in (pdf, ps): New dummy targets.
775
037e8744
JB
7762006-06-07 Julian Brown <julian@codesourcery.com>
777
778 * config/tc-arm.c (stdarg.h): include.
779 (arm_it): Add uncond_value field. Add isvec and issingle to operand
780 array.
781 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
782 REG_TYPE_NSDQ (single, double or quad vector reg).
783 (reg_expected_msgs): Update.
784 (BAD_FPU): Add macro for unsupported FPU instruction error.
785 (parse_neon_type): Support 'd' as an alias for .f64.
786 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
787 sets of registers.
788 (parse_vfp_reg_list): Don't update first arg on error.
789 (parse_neon_mov): Support extra syntax for VFP moves.
790 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
791 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
792 (parse_operands): Support isvec, issingle operands fields, new parse
793 codes above.
794 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
795 msr variants.
796 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
797 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
798 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
799 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
800 shapes.
801 (neon_shape): Redefine in terms of above.
802 (neon_shape_class): New enumeration, table of shape classes.
803 (neon_shape_el): New enumeration. One element of a shape.
804 (neon_shape_el_size): Register widths of above, where appropriate.
805 (neon_shape_info): New struct. Info for shape table.
806 (neon_shape_tab): New array.
807 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
808 (neon_check_shape): Rewrite as...
809 (neon_select_shape): New function to classify instruction shapes,
810 driven by new table neon_shape_tab array.
811 (neon_quad): New function. Return 1 if shape should set Q flag in
812 instructions (or equivalent), 0 otherwise.
813 (type_chk_of_el_type): Support F64.
814 (el_type_of_type_chk): Likewise.
815 (neon_check_type): Add support for VFP type checking (VFP data
816 elements fill their containing registers).
817 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
818 in thumb mode for VFP instructions.
819 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
820 and encode the current instruction as if it were that opcode.
821 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
822 arguments, call function in PFN.
823 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
824 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
825 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
826 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
827 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
828 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
829 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
830 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
831 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
832 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
833 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
834 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
835 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
836 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
837 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
838 neon_quad.
839 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
840 between VFP and Neon turns out to belong to Neon. Perform
841 architecture check and fill in condition field if appropriate.
842 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
843 (do_neon_cvt): Add support for VFP variants of instructions.
844 (neon_cvt_flavour): Extend to cover VFP conversions.
845 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
846 vmov variants.
847 (do_neon_ldr_str): Handle single-precision VFP load/store.
848 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
849 NS_NULL not NS_IGNORE.
850 (opcode_tag): Add OT_csuffixF for operands which either take a
851 conditional suffix, or have 0xF in the condition field.
852 (md_assemble): Add support for OT_csuffixF.
853 (NCE): Replace macro with...
854 (NCE_tag, NCE, NCEF): New macros.
855 (nCE): Replace macro with...
856 (nCE_tag, nCE, nCEF): New macros.
857 (insns): Add support for VFP insns or VFP versions of insns msr,
858 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
859 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
860 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
861 VFP/Neon insns together.
862
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8632006-06-07 Alan Modra <amodra@bigpond.net.au>
864 Ladislav Michl <ladis@linux-mips.org>
865
866 * app.c: Don't include headers already included by as.h.
867 * as.c: Likewise.
868 * atof-generic.c: Likewise.
869 * cgen.c: Likewise.
870 * dwarf2dbg.c: Likewise.
871 * expr.c: Likewise.
872 * input-file.c: Likewise.
873 * input-scrub.c: Likewise.
874 * macro.c: Likewise.
875 * output-file.c: Likewise.
876 * read.c: Likewise.
877 * sb.c: Likewise.
878 * config/bfin-lex.l: Likewise.
879 * config/obj-coff.h: Likewise.
880 * config/obj-elf.h: Likewise.
881 * config/obj-som.h: Likewise.
882 * config/tc-arc.c: Likewise.
883 * config/tc-arm.c: Likewise.
884 * config/tc-avr.c: Likewise.
885 * config/tc-bfin.c: Likewise.
886 * config/tc-cris.c: Likewise.
887 * config/tc-d10v.c: Likewise.
888 * config/tc-d30v.c: Likewise.
889 * config/tc-dlx.h: Likewise.
890 * config/tc-fr30.c: Likewise.
891 * config/tc-frv.c: Likewise.
892 * config/tc-h8300.c: Likewise.
893 * config/tc-hppa.c: Likewise.
894 * config/tc-i370.c: Likewise.
895 * config/tc-i860.c: Likewise.
896 * config/tc-i960.c: Likewise.
897 * config/tc-ip2k.c: Likewise.
898 * config/tc-iq2000.c: Likewise.
899 * config/tc-m32c.c: Likewise.
900 * config/tc-m32r.c: Likewise.
901 * config/tc-maxq.c: Likewise.
902 * config/tc-mcore.c: Likewise.
903 * config/tc-mips.c: Likewise.
904 * config/tc-mmix.c: Likewise.
905 * config/tc-mn10200.c: Likewise.
906 * config/tc-mn10300.c: Likewise.
907 * config/tc-msp430.c: Likewise.
908 * config/tc-mt.c: Likewise.
909 * config/tc-ns32k.c: Likewise.
910 * config/tc-openrisc.c: Likewise.
911 * config/tc-ppc.c: Likewise.
912 * config/tc-s390.c: Likewise.
913 * config/tc-sh.c: Likewise.
914 * config/tc-sh64.c: Likewise.
915 * config/tc-sparc.c: Likewise.
916 * config/tc-tic30.c: Likewise.
917 * config/tc-tic4x.c: Likewise.
918 * config/tc-tic54x.c: Likewise.
919 * config/tc-v850.c: Likewise.
920 * config/tc-vax.c: Likewise.
921 * config/tc-xc16x.c: Likewise.
922 * config/tc-xstormy16.c: Likewise.
923 * config/tc-xtensa.c: Likewise.
924 * config/tc-z80.c: Likewise.
925 * config/tc-z8k.c: Likewise.
926 * macro.h: Don't include sb.h or ansidecl.h.
927 * sb.h: Don't include stdio.h or ansidecl.h.
928 * cond.c: Include sb.h.
929 * itbl-lex.l: Include as.h instead of other system headers.
930 * itbl-parse.y: Likewise.
931 * itbl-ops.c: Similarly.
932 * itbl-ops.h: Don't include as.h or ansidecl.h.
933 * config/bfin-defs.h: Don't include bfd.h or as.h.
934 * config/bfin-parse.y: Include as.h instead of other system headers.
935
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9362006-06-06 Ben Elliston <bje@au.ibm.com>
937 Anton Blanchard <anton@samba.org>
938
939 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
940 (md_show_usage): Document it.
941 (ppc_setup_opcodes): Test power6 opcode flag bits.
942 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
943
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TS
9442006-06-06 Thiemo Seufer <ths@mips.com>
945 Chao-ying Fu <fu@mips.com>
946
947 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
948 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
949 (macro_build): Update comment.
950 (mips_ip): Allow DSP64 instructions for MIPS64R2.
951 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
952 CPU_HAS_MDMX.
953 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
954 MIPS_CPU_ASE_MDMX flags for sb1.
955
a9e24354
TS
9562006-06-05 Thiemo Seufer <ths@mips.com>
957
958 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
959 appropriate.
960 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
961 (mips_ip): Make overflowed/underflowed constant arguments in DSP
962 and MT instructions a fatal error. Use INSERT_OPERAND where
963 appropriate. Improve warnings for break and wait code overflows.
964 Use symbolic constant of OP_MASK_COPZ.
965 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
966
4cfe2c59
DJ
9672006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
968
969 * po/Make-in (top_builddir): Define.
970
e10fad12
JM
9712006-06-02 Joseph S. Myers <joseph@codesourcery.com>
972
973 * doc/Makefile.am (TEXI2DVI): Define.
974 * doc/Makefile.in: Regenerate.
975 * doc/c-arc.texi: Fix typo.
976
12e64c2c
AM
9772006-06-01 Alan Modra <amodra@bigpond.net.au>
978
979 * config/obj-ieee.c: Delete.
980 * config/obj-ieee.h: Delete.
981 * Makefile.am (OBJ_FORMATS): Remove ieee.
982 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
983 (obj-ieee.o): Remove rule.
984 * Makefile.in: Regenerate.
985 * configure.in (atof): Remove tahoe.
986 (OBJ_MAYBE_IEEE): Don't define.
987 * configure: Regenerate.
988 * config.in: Regenerate.
989 * doc/Makefile.in: Regenerate.
990 * po/POTFILES.in: Regenerate.
991
20e95c23
DJ
9922006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
993
994 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
995 and LIBINTL_DEP everywhere.
996 (INTLLIBS): Remove.
997 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
998 * acinclude.m4: Include new gettext macros.
999 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1000 Remove local code for po/Makefile.
1001 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1002
eebf07fb
NC
10032006-05-30 Nick Clifton <nickc@redhat.com>
1004
1005 * po/es.po: Updated Spanish translation.
1006
b6aee19e
DC
10072006-05-06 Denis Chertykov <denisc@overta.ru>
1008
1009 * doc/c-avr.texi: New file.
1010 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1011 * doc/all.texi: Set AVR
1012 * doc/as.texinfo: Include c-avr.texi
1013
f8fdc850 10142006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1015
f8fdc850
JZ
1016 * config/bfin-parse.y (check_macfunc): Loose the condition of
1017 calling check_multiply_halfregs ().
1018
a3205465
JZ
10192006-05-25 Jie Zhang <jie.zhang@analog.com>
1020
1021 * config/bfin-parse.y (asm_1): Better check and deal with
1022 vector and scalar Multiply 16-Bit Operands instructions.
1023
9b52905e
NC
10242006-05-24 Nick Clifton <nickc@redhat.com>
1025
1026 * config/tc-hppa.c: Convert to ISO C90 format.
1027 * config/tc-hppa.h: Likewise.
1028
10292006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1030 Randolph Chung <randolph@tausq.org>
a70ae331 1031
9b52905e
NC
1032 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1033 is_tls_ieoff, is_tls_leoff): Define.
1034 (fix_new_hppa): Handle TLS.
1035 (cons_fix_new_hppa): Likewise.
1036 (pa_ip): Likewise.
1037 (md_apply_fix): Handle TLS relocs.
1038 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1039
a70ae331 10402006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1041
1042 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1043
ad3fea08
TS
10442006-05-23 Thiemo Seufer <ths@mips.com>
1045 David Ung <davidu@mips.com>
1046 Nigel Stephens <nigel@mips.com>
1047
1048 [ gas/ChangeLog ]
1049 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1050 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1051 ISA_HAS_MXHC1): New macros.
1052 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1053 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1054 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1055 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1056 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1057 (mips_after_parse_args): Change default handling of float register
1058 size to account for 32bit code with 64bit FP. Better sanity checking
1059 of ISA/ASE/ABI option combinations.
1060 (s_mipsset): Support switching of GPR and FPR sizes via
1061 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1062 options.
1063 (mips_elf_final_processing): We should record the use of 64bit FP
1064 registers in 32bit code but we don't, because ELF header flags are
1065 a scarce ressource.
1066 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1067 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1068 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1069 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1070 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1071 missing -march options. Document .set arch=CPU. Move .set smartmips
1072 to ASE page. Use @code for .set FOO examples.
1073
8b64503a
JZ
10742006-05-23 Jie Zhang <jie.zhang@analog.com>
1075
1076 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1077 if needed.
1078
403022e0
JZ
10792006-05-23 Jie Zhang <jie.zhang@analog.com>
1080
1081 * config/bfin-defs.h (bfin_equals): Remove declaration.
1082 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1083 * config/tc-bfin.c (bfin_name_is_register): Remove.
1084 (bfin_equals): Remove.
1085 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1086 (bfin_name_is_register): Remove declaration.
1087
7455baf8
TS
10882006-05-19 Thiemo Seufer <ths@mips.com>
1089 Nigel Stephens <nigel@mips.com>
1090
1091 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1092 (mips_oddfpreg_ok): New function.
1093 (mips_ip): Use it.
1094
707bfff6
TS
10952006-05-19 Thiemo Seufer <ths@mips.com>
1096 David Ung <davidu@mips.com>
1097
1098 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1099 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1100 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1101 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1102 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1103 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1104 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1105 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1106 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1107 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1108 reg_names_o32, reg_names_n32n64): Define register classes.
1109 (reg_lookup): New function, use register classes.
1110 (md_begin): Reserve register names in the symbol table. Simplify
1111 OBJ_ELF defines.
1112 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1113 Use reg_lookup.
1114 (mips16_ip): Use reg_lookup.
1115 (tc_get_register): Likewise.
1116 (tc_mips_regname_to_dw2regnum): New function.
1117
1df69f4f
TS
11182006-05-19 Thiemo Seufer <ths@mips.com>
1119
1120 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1121 Un-constify string argument.
1122 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1123 Likewise.
1124 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1125 Likewise.
1126 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1127 Likewise.
1128 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1129 Likewise.
1130 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1131 Likewise.
1132 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1133 Likewise.
1134
377260ba
NS
11352006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1136
1137 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1138 cfloat/m68881 to correct architecture before using it.
1139
cce7653b
NC
11402006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1141
a70ae331 1142 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1143 constant values.
1144
b0796911
PB
11452006-05-15 Paul Brook <paul@codesourcery.com>
1146
1147 * config/tc-arm.c (arm_adjust_symtab): Use
1148 bfd_is_arm_special_symbol_name.
1149
64b607e6
BW
11502006-05-15 Bob Wilson <bob.wilson@acm.org>
1151
1152 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1153 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1154 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1155 Handle errors from calls to xtensa_opcode_is_* functions.
1156
9b3f89ee
TS
11572006-05-14 Thiemo Seufer <ths@mips.com>
1158
1159 * config/tc-mips.c (macro_build): Test for currently active
1160 mips16 option.
1161 (mips16_ip): Reject invalid opcodes.
1162
370b66a1
CD
11632006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1164
1165 * doc/as.texinfo: Rename "Index" to "AS Index",
1166 and "ABORT" to "ABORT (COFF)".
1167
b6895b4f
PB
11682006-05-11 Paul Brook <paul@codesourcery.com>
1169
1170 * config/tc-arm.c (parse_half): New function.
1171 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1172 (parse_operands): Ditto.
1173 (do_mov16): Reject invalid relocations.
1174 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1175 (insns): Replace Iffff with HALF.
1176 (md_apply_fix): Add MOVW and MOVT relocs.
1177 (tc_gen_reloc): Ditto.
1178 * doc/c-arm.texi: Document relocation operators
1179
e28387c3
PB
11802006-05-11 Paul Brook <paul@codesourcery.com>
1181
1182 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1183
89ee2ebe
TS
11842006-05-11 Thiemo Seufer <ths@mips.com>
1185
1186 * config/tc-mips.c (append_insn): Don't check the range of j or
1187 jal addresses.
1188
53baae48
NC
11892006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1190
1191 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1192 relocs against external symbols for WinCE targets.
53baae48
NC
1193 (md_apply_fix): Likewise.
1194
4e2a74a8
TS
11952006-05-09 David Ung <davidu@mips.com>
1196
1197 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1198 j or jal address.
1199
337ff0a5
NC
12002006-05-09 Nick Clifton <nickc@redhat.com>
1201
1202 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1203 against symbols which are not going to be placed into the symbol
1204 table.
1205
8c9f705e
BE
12062006-05-09 Ben Elliston <bje@au.ibm.com>
1207
1208 * expr.c (operand): Remove `if (0 && ..)' statement and
1209 subsequently unused target_op label. Collapse `if (1 || ..)'
1210 statement.
1211 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1212 separately above the switch.
1213
2fd0d2ac
NC
12142006-05-08 Nick Clifton <nickc@redhat.com>
1215
1216 PR gas/2623
1217 * config/tc-msp430.c (line_separator_character): Define as |.
1218
e16bfa71
TS
12192006-05-08 Thiemo Seufer <ths@mips.com>
1220 Nigel Stephens <nigel@mips.com>
1221 David Ung <davidu@mips.com>
1222
1223 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1224 (mips_opts): Likewise.
1225 (file_ase_smartmips): New variable.
1226 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1227 (macro_build): Handle SmartMIPS instructions.
1228 (mips_ip): Likewise.
1229 (md_longopts): Add argument handling for smartmips.
1230 (md_parse_options, mips_after_parse_args): Likewise.
1231 (s_mipsset): Add .set smartmips support.
1232 (md_show_usage): Document -msmartmips/-mno-smartmips.
1233 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1234 .set smartmips.
1235 * doc/c-mips.texi: Likewise.
1236
32638454
AM
12372006-05-08 Alan Modra <amodra@bigpond.net.au>
1238
1239 * write.c (relax_segment): Add pass count arg. Don't error on
1240 negative org/space on first two passes.
1241 (relax_seg_info): New struct.
1242 (relax_seg, write_object_file): Adjust.
1243 * write.h (relax_segment): Update prototype.
1244
b7fc2769
JB
12452006-05-05 Julian Brown <julian@codesourcery.com>
1246
1247 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1248 checking.
1249 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1250 architecture version checks.
1251 (insns): Allow overlapping instructions to be used in VFP mode.
1252
7f841127
L
12532006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1254
1255 PR gas/2598
1256 * config/obj-elf.c (obj_elf_change_section): Allow user
1257 specified SHF_ALPHA_GPREL.
1258
73160847
NC
12592006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1260
1261 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1262 for PMEM related expressions.
1263
56487c55
NC
12642006-05-05 Nick Clifton <nickc@redhat.com>
1265
1266 PR gas/2582
1267 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1268 insertion of a directory separator character into a string at a
1269 given offset. Uses heuristics to decide when to use a backslash
1270 character rather than a forward-slash character.
1271 (dwarf2_directive_loc): Use the macro.
1272 (out_debug_info): Likewise.
1273
d43b4baf
TS
12742006-05-05 Thiemo Seufer <ths@mips.com>
1275 David Ung <davidu@mips.com>
1276
1277 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1278 instruction.
1279 (macro): Add new case M_CACHE_AB.
1280
088fa78e
KH
12812006-05-04 Kazu Hirata <kazu@codesourcery.com>
1282
1283 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1284 (opcode_lookup): Issue a warning for opcode with
1285 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1286 identical to OT_cinfix3.
1287 (TxC3w, TC3w, tC3w): New.
1288 (insns): Use tC3w and TC3w for comparison instructions with
1289 's' suffix.
1290
c9049d30
AM
12912006-05-04 Alan Modra <amodra@bigpond.net.au>
1292
1293 * subsegs.h (struct frchain): Delete frch_seg.
1294 (frchain_root): Delete.
1295 (seg_info): Define as macro.
1296 * subsegs.c (frchain_root): Delete.
1297 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1298 (subsegs_begin, subseg_change): Adjust for above.
1299 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1300 rather than to one big list.
1301 (subseg_get): Don't special case abs, und sections.
1302 (subseg_new, subseg_force_new): Don't set frchainP here.
1303 (seg_info): Delete.
1304 (subsegs_print_statistics): Adjust frag chain control list traversal.
1305 * debug.c (dmp_frags): Likewise.
1306 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1307 at frchain_root. Make use of known frchain ordering.
1308 (last_frag_for_seg): Likewise.
1309 (get_frag_fix): Likewise. Add seg param.
1310 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1311 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1312 (SUB_SEGMENT_ALIGN): Likewise.
1313 (subsegs_finish): Adjust frchain list traversal.
1314 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1315 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1316 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1317 (xtensa_fix_b_j_loop_end_frags): Likewise.
1318 (xtensa_fix_close_loop_end_frags): Likewise.
1319 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1320 (retrieve_segment_info): Delete frch_seg initialisation.
1321
f592407e
AM
13222006-05-03 Alan Modra <amodra@bigpond.net.au>
1323
1324 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1325 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1326 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1327 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1328
df7849c5
JM
13292006-05-02 Joseph Myers <joseph@codesourcery.com>
1330
1331 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1332 here.
1333 (md_apply_fix3): Multiply offset by 4 here for
1334 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1335
2d545b82
L
13362006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1337 Jan Beulich <jbeulich@novell.com>
1338
1339 * config/tc-i386.c (output_invalid_buf): Change size for
1340 unsigned char.
1341 * config/tc-tic30.c (output_invalid_buf): Likewise.
1342
1343 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1344 unsigned char.
1345 * config/tc-tic30.c (output_invalid): Likewise.
1346
38fc1cb1
DJ
13472006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1348
1349 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1350 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1351 (asconfig.texi): Don't set top_srcdir.
1352 * doc/as.texinfo: Don't use top_srcdir.
1353 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1354
2d545b82
L
13552006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1356
1357 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1358 * config/tc-tic30.c (output_invalid_buf): Likewise.
1359
1360 * config/tc-i386.c (output_invalid): Use snprintf instead of
1361 sprintf.
1362 * config/tc-ia64.c (declare_register_set): Likewise.
1363 (emit_one_bundle): Likewise.
1364 (check_dependencies): Likewise.
1365 * config/tc-tic30.c (output_invalid): Likewise.
1366
a8bc6c78
PB
13672006-05-02 Paul Brook <paul@codesourcery.com>
1368
1369 * config/tc-arm.c (arm_optimize_expr): New function.
1370 * config/tc-arm.h (md_optimize_expr): Define
1371 (arm_optimize_expr): Add prototype.
1372 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1373
58633d9a
BE
13742006-05-02 Ben Elliston <bje@au.ibm.com>
1375
22772e33
BE
1376 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1377 field unsigned.
1378
58633d9a
BE
1379 * sb.h (sb_list_vector): Move to sb.c.
1380 * sb.c (free_list): Use type of sb_list_vector directly.
1381 (sb_build): Fix off-by-one error in assertion about `size'.
1382
89cdfe57
BE
13832006-05-01 Ben Elliston <bje@au.ibm.com>
1384
1385 * listing.c (listing_listing): Remove useless loop.
1386 * macro.c (macro_expand): Remove is_positional local variable.
1387 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1388 and simplify surrounding expressions, where possible.
1389 (assign_symbol): Likewise.
1390 (s_weakref): Likewise.
1391 * symbols.c (colon): Likewise.
1392
c35da140
AM
13932006-05-01 James Lemke <jwlemke@wasabisystems.com>
1394
1395 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1396
9bcd4f99
TS
13972006-04-30 Thiemo Seufer <ths@mips.com>
1398 David Ung <davidu@mips.com>
1399
1400 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1401 (mips_immed): New table that records various handling of udi
1402 instruction patterns.
1403 (mips_ip): Adds udi handling.
1404
001ae1a4
AM
14052006-04-28 Alan Modra <amodra@bigpond.net.au>
1406
1407 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1408 of list rather than beginning.
1409
136da414
JB
14102006-04-26 Julian Brown <julian@codesourcery.com>
1411
1412 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1413 (is_quarter_float): Rename from above. Simplify slightly.
1414 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1415 number.
1416 (parse_neon_mov): Parse floating-point constants.
1417 (neon_qfloat_bits): Fix encoding.
1418 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1419 preference to integer encoding when using the F32 type.
1420
dcbf9037
JB
14212006-04-26 Julian Brown <julian@codesourcery.com>
1422
1423 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1424 zero-initialising structures containing it will lead to invalid types).
1425 (arm_it): Add vectype to each operand.
1426 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1427 defined field.
1428 (neon_typed_alias): New structure. Extra information for typed
1429 register aliases.
1430 (reg_entry): Add neon type info field.
1431 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1432 Break out alternative syntax for coprocessor registers, etc. into...
1433 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1434 out from arm_reg_parse.
1435 (parse_neon_type): Move. Return SUCCESS/FAIL.
1436 (first_error): New function. Call to ensure first error which occurs is
1437 reported.
1438 (parse_neon_operand_type): Parse exactly one type.
1439 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1440 (parse_typed_reg_or_scalar): New function. Handle core of both
1441 arm_typed_reg_parse and parse_scalar.
1442 (arm_typed_reg_parse): Parse a register with an optional type.
1443 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1444 result.
1445 (parse_scalar): Parse a Neon scalar with optional type.
1446 (parse_reg_list): Use first_error.
1447 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1448 (neon_alias_types_same): New function. Return true if two (alias) types
1449 are the same.
1450 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1451 of elements.
1452 (insert_reg_alias): Return new reg_entry not void.
1453 (insert_neon_reg_alias): New function. Insert type/index information as
1454 well as register for alias.
1455 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1456 make typed register aliases accordingly.
1457 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1458 of line.
1459 (s_unreq): Delete type information if present.
1460 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1461 (s_arm_unwind_save_mmxwcg): Likewise.
1462 (s_arm_unwind_movsp): Likewise.
1463 (s_arm_unwind_setfp): Likewise.
1464 (parse_shift): Likewise.
1465 (parse_shifter_operand): Likewise.
1466 (parse_address): Likewise.
1467 (parse_tb): Likewise.
1468 (tc_arm_regname_to_dw2regnum): Likewise.
1469 (md_pseudo_table): Add dn, qn.
1470 (parse_neon_mov): Handle typed operands.
1471 (parse_operands): Likewise.
1472 (neon_type_mask): Add N_SIZ.
1473 (N_ALLMODS): New macro.
1474 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1475 (el_type_of_type_chk): Add some safeguards.
1476 (modify_types_allowed): Fix logic bug.
1477 (neon_check_type): Handle operands with types.
1478 (neon_three_same): Remove redundant optional arg handling.
1479 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1480 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1481 (do_neon_step): Adjust accordingly.
1482 (neon_cmode_for_logic_imm): Use first_error.
1483 (do_neon_bitfield): Call neon_check_type.
1484 (neon_dyadic): Rename to...
1485 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1486 to allow modification of type of the destination.
1487 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1488 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1489 (do_neon_compare): Make destination be an untyped bitfield.
1490 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1491 (neon_mul_mac): Return early in case of errors.
1492 (neon_move_immediate): Use first_error.
1493 (neon_mac_reg_scalar_long): Fix type to include scalar.
1494 (do_neon_dup): Likewise.
1495 (do_neon_mov): Likewise (in several places).
1496 (do_neon_tbl_tbx): Fix type.
1497 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1498 (do_neon_ld_dup): Exit early in case of errors and/or use
1499 first_error.
1500 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1501 Handle .dn/.qn directives.
1502 (REGDEF): Add zero for reg_entry neon field.
1503
5287ad62
JB
15042006-04-26 Julian Brown <julian@codesourcery.com>
1505
1506 * config/tc-arm.c (limits.h): Include.
1507 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1508 (fpu_vfp_v3_or_neon_ext): Declare constants.
1509 (neon_el_type): New enumeration of types for Neon vector elements.
1510 (neon_type_el): New struct. Define type and size of a vector element.
1511 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1512 instruction.
1513 (neon_type): Define struct. The type of an instruction.
1514 (arm_it): Add 'vectype' for the current instruction.
1515 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1516 (vfp_sp_reg_pos): Rename to...
1517 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1518 tags.
1519 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1520 (Neon D or Q register).
1521 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1522 register.
1523 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1524 (my_get_expression): Allow above constant as argument to accept
1525 64-bit constants with optional prefix.
1526 (arm_reg_parse): Add extra argument to return the specific type of
1527 register in when either a D or Q register (REG_TYPE_NDQ) is
1528 requested. Can be NULL.
1529 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1530 (parse_reg_list): Update for new arm_reg_parse args.
1531 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1532 (parse_neon_el_struct_list): New function. Parse element/structure
1533 register lists for VLD<n>/VST<n> instructions.
1534 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1535 (s_arm_unwind_save_mmxwr): Likewise.
1536 (s_arm_unwind_save_mmxwcg): Likewise.
1537 (s_arm_unwind_movsp): Likewise.
1538 (s_arm_unwind_setfp): Likewise.
1539 (parse_big_immediate): New function. Parse an immediate, which may be
1540 64 bits wide. Put results in inst.operands[i].
1541 (parse_shift): Update for new arm_reg_parse args.
1542 (parse_address): Likewise. Add parsing of alignment specifiers.
1543 (parse_neon_mov): Parse the operands of a VMOV instruction.
1544 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1545 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1546 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1547 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1548 (parse_operands): Handle new codes above.
1549 (encode_arm_vfp_sp_reg): Rename to...
1550 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1551 selected VFP version only supports D0-D15.
1552 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1553 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1554 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1555 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1556 encode_arm_vfp_reg name, and allow 32 D regs.
1557 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1558 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1559 regs.
1560 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1561 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1562 constant-load and conversion insns introduced with VFPv3.
1563 (neon_tab_entry): New struct.
1564 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1565 those which are the targets of pseudo-instructions.
1566 (neon_opc): Enumerate opcodes, use as indices into...
1567 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1568 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1569 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1570 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1571 neon_enc_tab.
1572 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1573 Neon instructions.
1574 (neon_type_mask): New. Compact type representation for type checking.
1575 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1576 permitted type combinations.
1577 (N_IGNORE_TYPE): New macro.
1578 (neon_check_shape): New function. Check an instruction shape for
1579 multiple alternatives. Return the specific shape for the current
1580 instruction.
1581 (neon_modify_type_size): New function. Modify a vector type and size,
1582 depending on the bit mask in argument 1.
1583 (neon_type_promote): New function. Convert a given "key" type (of an
1584 operand) into the correct type for a different operand, based on a bit
1585 mask.
1586 (type_chk_of_el_type): New function. Convert a type and size into the
1587 compact representation used for type checking.
1588 (el_type_of_type_ckh): New function. Reverse of above (only when a
1589 single bit is set in the bit mask).
1590 (modify_types_allowed): New function. Alter a mask of allowed types
1591 based on a bit mask of modifications.
1592 (neon_check_type): New function. Check the type of the current
1593 instruction against the variable argument list. The "key" type of the
1594 instruction is returned.
1595 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1596 a Neon data-processing instruction depending on whether we're in ARM
1597 mode or Thumb-2 mode.
1598 (neon_logbits): New function.
1599 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1600 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1601 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1602 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1603 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1604 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1605 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1606 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1607 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1608 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1609 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1610 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1611 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1612 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1613 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1614 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1615 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1616 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1617 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1618 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1619 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1620 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1621 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1622 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1623 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1624 helpers.
1625 (parse_neon_type): New function. Parse Neon type specifier.
1626 (opcode_lookup): Allow parsing of Neon type specifiers.
1627 (REGNUM2, REGSETH, REGSET2): New macros.
1628 (reg_names): Add new VFPv3 and Neon registers.
1629 (NUF, nUF, NCE, nCE): New macros for opcode table.
1630 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1631 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1632 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1633 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1634 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1635 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1636 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1637 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1638 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1639 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1640 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1641 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1642 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1643 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1644 fto[us][lh][sd].
1645 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1646 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1647 (arm_option_cpu_value): Add vfp3 and neon.
1648 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1649 VFPv1 attribute.
1650
1946c96e
BW
16512006-04-25 Bob Wilson <bob.wilson@acm.org>
1652
1653 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1654 syntax instead of hardcoded opcodes with ".w18" suffixes.
1655 (wide_branch_opcode): New.
1656 (build_transition): Use it to check for wide branch opcodes with
1657 either ".w18" or ".w15" suffixes.
1658
5033a645
BW
16592006-04-25 Bob Wilson <bob.wilson@acm.org>
1660
1661 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1662 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1663 frag's is_literal flag.
1664
395fa56f
BW
16652006-04-25 Bob Wilson <bob.wilson@acm.org>
1666
1667 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1668
708587a4
KH
16692006-04-23 Kazu Hirata <kazu@codesourcery.com>
1670
1671 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1672 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1673 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1674 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1675 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1676
8463be01
PB
16772005-04-20 Paul Brook <paul@codesourcery.com>
1678
1679 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1680 all targets.
1681 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1682
f26a5955
AM
16832006-04-19 Alan Modra <amodra@bigpond.net.au>
1684
1685 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1686 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1687 Make some cpus unsupported on ELF. Run "make dep-am".
1688 * Makefile.in: Regenerate.
1689
241a6c40
AM
16902006-04-19 Alan Modra <amodra@bigpond.net.au>
1691
1692 * configure.in (--enable-targets): Indent help message.
1693 * configure: Regenerate.
1694
bb8f5920
L
16952006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1696
1697 PR gas/2533
1698 * config/tc-i386.c (i386_immediate): Check illegal immediate
1699 register operand.
1700
23d9d9de
AM
17012006-04-18 Alan Modra <amodra@bigpond.net.au>
1702
64e74474
AM
1703 * config/tc-i386.c: Formatting.
1704 (output_disp, output_imm): ISO C90 params.
1705
6cbe03fb
AM
1706 * frags.c (frag_offset_fixed_p): Constify args.
1707 * frags.h (frag_offset_fixed_p): Ditto.
1708
23d9d9de
AM
1709 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1710 (COFF_MAGIC): Delete.
a37d486e
AM
1711
1712 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1713
e7403566
DJ
17142006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1715
1716 * po/POTFILES.in: Regenerated.
1717
58ab4f3d
MM
17182006-04-16 Mark Mitchell <mark@codesourcery.com>
1719
1720 * doc/as.texinfo: Mention that some .type syntaxes are not
1721 supported on all architectures.
1722
482fd9f9
BW
17232006-04-14 Sterling Augustine <sterling@tensilica.com>
1724
1725 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1726 instructions when such transformations have been disabled.
1727
05d58145
BW
17282006-04-10 Sterling Augustine <sterling@tensilica.com>
1729
1730 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1731 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1732 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1733 decoding the loop instructions. Remove current_offset variable.
1734 (xtensa_fix_short_loop_frags): Likewise.
1735 (min_bytes_to_other_loop_end): Remove current_offset argument.
1736
9e75b3fa
AM
17372006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1738
a37d486e 1739 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1740 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1741
d727e8c2
NC
17422006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1743
1744 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1745 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1746 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1747 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1748 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1749 at90can64, at90usb646, at90usb647, at90usb1286 and
1750 at90usb1287.
1751 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1752
d252fdde
PB
17532006-04-07 Paul Brook <paul@codesourcery.com>
1754
1755 * config/tc-arm.c (parse_operands): Set default error message.
1756
ab1eb5fe
PB
17572006-04-07 Paul Brook <paul@codesourcery.com>
1758
1759 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1760
7ae2971b
PB
17612006-04-07 Paul Brook <paul@codesourcery.com>
1762
1763 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1764
53365c0d
PB
17652006-04-07 Paul Brook <paul@codesourcery.com>
1766
1767 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1768 (move_or_literal_pool): Handle Thumb-2 instructions.
1769 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1770
45aa61fe
AM
17712006-04-07 Alan Modra <amodra@bigpond.net.au>
1772
1773 PR 2512.
1774 * config/tc-i386.c (match_template): Move 64-bit operand tests
1775 inside loop.
1776
108a6f8e
CD
17772006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1778
1779 * po/Make-in: Add install-html target.
1780 * Makefile.am: Add install-html and install-html-recursive targets.
1781 * Makefile.in: Regenerate.
1782 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1783 * configure: Regenerate.
1784 * doc/Makefile.am: Add install-html and install-html-am targets.
1785 * doc/Makefile.in: Regenerate.
1786
ec651a3b
AM
17872006-04-06 Alan Modra <amodra@bigpond.net.au>
1788
1789 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1790 second scan.
1791
910600e9
RS
17922006-04-05 Richard Sandiford <richard@codesourcery.com>
1793 Daniel Jacobowitz <dan@codesourcery.com>
1794
1795 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1796 (GOTT_BASE, GOTT_INDEX): New.
1797 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1798 GOTT_INDEX when generating VxWorks PIC.
1799 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1800 use the generic *-*-vxworks* stanza instead.
1801
99630778
AM
18022006-04-04 Alan Modra <amodra@bigpond.net.au>
1803
1804 PR 997
1805 * frags.c (frag_offset_fixed_p): New function.
1806 * frags.h (frag_offset_fixed_p): Declare.
1807 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1808 (resolve_expression): Likewise.
1809
a02728c8
BW
18102006-04-03 Sterling Augustine <sterling@tensilica.com>
1811
1812 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1813 of the same length but different numbers of slots.
1814
9dfde49d
AS
18152006-03-30 Andreas Schwab <schwab@suse.de>
1816
1817 * configure.in: Fix help string for --enable-targets option.
1818 * configure: Regenerate.
1819
2da12c60
NS
18202006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1821
6d89cc8f
NS
1822 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1823 (m68k_ip): ... here. Use for all chips. Protect against buffer
1824 overrun and avoid excessive copying.
1825
2da12c60
NS
1826 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1827 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1828 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1829 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1830 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1831 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1832 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1833 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1834 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1835 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1836 (struct m68k_cpu): Change chip field to control_regs.
1837 (current_chip): Remove.
1838 (control_regs): New.
1839 (m68k_archs, m68k_extensions): Adjust.
1840 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1841 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1842 (find_cf_chip): Reimplement for new organization of cpu table.
1843 (select_control_regs): Remove.
1844 (mri_chip): Adjust.
1845 (struct save_opts): Save control regs, not chip.
1846 (s_save, s_restore): Adjust.
1847 (m68k_lookup_cpu): Give deprecated warning when necessary.
1848 (m68k_init_arch): Adjust.
1849 (md_show_usage): Adjust for new cpu table organization.
1850
1ac4baed
BS
18512006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1852
1853 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1854 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1855 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1856 "elf/bfin.h".
1857 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1858 (any_gotrel): New rule.
1859 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1860 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1861 "elf/bfin.h".
1862 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1863 (bfin_pic_ptr): New function.
1864 (md_pseudo_table): Add it for ".picptr".
1865 (OPTION_FDPIC): New macro.
1866 (md_longopts): Add -mfdpic.
1867 (md_parse_option): Handle it.
1868 (md_begin): Set BFD flags.
1869 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1870 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1871 us for GOT relocs.
1872 * Makefile.am (bfin-parse.o): Update dependencies.
1873 (DEPTC_bfin_elf): Likewise.
1874 * Makefile.in: Regenerate.
1875
a9d34880
RS
18762006-03-25 Richard Sandiford <richard@codesourcery.com>
1877
1878 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1879 mcfemac instead of mcfmac.
1880
9ca26584
AJ
18812006-03-23 Michael Matz <matz@suse.de>
1882
1883 * config/tc-i386.c (type_names): Correct placement of 'static'.
1884 (reloc): Map some more relocs to their 64 bit counterpart when
1885 size is 8.
1886 (output_insn): Work around breakage if DEBUG386 is defined.
1887 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1888 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1889 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1890 different from i386.
1891 (output_imm): Ditto.
1892 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1893 Imm64.
1894 (md_convert_frag): Jumps can now be larger than 2GB away, error
1895 out in that case.
1896 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1897 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1898
0a44bf69
RS
18992006-03-22 Richard Sandiford <richard@codesourcery.com>
1900 Daniel Jacobowitz <dan@codesourcery.com>
1901 Phil Edwards <phil@codesourcery.com>
1902 Zack Weinberg <zack@codesourcery.com>
1903 Mark Mitchell <mark@codesourcery.com>
1904 Nathan Sidwell <nathan@codesourcery.com>
1905
1906 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1907 (md_begin): Complain about -G being used for PIC. Don't change
1908 the text, data and bss alignments on VxWorks.
1909 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1910 generating VxWorks PIC.
1911 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1912 (macro): Likewise, but do not treat la $25 specially for
1913 VxWorks PIC, and do not handle jal.
1914 (OPTION_MVXWORKS_PIC): New macro.
1915 (md_longopts): Add -mvxworks-pic.
1916 (md_parse_option): Don't complain about using PIC and -G together here.
1917 Handle OPTION_MVXWORKS_PIC.
1918 (md_estimate_size_before_relax): Always use the first relaxation
1919 sequence on VxWorks.
1920 * config/tc-mips.h (VXWORKS_PIC): New.
1921
080eb7fe
PB
19222006-03-21 Paul Brook <paul@codesourcery.com>
1923
1924 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1925
03aaa593
BW
19262006-03-21 Sterling Augustine <sterling@tensilica.com>
1927
1928 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1929 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1930 (get_loop_align_size): New.
1931 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1932 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1933 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1934 (get_noop_aligned_address): Use get_loop_align_size.
1935 (get_aligned_diff): Likewise.
1936
3e94bf1a
PB
19372006-03-21 Paul Brook <paul@codesourcery.com>
1938
1939 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1940
dfa9f0d5
PB
19412006-03-20 Paul Brook <paul@codesourcery.com>
1942
1943 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1944 (do_t_branch): Encode branches inside IT blocks as unconditional.
1945 (do_t_cps): New function.
1946 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1947 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1948 (opcode_lookup): Allow conditional suffixes on all instructions in
1949 Thumb mode.
1950 (md_assemble): Advance condexec state before checking for errors.
1951 (insns): Use do_t_cps.
1952
6e1cb1a6
PB
19532006-03-20 Paul Brook <paul@codesourcery.com>
1954
1955 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1956 outputting the insn.
1957
0a966e2d
JBG
19582006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1959
1960 * config/tc-vax.c: Update copyright year.
1961 * config/tc-vax.h: Likewise.
1962
a49fcc17
JBG
19632006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1964
1965 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1966 make it static.
1967 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1968
f5208ef2
PB
19692006-03-17 Paul Brook <paul@codesourcery.com>
1970
1971 * config/tc-arm.c (insns): Add ldm and stm.
1972
cb4c78d6
BE
19732006-03-17 Ben Elliston <bje@au.ibm.com>
1974
1975 PR gas/2446
1976 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1977
c16d2bf0
PB
19782006-03-16 Paul Brook <paul@codesourcery.com>
1979
1980 * config/tc-arm.c (insns): Add "svc".
1981
80ca4e2c
BW
19822006-03-13 Bob Wilson <bob.wilson@acm.org>
1983
1984 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1985 flag and avoid double underscore prefixes.
1986
3a4a14e9
PB
19872006-03-10 Paul Brook <paul@codesourcery.com>
1988
1989 * config/tc-arm.c (md_begin): Handle EABIv5.
1990 (arm_eabis): Add EF_ARM_EABI_VER5.
1991 * doc/c-arm.texi: Document -meabi=5.
1992
518051dc
BE
19932006-03-10 Ben Elliston <bje@au.ibm.com>
1994
1995 * app.c (do_scrub_chars): Simplify string handling.
1996
00a97672
RS
19972006-03-07 Richard Sandiford <richard@codesourcery.com>
1998 Daniel Jacobowitz <dan@codesourcery.com>
1999 Zack Weinberg <zack@codesourcery.com>
2000 Nathan Sidwell <nathan@codesourcery.com>
2001 Paul Brook <paul@codesourcery.com>
2002 Ricardo Anguiano <anguiano@codesourcery.com>
2003 Phil Edwards <phil@codesourcery.com>
2004
2005 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2006 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2007 R_ARM_ABS12 reloc.
2008 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2009 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2010 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2011
b29757dc
BW
20122006-03-06 Bob Wilson <bob.wilson@acm.org>
2013
2014 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2015 even when using the text-section-literals option.
2016
0b2e31dc
NS
20172006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2018
2019 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2020 and cf.
2021 (m68k_ip): <case 'J'> Check we have some control regs.
2022 (md_parse_option): Allow raw arch switch.
2023 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2024 whether 68881 or cfloat was meant by -mfloat.
2025 (md_show_usage): Adjust extension display.
2026 (m68k_elf_final_processing): Adjust.
2027
df406460
NC
20282006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2029
2030 * config/tc-avr.c (avr_mod_hash_value): New function.
2031 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2032 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2033 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2034 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2035 of (int).
2036 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2037 fixups, abort otherwise.
df406460
NC
2038 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2039 tc_fix_adjustable): Define.
a70ae331 2040
53022e4a
JW
20412006-03-02 James E Wilson <wilson@specifix.com>
2042
2043 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2044 change the template, then clear md.slot[curr].end_of_insn_group.
2045
9f6f925e
JB
20462006-02-28 Jan Beulich <jbeulich@novell.com>
2047
2048 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2049
0e31b3e1
JB
20502006-02-28 Jan Beulich <jbeulich@novell.com>
2051
2052 PR/1070
2053 * macro.c (getstring): Don't treat parentheses special anymore.
2054 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2055 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2056 characters.
2057
10cd14b4
AM
20582006-02-28 Mat <mat@csail.mit.edu>
2059
2060 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2061
63752a75
JJ
20622006-02-27 Jakub Jelinek <jakub@redhat.com>
2063
2064 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2065 field.
2066 (CFI_signal_frame): Define.
2067 (cfi_pseudo_table): Add .cfi_signal_frame.
2068 (dot_cfi): Handle CFI_signal_frame.
2069 (output_cie): Handle cie->signal_frame.
2070 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2071 different. Copy signal_frame from FDE to newly created CIE.
2072 * doc/as.texinfo: Document .cfi_signal_frame.
2073
f7d9e5c3
CD
20742006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2075
2076 * doc/Makefile.am: Add html target.
2077 * doc/Makefile.in: Regenerate.
2078 * po/Make-in: Add html target.
2079
331d2d0d
L
20802006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2081
8502d882 2082 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2083 Instructions.
2084
8502d882 2085 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2086 (CpuUnknownFlags): Add CpuMNI.
2087
10156f83
DM
20882006-02-24 David S. Miller <davem@sunset.davemloft.net>
2089
2090 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2091 (hpriv_reg_table): New table for hyperprivileged registers.
2092 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2093 register encoding.
2094
6772dd07
DD
20952006-02-24 DJ Delorie <dj@redhat.com>
2096
2097 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2098 (tc_gen_reloc): Don't define.
2099 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2100 (OPTION_LINKRELAX): New.
2101 (md_longopts): Add it.
2102 (m32c_relax): New.
2103 (md_parse_options): Set it.
2104 (md_assemble): Emit relaxation relocs as needed.
2105 (md_convert_frag): Emit relaxation relocs as needed.
2106 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2107 (m32c_apply_fix): New.
2108 (tc_gen_reloc): New.
2109 (m32c_force_relocation): Force out jump relocs when relaxing.
2110 (m32c_fix_adjustable): Return false if relaxing.
2111
62b3e311
PB
21122006-02-24 Paul Brook <paul@codesourcery.com>
2113
2114 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2115 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2116 (struct asm_barrier_opt): Define.
2117 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2118 (parse_psr): Accept V7M psr names.
2119 (parse_barrier): New function.
2120 (enum operand_parse_code): Add OP_oBARRIER.
2121 (parse_operands): Implement OP_oBARRIER.
2122 (do_barrier): New function.
2123 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2124 (do_t_cpsi): Add V7M restrictions.
2125 (do_t_mrs, do_t_msr): Validate V7M variants.
2126 (md_assemble): Check for NULL variants.
2127 (v7m_psrs, barrier_opt_names): New tables.
2128 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2129 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2130 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2131 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2132 (struct cpu_arch_ver_table): Define.
2133 (cpu_arch_ver): New.
2134 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2135 Tag_CPU_arch_profile.
2136 * doc/c-arm.texi: Document new cpu and arch options.
2137
59cf82fe
L
21382006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2139
2140 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2141
19a7219f
L
21422006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2143
2144 * config/tc-ia64.c: Update copyright years.
2145
7f3dfb9c
L
21462006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2147
2148 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2149 SDM 2.2.
2150
f40d1643
PB
21512005-02-22 Paul Brook <paul@codesourcery.com>
2152
2153 * config/tc-arm.c (do_pld): Remove incorrect write to
2154 inst.instruction.
2155 (encode_thumb32_addr_mode): Use correct operand.
2156
216d22bc
PB
21572006-02-21 Paul Brook <paul@codesourcery.com>
2158
2159 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2160
d70c5fc7
NC
21612006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2162 Anil Paranjape <anilp1@kpitcummins.com>
2163 Shilin Shakti <shilins@kpitcummins.com>
2164
2165 * Makefile.am: Add xc16x related entry.
2166 * Makefile.in: Regenerate.
2167 * configure.in: Added xc16x related entry.
2168 * configure: Regenerate.
2169 * config/tc-xc16x.h: New file
2170 * config/tc-xc16x.c: New file
2171 * doc/c-xc16x.texi: New file for xc16x
2172 * doc/all.texi: Entry for xc16x
a70ae331 2173 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2174 * NEWS: Announce the support for the new target.
2175
aaa2ab3d
NH
21762006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2177
2178 * configure.tgt: set emulation for mips-*-netbsd*
2179
82de001f
JJ
21802006-02-14 Jakub Jelinek <jakub@redhat.com>
2181
2182 * config.in: Rebuilt.
2183
431ad2d0
BW
21842006-02-13 Bob Wilson <bob.wilson@acm.org>
2185
2186 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2187 from 1, not 0, in error messages.
2188 (md_assemble): Simplify special-case check for ENTRY instructions.
2189 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2190 operand in error message.
2191
94089a50
JM
21922006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2193
2194 * configure.tgt (arm-*-linux-gnueabi*): Change to
2195 arm-*-linux-*eabi*.
2196
52de4c06
NC
21972006-02-10 Nick Clifton <nickc@redhat.com>
2198
70e45ad9
NC
2199 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2200 32-bit value is propagated into the upper bits of a 64-bit long.
2201
52de4c06
NC
2202 * config/tc-arc.c (init_opcode_tables): Fix cast.
2203 (arc_extoper, md_operand): Likewise.
2204
21af2bbd
BW
22052006-02-09 David Heine <dlheine@tensilica.com>
2206
2207 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2208 each relaxation step.
2209
75a706fc 22102006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2211
75a706fc
L
2212 * configure.in (CHECK_DECLS): Add vsnprintf.
2213 * configure: Regenerate.
2214 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2215 include/declare here, but...
2216 * as.h: Move code detecting VARARGS idiom to the top.
2217 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2218 (vsnprintf): Declare if not already declared.
2219
0d474464
L
22202006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2221
2222 * as.c (close_output_file): New.
2223 (main): Register close_output_file with xatexit before
2224 dump_statistics. Don't call output_file_close.
2225
266abb8f
NS
22262006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2227
2228 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2229 mcf5329_control_regs): New.
2230 (not_current_architecture, selected_arch, selected_cpu): New.
2231 (m68k_archs, m68k_extensions): New.
2232 (archs): Renamed to ...
2233 (m68k_cpus): ... here. Adjust.
2234 (n_arches): Remove.
2235 (md_pseudo_table): Add arch and cpu directives.
2236 (find_cf_chip, m68k_ip): Adjust table scanning.
2237 (no_68851, no_68881): Remove.
2238 (md_assemble): Lazily initialize.
2239 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2240 (md_init_after_args): Move functionality to m68k_init_arch.
2241 (mri_chip): Adjust table scanning.
2242 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2243 options with saner parsing.
2244 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2245 m68k_init_arch): New.
2246 (s_m68k_cpu, s_m68k_arch): New.
2247 (md_show_usage): Adjust.
2248 (m68k_elf_final_processing): Set CF EF flags.
2249 * config/tc-m68k.h (m68k_init_after_args): Remove.
2250 (tc_init_after_args): Remove.
2251 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2252 (M68k-Directives): Document .arch and .cpu directives.
2253
134dcee5
AM
22542006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2255
a70ae331
AM
2256 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2257 synonyms for equ and defl.
134dcee5
AM
2258 (z80_cons_fix_new): New function.
2259 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2260 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2261 now handled as pseudo-op rather than an instruction.
2262 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2263 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2264 Add entries for def24,def32,d24,d32.
2265 (md_assemble): Improved error handling.
2266 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2267 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2268 (z80_cons_fix_new): Declare.
a70ae331 2269 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2270 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2271
a9931606
PB
22722006-02-02 Paul Brook <paul@codesourcery.com>
2273
2274 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2275
ef8d22e6
PB
22762005-02-02 Paul Brook <paul@codesourcery.com>
2277
2278 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2279 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2280 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2281 T2_OPCODE_RSB): Define.
2282 (thumb32_negate_data_op): New function.
2283 (md_apply_fix): Use it.
2284
e7da6241
BW
22852006-01-31 Bob Wilson <bob.wilson@acm.org>
2286
2287 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2288 fields.
2289 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2290 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2291 subtracted symbols.
2292 (relaxation_requirements): Add pfinish_frag argument and use it to
2293 replace setting tinsn->record_fix fields.
2294 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2295 and vinsn_to_insnbuf. Remove references to record_fix and
2296 slot_sub_symbols fields.
2297 (xtensa_mark_narrow_branches): Delete unused code.
2298 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2299 a symbol.
2300 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2301 record_fix fields.
2302 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2303 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2304 of the record_fix field. Simplify error messages for unexpected
2305 symbolic operands.
2306 (set_expr_symbol_offset_diff): Delete.
2307
79134647
PB
23082006-01-31 Paul Brook <paul@codesourcery.com>
2309
2310 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2311
e74cfd16
PB
23122006-01-31 Paul Brook <paul@codesourcery.com>
2313 Richard Earnshaw <rearnsha@arm.com>
2314
2315 * config/tc-arm.c: Use arm_feature_set.
2316 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2317 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2318 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2319 New variables.
2320 (insns): Use them.
2321 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2322 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2323 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2324 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2325 feature flags.
2326 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2327 (arm_opts): Move old cpu/arch options from here...
2328 (arm_legacy_opts): ... to here.
2329 (md_parse_option): Search arm_legacy_opts.
2330 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2331 (arm_float_abis, arm_eabis): Make const.
2332
d47d412e
BW
23332006-01-25 Bob Wilson <bob.wilson@acm.org>
2334
2335 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2336
b14273fe
JZ
23372006-01-21 Jie Zhang <jie.zhang@analog.com>
2338
2339 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2340 in load immediate intruction.
2341
39cd1c76
JZ
23422006-01-21 Jie Zhang <jie.zhang@analog.com>
2343
2344 * config/bfin-parse.y (value_match): Use correct conversion
2345 specifications in template string for __FILE__ and __LINE__.
2346 (binary): Ditto.
2347 (unary): Ditto.
2348
67a4f2b7
AO
23492006-01-18 Alexandre Oliva <aoliva@redhat.com>
2350
2351 Introduce TLS descriptors for i386 and x86_64.
2352 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2353 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2354 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2355 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2356 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2357 displacement bits.
2358 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2359 (lex_got): Handle @tlsdesc and @tlscall.
2360 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2361
8ad7c533
NC
23622006-01-11 Nick Clifton <nickc@redhat.com>
2363
2364 Fixes for building on 64-bit hosts:
2365 * config/tc-avr.c (mod_index): New union to allow conversion
2366 between pointers and integers.
2367 (md_begin, avr_ldi_expression): Use it.
2368 * config/tc-i370.c (md_assemble): Add cast for argument to print
2369 statement.
2370 * config/tc-tic54x.c (subsym_substitute): Likewise.
2371 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2372 opindex field of fr_cgen structure into a pointer so that it can
2373 be stored in a frag.
2374 * config/tc-mn10300.c (md_assemble): Likewise.
2375 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2376 types.
2377 * config/tc-v850.c: Replace uses of (int) casts with correct
2378 types.
2379
4dcb3903
L
23802006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2381
2382 PR gas/2117
2383 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2384
e0f6ea40
HPN
23852006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2386
2387 PR gas/2101
2388 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2389 a local-label reference.
2390
e88d958a 2391For older changes see ChangeLog-2005
08d56133
NC
2392\f
2393Local Variables:
2394mode: change-log
2395left-margin: 8
2396fill-column: 74
2397version-control: never
2398End:
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