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c694fd50
KH		 12006-12-07 Kazu Hirata <kazu@codesourcery.com>
2
3 * config/tc-m68k.c: Update uses of EF_M68K_*.
4
9021ec07
L		 52006-12-06 H.J. Lu <hjl@gnu.org>
6
7 * config/tc-i386.h: Change the prefix order to SEG_PREFIX,
8 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
9
b3b1f034
JJ		 102006-12-02 Jakub Jelinek <jakub@redhat.com>
11
12 PR gas/3607
13 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field.
14
f0291e4c
PB		 152006-12-01 Paul Brook <paul@codesourcery.com>
16
17 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
18 function symbols.
19
e1da3f5b
PB		 202006-11-29 Paul Brook <paul@codesourcery.com>
21
22 * config/tc-arm.c (arm_is_eabi): New function.
23 * config/tc-arm.h (arm_is_eabi): New prototype.
24 (THUMB_IS_FUNC): Use ELF function type for EABI objects.
25 * doc/c-arm.texi (.thumb_func): Update documentation.
26
00249aaa
PB		 272006-11-29 Paul Brook <paul@codesourcery.com>
28
29 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
30 encoding.
31
a7284bf1
BW		 322006-11-27 Sterling Augustine <sterling@tensilica.com>
33
34 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
35 as the first slot_subtype, not the frag subtype.
36
2caa7ca0
BW		 372006-11-27 Bob Wilson <bob.wilson@acm.org>
38
39 * config/tc-xtensa.c (XSHAL_ABI): Add default definition.
40 (directive_state): Disable scheduling by default.
41 (xtensa_add_config_info): New.
42 (xtensa_end): Call xtensa_add_config_info.
43
062cf837
EB		 442006-11-27 Eric Botcazou <ebotcazou@adacore.com>
45
46 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
47 their unaligned counterparts in debugging sections.
48
cefdba39
AM		 492006-11-24 Alan Modra <amodra@bigpond.net.au>
50
51 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
52
e821645d
DJ		 532006-11-22 Daniel Jacobowitz <dan@codesourcery.com>
54
55 * config/tc-arm.h (md_cons_align): Define.
56 (mapping_state): New prototype.
57 * config/tc-arm.c (mapping_state): Make global.
58
5ab504f9
AM		 592006-11-22 Alan Modra <amodra@bigpond.net.au>
60
61 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
62
98a16ee1
ML		 632006-11-16 Mei ligang <ligang@sunnorth.com.cn>
64
5ab504f9
AM		 65 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit
66 branch instruction, handle it specially.
98a16ee1
ML		 67 (score_insns): Modify 32 bit branch instruction.
68
0023dd27
AM		 692006-11-16 Alan Modra <amodra@bigpond.net.au>
70
71 * symbols.c (resolve_symbol_value): Formatting.
72
bdf128d6
JB		 732006-11-15 Jan Beulich <jbeulich@novell.com>
74
75 PR/3469
76 * symbols.c (symbol_clone): Mark symbol ending up not on symbol
77 chain by linking it to itself.
78 (resolve_symbol_value): Also check symbol_shadow_p().
79 (symbol_shadow_p): New.
80 * symbols.h (symbol_shadow_p): Declare.
81
25fe350b
MS		 822006-11-12 Mark Shinwell <shinwell@codesourcery.com>
83
84 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
85 (insns): Adjust accordingly.
86 (md_apply_fix): Alter comments to use CBZ instead of CZB.
87
0ffdc86c
NC		 882006-11-10 Pedro Alves <pedro_alves@portugalmail.pt>
89
90 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
91 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
92
6afdfa61
NC		 932006-11-10 Nick Clifton <nickc@redhat.com>
94
95 PR gas/3456:
96 * config/obj-elf.c (obj_elf_version): Do not include the name
97 field's padding in the namesz value.
98
d84bcf09
TS		 992006-11-09 Thiemo Seufer <ths@mips.com>
100
101 * config/tc-mips.c: Fix outdated comment.
102
b7d9ef37
L		 1032006-11-08 H.J. Lu <hongjiu.lu@intel.com>
104
105 * config/tc-i386.h (CpuPNI): Removed.
106 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
107 * config/tc-i386.c (md_assemble): Likewise.
108
05e7221f
AM		 1092006-11-08 Alan Modra <amodra@bigpond.net.au>
110
111 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
112
df1f3cda
DD		 1132006-11-06 David Daney <ddaney@avtrex.com>
114
115 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
116
82100185
TS		 1172006-11-06 Thiemo Seufer <ths@mips.com>
118
119 * doc/c-mips.texi (-march): Document sb1a.
120
a360e743
TS		 1212006-11-06 Thiemo Seufer <ths@mips.com>
122
123 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
124 34k always has DSP ASE.
125
64817874
TS		 1262006-11-03 Thiemo Seufer <ths@mips.com>
127
128 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
129 MIPS16 instructions referencing other sections, unless they are
130 external branches.
131
7764b395
TS		 1322006-11-03 Thiemo Seufer <ths@mips.com>
133
134 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
135 release 1 CPU.
136
ae424f82
JJ		 1372006-11-03 Jakub Jelinek <jakub@redhat.com>
138
9b8ae42e
JJ		 139 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
140 personality and lsda.
141 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
142 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
143 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
144 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
145 (output_cie): Output personality including its encoding and LSDA encoding.
146 (output_fde): Output LSDA.
147 (select_cie_for_fde): Don't share CIE if personality, its encoding or
148 LSDA encoding are different. Copy the 3 fields from fde_entry to
149 cie_entry.
150 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
151
ae424f82
JJ		 152 * subsegs.h (struct frchain): Add frch_cfi_data field.
153 * dw2gencfi.c: Include subsegs.h.
154 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
155 (struct frch_cfi_data): New type.
156 (unused_cfi_data): New variable.
157 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
158 and cfa_save_stack static vars into a structure pointed from
159 each frchain.
160 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
161 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
162 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
163 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
164 Likewise.
165
d1e50f8a
DJ		 1662006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
167
168 * config/tc-h8300.c (build_bytes): Fix const warning.
169
06d2da93
NC		 1702006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
171
172 * tc-score.c (do16_rdrs): Handle not! instruction especially.
173
3ba67470
PB		 1742006-10-31 Paul Brook <paul@codesourcery.com>
175
176 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
177 for EABIv4.
178
7a1d4c38
PB		 1792006-10-31 Paul Brook <paul@codesourcery.com>
180
181 gas/
182 * config/tc-arm.c (object_arch): New variable.
183 (s_arm_object_arch): New function.
184 (md_pseudo_table): Add object_arch.
185 (aeabi_set_public_attributes): Obey object_arch.
186 * doc/c-arm.texi: Document .object_arch.
187
b138abaa
NC		 1882006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
189
190 * tc-score.c (data_op2): Check invalid operands.
191 (my_get_expression): Const operand of some instructions can not be
192 symbol in assembly.
193 (get_insn_class_from_type): Handle instruction type Insn_internal.
194 (do_macro_ldst_label): Modify inst.type.
195 (Insn_PIC): Delete.
196 (data_op2): The immediate value in lw is 15 bit signed.
5ab504f9 197
c79b7c30
RC		 1982006-10-29 Randolph Chung <tausq@debian.org>
199
200 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
201 (hppa_regname_to_dw2regnum): New funcions.
202 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
203 (tc_cfi_frame_initial_instructions)
204 (tc_regname_to_dw2regnum): Define.
205 (hppa_cfi_frame_initial_instructions)
206 (hppa_regname_to_dw2regnum): Declare.
207 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
208 (DWARF2_CIE_DATA_ALIGNMENT): Define.
209
e2785c44
NC		 2102006-10-29 Nick Clifton <nickc@redhat.com>
211
212 * config/tc-spu.c (md_assemble): Cast printf string size parameter
213 to int in order to avoid a compiler warning.
214
86157c20
AS		 2152006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
216
217 * config/tc-sh.c (md_assemble): Define size of branches.
218
ba5f0fda
BE		 2192006-10-26 Ben Elliston <bje@au.ibm.com>
220
221 * dw2gencfi.c (cfi_add_CFA_offset):
222 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
223
033cd5fd
BE		 224 * write.c (chain_frchains_together_1): Assert that this function
225 never returns a pointer to the auto variable `dummy'.
226
e9f53129
AM		 2272006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
228 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
229 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
230 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
231 Alan Modra <amodra@bigpond.net.au>
232
233 * config/tc-spu.c: New file.
234 * config/tc-spu.h: New file.
235 * configure.tgt: Add SPU support.
236 * Makefile.am: Likewise. Run "make dep-am".
237 * Makefile.in: Regenerate.
238 * po/POTFILES.in: Regenerate.
239
7b383517
BE		 2402006-10-25 Ben Elliston <bje@au.ibm.com>
241
242 * expr.c (expr): Replace O_add case in switch (op_left) explaining
243 why it can never occur.
5ab504f9 244
ede602d7
AM		 2452006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
246
247 * doc/c-ppc.texi (-mcell): Document.
248 * config/tc-ppc.c (parse_cpu): Parse -mcell.
249 (md_show_usage): Document -mcell.
250
7918206c
MM		 2512006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
252
253 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
254
878bcc43
AM		 2552006-10-23 Alan Modra <amodra@bigpond.net.au>
256
257 * config/tc-m68hc11.c (md_assemble): Quiet warning.
258
8620418b
MF		 2592006-10-19 Mike Frysinger <vapier@gentoo.org>
260
261 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
262 (x86_64_section_letter): Likewise.
263
b3549761
NC		 2642006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
265
266 * config/tc-score.c (build_relax_frag): Compute correct
267 tc_frag_data.fixp.
268
71a75f6f
MF		 2692006-10-18 Roy Marples <uberlord@gentoo.org>
270
271 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM		 272 elf32-sparc as a viable target for the -32 switch and any target
273 starting with elf64-sparc as a viable target for the -64 switch.
274 (sparc_target_format): For 64-bit ELF flavoured output use
275 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
276 ELF_TARGET_FORMAT.
71a75f6f
MF		 277 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
278
e1b5fdd4
L		 2792006-10-17 H.J. Lu <hongjiu.lu@intel.com>
280
281 * configure: Regenerated.
282
f8ef9cd7
BS		 2832006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
284
285 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
286 in addition to testing for '\n'.
287 (TC_EOL_IN_INSN): Provide a default definition if necessary.
288
eb1fe072
NC		 2892006-10-13 Sterling Augstine <sterling@tensilica.com>
290
291 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
292 a disjoint DW_AT range.
293
ec6e49f4
NC		 2942006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
295
296 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
297
036dc3f7
PB		 2982006-10-08 Paul Brook <paul@codesourcery.com>
299
300 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
301 (parse_operands): Use parse_big_immediate for OP_NILO.
302 (neon_cmode_for_logic_imm): Try smaller element sizes.
303 (neon_cmode_for_move_imm): Ditto.
304 (do_neon_logic): Handle .i64 pseudo-op.
305
3bb0c887
AM		 3062006-09-29 Alan Modra <amodra@bigpond.net.au>
307
308 * po/POTFILES.in: Regenerate.
309
ef05d495
L		 3102006-09-28 H.J. Lu <hongjiu.lu@intel.com>
311
312 * config/tc-i386.h (CpuMNI): Renamed to ...
313 (CpuSSSE3): This.
314 (CpuUnknownFlags): Updated.
315 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
316 and PROCESSOR_MEROM with PROCESSOR_CORE2.
317 * config/tc-i386.c: Updated.
318 * doc/c-i386.texi: Likewise.
a70ae331 319
ef05d495
L		 320 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
321
d8ad03e9
NC		 3222006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
323
324 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
325
df3ca5a3
NC		 3262006-09-27 Nick Clifton <nickc@redhat.com>
327
328 * output-file.c (output_file_close): Prevent an infinite loop
329 reporting that stdoutput could not be closed.
330
2d447fca
JM		 3312006-09-26 Mark Shinwell <shinwell@codesourcery.com>
332 Joseph Myers <joseph@codesourcery.com>
333 Ian Lance Taylor <ian@wasabisystems.com>
334 Ben Elliston <bje@wasabisystems.com>
335
336 * config/tc-arm.c (arm_cext_iwmmxt2): New.
337 (enum operand_parse_code): New code OP_RIWR_I32z.
338 (parse_operands): Handle OP_RIWR_I32z.
339 (do_iwmmxt_wmerge): New function.
340 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
341 a register.
342 (do_iwmmxt_wrwrwr_or_imm5): New function.
343 (insns): Mark instructions as RIWR_I32z as appropriate.
344 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
345 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
346 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
347 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
348 (md_begin): Handle IWMMXT2.
349 (arm_cpus): Add iwmmxt2.
350 (arm_extensions): Likewise.
351 (arm_archs): Likewise.
352
ba83aca1
BW		 3532006-09-25 Bob Wilson <bob.wilson@acm.org>
354
355 * doc/as.texinfo (Overview): Revise description of --keep-locals.
356 Add xref to "Symbol Names".
357 (L): Refer to "local symbols" instead of "local labels". Move
358 definition to "Symbol Names" section; add xref to that section.
359 (Symbol Names): Use "Local Symbol Names" section to define local
360 symbols. Add "Local Labels" heading for description of temporary
361 forward/backward labels, and refer to those as "local labels".
362
539e75ad
L		 3632006-09-23 H.J. Lu <hongjiu.lu@intel.com>
364
365 PR binutils/3235
366 * config/tc-i386.c (match_template): Check address size prefix
367 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
368 operand.
369
5e02f92e
AM		 3702006-09-22 Alan Modra <amodra@bigpond.net.au>
371
372 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
373
885afe7b
AM		 3742006-09-22 Alan Modra <amodra@bigpond.net.au>
375
376 * as.h (as_perror): Delete declaration.
377 * gdbinit.in (as_perror): Delete breakpoint.
378 * messages.c (as_perror): Delete function.
379 * doc/internals.texi: Remove as_perror description.
380 * listing.c (listing_print: Don't use as_perror.
381 * output-file.c (output_file_create, output_file_close): Likewise.
382 * symbols.c (symbol_create, symbol_clone): Likewise.
383 * write.c (write_contents): Likewise.
384 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
385 * config/tc-tic54x.c (tic54x_mlib): Likewise.
386
3aeeedbb
AM		 3872006-09-22 Alan Modra <amodra@bigpond.net.au>
388
389 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
390 (ppc_handle_align): New function.
391 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
392 (SUB_SEGMENT_ALIGN): Define as zero.
393
96e9638b
BW		 3942006-09-20 Bob Wilson <bob.wilson@acm.org>
395
396 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
397 (Overview): Skip cross reference in man page.
398
99ad8390
NC		 3992006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
400
401 * configure.in: Add new target x86_64-pc-mingw64.
402 * configure: Regenerate.
403 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM		 404 * config/obj-coff.h: Add handling for TE_PEP target specific code
405 and definitions.
99ad8390
NC		 406 * config/tc-i386.c: Add new targets.
407 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM		 408 (x86_64_target_format): Add new method for setup proper default
409 target cpu mode.
99ad8390
NC		 410 * config/te-pep.h: Add new target definition header.
411 (TE_PEP): New macro: Identifies new target architecture.
412 (COFF_WITH_pex64): Set proper includes in bfd.
413 * NEWS: Mention new target.
414
73332571
BS		 4152006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
416
417 * config/bfin-parse.y (binary): Change sub of const to add of negated
418 const.
419
1c0d3aa6
NC		 4202006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
421
422 * config/tc-score.c: New file.
423 * config/tc-score.h: Newf file.
424 * configure.tgt: Add Score target.
425 * Makefile.am: Add Score files.
426 * Makefile.in: Regenerate.
427 * NEWS: Mention new target support.
428
4fa3602b
PB		 4292006-09-16 Paul Brook <paul@codesourcery.com>
430
431 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
432 * doc/c-arm.texi (movsp): Document offset argument.
433
16dd5e42
PB		 4342006-09-16 Paul Brook <paul@codesourcery.com>
435
436 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
437 unsigned int to avoid 64-bit host problems.
438
c4ae04ce
BS		 4392006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
440
441 * config/bfin-parse.y (binary): Do some more constant folding for
442 additions.
443
e5d4a5a6
JB		 4442006-09-13 Jan Beulich <jbeulich@novell.com>
445
446 * input-file.c (input_file_give_next_buffer): Demote as_bad to
447 as_warn.
448
1a1219cb
AM		 4492006-09-13 Alan Modra <amodra@bigpond.net.au>
450
451 PR gas/3165
452 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
453 in parens.
454
f79d9c1d
AM		 4552006-09-13 Alan Modra <amodra@bigpond.net.au>
456
457 * input-file.c (input_file_open): Replace as_perror with as_bad
458 so that gas exits with error on file errors. Correct error
459 message.
460 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 461 * input-file.h: Update comment.
f79d9c1d 462
f512f76f
NC		 4632006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
464
465 PR gas/3172
466 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
467 registers as a sub-class of wC registers.
468
8d79fd44
AM		 4692006-09-11 Alan Modra <amodra@bigpond.net.au>
470
471 PR gas/3165
472 * config/tc-mips.h (enum dwarf2_format): Forward declare.
473 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
474 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
475 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
476
6258339f
NC		 4772006-09-08 Nick Clifton <nickc@redhat.com>
478
479 PR gas/3129
480 * doc/as.texinfo (Macro): Improve documentation about separating
481 macro arguments from following text.
482
f91e006c
PB		 4832006-09-08 Paul Brook <paul@codesourcery.com>
484
485 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
486
466bbf93
PB		 4872006-09-07 Paul Brook <paul@codesourcery.com>
488
489 * config/tc-arm.c (parse_operands): Mark operand as present.
490
428e3f1f
PB		 4912006-09-04 Paul Brook <paul@codesourcery.com>
492
493 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
494 (do_neon_dyadic_if_i_d): Avoid setting U bit.
495 (do_neon_mac_maybe_scalar): Ditto.
496 (do_neon_dyadic_narrow): Force operand type to NT_integer.
497 (insns): Remove out of date comments.
498
fb25138b
NC		 4992006-08-29 Nick Clifton <nickc@redhat.com>
500
501 * read.c (s_align): Initialize the 'stopc' variable to prevent
502 compiler complaints about it being used without being
503 initialized.
504 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
505 s_float_space, s_struct, cons_worker, equals): Likewise.
506
5091343a
AM		 5072006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
508
509 * ecoff.c (ecoff_directive_val): Fix message typo.
510 * config/tc-ns32k.c (convert_iif): Likewise.
511 * config/tc-sh64.c (shmedia_check_limits): Likewise.
512
1f2a7e38
BW		 5132006-08-25 Sterling Augustine <sterling@tensilica.com>
514 Bob Wilson <bob.wilson@acm.org>
515
516 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
517 the state of the absolute_literals directive. Remove align frag at
518 the start of the literal pool position.
519
34135039
BW		 5202006-08-25 Bob Wilson <bob.wilson@acm.org>
521
522 * doc/c-xtensa.texi: Add @group commands in examples.
523
74869ac7
BW		 5242006-08-24 Bob Wilson <bob.wilson@acm.org>
525
526 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
527 (INIT_LITERAL_SECTION_NAME): Delete.
528 (lit_state struct): Remove segment names, init_lit_seg, and
529 fini_lit_seg. Add lit_prefix and current_text_seg.
530 (init_literal_head_h, init_literal_head): Delete.
531 (fini_literal_head_h, fini_literal_head): Delete.
532 (xtensa_begin_directive): Move argument parsing to
533 xtensa_literal_prefix function.
534 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
535 (xtensa_literal_prefix): Parse the directive argument here and
536 record it in the lit_prefix field. Remove code to derive literal
537 section names.
538 (linkonce_len): New.
539 (get_is_linkonce_section): Use linkonce_len. Check for any
540 ".gnu.linkonce.*" section, not just text sections.
541 (md_begin): Remove initialization of deleted lit_state fields.
542 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
543 to init_literal_head and fini_literal_head.
544 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
545 when traversing literal_head list.
546 (match_section_group): New.
547 (cache_literal_section): Rewrite to determine the literal section
548 name on the fly, create the section and return it.
549 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
550 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
551 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
552 Use xtensa_get_property_section from bfd.
553 (retrieve_xtensa_section): Delete.
554 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
555 description to refer to plural literal sections and add xref to
556 the Literal Directive section.
557 (Literal Directive): Describe new rules for deriving literal section
558 names. Add footnote for special case of .init/.fini with
559 --text-section-literals.
560 (Literal Prefix Directive): Replace old naming rules with xref to the
561 Literal Directive section.
562
87a1fd79
JM		 5632006-08-21 Joseph Myers <joseph@codesourcery.com>
564
565 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
566 merging with previous long opcode.
567
7148cc28
NC		 5682006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
569
570 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
571 * Makefile.in: Regenerate.
572 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
573 renamed. Adjust.
574
3e9e4fcf
JB		 5752006-08-16 Julian Brown <julian@codesourcery.com>
576
577 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
578 to use ARM instructions on non-ARM-supporting cores.
579 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
580 mode automatically based on cpu variant.
581 (md_begin): Call above function.
582
267d2029
JB		 5832006-08-16 Julian Brown <julian@codesourcery.com>
584
585 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
586 recognized in non-unified syntax mode.
587
4be041b2
TS		 5882006-08-15 Thiemo Seufer <ths@mips.com>
589 Nigel Stephens <nigel@mips.com>
590 David Ung <davidu@mips.com>
591
592 * configure.tgt: Handle mips*-sde-elf*.
593
3a93f742
TS		 5942006-08-12 Thiemo Seufer <ths@networkno.de>
595
596 * config/tc-mips.c (mips16_ip): Fix argument register handling
597 for restore instruction.
598
1737851b
BW		 5992006-08-08 Bob Wilson <bob.wilson@acm.org>
600
601 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
602 (out_sleb128): New.
603 (out_fixed_inc_line_addr): New.
604 (process_entries): Use out_fixed_inc_line_addr when
605 DWARF2_USE_FIXED_ADVANCE_PC is set.
606 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
607
e14e52f8
DD		 6082006-08-08 DJ Delorie <dj@redhat.com>
609
610 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
611 vs full symbols so that we never have more than one pointer value
612 for any given symbol in our symbol table.
613
802f5d9e
NC		 6142006-08-08 Sterling Augustine <sterling@tensilica.com>
615
616 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
617 and emit DW_AT_ranges when code in compilation unit is not
618 contiguous.
619 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
620 is not contiguous.
621 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
622 (out_debug_ranges): New function to emit .debug_ranges section
623 when code is not contiguous.
624
720abc60
NC		 6252006-08-08 Nick Clifton <nickc@redhat.com>
626
627 * config/tc-arm.c (WARN_DEPRECATED): Enable.
628
f0927246
NC		 6292006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
630
631 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
632 only block.
633 (pe_directive_secrel) [TE_PE]: New function.
634 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
635 loc, loc_mark_labels.
636 [TE_PE]: Handle secrel32.
637 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
638 call.
639 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
640 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
641 (md_section_align): Only round section sizes here for AOUT
642 targets.
643 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
644 (tc_pe_dwarf2_emit_offset): New function.
645 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
646 (cons_fix_new_arm): Handle O_secrel.
647 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
648 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
649 of OBJ_ELF only block.
650 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
651 tc_pe_dwarf2_emit_offset.
652
55e6e397
RS		 6532006-08-04 Richard Sandiford <richard@codesourcery.com>
654
655 * config/tc-sh.c (apply_full_field_fix): New function.
656 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
657 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
658 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
659 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
660
9cd19b17
NC		 6612006-08-03 Nick Clifton <nickc@redhat.com>
662
663 PR gas/2991
664 * config.in: Regenerate.
665
97f87066
JM		 6662006-08-03 Joseph Myers <joseph@codesourcery.com>
667
668 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 669 for OP_RIWR_RIWC.
97f87066 670
41adaa5c
JM		 6712006-08-03 Joseph Myers <joseph@codesourcery.com>
672
673 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
674 (parse_operands): Handle it.
675 (insns): Use it for tmcr and tmrc.
676
9d7cbccd
NC		 6772006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
678
679 PR binutils/2983
680 * config/tc-i386.c (md_parse_option): Treat any target starting
681 with elf64_x86_64 as a viable target for the -64 switch.
682 (i386_target_format): For 64-bit ELF flavoured output use
683 ELF_TARGET_FORMAT64.
684 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
685
c973bc5c
NC		 6862006-08-02 Nick Clifton <nickc@redhat.com>
687
688 PR gas/2991
689 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
690 bfd/aclocal.m4.
691 * configure.in: Run BFD_BINARY_FOPEN.
692 * configure: Regenerate.
693 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
694 file to include.
695
cfde7f70
L		 6962006-08-01 H.J. Lu <hongjiu.lu@intel.com>
697
698 * config/tc-i386.c (md_assemble): Don't update
699 cpu_arch_isa_flags.
700
b4c71f56
TS		 7012006-08-01 Thiemo Seufer <ths@mips.com>
702
703 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
704
54f4ddb3
TS		 7052006-08-01 Thiemo Seufer <ths@mips.com>
706
707 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
708 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
709 BFD_RELOC_32 and BFD_RELOC_16.
710 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
711 md_convert_frag, md_obj_end): Fix comment formatting.
712
d103cf61
TS		 7132006-07-31 Thiemo Seufer <ths@mips.com>
714
715 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
716 handling for BFD_RELOC_MIPS16_JMP.
717
601e61cd
NC		 7182006-07-24 Andreas Schwab <schwab@suse.de>
719
720 PR/2756
721 * read.c (read_a_source_file): Ignore unknown text after line
722 comment character. Fix misleading comment.
723
b45619c0
NC		 7242006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
725
726 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
727 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
728 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
729 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
730 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
731 doc/c-z80.texi, doc/internals.texi: Fix some typos.
732
784906c5
NC		 7332006-07-21 Nick Clifton <nickc@redhat.com>
734
735 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
736 linker testsuite.
737
d5f010e9
TS		 7382006-07-20 Thiemo Seufer <ths@mips.com>
739 Nigel Stephens <nigel@mips.com>
740
741 * config/tc-mips.c (md_parse_option): Don't infer optimisation
742 options from debug options.
743
35d3d567
TS		 7442006-07-20 Thiemo Seufer <ths@mips.com>
745
746 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
747 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
748
401a54cf
PB		 7492006-07-19 Paul Brook <paul@codesourcery.com>
750
751 * config/tc-arm.c (insns): Fix rbit Arm opcode.
752
16805f35
PB		 7532006-07-18 Paul Brook <paul@codesourcery.com>
754
755 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
756 (md_convert_frag): Use correct reloc for add_pc. Use
757 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
758 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
759 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
760
d9e05e4e
AM		 7612006-07-17 Mat Hostetter <mat@lcs.mit.edu>
762
763 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
764 when file and line unknown.
765
f43abd2b
TS		 7662006-07-17 Thiemo Seufer <ths@mips.com>
767
768 * read.c (s_struct): Use IS_ELF.
769 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
770 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
771 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
772 s_mips_mask): Likewise.
773
a2902af6
TS		 7742006-07-16 Thiemo Seufer <ths@mips.com>
775 David Ung <davidu@mips.com>
776
777 * read.c (s_struct): Handle ELF section changing.
778 * config/tc-mips.c (s_align): Leave enabling auto-align to the
779 generic code.
780 (s_change_sec): Try section changing only if we output ELF.
781
d32cad65
L		 7822006-07-15 H.J. Lu <hongjiu.lu@intel.com>
783
784 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
785 CpuAmdFam10.
786 (smallest_imm_type): Remove Cpu086.
787 (i386_target_format): Likewise.
788
789 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
790 Update CpuXXX.
791
050dfa73
MM		 7922006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
793 Michael Meissner <michael.meissner@amd.com>
794
795 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
796 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
797 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
798 architecture.
799 (i386_align_code): Ditto.
800 (md_assemble_code): Add support for insertq/extrq instructions,
801 swapping as needed for intel syntax.
802 (swap_imm_operands): New function to swap immediate operands.
803 (swap_operands): Deal with 4 operand instructions.
804 (build_modrm_byte): Add support for insertq instruction.
805
6b2de085
L		 8062006-07-13 H.J. Lu <hongjiu.lu@intel.com>
807
808 * config/tc-i386.h (Size64): Fix a typo in comment.
809
01eaea5a
NC		 8102006-07-12 Nick Clifton <nickc@redhat.com>
811
812 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 813 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC		 814 already been checked here.
815
1e85aad8
JW		 8162006-07-07 James E Wilson <wilson@specifix.com>
817
818 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
819
1370e33d
NC		 8202006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
821 Nick Clifton <nickc@redhat.com>
822
823 PR binutils/2877
824 * doc/as.texi: Fix spelling typo: branchs => branches.
825 * doc/c-m68hc11.texi: Likewise.
826 * config/tc-m68hc11.c: Likewise.
827 Support old spelling of command line switch for backwards
828 compatibility.
829
5f0fe04b
TS		 8302006-07-04 Thiemo Seufer <ths@mips.com>
831 David Ung <davidu@mips.com>
832
833 * config/tc-mips.c (s_is_linkonce): New function.
834 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
835 weak, external, and linkonce symbols.
836 (pic_need_relax): Use s_is_linkonce.
837
85234291
L		 8382006-06-24 H.J. Lu <hongjiu.lu@intel.com>
839
840 * doc/as.texinfo (Org): Remove space.
841 (P2align): Add "@var{abs-expr},".
842
ccc9c027
L		 8432006-06-23 H.J. Lu <hongjiu.lu@intel.com>
844
845 * config/tc-i386.c (cpu_arch_tune_set): New.
846 (cpu_arch_isa): Likewise.
847 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
848 nops with short or long nop sequences based on -march=/.arch
849 and -mtune=.
850 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
851 set cpu_arch_tune and cpu_arch_tune_flags.
852 (md_parse_option): For -march=, set cpu_arch_isa and set
853 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
854 0. Set cpu_arch_tune_set to 1 for -mtune=.
855 (i386_target_format): Don't set cpu_arch_tune.
856
d4dc2f22
TS		 8572006-06-23 Nigel Stephens <nigel@mips.com>
858
859 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
860 generated .sbss.* and .gnu.linkonce.sb.*.
861
a8dbcb85
TS		 8622006-06-23 Thiemo Seufer <ths@mips.com>
863 David Ung <davidu@mips.com>
864
865 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
866 label_list.
867 * config/tc-mips.c (label_list): Define per-segment label_list.
868 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
869 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
870 mips_from_file_after_relocs, mips_define_label): Use per-segment
871 label_list.
872
3994f87e
TS		 8732006-06-22 Thiemo Seufer <ths@mips.com>
874
875 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
876 (append_insn): Use it.
877 (md_apply_fix): Whitespace formatting.
878 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
879 mips16_extended_frag): Remove register specifier.
880 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
881 constants.
882
fa073d69
MS		 8832006-06-21 Mark Shinwell <shinwell@codesourcery.com>
884
885 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
886 a directive saving VFP registers for ARMv6 or later.
887 (s_arm_unwind_save): Add parameter arch_v6 and call
888 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
889 appropriate.
890 (md_pseudo_table): Add entry for new "vsave" directive.
891 * doc/c-arm.texi: Correct error in example for "save"
892 directive (fstmdf -> fstmdx). Also document "vsave" directive.
893
8e77b565 8942006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC		 895 Anatoly Sokolov <aesok@post.ru>
896
a70ae331
AM		 897 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
898 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC		 899 atmega164p/atmega324p.
900 * doc/c-avr.texi: Document new mcu and arch options.
901
8b1ad454
NC		 9022006-06-17 Nick Clifton <nickc@redhat.com>
903
904 * config/tc-arm.c (enum parse_operand_result): Move outside of
905 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
906
9103f4f4
L		 9072006-06-16 H.J. Lu <hongjiu.lu@intel.com>
908
909 * config/tc-i386.h (processor_type): New.
910 (arch_entry): Add type.
911
912 * config/tc-i386.c (cpu_arch_tune): New.
913 (cpu_arch_tune_flags): Likewise.
914 (cpu_arch_isa_flags): Likewise.
915 (cpu_arch): Updated.
916 (set_cpu_arch): Also update cpu_arch_isa_flags.
917 (md_assemble): Update cpu_arch_isa_flags.
918 (OPTION_MARCH): New.
919 (OPTION_MTUNE): Likewise.
920 (md_longopts): Add -march= and -mtune=.
921 (md_parse_option): Support -march= and -mtune=.
922 (md_show_usage): Add -march=CPU/-mtune=CPU.
923 (i386_target_format): Also update cpu_arch_isa_flags,
924 cpu_arch_tune and cpu_arch_tune_flags.
925
926 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
927
928 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
929
4962c51a
MS		 9302006-06-15 Mark Shinwell <shinwell@codesourcery.com>
931
932 * config/tc-arm.c (enum parse_operand_result): New.
933 (struct group_reloc_table_entry): New.
934 (enum group_reloc_type): New.
935 (group_reloc_table): New array.
936 (find_group_reloc_table_entry): New function.
937 (parse_shifter_operand_group_reloc): New function.
938 (parse_address_main): New function, incorporating code
939 from the old parse_address function. To be used via...
940 (parse_address): wrapper for parse_address_main; and
941 (parse_address_group_reloc): new function, likewise.
942 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
943 OP_ADDRGLDRS, OP_ADDRGLDC.
944 (parse_operands): Support for these new operand codes.
945 New macro po_misc_or_fail_no_backtrack.
946 (encode_arm_cp_address): Preserve group relocations.
947 (insns): Modify to use the above operand codes where group
948 relocations are permitted.
949 (md_apply_fix): Handle the group relocations
950 ALU_PC_G0_NC through LDC_SB_G2.
951 (tc_gen_reloc): Likewise.
952 (arm_force_relocation): Leave group relocations for the linker.
953 (arm_fix_adjustable): Likewise.
954
cd2f129f
JB		 9552006-06-15 Julian Brown <julian@codesourcery.com>
956
957 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
958 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
959 relocs properly.
960
46e883c5
L		 9612006-06-12 H.J. Lu <hongjiu.lu@intel.com>
962
963 * config/tc-i386.c (process_suffix): Don't add rex64 for
964 "xchg %rax,%rax".
965
1787fe5b
TS		 9662006-06-09 Thiemo Seufer <ths@mips.com>
967
968 * config/tc-mips.c (mips_ip): Maintain argument count.
969
96f989c2
AM		 9702006-06-09 Alan Modra <amodra@bigpond.net.au>
971
972 * config/tc-iq2000.c: Include sb.h.
973
7c752c2a
TS		 9742006-06-08 Nigel Stephens <nigel@mips.com>
975
976 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
977 aliases for better compatibility with SGI tools.
978
03bf704f
AM		 9792006-06-08 Alan Modra <amodra@bigpond.net.au>
980
981 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
982 * Makefile.am (GASLIBS): Expand @BFDLIB@.
983 (BFDVER_H): Delete.
984 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
985 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
986 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
987 Run "make dep-am".
988 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
989 * Makefile.in: Regenerate.
990 * doc/Makefile.in: Regenerate.
991 * configure: Regenerate.
992
6648b7cf
JM		 9932006-06-07 Joseph S. Myers <joseph@codesourcery.com>
994
995 * po/Make-in (pdf, ps): New dummy targets.
996
037e8744
JB		 9972006-06-07 Julian Brown <julian@codesourcery.com>
998
999 * config/tc-arm.c (stdarg.h): include.
1000 (arm_it): Add uncond_value field. Add isvec and issingle to operand
1001 array.
1002 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
1003 REG_TYPE_NSDQ (single, double or quad vector reg).
1004 (reg_expected_msgs): Update.
1005 (BAD_FPU): Add macro for unsupported FPU instruction error.
1006 (parse_neon_type): Support 'd' as an alias for .f64.
1007 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
1008 sets of registers.
1009 (parse_vfp_reg_list): Don't update first arg on error.
1010 (parse_neon_mov): Support extra syntax for VFP moves.
1011 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
1012 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
1013 (parse_operands): Support isvec, issingle operands fields, new parse
1014 codes above.
1015 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
1016 msr variants.
1017 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
1018 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
1019 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
1020 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
1021 shapes.
1022 (neon_shape): Redefine in terms of above.
1023 (neon_shape_class): New enumeration, table of shape classes.
1024 (neon_shape_el): New enumeration. One element of a shape.
1025 (neon_shape_el_size): Register widths of above, where appropriate.
1026 (neon_shape_info): New struct. Info for shape table.
1027 (neon_shape_tab): New array.
1028 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
1029 (neon_check_shape): Rewrite as...
1030 (neon_select_shape): New function to classify instruction shapes,
1031 driven by new table neon_shape_tab array.
1032 (neon_quad): New function. Return 1 if shape should set Q flag in
1033 instructions (or equivalent), 0 otherwise.
1034 (type_chk_of_el_type): Support F64.
1035 (el_type_of_type_chk): Likewise.
1036 (neon_check_type): Add support for VFP type checking (VFP data
1037 elements fill their containing registers).
1038 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
1039 in thumb mode for VFP instructions.
1040 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
1041 and encode the current instruction as if it were that opcode.
1042 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
1043 arguments, call function in PFN.
1044 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
1045 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
1046 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
1047 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
1048 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
1049 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
1050 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
1051 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
1052 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
1053 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
1054 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
1055 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
1056 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
1057 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
1058 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
1059 neon_quad.
1060 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
1061 between VFP and Neon turns out to belong to Neon. Perform
1062 architecture check and fill in condition field if appropriate.
1063 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
1064 (do_neon_cvt): Add support for VFP variants of instructions.
1065 (neon_cvt_flavour): Extend to cover VFP conversions.
1066 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
1067 vmov variants.
1068 (do_neon_ldr_str): Handle single-precision VFP load/store.
1069 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
1070 NS_NULL not NS_IGNORE.
1071 (opcode_tag): Add OT_csuffixF for operands which either take a
1072 conditional suffix, or have 0xF in the condition field.
1073 (md_assemble): Add support for OT_csuffixF.
1074 (NCE): Replace macro with...
1075 (NCE_tag, NCE, NCEF): New macros.
1076 (nCE): Replace macro with...
1077 (nCE_tag, nCE, nCEF): New macros.
1078 (insns): Add support for VFP insns or VFP versions of insns msr,
1079 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
1080 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
1081 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
1082 VFP/Neon insns together.
1083
ebd1c875
AM		 10842006-06-07 Alan Modra <amodra@bigpond.net.au>
1085 Ladislav Michl <ladis@linux-mips.org>
1086
1087 * app.c: Don't include headers already included by as.h.
1088 * as.c: Likewise.
1089 * atof-generic.c: Likewise.
1090 * cgen.c: Likewise.
1091 * dwarf2dbg.c: Likewise.
1092 * expr.c: Likewise.
1093 * input-file.c: Likewise.
1094 * input-scrub.c: Likewise.
1095 * macro.c: Likewise.
1096 * output-file.c: Likewise.
1097 * read.c: Likewise.
1098 * sb.c: Likewise.
1099 * config/bfin-lex.l: Likewise.
1100 * config/obj-coff.h: Likewise.
1101 * config/obj-elf.h: Likewise.
1102 * config/obj-som.h: Likewise.
1103 * config/tc-arc.c: Likewise.
1104 * config/tc-arm.c: Likewise.
1105 * config/tc-avr.c: Likewise.
1106 * config/tc-bfin.c: Likewise.
1107 * config/tc-cris.c: Likewise.
1108 * config/tc-d10v.c: Likewise.
1109 * config/tc-d30v.c: Likewise.
1110 * config/tc-dlx.h: Likewise.
1111 * config/tc-fr30.c: Likewise.
1112 * config/tc-frv.c: Likewise.
1113 * config/tc-h8300.c: Likewise.
1114 * config/tc-hppa.c: Likewise.
1115 * config/tc-i370.c: Likewise.
1116 * config/tc-i860.c: Likewise.
1117 * config/tc-i960.c: Likewise.
1118 * config/tc-ip2k.c: Likewise.
1119 * config/tc-iq2000.c: Likewise.
1120 * config/tc-m32c.c: Likewise.
1121 * config/tc-m32r.c: Likewise.
1122 * config/tc-maxq.c: Likewise.
1123 * config/tc-mcore.c: Likewise.
1124 * config/tc-mips.c: Likewise.
1125 * config/tc-mmix.c: Likewise.
1126 * config/tc-mn10200.c: Likewise.
1127 * config/tc-mn10300.c: Likewise.
1128 * config/tc-msp430.c: Likewise.
1129 * config/tc-mt.c: Likewise.
1130 * config/tc-ns32k.c: Likewise.
1131 * config/tc-openrisc.c: Likewise.
1132 * config/tc-ppc.c: Likewise.
1133 * config/tc-s390.c: Likewise.
1134 * config/tc-sh.c: Likewise.
1135 * config/tc-sh64.c: Likewise.
1136 * config/tc-sparc.c: Likewise.
1137 * config/tc-tic30.c: Likewise.
1138 * config/tc-tic4x.c: Likewise.
1139 * config/tc-tic54x.c: Likewise.
1140 * config/tc-v850.c: Likewise.
1141 * config/tc-vax.c: Likewise.
1142 * config/tc-xc16x.c: Likewise.
1143 * config/tc-xstormy16.c: Likewise.
1144 * config/tc-xtensa.c: Likewise.
1145 * config/tc-z80.c: Likewise.
1146 * config/tc-z8k.c: Likewise.
1147 * macro.h: Don't include sb.h or ansidecl.h.
1148 * sb.h: Don't include stdio.h or ansidecl.h.
1149 * cond.c: Include sb.h.
1150 * itbl-lex.l: Include as.h instead of other system headers.
1151 * itbl-parse.y: Likewise.
1152 * itbl-ops.c: Similarly.
1153 * itbl-ops.h: Don't include as.h or ansidecl.h.
1154 * config/bfin-defs.h: Don't include bfd.h or as.h.
1155 * config/bfin-parse.y: Include as.h instead of other system headers.
1156
9622b051
AM		 11572006-06-06 Ben Elliston <bje@au.ibm.com>
1158 Anton Blanchard <anton@samba.org>
1159
1160 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1161 (md_show_usage): Document it.
1162 (ppc_setup_opcodes): Test power6 opcode flag bits.
1163 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1164
65263ce3
TS		 11652006-06-06 Thiemo Seufer <ths@mips.com>
1166 Chao-ying Fu <fu@mips.com>
1167
1168 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1169 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1170 (macro_build): Update comment.
1171 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1172 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1173 CPU_HAS_MDMX.
1174 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1175 MIPS_CPU_ASE_MDMX flags for sb1.
1176
a9e24354
TS		 11772006-06-05 Thiemo Seufer <ths@mips.com>
1178
1179 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1180 appropriate.
1181 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1182 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1183 and MT instructions a fatal error. Use INSERT_OPERAND where
1184 appropriate. Improve warnings for break and wait code overflows.
1185 Use symbolic constant of OP_MASK_COPZ.
1186 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1187
4cfe2c59
DJ		 11882006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1189
1190 * po/Make-in (top_builddir): Define.
1191
e10fad12
JM		 11922006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1193
1194 * doc/Makefile.am (TEXI2DVI): Define.
1195 * doc/Makefile.in: Regenerate.
1196 * doc/c-arc.texi: Fix typo.
1197
12e64c2c
AM		 11982006-06-01 Alan Modra <amodra@bigpond.net.au>
1199
1200 * config/obj-ieee.c: Delete.
1201 * config/obj-ieee.h: Delete.
1202 * Makefile.am (OBJ_FORMATS): Remove ieee.
1203 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1204 (obj-ieee.o): Remove rule.
1205 * Makefile.in: Regenerate.
1206 * configure.in (atof): Remove tahoe.
1207 (OBJ_MAYBE_IEEE): Don't define.
1208 * configure: Regenerate.
1209 * config.in: Regenerate.
1210 * doc/Makefile.in: Regenerate.
1211 * po/POTFILES.in: Regenerate.
1212
20e95c23
DJ		 12132006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1214
1215 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1216 and LIBINTL_DEP everywhere.
1217 (INTLLIBS): Remove.
1218 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1219 * acinclude.m4: Include new gettext macros.
1220 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1221 Remove local code for po/Makefile.
1222 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1223
eebf07fb
NC		 12242006-05-30 Nick Clifton <nickc@redhat.com>
1225
1226 * po/es.po: Updated Spanish translation.
1227
b6aee19e
DC		 12282006-05-06 Denis Chertykov <denisc@overta.ru>
1229
1230 * doc/c-avr.texi: New file.
1231 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1232 * doc/all.texi: Set AVR
1233 * doc/as.texinfo: Include c-avr.texi
1234
f8fdc850 12352006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1236
f8fdc850
JZ		 1237 * config/bfin-parse.y (check_macfunc): Loose the condition of
1238 calling check_multiply_halfregs ().
1239
a3205465
JZ		 12402006-05-25 Jie Zhang <jie.zhang@analog.com>
1241
1242 * config/bfin-parse.y (asm_1): Better check and deal with
1243 vector and scalar Multiply 16-Bit Operands instructions.
1244
9b52905e
NC		 12452006-05-24 Nick Clifton <nickc@redhat.com>
1246
1247 * config/tc-hppa.c: Convert to ISO C90 format.
1248 * config/tc-hppa.h: Likewise.
1249
12502006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1251 Randolph Chung <randolph@tausq.org>
a70ae331 1252
9b52905e
NC		 1253 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1254 is_tls_ieoff, is_tls_leoff): Define.
1255 (fix_new_hppa): Handle TLS.
1256 (cons_fix_new_hppa): Likewise.
1257 (pa_ip): Likewise.
1258 (md_apply_fix): Handle TLS relocs.
1259 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1260
a70ae331 12612006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC		 1262
1263 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1264
ad3fea08
TS		 12652006-05-23 Thiemo Seufer <ths@mips.com>
1266 David Ung <davidu@mips.com>
1267 Nigel Stephens <nigel@mips.com>
1268
1269 [ gas/ChangeLog ]
1270 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1271 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1272 ISA_HAS_MXHC1): New macros.
1273 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1274 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1275 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1276 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1277 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1278 (mips_after_parse_args): Change default handling of float register
1279 size to account for 32bit code with 64bit FP. Better sanity checking
1280 of ISA/ASE/ABI option combinations.
1281 (s_mipsset): Support switching of GPR and FPR sizes via
1282 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1283 options.
1284 (mips_elf_final_processing): We should record the use of 64bit FP
1285 registers in 32bit code but we don't, because ELF header flags are
1286 a scarce ressource.
1287 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1288 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1289 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1290 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1291 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1292 missing -march options. Document .set arch=CPU. Move .set smartmips
1293 to ASE page. Use @code for .set FOO examples.
1294
8b64503a
JZ		 12952006-05-23 Jie Zhang <jie.zhang@analog.com>
1296
1297 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1298 if needed.
1299
403022e0
JZ		 13002006-05-23 Jie Zhang <jie.zhang@analog.com>
1301
1302 * config/bfin-defs.h (bfin_equals): Remove declaration.
1303 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1304 * config/tc-bfin.c (bfin_name_is_register): Remove.
1305 (bfin_equals): Remove.
1306 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1307 (bfin_name_is_register): Remove declaration.
1308
7455baf8
TS		 13092006-05-19 Thiemo Seufer <ths@mips.com>
1310 Nigel Stephens <nigel@mips.com>
1311
1312 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1313 (mips_oddfpreg_ok): New function.
1314 (mips_ip): Use it.
1315
707bfff6
TS		 13162006-05-19 Thiemo Seufer <ths@mips.com>
1317 David Ung <davidu@mips.com>
1318
1319 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1320 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1321 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1322 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1323 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1324 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1325 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1326 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1327 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1328 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1329 reg_names_o32, reg_names_n32n64): Define register classes.
1330 (reg_lookup): New function, use register classes.
1331 (md_begin): Reserve register names in the symbol table. Simplify
1332 OBJ_ELF defines.
1333 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1334 Use reg_lookup.
1335 (mips16_ip): Use reg_lookup.
1336 (tc_get_register): Likewise.
1337 (tc_mips_regname_to_dw2regnum): New function.
1338
1df69f4f
TS		 13392006-05-19 Thiemo Seufer <ths@mips.com>
1340
1341 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1342 Un-constify string argument.
1343 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1344 Likewise.
1345 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1346 Likewise.
1347 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1348 Likewise.
1349 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1350 Likewise.
1351 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1352 Likewise.
1353 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1354 Likewise.
1355
377260ba
NS		 13562006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1357
1358 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1359 cfloat/m68881 to correct architecture before using it.
1360
cce7653b
NC		 13612006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1362
a70ae331 1363 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC		 1364 constant values.
1365
b0796911
PB		 13662006-05-15 Paul Brook <paul@codesourcery.com>
1367
1368 * config/tc-arm.c (arm_adjust_symtab): Use
1369 bfd_is_arm_special_symbol_name.
1370
64b607e6
BW		 13712006-05-15 Bob Wilson <bob.wilson@acm.org>
1372
1373 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1374 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1375 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1376 Handle errors from calls to xtensa_opcode_is_* functions.
1377
9b3f89ee
TS		 13782006-05-14 Thiemo Seufer <ths@mips.com>
1379
1380 * config/tc-mips.c (macro_build): Test for currently active
1381 mips16 option.
1382 (mips16_ip): Reject invalid opcodes.
1383
370b66a1
CD		 13842006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1385
1386 * doc/as.texinfo: Rename "Index" to "AS Index",
1387 and "ABORT" to "ABORT (COFF)".
1388
b6895b4f
PB		 13892006-05-11 Paul Brook <paul@codesourcery.com>
1390
1391 * config/tc-arm.c (parse_half): New function.
1392 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1393 (parse_operands): Ditto.
1394 (do_mov16): Reject invalid relocations.
1395 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1396 (insns): Replace Iffff with HALF.
1397 (md_apply_fix): Add MOVW and MOVT relocs.
1398 (tc_gen_reloc): Ditto.
1399 * doc/c-arm.texi: Document relocation operators
1400
e28387c3
PB		 14012006-05-11 Paul Brook <paul@codesourcery.com>
1402
1403 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1404
89ee2ebe
TS		 14052006-05-11 Thiemo Seufer <ths@mips.com>
1406
1407 * config/tc-mips.c (append_insn): Don't check the range of j or
1408 jal addresses.
1409
53baae48
NC		 14102006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1411
1412 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1413 relocs against external symbols for WinCE targets.
53baae48
NC		 1414 (md_apply_fix): Likewise.
1415
4e2a74a8
TS		 14162006-05-09 David Ung <davidu@mips.com>
1417
1418 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1419 j or jal address.
1420
337ff0a5
NC		 14212006-05-09 Nick Clifton <nickc@redhat.com>
1422
1423 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1424 against symbols which are not going to be placed into the symbol
1425 table.
1426
8c9f705e
BE		 14272006-05-09 Ben Elliston <bje@au.ibm.com>
1428
1429 * expr.c (operand): Remove `if (0 && ..)' statement and
1430 subsequently unused target_op label. Collapse `if (1 || ..)'
1431 statement.
1432 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1433 separately above the switch.
1434
2fd0d2ac
NC		 14352006-05-08 Nick Clifton <nickc@redhat.com>
1436
1437 PR gas/2623
1438 * config/tc-msp430.c (line_separator_character): Define as |.
1439
e16bfa71
TS		 14402006-05-08 Thiemo Seufer <ths@mips.com>
1441 Nigel Stephens <nigel@mips.com>
1442 David Ung <davidu@mips.com>
1443
1444 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1445 (mips_opts): Likewise.
1446 (file_ase_smartmips): New variable.
1447 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1448 (macro_build): Handle SmartMIPS instructions.
1449 (mips_ip): Likewise.
1450 (md_longopts): Add argument handling for smartmips.
1451 (md_parse_options, mips_after_parse_args): Likewise.
1452 (s_mipsset): Add .set smartmips support.
1453 (md_show_usage): Document -msmartmips/-mno-smartmips.
1454 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1455 .set smartmips.
1456 * doc/c-mips.texi: Likewise.
1457
32638454
AM		 14582006-05-08 Alan Modra <amodra@bigpond.net.au>
1459
1460 * write.c (relax_segment): Add pass count arg. Don't error on
1461 negative org/space on first two passes.
1462 (relax_seg_info): New struct.
1463 (relax_seg, write_object_file): Adjust.
1464 * write.h (relax_segment): Update prototype.
1465
b7fc2769
JB		 14662006-05-05 Julian Brown <julian@codesourcery.com>
1467
1468 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1469 checking.
1470 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1471 architecture version checks.
1472 (insns): Allow overlapping instructions to be used in VFP mode.
1473
7f841127
L		 14742006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1475
1476 PR gas/2598
1477 * config/obj-elf.c (obj_elf_change_section): Allow user
1478 specified SHF_ALPHA_GPREL.
1479
73160847
NC		 14802006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1481
1482 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1483 for PMEM related expressions.
1484
56487c55
NC		 14852006-05-05 Nick Clifton <nickc@redhat.com>
1486
1487 PR gas/2582
1488 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1489 insertion of a directory separator character into a string at a
1490 given offset. Uses heuristics to decide when to use a backslash
1491 character rather than a forward-slash character.
1492 (dwarf2_directive_loc): Use the macro.
1493 (out_debug_info): Likewise.
1494
d43b4baf
TS		 14952006-05-05 Thiemo Seufer <ths@mips.com>
1496 David Ung <davidu@mips.com>
1497
1498 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1499 instruction.
1500 (macro): Add new case M_CACHE_AB.
1501
088fa78e
KH		 15022006-05-04 Kazu Hirata <kazu@codesourcery.com>
1503
1504 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1505 (opcode_lookup): Issue a warning for opcode with
1506 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1507 identical to OT_cinfix3.
1508 (TxC3w, TC3w, tC3w): New.
1509 (insns): Use tC3w and TC3w for comparison instructions with
1510 's' suffix.
1511
c9049d30
AM		 15122006-05-04 Alan Modra <amodra@bigpond.net.au>
1513
1514 * subsegs.h (struct frchain): Delete frch_seg.
1515 (frchain_root): Delete.
1516 (seg_info): Define as macro.
1517 * subsegs.c (frchain_root): Delete.
1518 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1519 (subsegs_begin, subseg_change): Adjust for above.
1520 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1521 rather than to one big list.
1522 (subseg_get): Don't special case abs, und sections.
1523 (subseg_new, subseg_force_new): Don't set frchainP here.
1524 (seg_info): Delete.
1525 (subsegs_print_statistics): Adjust frag chain control list traversal.
1526 * debug.c (dmp_frags): Likewise.
1527 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1528 at frchain_root. Make use of known frchain ordering.
1529 (last_frag_for_seg): Likewise.
1530 (get_frag_fix): Likewise. Add seg param.
1531 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1532 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1533 (SUB_SEGMENT_ALIGN): Likewise.
1534 (subsegs_finish): Adjust frchain list traversal.
1535 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1536 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1537 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1538 (xtensa_fix_b_j_loop_end_frags): Likewise.
1539 (xtensa_fix_close_loop_end_frags): Likewise.
1540 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1541 (retrieve_segment_info): Delete frch_seg initialisation.
1542
f592407e
AM		 15432006-05-03 Alan Modra <amodra@bigpond.net.au>
1544
1545 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1546 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1547 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1548 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1549
df7849c5
JM		 15502006-05-02 Joseph Myers <joseph@codesourcery.com>
1551
1552 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1553 here.
1554 (md_apply_fix3): Multiply offset by 4 here for
1555 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1556
2d545b82
L		 15572006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1558 Jan Beulich <jbeulich@novell.com>
1559
1560 * config/tc-i386.c (output_invalid_buf): Change size for
1561 unsigned char.
1562 * config/tc-tic30.c (output_invalid_buf): Likewise.
1563
1564 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1565 unsigned char.
1566 * config/tc-tic30.c (output_invalid): Likewise.
1567
38fc1cb1
DJ		 15682006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1569
1570 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1571 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1572 (asconfig.texi): Don't set top_srcdir.
1573 * doc/as.texinfo: Don't use top_srcdir.
1574 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1575
2d545b82
L		 15762006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1577
1578 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1579 * config/tc-tic30.c (output_invalid_buf): Likewise.
1580
1581 * config/tc-i386.c (output_invalid): Use snprintf instead of
1582 sprintf.
1583 * config/tc-ia64.c (declare_register_set): Likewise.
1584 (emit_one_bundle): Likewise.
1585 (check_dependencies): Likewise.
1586 * config/tc-tic30.c (output_invalid): Likewise.
1587
a8bc6c78
PB		 15882006-05-02 Paul Brook <paul@codesourcery.com>
1589
1590 * config/tc-arm.c (arm_optimize_expr): New function.
1591 * config/tc-arm.h (md_optimize_expr): Define
1592 (arm_optimize_expr): Add prototype.
1593 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1594
58633d9a
BE		 15952006-05-02 Ben Elliston <bje@au.ibm.com>
1596
22772e33
BE		 1597 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1598 field unsigned.
1599
58633d9a
BE		 1600 * sb.h (sb_list_vector): Move to sb.c.
1601 * sb.c (free_list): Use type of sb_list_vector directly.
1602 (sb_build): Fix off-by-one error in assertion about `size'.
1603
89cdfe57
BE		 16042006-05-01 Ben Elliston <bje@au.ibm.com>
1605
1606 * listing.c (listing_listing): Remove useless loop.
1607 * macro.c (macro_expand): Remove is_positional local variable.
1608 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1609 and simplify surrounding expressions, where possible.
1610 (assign_symbol): Likewise.
1611 (s_weakref): Likewise.
1612 * symbols.c (colon): Likewise.
1613
c35da140
AM		 16142006-05-01 James Lemke <jwlemke@wasabisystems.com>
1615
1616 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1617
9bcd4f99
TS		 16182006-04-30 Thiemo Seufer <ths@mips.com>
1619 David Ung <davidu@mips.com>
1620
1621 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1622 (mips_immed): New table that records various handling of udi
1623 instruction patterns.
1624 (mips_ip): Adds udi handling.
1625
001ae1a4
AM		 16262006-04-28 Alan Modra <amodra@bigpond.net.au>
1627
1628 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1629 of list rather than beginning.
1630
136da414
JB		 16312006-04-26 Julian Brown <julian@codesourcery.com>
1632
1633 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1634 (is_quarter_float): Rename from above. Simplify slightly.
1635 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1636 number.
1637 (parse_neon_mov): Parse floating-point constants.
1638 (neon_qfloat_bits): Fix encoding.
1639 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1640 preference to integer encoding when using the F32 type.
1641
dcbf9037
JB		 16422006-04-26 Julian Brown <julian@codesourcery.com>
1643
1644 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1645 zero-initialising structures containing it will lead to invalid types).
1646 (arm_it): Add vectype to each operand.
1647 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1648 defined field.
1649 (neon_typed_alias): New structure. Extra information for typed
1650 register aliases.
1651 (reg_entry): Add neon type info field.
1652 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1653 Break out alternative syntax for coprocessor registers, etc. into...
1654 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1655 out from arm_reg_parse.
1656 (parse_neon_type): Move. Return SUCCESS/FAIL.
1657 (first_error): New function. Call to ensure first error which occurs is
1658 reported.
1659 (parse_neon_operand_type): Parse exactly one type.
1660 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1661 (parse_typed_reg_or_scalar): New function. Handle core of both
1662 arm_typed_reg_parse and parse_scalar.
1663 (arm_typed_reg_parse): Parse a register with an optional type.
1664 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1665 result.
1666 (parse_scalar): Parse a Neon scalar with optional type.
1667 (parse_reg_list): Use first_error.
1668 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1669 (neon_alias_types_same): New function. Return true if two (alias) types
1670 are the same.
1671 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1672 of elements.
1673 (insert_reg_alias): Return new reg_entry not void.
1674 (insert_neon_reg_alias): New function. Insert type/index information as
1675 well as register for alias.
1676 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1677 make typed register aliases accordingly.
1678 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1679 of line.
1680 (s_unreq): Delete type information if present.
1681 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1682 (s_arm_unwind_save_mmxwcg): Likewise.
1683 (s_arm_unwind_movsp): Likewise.
1684 (s_arm_unwind_setfp): Likewise.
1685 (parse_shift): Likewise.
1686 (parse_shifter_operand): Likewise.
1687 (parse_address): Likewise.
1688 (parse_tb): Likewise.
1689 (tc_arm_regname_to_dw2regnum): Likewise.
1690 (md_pseudo_table): Add dn, qn.
1691 (parse_neon_mov): Handle typed operands.
1692 (parse_operands): Likewise.
1693 (neon_type_mask): Add N_SIZ.
1694 (N_ALLMODS): New macro.
1695 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1696 (el_type_of_type_chk): Add some safeguards.
1697 (modify_types_allowed): Fix logic bug.
1698 (neon_check_type): Handle operands with types.
1699 (neon_three_same): Remove redundant optional arg handling.
1700 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1701 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1702 (do_neon_step): Adjust accordingly.
1703 (neon_cmode_for_logic_imm): Use first_error.
1704 (do_neon_bitfield): Call neon_check_type.
1705 (neon_dyadic): Rename to...
1706 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1707 to allow modification of type of the destination.
1708 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1709 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1710 (do_neon_compare): Make destination be an untyped bitfield.
1711 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1712 (neon_mul_mac): Return early in case of errors.
1713 (neon_move_immediate): Use first_error.
1714 (neon_mac_reg_scalar_long): Fix type to include scalar.
1715 (do_neon_dup): Likewise.
1716 (do_neon_mov): Likewise (in several places).
1717 (do_neon_tbl_tbx): Fix type.
1718 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1719 (do_neon_ld_dup): Exit early in case of errors and/or use
1720 first_error.
1721 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1722 Handle .dn/.qn directives.
1723 (REGDEF): Add zero for reg_entry neon field.
1724
5287ad62
JB		 17252006-04-26 Julian Brown <julian@codesourcery.com>
1726
1727 * config/tc-arm.c (limits.h): Include.
1728 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1729 (fpu_vfp_v3_or_neon_ext): Declare constants.
1730 (neon_el_type): New enumeration of types for Neon vector elements.
1731 (neon_type_el): New struct. Define type and size of a vector element.
1732 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1733 instruction.
1734 (neon_type): Define struct. The type of an instruction.
1735 (arm_it): Add 'vectype' for the current instruction.
1736 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1737 (vfp_sp_reg_pos): Rename to...
1738 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1739 tags.
1740 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1741 (Neon D or Q register).
1742 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1743 register.
1744 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1745 (my_get_expression): Allow above constant as argument to accept
1746 64-bit constants with optional prefix.
1747 (arm_reg_parse): Add extra argument to return the specific type of
1748 register in when either a D or Q register (REG_TYPE_NDQ) is
1749 requested. Can be NULL.
1750 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1751 (parse_reg_list): Update for new arm_reg_parse args.
1752 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1753 (parse_neon_el_struct_list): New function. Parse element/structure
1754 register lists for VLD<n>/VST<n> instructions.
1755 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1756 (s_arm_unwind_save_mmxwr): Likewise.
1757 (s_arm_unwind_save_mmxwcg): Likewise.
1758 (s_arm_unwind_movsp): Likewise.
1759 (s_arm_unwind_setfp): Likewise.
1760 (parse_big_immediate): New function. Parse an immediate, which may be
1761 64 bits wide. Put results in inst.operands[i].
1762 (parse_shift): Update for new arm_reg_parse args.
1763 (parse_address): Likewise. Add parsing of alignment specifiers.
1764 (parse_neon_mov): Parse the operands of a VMOV instruction.
1765 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1766 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1767 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1768 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1769 (parse_operands): Handle new codes above.
1770 (encode_arm_vfp_sp_reg): Rename to...
1771 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1772 selected VFP version only supports D0-D15.
1773 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1774 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1775 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1776 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1777 encode_arm_vfp_reg name, and allow 32 D regs.
1778 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1779 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1780 regs.
1781 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1782 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1783 constant-load and conversion insns introduced with VFPv3.
1784 (neon_tab_entry): New struct.
1785 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1786 those which are the targets of pseudo-instructions.
1787 (neon_opc): Enumerate opcodes, use as indices into...
1788 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1789 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1790 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1791 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1792 neon_enc_tab.
1793 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1794 Neon instructions.
1795 (neon_type_mask): New. Compact type representation for type checking.
1796 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1797 permitted type combinations.
1798 (N_IGNORE_TYPE): New macro.
1799 (neon_check_shape): New function. Check an instruction shape for
1800 multiple alternatives. Return the specific shape for the current
1801 instruction.
1802 (neon_modify_type_size): New function. Modify a vector type and size,
1803 depending on the bit mask in argument 1.
1804 (neon_type_promote): New function. Convert a given "key" type (of an
1805 operand) into the correct type for a different operand, based on a bit
1806 mask.
1807 (type_chk_of_el_type): New function. Convert a type and size into the
1808 compact representation used for type checking.
1809 (el_type_of_type_ckh): New function. Reverse of above (only when a
1810 single bit is set in the bit mask).
1811 (modify_types_allowed): New function. Alter a mask of allowed types
1812 based on a bit mask of modifications.
1813 (neon_check_type): New function. Check the type of the current
1814 instruction against the variable argument list. The "key" type of the
1815 instruction is returned.
1816 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1817 a Neon data-processing instruction depending on whether we're in ARM
1818 mode or Thumb-2 mode.
1819 (neon_logbits): New function.
1820 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1821 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1822 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1823 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1824 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1825 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1826 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1827 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1828 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1829 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1830 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1831 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1832 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1833 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1834 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1835 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1836 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1837 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1838 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1839 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1840 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1841 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1842 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1843 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1844 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1845 helpers.
1846 (parse_neon_type): New function. Parse Neon type specifier.
1847 (opcode_lookup): Allow parsing of Neon type specifiers.
1848 (REGNUM2, REGSETH, REGSET2): New macros.
1849 (reg_names): Add new VFPv3 and Neon registers.
1850 (NUF, nUF, NCE, nCE): New macros for opcode table.
1851 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1852 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1853 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1854 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1855 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1856 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1857 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1858 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1859 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1860 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1861 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1862 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1863 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1864 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1865 fto[us][lh][sd].
1866 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1867 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1868 (arm_option_cpu_value): Add vfp3 and neon.
1869 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1870 VFPv1 attribute.
1871
1946c96e
BW		 18722006-04-25 Bob Wilson <bob.wilson@acm.org>
1873
1874 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1875 syntax instead of hardcoded opcodes with ".w18" suffixes.
1876 (wide_branch_opcode): New.
1877 (build_transition): Use it to check for wide branch opcodes with
1878 either ".w18" or ".w15" suffixes.
1879
5033a645
BW		 18802006-04-25 Bob Wilson <bob.wilson@acm.org>
1881
1882 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1883 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1884 frag's is_literal flag.
1885
395fa56f
BW		 18862006-04-25 Bob Wilson <bob.wilson@acm.org>
1887
1888 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1889
708587a4
KH		 18902006-04-23 Kazu Hirata <kazu@codesourcery.com>
1891
1892 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1893 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1894 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1895 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1896 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1897
8463be01
PB		 18982005-04-20 Paul Brook <paul@codesourcery.com>
1899
1900 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1901 all targets.
1902 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1903
f26a5955
AM		 19042006-04-19 Alan Modra <amodra@bigpond.net.au>
1905
1906 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1907 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1908 Make some cpus unsupported on ELF. Run "make dep-am".
1909 * Makefile.in: Regenerate.
1910
241a6c40
AM		 19112006-04-19 Alan Modra <amodra@bigpond.net.au>
1912
1913 * configure.in (--enable-targets): Indent help message.
1914 * configure: Regenerate.
1915
bb8f5920
L		 19162006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1917
1918 PR gas/2533
1919 * config/tc-i386.c (i386_immediate): Check illegal immediate
1920 register operand.
1921
23d9d9de
AM		 19222006-04-18 Alan Modra <amodra@bigpond.net.au>
1923
64e74474
AM		 1924 * config/tc-i386.c: Formatting.
1925 (output_disp, output_imm): ISO C90 params.
1926
6cbe03fb
AM		 1927 * frags.c (frag_offset_fixed_p): Constify args.
1928 * frags.h (frag_offset_fixed_p): Ditto.
1929
23d9d9de
AM		 1930 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1931 (COFF_MAGIC): Delete.
a37d486e
AM		 1932
1933 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1934
e7403566
DJ		 19352006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1936
1937 * po/POTFILES.in: Regenerated.
1938
58ab4f3d
MM		 19392006-04-16 Mark Mitchell <mark@codesourcery.com>
1940
1941 * doc/as.texinfo: Mention that some .type syntaxes are not
1942 supported on all architectures.
1943
482fd9f9
BW		 19442006-04-14 Sterling Augustine <sterling@tensilica.com>
1945
1946 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1947 instructions when such transformations have been disabled.
1948
05d58145
BW		 19492006-04-10 Sterling Augustine <sterling@tensilica.com>
1950
1951 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1952 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1953 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1954 decoding the loop instructions. Remove current_offset variable.
1955 (xtensa_fix_short_loop_frags): Likewise.
1956 (min_bytes_to_other_loop_end): Remove current_offset argument.
1957
9e75b3fa
AM		 19582006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1959
a37d486e 1960 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM		 1961 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1962
d727e8c2
NC		 19632006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1964
1965 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1966 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1967 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1968 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1969 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1970 at90can64, at90usb646, at90usb647, at90usb1286 and
1971 at90usb1287.
1972 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1973
d252fdde
PB		 19742006-04-07 Paul Brook <paul@codesourcery.com>
1975
1976 * config/tc-arm.c (parse_operands): Set default error message.
1977
ab1eb5fe
PB		 19782006-04-07 Paul Brook <paul@codesourcery.com>
1979
1980 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1981
7ae2971b
PB		 19822006-04-07 Paul Brook <paul@codesourcery.com>
1983
1984 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1985
53365c0d
PB		 19862006-04-07 Paul Brook <paul@codesourcery.com>
1987
1988 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1989 (move_or_literal_pool): Handle Thumb-2 instructions.
1990 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1991
45aa61fe
AM		 19922006-04-07 Alan Modra <amodra@bigpond.net.au>
1993
1994 PR 2512.
1995 * config/tc-i386.c (match_template): Move 64-bit operand tests
1996 inside loop.
1997
108a6f8e
CD		 19982006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1999
2000 * po/Make-in: Add install-html target.
2001 * Makefile.am: Add install-html and install-html-recursive targets.
2002 * Makefile.in: Regenerate.
2003 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
2004 * configure: Regenerate.
2005 * doc/Makefile.am: Add install-html and install-html-am targets.
2006 * doc/Makefile.in: Regenerate.
2007
ec651a3b
AM		 20082006-04-06 Alan Modra <amodra@bigpond.net.au>
2009
2010 * frags.c (frag_offset_fixed_p): Reinitialise offset before
2011 second scan.
2012
910600e9
RS		 20132006-04-05 Richard Sandiford <richard@codesourcery.com>
2014 Daniel Jacobowitz <dan@codesourcery.com>
2015
2016 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
2017 (GOTT_BASE, GOTT_INDEX): New.
2018 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
2019 GOTT_INDEX when generating VxWorks PIC.
2020 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
2021 use the generic *-*-vxworks* stanza instead.
2022
99630778
AM		 20232006-04-04 Alan Modra <amodra@bigpond.net.au>
2024
2025 PR 997
2026 * frags.c (frag_offset_fixed_p): New function.
2027 * frags.h (frag_offset_fixed_p): Declare.
2028 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
2029 (resolve_expression): Likewise.
2030
a02728c8
BW		 20312006-04-03 Sterling Augustine <sterling@tensilica.com>
2032
2033 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
2034 of the same length but different numbers of slots.
2035
9dfde49d
AS		 20362006-03-30 Andreas Schwab <schwab@suse.de>
2037
2038 * configure.in: Fix help string for --enable-targets option.
2039 * configure: Regenerate.
2040
2da12c60
NS		 20412006-03-28 Nathan Sidwell <nathan@codesourcery.com>
2042
6d89cc8f
NS		 2043 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
2044 (m68k_ip): ... here. Use for all chips. Protect against buffer
2045 overrun and avoid excessive copying.
2046
2da12c60
NS		 2047 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
2048 m68020_control_regs, m68040_control_regs, m68060_control_regs,
2049 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
2050 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
2051 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
2052 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 2053 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS		 2054 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
2055 mcf5282_ctrl, mcfv4e_ctrl): ... these.
2056 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
2057 (struct m68k_cpu): Change chip field to control_regs.
2058 (current_chip): Remove.
2059 (control_regs): New.
2060 (m68k_archs, m68k_extensions): Adjust.
2061 (m68k_cpus): Reorder to be in cpu number order. Adjust.
2062 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
2063 (find_cf_chip): Reimplement for new organization of cpu table.
2064 (select_control_regs): Remove.
2065 (mri_chip): Adjust.
2066 (struct save_opts): Save control regs, not chip.
2067 (s_save, s_restore): Adjust.
2068 (m68k_lookup_cpu): Give deprecated warning when necessary.
2069 (m68k_init_arch): Adjust.
2070 (md_show_usage): Adjust for new cpu table organization.
2071
1ac4baed
BS		 20722006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
2073
2074 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
2075 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
2076 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
2077 "elf/bfin.h".
2078 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
2079 (any_gotrel): New rule.
2080 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
2081 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
2082 "elf/bfin.h".
2083 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
2084 (bfin_pic_ptr): New function.
2085 (md_pseudo_table): Add it for ".picptr".
2086 (OPTION_FDPIC): New macro.
2087 (md_longopts): Add -mfdpic.
2088 (md_parse_option): Handle it.
2089 (md_begin): Set BFD flags.
2090 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
2091 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
2092 us for GOT relocs.
2093 * Makefile.am (bfin-parse.o): Update dependencies.
2094 (DEPTC_bfin_elf): Likewise.
2095 * Makefile.in: Regenerate.
2096
a9d34880
RS		 20972006-03-25 Richard Sandiford <richard@codesourcery.com>
2098
2099 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2100 mcfemac instead of mcfmac.
2101
9ca26584
AJ		 21022006-03-23 Michael Matz <matz@suse.de>
2103
2104 * config/tc-i386.c (type_names): Correct placement of 'static'.
2105 (reloc): Map some more relocs to their 64 bit counterpart when
2106 size is 8.
2107 (output_insn): Work around breakage if DEBUG386 is defined.
2108 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2109 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2110 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2111 different from i386.
2112 (output_imm): Ditto.
2113 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2114 Imm64.
2115 (md_convert_frag): Jumps can now be larger than 2GB away, error
2116 out in that case.
2117 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2118 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2119
0a44bf69
RS		 21202006-03-22 Richard Sandiford <richard@codesourcery.com>
2121 Daniel Jacobowitz <dan@codesourcery.com>
2122 Phil Edwards <phil@codesourcery.com>
2123 Zack Weinberg <zack@codesourcery.com>
2124 Mark Mitchell <mark@codesourcery.com>
2125 Nathan Sidwell <nathan@codesourcery.com>
2126
2127 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2128 (md_begin): Complain about -G being used for PIC. Don't change
2129 the text, data and bss alignments on VxWorks.
2130 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2131 generating VxWorks PIC.
2132 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2133 (macro): Likewise, but do not treat la $25 specially for
2134 VxWorks PIC, and do not handle jal.
2135 (OPTION_MVXWORKS_PIC): New macro.
2136 (md_longopts): Add -mvxworks-pic.
2137 (md_parse_option): Don't complain about using PIC and -G together here.
2138 Handle OPTION_MVXWORKS_PIC.
2139 (md_estimate_size_before_relax): Always use the first relaxation
2140 sequence on VxWorks.
2141 * config/tc-mips.h (VXWORKS_PIC): New.
2142
080eb7fe
PB		 21432006-03-21 Paul Brook <paul@codesourcery.com>
2144
2145 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2146
03aaa593
BW		 21472006-03-21 Sterling Augustine <sterling@tensilica.com>
2148
2149 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2150 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2151 (get_loop_align_size): New.
2152 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2153 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2154 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2155 (get_noop_aligned_address): Use get_loop_align_size.
2156 (get_aligned_diff): Likewise.
2157
3e94bf1a
PB		 21582006-03-21 Paul Brook <paul@codesourcery.com>
2159
2160 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2161
dfa9f0d5
PB		 21622006-03-20 Paul Brook <paul@codesourcery.com>
2163
2164 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2165 (do_t_branch): Encode branches inside IT blocks as unconditional.
2166 (do_t_cps): New function.
2167 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2168 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2169 (opcode_lookup): Allow conditional suffixes on all instructions in
2170 Thumb mode.
2171 (md_assemble): Advance condexec state before checking for errors.
2172 (insns): Use do_t_cps.
2173
6e1cb1a6
PB		 21742006-03-20 Paul Brook <paul@codesourcery.com>
2175
2176 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2177 outputting the insn.
2178
0a966e2d
JBG		 21792006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2180
2181 * config/tc-vax.c: Update copyright year.
2182 * config/tc-vax.h: Likewise.
2183
a49fcc17
JBG		 21842006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2185
2186 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2187 make it static.
2188 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2189
f5208ef2
PB		 21902006-03-17 Paul Brook <paul@codesourcery.com>
2191
2192 * config/tc-arm.c (insns): Add ldm and stm.
2193
cb4c78d6
BE		 21942006-03-17 Ben Elliston <bje@au.ibm.com>
2195
2196 PR gas/2446
2197 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2198
c16d2bf0
PB		 21992006-03-16 Paul Brook <paul@codesourcery.com>
2200
2201 * config/tc-arm.c (insns): Add "svc".
2202
80ca4e2c
BW		 22032006-03-13 Bob Wilson <bob.wilson@acm.org>
2204
2205 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2206 flag and avoid double underscore prefixes.
2207
3a4a14e9
PB		 22082006-03-10 Paul Brook <paul@codesourcery.com>
2209
2210 * config/tc-arm.c (md_begin): Handle EABIv5.
2211 (arm_eabis): Add EF_ARM_EABI_VER5.
2212 * doc/c-arm.texi: Document -meabi=5.
2213
518051dc
BE		 22142006-03-10 Ben Elliston <bje@au.ibm.com>
2215
2216 * app.c (do_scrub_chars): Simplify string handling.
2217
00a97672
RS		 22182006-03-07 Richard Sandiford <richard@codesourcery.com>
2219 Daniel Jacobowitz <dan@codesourcery.com>
2220 Zack Weinberg <zack@codesourcery.com>
2221 Nathan Sidwell <nathan@codesourcery.com>
2222 Paul Brook <paul@codesourcery.com>
2223 Ricardo Anguiano <anguiano@codesourcery.com>
2224 Phil Edwards <phil@codesourcery.com>
2225
2226 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2227 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2228 R_ARM_ABS12 reloc.
2229 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2230 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2231 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2232
b29757dc
BW		 22332006-03-06 Bob Wilson <bob.wilson@acm.org>
2234
2235 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2236 even when using the text-section-literals option.
2237
0b2e31dc
NS		 22382006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2239
2240 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2241 and cf.
2242 (m68k_ip): <case 'J'> Check we have some control regs.
2243 (md_parse_option): Allow raw arch switch.
2244 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2245 whether 68881 or cfloat was meant by -mfloat.
2246 (md_show_usage): Adjust extension display.
2247 (m68k_elf_final_processing): Adjust.
2248
df406460
NC		 22492006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2250
2251 * config/tc-avr.c (avr_mod_hash_value): New function.
2252 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2253 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC		 2254 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2255 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2256 of (int).
2257 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2258 fixups, abort otherwise.
df406460
NC		 2259 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2260 tc_fix_adjustable): Define.
a70ae331 2261
53022e4a
JW		 22622006-03-02 James E Wilson <wilson@specifix.com>
2263
2264 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2265 change the template, then clear md.slot[curr].end_of_insn_group.
2266
9f6f925e
JB		 22672006-02-28 Jan Beulich <jbeulich@novell.com>
2268
2269 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2270
0e31b3e1
JB		 22712006-02-28 Jan Beulich <jbeulich@novell.com>
2272
2273 PR/1070
2274 * macro.c (getstring): Don't treat parentheses special anymore.
2275 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2276 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2277 characters.
2278
10cd14b4
AM		 22792006-02-28 Mat <mat@csail.mit.edu>
2280
2281 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2282
63752a75
JJ		 22832006-02-27 Jakub Jelinek <jakub@redhat.com>
2284
2285 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2286 field.
2287 (CFI_signal_frame): Define.
2288 (cfi_pseudo_table): Add .cfi_signal_frame.
2289 (dot_cfi): Handle CFI_signal_frame.
2290 (output_cie): Handle cie->signal_frame.
2291 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2292 different. Copy signal_frame from FDE to newly created CIE.
2293 * doc/as.texinfo: Document .cfi_signal_frame.
2294
f7d9e5c3
CD		 22952006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2296
2297 * doc/Makefile.am: Add html target.
2298 * doc/Makefile.in: Regenerate.
2299 * po/Make-in: Add html target.
2300
331d2d0d
L		 23012006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2302
8502d882 2303 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L		 2304 Instructions.
2305
8502d882 2306 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L		 2307 (CpuUnknownFlags): Add CpuMNI.
2308
10156f83
DM		 23092006-02-24 David S. Miller <davem@sunset.davemloft.net>
2310
2311 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2312 (hpriv_reg_table): New table for hyperprivileged registers.
2313 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2314 register encoding.
2315
6772dd07
DD		 23162006-02-24 DJ Delorie <dj@redhat.com>
2317
2318 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2319 (tc_gen_reloc): Don't define.
2320 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2321 (OPTION_LINKRELAX): New.
2322 (md_longopts): Add it.
2323 (m32c_relax): New.
2324 (md_parse_options): Set it.
2325 (md_assemble): Emit relaxation relocs as needed.
2326 (md_convert_frag): Emit relaxation relocs as needed.
2327 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2328 (m32c_apply_fix): New.
2329 (tc_gen_reloc): New.
2330 (m32c_force_relocation): Force out jump relocs when relaxing.
2331 (m32c_fix_adjustable): Return false if relaxing.
2332
62b3e311
PB		 23332006-02-24 Paul Brook <paul@codesourcery.com>
2334
2335 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2336 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2337 (struct asm_barrier_opt): Define.
2338 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2339 (parse_psr): Accept V7M psr names.
2340 (parse_barrier): New function.
2341 (enum operand_parse_code): Add OP_oBARRIER.
2342 (parse_operands): Implement OP_oBARRIER.
2343 (do_barrier): New function.
2344 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2345 (do_t_cpsi): Add V7M restrictions.
2346 (do_t_mrs, do_t_msr): Validate V7M variants.
2347 (md_assemble): Check for NULL variants.
2348 (v7m_psrs, barrier_opt_names): New tables.
2349 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2350 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2351 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2352 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2353 (struct cpu_arch_ver_table): Define.
2354 (cpu_arch_ver): New.
2355 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2356 Tag_CPU_arch_profile.
2357 * doc/c-arm.texi: Document new cpu and arch options.
2358
59cf82fe
L		 23592006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2360
2361 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2362
19a7219f
L		 23632006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2364
2365 * config/tc-ia64.c: Update copyright years.
2366
7f3dfb9c
L		 23672006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2368
2369 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2370 SDM 2.2.
2371
f40d1643
PB		 23722005-02-22 Paul Brook <paul@codesourcery.com>
2373
2374 * config/tc-arm.c (do_pld): Remove incorrect write to
2375 inst.instruction.
2376 (encode_thumb32_addr_mode): Use correct operand.
2377
216d22bc
PB		 23782006-02-21 Paul Brook <paul@codesourcery.com>
2379
2380 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2381
d70c5fc7
NC		 23822006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2383 Anil Paranjape <anilp1@kpitcummins.com>
2384 Shilin Shakti <shilins@kpitcummins.com>
2385
2386 * Makefile.am: Add xc16x related entry.
2387 * Makefile.in: Regenerate.
2388 * configure.in: Added xc16x related entry.
2389 * configure: Regenerate.
2390 * config/tc-xc16x.h: New file
2391 * config/tc-xc16x.c: New file
2392 * doc/c-xc16x.texi: New file for xc16x
2393 * doc/all.texi: Entry for xc16x
a70ae331 2394 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC		 2395 * NEWS: Announce the support for the new target.
2396
aaa2ab3d
NH		 23972006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2398
2399 * configure.tgt: set emulation for mips-*-netbsd*
2400
82de001f
JJ		 24012006-02-14 Jakub Jelinek <jakub@redhat.com>
2402
2403 * config.in: Rebuilt.
2404
431ad2d0
BW		 24052006-02-13 Bob Wilson <bob.wilson@acm.org>
2406
2407 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2408 from 1, not 0, in error messages.
2409 (md_assemble): Simplify special-case check for ENTRY instructions.
2410 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2411 operand in error message.
2412
94089a50
JM		 24132006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2414
2415 * configure.tgt (arm-*-linux-gnueabi*): Change to
2416 arm-*-linux-*eabi*.
2417
52de4c06
NC		 24182006-02-10 Nick Clifton <nickc@redhat.com>
2419
70e45ad9
NC		 2420 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2421 32-bit value is propagated into the upper bits of a 64-bit long.
2422
52de4c06
NC		 2423 * config/tc-arc.c (init_opcode_tables): Fix cast.
2424 (arc_extoper, md_operand): Likewise.
2425
21af2bbd
BW		 24262006-02-09 David Heine <dlheine@tensilica.com>
2427
2428 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2429 each relaxation step.
2430
75a706fc 24312006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2432
75a706fc
L		 2433 * configure.in (CHECK_DECLS): Add vsnprintf.
2434 * configure: Regenerate.
2435 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2436 include/declare here, but...
2437 * as.h: Move code detecting VARARGS idiom to the top.
2438 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2439 (vsnprintf): Declare if not already declared.
2440
0d474464
L		 24412006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2442
2443 * as.c (close_output_file): New.
2444 (main): Register close_output_file with xatexit before
2445 dump_statistics. Don't call output_file_close.
2446
266abb8f
NS		 24472006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2448
2449 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2450 mcf5329_control_regs): New.
2451 (not_current_architecture, selected_arch, selected_cpu): New.
2452 (m68k_archs, m68k_extensions): New.
2453 (archs): Renamed to ...
2454 (m68k_cpus): ... here. Adjust.
2455 (n_arches): Remove.
2456 (md_pseudo_table): Add arch and cpu directives.
2457 (find_cf_chip, m68k_ip): Adjust table scanning.
2458 (no_68851, no_68881): Remove.
2459 (md_assemble): Lazily initialize.
2460 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2461 (md_init_after_args): Move functionality to m68k_init_arch.
2462 (mri_chip): Adjust table scanning.
2463 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2464 options with saner parsing.
2465 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2466 m68k_init_arch): New.
2467 (s_m68k_cpu, s_m68k_arch): New.
2468 (md_show_usage): Adjust.
2469 (m68k_elf_final_processing): Set CF EF flags.
2470 * config/tc-m68k.h (m68k_init_after_args): Remove.
2471 (tc_init_after_args): Remove.
2472 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2473 (M68k-Directives): Document .arch and .cpu directives.
2474
134dcee5
AM		 24752006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2476
a70ae331
AM		 2477 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2478 synonyms for equ and defl.
134dcee5
AM		 2479 (z80_cons_fix_new): New function.
2480 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2481 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM		 2482 now handled as pseudo-op rather than an instruction.
2483 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2484 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM		 2485 Add entries for def24,def32,d24,d32.
2486 (md_assemble): Improved error handling.
2487 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2488 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2489 (z80_cons_fix_new): Declare.
a70ae331 2490 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2491 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2492
a9931606
PB		 24932006-02-02 Paul Brook <paul@codesourcery.com>
2494
2495 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2496
ef8d22e6
PB		 24972005-02-02 Paul Brook <paul@codesourcery.com>
2498
2499 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2500 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2501 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2502 T2_OPCODE_RSB): Define.
2503 (thumb32_negate_data_op): New function.
2504 (md_apply_fix): Use it.
2505
e7da6241
BW		 25062006-01-31 Bob Wilson <bob.wilson@acm.org>
2507
2508 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2509 fields.
2510 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2511 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2512 subtracted symbols.
2513 (relaxation_requirements): Add pfinish_frag argument and use it to
2514 replace setting tinsn->record_fix fields.
2515 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2516 and vinsn_to_insnbuf. Remove references to record_fix and
2517 slot_sub_symbols fields.
2518 (xtensa_mark_narrow_branches): Delete unused code.
2519 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2520 a symbol.
2521 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2522 record_fix fields.
2523 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2524 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2525 of the record_fix field. Simplify error messages for unexpected
2526 symbolic operands.
2527 (set_expr_symbol_offset_diff): Delete.
2528
79134647
PB		 25292006-01-31 Paul Brook <paul@codesourcery.com>
2530
2531 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2532
e74cfd16
PB		 25332006-01-31 Paul Brook <paul@codesourcery.com>
2534 Richard Earnshaw <rearnsha@arm.com>
2535
2536 * config/tc-arm.c: Use arm_feature_set.
2537 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2538 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2539 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2540 New variables.
2541 (insns): Use them.
2542 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2543 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2544 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2545 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2546 feature flags.
2547 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2548 (arm_opts): Move old cpu/arch options from here...
2549 (arm_legacy_opts): ... to here.
2550 (md_parse_option): Search arm_legacy_opts.
2551 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2552 (arm_float_abis, arm_eabis): Make const.
2553
d47d412e
BW		 25542006-01-25 Bob Wilson <bob.wilson@acm.org>
2555
2556 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2557
b14273fe
JZ		 25582006-01-21 Jie Zhang <jie.zhang@analog.com>
2559
2560 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2561 in load immediate intruction.
2562
39cd1c76
JZ		 25632006-01-21 Jie Zhang <jie.zhang@analog.com>
2564
2565 * config/bfin-parse.y (value_match): Use correct conversion
2566 specifications in template string for __FILE__ and __LINE__.
2567 (binary): Ditto.
2568 (unary): Ditto.
2569
67a4f2b7
AO		 25702006-01-18 Alexandre Oliva <aoliva@redhat.com>
2571
2572 Introduce TLS descriptors for i386 and x86_64.
2573 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2574 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2575 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2576 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2577 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2578 displacement bits.
2579 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2580 (lex_got): Handle @tlsdesc and @tlscall.
2581 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2582
8ad7c533
NC		 25832006-01-11 Nick Clifton <nickc@redhat.com>
2584
2585 Fixes for building on 64-bit hosts:
2586 * config/tc-avr.c (mod_index): New union to allow conversion
2587 between pointers and integers.
2588 (md_begin, avr_ldi_expression): Use it.
2589 * config/tc-i370.c (md_assemble): Add cast for argument to print
2590 statement.
2591 * config/tc-tic54x.c (subsym_substitute): Likewise.
2592 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2593 opindex field of fr_cgen structure into a pointer so that it can
2594 be stored in a frag.
2595 * config/tc-mn10300.c (md_assemble): Likewise.
2596 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2597 types.
2598 * config/tc-v850.c: Replace uses of (int) casts with correct
2599 types.
2600
4dcb3903
L		 26012006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2602
2603 PR gas/2117
2604 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2605
e0f6ea40
HPN		 26062006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2607
2608 PR gas/2101
2609 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2610 a local-label reference.
2611
e88d958a 2612For older changes see ChangeLog-2005
08d56133
NC		 2613\f
2614Local Variables:
2615mode: change-log
2616left-margin: 8
2617fill-column: 74
2618version-control: never
2619End:
GDB Binutils - Deliverables
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