projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
cd2f129f
JB		 12006-06-15 Julian Brown <julian@codesourcery.com>
2
3 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
4 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
5 relocs properly.
6
46e883c5
L		 72006-06-12 H.J. Lu <hongjiu.lu@intel.com>
8
9 * config/tc-i386.c (process_suffix): Don't add rex64 for
10 "xchg %rax,%rax".
11
1787fe5b
TS		 122006-06-09 Thiemo Seufer <ths@mips.com>
13
14 * config/tc-mips.c (mips_ip): Maintain argument count.
15
96f989c2
AM		 162006-06-09 Alan Modra <amodra@bigpond.net.au>
17
18 * config/tc-iq2000.c: Include sb.h.
19
7c752c2a
TS		 202006-06-08 Nigel Stephens <nigel@mips.com>
21
22 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
23 aliases for better compatibility with SGI tools.
24
03bf704f
AM		 252006-06-08 Alan Modra <amodra@bigpond.net.au>
26
27 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
28 * Makefile.am (GASLIBS): Expand @BFDLIB@.
29 (BFDVER_H): Delete.
30 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
31 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
32 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
33 Run "make dep-am".
34 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
35 * Makefile.in: Regenerate.
36 * doc/Makefile.in: Regenerate.
37 * configure: Regenerate.
38
6648b7cf
JM		 392006-06-07 Joseph S. Myers <joseph@codesourcery.com>
40
41 * po/Make-in (pdf, ps): New dummy targets.
42
037e8744
JB		 432006-06-07 Julian Brown <julian@codesourcery.com>
44
45 * config/tc-arm.c (stdarg.h): include.
46 (arm_it): Add uncond_value field. Add isvec and issingle to operand
47 array.
48 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
49 REG_TYPE_NSDQ (single, double or quad vector reg).
50 (reg_expected_msgs): Update.
51 (BAD_FPU): Add macro for unsupported FPU instruction error.
52 (parse_neon_type): Support 'd' as an alias for .f64.
53 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
54 sets of registers.
55 (parse_vfp_reg_list): Don't update first arg on error.
56 (parse_neon_mov): Support extra syntax for VFP moves.
57 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
58 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
59 (parse_operands): Support isvec, issingle operands fields, new parse
60 codes above.
61 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
62 msr variants.
63 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
64 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
65 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
66 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
67 shapes.
68 (neon_shape): Redefine in terms of above.
69 (neon_shape_class): New enumeration, table of shape classes.
70 (neon_shape_el): New enumeration. One element of a shape.
71 (neon_shape_el_size): Register widths of above, where appropriate.
72 (neon_shape_info): New struct. Info for shape table.
73 (neon_shape_tab): New array.
74 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
75 (neon_check_shape): Rewrite as...
76 (neon_select_shape): New function to classify instruction shapes,
77 driven by new table neon_shape_tab array.
78 (neon_quad): New function. Return 1 if shape should set Q flag in
79 instructions (or equivalent), 0 otherwise.
80 (type_chk_of_el_type): Support F64.
81 (el_type_of_type_chk): Likewise.
82 (neon_check_type): Add support for VFP type checking (VFP data
83 elements fill their containing registers).
84 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
85 in thumb mode for VFP instructions.
86 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
87 and encode the current instruction as if it were that opcode.
88 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
89 arguments, call function in PFN.
90 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
91 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
92 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
93 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
94 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
95 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
96 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
97 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
98 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
99 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
100 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
101 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
102 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
103 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
104 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
105 neon_quad.
106 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
107 between VFP and Neon turns out to belong to Neon. Perform
108 architecture check and fill in condition field if appropriate.
109 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
110 (do_neon_cvt): Add support for VFP variants of instructions.
111 (neon_cvt_flavour): Extend to cover VFP conversions.
112 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
113 vmov variants.
114 (do_neon_ldr_str): Handle single-precision VFP load/store.
115 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
116 NS_NULL not NS_IGNORE.
117 (opcode_tag): Add OT_csuffixF for operands which either take a
118 conditional suffix, or have 0xF in the condition field.
119 (md_assemble): Add support for OT_csuffixF.
120 (NCE): Replace macro with...
121 (NCE_tag, NCE, NCEF): New macros.
122 (nCE): Replace macro with...
123 (nCE_tag, nCE, nCEF): New macros.
124 (insns): Add support for VFP insns or VFP versions of insns msr,
125 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
126 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
127 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
128 VFP/Neon insns together.
129
ebd1c875
AM		 1302006-06-07 Alan Modra <amodra@bigpond.net.au>
131 Ladislav Michl <ladis@linux-mips.org>
132
133 * app.c: Don't include headers already included by as.h.
134 * as.c: Likewise.
135 * atof-generic.c: Likewise.
136 * cgen.c: Likewise.
137 * dwarf2dbg.c: Likewise.
138 * expr.c: Likewise.
139 * input-file.c: Likewise.
140 * input-scrub.c: Likewise.
141 * macro.c: Likewise.
142 * output-file.c: Likewise.
143 * read.c: Likewise.
144 * sb.c: Likewise.
145 * config/bfin-lex.l: Likewise.
146 * config/obj-coff.h: Likewise.
147 * config/obj-elf.h: Likewise.
148 * config/obj-som.h: Likewise.
149 * config/tc-arc.c: Likewise.
150 * config/tc-arm.c: Likewise.
151 * config/tc-avr.c: Likewise.
152 * config/tc-bfin.c: Likewise.
153 * config/tc-cris.c: Likewise.
154 * config/tc-d10v.c: Likewise.
155 * config/tc-d30v.c: Likewise.
156 * config/tc-dlx.h: Likewise.
157 * config/tc-fr30.c: Likewise.
158 * config/tc-frv.c: Likewise.
159 * config/tc-h8300.c: Likewise.
160 * config/tc-hppa.c: Likewise.
161 * config/tc-i370.c: Likewise.
162 * config/tc-i860.c: Likewise.
163 * config/tc-i960.c: Likewise.
164 * config/tc-ip2k.c: Likewise.
165 * config/tc-iq2000.c: Likewise.
166 * config/tc-m32c.c: Likewise.
167 * config/tc-m32r.c: Likewise.
168 * config/tc-maxq.c: Likewise.
169 * config/tc-mcore.c: Likewise.
170 * config/tc-mips.c: Likewise.
171 * config/tc-mmix.c: Likewise.
172 * config/tc-mn10200.c: Likewise.
173 * config/tc-mn10300.c: Likewise.
174 * config/tc-msp430.c: Likewise.
175 * config/tc-mt.c: Likewise.
176 * config/tc-ns32k.c: Likewise.
177 * config/tc-openrisc.c: Likewise.
178 * config/tc-ppc.c: Likewise.
179 * config/tc-s390.c: Likewise.
180 * config/tc-sh.c: Likewise.
181 * config/tc-sh64.c: Likewise.
182 * config/tc-sparc.c: Likewise.
183 * config/tc-tic30.c: Likewise.
184 * config/tc-tic4x.c: Likewise.
185 * config/tc-tic54x.c: Likewise.
186 * config/tc-v850.c: Likewise.
187 * config/tc-vax.c: Likewise.
188 * config/tc-xc16x.c: Likewise.
189 * config/tc-xstormy16.c: Likewise.
190 * config/tc-xtensa.c: Likewise.
191 * config/tc-z80.c: Likewise.
192 * config/tc-z8k.c: Likewise.
193 * macro.h: Don't include sb.h or ansidecl.h.
194 * sb.h: Don't include stdio.h or ansidecl.h.
195 * cond.c: Include sb.h.
196 * itbl-lex.l: Include as.h instead of other system headers.
197 * itbl-parse.y: Likewise.
198 * itbl-ops.c: Similarly.
199 * itbl-ops.h: Don't include as.h or ansidecl.h.
200 * config/bfin-defs.h: Don't include bfd.h or as.h.
201 * config/bfin-parse.y: Include as.h instead of other system headers.
202
9622b051
AM		 2032006-06-06 Ben Elliston <bje@au.ibm.com>
204 Anton Blanchard <anton@samba.org>
205
206 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
207 (md_show_usage): Document it.
208 (ppc_setup_opcodes): Test power6 opcode flag bits.
209 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
210
65263ce3
TS		 2112006-06-06 Thiemo Seufer <ths@mips.com>
212 Chao-ying Fu <fu@mips.com>
213
214 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
215 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
216 (macro_build): Update comment.
217 (mips_ip): Allow DSP64 instructions for MIPS64R2.
218 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
219 CPU_HAS_MDMX.
220 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
221 MIPS_CPU_ASE_MDMX flags for sb1.
222
a9e24354
TS		 2232006-06-05 Thiemo Seufer <ths@mips.com>
224
225 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
226 appropriate.
227 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
228 (mips_ip): Make overflowed/underflowed constant arguments in DSP
229 and MT instructions a fatal error. Use INSERT_OPERAND where
230 appropriate. Improve warnings for break and wait code overflows.
231 Use symbolic constant of OP_MASK_COPZ.
232 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
233
4cfe2c59
DJ		 2342006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
235
236 * po/Make-in (top_builddir): Define.
237
e10fad12
JM		 2382006-06-02 Joseph S. Myers <joseph@codesourcery.com>
239
240 * doc/Makefile.am (TEXI2DVI): Define.
241 * doc/Makefile.in: Regenerate.
242 * doc/c-arc.texi: Fix typo.
243
12e64c2c
AM		 2442006-06-01 Alan Modra <amodra@bigpond.net.au>
245
246 * config/obj-ieee.c: Delete.
247 * config/obj-ieee.h: Delete.
248 * Makefile.am (OBJ_FORMATS): Remove ieee.
249 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
250 (obj-ieee.o): Remove rule.
251 * Makefile.in: Regenerate.
252 * configure.in (atof): Remove tahoe.
253 (OBJ_MAYBE_IEEE): Don't define.
254 * configure: Regenerate.
255 * config.in: Regenerate.
256 * doc/Makefile.in: Regenerate.
257 * po/POTFILES.in: Regenerate.
258
20e95c23
DJ		 2592006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
260
261 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
262 and LIBINTL_DEP everywhere.
263 (INTLLIBS): Remove.
264 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
265 * acinclude.m4: Include new gettext macros.
266 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
267 Remove local code for po/Makefile.
268 * Makefile.in, configure, doc/Makefile.in: Regenerated.
269
eebf07fb
NC		 2702006-05-30 Nick Clifton <nickc@redhat.com>
271
272 * po/es.po: Updated Spanish translation.
273
b6aee19e
DC		 2742006-05-06 Denis Chertykov <denisc@overta.ru>
275
276 * doc/c-avr.texi: New file.
277 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
278 * doc/all.texi: Set AVR
279 * doc/as.texinfo: Include c-avr.texi
280
f8fdc850
JZ		 2812006-05-28 Jie Zhang <jie.zhang@analog.com>
282
283 * config/bfin-parse.y (check_macfunc): Loose the condition of
284 calling check_multiply_halfregs ().
285
a3205465
JZ		 2862006-05-25 Jie Zhang <jie.zhang@analog.com>
287
288 * config/bfin-parse.y (asm_1): Better check and deal with
289 vector and scalar Multiply 16-Bit Operands instructions.
290
9b52905e
NC		 2912006-05-24 Nick Clifton <nickc@redhat.com>
292
293 * config/tc-hppa.c: Convert to ISO C90 format.
294 * config/tc-hppa.h: Likewise.
295
2962006-05-24 Carlos O'Donell <carlos@systemhalted.org>
297 Randolph Chung <randolph@tausq.org>
298
299 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
300 is_tls_ieoff, is_tls_leoff): Define.
301 (fix_new_hppa): Handle TLS.
302 (cons_fix_new_hppa): Likewise.
303 (pa_ip): Likewise.
304 (md_apply_fix): Handle TLS relocs.
305 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
306
28c9d252
NC		 3072006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
308
309 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
310
ad3fea08
TS		 3112006-05-23 Thiemo Seufer <ths@mips.com>
312 David Ung <davidu@mips.com>
313 Nigel Stephens <nigel@mips.com>
314
315 [ gas/ChangeLog ]
316 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
317 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
318 ISA_HAS_MXHC1): New macros.
319 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
320 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
321 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
322 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
323 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
324 (mips_after_parse_args): Change default handling of float register
325 size to account for 32bit code with 64bit FP. Better sanity checking
326 of ISA/ASE/ABI option combinations.
327 (s_mipsset): Support switching of GPR and FPR sizes via
328 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
329 options.
330 (mips_elf_final_processing): We should record the use of 64bit FP
331 registers in 32bit code but we don't, because ELF header flags are
332 a scarce ressource.
333 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
334 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
335 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
336 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
337 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
338 missing -march options. Document .set arch=CPU. Move .set smartmips
339 to ASE page. Use @code for .set FOO examples.
340
8b64503a
JZ		 3412006-05-23 Jie Zhang <jie.zhang@analog.com>
342
343 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
344 if needed.
345
403022e0
JZ		 3462006-05-23 Jie Zhang <jie.zhang@analog.com>
347
348 * config/bfin-defs.h (bfin_equals): Remove declaration.
349 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
350 * config/tc-bfin.c (bfin_name_is_register): Remove.
351 (bfin_equals): Remove.
352 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
353 (bfin_name_is_register): Remove declaration.
354
7455baf8
TS		 3552006-05-19 Thiemo Seufer <ths@mips.com>
356 Nigel Stephens <nigel@mips.com>
357
358 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
359 (mips_oddfpreg_ok): New function.
360 (mips_ip): Use it.
361
707bfff6
TS		 3622006-05-19 Thiemo Seufer <ths@mips.com>
363 David Ung <davidu@mips.com>
364
365 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
366 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
367 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
368 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
369 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
370 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
371 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
372 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
373 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
374 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
375 reg_names_o32, reg_names_n32n64): Define register classes.
376 (reg_lookup): New function, use register classes.
377 (md_begin): Reserve register names in the symbol table. Simplify
378 OBJ_ELF defines.
379 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
380 Use reg_lookup.
381 (mips16_ip): Use reg_lookup.
382 (tc_get_register): Likewise.
383 (tc_mips_regname_to_dw2regnum): New function.
384
1df69f4f
TS		 3852006-05-19 Thiemo Seufer <ths@mips.com>
386
387 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
388 Un-constify string argument.
389 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
390 Likewise.
391 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
392 Likewise.
393 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
394 Likewise.
395 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
396 Likewise.
397 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
398 Likewise.
399 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
400 Likewise.
401
377260ba
NS		 4022006-05-19 Nathan Sidwell <nathan@codesourcery.com>
403
404 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
405 cfloat/m68881 to correct architecture before using it.
406
cce7653b
NC		 4072006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
408
409 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
410 constant values.
411
b0796911
PB		 4122006-05-15 Paul Brook <paul@codesourcery.com>
413
414 * config/tc-arm.c (arm_adjust_symtab): Use
415 bfd_is_arm_special_symbol_name.
416
64b607e6
BW		 4172006-05-15 Bob Wilson <bob.wilson@acm.org>
418
419 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
420 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
421 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
422 Handle errors from calls to xtensa_opcode_is_* functions.
423
9b3f89ee
TS		 4242006-05-14 Thiemo Seufer <ths@mips.com>
425
426 * config/tc-mips.c (macro_build): Test for currently active
427 mips16 option.
428 (mips16_ip): Reject invalid opcodes.
429
370b66a1
CD		 4302006-05-11 Carlos O'Donell <carlos@codesourcery.com>
431
432 * doc/as.texinfo: Rename "Index" to "AS Index",
433 and "ABORT" to "ABORT (COFF)".
434
b6895b4f
PB		 4352006-05-11 Paul Brook <paul@codesourcery.com>
436
437 * config/tc-arm.c (parse_half): New function.
438 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
439 (parse_operands): Ditto.
440 (do_mov16): Reject invalid relocations.
441 (do_t_mov16): Ditto. Use Thumb reloc numbers.
442 (insns): Replace Iffff with HALF.
443 (md_apply_fix): Add MOVW and MOVT relocs.
444 (tc_gen_reloc): Ditto.
445 * doc/c-arm.texi: Document relocation operators
446
e28387c3
PB		 4472006-05-11 Paul Brook <paul@codesourcery.com>
448
449 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
450
89ee2ebe
TS		 4512006-05-11 Thiemo Seufer <ths@mips.com>
452
453 * config/tc-mips.c (append_insn): Don't check the range of j or
454 jal addresses.
455
53baae48
NC		 4562006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
457
458 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
459 relocs against external symbols for WinCE targets.
460 (md_apply_fix): Likewise.
461
4e2a74a8
TS		 4622006-05-09 David Ung <davidu@mips.com>
463
464 * config/tc-mips.c (append_insn): Only warn about an out-of-range
465 j or jal address.
466
337ff0a5
NC		 4672006-05-09 Nick Clifton <nickc@redhat.com>
468
469 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
470 against symbols which are not going to be placed into the symbol
471 table.
472
8c9f705e
BE		 4732006-05-09 Ben Elliston <bje@au.ibm.com>
474
475 * expr.c (operand): Remove `if (0 && ..)' statement and
476 subsequently unused target_op label. Collapse `if (1 || ..)'
477 statement.
478 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
479 separately above the switch.
480
2fd0d2ac
NC		 4812006-05-08 Nick Clifton <nickc@redhat.com>
482
483 PR gas/2623
484 * config/tc-msp430.c (line_separator_character): Define as |.
485
e16bfa71
TS		 4862006-05-08 Thiemo Seufer <ths@mips.com>
487 Nigel Stephens <nigel@mips.com>
488 David Ung <davidu@mips.com>
489
490 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
491 (mips_opts): Likewise.
492 (file_ase_smartmips): New variable.
493 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
494 (macro_build): Handle SmartMIPS instructions.
495 (mips_ip): Likewise.
496 (md_longopts): Add argument handling for smartmips.
497 (md_parse_options, mips_after_parse_args): Likewise.
498 (s_mipsset): Add .set smartmips support.
499 (md_show_usage): Document -msmartmips/-mno-smartmips.
500 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
501 .set smartmips.
502 * doc/c-mips.texi: Likewise.
503
32638454
AM		 5042006-05-08 Alan Modra <amodra@bigpond.net.au>
505
506 * write.c (relax_segment): Add pass count arg. Don't error on
507 negative org/space on first two passes.
508 (relax_seg_info): New struct.
509 (relax_seg, write_object_file): Adjust.
510 * write.h (relax_segment): Update prototype.
511
b7fc2769
JB		 5122006-05-05 Julian Brown <julian@codesourcery.com>
513
514 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
515 checking.
516 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
517 architecture version checks.
518 (insns): Allow overlapping instructions to be used in VFP mode.
519
7f841127
L		 5202006-05-05 H.J. Lu <hongjiu.lu@intel.com>
521
522 PR gas/2598
523 * config/obj-elf.c (obj_elf_change_section): Allow user
524 specified SHF_ALPHA_GPREL.
525
73160847
NC		 5262006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
527
528 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
529 for PMEM related expressions.
530
56487c55
NC		 5312006-05-05 Nick Clifton <nickc@redhat.com>
532
533 PR gas/2582
534 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
535 insertion of a directory separator character into a string at a
536 given offset. Uses heuristics to decide when to use a backslash
537 character rather than a forward-slash character.
538 (dwarf2_directive_loc): Use the macro.
539 (out_debug_info): Likewise.
540
d43b4baf
TS		 5412006-05-05 Thiemo Seufer <ths@mips.com>
542 David Ung <davidu@mips.com>
543
544 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
545 instruction.
546 (macro): Add new case M_CACHE_AB.
547
088fa78e
KH		 5482006-05-04 Kazu Hirata <kazu@codesourcery.com>
549
550 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
551 (opcode_lookup): Issue a warning for opcode with
552 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
553 identical to OT_cinfix3.
554 (TxC3w, TC3w, tC3w): New.
555 (insns): Use tC3w and TC3w for comparison instructions with
556 's' suffix.
557
c9049d30
AM		 5582006-05-04 Alan Modra <amodra@bigpond.net.au>
559
560 * subsegs.h (struct frchain): Delete frch_seg.
561 (frchain_root): Delete.
562 (seg_info): Define as macro.
563 * subsegs.c (frchain_root): Delete.
564 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
565 (subsegs_begin, subseg_change): Adjust for above.
566 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
567 rather than to one big list.
568 (subseg_get): Don't special case abs, und sections.
569 (subseg_new, subseg_force_new): Don't set frchainP here.
570 (seg_info): Delete.
571 (subsegs_print_statistics): Adjust frag chain control list traversal.
572 * debug.c (dmp_frags): Likewise.
573 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
574 at frchain_root. Make use of known frchain ordering.
575 (last_frag_for_seg): Likewise.
576 (get_frag_fix): Likewise. Add seg param.
577 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
578 * write.c (chain_frchains_together_1): Adjust for struct frchain.
579 (SUB_SEGMENT_ALIGN): Likewise.
580 (subsegs_finish): Adjust frchain list traversal.
581 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
582 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
583 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
584 (xtensa_fix_b_j_loop_end_frags): Likewise.
585 (xtensa_fix_close_loop_end_frags): Likewise.
586 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
587 (retrieve_segment_info): Delete frch_seg initialisation.
588
f592407e
AM		 5892006-05-03 Alan Modra <amodra@bigpond.net.au>
590
591 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
592 * config/obj-elf.h (obj_sec_set_private_data): Delete.
593 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
594 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
595
df7849c5
JM		 5962006-05-02 Joseph Myers <joseph@codesourcery.com>
597
598 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
599 here.
600 (md_apply_fix3): Multiply offset by 4 here for
601 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
602
2d545b82
L		 6032006-05-02 H.J. Lu <hongjiu.lu@intel.com>
604 Jan Beulich <jbeulich@novell.com>
605
606 * config/tc-i386.c (output_invalid_buf): Change size for
607 unsigned char.
608 * config/tc-tic30.c (output_invalid_buf): Likewise.
609
610 * config/tc-i386.c (output_invalid): Cast none-ascii char to
611 unsigned char.
612 * config/tc-tic30.c (output_invalid): Likewise.
613
38fc1cb1
DJ		 6142006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
615
616 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
617 (TEXI2POD): Use AM_MAKEINFOFLAGS.
618 (asconfig.texi): Don't set top_srcdir.
619 * doc/as.texinfo: Don't use top_srcdir.
620 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
621
2d545b82
L		 6222006-05-02 H.J. Lu <hongjiu.lu@intel.com>
623
624 * config/tc-i386.c (output_invalid_buf): Change size to 16.
625 * config/tc-tic30.c (output_invalid_buf): Likewise.
626
627 * config/tc-i386.c (output_invalid): Use snprintf instead of
628 sprintf.
629 * config/tc-ia64.c (declare_register_set): Likewise.
630 (emit_one_bundle): Likewise.
631 (check_dependencies): Likewise.
632 * config/tc-tic30.c (output_invalid): Likewise.
633
a8bc6c78
PB		 6342006-05-02 Paul Brook <paul@codesourcery.com>
635
636 * config/tc-arm.c (arm_optimize_expr): New function.
637 * config/tc-arm.h (md_optimize_expr): Define
638 (arm_optimize_expr): Add prototype.
639 (TC_FORCE_RELOCATION_SUB_SAME): Define.
640
58633d9a
BE		 6412006-05-02 Ben Elliston <bje@au.ibm.com>
642
22772e33
BE		 643 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
644 field unsigned.
645
58633d9a
BE		 646 * sb.h (sb_list_vector): Move to sb.c.
647 * sb.c (free_list): Use type of sb_list_vector directly.
648 (sb_build): Fix off-by-one error in assertion about `size'.
649
89cdfe57
BE		 6502006-05-01 Ben Elliston <bje@au.ibm.com>
651
652 * listing.c (listing_listing): Remove useless loop.
653 * macro.c (macro_expand): Remove is_positional local variable.
654 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
655 and simplify surrounding expressions, where possible.
656 (assign_symbol): Likewise.
657 (s_weakref): Likewise.
658 * symbols.c (colon): Likewise.
659
c35da140
AM		 6602006-05-01 James Lemke <jwlemke@wasabisystems.com>
661
662 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
663
9bcd4f99
TS		 6642006-04-30 Thiemo Seufer <ths@mips.com>
665 David Ung <davidu@mips.com>
666
667 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
668 (mips_immed): New table that records various handling of udi
669 instruction patterns.
670 (mips_ip): Adds udi handling.
671
001ae1a4
AM		 6722006-04-28 Alan Modra <amodra@bigpond.net.au>
673
674 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
675 of list rather than beginning.
676
136da414
JB		 6772006-04-26 Julian Brown <julian@codesourcery.com>
678
679 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
680 (is_quarter_float): Rename from above. Simplify slightly.
681 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
682 number.
683 (parse_neon_mov): Parse floating-point constants.
684 (neon_qfloat_bits): Fix encoding.
685 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
686 preference to integer encoding when using the F32 type.
687
dcbf9037
JB		 6882006-04-26 Julian Brown <julian@codesourcery.com>
689
690 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
691 zero-initialising structures containing it will lead to invalid types).
692 (arm_it): Add vectype to each operand.
693 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
694 defined field.
695 (neon_typed_alias): New structure. Extra information for typed
696 register aliases.
697 (reg_entry): Add neon type info field.
698 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
699 Break out alternative syntax for coprocessor registers, etc. into...
700 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
701 out from arm_reg_parse.
702 (parse_neon_type): Move. Return SUCCESS/FAIL.
703 (first_error): New function. Call to ensure first error which occurs is
704 reported.
705 (parse_neon_operand_type): Parse exactly one type.
706 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
707 (parse_typed_reg_or_scalar): New function. Handle core of both
708 arm_typed_reg_parse and parse_scalar.
709 (arm_typed_reg_parse): Parse a register with an optional type.
710 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
711 result.
712 (parse_scalar): Parse a Neon scalar with optional type.
713 (parse_reg_list): Use first_error.
714 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
715 (neon_alias_types_same): New function. Return true if two (alias) types
716 are the same.
717 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
718 of elements.
719 (insert_reg_alias): Return new reg_entry not void.
720 (insert_neon_reg_alias): New function. Insert type/index information as
721 well as register for alias.
722 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
723 make typed register aliases accordingly.
724 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
725 of line.
726 (s_unreq): Delete type information if present.
727 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
728 (s_arm_unwind_save_mmxwcg): Likewise.
729 (s_arm_unwind_movsp): Likewise.
730 (s_arm_unwind_setfp): Likewise.
731 (parse_shift): Likewise.
732 (parse_shifter_operand): Likewise.
733 (parse_address): Likewise.
734 (parse_tb): Likewise.
735 (tc_arm_regname_to_dw2regnum): Likewise.
736 (md_pseudo_table): Add dn, qn.
737 (parse_neon_mov): Handle typed operands.
738 (parse_operands): Likewise.
739 (neon_type_mask): Add N_SIZ.
740 (N_ALLMODS): New macro.
741 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
742 (el_type_of_type_chk): Add some safeguards.
743 (modify_types_allowed): Fix logic bug.
744 (neon_check_type): Handle operands with types.
745 (neon_three_same): Remove redundant optional arg handling.
746 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
747 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
748 (do_neon_step): Adjust accordingly.
749 (neon_cmode_for_logic_imm): Use first_error.
750 (do_neon_bitfield): Call neon_check_type.
751 (neon_dyadic): Rename to...
752 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
753 to allow modification of type of the destination.
754 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
755 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
756 (do_neon_compare): Make destination be an untyped bitfield.
757 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
758 (neon_mul_mac): Return early in case of errors.
759 (neon_move_immediate): Use first_error.
760 (neon_mac_reg_scalar_long): Fix type to include scalar.
761 (do_neon_dup): Likewise.
762 (do_neon_mov): Likewise (in several places).
763 (do_neon_tbl_tbx): Fix type.
764 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
765 (do_neon_ld_dup): Exit early in case of errors and/or use
766 first_error.
767 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
768 Handle .dn/.qn directives.
769 (REGDEF): Add zero for reg_entry neon field.
770
5287ad62
JB		 7712006-04-26 Julian Brown <julian@codesourcery.com>
772
773 * config/tc-arm.c (limits.h): Include.
774 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
775 (fpu_vfp_v3_or_neon_ext): Declare constants.
776 (neon_el_type): New enumeration of types for Neon vector elements.
777 (neon_type_el): New struct. Define type and size of a vector element.
778 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
779 instruction.
780 (neon_type): Define struct. The type of an instruction.
781 (arm_it): Add 'vectype' for the current instruction.
782 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
783 (vfp_sp_reg_pos): Rename to...
784 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
785 tags.
786 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
787 (Neon D or Q register).
788 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
789 register.
790 (GE_OPT_PREFIX_BIG): Define constant, for use in...
791 (my_get_expression): Allow above constant as argument to accept
792 64-bit constants with optional prefix.
793 (arm_reg_parse): Add extra argument to return the specific type of
794 register in when either a D or Q register (REG_TYPE_NDQ) is
795 requested. Can be NULL.
796 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
797 (parse_reg_list): Update for new arm_reg_parse args.
798 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
799 (parse_neon_el_struct_list): New function. Parse element/structure
800 register lists for VLD<n>/VST<n> instructions.
801 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
802 (s_arm_unwind_save_mmxwr): Likewise.
803 (s_arm_unwind_save_mmxwcg): Likewise.
804 (s_arm_unwind_movsp): Likewise.
805 (s_arm_unwind_setfp): Likewise.
806 (parse_big_immediate): New function. Parse an immediate, which may be
807 64 bits wide. Put results in inst.operands[i].
808 (parse_shift): Update for new arm_reg_parse args.
809 (parse_address): Likewise. Add parsing of alignment specifiers.
810 (parse_neon_mov): Parse the operands of a VMOV instruction.
811 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
812 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
813 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
814 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
815 (parse_operands): Handle new codes above.
816 (encode_arm_vfp_sp_reg): Rename to...
817 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
818 selected VFP version only supports D0-D15.
819 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
820 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
821 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
822 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
823 encode_arm_vfp_reg name, and allow 32 D regs.
824 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
825 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
826 regs.
827 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
828 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
829 constant-load and conversion insns introduced with VFPv3.
830 (neon_tab_entry): New struct.
831 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
832 those which are the targets of pseudo-instructions.
833 (neon_opc): Enumerate opcodes, use as indices into...
834 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
835 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
836 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
837 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
838 neon_enc_tab.
839 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
840 Neon instructions.
841 (neon_type_mask): New. Compact type representation for type checking.
842 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
843 permitted type combinations.
844 (N_IGNORE_TYPE): New macro.
845 (neon_check_shape): New function. Check an instruction shape for
846 multiple alternatives. Return the specific shape for the current
847 instruction.
848 (neon_modify_type_size): New function. Modify a vector type and size,
849 depending on the bit mask in argument 1.
850 (neon_type_promote): New function. Convert a given "key" type (of an
851 operand) into the correct type for a different operand, based on a bit
852 mask.
853 (type_chk_of_el_type): New function. Convert a type and size into the
854 compact representation used for type checking.
855 (el_type_of_type_ckh): New function. Reverse of above (only when a
856 single bit is set in the bit mask).
857 (modify_types_allowed): New function. Alter a mask of allowed types
858 based on a bit mask of modifications.
859 (neon_check_type): New function. Check the type of the current
860 instruction against the variable argument list. The "key" type of the
861 instruction is returned.
862 (neon_dp_fixup): New function. Fill in and modify instruction bits for
863 a Neon data-processing instruction depending on whether we're in ARM
864 mode or Thumb-2 mode.
865 (neon_logbits): New function.
866 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
867 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
868 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
869 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
870 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
871 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
872 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
873 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
874 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
875 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
876 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
877 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
878 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
879 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
880 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
881 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
882 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
883 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
884 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
885 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
886 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
887 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
888 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
889 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
890 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
891 helpers.
892 (parse_neon_type): New function. Parse Neon type specifier.
893 (opcode_lookup): Allow parsing of Neon type specifiers.
894 (REGNUM2, REGSETH, REGSET2): New macros.
895 (reg_names): Add new VFPv3 and Neon registers.
896 (NUF, nUF, NCE, nCE): New macros for opcode table.
897 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
898 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
899 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
900 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
901 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
902 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
903 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
904 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
905 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
906 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
907 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
908 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
909 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
910 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
911 fto[us][lh][sd].
912 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
913 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
914 (arm_option_cpu_value): Add vfp3 and neon.
915 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
916 VFPv1 attribute.
917
1946c96e
BW		 9182006-04-25 Bob Wilson <bob.wilson@acm.org>
919
920 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
921 syntax instead of hardcoded opcodes with ".w18" suffixes.
922 (wide_branch_opcode): New.
923 (build_transition): Use it to check for wide branch opcodes with
924 either ".w18" or ".w15" suffixes.
925
5033a645
BW		 9262006-04-25 Bob Wilson <bob.wilson@acm.org>
927
928 * config/tc-xtensa.c (xtensa_create_literal_symbol,
929 xg_assemble_literal, xg_assemble_literal_space): Do not set the
930 frag's is_literal flag.
931
395fa56f
BW		 9322006-04-25 Bob Wilson <bob.wilson@acm.org>
933
934 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
935
708587a4
KH		 9362006-04-23 Kazu Hirata <kazu@codesourcery.com>
937
938 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
939 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
940 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
941 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
942 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
943
8463be01
PB		 9442005-04-20 Paul Brook <paul@codesourcery.com>
945
946 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
947 all targets.
948 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
949
f26a5955
AM		 9502006-04-19 Alan Modra <amodra@bigpond.net.au>
951
952 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
953 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
954 Make some cpus unsupported on ELF. Run "make dep-am".
955 * Makefile.in: Regenerate.
956
241a6c40
AM		 9572006-04-19 Alan Modra <amodra@bigpond.net.au>
958
959 * configure.in (--enable-targets): Indent help message.
960 * configure: Regenerate.
961
bb8f5920
L		 9622006-04-18 H.J. Lu <hongjiu.lu@intel.com>
963
964 PR gas/2533
965 * config/tc-i386.c (i386_immediate): Check illegal immediate
966 register operand.
967
23d9d9de
AM		 9682006-04-18 Alan Modra <amodra@bigpond.net.au>
969
64e74474
AM		 970 * config/tc-i386.c: Formatting.
971 (output_disp, output_imm): ISO C90 params.
972
6cbe03fb
AM		 973 * frags.c (frag_offset_fixed_p): Constify args.
974 * frags.h (frag_offset_fixed_p): Ditto.
975
23d9d9de
AM		 976 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
977 (COFF_MAGIC): Delete.
a37d486e
AM		 978
979 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
980
e7403566
DJ		 9812006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
982
983 * po/POTFILES.in: Regenerated.
984
58ab4f3d
MM		 9852006-04-16 Mark Mitchell <mark@codesourcery.com>
986
987 * doc/as.texinfo: Mention that some .type syntaxes are not
988 supported on all architectures.
989
482fd9f9
BW		 9902006-04-14 Sterling Augustine <sterling@tensilica.com>
991
992 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
993 instructions when such transformations have been disabled.
994
05d58145
BW		 9952006-04-10 Sterling Augustine <sterling@tensilica.com>
996
997 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
998 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
999 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1000 decoding the loop instructions. Remove current_offset variable.
1001 (xtensa_fix_short_loop_frags): Likewise.
1002 (min_bytes_to_other_loop_end): Remove current_offset argument.
1003
9e75b3fa
AM		 10042006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1005
a37d486e 1006 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM		 1007 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1008
d727e8c2
NC		 10092006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1010
1011 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1012 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1013 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1014 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1015 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1016 at90can64, at90usb646, at90usb647, at90usb1286 and
1017 at90usb1287.
1018 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1019
d252fdde
PB		 10202006-04-07 Paul Brook <paul@codesourcery.com>
1021
1022 * config/tc-arm.c (parse_operands): Set default error message.
1023
ab1eb5fe
PB		 10242006-04-07 Paul Brook <paul@codesourcery.com>
1025
1026 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1027
7ae2971b
PB		 10282006-04-07 Paul Brook <paul@codesourcery.com>
1029
1030 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1031
53365c0d
PB		 10322006-04-07 Paul Brook <paul@codesourcery.com>
1033
1034 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1035 (move_or_literal_pool): Handle Thumb-2 instructions.
1036 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1037
45aa61fe
AM		 10382006-04-07 Alan Modra <amodra@bigpond.net.au>
1039
1040 PR 2512.
1041 * config/tc-i386.c (match_template): Move 64-bit operand tests
1042 inside loop.
1043
108a6f8e
CD		 10442006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1045
1046 * po/Make-in: Add install-html target.
1047 * Makefile.am: Add install-html and install-html-recursive targets.
1048 * Makefile.in: Regenerate.
1049 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1050 * configure: Regenerate.
1051 * doc/Makefile.am: Add install-html and install-html-am targets.
1052 * doc/Makefile.in: Regenerate.
1053
ec651a3b
AM		 10542006-04-06 Alan Modra <amodra@bigpond.net.au>
1055
1056 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1057 second scan.
1058
910600e9
RS		 10592006-04-05 Richard Sandiford <richard@codesourcery.com>
1060 Daniel Jacobowitz <dan@codesourcery.com>
1061
1062 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1063 (GOTT_BASE, GOTT_INDEX): New.
1064 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1065 GOTT_INDEX when generating VxWorks PIC.
1066 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1067 use the generic *-*-vxworks* stanza instead.
1068
99630778
AM		 10692006-04-04 Alan Modra <amodra@bigpond.net.au>
1070
1071 PR 997
1072 * frags.c (frag_offset_fixed_p): New function.
1073 * frags.h (frag_offset_fixed_p): Declare.
1074 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1075 (resolve_expression): Likewise.
1076
a02728c8
BW		 10772006-04-03 Sterling Augustine <sterling@tensilica.com>
1078
1079 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1080 of the same length but different numbers of slots.
1081
9dfde49d
AS		 10822006-03-30 Andreas Schwab <schwab@suse.de>
1083
1084 * configure.in: Fix help string for --enable-targets option.
1085 * configure: Regenerate.
1086
2da12c60
NS		 10872006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1088
6d89cc8f
NS		 1089 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1090 (m68k_ip): ... here. Use for all chips. Protect against buffer
1091 overrun and avoid excessive copying.
1092
2da12c60
NS		 1093 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1094 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1095 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1096 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1097 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1098 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1099 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1100 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1101 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1102 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1103 (struct m68k_cpu): Change chip field to control_regs.
1104 (current_chip): Remove.
1105 (control_regs): New.
1106 (m68k_archs, m68k_extensions): Adjust.
1107 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1108 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1109 (find_cf_chip): Reimplement for new organization of cpu table.
1110 (select_control_regs): Remove.
1111 (mri_chip): Adjust.
1112 (struct save_opts): Save control regs, not chip.
1113 (s_save, s_restore): Adjust.
1114 (m68k_lookup_cpu): Give deprecated warning when necessary.
1115 (m68k_init_arch): Adjust.
1116 (md_show_usage): Adjust for new cpu table organization.
1117
1ac4baed
BS		 11182006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1119
1120 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1121 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1122 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1123 "elf/bfin.h".
1124 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1125 (any_gotrel): New rule.
1126 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1127 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1128 "elf/bfin.h".
1129 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1130 (bfin_pic_ptr): New function.
1131 (md_pseudo_table): Add it for ".picptr".
1132 (OPTION_FDPIC): New macro.
1133 (md_longopts): Add -mfdpic.
1134 (md_parse_option): Handle it.
1135 (md_begin): Set BFD flags.
1136 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1137 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1138 us for GOT relocs.
1139 * Makefile.am (bfin-parse.o): Update dependencies.
1140 (DEPTC_bfin_elf): Likewise.
1141 * Makefile.in: Regenerate.
1142
a9d34880
RS		 11432006-03-25 Richard Sandiford <richard@codesourcery.com>
1144
1145 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1146 mcfemac instead of mcfmac.
1147
9ca26584
AJ		 11482006-03-23 Michael Matz <matz@suse.de>
1149
1150 * config/tc-i386.c (type_names): Correct placement of 'static'.
1151 (reloc): Map some more relocs to their 64 bit counterpart when
1152 size is 8.
1153 (output_insn): Work around breakage if DEBUG386 is defined.
1154 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1155 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1156 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1157 different from i386.
1158 (output_imm): Ditto.
1159 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1160 Imm64.
1161 (md_convert_frag): Jumps can now be larger than 2GB away, error
1162 out in that case.
1163 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1164 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1165
0a44bf69
RS		 11662006-03-22 Richard Sandiford <richard@codesourcery.com>
1167 Daniel Jacobowitz <dan@codesourcery.com>
1168 Phil Edwards <phil@codesourcery.com>
1169 Zack Weinberg <zack@codesourcery.com>
1170 Mark Mitchell <mark@codesourcery.com>
1171 Nathan Sidwell <nathan@codesourcery.com>
1172
1173 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1174 (md_begin): Complain about -G being used for PIC. Don't change
1175 the text, data and bss alignments on VxWorks.
1176 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1177 generating VxWorks PIC.
1178 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1179 (macro): Likewise, but do not treat la $25 specially for
1180 VxWorks PIC, and do not handle jal.
1181 (OPTION_MVXWORKS_PIC): New macro.
1182 (md_longopts): Add -mvxworks-pic.
1183 (md_parse_option): Don't complain about using PIC and -G together here.
1184 Handle OPTION_MVXWORKS_PIC.
1185 (md_estimate_size_before_relax): Always use the first relaxation
1186 sequence on VxWorks.
1187 * config/tc-mips.h (VXWORKS_PIC): New.
1188
080eb7fe
PB		 11892006-03-21 Paul Brook <paul@codesourcery.com>
1190
1191 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1192
03aaa593
BW		 11932006-03-21 Sterling Augustine <sterling@tensilica.com>
1194
1195 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1196 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1197 (get_loop_align_size): New.
1198 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1199 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1200 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1201 (get_noop_aligned_address): Use get_loop_align_size.
1202 (get_aligned_diff): Likewise.
1203
3e94bf1a
PB		 12042006-03-21 Paul Brook <paul@codesourcery.com>
1205
1206 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1207
dfa9f0d5
PB		 12082006-03-20 Paul Brook <paul@codesourcery.com>
1209
1210 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1211 (do_t_branch): Encode branches inside IT blocks as unconditional.
1212 (do_t_cps): New function.
1213 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1214 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1215 (opcode_lookup): Allow conditional suffixes on all instructions in
1216 Thumb mode.
1217 (md_assemble): Advance condexec state before checking for errors.
1218 (insns): Use do_t_cps.
1219
6e1cb1a6
PB		 12202006-03-20 Paul Brook <paul@codesourcery.com>
1221
1222 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1223 outputting the insn.
1224
0a966e2d
JBG		 12252006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1226
1227 * config/tc-vax.c: Update copyright year.
1228 * config/tc-vax.h: Likewise.
1229
a49fcc17
JBG		 12302006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1231
1232 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1233 make it static.
1234 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1235
f5208ef2
PB		 12362006-03-17 Paul Brook <paul@codesourcery.com>
1237
1238 * config/tc-arm.c (insns): Add ldm and stm.
1239
cb4c78d6
BE		 12402006-03-17 Ben Elliston <bje@au.ibm.com>
1241
1242 PR gas/2446
1243 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1244
c16d2bf0
PB		 12452006-03-16 Paul Brook <paul@codesourcery.com>
1246
1247 * config/tc-arm.c (insns): Add "svc".
1248
80ca4e2c
BW		 12492006-03-13 Bob Wilson <bob.wilson@acm.org>
1250
1251 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1252 flag and avoid double underscore prefixes.
1253
3a4a14e9
PB		 12542006-03-10 Paul Brook <paul@codesourcery.com>
1255
1256 * config/tc-arm.c (md_begin): Handle EABIv5.
1257 (arm_eabis): Add EF_ARM_EABI_VER5.
1258 * doc/c-arm.texi: Document -meabi=5.
1259
518051dc
BE		 12602006-03-10 Ben Elliston <bje@au.ibm.com>
1261
1262 * app.c (do_scrub_chars): Simplify string handling.
1263
00a97672
RS		 12642006-03-07 Richard Sandiford <richard@codesourcery.com>
1265 Daniel Jacobowitz <dan@codesourcery.com>
1266 Zack Weinberg <zack@codesourcery.com>
1267 Nathan Sidwell <nathan@codesourcery.com>
1268 Paul Brook <paul@codesourcery.com>
1269 Ricardo Anguiano <anguiano@codesourcery.com>
1270 Phil Edwards <phil@codesourcery.com>
1271
1272 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1273 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1274 R_ARM_ABS12 reloc.
1275 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1276 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1277 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1278
b29757dc
BW		 12792006-03-06 Bob Wilson <bob.wilson@acm.org>
1280
1281 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1282 even when using the text-section-literals option.
1283
0b2e31dc
NS		 12842006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1285
1286 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1287 and cf.
1288 (m68k_ip): <case 'J'> Check we have some control regs.
1289 (md_parse_option): Allow raw arch switch.
1290 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1291 whether 68881 or cfloat was meant by -mfloat.
1292 (md_show_usage): Adjust extension display.
1293 (m68k_elf_final_processing): Adjust.
1294
df406460
NC		 12952006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1296
1297 * config/tc-avr.c (avr_mod_hash_value): New function.
1298 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1299 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1300 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1301 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1302 of (int).
1303 (tc_gen_reloc): Handle substractions of symbols, if possible do
1304 fixups, abort otherwise.
1305 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1306 tc_fix_adjustable): Define.
1307
53022e4a
JW		 13082006-03-02 James E Wilson <wilson@specifix.com>
1309
1310 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1311 change the template, then clear md.slot[curr].end_of_insn_group.
1312
9f6f925e
JB		 13132006-02-28 Jan Beulich <jbeulich@novell.com>
1314
1315 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1316
0e31b3e1
JB		 13172006-02-28 Jan Beulich <jbeulich@novell.com>
1318
1319 PR/1070
1320 * macro.c (getstring): Don't treat parentheses special anymore.
1321 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1322 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1323 characters.
1324
10cd14b4
AM		 13252006-02-28 Mat <mat@csail.mit.edu>
1326
1327 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1328
63752a75
JJ		 13292006-02-27 Jakub Jelinek <jakub@redhat.com>
1330
1331 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1332 field.
1333 (CFI_signal_frame): Define.
1334 (cfi_pseudo_table): Add .cfi_signal_frame.
1335 (dot_cfi): Handle CFI_signal_frame.
1336 (output_cie): Handle cie->signal_frame.
1337 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1338 different. Copy signal_frame from FDE to newly created CIE.
1339 * doc/as.texinfo: Document .cfi_signal_frame.
1340
f7d9e5c3
CD		 13412006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1342
1343 * doc/Makefile.am: Add html target.
1344 * doc/Makefile.in: Regenerate.
1345 * po/Make-in: Add html target.
1346
331d2d0d
L		 13472006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1348
8502d882 1349 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L		 1350 Instructions.
1351
8502d882 1352 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L		 1353 (CpuUnknownFlags): Add CpuMNI.
1354
10156f83
DM		 13552006-02-24 David S. Miller <davem@sunset.davemloft.net>
1356
1357 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1358 (hpriv_reg_table): New table for hyperprivileged registers.
1359 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1360 register encoding.
1361
6772dd07
DD		 13622006-02-24 DJ Delorie <dj@redhat.com>
1363
1364 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1365 (tc_gen_reloc): Don't define.
1366 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1367 (OPTION_LINKRELAX): New.
1368 (md_longopts): Add it.
1369 (m32c_relax): New.
1370 (md_parse_options): Set it.
1371 (md_assemble): Emit relaxation relocs as needed.
1372 (md_convert_frag): Emit relaxation relocs as needed.
1373 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1374 (m32c_apply_fix): New.
1375 (tc_gen_reloc): New.
1376 (m32c_force_relocation): Force out jump relocs when relaxing.
1377 (m32c_fix_adjustable): Return false if relaxing.
1378
62b3e311
PB		 13792006-02-24 Paul Brook <paul@codesourcery.com>
1380
1381 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1382 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1383 (struct asm_barrier_opt): Define.
1384 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1385 (parse_psr): Accept V7M psr names.
1386 (parse_barrier): New function.
1387 (enum operand_parse_code): Add OP_oBARRIER.
1388 (parse_operands): Implement OP_oBARRIER.
1389 (do_barrier): New function.
1390 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1391 (do_t_cpsi): Add V7M restrictions.
1392 (do_t_mrs, do_t_msr): Validate V7M variants.
1393 (md_assemble): Check for NULL variants.
1394 (v7m_psrs, barrier_opt_names): New tables.
1395 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1396 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1397 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1398 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1399 (struct cpu_arch_ver_table): Define.
1400 (cpu_arch_ver): New.
1401 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1402 Tag_CPU_arch_profile.
1403 * doc/c-arm.texi: Document new cpu and arch options.
1404
59cf82fe
L		 14052006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1406
1407 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1408
19a7219f
L		 14092006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1410
1411 * config/tc-ia64.c: Update copyright years.
1412
7f3dfb9c
L		 14132006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1414
1415 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1416 SDM 2.2.
1417
f40d1643
PB		 14182005-02-22 Paul Brook <paul@codesourcery.com>
1419
1420 * config/tc-arm.c (do_pld): Remove incorrect write to
1421 inst.instruction.
1422 (encode_thumb32_addr_mode): Use correct operand.
1423
216d22bc
PB		 14242006-02-21 Paul Brook <paul@codesourcery.com>
1425
1426 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1427
d70c5fc7
NC		 14282006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1429 Anil Paranjape <anilp1@kpitcummins.com>
1430 Shilin Shakti <shilins@kpitcummins.com>
1431
1432 * Makefile.am: Add xc16x related entry.
1433 * Makefile.in: Regenerate.
1434 * configure.in: Added xc16x related entry.
1435 * configure: Regenerate.
1436 * config/tc-xc16x.h: New file
1437 * config/tc-xc16x.c: New file
1438 * doc/c-xc16x.texi: New file for xc16x
1439 * doc/all.texi: Entry for xc16x
1440 * doc/Makefile.texi: Added c-xc16x.texi
1441 * NEWS: Announce the support for the new target.
1442
aaa2ab3d
NH		 14432006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1444
1445 * configure.tgt: set emulation for mips-*-netbsd*
1446
82de001f
JJ		 14472006-02-14 Jakub Jelinek <jakub@redhat.com>
1448
1449 * config.in: Rebuilt.
1450
431ad2d0
BW		 14512006-02-13 Bob Wilson <bob.wilson@acm.org>
1452
1453 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1454 from 1, not 0, in error messages.
1455 (md_assemble): Simplify special-case check for ENTRY instructions.
1456 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1457 operand in error message.
1458
94089a50
JM		 14592006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1460
1461 * configure.tgt (arm-*-linux-gnueabi*): Change to
1462 arm-*-linux-*eabi*.
1463
52de4c06
NC		 14642006-02-10 Nick Clifton <nickc@redhat.com>
1465
70e45ad9
NC		 1466 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1467 32-bit value is propagated into the upper bits of a 64-bit long.
1468
52de4c06
NC		 1469 * config/tc-arc.c (init_opcode_tables): Fix cast.
1470 (arc_extoper, md_operand): Likewise.
1471
21af2bbd
BW		 14722006-02-09 David Heine <dlheine@tensilica.com>
1473
1474 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1475 each relaxation step.
1476
75a706fc
L		 14772006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1478
1479 * configure.in (CHECK_DECLS): Add vsnprintf.
1480 * configure: Regenerate.
1481 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1482 include/declare here, but...
1483 * as.h: Move code detecting VARARGS idiom to the top.
1484 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1485 (vsnprintf): Declare if not already declared.
1486
0d474464
L		 14872006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1488
1489 * as.c (close_output_file): New.
1490 (main): Register close_output_file with xatexit before
1491 dump_statistics. Don't call output_file_close.
1492
266abb8f
NS		 14932006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1494
1495 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1496 mcf5329_control_regs): New.
1497 (not_current_architecture, selected_arch, selected_cpu): New.
1498 (m68k_archs, m68k_extensions): New.
1499 (archs): Renamed to ...
1500 (m68k_cpus): ... here. Adjust.
1501 (n_arches): Remove.
1502 (md_pseudo_table): Add arch and cpu directives.
1503 (find_cf_chip, m68k_ip): Adjust table scanning.
1504 (no_68851, no_68881): Remove.
1505 (md_assemble): Lazily initialize.
1506 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1507 (md_init_after_args): Move functionality to m68k_init_arch.
1508 (mri_chip): Adjust table scanning.
1509 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1510 options with saner parsing.
1511 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1512 m68k_init_arch): New.
1513 (s_m68k_cpu, s_m68k_arch): New.
1514 (md_show_usage): Adjust.
1515 (m68k_elf_final_processing): Set CF EF flags.
1516 * config/tc-m68k.h (m68k_init_after_args): Remove.
1517 (tc_init_after_args): Remove.
1518 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1519 (M68k-Directives): Document .arch and .cpu directives.
1520
134dcee5
AM		 15212006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1522
1523 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1524 synonyms for equ and defl.
1525 (z80_cons_fix_new): New function.
1526 (emit_byte): Disallow relative jumps to absolute locations.
1527 (emit_data): Only handle defb, prototype changed, because defb is
1528 now handled as pseudo-op rather than an instruction.
1529 (instab): Entries for defb,defw,db,dw moved from here...
1530 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1531 Add entries for def24,def32,d24,d32.
1532 (md_assemble): Improved error handling.
1533 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1534 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1535 (z80_cons_fix_new): Declare.
1536 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1537 (def24,d24,def32,d32): New pseudo-ops.
1538
a9931606
PB		 15392006-02-02 Paul Brook <paul@codesourcery.com>
1540
1541 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1542
ef8d22e6
PB		 15432005-02-02 Paul Brook <paul@codesourcery.com>
1544
1545 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1546 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1547 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1548 T2_OPCODE_RSB): Define.
1549 (thumb32_negate_data_op): New function.
1550 (md_apply_fix): Use it.
1551
e7da6241
BW		 15522006-01-31 Bob Wilson <bob.wilson@acm.org>
1553
1554 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1555 fields.
1556 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1557 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1558 subtracted symbols.
1559 (relaxation_requirements): Add pfinish_frag argument and use it to
1560 replace setting tinsn->record_fix fields.
1561 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1562 and vinsn_to_insnbuf. Remove references to record_fix and
1563 slot_sub_symbols fields.
1564 (xtensa_mark_narrow_branches): Delete unused code.
1565 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1566 a symbol.
1567 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1568 record_fix fields.
1569 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1570 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1571 of the record_fix field. Simplify error messages for unexpected
1572 symbolic operands.
1573 (set_expr_symbol_offset_diff): Delete.
1574
79134647
PB		 15752006-01-31 Paul Brook <paul@codesourcery.com>
1576
1577 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1578
e74cfd16
PB		 15792006-01-31 Paul Brook <paul@codesourcery.com>
1580 Richard Earnshaw <rearnsha@arm.com>
1581
1582 * config/tc-arm.c: Use arm_feature_set.
1583 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1584 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1585 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1586 New variables.
1587 (insns): Use them.
1588 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1589 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1590 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1591 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1592 feature flags.
1593 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1594 (arm_opts): Move old cpu/arch options from here...
1595 (arm_legacy_opts): ... to here.
1596 (md_parse_option): Search arm_legacy_opts.
1597 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1598 (arm_float_abis, arm_eabis): Make const.
1599
d47d412e
BW		 16002006-01-25 Bob Wilson <bob.wilson@acm.org>
1601
1602 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1603
b14273fe
JZ		 16042006-01-21 Jie Zhang <jie.zhang@analog.com>
1605
1606 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1607 in load immediate intruction.
1608
39cd1c76
JZ		 16092006-01-21 Jie Zhang <jie.zhang@analog.com>
1610
1611 * config/bfin-parse.y (value_match): Use correct conversion
1612 specifications in template string for __FILE__ and __LINE__.
1613 (binary): Ditto.
1614 (unary): Ditto.
1615
67a4f2b7
AO		 16162006-01-18 Alexandre Oliva <aoliva@redhat.com>
1617
1618 Introduce TLS descriptors for i386 and x86_64.
1619 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1620 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1621 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1622 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1623 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1624 displacement bits.
1625 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1626 (lex_got): Handle @tlsdesc and @tlscall.
1627 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1628
8ad7c533
NC		 16292006-01-11 Nick Clifton <nickc@redhat.com>
1630
1631 Fixes for building on 64-bit hosts:
1632 * config/tc-avr.c (mod_index): New union to allow conversion
1633 between pointers and integers.
1634 (md_begin, avr_ldi_expression): Use it.
1635 * config/tc-i370.c (md_assemble): Add cast for argument to print
1636 statement.
1637 * config/tc-tic54x.c (subsym_substitute): Likewise.
1638 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1639 opindex field of fr_cgen structure into a pointer so that it can
1640 be stored in a frag.
1641 * config/tc-mn10300.c (md_assemble): Likewise.
1642 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1643 types.
1644 * config/tc-v850.c: Replace uses of (int) casts with correct
1645 types.
1646
4dcb3903
L		 16472006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1648
1649 PR gas/2117
1650 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1651
e0f6ea40
HPN		 16522006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1653
1654 PR gas/2101
1655 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1656 a local-label reference.
1657
e88d958a 1658For older changes see ChangeLog-2005
08d56133
NC		 1659\f
1660Local Variables:
1661mode: change-log
1662left-margin: 8
1663fill-column: 74
1664version-control: never
1665End:
GDB Binutils - Deliverables
This page took 0.339032 seconds and 4 git commands to generate.