* pe-arm-wince.c (LOCAL_LABEL_PREFIX): Define as ".".
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
d84bcf09
TS
12006-11-09 Thiemo Seufer <ths@mips.com>
2
3 * config/tc-mips.c: Fix outdated comment.
4
b7d9ef37
L
52006-11-08 H.J. Lu <hongjiu.lu@intel.com>
6
7 * config/tc-i386.h (CpuPNI): Removed.
8 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
9 * config/tc-i386.c (md_assemble): Likewise.
10
05e7221f
AM
112006-11-08 Alan Modra <amodra@bigpond.net.au>
12
13 * symbols.c (symbol_create, symbol_clone): Don't set udata.p.
14
df1f3cda
DD
152006-11-06 David Daney <ddaney@avtrex.com>
16
17 * config/tc-mips.c (pic_need_relax): Return true for section symbols.
18
82100185
TS
192006-11-06 Thiemo Seufer <ths@mips.com>
20
21 * doc/c-mips.texi (-march): Document sb1a.
22
a360e743
TS
232006-11-06 Thiemo Seufer <ths@mips.com>
24
25 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
26 34k always has DSP ASE.
27
64817874
TS
282006-11-03 Thiemo Seufer <ths@mips.com>
29
30 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
31 MIPS16 instructions referencing other sections, unless they are
32 external branches.
33
7764b395
TS
342006-11-03 Thiemo Seufer <ths@mips.com>
35
36 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
37 release 1 CPU.
38
ae424f82
JJ
392006-11-03 Jakub Jelinek <jakub@redhat.com>
40
9b8ae42e
JJ
41 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding,
42 personality and lsda.
43 (struct cie_entry): Add per_encoding, lsda_encoding and personality.
44 (alloc_fde_entry): Initialize per_encoding and lsda_encoding.
45 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda.
46 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions.
47 (output_cie): Output personality including its encoding and LSDA encoding.
48 (output_fde): Output LSDA.
49 (select_cie_for_fde): Don't share CIE if personality, its encoding or
50 LSDA encoding are different. Copy the 3 fields from fde_entry to
51 cie_entry.
52 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document.
53
ae424f82
JJ
54 * subsegs.h (struct frchain): Add frch_cfi_data field.
55 * dw2gencfi.c: Include subsegs.h.
56 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed.
57 (struct frch_cfi_data): New type.
58 (unused_cfi_data): New variable.
59 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset
60 and cfa_save_stack static vars into a structure pointed from
61 each frchain.
62 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column,
63 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset,
64 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi,
65 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish):
66 Likewise.
67
d1e50f8a
DJ
682006-11-02 Daniel Jacobowitz <dan@codesourcery.com>
69
70 * config/tc-h8300.c (build_bytes): Fix const warning.
71
06d2da93
NC
722006-11-01 Mei Ligang <ligang@sunnorth.com.cn>
73
74 * tc-score.c (do16_rdrs): Handle not! instruction especially.
75
3ba67470
PB
762006-10-31 Paul Brook <paul@codesourcery.com>
77
78 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
79 for EABIv4.
80
7a1d4c38
PB
812006-10-31 Paul Brook <paul@codesourcery.com>
82
83 gas/
84 * config/tc-arm.c (object_arch): New variable.
85 (s_arm_object_arch): New function.
86 (md_pseudo_table): Add object_arch.
87 (aeabi_set_public_attributes): Obey object_arch.
88 * doc/c-arm.texi: Document .object_arch.
89
b138abaa
NC
902006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
91
92 * tc-score.c (data_op2): Check invalid operands.
93 (my_get_expression): Const operand of some instructions can not be
94 symbol in assembly.
95 (get_insn_class_from_type): Handle instruction type Insn_internal.
96 (do_macro_ldst_label): Modify inst.type.
97 (Insn_PIC): Delete.
98 (data_op2): The immediate value in lw is 15 bit signed.
99
c79b7c30
RC
1002006-10-29 Randolph Chung <tausq@debian.org>
101
102 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
103 (hppa_regname_to_dw2regnum): New funcions.
104 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
105 (tc_cfi_frame_initial_instructions)
106 (tc_regname_to_dw2regnum): Define.
107 (hppa_cfi_frame_initial_instructions)
108 (hppa_regname_to_dw2regnum): Declare.
109 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
110 (DWARF2_CIE_DATA_ALIGNMENT): Define.
111
e2785c44
NC
1122006-10-29 Nick Clifton <nickc@redhat.com>
113
114 * config/tc-spu.c (md_assemble): Cast printf string size parameter
115 to int in order to avoid a compiler warning.
116
86157c20
AS
1172006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
118
119 * config/tc-sh.c (md_assemble): Define size of branches.
120
ba5f0fda
BE
1212006-10-26 Ben Elliston <bje@au.ibm.com>
122
123 * dw2gencfi.c (cfi_add_CFA_offset):
124 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero.
125
033cd5fd
BE
126 * write.c (chain_frchains_together_1): Assert that this function
127 never returns a pointer to the auto variable `dummy'.
128
e9f53129
AM
1292006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
130 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
131 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
132 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
133 Alan Modra <amodra@bigpond.net.au>
134
135 * config/tc-spu.c: New file.
136 * config/tc-spu.h: New file.
137 * configure.tgt: Add SPU support.
138 * Makefile.am: Likewise. Run "make dep-am".
139 * Makefile.in: Regenerate.
140 * po/POTFILES.in: Regenerate.
141
7b383517
BE
1422006-10-25 Ben Elliston <bje@au.ibm.com>
143
144 * expr.c (expr): Replace O_add case in switch (op_left) explaining
145 why it can never occur.
146
ede602d7
AM
1472006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
148
149 * doc/c-ppc.texi (-mcell): Document.
150 * config/tc-ppc.c (parse_cpu): Parse -mcell.
151 (md_show_usage): Document -mcell.
152
7918206c
MM
1532006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
154
155 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type.
156
878bcc43
AM
1572006-10-23 Alan Modra <amodra@bigpond.net.au>
158
159 * config/tc-m68hc11.c (md_assemble): Quiet warning.
160
8620418b
MF
1612006-10-19 Mike Frysinger <vapier@gentoo.org>
162
163 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
164 (x86_64_section_letter): Likewise.
165
b3549761
NC
1662006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
167
168 * config/tc-score.c (build_relax_frag): Compute correct
169 tc_frag_data.fixp.
170
71a75f6f
MF
1712006-10-18 Roy Marples <uberlord@gentoo.org>
172
173 * config/tc-sparc.c (md_parse_option): Treat any target starting with
a70ae331
AM
174 elf32-sparc as a viable target for the -32 switch and any target
175 starting with elf64-sparc as a viable target for the -64 switch.
176 (sparc_target_format): For 64-bit ELF flavoured output use
177 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use
178 ELF_TARGET_FORMAT.
71a75f6f
MF
179 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
180
e1b5fdd4
L
1812006-10-17 H.J. Lu <hongjiu.lu@intel.com>
182
183 * configure: Regenerated.
184
f8ef9cd7
BS
1852006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
186
187 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
188 in addition to testing for '\n'.
189 (TC_EOL_IN_INSN): Provide a default definition if necessary.
190
eb1fe072
NC
1912006-10-13 Sterling Augstine <sterling@tensilica.com>
192
193 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
194 a disjoint DW_AT range.
195
ec6e49f4
NC
1962006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
197
198 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
199
036dc3f7
PB
2002006-10-08 Paul Brook <paul@codesourcery.com>
201
202 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
203 (parse_operands): Use parse_big_immediate for OP_NILO.
204 (neon_cmode_for_logic_imm): Try smaller element sizes.
205 (neon_cmode_for_move_imm): Ditto.
206 (do_neon_logic): Handle .i64 pseudo-op.
207
3bb0c887
AM
2082006-09-29 Alan Modra <amodra@bigpond.net.au>
209
210 * po/POTFILES.in: Regenerate.
211
ef05d495
L
2122006-09-28 H.J. Lu <hongjiu.lu@intel.com>
213
214 * config/tc-i386.h (CpuMNI): Renamed to ...
215 (CpuSSSE3): This.
216 (CpuUnknownFlags): Updated.
217 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
218 and PROCESSOR_MEROM with PROCESSOR_CORE2.
219 * config/tc-i386.c: Updated.
220 * doc/c-i386.texi: Likewise.
a70ae331 221
ef05d495
L
222 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
223
d8ad03e9
NC
2242006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
225
226 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
227
df3ca5a3
NC
2282006-09-27 Nick Clifton <nickc@redhat.com>
229
230 * output-file.c (output_file_close): Prevent an infinite loop
231 reporting that stdoutput could not be closed.
232
2d447fca
JM
2332006-09-26 Mark Shinwell <shinwell@codesourcery.com>
234 Joseph Myers <joseph@codesourcery.com>
235 Ian Lance Taylor <ian@wasabisystems.com>
236 Ben Elliston <bje@wasabisystems.com>
237
238 * config/tc-arm.c (arm_cext_iwmmxt2): New.
239 (enum operand_parse_code): New code OP_RIWR_I32z.
240 (parse_operands): Handle OP_RIWR_I32z.
241 (do_iwmmxt_wmerge): New function.
242 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
243 a register.
244 (do_iwmmxt_wrwrwr_or_imm5): New function.
245 (insns): Mark instructions as RIWR_I32z as appropriate.
246 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
247 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
248 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
249 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
250 (md_begin): Handle IWMMXT2.
251 (arm_cpus): Add iwmmxt2.
252 (arm_extensions): Likewise.
253 (arm_archs): Likewise.
254
ba83aca1
BW
2552006-09-25 Bob Wilson <bob.wilson@acm.org>
256
257 * doc/as.texinfo (Overview): Revise description of --keep-locals.
258 Add xref to "Symbol Names".
259 (L): Refer to "local symbols" instead of "local labels". Move
260 definition to "Symbol Names" section; add xref to that section.
261 (Symbol Names): Use "Local Symbol Names" section to define local
262 symbols. Add "Local Labels" heading for description of temporary
263 forward/backward labels, and refer to those as "local labels".
264
539e75ad
L
2652006-09-23 H.J. Lu <hongjiu.lu@intel.com>
266
267 PR binutils/3235
268 * config/tc-i386.c (match_template): Check address size prefix
269 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
270 operand.
271
5e02f92e
AM
2722006-09-22 Alan Modra <amodra@bigpond.net.au>
273
274 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
275
885afe7b
AM
2762006-09-22 Alan Modra <amodra@bigpond.net.au>
277
278 * as.h (as_perror): Delete declaration.
279 * gdbinit.in (as_perror): Delete breakpoint.
280 * messages.c (as_perror): Delete function.
281 * doc/internals.texi: Remove as_perror description.
282 * listing.c (listing_print: Don't use as_perror.
283 * output-file.c (output_file_create, output_file_close): Likewise.
284 * symbols.c (symbol_create, symbol_clone): Likewise.
285 * write.c (write_contents): Likewise.
286 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
287 * config/tc-tic54x.c (tic54x_mlib): Likewise.
288
3aeeedbb
AM
2892006-09-22 Alan Modra <amodra@bigpond.net.au>
290
291 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
292 (ppc_handle_align): New function.
293 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
294 (SUB_SEGMENT_ALIGN): Define as zero.
295
96e9638b
BW
2962006-09-20 Bob Wilson <bob.wilson@acm.org>
297
298 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
299 (Overview): Skip cross reference in man page.
300
99ad8390
NC
3012006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
302
303 * configure.in: Add new target x86_64-pc-mingw64.
304 * configure: Regenerate.
305 * configure.tgt: Add new target x86_64-pc-mingw64.
a70ae331
AM
306 * config/obj-coff.h: Add handling for TE_PEP target specific code
307 and definitions.
99ad8390
NC
308 * config/tc-i386.c: Add new targets.
309 (md_parse_option): Add targets to OPTION_64.
a70ae331
AM
310 (x86_64_target_format): Add new method for setup proper default
311 target cpu mode.
99ad8390
NC
312 * config/te-pep.h: Add new target definition header.
313 (TE_PEP): New macro: Identifies new target architecture.
314 (COFF_WITH_pex64): Set proper includes in bfd.
315 * NEWS: Mention new target.
316
73332571
BS
3172006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
318
319 * config/bfin-parse.y (binary): Change sub of const to add of negated
320 const.
321
1c0d3aa6
NC
3222006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
323
324 * config/tc-score.c: New file.
325 * config/tc-score.h: Newf file.
326 * configure.tgt: Add Score target.
327 * Makefile.am: Add Score files.
328 * Makefile.in: Regenerate.
329 * NEWS: Mention new target support.
330
4fa3602b
PB
3312006-09-16 Paul Brook <paul@codesourcery.com>
332
333 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
334 * doc/c-arm.texi (movsp): Document offset argument.
335
16dd5e42
PB
3362006-09-16 Paul Brook <paul@codesourcery.com>
337
338 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
339 unsigned int to avoid 64-bit host problems.
340
c4ae04ce
BS
3412006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
342
343 * config/bfin-parse.y (binary): Do some more constant folding for
344 additions.
345
e5d4a5a6
JB
3462006-09-13 Jan Beulich <jbeulich@novell.com>
347
348 * input-file.c (input_file_give_next_buffer): Demote as_bad to
349 as_warn.
350
1a1219cb
AM
3512006-09-13 Alan Modra <amodra@bigpond.net.au>
352
353 PR gas/3165
354 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
355 in parens.
356
f79d9c1d
AM
3572006-09-13 Alan Modra <amodra@bigpond.net.au>
358
359 * input-file.c (input_file_open): Replace as_perror with as_bad
360 so that gas exits with error on file errors. Correct error
361 message.
362 (input_file_get, input_file_give_next_buffer): Likewise.
e336c79f 363 * input-file.h: Update comment.
f79d9c1d 364
f512f76f
NC
3652006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
366
367 PR gas/3172
368 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
369 registers as a sub-class of wC registers.
370
8d79fd44
AM
3712006-09-11 Alan Modra <amodra@bigpond.net.au>
372
373 PR gas/3165
374 * config/tc-mips.h (enum dwarf2_format): Forward declare.
375 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
376 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
377 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
378
6258339f
NC
3792006-09-08 Nick Clifton <nickc@redhat.com>
380
381 PR gas/3129
382 * doc/as.texinfo (Macro): Improve documentation about separating
383 macro arguments from following text.
384
f91e006c
PB
3852006-09-08 Paul Brook <paul@codesourcery.com>
386
387 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
388
466bbf93
PB
3892006-09-07 Paul Brook <paul@codesourcery.com>
390
391 * config/tc-arm.c (parse_operands): Mark operand as present.
392
428e3f1f
PB
3932006-09-04 Paul Brook <paul@codesourcery.com>
394
395 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
396 (do_neon_dyadic_if_i_d): Avoid setting U bit.
397 (do_neon_mac_maybe_scalar): Ditto.
398 (do_neon_dyadic_narrow): Force operand type to NT_integer.
399 (insns): Remove out of date comments.
400
fb25138b
NC
4012006-08-29 Nick Clifton <nickc@redhat.com>
402
403 * read.c (s_align): Initialize the 'stopc' variable to prevent
404 compiler complaints about it being used without being
405 initialized.
406 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
407 s_float_space, s_struct, cons_worker, equals): Likewise.
408
5091343a
AM
4092006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
410
411 * ecoff.c (ecoff_directive_val): Fix message typo.
412 * config/tc-ns32k.c (convert_iif): Likewise.
413 * config/tc-sh64.c (shmedia_check_limits): Likewise.
414
1f2a7e38
BW
4152006-08-25 Sterling Augustine <sterling@tensilica.com>
416 Bob Wilson <bob.wilson@acm.org>
417
418 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
419 the state of the absolute_literals directive. Remove align frag at
420 the start of the literal pool position.
421
34135039
BW
4222006-08-25 Bob Wilson <bob.wilson@acm.org>
423
424 * doc/c-xtensa.texi: Add @group commands in examples.
425
74869ac7
BW
4262006-08-24 Bob Wilson <bob.wilson@acm.org>
427
428 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
429 (INIT_LITERAL_SECTION_NAME): Delete.
430 (lit_state struct): Remove segment names, init_lit_seg, and
431 fini_lit_seg. Add lit_prefix and current_text_seg.
432 (init_literal_head_h, init_literal_head): Delete.
433 (fini_literal_head_h, fini_literal_head): Delete.
434 (xtensa_begin_directive): Move argument parsing to
435 xtensa_literal_prefix function.
436 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
437 (xtensa_literal_prefix): Parse the directive argument here and
438 record it in the lit_prefix field. Remove code to derive literal
439 section names.
440 (linkonce_len): New.
441 (get_is_linkonce_section): Use linkonce_len. Check for any
442 ".gnu.linkonce.*" section, not just text sections.
443 (md_begin): Remove initialization of deleted lit_state fields.
444 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
445 to init_literal_head and fini_literal_head.
446 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
447 when traversing literal_head list.
448 (match_section_group): New.
449 (cache_literal_section): Rewrite to determine the literal section
450 name on the fly, create the section and return it.
451 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
452 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
453 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
454 Use xtensa_get_property_section from bfd.
455 (retrieve_xtensa_section): Delete.
456 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
457 description to refer to plural literal sections and add xref to
458 the Literal Directive section.
459 (Literal Directive): Describe new rules for deriving literal section
460 names. Add footnote for special case of .init/.fini with
461 --text-section-literals.
462 (Literal Prefix Directive): Replace old naming rules with xref to the
463 Literal Directive section.
464
87a1fd79
JM
4652006-08-21 Joseph Myers <joseph@codesourcery.com>
466
467 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
468 merging with previous long opcode.
469
7148cc28
NC
4702006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
471
472 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
473 * Makefile.in: Regenerate.
474 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
475 renamed. Adjust.
476
3e9e4fcf
JB
4772006-08-16 Julian Brown <julian@codesourcery.com>
478
479 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
480 to use ARM instructions on non-ARM-supporting cores.
481 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
482 mode automatically based on cpu variant.
483 (md_begin): Call above function.
484
267d2029
JB
4852006-08-16 Julian Brown <julian@codesourcery.com>
486
487 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
488 recognized in non-unified syntax mode.
489
4be041b2
TS
4902006-08-15 Thiemo Seufer <ths@mips.com>
491 Nigel Stephens <nigel@mips.com>
492 David Ung <davidu@mips.com>
493
494 * configure.tgt: Handle mips*-sde-elf*.
495
3a93f742
TS
4962006-08-12 Thiemo Seufer <ths@networkno.de>
497
498 * config/tc-mips.c (mips16_ip): Fix argument register handling
499 for restore instruction.
500
1737851b
BW
5012006-08-08 Bob Wilson <bob.wilson@acm.org>
502
503 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
504 (out_sleb128): New.
505 (out_fixed_inc_line_addr): New.
506 (process_entries): Use out_fixed_inc_line_addr when
507 DWARF2_USE_FIXED_ADVANCE_PC is set.
508 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
509
e14e52f8
DD
5102006-08-08 DJ Delorie <dj@redhat.com>
511
512 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
513 vs full symbols so that we never have more than one pointer value
514 for any given symbol in our symbol table.
515
802f5d9e
NC
5162006-08-08 Sterling Augustine <sterling@tensilica.com>
517
518 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
519 and emit DW_AT_ranges when code in compilation unit is not
520 contiguous.
521 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
522 is not contiguous.
523 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
524 (out_debug_ranges): New function to emit .debug_ranges section
525 when code is not contiguous.
526
720abc60
NC
5272006-08-08 Nick Clifton <nickc@redhat.com>
528
529 * config/tc-arm.c (WARN_DEPRECATED): Enable.
530
f0927246
NC
5312006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
532
533 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
534 only block.
535 (pe_directive_secrel) [TE_PE]: New function.
536 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
537 loc, loc_mark_labels.
538 [TE_PE]: Handle secrel32.
539 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
540 call.
541 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
542 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
543 (md_section_align): Only round section sizes here for AOUT
544 targets.
545 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
546 (tc_pe_dwarf2_emit_offset): New function.
547 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
548 (cons_fix_new_arm): Handle O_secrel.
549 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
550 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
551 of OBJ_ELF only block.
552 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
553 tc_pe_dwarf2_emit_offset.
554
55e6e397
RS
5552006-08-04 Richard Sandiford <richard@codesourcery.com>
556
557 * config/tc-sh.c (apply_full_field_fix): New function.
558 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
559 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
560 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
561 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
562
9cd19b17
NC
5632006-08-03 Nick Clifton <nickc@redhat.com>
564
565 PR gas/2991
566 * config.in: Regenerate.
567
97f87066
JM
5682006-08-03 Joseph Myers <joseph@codesourcery.com>
569
570 * config/tc-arm.c (parse_operands): Handle invalid register name
a70ae331 571 for OP_RIWR_RIWC.
97f87066 572
41adaa5c
JM
5732006-08-03 Joseph Myers <joseph@codesourcery.com>
574
575 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
576 (parse_operands): Handle it.
577 (insns): Use it for tmcr and tmrc.
578
9d7cbccd
NC
5792006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
580
581 PR binutils/2983
582 * config/tc-i386.c (md_parse_option): Treat any target starting
583 with elf64_x86_64 as a viable target for the -64 switch.
584 (i386_target_format): For 64-bit ELF flavoured output use
585 ELF_TARGET_FORMAT64.
586 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
587
c973bc5c
NC
5882006-08-02 Nick Clifton <nickc@redhat.com>
589
590 PR gas/2991
591 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
592 bfd/aclocal.m4.
593 * configure.in: Run BFD_BINARY_FOPEN.
594 * configure: Regenerate.
595 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
596 file to include.
597
cfde7f70
L
5982006-08-01 H.J. Lu <hongjiu.lu@intel.com>
599
600 * config/tc-i386.c (md_assemble): Don't update
601 cpu_arch_isa_flags.
602
b4c71f56
TS
6032006-08-01 Thiemo Seufer <ths@mips.com>
604
605 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
606
54f4ddb3
TS
6072006-08-01 Thiemo Seufer <ths@mips.com>
608
609 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
610 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
611 BFD_RELOC_32 and BFD_RELOC_16.
612 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
613 md_convert_frag, md_obj_end): Fix comment formatting.
614
d103cf61
TS
6152006-07-31 Thiemo Seufer <ths@mips.com>
616
617 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
618 handling for BFD_RELOC_MIPS16_JMP.
619
601e61cd
NC
6202006-07-24 Andreas Schwab <schwab@suse.de>
621
622 PR/2756
623 * read.c (read_a_source_file): Ignore unknown text after line
624 comment character. Fix misleading comment.
625
b45619c0
NC
6262006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
627
628 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
629 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
630 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
631 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
632 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
633 doc/c-z80.texi, doc/internals.texi: Fix some typos.
634
784906c5
NC
6352006-07-21 Nick Clifton <nickc@redhat.com>
636
637 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
638 linker testsuite.
639
d5f010e9
TS
6402006-07-20 Thiemo Seufer <ths@mips.com>
641 Nigel Stephens <nigel@mips.com>
642
643 * config/tc-mips.c (md_parse_option): Don't infer optimisation
644 options from debug options.
645
35d3d567
TS
6462006-07-20 Thiemo Seufer <ths@mips.com>
647
648 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
649 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
650
401a54cf
PB
6512006-07-19 Paul Brook <paul@codesourcery.com>
652
653 * config/tc-arm.c (insns): Fix rbit Arm opcode.
654
16805f35
PB
6552006-07-18 Paul Brook <paul@codesourcery.com>
656
657 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
658 (md_convert_frag): Use correct reloc for add_pc. Use
659 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
660 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
661 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
662
d9e05e4e
AM
6632006-07-17 Mat Hostetter <mat@lcs.mit.edu>
664
665 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
666 when file and line unknown.
667
f43abd2b
TS
6682006-07-17 Thiemo Seufer <ths@mips.com>
669
670 * read.c (s_struct): Use IS_ELF.
671 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
672 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
673 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
674 s_mips_mask): Likewise.
675
a2902af6
TS
6762006-07-16 Thiemo Seufer <ths@mips.com>
677 David Ung <davidu@mips.com>
678
679 * read.c (s_struct): Handle ELF section changing.
680 * config/tc-mips.c (s_align): Leave enabling auto-align to the
681 generic code.
682 (s_change_sec): Try section changing only if we output ELF.
683
d32cad65
L
6842006-07-15 H.J. Lu <hongjiu.lu@intel.com>
685
686 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
687 CpuAmdFam10.
688 (smallest_imm_type): Remove Cpu086.
689 (i386_target_format): Likewise.
690
691 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
692 Update CpuXXX.
693
050dfa73
MM
6942006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
695 Michael Meissner <michael.meissner@amd.com>
696
697 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
698 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
699 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
700 architecture.
701 (i386_align_code): Ditto.
702 (md_assemble_code): Add support for insertq/extrq instructions,
703 swapping as needed for intel syntax.
704 (swap_imm_operands): New function to swap immediate operands.
705 (swap_operands): Deal with 4 operand instructions.
706 (build_modrm_byte): Add support for insertq instruction.
707
6b2de085
L
7082006-07-13 H.J. Lu <hongjiu.lu@intel.com>
709
710 * config/tc-i386.h (Size64): Fix a typo in comment.
711
01eaea5a
NC
7122006-07-12 Nick Clifton <nickc@redhat.com>
713
714 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
7cfe9437 715 fixup_segment() to repeat a range check on a value that has
01eaea5a
NC
716 already been checked here.
717
1e85aad8
JW
7182006-07-07 James E Wilson <wilson@specifix.com>
719
720 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
721
1370e33d
NC
7222006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
723 Nick Clifton <nickc@redhat.com>
724
725 PR binutils/2877
726 * doc/as.texi: Fix spelling typo: branchs => branches.
727 * doc/c-m68hc11.texi: Likewise.
728 * config/tc-m68hc11.c: Likewise.
729 Support old spelling of command line switch for backwards
730 compatibility.
731
5f0fe04b
TS
7322006-07-04 Thiemo Seufer <ths@mips.com>
733 David Ung <davidu@mips.com>
734
735 * config/tc-mips.c (s_is_linkonce): New function.
736 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
737 weak, external, and linkonce symbols.
738 (pic_need_relax): Use s_is_linkonce.
739
85234291
L
7402006-06-24 H.J. Lu <hongjiu.lu@intel.com>
741
742 * doc/as.texinfo (Org): Remove space.
743 (P2align): Add "@var{abs-expr},".
744
ccc9c027
L
7452006-06-23 H.J. Lu <hongjiu.lu@intel.com>
746
747 * config/tc-i386.c (cpu_arch_tune_set): New.
748 (cpu_arch_isa): Likewise.
749 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
750 nops with short or long nop sequences based on -march=/.arch
751 and -mtune=.
752 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
753 set cpu_arch_tune and cpu_arch_tune_flags.
754 (md_parse_option): For -march=, set cpu_arch_isa and set
755 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
756 0. Set cpu_arch_tune_set to 1 for -mtune=.
757 (i386_target_format): Don't set cpu_arch_tune.
758
d4dc2f22
TS
7592006-06-23 Nigel Stephens <nigel@mips.com>
760
761 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
762 generated .sbss.* and .gnu.linkonce.sb.*.
763
a8dbcb85
TS
7642006-06-23 Thiemo Seufer <ths@mips.com>
765 David Ung <davidu@mips.com>
766
767 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
768 label_list.
769 * config/tc-mips.c (label_list): Define per-segment label_list.
770 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
771 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
772 mips_from_file_after_relocs, mips_define_label): Use per-segment
773 label_list.
774
3994f87e
TS
7752006-06-22 Thiemo Seufer <ths@mips.com>
776
777 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
778 (append_insn): Use it.
779 (md_apply_fix): Whitespace formatting.
780 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
781 mips16_extended_frag): Remove register specifier.
782 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
783 constants.
784
fa073d69
MS
7852006-06-21 Mark Shinwell <shinwell@codesourcery.com>
786
787 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
788 a directive saving VFP registers for ARMv6 or later.
789 (s_arm_unwind_save): Add parameter arch_v6 and call
790 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
791 appropriate.
792 (md_pseudo_table): Add entry for new "vsave" directive.
793 * doc/c-arm.texi: Correct error in example for "save"
794 directive (fstmdf -> fstmdx). Also document "vsave" directive.
795
8e77b565 7962006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
026dcbd7
DC
797 Anatoly Sokolov <aesok@post.ru>
798
a70ae331
AM
799 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
800 and atmega644p devices. Rename atmega164/atmega324 devices to
026dcbd7
DC
801 atmega164p/atmega324p.
802 * doc/c-avr.texi: Document new mcu and arch options.
803
8b1ad454
NC
8042006-06-17 Nick Clifton <nickc@redhat.com>
805
806 * config/tc-arm.c (enum parse_operand_result): Move outside of
807 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
808
9103f4f4
L
8092006-06-16 H.J. Lu <hongjiu.lu@intel.com>
810
811 * config/tc-i386.h (processor_type): New.
812 (arch_entry): Add type.
813
814 * config/tc-i386.c (cpu_arch_tune): New.
815 (cpu_arch_tune_flags): Likewise.
816 (cpu_arch_isa_flags): Likewise.
817 (cpu_arch): Updated.
818 (set_cpu_arch): Also update cpu_arch_isa_flags.
819 (md_assemble): Update cpu_arch_isa_flags.
820 (OPTION_MARCH): New.
821 (OPTION_MTUNE): Likewise.
822 (md_longopts): Add -march= and -mtune=.
823 (md_parse_option): Support -march= and -mtune=.
824 (md_show_usage): Add -march=CPU/-mtune=CPU.
825 (i386_target_format): Also update cpu_arch_isa_flags,
826 cpu_arch_tune and cpu_arch_tune_flags.
827
828 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
829
830 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
831
4962c51a
MS
8322006-06-15 Mark Shinwell <shinwell@codesourcery.com>
833
834 * config/tc-arm.c (enum parse_operand_result): New.
835 (struct group_reloc_table_entry): New.
836 (enum group_reloc_type): New.
837 (group_reloc_table): New array.
838 (find_group_reloc_table_entry): New function.
839 (parse_shifter_operand_group_reloc): New function.
840 (parse_address_main): New function, incorporating code
841 from the old parse_address function. To be used via...
842 (parse_address): wrapper for parse_address_main; and
843 (parse_address_group_reloc): new function, likewise.
844 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
845 OP_ADDRGLDRS, OP_ADDRGLDC.
846 (parse_operands): Support for these new operand codes.
847 New macro po_misc_or_fail_no_backtrack.
848 (encode_arm_cp_address): Preserve group relocations.
849 (insns): Modify to use the above operand codes where group
850 relocations are permitted.
851 (md_apply_fix): Handle the group relocations
852 ALU_PC_G0_NC through LDC_SB_G2.
853 (tc_gen_reloc): Likewise.
854 (arm_force_relocation): Leave group relocations for the linker.
855 (arm_fix_adjustable): Likewise.
856
cd2f129f
JB
8572006-06-15 Julian Brown <julian@codesourcery.com>
858
859 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
860 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
861 relocs properly.
862
46e883c5
L
8632006-06-12 H.J. Lu <hongjiu.lu@intel.com>
864
865 * config/tc-i386.c (process_suffix): Don't add rex64 for
866 "xchg %rax,%rax".
867
1787fe5b
TS
8682006-06-09 Thiemo Seufer <ths@mips.com>
869
870 * config/tc-mips.c (mips_ip): Maintain argument count.
871
96f989c2
AM
8722006-06-09 Alan Modra <amodra@bigpond.net.au>
873
874 * config/tc-iq2000.c: Include sb.h.
875
7c752c2a
TS
8762006-06-08 Nigel Stephens <nigel@mips.com>
877
878 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
879 aliases for better compatibility with SGI tools.
880
03bf704f
AM
8812006-06-08 Alan Modra <amodra@bigpond.net.au>
882
883 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
884 * Makefile.am (GASLIBS): Expand @BFDLIB@.
885 (BFDVER_H): Delete.
886 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
887 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
888 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
889 Run "make dep-am".
890 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
891 * Makefile.in: Regenerate.
892 * doc/Makefile.in: Regenerate.
893 * configure: Regenerate.
894
6648b7cf
JM
8952006-06-07 Joseph S. Myers <joseph@codesourcery.com>
896
897 * po/Make-in (pdf, ps): New dummy targets.
898
037e8744
JB
8992006-06-07 Julian Brown <julian@codesourcery.com>
900
901 * config/tc-arm.c (stdarg.h): include.
902 (arm_it): Add uncond_value field. Add isvec and issingle to operand
903 array.
904 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
905 REG_TYPE_NSDQ (single, double or quad vector reg).
906 (reg_expected_msgs): Update.
907 (BAD_FPU): Add macro for unsupported FPU instruction error.
908 (parse_neon_type): Support 'd' as an alias for .f64.
909 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
910 sets of registers.
911 (parse_vfp_reg_list): Don't update first arg on error.
912 (parse_neon_mov): Support extra syntax for VFP moves.
913 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
914 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
915 (parse_operands): Support isvec, issingle operands fields, new parse
916 codes above.
917 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
918 msr variants.
919 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
920 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
921 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
922 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
923 shapes.
924 (neon_shape): Redefine in terms of above.
925 (neon_shape_class): New enumeration, table of shape classes.
926 (neon_shape_el): New enumeration. One element of a shape.
927 (neon_shape_el_size): Register widths of above, where appropriate.
928 (neon_shape_info): New struct. Info for shape table.
929 (neon_shape_tab): New array.
930 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
931 (neon_check_shape): Rewrite as...
932 (neon_select_shape): New function to classify instruction shapes,
933 driven by new table neon_shape_tab array.
934 (neon_quad): New function. Return 1 if shape should set Q flag in
935 instructions (or equivalent), 0 otherwise.
936 (type_chk_of_el_type): Support F64.
937 (el_type_of_type_chk): Likewise.
938 (neon_check_type): Add support for VFP type checking (VFP data
939 elements fill their containing registers).
940 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
941 in thumb mode for VFP instructions.
942 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
943 and encode the current instruction as if it were that opcode.
944 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
945 arguments, call function in PFN.
946 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
947 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
948 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
949 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
950 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
951 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
952 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
953 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
954 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
955 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
956 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
957 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
958 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
959 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
960 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
961 neon_quad.
962 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
963 between VFP and Neon turns out to belong to Neon. Perform
964 architecture check and fill in condition field if appropriate.
965 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
966 (do_neon_cvt): Add support for VFP variants of instructions.
967 (neon_cvt_flavour): Extend to cover VFP conversions.
968 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
969 vmov variants.
970 (do_neon_ldr_str): Handle single-precision VFP load/store.
971 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
972 NS_NULL not NS_IGNORE.
973 (opcode_tag): Add OT_csuffixF for operands which either take a
974 conditional suffix, or have 0xF in the condition field.
975 (md_assemble): Add support for OT_csuffixF.
976 (NCE): Replace macro with...
977 (NCE_tag, NCE, NCEF): New macros.
978 (nCE): Replace macro with...
979 (nCE_tag, nCE, nCEF): New macros.
980 (insns): Add support for VFP insns or VFP versions of insns msr,
981 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
982 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
983 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
984 VFP/Neon insns together.
985
ebd1c875
AM
9862006-06-07 Alan Modra <amodra@bigpond.net.au>
987 Ladislav Michl <ladis@linux-mips.org>
988
989 * app.c: Don't include headers already included by as.h.
990 * as.c: Likewise.
991 * atof-generic.c: Likewise.
992 * cgen.c: Likewise.
993 * dwarf2dbg.c: Likewise.
994 * expr.c: Likewise.
995 * input-file.c: Likewise.
996 * input-scrub.c: Likewise.
997 * macro.c: Likewise.
998 * output-file.c: Likewise.
999 * read.c: Likewise.
1000 * sb.c: Likewise.
1001 * config/bfin-lex.l: Likewise.
1002 * config/obj-coff.h: Likewise.
1003 * config/obj-elf.h: Likewise.
1004 * config/obj-som.h: Likewise.
1005 * config/tc-arc.c: Likewise.
1006 * config/tc-arm.c: Likewise.
1007 * config/tc-avr.c: Likewise.
1008 * config/tc-bfin.c: Likewise.
1009 * config/tc-cris.c: Likewise.
1010 * config/tc-d10v.c: Likewise.
1011 * config/tc-d30v.c: Likewise.
1012 * config/tc-dlx.h: Likewise.
1013 * config/tc-fr30.c: Likewise.
1014 * config/tc-frv.c: Likewise.
1015 * config/tc-h8300.c: Likewise.
1016 * config/tc-hppa.c: Likewise.
1017 * config/tc-i370.c: Likewise.
1018 * config/tc-i860.c: Likewise.
1019 * config/tc-i960.c: Likewise.
1020 * config/tc-ip2k.c: Likewise.
1021 * config/tc-iq2000.c: Likewise.
1022 * config/tc-m32c.c: Likewise.
1023 * config/tc-m32r.c: Likewise.
1024 * config/tc-maxq.c: Likewise.
1025 * config/tc-mcore.c: Likewise.
1026 * config/tc-mips.c: Likewise.
1027 * config/tc-mmix.c: Likewise.
1028 * config/tc-mn10200.c: Likewise.
1029 * config/tc-mn10300.c: Likewise.
1030 * config/tc-msp430.c: Likewise.
1031 * config/tc-mt.c: Likewise.
1032 * config/tc-ns32k.c: Likewise.
1033 * config/tc-openrisc.c: Likewise.
1034 * config/tc-ppc.c: Likewise.
1035 * config/tc-s390.c: Likewise.
1036 * config/tc-sh.c: Likewise.
1037 * config/tc-sh64.c: Likewise.
1038 * config/tc-sparc.c: Likewise.
1039 * config/tc-tic30.c: Likewise.
1040 * config/tc-tic4x.c: Likewise.
1041 * config/tc-tic54x.c: Likewise.
1042 * config/tc-v850.c: Likewise.
1043 * config/tc-vax.c: Likewise.
1044 * config/tc-xc16x.c: Likewise.
1045 * config/tc-xstormy16.c: Likewise.
1046 * config/tc-xtensa.c: Likewise.
1047 * config/tc-z80.c: Likewise.
1048 * config/tc-z8k.c: Likewise.
1049 * macro.h: Don't include sb.h or ansidecl.h.
1050 * sb.h: Don't include stdio.h or ansidecl.h.
1051 * cond.c: Include sb.h.
1052 * itbl-lex.l: Include as.h instead of other system headers.
1053 * itbl-parse.y: Likewise.
1054 * itbl-ops.c: Similarly.
1055 * itbl-ops.h: Don't include as.h or ansidecl.h.
1056 * config/bfin-defs.h: Don't include bfd.h or as.h.
1057 * config/bfin-parse.y: Include as.h instead of other system headers.
1058
9622b051
AM
10592006-06-06 Ben Elliston <bje@au.ibm.com>
1060 Anton Blanchard <anton@samba.org>
1061
1062 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
1063 (md_show_usage): Document it.
1064 (ppc_setup_opcodes): Test power6 opcode flag bits.
1065 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
1066
65263ce3
TS
10672006-06-06 Thiemo Seufer <ths@mips.com>
1068 Chao-ying Fu <fu@mips.com>
1069
1070 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
1071 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
1072 (macro_build): Update comment.
1073 (mips_ip): Allow DSP64 instructions for MIPS64R2.
1074 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
1075 CPU_HAS_MDMX.
1076 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
1077 MIPS_CPU_ASE_MDMX flags for sb1.
1078
a9e24354
TS
10792006-06-05 Thiemo Seufer <ths@mips.com>
1080
1081 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
1082 appropriate.
1083 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
1084 (mips_ip): Make overflowed/underflowed constant arguments in DSP
1085 and MT instructions a fatal error. Use INSERT_OPERAND where
1086 appropriate. Improve warnings for break and wait code overflows.
1087 Use symbolic constant of OP_MASK_COPZ.
1088 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
1089
4cfe2c59
DJ
10902006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1091
1092 * po/Make-in (top_builddir): Define.
1093
e10fad12
JM
10942006-06-02 Joseph S. Myers <joseph@codesourcery.com>
1095
1096 * doc/Makefile.am (TEXI2DVI): Define.
1097 * doc/Makefile.in: Regenerate.
1098 * doc/c-arc.texi: Fix typo.
1099
12e64c2c
AM
11002006-06-01 Alan Modra <amodra@bigpond.net.au>
1101
1102 * config/obj-ieee.c: Delete.
1103 * config/obj-ieee.h: Delete.
1104 * Makefile.am (OBJ_FORMATS): Remove ieee.
1105 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
1106 (obj-ieee.o): Remove rule.
1107 * Makefile.in: Regenerate.
1108 * configure.in (atof): Remove tahoe.
1109 (OBJ_MAYBE_IEEE): Don't define.
1110 * configure: Regenerate.
1111 * config.in: Regenerate.
1112 * doc/Makefile.in: Regenerate.
1113 * po/POTFILES.in: Regenerate.
1114
20e95c23
DJ
11152006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1116
1117 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
1118 and LIBINTL_DEP everywhere.
1119 (INTLLIBS): Remove.
1120 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
1121 * acinclude.m4: Include new gettext macros.
1122 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
1123 Remove local code for po/Makefile.
1124 * Makefile.in, configure, doc/Makefile.in: Regenerated.
1125
eebf07fb
NC
11262006-05-30 Nick Clifton <nickc@redhat.com>
1127
1128 * po/es.po: Updated Spanish translation.
1129
b6aee19e
DC
11302006-05-06 Denis Chertykov <denisc@overta.ru>
1131
1132 * doc/c-avr.texi: New file.
1133 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
1134 * doc/all.texi: Set AVR
1135 * doc/as.texinfo: Include c-avr.texi
1136
f8fdc850 11372006-05-28 Jie Zhang <jie.zhang@analog.com>
a70ae331 1138
f8fdc850
JZ
1139 * config/bfin-parse.y (check_macfunc): Loose the condition of
1140 calling check_multiply_halfregs ().
1141
a3205465
JZ
11422006-05-25 Jie Zhang <jie.zhang@analog.com>
1143
1144 * config/bfin-parse.y (asm_1): Better check and deal with
1145 vector and scalar Multiply 16-Bit Operands instructions.
1146
9b52905e
NC
11472006-05-24 Nick Clifton <nickc@redhat.com>
1148
1149 * config/tc-hppa.c: Convert to ISO C90 format.
1150 * config/tc-hppa.h: Likewise.
1151
11522006-05-24 Carlos O'Donell <carlos@systemhalted.org>
1153 Randolph Chung <randolph@tausq.org>
a70ae331 1154
9b52905e
NC
1155 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
1156 is_tls_ieoff, is_tls_leoff): Define.
1157 (fix_new_hppa): Handle TLS.
1158 (cons_fix_new_hppa): Likewise.
1159 (pa_ip): Likewise.
1160 (md_apply_fix): Handle TLS relocs.
1161 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1162
a70ae331 11632006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
28c9d252
NC
1164
1165 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1166
ad3fea08
TS
11672006-05-23 Thiemo Seufer <ths@mips.com>
1168 David Ung <davidu@mips.com>
1169 Nigel Stephens <nigel@mips.com>
1170
1171 [ gas/ChangeLog ]
1172 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1173 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1174 ISA_HAS_MXHC1): New macros.
1175 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1176 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1177 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1178 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1179 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1180 (mips_after_parse_args): Change default handling of float register
1181 size to account for 32bit code with 64bit FP. Better sanity checking
1182 of ISA/ASE/ABI option combinations.
1183 (s_mipsset): Support switching of GPR and FPR sizes via
1184 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1185 options.
1186 (mips_elf_final_processing): We should record the use of 64bit FP
1187 registers in 32bit code but we don't, because ELF header flags are
1188 a scarce ressource.
1189 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1190 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1191 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1192 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1193 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1194 missing -march options. Document .set arch=CPU. Move .set smartmips
1195 to ASE page. Use @code for .set FOO examples.
1196
8b64503a
JZ
11972006-05-23 Jie Zhang <jie.zhang@analog.com>
1198
1199 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1200 if needed.
1201
403022e0
JZ
12022006-05-23 Jie Zhang <jie.zhang@analog.com>
1203
1204 * config/bfin-defs.h (bfin_equals): Remove declaration.
1205 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1206 * config/tc-bfin.c (bfin_name_is_register): Remove.
1207 (bfin_equals): Remove.
1208 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1209 (bfin_name_is_register): Remove declaration.
1210
7455baf8
TS
12112006-05-19 Thiemo Seufer <ths@mips.com>
1212 Nigel Stephens <nigel@mips.com>
1213
1214 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1215 (mips_oddfpreg_ok): New function.
1216 (mips_ip): Use it.
1217
707bfff6
TS
12182006-05-19 Thiemo Seufer <ths@mips.com>
1219 David Ung <davidu@mips.com>
1220
1221 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1222 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1223 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1224 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1225 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1226 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1227 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1228 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1229 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1230 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1231 reg_names_o32, reg_names_n32n64): Define register classes.
1232 (reg_lookup): New function, use register classes.
1233 (md_begin): Reserve register names in the symbol table. Simplify
1234 OBJ_ELF defines.
1235 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1236 Use reg_lookup.
1237 (mips16_ip): Use reg_lookup.
1238 (tc_get_register): Likewise.
1239 (tc_mips_regname_to_dw2regnum): New function.
1240
1df69f4f
TS
12412006-05-19 Thiemo Seufer <ths@mips.com>
1242
1243 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1244 Un-constify string argument.
1245 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1246 Likewise.
1247 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1248 Likewise.
1249 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1250 Likewise.
1251 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1252 Likewise.
1253 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1254 Likewise.
1255 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1256 Likewise.
1257
377260ba
NS
12582006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1259
1260 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1261 cfloat/m68881 to correct architecture before using it.
1262
cce7653b
NC
12632006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1264
a70ae331 1265 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
cce7653b
NC
1266 constant values.
1267
b0796911
PB
12682006-05-15 Paul Brook <paul@codesourcery.com>
1269
1270 * config/tc-arm.c (arm_adjust_symtab): Use
1271 bfd_is_arm_special_symbol_name.
1272
64b607e6
BW
12732006-05-15 Bob Wilson <bob.wilson@acm.org>
1274
1275 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1276 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1277 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1278 Handle errors from calls to xtensa_opcode_is_* functions.
1279
9b3f89ee
TS
12802006-05-14 Thiemo Seufer <ths@mips.com>
1281
1282 * config/tc-mips.c (macro_build): Test for currently active
1283 mips16 option.
1284 (mips16_ip): Reject invalid opcodes.
1285
370b66a1
CD
12862006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1287
1288 * doc/as.texinfo: Rename "Index" to "AS Index",
1289 and "ABORT" to "ABORT (COFF)".
1290
b6895b4f
PB
12912006-05-11 Paul Brook <paul@codesourcery.com>
1292
1293 * config/tc-arm.c (parse_half): New function.
1294 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1295 (parse_operands): Ditto.
1296 (do_mov16): Reject invalid relocations.
1297 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1298 (insns): Replace Iffff with HALF.
1299 (md_apply_fix): Add MOVW and MOVT relocs.
1300 (tc_gen_reloc): Ditto.
1301 * doc/c-arm.texi: Document relocation operators
1302
e28387c3
PB
13032006-05-11 Paul Brook <paul@codesourcery.com>
1304
1305 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1306
89ee2ebe
TS
13072006-05-11 Thiemo Seufer <ths@mips.com>
1308
1309 * config/tc-mips.c (append_insn): Don't check the range of j or
1310 jal addresses.
1311
53baae48
NC
13122006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1313
1314 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
a70ae331 1315 relocs against external symbols for WinCE targets.
53baae48
NC
1316 (md_apply_fix): Likewise.
1317
4e2a74a8
TS
13182006-05-09 David Ung <davidu@mips.com>
1319
1320 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1321 j or jal address.
1322
337ff0a5
NC
13232006-05-09 Nick Clifton <nickc@redhat.com>
1324
1325 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1326 against symbols which are not going to be placed into the symbol
1327 table.
1328
8c9f705e
BE
13292006-05-09 Ben Elliston <bje@au.ibm.com>
1330
1331 * expr.c (operand): Remove `if (0 && ..)' statement and
1332 subsequently unused target_op label. Collapse `if (1 || ..)'
1333 statement.
1334 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1335 separately above the switch.
1336
2fd0d2ac
NC
13372006-05-08 Nick Clifton <nickc@redhat.com>
1338
1339 PR gas/2623
1340 * config/tc-msp430.c (line_separator_character): Define as |.
1341
e16bfa71
TS
13422006-05-08 Thiemo Seufer <ths@mips.com>
1343 Nigel Stephens <nigel@mips.com>
1344 David Ung <davidu@mips.com>
1345
1346 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1347 (mips_opts): Likewise.
1348 (file_ase_smartmips): New variable.
1349 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1350 (macro_build): Handle SmartMIPS instructions.
1351 (mips_ip): Likewise.
1352 (md_longopts): Add argument handling for smartmips.
1353 (md_parse_options, mips_after_parse_args): Likewise.
1354 (s_mipsset): Add .set smartmips support.
1355 (md_show_usage): Document -msmartmips/-mno-smartmips.
1356 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1357 .set smartmips.
1358 * doc/c-mips.texi: Likewise.
1359
32638454
AM
13602006-05-08 Alan Modra <amodra@bigpond.net.au>
1361
1362 * write.c (relax_segment): Add pass count arg. Don't error on
1363 negative org/space on first two passes.
1364 (relax_seg_info): New struct.
1365 (relax_seg, write_object_file): Adjust.
1366 * write.h (relax_segment): Update prototype.
1367
b7fc2769
JB
13682006-05-05 Julian Brown <julian@codesourcery.com>
1369
1370 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1371 checking.
1372 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1373 architecture version checks.
1374 (insns): Allow overlapping instructions to be used in VFP mode.
1375
7f841127
L
13762006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1377
1378 PR gas/2598
1379 * config/obj-elf.c (obj_elf_change_section): Allow user
1380 specified SHF_ALPHA_GPREL.
1381
73160847
NC
13822006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1383
1384 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1385 for PMEM related expressions.
1386
56487c55
NC
13872006-05-05 Nick Clifton <nickc@redhat.com>
1388
1389 PR gas/2582
1390 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1391 insertion of a directory separator character into a string at a
1392 given offset. Uses heuristics to decide when to use a backslash
1393 character rather than a forward-slash character.
1394 (dwarf2_directive_loc): Use the macro.
1395 (out_debug_info): Likewise.
1396
d43b4baf
TS
13972006-05-05 Thiemo Seufer <ths@mips.com>
1398 David Ung <davidu@mips.com>
1399
1400 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1401 instruction.
1402 (macro): Add new case M_CACHE_AB.
1403
088fa78e
KH
14042006-05-04 Kazu Hirata <kazu@codesourcery.com>
1405
1406 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1407 (opcode_lookup): Issue a warning for opcode with
1408 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1409 identical to OT_cinfix3.
1410 (TxC3w, TC3w, tC3w): New.
1411 (insns): Use tC3w and TC3w for comparison instructions with
1412 's' suffix.
1413
c9049d30
AM
14142006-05-04 Alan Modra <amodra@bigpond.net.au>
1415
1416 * subsegs.h (struct frchain): Delete frch_seg.
1417 (frchain_root): Delete.
1418 (seg_info): Define as macro.
1419 * subsegs.c (frchain_root): Delete.
1420 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1421 (subsegs_begin, subseg_change): Adjust for above.
1422 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1423 rather than to one big list.
1424 (subseg_get): Don't special case abs, und sections.
1425 (subseg_new, subseg_force_new): Don't set frchainP here.
1426 (seg_info): Delete.
1427 (subsegs_print_statistics): Adjust frag chain control list traversal.
1428 * debug.c (dmp_frags): Likewise.
1429 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1430 at frchain_root. Make use of known frchain ordering.
1431 (last_frag_for_seg): Likewise.
1432 (get_frag_fix): Likewise. Add seg param.
1433 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1434 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1435 (SUB_SEGMENT_ALIGN): Likewise.
1436 (subsegs_finish): Adjust frchain list traversal.
1437 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1438 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1439 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1440 (xtensa_fix_b_j_loop_end_frags): Likewise.
1441 (xtensa_fix_close_loop_end_frags): Likewise.
1442 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1443 (retrieve_segment_info): Delete frch_seg initialisation.
1444
f592407e
AM
14452006-05-03 Alan Modra <amodra@bigpond.net.au>
1446
1447 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1448 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1449 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1450 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1451
df7849c5
JM
14522006-05-02 Joseph Myers <joseph@codesourcery.com>
1453
1454 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1455 here.
1456 (md_apply_fix3): Multiply offset by 4 here for
1457 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1458
2d545b82
L
14592006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1460 Jan Beulich <jbeulich@novell.com>
1461
1462 * config/tc-i386.c (output_invalid_buf): Change size for
1463 unsigned char.
1464 * config/tc-tic30.c (output_invalid_buf): Likewise.
1465
1466 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1467 unsigned char.
1468 * config/tc-tic30.c (output_invalid): Likewise.
1469
38fc1cb1
DJ
14702006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1471
1472 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1473 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1474 (asconfig.texi): Don't set top_srcdir.
1475 * doc/as.texinfo: Don't use top_srcdir.
1476 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1477
2d545b82
L
14782006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1479
1480 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1481 * config/tc-tic30.c (output_invalid_buf): Likewise.
1482
1483 * config/tc-i386.c (output_invalid): Use snprintf instead of
1484 sprintf.
1485 * config/tc-ia64.c (declare_register_set): Likewise.
1486 (emit_one_bundle): Likewise.
1487 (check_dependencies): Likewise.
1488 * config/tc-tic30.c (output_invalid): Likewise.
1489
a8bc6c78
PB
14902006-05-02 Paul Brook <paul@codesourcery.com>
1491
1492 * config/tc-arm.c (arm_optimize_expr): New function.
1493 * config/tc-arm.h (md_optimize_expr): Define
1494 (arm_optimize_expr): Add prototype.
1495 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1496
58633d9a
BE
14972006-05-02 Ben Elliston <bje@au.ibm.com>
1498
22772e33
BE
1499 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1500 field unsigned.
1501
58633d9a
BE
1502 * sb.h (sb_list_vector): Move to sb.c.
1503 * sb.c (free_list): Use type of sb_list_vector directly.
1504 (sb_build): Fix off-by-one error in assertion about `size'.
1505
89cdfe57
BE
15062006-05-01 Ben Elliston <bje@au.ibm.com>
1507
1508 * listing.c (listing_listing): Remove useless loop.
1509 * macro.c (macro_expand): Remove is_positional local variable.
1510 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1511 and simplify surrounding expressions, where possible.
1512 (assign_symbol): Likewise.
1513 (s_weakref): Likewise.
1514 * symbols.c (colon): Likewise.
1515
c35da140
AM
15162006-05-01 James Lemke <jwlemke@wasabisystems.com>
1517
1518 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1519
9bcd4f99
TS
15202006-04-30 Thiemo Seufer <ths@mips.com>
1521 David Ung <davidu@mips.com>
1522
1523 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1524 (mips_immed): New table that records various handling of udi
1525 instruction patterns.
1526 (mips_ip): Adds udi handling.
1527
001ae1a4
AM
15282006-04-28 Alan Modra <amodra@bigpond.net.au>
1529
1530 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1531 of list rather than beginning.
1532
136da414
JB
15332006-04-26 Julian Brown <julian@codesourcery.com>
1534
1535 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1536 (is_quarter_float): Rename from above. Simplify slightly.
1537 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1538 number.
1539 (parse_neon_mov): Parse floating-point constants.
1540 (neon_qfloat_bits): Fix encoding.
1541 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1542 preference to integer encoding when using the F32 type.
1543
dcbf9037
JB
15442006-04-26 Julian Brown <julian@codesourcery.com>
1545
1546 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1547 zero-initialising structures containing it will lead to invalid types).
1548 (arm_it): Add vectype to each operand.
1549 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1550 defined field.
1551 (neon_typed_alias): New structure. Extra information for typed
1552 register aliases.
1553 (reg_entry): Add neon type info field.
1554 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1555 Break out alternative syntax for coprocessor registers, etc. into...
1556 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1557 out from arm_reg_parse.
1558 (parse_neon_type): Move. Return SUCCESS/FAIL.
1559 (first_error): New function. Call to ensure first error which occurs is
1560 reported.
1561 (parse_neon_operand_type): Parse exactly one type.
1562 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1563 (parse_typed_reg_or_scalar): New function. Handle core of both
1564 arm_typed_reg_parse and parse_scalar.
1565 (arm_typed_reg_parse): Parse a register with an optional type.
1566 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1567 result.
1568 (parse_scalar): Parse a Neon scalar with optional type.
1569 (parse_reg_list): Use first_error.
1570 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1571 (neon_alias_types_same): New function. Return true if two (alias) types
1572 are the same.
1573 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1574 of elements.
1575 (insert_reg_alias): Return new reg_entry not void.
1576 (insert_neon_reg_alias): New function. Insert type/index information as
1577 well as register for alias.
1578 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1579 make typed register aliases accordingly.
1580 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1581 of line.
1582 (s_unreq): Delete type information if present.
1583 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1584 (s_arm_unwind_save_mmxwcg): Likewise.
1585 (s_arm_unwind_movsp): Likewise.
1586 (s_arm_unwind_setfp): Likewise.
1587 (parse_shift): Likewise.
1588 (parse_shifter_operand): Likewise.
1589 (parse_address): Likewise.
1590 (parse_tb): Likewise.
1591 (tc_arm_regname_to_dw2regnum): Likewise.
1592 (md_pseudo_table): Add dn, qn.
1593 (parse_neon_mov): Handle typed operands.
1594 (parse_operands): Likewise.
1595 (neon_type_mask): Add N_SIZ.
1596 (N_ALLMODS): New macro.
1597 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1598 (el_type_of_type_chk): Add some safeguards.
1599 (modify_types_allowed): Fix logic bug.
1600 (neon_check_type): Handle operands with types.
1601 (neon_three_same): Remove redundant optional arg handling.
1602 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1603 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1604 (do_neon_step): Adjust accordingly.
1605 (neon_cmode_for_logic_imm): Use first_error.
1606 (do_neon_bitfield): Call neon_check_type.
1607 (neon_dyadic): Rename to...
1608 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1609 to allow modification of type of the destination.
1610 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1611 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1612 (do_neon_compare): Make destination be an untyped bitfield.
1613 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1614 (neon_mul_mac): Return early in case of errors.
1615 (neon_move_immediate): Use first_error.
1616 (neon_mac_reg_scalar_long): Fix type to include scalar.
1617 (do_neon_dup): Likewise.
1618 (do_neon_mov): Likewise (in several places).
1619 (do_neon_tbl_tbx): Fix type.
1620 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1621 (do_neon_ld_dup): Exit early in case of errors and/or use
1622 first_error.
1623 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1624 Handle .dn/.qn directives.
1625 (REGDEF): Add zero for reg_entry neon field.
1626
5287ad62
JB
16272006-04-26 Julian Brown <julian@codesourcery.com>
1628
1629 * config/tc-arm.c (limits.h): Include.
1630 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1631 (fpu_vfp_v3_or_neon_ext): Declare constants.
1632 (neon_el_type): New enumeration of types for Neon vector elements.
1633 (neon_type_el): New struct. Define type and size of a vector element.
1634 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1635 instruction.
1636 (neon_type): Define struct. The type of an instruction.
1637 (arm_it): Add 'vectype' for the current instruction.
1638 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1639 (vfp_sp_reg_pos): Rename to...
1640 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1641 tags.
1642 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1643 (Neon D or Q register).
1644 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1645 register.
1646 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1647 (my_get_expression): Allow above constant as argument to accept
1648 64-bit constants with optional prefix.
1649 (arm_reg_parse): Add extra argument to return the specific type of
1650 register in when either a D or Q register (REG_TYPE_NDQ) is
1651 requested. Can be NULL.
1652 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1653 (parse_reg_list): Update for new arm_reg_parse args.
1654 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1655 (parse_neon_el_struct_list): New function. Parse element/structure
1656 register lists for VLD<n>/VST<n> instructions.
1657 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1658 (s_arm_unwind_save_mmxwr): Likewise.
1659 (s_arm_unwind_save_mmxwcg): Likewise.
1660 (s_arm_unwind_movsp): Likewise.
1661 (s_arm_unwind_setfp): Likewise.
1662 (parse_big_immediate): New function. Parse an immediate, which may be
1663 64 bits wide. Put results in inst.operands[i].
1664 (parse_shift): Update for new arm_reg_parse args.
1665 (parse_address): Likewise. Add parsing of alignment specifiers.
1666 (parse_neon_mov): Parse the operands of a VMOV instruction.
1667 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1668 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1669 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1670 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1671 (parse_operands): Handle new codes above.
1672 (encode_arm_vfp_sp_reg): Rename to...
1673 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1674 selected VFP version only supports D0-D15.
1675 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1676 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1677 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1678 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1679 encode_arm_vfp_reg name, and allow 32 D regs.
1680 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1681 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1682 regs.
1683 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1684 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1685 constant-load and conversion insns introduced with VFPv3.
1686 (neon_tab_entry): New struct.
1687 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1688 those which are the targets of pseudo-instructions.
1689 (neon_opc): Enumerate opcodes, use as indices into...
1690 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1691 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1692 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1693 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1694 neon_enc_tab.
1695 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1696 Neon instructions.
1697 (neon_type_mask): New. Compact type representation for type checking.
1698 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1699 permitted type combinations.
1700 (N_IGNORE_TYPE): New macro.
1701 (neon_check_shape): New function. Check an instruction shape for
1702 multiple alternatives. Return the specific shape for the current
1703 instruction.
1704 (neon_modify_type_size): New function. Modify a vector type and size,
1705 depending on the bit mask in argument 1.
1706 (neon_type_promote): New function. Convert a given "key" type (of an
1707 operand) into the correct type for a different operand, based on a bit
1708 mask.
1709 (type_chk_of_el_type): New function. Convert a type and size into the
1710 compact representation used for type checking.
1711 (el_type_of_type_ckh): New function. Reverse of above (only when a
1712 single bit is set in the bit mask).
1713 (modify_types_allowed): New function. Alter a mask of allowed types
1714 based on a bit mask of modifications.
1715 (neon_check_type): New function. Check the type of the current
1716 instruction against the variable argument list. The "key" type of the
1717 instruction is returned.
1718 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1719 a Neon data-processing instruction depending on whether we're in ARM
1720 mode or Thumb-2 mode.
1721 (neon_logbits): New function.
1722 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1723 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1724 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1725 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1726 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1727 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1728 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1729 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1730 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1731 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1732 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1733 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1734 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1735 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1736 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1737 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1738 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1739 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1740 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1741 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1742 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1743 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1744 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1745 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1746 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1747 helpers.
1748 (parse_neon_type): New function. Parse Neon type specifier.
1749 (opcode_lookup): Allow parsing of Neon type specifiers.
1750 (REGNUM2, REGSETH, REGSET2): New macros.
1751 (reg_names): Add new VFPv3 and Neon registers.
1752 (NUF, nUF, NCE, nCE): New macros for opcode table.
1753 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1754 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1755 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1756 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1757 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1758 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1759 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1760 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1761 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1762 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1763 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1764 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1765 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1766 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1767 fto[us][lh][sd].
1768 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1769 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1770 (arm_option_cpu_value): Add vfp3 and neon.
1771 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1772 VFPv1 attribute.
1773
1946c96e
BW
17742006-04-25 Bob Wilson <bob.wilson@acm.org>
1775
1776 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1777 syntax instead of hardcoded opcodes with ".w18" suffixes.
1778 (wide_branch_opcode): New.
1779 (build_transition): Use it to check for wide branch opcodes with
1780 either ".w18" or ".w15" suffixes.
1781
5033a645
BW
17822006-04-25 Bob Wilson <bob.wilson@acm.org>
1783
1784 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1785 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1786 frag's is_literal flag.
1787
395fa56f
BW
17882006-04-25 Bob Wilson <bob.wilson@acm.org>
1789
1790 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1791
708587a4
KH
17922006-04-23 Kazu Hirata <kazu@codesourcery.com>
1793
1794 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1795 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1796 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1797 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1798 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1799
8463be01
PB
18002005-04-20 Paul Brook <paul@codesourcery.com>
1801
1802 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1803 all targets.
1804 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1805
f26a5955
AM
18062006-04-19 Alan Modra <amodra@bigpond.net.au>
1807
1808 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1809 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1810 Make some cpus unsupported on ELF. Run "make dep-am".
1811 * Makefile.in: Regenerate.
1812
241a6c40
AM
18132006-04-19 Alan Modra <amodra@bigpond.net.au>
1814
1815 * configure.in (--enable-targets): Indent help message.
1816 * configure: Regenerate.
1817
bb8f5920
L
18182006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1819
1820 PR gas/2533
1821 * config/tc-i386.c (i386_immediate): Check illegal immediate
1822 register operand.
1823
23d9d9de
AM
18242006-04-18 Alan Modra <amodra@bigpond.net.au>
1825
64e74474
AM
1826 * config/tc-i386.c: Formatting.
1827 (output_disp, output_imm): ISO C90 params.
1828
6cbe03fb
AM
1829 * frags.c (frag_offset_fixed_p): Constify args.
1830 * frags.h (frag_offset_fixed_p): Ditto.
1831
23d9d9de
AM
1832 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1833 (COFF_MAGIC): Delete.
a37d486e
AM
1834
1835 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1836
e7403566
DJ
18372006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1838
1839 * po/POTFILES.in: Regenerated.
1840
58ab4f3d
MM
18412006-04-16 Mark Mitchell <mark@codesourcery.com>
1842
1843 * doc/as.texinfo: Mention that some .type syntaxes are not
1844 supported on all architectures.
1845
482fd9f9
BW
18462006-04-14 Sterling Augustine <sterling@tensilica.com>
1847
1848 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1849 instructions when such transformations have been disabled.
1850
05d58145
BW
18512006-04-10 Sterling Augustine <sterling@tensilica.com>
1852
1853 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1854 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1855 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1856 decoding the loop instructions. Remove current_offset variable.
1857 (xtensa_fix_short_loop_frags): Likewise.
1858 (min_bytes_to_other_loop_end): Remove current_offset argument.
1859
9e75b3fa
AM
18602006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1861
a37d486e 1862 * config/tc-z80.c (z80_optimize_expr): Removed.
9e75b3fa
AM
1863 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1864
d727e8c2
NC
18652006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1866
1867 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1868 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1869 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1870 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1871 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1872 at90can64, at90usb646, at90usb647, at90usb1286 and
1873 at90usb1287.
1874 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1875
d252fdde
PB
18762006-04-07 Paul Brook <paul@codesourcery.com>
1877
1878 * config/tc-arm.c (parse_operands): Set default error message.
1879
ab1eb5fe
PB
18802006-04-07 Paul Brook <paul@codesourcery.com>
1881
1882 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1883
7ae2971b
PB
18842006-04-07 Paul Brook <paul@codesourcery.com>
1885
1886 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1887
53365c0d
PB
18882006-04-07 Paul Brook <paul@codesourcery.com>
1889
1890 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1891 (move_or_literal_pool): Handle Thumb-2 instructions.
1892 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1893
45aa61fe
AM
18942006-04-07 Alan Modra <amodra@bigpond.net.au>
1895
1896 PR 2512.
1897 * config/tc-i386.c (match_template): Move 64-bit operand tests
1898 inside loop.
1899
108a6f8e
CD
19002006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1901
1902 * po/Make-in: Add install-html target.
1903 * Makefile.am: Add install-html and install-html-recursive targets.
1904 * Makefile.in: Regenerate.
1905 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1906 * configure: Regenerate.
1907 * doc/Makefile.am: Add install-html and install-html-am targets.
1908 * doc/Makefile.in: Regenerate.
1909
ec651a3b
AM
19102006-04-06 Alan Modra <amodra@bigpond.net.au>
1911
1912 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1913 second scan.
1914
910600e9
RS
19152006-04-05 Richard Sandiford <richard@codesourcery.com>
1916 Daniel Jacobowitz <dan@codesourcery.com>
1917
1918 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1919 (GOTT_BASE, GOTT_INDEX): New.
1920 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1921 GOTT_INDEX when generating VxWorks PIC.
1922 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1923 use the generic *-*-vxworks* stanza instead.
1924
99630778
AM
19252006-04-04 Alan Modra <amodra@bigpond.net.au>
1926
1927 PR 997
1928 * frags.c (frag_offset_fixed_p): New function.
1929 * frags.h (frag_offset_fixed_p): Declare.
1930 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1931 (resolve_expression): Likewise.
1932
a02728c8
BW
19332006-04-03 Sterling Augustine <sterling@tensilica.com>
1934
1935 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1936 of the same length but different numbers of slots.
1937
9dfde49d
AS
19382006-03-30 Andreas Schwab <schwab@suse.de>
1939
1940 * configure.in: Fix help string for --enable-targets option.
1941 * configure: Regenerate.
1942
2da12c60
NS
19432006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1944
6d89cc8f
NS
1945 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1946 (m68k_ip): ... here. Use for all chips. Protect against buffer
1947 overrun and avoid excessive copying.
1948
2da12c60
NS
1949 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1950 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1951 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1952 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1953 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1954 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
a70ae331 1955 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
2da12c60
NS
1956 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1957 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1958 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1959 (struct m68k_cpu): Change chip field to control_regs.
1960 (current_chip): Remove.
1961 (control_regs): New.
1962 (m68k_archs, m68k_extensions): Adjust.
1963 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1964 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1965 (find_cf_chip): Reimplement for new organization of cpu table.
1966 (select_control_regs): Remove.
1967 (mri_chip): Adjust.
1968 (struct save_opts): Save control regs, not chip.
1969 (s_save, s_restore): Adjust.
1970 (m68k_lookup_cpu): Give deprecated warning when necessary.
1971 (m68k_init_arch): Adjust.
1972 (md_show_usage): Adjust for new cpu table organization.
1973
1ac4baed
BS
19742006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1975
1976 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1977 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1978 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1979 "elf/bfin.h".
1980 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1981 (any_gotrel): New rule.
1982 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1983 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1984 "elf/bfin.h".
1985 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1986 (bfin_pic_ptr): New function.
1987 (md_pseudo_table): Add it for ".picptr".
1988 (OPTION_FDPIC): New macro.
1989 (md_longopts): Add -mfdpic.
1990 (md_parse_option): Handle it.
1991 (md_begin): Set BFD flags.
1992 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1993 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1994 us for GOT relocs.
1995 * Makefile.am (bfin-parse.o): Update dependencies.
1996 (DEPTC_bfin_elf): Likewise.
1997 * Makefile.in: Regenerate.
1998
a9d34880
RS
19992006-03-25 Richard Sandiford <richard@codesourcery.com>
2000
2001 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
2002 mcfemac instead of mcfmac.
2003
9ca26584
AJ
20042006-03-23 Michael Matz <matz@suse.de>
2005
2006 * config/tc-i386.c (type_names): Correct placement of 'static'.
2007 (reloc): Map some more relocs to their 64 bit counterpart when
2008 size is 8.
2009 (output_insn): Work around breakage if DEBUG386 is defined.
2010 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
2011 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
2012 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
2013 different from i386.
2014 (output_imm): Ditto.
2015 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
2016 Imm64.
2017 (md_convert_frag): Jumps can now be larger than 2GB away, error
2018 out in that case.
2019 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
2020 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
2021
0a44bf69
RS
20222006-03-22 Richard Sandiford <richard@codesourcery.com>
2023 Daniel Jacobowitz <dan@codesourcery.com>
2024 Phil Edwards <phil@codesourcery.com>
2025 Zack Weinberg <zack@codesourcery.com>
2026 Mark Mitchell <mark@codesourcery.com>
2027 Nathan Sidwell <nathan@codesourcery.com>
2028
2029 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
2030 (md_begin): Complain about -G being used for PIC. Don't change
2031 the text, data and bss alignments on VxWorks.
2032 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
2033 generating VxWorks PIC.
2034 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
2035 (macro): Likewise, but do not treat la $25 specially for
2036 VxWorks PIC, and do not handle jal.
2037 (OPTION_MVXWORKS_PIC): New macro.
2038 (md_longopts): Add -mvxworks-pic.
2039 (md_parse_option): Don't complain about using PIC and -G together here.
2040 Handle OPTION_MVXWORKS_PIC.
2041 (md_estimate_size_before_relax): Always use the first relaxation
2042 sequence on VxWorks.
2043 * config/tc-mips.h (VXWORKS_PIC): New.
2044
080eb7fe
PB
20452006-03-21 Paul Brook <paul@codesourcery.com>
2046
2047 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
2048
03aaa593
BW
20492006-03-21 Sterling Augustine <sterling@tensilica.com>
2050
2051 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
2052 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
2053 (get_loop_align_size): New.
2054 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
2055 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
2056 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
2057 (get_noop_aligned_address): Use get_loop_align_size.
2058 (get_aligned_diff): Likewise.
2059
3e94bf1a
PB
20602006-03-21 Paul Brook <paul@codesourcery.com>
2061
2062 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
2063
dfa9f0d5
PB
20642006-03-20 Paul Brook <paul@codesourcery.com>
2065
2066 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
2067 (do_t_branch): Encode branches inside IT blocks as unconditional.
2068 (do_t_cps): New function.
2069 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
2070 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
2071 (opcode_lookup): Allow conditional suffixes on all instructions in
2072 Thumb mode.
2073 (md_assemble): Advance condexec state before checking for errors.
2074 (insns): Use do_t_cps.
2075
6e1cb1a6
PB
20762006-03-20 Paul Brook <paul@codesourcery.com>
2077
2078 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
2079 outputting the insn.
2080
0a966e2d
JBG
20812006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2082
2083 * config/tc-vax.c: Update copyright year.
2084 * config/tc-vax.h: Likewise.
2085
a49fcc17
JBG
20862006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
2087
2088 * config/tc-vax.c (md_chars_to_number): Used only locally, so
2089 make it static.
2090 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
2091
f5208ef2
PB
20922006-03-17 Paul Brook <paul@codesourcery.com>
2093
2094 * config/tc-arm.c (insns): Add ldm and stm.
2095
cb4c78d6
BE
20962006-03-17 Ben Elliston <bje@au.ibm.com>
2097
2098 PR gas/2446
2099 * doc/as.texinfo (Ident): Document this directive more thoroughly.
2100
c16d2bf0
PB
21012006-03-16 Paul Brook <paul@codesourcery.com>
2102
2103 * config/tc-arm.c (insns): Add "svc".
2104
80ca4e2c
BW
21052006-03-13 Bob Wilson <bob.wilson@acm.org>
2106
2107 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
2108 flag and avoid double underscore prefixes.
2109
3a4a14e9
PB
21102006-03-10 Paul Brook <paul@codesourcery.com>
2111
2112 * config/tc-arm.c (md_begin): Handle EABIv5.
2113 (arm_eabis): Add EF_ARM_EABI_VER5.
2114 * doc/c-arm.texi: Document -meabi=5.
2115
518051dc
BE
21162006-03-10 Ben Elliston <bje@au.ibm.com>
2117
2118 * app.c (do_scrub_chars): Simplify string handling.
2119
00a97672
RS
21202006-03-07 Richard Sandiford <richard@codesourcery.com>
2121 Daniel Jacobowitz <dan@codesourcery.com>
2122 Zack Weinberg <zack@codesourcery.com>
2123 Nathan Sidwell <nathan@codesourcery.com>
2124 Paul Brook <paul@codesourcery.com>
2125 Ricardo Anguiano <anguiano@codesourcery.com>
2126 Phil Edwards <phil@codesourcery.com>
2127
2128 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
2129 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
2130 R_ARM_ABS12 reloc.
2131 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
2132 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
2133 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
2134
b29757dc
BW
21352006-03-06 Bob Wilson <bob.wilson@acm.org>
2136
2137 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
2138 even when using the text-section-literals option.
2139
0b2e31dc
NS
21402006-03-06 Nathan Sidwell <nathan@codesourcery.com>
2141
2142 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
2143 and cf.
2144 (m68k_ip): <case 'J'> Check we have some control regs.
2145 (md_parse_option): Allow raw arch switch.
2146 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
2147 whether 68881 or cfloat was meant by -mfloat.
2148 (md_show_usage): Adjust extension display.
2149 (m68k_elf_final_processing): Adjust.
2150
df406460
NC
21512006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
2152
2153 * config/tc-avr.c (avr_mod_hash_value): New function.
2154 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
a70ae331 2155 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
df406460
NC
2156 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
2157 instead of int avr_ldi_expression: use avr_mod_hash_value instead
2158 of (int).
2159 (tc_gen_reloc): Handle substractions of symbols, if possible do
a70ae331 2160 fixups, abort otherwise.
df406460
NC
2161 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2162 tc_fix_adjustable): Define.
a70ae331 2163
53022e4a
JW
21642006-03-02 James E Wilson <wilson@specifix.com>
2165
2166 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2167 change the template, then clear md.slot[curr].end_of_insn_group.
2168
9f6f925e
JB
21692006-02-28 Jan Beulich <jbeulich@novell.com>
2170
2171 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2172
0e31b3e1
JB
21732006-02-28 Jan Beulich <jbeulich@novell.com>
2174
2175 PR/1070
2176 * macro.c (getstring): Don't treat parentheses special anymore.
2177 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2178 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2179 characters.
2180
10cd14b4
AM
21812006-02-28 Mat <mat@csail.mit.edu>
2182
2183 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2184
63752a75
JJ
21852006-02-27 Jakub Jelinek <jakub@redhat.com>
2186
2187 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2188 field.
2189 (CFI_signal_frame): Define.
2190 (cfi_pseudo_table): Add .cfi_signal_frame.
2191 (dot_cfi): Handle CFI_signal_frame.
2192 (output_cie): Handle cie->signal_frame.
2193 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2194 different. Copy signal_frame from FDE to newly created CIE.
2195 * doc/as.texinfo: Document .cfi_signal_frame.
2196
f7d9e5c3
CD
21972006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2198
2199 * doc/Makefile.am: Add html target.
2200 * doc/Makefile.in: Regenerate.
2201 * po/Make-in: Add html target.
2202
331d2d0d
L
22032006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2204
8502d882 2205 * config/tc-i386.c (output_insn): Support Intel Merom New
331d2d0d
L
2206 Instructions.
2207
8502d882 2208 * config/tc-i386.h (CpuMNI): New.
331d2d0d
L
2209 (CpuUnknownFlags): Add CpuMNI.
2210
10156f83
DM
22112006-02-24 David S. Miller <davem@sunset.davemloft.net>
2212
2213 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2214 (hpriv_reg_table): New table for hyperprivileged registers.
2215 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2216 register encoding.
2217
6772dd07
DD
22182006-02-24 DJ Delorie <dj@redhat.com>
2219
2220 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2221 (tc_gen_reloc): Don't define.
2222 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2223 (OPTION_LINKRELAX): New.
2224 (md_longopts): Add it.
2225 (m32c_relax): New.
2226 (md_parse_options): Set it.
2227 (md_assemble): Emit relaxation relocs as needed.
2228 (md_convert_frag): Emit relaxation relocs as needed.
2229 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2230 (m32c_apply_fix): New.
2231 (tc_gen_reloc): New.
2232 (m32c_force_relocation): Force out jump relocs when relaxing.
2233 (m32c_fix_adjustable): Return false if relaxing.
2234
62b3e311
PB
22352006-02-24 Paul Brook <paul@codesourcery.com>
2236
2237 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2238 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2239 (struct asm_barrier_opt): Define.
2240 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2241 (parse_psr): Accept V7M psr names.
2242 (parse_barrier): New function.
2243 (enum operand_parse_code): Add OP_oBARRIER.
2244 (parse_operands): Implement OP_oBARRIER.
2245 (do_barrier): New function.
2246 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2247 (do_t_cpsi): Add V7M restrictions.
2248 (do_t_mrs, do_t_msr): Validate V7M variants.
2249 (md_assemble): Check for NULL variants.
2250 (v7m_psrs, barrier_opt_names): New tables.
2251 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2252 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2253 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2254 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2255 (struct cpu_arch_ver_table): Define.
2256 (cpu_arch_ver): New.
2257 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2258 Tag_CPU_arch_profile.
2259 * doc/c-arm.texi: Document new cpu and arch options.
2260
59cf82fe
L
22612006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2262
2263 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2264
19a7219f
L
22652006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2266
2267 * config/tc-ia64.c: Update copyright years.
2268
7f3dfb9c
L
22692006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2270
2271 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2272 SDM 2.2.
2273
f40d1643
PB
22742005-02-22 Paul Brook <paul@codesourcery.com>
2275
2276 * config/tc-arm.c (do_pld): Remove incorrect write to
2277 inst.instruction.
2278 (encode_thumb32_addr_mode): Use correct operand.
2279
216d22bc
PB
22802006-02-21 Paul Brook <paul@codesourcery.com>
2281
2282 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2283
d70c5fc7
NC
22842006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2285 Anil Paranjape <anilp1@kpitcummins.com>
2286 Shilin Shakti <shilins@kpitcummins.com>
2287
2288 * Makefile.am: Add xc16x related entry.
2289 * Makefile.in: Regenerate.
2290 * configure.in: Added xc16x related entry.
2291 * configure: Regenerate.
2292 * config/tc-xc16x.h: New file
2293 * config/tc-xc16x.c: New file
2294 * doc/c-xc16x.texi: New file for xc16x
2295 * doc/all.texi: Entry for xc16x
a70ae331 2296 * doc/Makefile.texi: Added c-xc16x.texi
d70c5fc7
NC
2297 * NEWS: Announce the support for the new target.
2298
aaa2ab3d
NH
22992006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2300
2301 * configure.tgt: set emulation for mips-*-netbsd*
2302
82de001f
JJ
23032006-02-14 Jakub Jelinek <jakub@redhat.com>
2304
2305 * config.in: Rebuilt.
2306
431ad2d0
BW
23072006-02-13 Bob Wilson <bob.wilson@acm.org>
2308
2309 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2310 from 1, not 0, in error messages.
2311 (md_assemble): Simplify special-case check for ENTRY instructions.
2312 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2313 operand in error message.
2314
94089a50
JM
23152006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2316
2317 * configure.tgt (arm-*-linux-gnueabi*): Change to
2318 arm-*-linux-*eabi*.
2319
52de4c06
NC
23202006-02-10 Nick Clifton <nickc@redhat.com>
2321
70e45ad9
NC
2322 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2323 32-bit value is propagated into the upper bits of a 64-bit long.
2324
52de4c06
NC
2325 * config/tc-arc.c (init_opcode_tables): Fix cast.
2326 (arc_extoper, md_operand): Likewise.
2327
21af2bbd
BW
23282006-02-09 David Heine <dlheine@tensilica.com>
2329
2330 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2331 each relaxation step.
2332
75a706fc 23332006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
a70ae331 2334
75a706fc
L
2335 * configure.in (CHECK_DECLS): Add vsnprintf.
2336 * configure: Regenerate.
2337 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2338 include/declare here, but...
2339 * as.h: Move code detecting VARARGS idiom to the top.
2340 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2341 (vsnprintf): Declare if not already declared.
2342
0d474464
L
23432006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2344
2345 * as.c (close_output_file): New.
2346 (main): Register close_output_file with xatexit before
2347 dump_statistics. Don't call output_file_close.
2348
266abb8f
NS
23492006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2350
2351 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2352 mcf5329_control_regs): New.
2353 (not_current_architecture, selected_arch, selected_cpu): New.
2354 (m68k_archs, m68k_extensions): New.
2355 (archs): Renamed to ...
2356 (m68k_cpus): ... here. Adjust.
2357 (n_arches): Remove.
2358 (md_pseudo_table): Add arch and cpu directives.
2359 (find_cf_chip, m68k_ip): Adjust table scanning.
2360 (no_68851, no_68881): Remove.
2361 (md_assemble): Lazily initialize.
2362 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2363 (md_init_after_args): Move functionality to m68k_init_arch.
2364 (mri_chip): Adjust table scanning.
2365 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2366 options with saner parsing.
2367 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2368 m68k_init_arch): New.
2369 (s_m68k_cpu, s_m68k_arch): New.
2370 (md_show_usage): Adjust.
2371 (m68k_elf_final_processing): Set CF EF flags.
2372 * config/tc-m68k.h (m68k_init_after_args): Remove.
2373 (tc_init_after_args): Remove.
2374 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2375 (M68k-Directives): Document .arch and .cpu directives.
2376
134dcee5
AM
23772006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2378
a70ae331
AM
2379 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2380 synonyms for equ and defl.
134dcee5
AM
2381 (z80_cons_fix_new): New function.
2382 (emit_byte): Disallow relative jumps to absolute locations.
a70ae331 2383 (emit_data): Only handle defb, prototype changed, because defb is
134dcee5
AM
2384 now handled as pseudo-op rather than an instruction.
2385 (instab): Entries for defb,defw,db,dw moved from here...
a70ae331 2386 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
134dcee5
AM
2387 Add entries for def24,def32,d24,d32.
2388 (md_assemble): Improved error handling.
2389 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2390 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2391 (z80_cons_fix_new): Declare.
a70ae331 2392 * doc/c-z80.texi (defb, db): Mention warning on overflow.
134dcee5 2393 (def24,d24,def32,d32): New pseudo-ops.
a70ae331 2394
a9931606
PB
23952006-02-02 Paul Brook <paul@codesourcery.com>
2396
2397 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2398
ef8d22e6
PB
23992005-02-02 Paul Brook <paul@codesourcery.com>
2400
2401 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2402 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2403 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2404 T2_OPCODE_RSB): Define.
2405 (thumb32_negate_data_op): New function.
2406 (md_apply_fix): Use it.
2407
e7da6241
BW
24082006-01-31 Bob Wilson <bob.wilson@acm.org>
2409
2410 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2411 fields.
2412 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2413 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2414 subtracted symbols.
2415 (relaxation_requirements): Add pfinish_frag argument and use it to
2416 replace setting tinsn->record_fix fields.
2417 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2418 and vinsn_to_insnbuf. Remove references to record_fix and
2419 slot_sub_symbols fields.
2420 (xtensa_mark_narrow_branches): Delete unused code.
2421 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2422 a symbol.
2423 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2424 record_fix fields.
2425 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2426 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2427 of the record_fix field. Simplify error messages for unexpected
2428 symbolic operands.
2429 (set_expr_symbol_offset_diff): Delete.
2430
79134647
PB
24312006-01-31 Paul Brook <paul@codesourcery.com>
2432
2433 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2434
e74cfd16
PB
24352006-01-31 Paul Brook <paul@codesourcery.com>
2436 Richard Earnshaw <rearnsha@arm.com>
2437
2438 * config/tc-arm.c: Use arm_feature_set.
2439 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2440 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2441 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2442 New variables.
2443 (insns): Use them.
2444 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2445 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2446 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2447 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2448 feature flags.
2449 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2450 (arm_opts): Move old cpu/arch options from here...
2451 (arm_legacy_opts): ... to here.
2452 (md_parse_option): Search arm_legacy_opts.
2453 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2454 (arm_float_abis, arm_eabis): Make const.
2455
d47d412e
BW
24562006-01-25 Bob Wilson <bob.wilson@acm.org>
2457
2458 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2459
b14273fe
JZ
24602006-01-21 Jie Zhang <jie.zhang@analog.com>
2461
2462 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2463 in load immediate intruction.
2464
39cd1c76
JZ
24652006-01-21 Jie Zhang <jie.zhang@analog.com>
2466
2467 * config/bfin-parse.y (value_match): Use correct conversion
2468 specifications in template string for __FILE__ and __LINE__.
2469 (binary): Ditto.
2470 (unary): Ditto.
2471
67a4f2b7
AO
24722006-01-18 Alexandre Oliva <aoliva@redhat.com>
2473
2474 Introduce TLS descriptors for i386 and x86_64.
2475 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2476 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2477 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2478 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2479 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2480 displacement bits.
2481 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2482 (lex_got): Handle @tlsdesc and @tlscall.
2483 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2484
8ad7c533
NC
24852006-01-11 Nick Clifton <nickc@redhat.com>
2486
2487 Fixes for building on 64-bit hosts:
2488 * config/tc-avr.c (mod_index): New union to allow conversion
2489 between pointers and integers.
2490 (md_begin, avr_ldi_expression): Use it.
2491 * config/tc-i370.c (md_assemble): Add cast for argument to print
2492 statement.
2493 * config/tc-tic54x.c (subsym_substitute): Likewise.
2494 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2495 opindex field of fr_cgen structure into a pointer so that it can
2496 be stored in a frag.
2497 * config/tc-mn10300.c (md_assemble): Likewise.
2498 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2499 types.
2500 * config/tc-v850.c: Replace uses of (int) casts with correct
2501 types.
2502
4dcb3903
L
25032006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2504
2505 PR gas/2117
2506 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2507
e0f6ea40
HPN
25082006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2509
2510 PR gas/2101
2511 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2512 a local-label reference.
2513
e88d958a 2514For older changes see ChangeLog-2005
08d56133
NC
2515\f
2516Local Variables:
2517mode: change-log
2518left-margin: 8
2519fill-column: 74
2520version-control: never
2521End:
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