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strip trailing whitespace in Blackfin files
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
ee9e7c78
MF		 12010-03-10 Mike Frysinger <michael.frysinger@analog.com>
2
3 * bfin-defs.h, bfin-lex.l, bfin-parse.y, tc-bfin.c, tc-bfin.h:
4 Strip trailing whitespace.
5
a23c851a
MF		 62010-03-10 Mike Frysinger <michael.frysinger@analog.com>
7
8 * doc/c-bfin.texi (-mcpu): Add bf504 and bf506.
9 * config/tc-bfin.c (bfin_cpu_type): Add BFIN_CPU_BF504 and
10 BFIN_CPU_BF506.
11 (bfin_cpus[]): Add 0.0 for bf504 and bf506.
12
9982501a
JZ		 132010-03-10 Jie Zhang <jie@codesourcery.com>
14
15 * doc/as.texinfo: Add Blackfin options.
16 * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
17 * config/tc-bfin.c (md_show_usage): Show usage for all
18 Blackfin specific options.
19
4199fe12
AM		 202010-03-09 Alan Modra <amodra@gmail.com>
21
22 PR gas/11356
23 * listing.c (listing_newline): Correct backslash quote logic.
24
40cf28aa
RO		 252010-03-08 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
26
27 * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define.
28 (ELF_TARGET_FORMAT64): Define.
29
26b6f191
PB		 302010-03-05 Paul Brook <paul@codesourcery.com>
31
32 * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
33
772657e9
AS		 342010-03-02 Andrew Stubbs <ams@codesourcery.com>
35
36 * config/tc-sh.c (get_specific): Move overflow checking code to avoid
37 reading uninitialized data.
38
bd56defd
TG		 392010-03-01 Tristan Gingold <gingold@adacore.com>
40
41 * config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
42
743d7f19
DE		 432010-02-26 Doug Evans <dje@sebabeach.org>
44
45 * configure.tgt: Fix mep cpu case.
46
f8a8e9d6
JZ		 472010-02-26 Jie Zhang <jie@codesourcery.com>
48
49 * config/tc-arm.c (do_t_strexd): Remove
50 operand[1] != operand[2] contraint.
51
3fde54a2
JZ		 522010-02-26 Jie Zhang <jie@codesourcery.com>
53
54 * config/tc-arm.c (neon_select_shape): No need to match
55 the remaining operands in the shape when one operand does
56 not match.
57
e23c0ad8
JZ		 582010-02-26 Jie Zhang <jie@codesourcery.com>
59
60 * config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
61 alignment.
62
fae0b242
DE		 632010-02-25 Doug Evans <dje@sebabeach.org>
64
65 * cgen.c: Whitespace fixes.
66 (weak_operand_overflow_check): Formatting fix.
67
a6c56050
L		 682010-02-25 H.J. Lu <hongjiu.lu@intel.com>
69
70 * config/tc-i386.c (match_template): Update error messages.
71
891edac4
L		 722010-02-25 H.J. Lu <hongjiu.lu@intel.com>
73
74 * config/tc-i386.c (_i386_insn): Add err_msg.
75 (operand_size_match): Set err_msg on failure.
76 (operand_type_match): Likewise.
77 (operand_type_register_match): Likewise.
78 (VEX_check_operands): Likewise.
79 (match_template): Likewise. Use i.err_msg with as_bad.
80
c67a084a
NC		 812010-02-25 Wu Zhangjin <wuzhangjin@gmail.com>
82
83 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,
84 mips_fix_loongson2f_jump): New variables.
85 (md_longopts): Add New options -mfix-loongson2f-nop/jump,
86 -mno-fix-loongson2f-nop/jump.
87 (md_parse_option): Initialize variables via above options.
88 (options): New enums for the above options.
89 (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
90 (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
91 New functions.
92 (append_insn): call fix_loongson2f().
93 (mips_handle_align): Replace the implicit nops.
94 * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
95 for the new mips_handle_align().
96 * doc/c-mips.texi: Document the new options.
97
56adecf4
DG		 982010-02-23 Daniel Gutson <dgutson@codesourcery.com>
99
100 * config/tc-arm.c (do_rd_rm_rn): Added warning
101 for obsolete insns.
102
17e57237
NC		 1032010-02-23 Andrew Zabolotny <anpaza@mail.ru>
104
105 PR binutils/11297
106 * config/tc-avr.c (md_apply_fix): Handle BFD_RELOC_8.
107 (avr_cons_fix_new): Handle fixups of a single byte.
108
8a59fff3
MGD		 1092010-02-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
110
111 PR 9861
112 * config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
113 compiler's predefines.
114
487565fe
AM		 1152010-02-19 Alan Modra <amodra@gmail.com>
116
117 * configure.tgt: Whiltespace. Sort moxie entry.
118
cd21e546
MGD		 1192010-02-18 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
120
121 * config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use.
122 * doc/c-arm.texi: Likewise.
123
77551a33
DG		 1242010-02-12 Daniel Gutson <dgutson@codesourcery.com>
125
126 * config/tc-arm.c (asm_opcode): operands type
127 change.
128 (BAD_PC_ADDRESSING): New macro message.
129 (BAD_PC_WRITEBACK): Likewise.
130 (MIX_ARM_THUMB_OPERANDS): New macro.
131 (operand_parse_code): Added enum values.
132 (parse_operands): Added thumb/arm distinction,
133 plus new enum values handling.
134 (encode_arm_addr_mode_2): Validations enhanced.
135 (encode_arm_addr_mode_3): Likewise.
136 (do_rm_rd_rn): Likewise.
137 (encode_thumb32_addr_mode): Likewise.
138 (do_t_ldrex): Likewise.
139 (do_t_ldst): Likewise.
140 (do_t_strex): Likewise.
141 (md_assemble): Call parse_operands with
142 a new parameter.
143 (OPS_1): New macro.
144 (OPS_2): Likewise.
145 (OPS_3): Likewise.
146 (OPS_4): Likewise.
147 (OPS_5): Likewise.
148 (OPS_6): Likewise.
149 (insns): Updated insns operands.
150
9d0e8497
TG		 1512010-02-12 Tristan Gingold <gingold@adacore.com>
152 Douglas B Rupp <rupp@gnat.com>
153
154 * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
155 (DUMMY_RELOC_IA64_SLOTCOUNT): Added.
156 (pseudo_func): Add an entry for slotcount.
157 (md_begin): Initialize slotcount pseudo symbol.
158 (ia64_parse_name): Handle @slotcount parameter.
159 (ia64_gen_real_reloc_type): Handle slotcount.
160 (md_apply_fix): Ditto.
161 * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.
162
6fa78d94
SA		 1632010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>
164
165 * config/tc-xtensa.c (istack_init): Don't call memset.
166
a89c407e
SA		 1672010-02-11 Sterling Augustine <sterling@tensilica.com>
168
169 * config/tc-xtensa.c (cache_literal_section): Handle prefixes as
170 well as suffixes.
171
6fa78d94 1722010-02-11 Sterling Augustine <sterling@tensilica.com>
a89c407e
SA		 173
174 * config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
175
24981e7b
L		 1762010-02-11 H.J. Lu <hongjiu.lu@intel.com>
177
178 * config/tc-i386.c (build_modrm_byte): Reformat.
179
c75ef631
L		 1802010-02-11 H.J. Lu <hongjiu.lu@intel.com>
181
182 * config/tc-i386.c: Update copyright.
183
a683cc34
SP		 1842010-02-10 Quentin Neill <quentin.neill@amd.com>
185 Sebastian Pop <sebastian.pop@amd.com>
186
187 * config/tc-i386.c (vec_imm4) New operand type.
188 (fits_in_imm4): New.
189 (VEX_check_operands): New.
190 (check_reverse): Call VEX_check_operands.
191 (build_modrm_byte): Reintroduce code for 5
192 operand insns. Fix whitespace.
193
cdc51b07
RS		 1942010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
195
196 * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
197 -mpwr6 and -mpwr7.
198
3a1e9c4a
SA		 1992010-02-09 Sterling Augustine <sterling@tensilica.com>
200
201 * config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
202 (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
203 (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
204
486499d0
CL		 2052010-02-08 Christophe Lyon <christophe.lyon@st.com>
206
207 * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
208 non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
209 BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
210 BFD_RELOC_ARM_PCREL_CALL)
211
19ef5f3d
SA		 2122010-02-08 Sterling Augustine <sterling@tensilica.com>
213
214 * config/tc-xtensa.c (frag_format_size): Generalize logic to
215 handle more instruction sizes and fetch widths.
216 (branch_align_power): Likewise.
217 (text_align_power): Likewise.
218 (bytes_to_stretch): Likewise.
219
ce3d2015
AM		 2202010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
221
222 * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs.
223 (ppc_mach): Handle titan.
224 * doc/c-ppc.texi: Mention -mtitan.
225
19ef5f3d
SA		 2262010-02-05 Sterling Augustine <sterling@tensilica.com>
227
228 * config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
229 replace with...
230 (xtensa_fetch_width) ...this.
231
1e4cb857
JM		 2322010-02-05 Joseph Myers <joseph@codesourcery.com>
233
234 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,
235 MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
236 * Makefile.in: Regenerate.
237
68339fdf
SP		 2382010-02-03 Quentin Neill <quentin.neill@amd.com>
239
240 * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
241 (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
242 * config/tc-i386.h (processor_type): Same.
243 * doc/c-i386.texi: Change amdfam15 to bdver1.
244
99b253c5
NC		 2452010-01-29 Nick Clifton <nickc@redhat.com>
246
247 PR 11136
248 * config/tc-arm.c (neon_check_type): Handle a neon_shape value of
249 NS_NULL.
250
31907d5e
DK		 2512010-01-27 Dave Korn <dave.korn.cygwin@gmail.com>
252
253 * NEWS: Mention new feature.
254 * config/obj-coff.c (obj_coff_section): Accept digits and use
255 to override default section alignment power if specified.
256 * doc/as.texinfo (.section directive): Update documentation.
257
539f890d
L		 2582010-01-27 H.J. Lu <hongjiu.lu@intel.com>
259
260 * config/tc-i386.c (avxscalar): New.
261 (OPTION_MAVXSCALAR): Likewise.
262 (build_vex_prefix): Select vector_length for scalar instructions
263 based on avxscalar.
264 (md_longopts): Add OPTION_MAVXSCALAR.
265 (md_parse_option): Handle OPTION_MAVXSCALAR.
266 (md_show_usage): Add -mavxscalar=.
267
268 * doc/c-i386.texi: Document -mavxscalar=.
269
80de6e00
L		 2702010-01-24 H.J. Lu <hongjiu.lu@intel.com>
271
272 * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
273 0xc4 individually.
274
c865e45b
RS		 2752010-01-23 Richard Sandiford <r.sandiford@uk.ibm.com>
276
277 * write.h (fix_at_start): Declare.
278 * write.c (fix_new_internal): Add at_beginning parameter.
279 Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
280 seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
281 (fix_new, fix_new_exp): Update accordingly.
282 (fix_at_start): New function.
283 * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
284 (ppc_ref): New function, for OBJ_XCOFF.
285 (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
286 * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
287
53e5c8fe
RO		 2882010-01-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
289
290 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
291 on 64-bit Solaris/x86.
292 Include obj-format.h earlier.
293
55786da2 2942010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
99b253c5 295
55786da2
AK		 296 * config/tc-s390.c (s390_elf_final_processing): New function.
297 * config/tc-s390.h (elf_tc_final_processing): New macro definition.
298 (s390_elf_final_processing): Added prototype.
299
300
760f3a89
NC		 3012010-01-20 Nick Clifton <nickc@redhat.com>
302
303 PR 11109
304 * config/tc-arm.c (do_neon_cvt): Rename to do_neon_cvt_1. Add
305 code to handle round-to-zero for VCVT conversions.
306 (do_neon_cvt): New. Call do_neon_cvt_1.
307 (do_neon_cvtr): New. Call do_neon_cvt_1.
308 (insns): Use do_neon_cvt for VCVT insn and do_neon_cvtr for VCVTR
309 insn.
310
37a1f277
TG		 3112010-01-18 Tristan Gingold <gingold@adacore.com>
312
313 * config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
760f3a89 314
a6461c02
SP		 3152010-01-15 Sebastian Pop <sebastian.pop@amd.com>
316
317 * config/tc-i386.c (md_assemble): Before accessing the IMM field
318 check that it's not an XOP insn.
319
62fb9fe1
JZ		 3202010-01-14 Jie Zhang <jie.zhang@analog.com>
321
322 * config/bfin-aux.h: Remove argument names in function
323 declarations.
324 * config/bfin-lex.l (parse_int): Fix shadowed variable name
325 warning.
326 * config/bfin-parse.y (value_match): Remove argument names
327 in declaration.
328 (notethat): Likewise.
329 (yyerror): Likewise.
330
afa62d5e
DJ		 3312010-01-13 Daniel Jacobowitz <dan@codesourcery.com>
332
333 * config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
334
52b010e4
NC		 3352010-01-13 Nick Clifton <nickc@redhat.com>
336
337 * config/tc-h8300.c (h8300_elf_section): New function - issue a
338 warning message if a new section is created without setting any
339 attributes for it.
340 (md_pseudo_table): Intercept section creation pseudos.
341 (md_pcrel_from): Replace abort with an error message.
342 * config/obj-elf.c (obj_elf_section_name): Export this function.
343 * config/obj-elf.h (obj_elf_section_name): Prototype.
344
cc761f75
AM		 3452010-01-12 Alan Modra <amodra@gmail.com>
346
347 PR 11122
348 * listing.c (print_source): Add one to line number.
349
3725885a
RW		 3502010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
351
352 * Makefile.in: Regenerate.
353 * configure: Regenerate.
354 * doc/Makefile.in: Regenerate.
355
5256a5b0
L		 3562010-01-08 H.J. Lu <hongjiu.lu@intel.com>
357
358 * version.c (parse_args): Change to "Copyright 2010".
359
69dd9865
SP		 3602010-01-06 Quentin Neill <quentin.neill@amd.com>
361
362 * config/tc-i386.c (cpu_arch): Add amdfam15.
363 (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
364 * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
365 * doc/c-i386.texi: Add amdfam15.
366
4316f0d2
DG		 3672010-01-04 Daniel Gutson <dgutson@codesourcery.com>
368
369 * config/tc-arm.c (do_neon_logic): Accept imm value
370 in the third operand too.
371 (operand_parse_code): OP_RNDQ_IMVNb renamed to
372 OP_RNDQ_Ibig.
373 (parse_operands): OP_NILO case removed, applied renaming.
374 (insns): Neon shape changed for some logic instructions.
375
b1a769ed
DG		 3762010-01-04 Daniel Gutson <dgutson@codesourcery.com>
377
378 * config/tc-arm.c (do_neon_ldx_stx): Added
379 validation for vector load/store insns.
380
0dc93057
AM		 3812010-01-04 Edmar Wienskoski <edmar@freescale.com>
382
383 * config/tc-ppc.c (md_show_usage): Document -me500mc64.
384
88714cb8
DG		 3852010-01-03 Daniel Gutson <dgutson@codesourcery.com>
386
387 * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
388 (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
389 (NEON_ENCODE): New macro.
390 (check_neon_suffixes): New macro.
391 (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
392 (do_vfp_nsyn_opcode): Likewise.
393 (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
394 (do_vfp_nsyn_cmp): Likewise.
395 (do_neon_shl_imm): Likewise.
396 (do_neon_qshl_imm): Likewise.
397 (neon_dyadic_misc): Likewise.
398 (do_neon_mac_maybe_scalar): Likewise.
399 (do_neon_qdmulh): Likewise.
400 (do_neon_qmovn): Likewise.
401 (do_neon_qmovun): Likewise.
402 (do_neon_movn): Likewise.
403 (neon_mac_reg_scalar_long): Likewise.
404 (do_neon_vmull): Likewise.
405 (do_neon_trn): Likewise.
406 (do_neon_ldx_stx): Likewise.
407 (neon_dp_fixup): Changed signature and set the flag.
408 (neon_three_same): Call the above with new signature.
409 (neon_two_same): Likewise.
410 (neon_imm_shift): Likewise.
411 (neon_mul_mac): Likewise.
412 (do_neon_abs_neg): Likewise.
413 (neon_mixed_length): Likewise.
414 (do_neon_ext): Likewise.
415 (do_neon_mov): Likewise.
416 (do_neon_tbl_tbx): Likewise.
417 (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
418 (neon_compare): Likewise.
419 (do_neon_shll): Likewise.
420 (do_neon_cvt): Likewise.
421 (do_neon_mvn): Likewise.
422 (do_neon_dup): Likewise.
0dc93057 423 (md_assemble): Call check_neon_suffixes ().
99f1a7a7 424
43ecc30f 425For older changes see ChangeLog-2009
08d56133
NC		 426\f
427Local Variables:
428mode: change-log
429left-margin: 8
430fill-column: 74
431version-control: never
432End:
GDB Binutils - Deliverables
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