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Report overflow on PowerPC64 @h and @ha relocations.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
f9c6b907
AM		 12013-10-30 Alan Modra <amodra@gmail.com>
2
3 * config/tc-ppc.c (SEX16): Don't mask.
4 (REPORT_OVERFLOW_HI): Define as zero.
5 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
6 @tprel@high, and @tprel@higha modifiers.
7 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
8 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
9 Handle new relocs.
10 (md_apply_fix): Similarly.
11
9d5de888
CF		 122013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
13
14 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
15 (fpr_write_mask): Test MSA registers.
16 (can_swap_branch_p): Check fpr write followed by fpr read.
17
3fc1d038
NC		 182013-10-18 Nick Clifton <nickc@redhat.com>
19
20 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
21
56d438b1
CF		 222013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
23 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
24
25 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
26 (md_longopts): Add mmsa and mno-msa.
27 (mips_ases): Add msa.
28 (RTYPE_MASK): Update.
29 (RTYPE_MSA): New define.
30 (OT_REG_ELEMENT): Replace with...
31 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
32 (mips_operand_token): Replace reg_element with index.
33 (mips_parse_argument_token): Treat vector indices as separate tokens.
34 Handle register indices.
35 (md_begin): Add MSA register names.
36 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
37 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
38 (match_mdmx_imm_reg_operand): Update accordingly.
39 (match_imm_index_operand): New function.
40 (match_reg_index_operand): New function.
41 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
42 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
43 (md_show_usage): Print -mmsa and -mno-msa.
44 * doc/as.texinfo: Document -mmsa and -mno-msa.
45 * doc/c-mips.texi: Document -mmsa and -mno-msa.
46 Document .set msa and .set nomsa.
47
b2e951ec
NC		 482013-10-14 Nick Clifton <nickc@redhat.com>
49
50 * read.c (add_include_dir): Use xrealloc.
51 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
52 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
53
ae335a4e
SL		 542013-10-13 Sandra Loosemore <sandra@codesourcery.com>
55
56 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
57 also test/refer to "sstatus". Reformat the warning message.
58
0e1c2434
SK		 592013-10-10 Sean Keys <skeys@ipdatasys.com>
60
61 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
62
47cd3fa7
JB		 632013-10-10 Jan Beulich <jbeulich@suse.com>
64
65 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
66 swapping for bndmk, bndldx, and bndstx.
67
6085f853
NC		 682013-10-09 Nick Clifton <nickc@redhat.com>
69
b7b2bb1d
NC		 70 PR gas/16025
71 * config/tc-epiphany.c (md_convert_frag): Add missing break
72 statement.
73
6085f853
NC		 74 PR gas/16026
75 * config/tc-mn10200.c (md_convert_frag): Add missing break
76 statement.
77
cecf1424
JB		 782013-10-08 Jan Beulich <jbeulich@suse.com>
79
80 * tc-i386.c (check_word_reg): Remove misplaced "else".
81 (check_long_reg): Restore symmetry with check_word_reg.
82
d3bfe16e
JB		 832013-10-08 Jan Beulich <jbeulich@suse.com>
84
85 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
86 LR/PC check.
87
38d77545
NC		 882013-10-08 Nick Clifton <nickc@redhat.com>
89
90 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
91 for "<foo>a". Issue error messages for unrecognised or corrrupt
92 size extensions.
93
fe8b4cc3
KT		 942013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
95
96 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
97 possible.
98
c7b0bd56
SE		 992013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
100
101 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
102 * doc/c-i386.texi: Add -march=bdver4 option.
103
cc9afea3
AM		 1042013-09-20 Alan Modra <amodra@gmail.com>
105
106 * configure: Regenerate.
107
58ca03a2
TG		 1082013-09-18 Tristan Gingold <gingold@adacore.com>
109
110 * NEWS: Add marker for 2.24.
111
ab905915
NC		 1122013-09-18 Nick Clifton <nickc@redhat.com>
113
114 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
115 (move_data): New variable.
116 (md_parse_option): Parse -md.
117 (msp430_section): New function. Catch references to the .bss or
118 .data sections and generate a special symbol for use by the libcrt
119 library.
120 (md_pseudo_table): Intercept .section directives.
121 (md_longopt): Add -md
122 (md_show_usage): Likewise.
123 (msp430_operands): Generate a warning message if a NOP is inserted
124 into the instruction stream.
125 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
126
f1c38003
SE		 1272013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
128
129 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 130 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 131
1d50d57c
WN		 1322013-09-16 Will Newton <will.newton@linaro.org>
133
134 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
135 disallowing element size 64 with interleave other than 1.
136
173d3447
CF		 1372013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
138
139 * config/tc-mips.c (match_insn): Set error when $31 is used for
140 bltzal* and bgezal*.
141
ac21e7da
TG		 1422013-09-04 Tristan Gingold <gingold@adacore.com>
143
144 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
145 symbols.
146
74db7efb
NC		 1472013-09-04 Roland McGrath <mcgrathr@google.com>
148
149 PR gas/15914
150 * config/tc-arm.c (T16_32_TAB): Add _udf.
151 (do_t_udf): New function.
152 (insns): Add "udf".
153
664a88c6
DD		 1542013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
155
156 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
157 assembler errors at correct position.
158
9aff4b7a
NC		 1592013-08-23 Yuri Chornoivan <yurchor@ukr.net>
160
161 PR binutils/15834
162 * config/tc-ia64.c: Fix typos.
163 * config/tc-sparc.c: Likewise.
164 * config/tc-z80.c: Likewise.
165 * doc/c-i386.texi: Likewise.
166 * doc/c-m32r.texi: Likewise.
167
4f2374c7
WN		 1682013-08-23 Will Newton <will.newton@linaro.org>
169
9aff4b7a 170 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 171 for pre-indexed addressing modes.
172
b4e6cb80
AM		 1732013-08-21 Alan Modra <amodra@gmail.com>
174
175 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
176 range check label number for use with fb_low_counter array.
177
1661c76c
RS		 1782013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
179
180 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
181 (mips_parse_argument_token, validate_micromips_insn, md_begin)
182 (check_regno, match_float_constant, check_completed_insn, append_insn)
183 (match_insn, match_mips16_insn, match_insns, macro_start)
184 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
185 (mips16_ip, mips_set_option_string, md_parse_option)
186 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
187 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
188 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
189 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
190 Start error messages with a lower-case letter. Do not end error
191 messages with a period. Wrap long messages to 80 character-lines.
192 Use "cannot" instead of "can't" and "can not".
193
b0e6f033
RS		 1942013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
195
196 * config/tc-mips.c (imm_expr): Expand comment.
197 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
198 when populated.
199
e423441d
RS		 2002013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
201
202 * config/tc-mips.c (imm2_expr): Delete.
203 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
204
5e0dc5ba
RS		 2052013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
206
207 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
208 (macro): Remove M_DEXT and M_DINS handling.
209
60f20e8b
RS		 2102013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
211
212 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
213 lax_max with lax_match.
214 (match_int_operand): Update accordingly. Don't report an error
215 for !lax_match-only cases.
216 (match_insn): Replace more_alts with lax_match and use it to
217 initialize the mips_arg_info field. Add a complete_p parameter.
218 Handle implicit VU0 suffixes here.
219 (match_invalid_for_isa, match_insns, match_mips16_insns): New
220 functions.
221 (mips_ip, mips16_ip): Use them.
222
d436c1c2
RS		 2232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
224
225 * config/tc-mips.c (match_expression): Report uses of registers here.
226 Add a "must be an immediate expression" error. Handle elided offsets
227 here rather than...
228 (match_int_operand): ...here.
229
1a00e612
RS		 2302013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
231
232 * config/tc-mips.c (mips_arg_info): Remove soft_match.
233 (match_out_of_range, match_not_constant): New functions.
234 (match_const_int): Remove fallback parameter and check for soft_match.
235 Use match_not_constant.
236 (match_mapped_int_operand, match_addiusp_operand)
237 (match_perf_reg_operand, match_save_restore_list_operand)
238 (match_mdmx_imm_reg_operand): Update accordingly. Use
239 match_out_of_range and set_insn_error* instead of as_bad.
240 (match_int_operand): Likewise. Use match_not_constant in the
241 !allows_nonconst case.
242 (match_float_constant): Report invalid float constants.
243 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
244 match_float_constant to check for invalid constants. Fail the
245 match if match_const_int or match_float_constant return false.
246 (mips_ip): Update accordingly.
247 (mips16_ip): Likewise. Undo null termination of instruction name
248 once lookup is complete.
249
e3de51ce
RS		 2502013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
251
252 * config/tc-mips.c (mips_insn_error_format): New enum.
253 (mips_insn_error): New struct.
254 (insn_error): Change to a mips_insn_error.
255 (clear_insn_error, set_insn_error_format, set_insn_error)
256 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
257 functions.
258 (mips_parse_argument_token, md_assemble, match_insn)
259 (match_mips16_insn): Use them instead of manipulating insn_error
260 directly.
261 (mips_ip, mips16_ip): Likewise. Simplify control flow.
262
97d87491
RS		 2632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
264
265 * config/tc-mips.c (normalize_constant_expr): Move further up file.
266 (normalize_address_expr): Likewise.
267 (match_insn, match_mips16_insn): New functions, split out from...
268 (mips_ip, mips16_ip): ...here.
269
0f35dbc4
RS		 2702013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
271
272 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
273 OP_OPTIONAL_REG.
274 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
275 for optional operands.
276
27285eed
AM		 2772013-08-16 Alan Modra <amodra@gmail.com>
278
279 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
280 modifiers generally.
281
cbe02d4f
AM		 2822013-08-16 Alan Modra <amodra@gmail.com>
283
284 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
285
3c02c47f
DE		 2862013-08-14 David Edelsohn <dje.gcc@gmail.com>
287
288 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
289 argument as alignment.
290
4046d87a
NC		 2912013-08-09 Nick Clifton <nickc@redhat.com>
292
293 * config/tc-rl78.c (elf_flags): New variable.
294 (enum options): Add OPTION_G10.
295 (md_longopts): Add mg10.
296 (md_parse_option): Parse -mg10.
297 (rl78_elf_final_processing): New function.
298 * config/tc-rl78.c (tc_final_processing): Define.
299 * doc/c-rl78.texi: Document -mg10 option.
300
ee5734f0
RS		 3012013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
302
303 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
304 suffixes to be elided too.
305 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
306 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
307 to be omitted too.
308
13896403
RS		 3092013-08-05 John Tytgat <john@bass-software.com>
310
311 * po/POTFILES.in: Regenerate.
312
d6787ef9
EB		 3132013-08-05 Eric Botcazou <ebotcazou@adacore.com>
314 Konrad Eisele <konrad@gaisler.com>
315
316 * config/tc-sparc.c (sparc_arch_types): Add leon.
317 (sparc_arch): Move sparc4 around and add leon.
318 (sparc_target_format): Document -Aleon.
319 * doc/c-sparc.texi: Likewise.
320
da8bca91
RS		 3212013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
322
323 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
324
14daeee3
RS		 3252013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
326 Richard Sandiford <rdsandiford@googlemail.com>
327
328 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
329 (RWARN): Bump to 0x8000000.
330 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
331 (RTYPE_R5900_ACC): New register types.
332 (RTYPE_MASK): Include them.
333 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
334 macros.
335 (reg_names): Include them.
336 (mips_parse_register_1): New function, split out from...
337 (mips_parse_register): ...here. Add a channels_ptr parameter.
338 Look for VU0 channel suffixes when nonnull.
339 (reg_lookup): Update the call to mips_parse_register.
340 (mips_parse_vu0_channels): New function.
341 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
342 (mips_operand_token): Add a "channels" field to the union.
343 Extend the comment above "ch" to OT_DOUBLE_CHAR.
344 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
345 (mips_parse_argument_token): Handle channel suffixes here too.
346 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
347 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
348 Handle '#' formats.
349 (md_begin): Register $vfN and $vfI registers.
350 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
351 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
352 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
353 (match_vu0_suffix_operand): New function.
354 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
355 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
356 (mips_lookup_insn): New function.
357 (mips_ip): Use it. Allow "+K" operands to be elided at the end
358 of an instruction. Handle '#' sequences.
359
c0ebe874
RS		 3602013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
361
362 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
363 values and use it instead of sreg, treg, xreg, etc.
364
3ccad066
RS		 3652013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
366
367 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
368 and mips_int_operand_max.
369 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
370 Delete.
371 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
372 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
373 instead of mips16_immed_operand.
374
0acfaea6
RS		 3752013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
376
377 * config/tc-mips.c (mips16_macro): Don't use move_register.
378 (mips16_ip): Allow macros to use 'p'.
379
fc76e730
RS		 3802013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
381
382 * config/tc-mips.c (MAX_OPERANDS): New macro.
383 (mips_operand_array): New structure.
384 (mips_operands, mips16_operands, micromips_operands): New arrays.
385 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
386 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
387 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
388 (micromips_to_32_reg_q_map): Delete.
389 (insn_operands, insn_opno, insn_extract_operand): New functions.
390 (validate_mips_insn): Take a mips_operand_array as argument and
391 use it to build up a list of operands. Extend to handle INSN_MACRO
392 and MIPS16.
393 (validate_mips16_insn): New function.
394 (validate_micromips_insn): Take a mips_operand_array as argument.
395 Handle INSN_MACRO.
396 (md_begin): Initialize mips_operands, mips16_operands and
397 micromips_operands. Call validate_mips_insn and
398 validate_micromips_insn for macro instructions too.
399 Call validate_mips16_insn for MIPS16 instructions.
400 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
401 New functions.
402 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
403 them. Handle INSN_UDI.
404 (get_append_method): Use gpr_read_mask.
405
26545944
RS		 4062013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
407
408 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
409 flags for MIPS16 and non-MIPS16 instructions.
410 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
411 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
412 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
413 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
414 and non-MIPS16 instructions. Fix formatting.
415
85fcb30f
RS		 4162013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
417
418 * config/tc-mips.c (reg_needs_delay): Move later in file.
419 Use gpr_write_mask.
420 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
421
43234a1e
L		 4222013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
423 Alexander Ivchenko <alexander.ivchenko@intel.com>
424 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
425 Sergey Lega <sergey.s.lega@intel.com>
426 Anna Tikhonova <anna.tikhonova@intel.com>
427 Ilya Tocar <ilya.tocar@intel.com>
428 Andrey Turetskiy <andrey.turetskiy@intel.com>
429 Ilya Verbin <ilya.verbin@intel.com>
430 Kirill Yukhin <kirill.yukhin@intel.com>
431 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
432
433 * config/tc-i386-intel.c (O_zmmword_ptr): New.
434 (i386_types): Add zmmword.
435 (i386_intel_simplify_register): Allow regzmm.
436 (i386_intel_simplify): Handle zmmwords.
437 (i386_intel_operand): Handle RC/SAE, vector operations and
438 zmmwords.
439 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
440 (struct RC_Operation): New.
441 (struct Mask_Operation): New.
442 (struct Broadcast_Operation): New.
443 (vex_prefix): Size of bytes increased to 4 to support EVEX
444 encoding.
445 (enum i386_error): Add new error codes: unsupported_broadcast,
446 broadcast_not_on_src_operand, broadcast_needed,
447 unsupported_masking, mask_not_on_destination, no_default_mask,
448 unsupported_rc_sae, rc_sae_operand_not_last_imm,
449 invalid_register_operand, try_vector_disp8.
450 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
451 rounding, broadcast, memshift.
452 (struct RC_name): New.
453 (RC_NamesTable): New.
454 (evexlig): New.
455 (evexwig): New.
456 (extra_symbol_chars): Add '{'.
457 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
458 (i386_operand_type): Add regzmm, regmask and vec_disp8.
459 (match_mem_size): Handle zmmwords.
460 (operand_type_match): Handle zmm-registers.
461 (mode_from_disp_size): Handle vec_disp8.
462 (fits_in_vec_disp8): New.
463 (md_begin): Handle {} properly.
464 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
465 (build_vex_prefix): Handle vrex.
466 (build_evex_prefix): New.
467 (process_immext): Adjust to properly handle EVEX.
468 (md_assemble): Add EVEX encoding support.
469 (swap_2_operands): Correctly handle operands with masking,
470 broadcasting or RC/SAE.
471 (check_VecOperands): Support EVEX features.
472 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
473 (match_template): Support regzmm and handle new error codes.
474 (process_suffix): Handle zmmwords and zmm-registers.
475 (check_byte_reg): Extend to zmm-registers.
476 (process_operands): Extend to zmm-registers.
477 (build_modrm_byte): Handle EVEX.
478 (output_insn): Adjust to properly handle EVEX case.
479 (disp_size): Handle vec_disp8.
480 (output_disp): Support compressed disp8*N evex feature.
481 (output_imm): Handle RC/SAE immediates properly.
482 (check_VecOperations): New.
483 (i386_immediate): Handle EVEX features.
484 (i386_index_check): Handle zmmwords and zmm-registers.
485 (RC_SAE_immediate): New.
486 (i386_att_operand): Handle EVEX features.
487 (parse_real_register): Add a check for ZMM/Mask registers.
488 (OPTION_MEVEXLIG): New.
489 (OPTION_MEVEXWIG): New.
490 (md_longopts): Add mevexlig and mevexwig.
491 (md_parse_option): Handle mevexlig and mevexwig options.
492 (md_show_usage): Add description for mevexlig and mevexwig.
493 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
494 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
495
a0046408
L		 4962013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
497
498 * config/tc-i386.c (cpu_arch): Add .sha.
499 * doc/c-i386.texi: Document sha/.sha.
500
7e8b059b
L		 5012013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
502 Kirill Yukhin <kirill.yukhin@intel.com>
503 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
504
505 * config/tc-i386.c (BND_PREFIX): New.
506 (struct _i386_insn): Add new field bnd_prefix.
507 (add_bnd_prefix): New.
508 (cpu_arch): Add MPX.
509 (i386_operand_type): Add regbnd.
510 (md_assemble): Handle BND prefixes.
511 (parse_insn): Likewise.
512 (output_branch): Likewise.
513 (output_jump): Likewise.
514 (build_modrm_byte): Handle regbnd.
515 (OPTION_MADD_BND_PREFIX): New.
516 (md_longopts): Add entry for 'madd-bnd-prefix'.
517 (md_parse_option): Handle madd-bnd-prefix option.
518 (md_show_usage): Add description for madd-bnd-prefix
519 option.
520 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
521
7fa9fcb6
TG		 5222013-07-24 Tristan Gingold <gingold@adacore.com>
523
524 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
525 xcoff targets.
526
614eb277
AK		 5272013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
528
529 * config/tc-s390.c (s390_machine): Don't force the .machine
530 argument to lower case.
531
e673710a
KT		 5322013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
533
534 * config/tc-arm.c (s_arm_arch_extension): Improve error message
535 for invalid extension.
536
69091a2c
YZ		 5372013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
538
539 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
540 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
541 (aarch64_abi): New variable.
542 (ilp32_p): Change to be a macro.
543 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
544 (struct aarch64_option_abi_value_table): New struct.
545 (aarch64_abis): New table.
546 (aarch64_parse_abi): New function.
547 (aarch64_long_opts): Add entry for -mabi=.
548 * doc/as.texinfo (Target AArch64 options): Document -mabi.
549 * doc/c-aarch64.texi: Likewise.
550
faf786e6
NC		 5512013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
552
553 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
554 unsigned comparison.
555
f0c00282
NC		 5562013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
557
cbe02d4f 558 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 559 RX610.
cbe02d4f 560 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 561 check floating point operation support for target RX100 and
562 RX200.
cbe02d4f
AM		 563 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
564 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
565 RX200, RX600, and RX610
f0c00282 566
8c997c27
NC		 5672013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
568
569 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
570
8be59acb
NC		 5712013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
572
573 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
574 * doc/c-avr.texi: Likewise.
575
4a06e5a2
RS		 5762013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
577
578 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
579 error with older GCCs.
580 (mips16_macro_build): Dereference args.
581
a92713e6
RS		 5822013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
583
584 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
585 New functions, split out from...
586 (reg_lookup): ...here. Remove itbl support.
587 (reglist_lookup): Delete.
588 (mips_operand_token_type): New enum.
589 (mips_operand_token): New structure.
590 (mips_operand_tokens): New variable.
591 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
592 (mips_parse_arguments): New functions.
593 (md_begin): Initialize mips_operand_tokens.
594 (mips_arg_info): Add a token field. Remove optional_reg field.
595 (match_char, match_expression): New functions.
596 (match_const_int): Use match_expression. Remove "s" argument
597 and return a boolean result. Remove O_register handling.
598 (match_regno, match_reg, match_reg_range): New functions.
599 (match_int_operand, match_mapped_int_operand, match_msb_operand)
600 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
601 (match_addiusp_operand, match_clo_clz_dest_operand)
602 (match_lwm_swm_list_operand, match_entry_exit_operand)
603 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
604 (match_tied_reg_operand): Remove "s" argument and return a boolean
605 result. Match tokens rather than text. Update calls to
606 match_const_int. Rely on match_regno to call check_regno.
607 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
608 "arg" argument. Return a boolean result.
609 (parse_float_constant): Replace with...
610 (match_float_constant): ...this new function.
611 (match_operand): Remove "s" argument and return a boolean result.
612 Update calls to subfunctions.
613 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
614 rather than string-parsing routines. Update handling of optional
615 registers for token scheme.
616
89565f1b
RS		 6172013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
618
619 * config/tc-mips.c (parse_float_constant): Split out from...
620 (mips_ip): ...here.
621
3c14a432
RS		 6222013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
623
624 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
625 Delete.
626
364215c8
RS		 6272013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
628
629 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
630 (match_entry_exit_operand): New function.
631 (match_save_restore_list_operand): Likewise.
632 (match_operand): Use them.
633 (check_absolute_expr): Delete.
634 (mips16_ip): Rewrite main parsing loop to use mips_operands.
635
9e12b7a2
RS		 6362013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
637
638 * config/tc-mips.c: Enable functions commented out in previous patch.
639 (SKIP_SPACE_TABS): Move further up file.
640 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
641 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
642 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
643 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
644 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
645 (micromips_imm_b_map, micromips_imm_c_map): Delete.
646 (mips_lookup_reg_pair): Delete.
647 (macro): Use report_bad_range and report_bad_field.
648 (mips_immed, expr_const_in_range): Delete.
649 (mips_ip): Rewrite main parsing loop to use new functions.
650
a1d78564
RS		 6512013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
652
653 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
654 Change return type to bfd_boolean.
655 (report_bad_range, report_bad_field): New functions.
656 (mips_arg_info): New structure.
657 (match_const_int, convert_reg_type, check_regno, match_int_operand)
658 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
659 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
660 (match_addiusp_operand, match_clo_clz_dest_operand)
661 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
662 (match_pc_operand, match_tied_reg_operand, match_operand)
663 (check_completed_insn): New functions, commented out for now.
664
e077a1c8
RS		 6652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
666
667 * config/tc-mips.c (insn_insert_operand): New function.
668 (macro_build, mips16_macro_build): Put null character check
669 in the for loop and convert continues to breaks. Use operand
670 structures to handle constant operands.
671
ab902481
RS		 6722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
673
674 * config/tc-mips.c (validate_mips_insn): Move further up file.
675 Add insn_bits and decode_operand arguments. Use the mips_operand
676 fields to work out which bits an operand occupies. Detect double
677 definitions.
678 (validate_micromips_insn): Move further up file. Call into
679 validate_mips_insn.
680
2f8b73cc
RS		 6812013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
682
683 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
684
c8276761
RS		 6852013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
686
687 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
688 and "~".
689 (macro): Update accordingly.
690
77bd4346
RS		 6912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
692
693 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
694 (imm_reloc): Delete.
695 (md_assemble): Remove imm_reloc handling.
696 (mips_ip): Update commentary. Use offset_expr and offset_reloc
697 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
698 Use a temporary array rather than imm_reloc when parsing
699 constant expressions. Remove imm_reloc initialization.
700 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
701 for the relaxable field. Use a relax_char variable to track the
702 type of this field. Remove imm_reloc initialization.
703
cc537e56
RS		 7042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
705
706 * config/tc-mips.c (mips16_ip): Handle "I".
707
ba92f887
MR		 7082013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
709
710 * config/tc-mips.c (mips_flag_nan2008): New variable.
711 (options): Add OPTION_NAN enum value.
712 (md_longopts): Handle it.
713 (md_parse_option): Likewise.
714 (s_nan): New function.
715 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
716 (md_show_usage): Add -mnan.
717
718 * doc/as.texinfo (Overview): Add -mnan.
719 * doc/c-mips.texi (MIPS Opts): Document -mnan.
720 (MIPS NaN Encodings): New node. Document .nan directive.
721 (MIPS-Dependent): List the new node.
722
c1094734
TG		 7232013-07-09 Tristan Gingold <gingold@adacore.com>
724
725 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
726
0cbbe1b8
RS		 7272013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
728
729 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
730 for 'A' and assume that the constant has been elided if the result
731 is an O_register.
732
f2ae14a1
RS		 7332013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
734
735 * config/tc-mips.c (gprel16_reloc_p): New function.
736 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
737 BFD_RELOC_UNUSED.
738 (offset_high_part, small_offset_p): New functions.
739 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
740 register load and store macros, handle the 16-bit offset case first.
741 If a 16-bit offset is not suitable for the instruction we're
742 generating, load it into the temporary register using
743 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
744 M_L_DAB code once the address has been constructed. For double load
745 and store macros, again handle the 16-bit offset case first.
746 If the second register cannot be accessed from the same high
747 part as the first, load it into AT using ADDRESS_ADDI_INSN.
748 Fix the handling of LD in cases where the first register is the
749 same as the base. Also handle the case where the offset is
750 not 16 bits and the second register cannot be accessed from the
751 same high part as the first. For unaligned loads and stores,
752 fuse the offbits == 12 and old "ab" handling. Apply this handling
753 whenever the second offset needs a different high part from the first.
754 Construct the offset using ADDRESS_ADDI_INSN where possible,
755 for offbits == 16 as well as offbits == 12. Use offset_reloc
756 when constructing the individual loads and stores.
757 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
758 and offset_reloc before matching against a particular opcode.
759 Handle elided 'A' constants. Allow 'A' constants to use
760 relocation operators.
761
5c324c16
RS		 7622013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
763
764 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
765 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
766 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
767
23e69e47
RS		 7682013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
769
770 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
771 Require the msb to be <= 31 for "+s". Check that the size is <= 31
772 for both "+s" and "+S".
773
27c5c572
RS		 7742013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
775
776 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
777 (mips_ip, mips16_ip): Handle "+i".
778
e76ff5ab
RS		 7792013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
780
781 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
782 (micromips_to_32_reg_h_map): Rename to...
783 (micromips_to_32_reg_h_map1): ...this.
784 (micromips_to_32_reg_i_map): Rename to...
785 (micromips_to_32_reg_h_map2): ...this.
786 (mips_lookup_reg_pair): New function.
787 (gpr_write_mask, macro): Adjust after above renaming.
788 (validate_micromips_insn): Remove "mi" handling.
789 (mips_ip): Likewise. Parse both registers in a pair for "mh".
790
fa7616a4
RS		 7912013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
792
793 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
794 (mips_ip): Remove "+D" and "+T" handling.
795
fb798c50
AK		 7962013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
797
798 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
799 relocs.
800
2c0a3565
MS		 8012013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
802
4aa2c5e2
MS		 803 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
804
8052013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
806
2c0a3565
MS		 807 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
808 (aarch64_force_relocation): Likewise.
809
f40da81b
AM		 8102013-07-02 Alan Modra <amodra@gmail.com>
811
812 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
813
81566a9b
MR		 8142013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
815
816 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
817 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
818 Replace @sc{mips16} with literal `MIPS16'.
819 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
820
a6bb11b2
YZ		 8212013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
822
823 * config/tc-aarch64.c (reloc_table): Replace
824 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
825 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
826 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
827 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
828 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
829 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
830 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
831 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
832 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
833 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
834 (aarch64_force_relocation): Likewise.
835
cec5225b
YZ		 8362013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
837
838 * config/tc-aarch64.c (ilp32_p): New static variable.
839 (elf64_aarch64_target_format): Return the target according to the
840 value of 'ilp32_p'.
841 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
842 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
843 (aarch64_dwarf2_addr_size): New function.
844 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
845 (DWARF2_ADDR_SIZE): New define.
846
e335d9cb
RS		 8472013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
848
849 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
850
18870af7
RS		 8512013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
852
853 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
854
833794fc
MR		 8552013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
856
857 * config/tc-mips.c (mips_set_options): Add insn32 member.
858 (mips_opts): Initialize it.
859 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
860 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
861 (md_longopts): Add "minsn32" and "mno-insn32" options.
862 (is_size_valid): Handle insn32 mode.
863 (md_assemble): Pass instruction string down to macro.
864 (brk_fmt): Add second dimension and insn32 mode initializers.
865 (mfhl_fmt): Likewise.
866 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
867 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
868 (macro_build_jalr, move_register): Handle insn32 mode.
869 (macro_build_branch_rs): Likewise.
870 (macro): Handle insn32 mode.
871 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
872 (mips_ip): Handle insn32 mode.
873 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
874 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
875 (mips_handle_align): Handle insn32 mode.
876 (md_show_usage): Add -minsn32 and -mno-insn32.
877
878 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
879 -mno-insn32 options.
880 (-minsn32, -mno-insn32): New options.
881 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
882 options.
883 (MIPS assembly options): New node. Document .set insn32 and
884 .set noinsn32.
885 (MIPS-Dependent): List the new node.
886
d1706f38
NC		 8872013-06-25 Nick Clifton <nickc@redhat.com>
888
889 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
890 the PC in indirect addressing on 430xv2 parts.
891 (msp430_operands): Add version test to hardware bug encoding
892 restrictions.
893
477330fc
RM		 8942013-06-24 Roland McGrath <mcgrathr@google.com>
895
d996d970
RM		 896 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
897 so it skips whitespace before it.
898 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
899
477330fc
RM		 900 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
901 (arm_reg_parse_multi): Skip whitespace first.
902 (parse_reg_list): Likewise.
903 (parse_vfp_reg_list): Likewise.
904 (s_arm_unwind_save_mmxwcg): Likewise.
905
24382199
NC		 9062013-06-24 Nick Clifton <nickc@redhat.com>
907
908 PR gas/15623
909 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
910
c3678916
RS		 9112013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
912
913 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
914
42429eac
RS		 9152013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
916
917 * config/tc-mips.c: Assert that offsetT and valueT are at least
918 8 bytes in size.
919 (GPR_SMIN, GPR_SMAX): New macros.
920 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
921
f3ded42a
RS		 9222013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
923
924 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
925 conditions. Remove any code deselected by them.
926 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
927
e8044f35
RS		 9282013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
929
930 * NEWS: Note removal of ECOFF support.
931 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
932 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
933 (MULTI_CFILES): Remove config/e-mipsecoff.c.
934 * Makefile.in: Regenerate.
935 * configure.in: Remove MIPS ECOFF references.
936 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
937 Delete cases.
938 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
939 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
940 (mips-*-*): ...this single case.
941 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
942 MIPS emulations to be e-mipself*.
943 * configure: Regenerate.
944 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
945 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
946 (mips-*-sysv*): Remove coff and ecoff cases.
947 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
948 * ecoff.c: Remove reference to MIPS ECOFF.
949 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
950 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
951 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
952 (mips_hi_fixup): Tweak comment.
953 (append_insn): Require a howto.
954 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
955
98508b2a
RS		 9562013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
957
958 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
959 Use "CPU" instead of "cpu".
960 * doc/c-mips.texi: Likewise.
961 (MIPS Opts): Rename to MIPS Options.
962 (MIPS option stack): Rename to MIPS Option Stack.
963 (MIPS ASE instruction generation overrides): Rename to
964 MIPS ASE Instruction Generation Overrides (for now).
965 (MIPS floating-point): Rename to MIPS Floating-Point.
966
fc16f8cc
RS		 9672013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
968
969 * doc/c-mips.texi (MIPS Macros): New section.
970 (MIPS Object): Replace with...
971 (MIPS Small Data): ...this new section.
972
5a7560b5
RS		 9732013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
974
975 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
976 Capitalize name. Use @kindex instead of @cindex for .set entries.
977
a1b86ab7
RS		 9782013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
979
980 * doc/c-mips.texi (MIPS Stabs): Remove section.
981
c6278170
RS		 9822013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
983
984 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
985 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
986 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
987 (ISA_SUPPORTS_VIRT64_ASE): Delete.
988 (mips_ase): New structure.
989 (mips_ases): New table.
990 (FP64_ASES): New macro.
991 (mips_ase_groups): New array.
992 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
993 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
994 functions.
995 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
996 (md_parse_option): Use mips_ases and mips_set_ase instead of
997 separate case statements for each ASE option.
998 (mips_after_parse_args): Use FP64_ASES. Use
999 mips_check_isa_supports_ases to check the ASEs against
1000 other options.
1001 (s_mipsset): Use mips_ases and mips_set_ase instead of
1002 separate if statements for each ASE option. Use
1003 mips_check_isa_supports_ases, even when a non-ASE option
1004 is specified.
1005
63a4bc21
KT		 10062013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1007
1008 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1009
c31f3936
RS		 10102013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1011
1012 * config/tc-mips.c (md_shortopts, options, md_longopts)
1013 (md_longopts_size): Move earlier in file.
1014
846ef2d0
RS		 10152013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1016
1017 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1018 with a single "ase" bitmask.
1019 (mips_opts): Update accordingly.
1020 (file_ase, file_ase_explicit): New variables.
1021 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1022 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1023 (ISA_HAS_ROR): Adjust for mips_set_options change.
1024 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1025 (mips_ip): Adjust for mips_set_options change.
1026 (md_parse_option): Likewise. Update file_ase_explicit.
1027 (mips_after_parse_args): Adjust for mips_set_options change.
1028 Use bitmask operations to select the default ASEs. Set file_ase
1029 rather than individual per-ASE variables.
1030 (s_mipsset): Adjust for mips_set_options change.
1031 (mips_elf_final_processing): Test file_ase rather than
1032 file_ase_mdmx. Remove commented-out code.
1033
d16afab6
RS		 10342013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1035
1036 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1037 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1038 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1039 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1040 (mips_after_parse_args): Use the new "ase" field to choose
1041 the default ASEs.
1042 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1043 "ase" field.
1044
e83a675f
RE		 10452013-06-18 Richard Earnshaw <rearnsha@arm.com>
1046
1047 * config/tc-arm.c (symbol_preemptible): New function.
1048 (relax_branch): Use it.
1049
7f3c4072
CM		 10502013-06-17 Catherine Moore <clm@codesourcery.com>
1051 Maciej W. Rozycki <macro@codesourcery.com>
1052 Chao-Ying Fu <fu@mips.com>
1053
1054 * config/tc-mips.c (mips_set_options): Add ase_eva.
1055 (mips_set_options mips_opts): Add ase_eva.
1056 (file_ase_eva): Declare.
1057 (ISA_SUPPORTS_EVA_ASE): Define.
1058 (IS_SEXT_9BIT_NUM): Define.
1059 (MIPS_CPU_ASE_EVA): Define.
1060 (is_opcode_valid): Add support for ase_eva.
1061 (macro_build): Likewise.
1062 (macro): Likewise.
1063 (validate_mips_insn): Likewise.
1064 (validate_micromips_insn): Likewise.
1065 (mips_ip): Likewise.
1066 (options): Add OPTION_EVA and OPTION_NO_EVA.
1067 (md_longopts): Add -meva and -mno-eva.
1068 (md_parse_option): Process new options.
1069 (mips_after_parse_args): Check for valid EVA combinations.
1070 (s_mipsset): Likewise.
1071
e410add4
RS		 10722013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1073
1074 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1075 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1076 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1077 (dwarf2_gen_line_info_1): Update call accordingly.
1078 (dwarf2_move_insn): New function.
1079 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1080
6a50d470
RS		 10812013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1082
1083 Revert:
1084
1085 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1086
1087 PR gas/13024
1088 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1089 (dwarf2_gen_line_info_1): Delete.
1090 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1091 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1092 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1093 (dwarf2_directive_loc): Push previous .locs instead of generating
1094 them immediately.
1095
f122319e
CF		 10962013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1097
1098 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1099 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1100
909c7f9c
NC		 11012013-06-13 Nick Clifton <nickc@redhat.com>
1102
1103 PR gas/15602
1104 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1105 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1106 function. Generates an error if the adjusted offset is out of a
1107 16-bit range.
1108
5d5755a7
SL		 11092013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1110
1111 * config/tc-nios2.c (md_apply_fix): Mask constant
1112 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1113
3bf0dbfb
MR		 11142013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1115
1116 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1117 MIPS-3D instructions either.
1118 (md_convert_frag): Update the COPx branch mask accordingly.
1119
1120 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1121 option.
1122 * doc/as.texinfo (Overview): Add --relax-branch and
1123 --no-relax-branch.
1124 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1125 --no-relax-branch.
1126
9daf7bab
SL		 11272013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1128
1129 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1130 omitted.
1131
d301a56b
RS		 11322013-06-08 Catherine Moore <clm@codesourcery.com>
1133
1134 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1135 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1136 (append_insn): Change INSN_xxxx to ASE_xxxx.
1137
7bab7634
DC		 11382013-06-01 George Thomas <george.thomas@atmel.com>
1139
cbe02d4f 1140 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1141 AVR_ISA_XMEGAU
1142
f60cf82f
L		 11432013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1144
1145 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1146 for ELF.
1147
a3f278e2
CM		 11482013-05-31 Paul Brook <paul@codesourcery.com>
1149
a3f278e2
CM		 1150 * config/tc-mips.c (s_ehword): New.
1151
067ec077
CM		 11522013-05-30 Paul Brook <paul@codesourcery.com>
1153
1154 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1155
d6101ac2
MR		 11562013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1157
1158 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1159 convert relocs who have no relocatable field either. Rephrase
1160 the conditional so that the PC-relative check is only applied
1161 for REL targets.
1162
f19ccbda
MR		 11632013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1164
1165 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1166 calculation.
1167
418009c2
YZ		 11682013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1169
1170 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1171 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1172 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1173 (md_apply_fix): Likewise.
1174 (aarch64_force_relocation): Likewise.
1175
0a8897c7
KT		 11762013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1177
1178 * config/tc-arm.c (it_fsm_post_encode): Improve
1179 warning messages about deprecated IT block formats.
1180
89d2a2a3
MS		 11812013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1182
1183 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1184 inside fx_done condition.
1185
c77c0862
RS		 11862013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1187
1188 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1189
c0637f3a
PB		 11902013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1191
1192 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1193 and clean up warning when using PRINT_OPCODE_TABLE.
1194
5656a981
AM		 11952013-05-20 Alan Modra <amodra@gmail.com>
1196
1197 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1198 and data fixups performing shift/high adjust/sign extension on
1199 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1200 when writing data fixups rather than recalculating size.
1201
997b26e8
JBG		 12022013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1203
1204 * doc/c-msp430.texi: Fix typo.
1205
9f6e76f4
TG		 12062013-05-16 Tristan Gingold <gingold@adacore.com>
1207
1208 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1209 are also TOC symbols.
1210
638d3803
NC		 12112013-05-16 Nick Clifton <nickc@redhat.com>
1212
1213 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1214 Add -mcpu command to specify core type.
997b26e8 1215 * doc/c-msp430.texi: Update documentation.
638d3803 1216
b015e599
AP		 12172013-05-09 Andrew Pinski <apinski@cavium.com>
1218
1219 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1220 (mips_opts): Update for the new field.
1221 (file_ase_virt): New variable.
1222 (ISA_SUPPORTS_VIRT_ASE): New macro.
1223 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1224 (MIPS_CPU_ASE_VIRT): New define.
1225 (is_opcode_valid): Handle ase_virt.
1226 (macro_build): Handle "+J".
1227 (validate_mips_insn): Likewise.
1228 (mips_ip): Likewise.
1229 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1230 (md_longopts): Add mvirt and mnovirt
1231 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1232 (mips_after_parse_args): Handle ase_virt field.
1233 (s_mipsset): Handle "virt" and "novirt".
1234 (mips_elf_final_processing): Add a comment about virt ASE might need
1235 a new flag.
1236 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1237 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1238 Document ".set virt" and ".set novirt".
1239
da8094d7
AM		 12402013-05-09 Alan Modra <amodra@gmail.com>
1241
1242 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1243 control of operand flag bits.
1244
c5f8c205
AM		 12452013-05-07 Alan Modra <amodra@gmail.com>
1246
1247 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1248 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1249 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1250 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1251 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1252 Shift and sign-extend fieldval for use by some VLE reloc
1253 operand->insert functions.
1254
b47468a6
CM		 12552013-05-06 Paul Brook <paul@codesourcery.com>
1256 Catherine Moore <clm@codesourcery.com>
1257
c5f8c205
AM		 1258 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1259 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1260 (md_apply_fix): Likewise.
1261 (tc_gen_reloc): Likewise.
1262
2de39019
CM		 12632013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1264
1265 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1266 (mips_fix_adjustable): Adjust pc-relative check to use
1267 limited_pc_reloc_p.
1268
754e2bb9
RS		 12692013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1270
1271 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1272 (s_mips_stab): Do not restrict to stabn only.
1273
13761a11
NC		 12742013-05-02 Nick Clifton <nickc@redhat.com>
1275
1276 * config/tc-msp430.c: Add support for the MSP430X architecture.
1277 Add code to insert a NOP instruction after any instruction that
1278 might change the interrupt state.
1279 Add support for the LARGE memory model.
1280 Add code to initialise the .MSP430.attributes section.
1281 * config/tc-msp430.h: Add support for the MSP430X architecture.
1282 * doc/c-msp430.texi: Document the new -mL and -mN command line
1283 options.
1284 * NEWS: Mention support for the MSP430X architecture.
1285
df26367c
MR		 12862013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1287
1288 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1289 alpha*-*-linux*ecoff*.
1290
f02d8318
CF		 12912013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1292
1293 * config/tc-mips.c (mips_ip): Add sizelo.
1294 For "+C", "+G", and "+H", set sizelo and compare against it.
1295
b40bf0a2
NC		 12962013-04-29 Nick Clifton <nickc@redhat.com>
1297
1298 * as.c (Options): Add -gdwarf-sections.
1299 (parse_args): Likewise.
1300 * as.h (flag_dwarf_sections): Declare.
1301 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1302 (process_entries): When -gdwarf-sections is enabled generate
1303 fragmentary .debug_line sections.
1304 (out_debug_line): Set the section for the .debug_line section end
1305 symbol.
1306 * doc/as.texinfo: Document -gdwarf-sections.
1307 * NEWS: Mention -gdwarf-sections.
1308
8eeccb77 13092013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1310
1311 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1312 according to the target parameter. Don't call s_segm since s_segm
1313 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1314 initialized yet.
1315 (md_begin): Call s_segm according to target parameter from command
1316 line.
1317
49926cd0
AM		 13182013-04-25 Alan Modra <amodra@gmail.com>
1319
1320 * configure.in: Allow little-endian linux.
1321 * configure: Regenerate.
1322
e3031850
SL		 13232013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1324
1325 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1326 "fstatus" control register to "eccinj".
1327
cb948fc0
KT		 13282013-04-19 Kai Tietz <ktietz@redhat.com>
1329
1330 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1331
4455e9ad
JB		 13322013-04-15 Julian Brown <julian@codesourcery.com>
1333
1334 * expr.c (add_to_result, subtract_from_result): Make global.
1335 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1336 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1337 subtract_from_result to handle extra bit of precision for .sleb128
1338 directive operands.
1339
956a6ba3
JB		 13402013-04-10 Julian Brown <julian@codesourcery.com>
1341
1342 * read.c (convert_to_bignum): Add sign parameter. Use it
1343 instead of X_unsigned to determine sign of resulting bignum.
1344 (emit_expr): Pass extra argument to convert_to_bignum.
1345 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1346 X_extrabit to convert_to_bignum.
1347 (parse_bitfield_cons): Set X_extrabit.
1348 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1349 Initialise X_extrabit field as appropriate.
1350 (add_to_result): New.
1351 (subtract_from_result): New.
1352 (expr): Use above.
1353 * expr.h (expressionS): Add X_extrabit field.
1354
eb9f3f00
JB		 13552013-04-10 Jan Beulich <jbeulich@suse.com>
1356
1357 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1358 register being PC when is_t or writeback, and use distinct
1359 diagnostic for the latter case.
1360
ccb84d65
JB		 13612013-04-10 Jan Beulich <jbeulich@suse.com>
1362
1363 * gas/config/tc-arm.c (parse_operands): Re-write
1364 po_barrier_or_imm().
1365 (do_barrier): Remove bogus constraint().
1366 (do_t_barrier): Remove.
1367
4d13caa0
NC		 13682013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1369
1370 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1371 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1372 ATmega2564RFR2
1373 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1374
16d02dc9
JB		 13752013-04-09 Jan Beulich <jbeulich@suse.com>
1376
1377 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1378 Use local variable Rt in more places.
1379 (do_vmsr): Accept all control registers.
1380
05ac0ffb
JB		 13812013-04-09 Jan Beulich <jbeulich@suse.com>
1382
1383 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1384 if there was none specified for moves between scalar and core
1385 register.
1386
2d51fb74
JB		 13872013-04-09 Jan Beulich <jbeulich@suse.com>
1388
1389 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1390 NEON_ALL_LANES case.
1391
94dcf8bf
JB		 13922013-04-08 Jan Beulich <jbeulich@suse.com>
1393
1394 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1395 PC-relative VSTR.
1396
1472d06f
JB		 13972013-04-08 Jan Beulich <jbeulich@suse.com>
1398
1399 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1400 entry to sp_fiq.
1401
0c76cae8
AM		 14022013-04-03 Alan Modra <amodra@gmail.com>
1403
1404 * doc/as.texinfo: Add support to generate man options for h8300.
1405 * doc/c-h8300.texi: Likewise.
1406
92eb40d9
RR		 14072013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1408
1409 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1410 Cortex-A57.
1411
51dcdd4d
NC		 14122013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1413
1414 PR binutils/15068
1415 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1416
c5d685bf
NC		 14172013-03-26 Nick Clifton <nickc@redhat.com>
1418
9b978282
NC		 1419 PR gas/15295
1420 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1421 start of the file each time.
1422
c5d685bf
NC		 1423 PR gas/15178
1424 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1425 FreeBSD targets.
1426
9699c833
TG		 14272013-03-26 Douglas B Rupp <rupp@gnat.com>
1428
1429 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1430 after fixup.
1431
4755303e
WN		 14322013-03-21 Will Newton <will.newton@linaro.org>
1433
1434 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1435 pc-relative str instructions in Thumb mode.
1436
81f5558e
NC		 14372013-03-21 Michael Schewe <michael.schewe@gmx.net>
1438
1439 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1440 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1441 R_H8_DISP32A16.
1442 * config/tc-h8300.h: Remove duplicated defines.
1443
71863e73
NC		 14442013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1445
1446 PR gas/15282
1447 * tc-avr.c (mcu_has_3_byte_pc): New function.
1448 (tc_cfi_frame_initial_instructions): Call it to find return
1449 address size.
1450
795b8e6b
NC		 14512013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1452
1453 PR gas/15095
1454 * config/tc-tic6x.c (tic6x_try_encode): Handle
1455 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1456 encode register pair numbers when required.
1457
ba86b375
WN		 14582013-03-15 Will Newton <will.newton@linaro.org>
1459
1460 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1461 in vstr in Thumb mode for pre-ARMv7 cores.
1462
9e6f3811
AS		 14632013-03-14 Andreas Schwab <schwab@suse.de>
1464
1465 * doc/c-arc.texi (ARC Directives): Revert last change and use
1466 @itemize instead of @table.
1467 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1468
b10bf8c5
NC		 14692013-03-14 Nick Clifton <nickc@redhat.com>
1470
1471 PR gas/15273
1472 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1473 NULL message, instead just check ARM_CPU_IS_ANY directly.
1474
ba724cfc
NC		 14752013-03-14 Nick Clifton <nickc@redhat.com>
1476
1477 PR gas/15212
9e6f3811 1478 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1479 for table format.
1480 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1481 to the @item directives.
1482 (ARM-Neon-Alignment): Move to correct place in the document.
1483 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1484 formatting.
1485 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1486 @smallexample.
1487
531a94fd
SL		 14882013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1489
1490 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1491 case. Add default BAD_CASE to switch.
1492
dad60f8e
SL		 14932013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1494
1495 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1496 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1497
dd5181d5
KT		 14982013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1499
1500 * config/tc-arm.c (crc_ext_armv8): New feature set.
1501 (UNPRED_REG): New macro.
1502 (do_crc32_1): New function.
1503 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1504 do_crc32ch, do_crc32cw): Likewise.
1505 (TUEc): New macro.
1506 (insns): Add entries for crc32 mnemonics.
1507 (arm_extensions): Add entry for crc.
1508
8e723a10
CLT		 15092013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1510
1511 * write.h (struct fix): Add fx_dot_frag field.
1512 (dot_frag): Declare.
1513 * write.c (dot_frag): New variable.
1514 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1515 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1516 * expr.c (expr): Save value of frag_now in dot_frag when setting
1517 dot_value.
1518 * read.c (emit_expr): Likewise. Delete comments.
1519
be05d201
L		 15202013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1521
1522 * config/tc-i386.c (flag_code_names): Removed.
1523 (i386_index_check): Rewrote.
1524
62b0d0d5
YZ		 15252013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1526
1527 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1528 add comment.
1529 (aarch64_double_precision_fmovable): New function.
1530 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1531 function; handle hexadecimal representation of IEEE754 encoding.
1532 (parse_operands): Update the call to parse_aarch64_imm_float.
1533
165de32a
L		 15342013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1535
1536 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1537 (check_hle): Updated.
1538 (md_assemble): Likewise.
1539 (parse_insn): Likewise.
1540
d5de92cf
L		 15412013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1542
1543 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1544 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1545 (parse_insn): Remove expecting_string_instruction. Set
1546 i.rep_prefix.
1547
e60bb1dd
YZ		 15482013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1549
1550 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1551
aeebdd9b
YZ		 15522013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1553
1554 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1555 for system registers.
1556
4107ae22
DD		 15572013-02-27 DJ Delorie <dj@redhat.com>
1558
1559 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1560 (rl78_op): Handle %code().
1561 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1562 (tc_gen_reloc): Likwise; convert to a computed reloc.
1563 (md_apply_fix): Likewise.
1564
151fa98f
NC		 15652013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1566
1567 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1568
70a8bc5b 15692013-02-25 Terry Guo <terry.guo@arm.com>
1570
1571 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1572 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1573 list of accepted CPUs.
1574
5c111e37
L		 15752013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1576
1577 PR gas/15159
1578 * config/tc-i386.c (cpu_arch): Add ".smap".
1579
1580 * doc/c-i386.texi: Document smap.
1581
8a75745d
MR		 15822013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1583
1584 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1585 mips_assembling_insn appropriately.
1586 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1587
79850f26
MR		 15882013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1589
cf29fc61 1590 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1591 extraneous braces.
1592
4c261dff
NC		 15932013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1594
5c111e37 1595 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1596
ea33f281
NC		 15972013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1598
1599 * configure.tgt: Add nios2-*-rtems*.
1600
a1ccaec9
YZ		 16012013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1602
1603 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1604 NULL.
1605
0aa27725
RS		 16062013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1607
1608 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1609 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1610
da4339ed
NC		 16112013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1612
1613 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1614 core.
1615
36591ba1 16162013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1617 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1618
1619 Based on patches from Altera Corporation.
1620
1621 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1622 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1623 * Makefile.in: Regenerated.
1624 * configure.tgt: Add case for nios2*-linux*.
1625 * config/obj-elf.c: Conditionally include elf/nios2.h.
1626 * config/tc-nios2.c: New file.
1627 * config/tc-nios2.h: New file.
1628 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1629 * doc/Makefile.in: Regenerated.
1630 * doc/all.texi: Set NIOSII.
1631 * doc/as.texinfo (Overview): Add Nios II options.
1632 (Machine Dependencies): Include c-nios2.texi.
1633 * doc/c-nios2.texi: New file.
1634 * NEWS: Note Altera Nios II support.
1635
94d4433a
AM		 16362013-02-06 Alan Modra <amodra@gmail.com>
1637
1638 PR gas/14255
1639 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1640 Don't skip fixups with fx_subsy non-NULL.
1641 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1642 with fx_subsy non-NULL.
1643
ace9af6f
L		 16442013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1645
1646 * doc/c-metag.texi: Add "@c man" markers.
1647
89d67ed9
AM		 16482013-02-04 Alan Modra <amodra@gmail.com>
1649
1650 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1651 related code.
1652 (TC_ADJUST_RELOC_COUNT): Delete.
1653 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1654
89072bd6
AM		 16552013-02-04 Alan Modra <amodra@gmail.com>
1656
1657 * po/POTFILES.in: Regenerate.
1658
f9b2d544
NC		 16592013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1660
1661 * config/tc-metag.c: Make SWAP instruction less permissive with
1662 its operands.
1663
392ca752
DD		 16642013-01-29 DJ Delorie <dj@redhat.com>
1665
1666 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1667 relocs in .word/.etc statements.
1668
427d0db6
RM		 16692013-01-29 Roland McGrath <mcgrathr@google.com>
1670
1671 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1672 immediate value for 8-bit offset" error so it shows line info.
1673
4faf939a
JM		 16742013-01-24 Joseph Myers <joseph@codesourcery.com>
1675
1676 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1677 for 64-bit output.
1678
78c8d46c
NC		 16792013-01-24 Nick Clifton <nickc@redhat.com>
1680
1681 * config/tc-v850.c: Add support for e3v5 architecture.
1682 * doc/c-v850.texi: Mention new support.
1683
fb5b7503
NC		 16842013-01-23 Nick Clifton <nickc@redhat.com>
1685
1686 PR gas/15039
1687 * config/tc-avr.c: Include dwarf2dbg.h.
1688
8ce3d284
L		 16892013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1690
1691 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1692 (tc_i386_fix_adjustable): Likewise.
1693 (lex_got): Likewise.
1694 (tc_gen_reloc): Likewise.
1695
f5555712
YZ		 16962013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1697
1698 * config/tc-aarch64.c (output_operand_error_record): Change to output
1699 the out-of-range error message as value-expected message if there is
1700 only one single value in the expected range.
1701 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1702 LSL #0 as a programmer-friendly feature.
1703
8fd4256d
L		 17042013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1705
1706 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1707 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1708 BFD_RELOC_64_SIZE relocations.
1709 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1710 for it.
1711 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1712 relocations against local symbols.
1713
a5840dce
AM		 17142013-01-16 Alan Modra <amodra@gmail.com>
1715
1716 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1717 finding some sort of toc syntax error, and break to avoid
1718 compiler uninit warning.
1719
af89796a
L		 17202013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1721
1722 PR gas/15019
1723 * config/tc-i386.c (lex_got): Increment length by 1 if the
1724 relocation token is removed.
1725
dd42f060
NC		 17262013-01-15 Nick Clifton <nickc@redhat.com>
1727
1728 * config/tc-v850.c (md_assemble): Allow signed values for
1729 V850E_IMMEDIATE.
1730
464e3686
SK		 17312013-01-11 Sean Keys <skeys@ipdatasys.com>
1732
1733 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1734 git to cvs.
464e3686 1735
5817ffd1
PB		 17362013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1737
1738 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1739 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1740 * config/tc-ppc.c (md_show_usage): Likewise.
1741 (ppc_handle_align): Handle power8's group ending nop.
1742
f4b1f6a9
SK		 17432013-01-10 Sean Keys <skeys@ipdatasys.com>
1744
1745 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1746 that the assember exits after the opcodes have been printed.
f4b1f6a9 1747
34bca508
L		 17482013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1749
1750 * app.c: Remove trailing white spaces.
1751 * as.c: Likewise.
1752 * as.h: Likewise.
1753 * cond.c: Likewise.
1754 * dw2gencfi.c: Likewise.
1755 * dwarf2dbg.h: Likewise.
1756 * ecoff.c: Likewise.
1757 * input-file.c: Likewise.
1758 * itbl-lex.h: Likewise.
1759 * output-file.c: Likewise.
1760 * read.c: Likewise.
1761 * sb.c: Likewise.
1762 * subsegs.c: Likewise.
1763 * symbols.c: Likewise.
1764 * write.c: Likewise.
1765 * config/tc-i386.c: Likewise.
1766 * doc/Makefile.am: Likewise.
1767 * doc/Makefile.in: Likewise.
1768 * doc/c-aarch64.texi: Likewise.
1769 * doc/c-alpha.texi: Likewise.
1770 * doc/c-arc.texi: Likewise.
1771 * doc/c-arm.texi: Likewise.
1772 * doc/c-avr.texi: Likewise.
1773 * doc/c-bfin.texi: Likewise.
1774 * doc/c-cr16.texi: Likewise.
1775 * doc/c-d10v.texi: Likewise.
1776 * doc/c-d30v.texi: Likewise.
1777 * doc/c-h8300.texi: Likewise.
1778 * doc/c-hppa.texi: Likewise.
1779 * doc/c-i370.texi: Likewise.
1780 * doc/c-i386.texi: Likewise.
1781 * doc/c-i860.texi: Likewise.
1782 * doc/c-m32c.texi: Likewise.
1783 * doc/c-m32r.texi: Likewise.
1784 * doc/c-m68hc11.texi: Likewise.
1785 * doc/c-m68k.texi: Likewise.
1786 * doc/c-microblaze.texi: Likewise.
1787 * doc/c-mips.texi: Likewise.
1788 * doc/c-msp430.texi: Likewise.
1789 * doc/c-mt.texi: Likewise.
1790 * doc/c-s390.texi: Likewise.
1791 * doc/c-score.texi: Likewise.
1792 * doc/c-sh.texi: Likewise.
1793 * doc/c-sh64.texi: Likewise.
1794 * doc/c-tic54x.texi: Likewise.
1795 * doc/c-tic6x.texi: Likewise.
1796 * doc/c-v850.texi: Likewise.
1797 * doc/c-xc16x.texi: Likewise.
1798 * doc/c-xgate.texi: Likewise.
1799 * doc/c-xtensa.texi: Likewise.
1800 * doc/c-z80.texi: Likewise.
1801 * doc/internals.texi: Likewise.
1802
4c665b71
RM		 18032013-01-10 Roland McGrath <mcgrathr@google.com>
1804
1805 * hash.c (hash_new_sized): Make it global.
1806 * hash.h: Declare it.
1807 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1808 pass a small size.
1809
a3c62988
NC		 18102013-01-10 Will Newton <will.newton@imgtec.com>
1811
1812 * Makefile.am: Add Meta.
1813 * Makefile.in: Regenerate.
1814 * config/tc-metag.c: New file.
1815 * config/tc-metag.h: New file.
1816 * configure.tgt: Add Meta.
1817 * doc/Makefile.am: Add Meta.
1818 * doc/Makefile.in: Regenerate.
1819 * doc/all.texi: Add Meta.
1820 * doc/as.texiinfo: Document Meta options.
1821 * doc/c-metag.texi: New file.
1822
b37df7c4
SE		 18232013-01-09 Steve Ellcey <sellcey@mips.com>
1824
1825 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1826 calls.
1827 * config/tc-mips.c (internalError): Remove, replace with abort.
1828
a3251895
YZ		 18292013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1830
1831 * config/tc-aarch64.c (parse_operands): Change to compare the result
1832 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1833
8ab8155f
NC		 18342013-01-07 Nick Clifton <nickc@redhat.com>
1835
1836 PR gas/14887
1837 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1838 anticipated character.
1839 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1840 here as it is no longer needed.
1841
a4ac1c42
AS		 18422013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1843
1844 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1845 * doc/c-score.texi (SCORE-Opts): Likewise.
1846 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1847
e407c74b
NC		 18482013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1849
1850 * config/tc-mips.c: Add support for MIPS r5900.
1851 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1852 lq and sq.
1853 (can_swap_branch_p, get_append_method): Detect some conditional
1854 short loops to fix a bug on the r5900 by NOP in the branch delay
1855 slot.
1856 (M_MUL): Support 3 operands in multu on r5900.
1857 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1858 (s_mipsset): Force 32 bit floating point on r5900.
1859 (mips_ip): Check parameter range of instructions mfps and mtps on
1860 r5900.
1861 * configure.in: Detect CPU type when target string contains r5900
1862 (e.g. mips64r5900el-linux-gnu).
1863
62658407
L		 18642013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1865
1866 * as.c (parse_args): Update copyright year to 2013.
1867
95830fd1
YZ		 18682013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1869
1870 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1871 and "cortex57".
1872
517bb291 18732013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1874
517bb291
NC		 1875 PR gas/14987
1876 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1877 closing bracket.
d709e4e6 1878
517bb291 1879For older changes see ChangeLog-2012
08d56133 1880\f
517bb291 1881Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1882
1883Copying and distribution of this file, with or without modification,
1884are permitted in any medium without royalty provided the copyright
1885notice and this notice are preserved.
1886
08d56133
NC		 1887Local Variables:
1888mode: change-log
1889left-margin: 8
1890fill-column: 74
1891version-control: never
1892End:
GDB Binutils - Deliverables
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