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58ca03a2
TG		 12013-09-18 Tristan Gingold <gingold@adacore.com>
2
3 * NEWS: Add marker for 2.24.
4
ab905915
NC		 52013-09-18 Nick Clifton <nickc@redhat.com>
6
7 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
8 (move_data): New variable.
9 (md_parse_option): Parse -md.
10 (msp430_section): New function. Catch references to the .bss or
11 .data sections and generate a special symbol for use by the libcrt
12 library.
13 (md_pseudo_table): Intercept .section directives.
14 (md_longopt): Add -md
15 (md_show_usage): Likewise.
16 (msp430_operands): Generate a warning message if a NOP is inserted
17 into the instruction stream.
18 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
19
f1c38003
SE		 202013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
21
22 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 23 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 24
1d50d57c
WN		 252013-09-16 Will Newton <will.newton@linaro.org>
26
27 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
28 disallowing element size 64 with interleave other than 1.
29
173d3447
CF		 302013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
31
32 * config/tc-mips.c (match_insn): Set error when $31 is used for
33 bltzal* and bgezal*.
34
ac21e7da
TG		 352013-09-04 Tristan Gingold <gingold@adacore.com>
36
37 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
38 symbols.
39
74db7efb
NC		 402013-09-04 Roland McGrath <mcgrathr@google.com>
41
42 PR gas/15914
43 * config/tc-arm.c (T16_32_TAB): Add _udf.
44 (do_t_udf): New function.
45 (insns): Add "udf".
46
664a88c6
DD		 472013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
48
49 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
50 assembler errors at correct position.
51
9aff4b7a
NC		 522013-08-23 Yuri Chornoivan <yurchor@ukr.net>
53
54 PR binutils/15834
55 * config/tc-ia64.c: Fix typos.
56 * config/tc-sparc.c: Likewise.
57 * config/tc-z80.c: Likewise.
58 * doc/c-i386.texi: Likewise.
59 * doc/c-m32r.texi: Likewise.
60
4f2374c7
WN		 612013-08-23 Will Newton <will.newton@linaro.org>
62
9aff4b7a 63 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 64 for pre-indexed addressing modes.
65
b4e6cb80
AM		 662013-08-21 Alan Modra <amodra@gmail.com>
67
68 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
69 range check label number for use with fb_low_counter array.
70
1661c76c
RS		 712013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
72
73 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
74 (mips_parse_argument_token, validate_micromips_insn, md_begin)
75 (check_regno, match_float_constant, check_completed_insn, append_insn)
76 (match_insn, match_mips16_insn, match_insns, macro_start)
77 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
78 (mips16_ip, mips_set_option_string, md_parse_option)
79 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
80 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
81 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
82 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
83 Start error messages with a lower-case letter. Do not end error
84 messages with a period. Wrap long messages to 80 character-lines.
85 Use "cannot" instead of "can't" and "can not".
86
b0e6f033
RS		 872013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
88
89 * config/tc-mips.c (imm_expr): Expand comment.
90 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
91 when populated.
92
e423441d
RS		 932013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
94
95 * config/tc-mips.c (imm2_expr): Delete.
96 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
97
5e0dc5ba
RS		 982013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
99
100 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
101 (macro): Remove M_DEXT and M_DINS handling.
102
60f20e8b
RS		 1032013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
104
105 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
106 lax_max with lax_match.
107 (match_int_operand): Update accordingly. Don't report an error
108 for !lax_match-only cases.
109 (match_insn): Replace more_alts with lax_match and use it to
110 initialize the mips_arg_info field. Add a complete_p parameter.
111 Handle implicit VU0 suffixes here.
112 (match_invalid_for_isa, match_insns, match_mips16_insns): New
113 functions.
114 (mips_ip, mips16_ip): Use them.
115
d436c1c2
RS		 1162013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
117
118 * config/tc-mips.c (match_expression): Report uses of registers here.
119 Add a "must be an immediate expression" error. Handle elided offsets
120 here rather than...
121 (match_int_operand): ...here.
122
1a00e612
RS		 1232013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124
125 * config/tc-mips.c (mips_arg_info): Remove soft_match.
126 (match_out_of_range, match_not_constant): New functions.
127 (match_const_int): Remove fallback parameter and check for soft_match.
128 Use match_not_constant.
129 (match_mapped_int_operand, match_addiusp_operand)
130 (match_perf_reg_operand, match_save_restore_list_operand)
131 (match_mdmx_imm_reg_operand): Update accordingly. Use
132 match_out_of_range and set_insn_error* instead of as_bad.
133 (match_int_operand): Likewise. Use match_not_constant in the
134 !allows_nonconst case.
135 (match_float_constant): Report invalid float constants.
136 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
137 match_float_constant to check for invalid constants. Fail the
138 match if match_const_int or match_float_constant return false.
139 (mips_ip): Update accordingly.
140 (mips16_ip): Likewise. Undo null termination of instruction name
141 once lookup is complete.
142
e3de51ce
RS		 1432013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
144
145 * config/tc-mips.c (mips_insn_error_format): New enum.
146 (mips_insn_error): New struct.
147 (insn_error): Change to a mips_insn_error.
148 (clear_insn_error, set_insn_error_format, set_insn_error)
149 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
150 functions.
151 (mips_parse_argument_token, md_assemble, match_insn)
152 (match_mips16_insn): Use them instead of manipulating insn_error
153 directly.
154 (mips_ip, mips16_ip): Likewise. Simplify control flow.
155
97d87491
RS		 1562013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
157
158 * config/tc-mips.c (normalize_constant_expr): Move further up file.
159 (normalize_address_expr): Likewise.
160 (match_insn, match_mips16_insn): New functions, split out from...
161 (mips_ip, mips16_ip): ...here.
162
0f35dbc4
RS		 1632013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
164
165 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
166 OP_OPTIONAL_REG.
167 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
168 for optional operands.
169
27285eed
AM		 1702013-08-16 Alan Modra <amodra@gmail.com>
171
172 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
173 modifiers generally.
174
cbe02d4f
AM		 1752013-08-16 Alan Modra <amodra@gmail.com>
176
177 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
178
3c02c47f
DE		 1792013-08-14 David Edelsohn <dje.gcc@gmail.com>
180
181 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
182 argument as alignment.
183
4046d87a
NC		 1842013-08-09 Nick Clifton <nickc@redhat.com>
185
186 * config/tc-rl78.c (elf_flags): New variable.
187 (enum options): Add OPTION_G10.
188 (md_longopts): Add mg10.
189 (md_parse_option): Parse -mg10.
190 (rl78_elf_final_processing): New function.
191 * config/tc-rl78.c (tc_final_processing): Define.
192 * doc/c-rl78.texi: Document -mg10 option.
193
ee5734f0
RS		 1942013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
195
196 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
197 suffixes to be elided too.
198 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
199 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
200 to be omitted too.
201
13896403
RS		 2022013-08-05 John Tytgat <john@bass-software.com>
203
204 * po/POTFILES.in: Regenerate.
205
d6787ef9
EB		 2062013-08-05 Eric Botcazou <ebotcazou@adacore.com>
207 Konrad Eisele <konrad@gaisler.com>
208
209 * config/tc-sparc.c (sparc_arch_types): Add leon.
210 (sparc_arch): Move sparc4 around and add leon.
211 (sparc_target_format): Document -Aleon.
212 * doc/c-sparc.texi: Likewise.
213
da8bca91
RS		 2142013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
215
216 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
217
14daeee3
RS		 2182013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
219 Richard Sandiford <rdsandiford@googlemail.com>
220
221 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
222 (RWARN): Bump to 0x8000000.
223 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
224 (RTYPE_R5900_ACC): New register types.
225 (RTYPE_MASK): Include them.
226 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
227 macros.
228 (reg_names): Include them.
229 (mips_parse_register_1): New function, split out from...
230 (mips_parse_register): ...here. Add a channels_ptr parameter.
231 Look for VU0 channel suffixes when nonnull.
232 (reg_lookup): Update the call to mips_parse_register.
233 (mips_parse_vu0_channels): New function.
234 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
235 (mips_operand_token): Add a "channels" field to the union.
236 Extend the comment above "ch" to OT_DOUBLE_CHAR.
237 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
238 (mips_parse_argument_token): Handle channel suffixes here too.
239 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
240 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
241 Handle '#' formats.
242 (md_begin): Register $vfN and $vfI registers.
243 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
244 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
245 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
246 (match_vu0_suffix_operand): New function.
247 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
248 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
249 (mips_lookup_insn): New function.
250 (mips_ip): Use it. Allow "+K" operands to be elided at the end
251 of an instruction. Handle '#' sequences.
252
c0ebe874
RS		 2532013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
254
255 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
256 values and use it instead of sreg, treg, xreg, etc.
257
3ccad066
RS		 2582013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
259
260 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
261 and mips_int_operand_max.
262 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
263 Delete.
264 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
265 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
266 instead of mips16_immed_operand.
267
0acfaea6
RS		 2682013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
269
270 * config/tc-mips.c (mips16_macro): Don't use move_register.
271 (mips16_ip): Allow macros to use 'p'.
272
fc76e730
RS		 2732013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
274
275 * config/tc-mips.c (MAX_OPERANDS): New macro.
276 (mips_operand_array): New structure.
277 (mips_operands, mips16_operands, micromips_operands): New arrays.
278 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
279 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
280 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
281 (micromips_to_32_reg_q_map): Delete.
282 (insn_operands, insn_opno, insn_extract_operand): New functions.
283 (validate_mips_insn): Take a mips_operand_array as argument and
284 use it to build up a list of operands. Extend to handle INSN_MACRO
285 and MIPS16.
286 (validate_mips16_insn): New function.
287 (validate_micromips_insn): Take a mips_operand_array as argument.
288 Handle INSN_MACRO.
289 (md_begin): Initialize mips_operands, mips16_operands and
290 micromips_operands. Call validate_mips_insn and
291 validate_micromips_insn for macro instructions too.
292 Call validate_mips16_insn for MIPS16 instructions.
293 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
294 New functions.
295 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
296 them. Handle INSN_UDI.
297 (get_append_method): Use gpr_read_mask.
298
26545944
RS		 2992013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
300
301 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
302 flags for MIPS16 and non-MIPS16 instructions.
303 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
304 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
305 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
306 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
307 and non-MIPS16 instructions. Fix formatting.
308
85fcb30f
RS		 3092013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
310
311 * config/tc-mips.c (reg_needs_delay): Move later in file.
312 Use gpr_write_mask.
313 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
314
43234a1e
L		 3152013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
316 Alexander Ivchenko <alexander.ivchenko@intel.com>
317 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
318 Sergey Lega <sergey.s.lega@intel.com>
319 Anna Tikhonova <anna.tikhonova@intel.com>
320 Ilya Tocar <ilya.tocar@intel.com>
321 Andrey Turetskiy <andrey.turetskiy@intel.com>
322 Ilya Verbin <ilya.verbin@intel.com>
323 Kirill Yukhin <kirill.yukhin@intel.com>
324 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
325
326 * config/tc-i386-intel.c (O_zmmword_ptr): New.
327 (i386_types): Add zmmword.
328 (i386_intel_simplify_register): Allow regzmm.
329 (i386_intel_simplify): Handle zmmwords.
330 (i386_intel_operand): Handle RC/SAE, vector operations and
331 zmmwords.
332 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
333 (struct RC_Operation): New.
334 (struct Mask_Operation): New.
335 (struct Broadcast_Operation): New.
336 (vex_prefix): Size of bytes increased to 4 to support EVEX
337 encoding.
338 (enum i386_error): Add new error codes: unsupported_broadcast,
339 broadcast_not_on_src_operand, broadcast_needed,
340 unsupported_masking, mask_not_on_destination, no_default_mask,
341 unsupported_rc_sae, rc_sae_operand_not_last_imm,
342 invalid_register_operand, try_vector_disp8.
343 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
344 rounding, broadcast, memshift.
345 (struct RC_name): New.
346 (RC_NamesTable): New.
347 (evexlig): New.
348 (evexwig): New.
349 (extra_symbol_chars): Add '{'.
350 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
351 (i386_operand_type): Add regzmm, regmask and vec_disp8.
352 (match_mem_size): Handle zmmwords.
353 (operand_type_match): Handle zmm-registers.
354 (mode_from_disp_size): Handle vec_disp8.
355 (fits_in_vec_disp8): New.
356 (md_begin): Handle {} properly.
357 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
358 (build_vex_prefix): Handle vrex.
359 (build_evex_prefix): New.
360 (process_immext): Adjust to properly handle EVEX.
361 (md_assemble): Add EVEX encoding support.
362 (swap_2_operands): Correctly handle operands with masking,
363 broadcasting or RC/SAE.
364 (check_VecOperands): Support EVEX features.
365 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
366 (match_template): Support regzmm and handle new error codes.
367 (process_suffix): Handle zmmwords and zmm-registers.
368 (check_byte_reg): Extend to zmm-registers.
369 (process_operands): Extend to zmm-registers.
370 (build_modrm_byte): Handle EVEX.
371 (output_insn): Adjust to properly handle EVEX case.
372 (disp_size): Handle vec_disp8.
373 (output_disp): Support compressed disp8*N evex feature.
374 (output_imm): Handle RC/SAE immediates properly.
375 (check_VecOperations): New.
376 (i386_immediate): Handle EVEX features.
377 (i386_index_check): Handle zmmwords and zmm-registers.
378 (RC_SAE_immediate): New.
379 (i386_att_operand): Handle EVEX features.
380 (parse_real_register): Add a check for ZMM/Mask registers.
381 (OPTION_MEVEXLIG): New.
382 (OPTION_MEVEXWIG): New.
383 (md_longopts): Add mevexlig and mevexwig.
384 (md_parse_option): Handle mevexlig and mevexwig options.
385 (md_show_usage): Add description for mevexlig and mevexwig.
386 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
387 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
388
a0046408
L		 3892013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
390
391 * config/tc-i386.c (cpu_arch): Add .sha.
392 * doc/c-i386.texi: Document sha/.sha.
393
7e8b059b
L		 3942013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
395 Kirill Yukhin <kirill.yukhin@intel.com>
396 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
397
398 * config/tc-i386.c (BND_PREFIX): New.
399 (struct _i386_insn): Add new field bnd_prefix.
400 (add_bnd_prefix): New.
401 (cpu_arch): Add MPX.
402 (i386_operand_type): Add regbnd.
403 (md_assemble): Handle BND prefixes.
404 (parse_insn): Likewise.
405 (output_branch): Likewise.
406 (output_jump): Likewise.
407 (build_modrm_byte): Handle regbnd.
408 (OPTION_MADD_BND_PREFIX): New.
409 (md_longopts): Add entry for 'madd-bnd-prefix'.
410 (md_parse_option): Handle madd-bnd-prefix option.
411 (md_show_usage): Add description for madd-bnd-prefix
412 option.
413 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
414
7fa9fcb6
TG		 4152013-07-24 Tristan Gingold <gingold@adacore.com>
416
417 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
418 xcoff targets.
419
614eb277
AK		 4202013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
421
422 * config/tc-s390.c (s390_machine): Don't force the .machine
423 argument to lower case.
424
e673710a
KT		 4252013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
426
427 * config/tc-arm.c (s_arm_arch_extension): Improve error message
428 for invalid extension.
429
69091a2c
YZ		 4302013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
431
432 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
433 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
434 (aarch64_abi): New variable.
435 (ilp32_p): Change to be a macro.
436 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
437 (struct aarch64_option_abi_value_table): New struct.
438 (aarch64_abis): New table.
439 (aarch64_parse_abi): New function.
440 (aarch64_long_opts): Add entry for -mabi=.
441 * doc/as.texinfo (Target AArch64 options): Document -mabi.
442 * doc/c-aarch64.texi: Likewise.
443
faf786e6
NC		 4442013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
445
446 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
447 unsigned comparison.
448
f0c00282
NC		 4492013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
450
cbe02d4f 451 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 452 RX610.
cbe02d4f 453 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 454 check floating point operation support for target RX100 and
455 RX200.
cbe02d4f
AM		 456 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
457 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
458 RX200, RX600, and RX610
f0c00282 459
8c997c27
NC		 4602013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
461
462 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
463
8be59acb
NC		 4642013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
465
466 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
467 * doc/c-avr.texi: Likewise.
468
4a06e5a2
RS		 4692013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
470
471 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
472 error with older GCCs.
473 (mips16_macro_build): Dereference args.
474
a92713e6
RS		 4752013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
476
477 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
478 New functions, split out from...
479 (reg_lookup): ...here. Remove itbl support.
480 (reglist_lookup): Delete.
481 (mips_operand_token_type): New enum.
482 (mips_operand_token): New structure.
483 (mips_operand_tokens): New variable.
484 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
485 (mips_parse_arguments): New functions.
486 (md_begin): Initialize mips_operand_tokens.
487 (mips_arg_info): Add a token field. Remove optional_reg field.
488 (match_char, match_expression): New functions.
489 (match_const_int): Use match_expression. Remove "s" argument
490 and return a boolean result. Remove O_register handling.
491 (match_regno, match_reg, match_reg_range): New functions.
492 (match_int_operand, match_mapped_int_operand, match_msb_operand)
493 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
494 (match_addiusp_operand, match_clo_clz_dest_operand)
495 (match_lwm_swm_list_operand, match_entry_exit_operand)
496 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
497 (match_tied_reg_operand): Remove "s" argument and return a boolean
498 result. Match tokens rather than text. Update calls to
499 match_const_int. Rely on match_regno to call check_regno.
500 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
501 "arg" argument. Return a boolean result.
502 (parse_float_constant): Replace with...
503 (match_float_constant): ...this new function.
504 (match_operand): Remove "s" argument and return a boolean result.
505 Update calls to subfunctions.
506 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
507 rather than string-parsing routines. Update handling of optional
508 registers for token scheme.
509
89565f1b
RS		 5102013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
511
512 * config/tc-mips.c (parse_float_constant): Split out from...
513 (mips_ip): ...here.
514
3c14a432
RS		 5152013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
516
517 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
518 Delete.
519
364215c8
RS		 5202013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
521
522 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
523 (match_entry_exit_operand): New function.
524 (match_save_restore_list_operand): Likewise.
525 (match_operand): Use them.
526 (check_absolute_expr): Delete.
527 (mips16_ip): Rewrite main parsing loop to use mips_operands.
528
9e12b7a2
RS		 5292013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
530
531 * config/tc-mips.c: Enable functions commented out in previous patch.
532 (SKIP_SPACE_TABS): Move further up file.
533 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
534 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
535 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
536 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
537 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
538 (micromips_imm_b_map, micromips_imm_c_map): Delete.
539 (mips_lookup_reg_pair): Delete.
540 (macro): Use report_bad_range and report_bad_field.
541 (mips_immed, expr_const_in_range): Delete.
542 (mips_ip): Rewrite main parsing loop to use new functions.
543
a1d78564
RS		 5442013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
545
546 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
547 Change return type to bfd_boolean.
548 (report_bad_range, report_bad_field): New functions.
549 (mips_arg_info): New structure.
550 (match_const_int, convert_reg_type, check_regno, match_int_operand)
551 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
552 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
553 (match_addiusp_operand, match_clo_clz_dest_operand)
554 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
555 (match_pc_operand, match_tied_reg_operand, match_operand)
556 (check_completed_insn): New functions, commented out for now.
557
e077a1c8
RS		 5582013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
559
560 * config/tc-mips.c (insn_insert_operand): New function.
561 (macro_build, mips16_macro_build): Put null character check
562 in the for loop and convert continues to breaks. Use operand
563 structures to handle constant operands.
564
ab902481
RS		 5652013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
566
567 * config/tc-mips.c (validate_mips_insn): Move further up file.
568 Add insn_bits and decode_operand arguments. Use the mips_operand
569 fields to work out which bits an operand occupies. Detect double
570 definitions.
571 (validate_micromips_insn): Move further up file. Call into
572 validate_mips_insn.
573
2f8b73cc
RS		 5742013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
575
576 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
577
c8276761
RS		 5782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
579
580 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
581 and "~".
582 (macro): Update accordingly.
583
77bd4346
RS		 5842013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
585
586 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
587 (imm_reloc): Delete.
588 (md_assemble): Remove imm_reloc handling.
589 (mips_ip): Update commentary. Use offset_expr and offset_reloc
590 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
591 Use a temporary array rather than imm_reloc when parsing
592 constant expressions. Remove imm_reloc initialization.
593 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
594 for the relaxable field. Use a relax_char variable to track the
595 type of this field. Remove imm_reloc initialization.
596
cc537e56
RS		 5972013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
598
599 * config/tc-mips.c (mips16_ip): Handle "I".
600
ba92f887
MR		 6012013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
602
603 * config/tc-mips.c (mips_flag_nan2008): New variable.
604 (options): Add OPTION_NAN enum value.
605 (md_longopts): Handle it.
606 (md_parse_option): Likewise.
607 (s_nan): New function.
608 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
609 (md_show_usage): Add -mnan.
610
611 * doc/as.texinfo (Overview): Add -mnan.
612 * doc/c-mips.texi (MIPS Opts): Document -mnan.
613 (MIPS NaN Encodings): New node. Document .nan directive.
614 (MIPS-Dependent): List the new node.
615
c1094734
TG		 6162013-07-09 Tristan Gingold <gingold@adacore.com>
617
618 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
619
0cbbe1b8
RS		 6202013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
621
622 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
623 for 'A' and assume that the constant has been elided if the result
624 is an O_register.
625
f2ae14a1
RS		 6262013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
627
628 * config/tc-mips.c (gprel16_reloc_p): New function.
629 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
630 BFD_RELOC_UNUSED.
631 (offset_high_part, small_offset_p): New functions.
632 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
633 register load and store macros, handle the 16-bit offset case first.
634 If a 16-bit offset is not suitable for the instruction we're
635 generating, load it into the temporary register using
636 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
637 M_L_DAB code once the address has been constructed. For double load
638 and store macros, again handle the 16-bit offset case first.
639 If the second register cannot be accessed from the same high
640 part as the first, load it into AT using ADDRESS_ADDI_INSN.
641 Fix the handling of LD in cases where the first register is the
642 same as the base. Also handle the case where the offset is
643 not 16 bits and the second register cannot be accessed from the
644 same high part as the first. For unaligned loads and stores,
645 fuse the offbits == 12 and old "ab" handling. Apply this handling
646 whenever the second offset needs a different high part from the first.
647 Construct the offset using ADDRESS_ADDI_INSN where possible,
648 for offbits == 16 as well as offbits == 12. Use offset_reloc
649 when constructing the individual loads and stores.
650 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
651 and offset_reloc before matching against a particular opcode.
652 Handle elided 'A' constants. Allow 'A' constants to use
653 relocation operators.
654
5c324c16
RS		 6552013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
656
657 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
658 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
659 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
660
23e69e47
RS		 6612013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
662
663 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
664 Require the msb to be <= 31 for "+s". Check that the size is <= 31
665 for both "+s" and "+S".
666
27c5c572
RS		 6672013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
668
669 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
670 (mips_ip, mips16_ip): Handle "+i".
671
e76ff5ab
RS		 6722013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
673
674 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
675 (micromips_to_32_reg_h_map): Rename to...
676 (micromips_to_32_reg_h_map1): ...this.
677 (micromips_to_32_reg_i_map): Rename to...
678 (micromips_to_32_reg_h_map2): ...this.
679 (mips_lookup_reg_pair): New function.
680 (gpr_write_mask, macro): Adjust after above renaming.
681 (validate_micromips_insn): Remove "mi" handling.
682 (mips_ip): Likewise. Parse both registers in a pair for "mh".
683
fa7616a4
RS		 6842013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
685
686 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
687 (mips_ip): Remove "+D" and "+T" handling.
688
fb798c50
AK		 6892013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
690
691 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
692 relocs.
693
2c0a3565
MS		 6942013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
695
4aa2c5e2
MS		 696 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
697
6982013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
699
2c0a3565
MS		 700 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
701 (aarch64_force_relocation): Likewise.
702
f40da81b
AM		 7032013-07-02 Alan Modra <amodra@gmail.com>
704
705 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
706
81566a9b
MR		 7072013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
708
709 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
710 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
711 Replace @sc{mips16} with literal `MIPS16'.
712 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
713
a6bb11b2
YZ		 7142013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
715
716 * config/tc-aarch64.c (reloc_table): Replace
717 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
718 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
719 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
720 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
721 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
722 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
723 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
724 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
725 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
726 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
727 (aarch64_force_relocation): Likewise.
728
cec5225b
YZ		 7292013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
730
731 * config/tc-aarch64.c (ilp32_p): New static variable.
732 (elf64_aarch64_target_format): Return the target according to the
733 value of 'ilp32_p'.
734 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
735 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
736 (aarch64_dwarf2_addr_size): New function.
737 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
738 (DWARF2_ADDR_SIZE): New define.
739
e335d9cb
RS		 7402013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
741
742 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
743
18870af7
RS		 7442013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
745
746 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
747
833794fc
MR		 7482013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
749
750 * config/tc-mips.c (mips_set_options): Add insn32 member.
751 (mips_opts): Initialize it.
752 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
753 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
754 (md_longopts): Add "minsn32" and "mno-insn32" options.
755 (is_size_valid): Handle insn32 mode.
756 (md_assemble): Pass instruction string down to macro.
757 (brk_fmt): Add second dimension and insn32 mode initializers.
758 (mfhl_fmt): Likewise.
759 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
760 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
761 (macro_build_jalr, move_register): Handle insn32 mode.
762 (macro_build_branch_rs): Likewise.
763 (macro): Handle insn32 mode.
764 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
765 (mips_ip): Handle insn32 mode.
766 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
767 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
768 (mips_handle_align): Handle insn32 mode.
769 (md_show_usage): Add -minsn32 and -mno-insn32.
770
771 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
772 -mno-insn32 options.
773 (-minsn32, -mno-insn32): New options.
774 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
775 options.
776 (MIPS assembly options): New node. Document .set insn32 and
777 .set noinsn32.
778 (MIPS-Dependent): List the new node.
779
d1706f38
NC		 7802013-06-25 Nick Clifton <nickc@redhat.com>
781
782 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
783 the PC in indirect addressing on 430xv2 parts.
784 (msp430_operands): Add version test to hardware bug encoding
785 restrictions.
786
477330fc
RM		 7872013-06-24 Roland McGrath <mcgrathr@google.com>
788
d996d970
RM		 789 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
790 so it skips whitespace before it.
791 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
792
477330fc
RM		 793 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
794 (arm_reg_parse_multi): Skip whitespace first.
795 (parse_reg_list): Likewise.
796 (parse_vfp_reg_list): Likewise.
797 (s_arm_unwind_save_mmxwcg): Likewise.
798
24382199
NC		 7992013-06-24 Nick Clifton <nickc@redhat.com>
800
801 PR gas/15623
802 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
803
c3678916
RS		 8042013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
805
806 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
807
42429eac
RS		 8082013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
809
810 * config/tc-mips.c: Assert that offsetT and valueT are at least
811 8 bytes in size.
812 (GPR_SMIN, GPR_SMAX): New macros.
813 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
814
f3ded42a
RS		 8152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
816
817 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
818 conditions. Remove any code deselected by them.
819 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
820
e8044f35
RS		 8212013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
822
823 * NEWS: Note removal of ECOFF support.
824 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
825 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
826 (MULTI_CFILES): Remove config/e-mipsecoff.c.
827 * Makefile.in: Regenerate.
828 * configure.in: Remove MIPS ECOFF references.
829 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
830 Delete cases.
831 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
832 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
833 (mips-*-*): ...this single case.
834 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
835 MIPS emulations to be e-mipself*.
836 * configure: Regenerate.
837 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
838 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
839 (mips-*-sysv*): Remove coff and ecoff cases.
840 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
841 * ecoff.c: Remove reference to MIPS ECOFF.
842 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
843 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
844 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
845 (mips_hi_fixup): Tweak comment.
846 (append_insn): Require a howto.
847 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
848
98508b2a
RS		 8492013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
850
851 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
852 Use "CPU" instead of "cpu".
853 * doc/c-mips.texi: Likewise.
854 (MIPS Opts): Rename to MIPS Options.
855 (MIPS option stack): Rename to MIPS Option Stack.
856 (MIPS ASE instruction generation overrides): Rename to
857 MIPS ASE Instruction Generation Overrides (for now).
858 (MIPS floating-point): Rename to MIPS Floating-Point.
859
fc16f8cc
RS		 8602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
861
862 * doc/c-mips.texi (MIPS Macros): New section.
863 (MIPS Object): Replace with...
864 (MIPS Small Data): ...this new section.
865
5a7560b5
RS		 8662013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
867
868 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
869 Capitalize name. Use @kindex instead of @cindex for .set entries.
870
a1b86ab7
RS		 8712013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
872
873 * doc/c-mips.texi (MIPS Stabs): Remove section.
874
c6278170
RS		 8752013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
876
877 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
878 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
879 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
880 (ISA_SUPPORTS_VIRT64_ASE): Delete.
881 (mips_ase): New structure.
882 (mips_ases): New table.
883 (FP64_ASES): New macro.
884 (mips_ase_groups): New array.
885 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
886 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
887 functions.
888 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
889 (md_parse_option): Use mips_ases and mips_set_ase instead of
890 separate case statements for each ASE option.
891 (mips_after_parse_args): Use FP64_ASES. Use
892 mips_check_isa_supports_ases to check the ASEs against
893 other options.
894 (s_mipsset): Use mips_ases and mips_set_ase instead of
895 separate if statements for each ASE option. Use
896 mips_check_isa_supports_ases, even when a non-ASE option
897 is specified.
898
63a4bc21
KT		 8992013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
900
901 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
902
c31f3936
RS		 9032013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
904
905 * config/tc-mips.c (md_shortopts, options, md_longopts)
906 (md_longopts_size): Move earlier in file.
907
846ef2d0
RS		 9082013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
909
910 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
911 with a single "ase" bitmask.
912 (mips_opts): Update accordingly.
913 (file_ase, file_ase_explicit): New variables.
914 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
915 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
916 (ISA_HAS_ROR): Adjust for mips_set_options change.
917 (is_opcode_valid): Take the base ase mask directly from mips_opts.
918 (mips_ip): Adjust for mips_set_options change.
919 (md_parse_option): Likewise. Update file_ase_explicit.
920 (mips_after_parse_args): Adjust for mips_set_options change.
921 Use bitmask operations to select the default ASEs. Set file_ase
922 rather than individual per-ASE variables.
923 (s_mipsset): Adjust for mips_set_options change.
924 (mips_elf_final_processing): Test file_ase rather than
925 file_ase_mdmx. Remove commented-out code.
926
d16afab6
RS		 9272013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
928
929 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
930 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
931 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
932 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
933 (mips_after_parse_args): Use the new "ase" field to choose
934 the default ASEs.
935 (mips_cpu_info_table): Move ASEs from the "flags" field to the
936 "ase" field.
937
e83a675f
RE		 9382013-06-18 Richard Earnshaw <rearnsha@arm.com>
939
940 * config/tc-arm.c (symbol_preemptible): New function.
941 (relax_branch): Use it.
942
7f3c4072
CM		 9432013-06-17 Catherine Moore <clm@codesourcery.com>
944 Maciej W. Rozycki <macro@codesourcery.com>
945 Chao-Ying Fu <fu@mips.com>
946
947 * config/tc-mips.c (mips_set_options): Add ase_eva.
948 (mips_set_options mips_opts): Add ase_eva.
949 (file_ase_eva): Declare.
950 (ISA_SUPPORTS_EVA_ASE): Define.
951 (IS_SEXT_9BIT_NUM): Define.
952 (MIPS_CPU_ASE_EVA): Define.
953 (is_opcode_valid): Add support for ase_eva.
954 (macro_build): Likewise.
955 (macro): Likewise.
956 (validate_mips_insn): Likewise.
957 (validate_micromips_insn): Likewise.
958 (mips_ip): Likewise.
959 (options): Add OPTION_EVA and OPTION_NO_EVA.
960 (md_longopts): Add -meva and -mno-eva.
961 (md_parse_option): Process new options.
962 (mips_after_parse_args): Check for valid EVA combinations.
963 (s_mipsset): Likewise.
964
e410add4
RS		 9652013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
966
967 * dwarf2dbg.h (dwarf2_move_insn): Declare.
968 * dwarf2dbg.c (line_subseg): Add pmove_tail.
969 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
970 (dwarf2_gen_line_info_1): Update call accordingly.
971 (dwarf2_move_insn): New function.
972 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
973
6a50d470
RS		 9742013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
975
976 Revert:
977
978 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
979
980 PR gas/13024
981 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
982 (dwarf2_gen_line_info_1): Delete.
983 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
984 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
985 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
986 (dwarf2_directive_loc): Push previous .locs instead of generating
987 them immediately.
988
f122319e
CF		 9892013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
990
991 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
992 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
993
909c7f9c
NC		 9942013-06-13 Nick Clifton <nickc@redhat.com>
995
996 PR gas/15602
997 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
998 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
999 function. Generates an error if the adjusted offset is out of a
1000 16-bit range.
1001
5d5755a7
SL		 10022013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1003
1004 * config/tc-nios2.c (md_apply_fix): Mask constant
1005 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1006
3bf0dbfb
MR		 10072013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1008
1009 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1010 MIPS-3D instructions either.
1011 (md_convert_frag): Update the COPx branch mask accordingly.
1012
1013 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1014 option.
1015 * doc/as.texinfo (Overview): Add --relax-branch and
1016 --no-relax-branch.
1017 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1018 --no-relax-branch.
1019
9daf7bab
SL		 10202013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1021
1022 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1023 omitted.
1024
d301a56b
RS		 10252013-06-08 Catherine Moore <clm@codesourcery.com>
1026
1027 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1028 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1029 (append_insn): Change INSN_xxxx to ASE_xxxx.
1030
7bab7634
DC		 10312013-06-01 George Thomas <george.thomas@atmel.com>
1032
cbe02d4f 1033 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1034 AVR_ISA_XMEGAU
1035
f60cf82f
L		 10362013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1037
1038 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1039 for ELF.
1040
a3f278e2
CM		 10412013-05-31 Paul Brook <paul@codesourcery.com>
1042
a3f278e2
CM		 1043 * config/tc-mips.c (s_ehword): New.
1044
067ec077
CM		 10452013-05-30 Paul Brook <paul@codesourcery.com>
1046
1047 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1048
d6101ac2
MR		 10492013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1050
1051 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1052 convert relocs who have no relocatable field either. Rephrase
1053 the conditional so that the PC-relative check is only applied
1054 for REL targets.
1055
f19ccbda
MR		 10562013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1057
1058 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1059 calculation.
1060
418009c2
YZ		 10612013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1062
1063 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1064 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1065 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1066 (md_apply_fix): Likewise.
1067 (aarch64_force_relocation): Likewise.
1068
0a8897c7
KT		 10692013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1070
1071 * config/tc-arm.c (it_fsm_post_encode): Improve
1072 warning messages about deprecated IT block formats.
1073
89d2a2a3
MS		 10742013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1075
1076 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1077 inside fx_done condition.
1078
c77c0862
RS		 10792013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1080
1081 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1082
c0637f3a
PB		 10832013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1084
1085 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1086 and clean up warning when using PRINT_OPCODE_TABLE.
1087
5656a981
AM		 10882013-05-20 Alan Modra <amodra@gmail.com>
1089
1090 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1091 and data fixups performing shift/high adjust/sign extension on
1092 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1093 when writing data fixups rather than recalculating size.
1094
997b26e8
JBG		 10952013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1096
1097 * doc/c-msp430.texi: Fix typo.
1098
9f6e76f4
TG		 10992013-05-16 Tristan Gingold <gingold@adacore.com>
1100
1101 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1102 are also TOC symbols.
1103
638d3803
NC		 11042013-05-16 Nick Clifton <nickc@redhat.com>
1105
1106 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1107 Add -mcpu command to specify core type.
997b26e8 1108 * doc/c-msp430.texi: Update documentation.
638d3803 1109
b015e599
AP		 11102013-05-09 Andrew Pinski <apinski@cavium.com>
1111
1112 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1113 (mips_opts): Update for the new field.
1114 (file_ase_virt): New variable.
1115 (ISA_SUPPORTS_VIRT_ASE): New macro.
1116 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1117 (MIPS_CPU_ASE_VIRT): New define.
1118 (is_opcode_valid): Handle ase_virt.
1119 (macro_build): Handle "+J".
1120 (validate_mips_insn): Likewise.
1121 (mips_ip): Likewise.
1122 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1123 (md_longopts): Add mvirt and mnovirt
1124 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1125 (mips_after_parse_args): Handle ase_virt field.
1126 (s_mipsset): Handle "virt" and "novirt".
1127 (mips_elf_final_processing): Add a comment about virt ASE might need
1128 a new flag.
1129 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1130 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1131 Document ".set virt" and ".set novirt".
1132
da8094d7
AM		 11332013-05-09 Alan Modra <amodra@gmail.com>
1134
1135 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1136 control of operand flag bits.
1137
c5f8c205
AM		 11382013-05-07 Alan Modra <amodra@gmail.com>
1139
1140 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1141 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1142 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1143 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1144 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1145 Shift and sign-extend fieldval for use by some VLE reloc
1146 operand->insert functions.
1147
b47468a6
CM		 11482013-05-06 Paul Brook <paul@codesourcery.com>
1149 Catherine Moore <clm@codesourcery.com>
1150
c5f8c205
AM		 1151 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1152 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1153 (md_apply_fix): Likewise.
1154 (tc_gen_reloc): Likewise.
1155
2de39019
CM		 11562013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1157
1158 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1159 (mips_fix_adjustable): Adjust pc-relative check to use
1160 limited_pc_reloc_p.
1161
754e2bb9
RS		 11622013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1163
1164 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1165 (s_mips_stab): Do not restrict to stabn only.
1166
13761a11
NC		 11672013-05-02 Nick Clifton <nickc@redhat.com>
1168
1169 * config/tc-msp430.c: Add support for the MSP430X architecture.
1170 Add code to insert a NOP instruction after any instruction that
1171 might change the interrupt state.
1172 Add support for the LARGE memory model.
1173 Add code to initialise the .MSP430.attributes section.
1174 * config/tc-msp430.h: Add support for the MSP430X architecture.
1175 * doc/c-msp430.texi: Document the new -mL and -mN command line
1176 options.
1177 * NEWS: Mention support for the MSP430X architecture.
1178
df26367c
MR		 11792013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1180
1181 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1182 alpha*-*-linux*ecoff*.
1183
f02d8318
CF		 11842013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1185
1186 * config/tc-mips.c (mips_ip): Add sizelo.
1187 For "+C", "+G", and "+H", set sizelo and compare against it.
1188
b40bf0a2
NC		 11892013-04-29 Nick Clifton <nickc@redhat.com>
1190
1191 * as.c (Options): Add -gdwarf-sections.
1192 (parse_args): Likewise.
1193 * as.h (flag_dwarf_sections): Declare.
1194 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1195 (process_entries): When -gdwarf-sections is enabled generate
1196 fragmentary .debug_line sections.
1197 (out_debug_line): Set the section for the .debug_line section end
1198 symbol.
1199 * doc/as.texinfo: Document -gdwarf-sections.
1200 * NEWS: Mention -gdwarf-sections.
1201
8eeccb77 12022013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1203
1204 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1205 according to the target parameter. Don't call s_segm since s_segm
1206 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1207 initialized yet.
1208 (md_begin): Call s_segm according to target parameter from command
1209 line.
1210
49926cd0
AM		 12112013-04-25 Alan Modra <amodra@gmail.com>
1212
1213 * configure.in: Allow little-endian linux.
1214 * configure: Regenerate.
1215
e3031850
SL		 12162013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1217
1218 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1219 "fstatus" control register to "eccinj".
1220
cb948fc0
KT		 12212013-04-19 Kai Tietz <ktietz@redhat.com>
1222
1223 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1224
4455e9ad
JB		 12252013-04-15 Julian Brown <julian@codesourcery.com>
1226
1227 * expr.c (add_to_result, subtract_from_result): Make global.
1228 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1229 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1230 subtract_from_result to handle extra bit of precision for .sleb128
1231 directive operands.
1232
956a6ba3
JB		 12332013-04-10 Julian Brown <julian@codesourcery.com>
1234
1235 * read.c (convert_to_bignum): Add sign parameter. Use it
1236 instead of X_unsigned to determine sign of resulting bignum.
1237 (emit_expr): Pass extra argument to convert_to_bignum.
1238 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1239 X_extrabit to convert_to_bignum.
1240 (parse_bitfield_cons): Set X_extrabit.
1241 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1242 Initialise X_extrabit field as appropriate.
1243 (add_to_result): New.
1244 (subtract_from_result): New.
1245 (expr): Use above.
1246 * expr.h (expressionS): Add X_extrabit field.
1247
eb9f3f00
JB		 12482013-04-10 Jan Beulich <jbeulich@suse.com>
1249
1250 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1251 register being PC when is_t or writeback, and use distinct
1252 diagnostic for the latter case.
1253
ccb84d65
JB		 12542013-04-10 Jan Beulich <jbeulich@suse.com>
1255
1256 * gas/config/tc-arm.c (parse_operands): Re-write
1257 po_barrier_or_imm().
1258 (do_barrier): Remove bogus constraint().
1259 (do_t_barrier): Remove.
1260
4d13caa0
NC		 12612013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1262
1263 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1264 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1265 ATmega2564RFR2
1266 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1267
16d02dc9
JB		 12682013-04-09 Jan Beulich <jbeulich@suse.com>
1269
1270 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1271 Use local variable Rt in more places.
1272 (do_vmsr): Accept all control registers.
1273
05ac0ffb
JB		 12742013-04-09 Jan Beulich <jbeulich@suse.com>
1275
1276 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1277 if there was none specified for moves between scalar and core
1278 register.
1279
2d51fb74
JB		 12802013-04-09 Jan Beulich <jbeulich@suse.com>
1281
1282 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1283 NEON_ALL_LANES case.
1284
94dcf8bf
JB		 12852013-04-08 Jan Beulich <jbeulich@suse.com>
1286
1287 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1288 PC-relative VSTR.
1289
1472d06f
JB		 12902013-04-08 Jan Beulich <jbeulich@suse.com>
1291
1292 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1293 entry to sp_fiq.
1294
0c76cae8
AM		 12952013-04-03 Alan Modra <amodra@gmail.com>
1296
1297 * doc/as.texinfo: Add support to generate man options for h8300.
1298 * doc/c-h8300.texi: Likewise.
1299
92eb40d9
RR		 13002013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1301
1302 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1303 Cortex-A57.
1304
51dcdd4d
NC		 13052013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1306
1307 PR binutils/15068
1308 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1309
c5d685bf
NC		 13102013-03-26 Nick Clifton <nickc@redhat.com>
1311
9b978282
NC		 1312 PR gas/15295
1313 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1314 start of the file each time.
1315
c5d685bf
NC		 1316 PR gas/15178
1317 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1318 FreeBSD targets.
1319
9699c833
TG		 13202013-03-26 Douglas B Rupp <rupp@gnat.com>
1321
1322 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1323 after fixup.
1324
4755303e
WN		 13252013-03-21 Will Newton <will.newton@linaro.org>
1326
1327 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1328 pc-relative str instructions in Thumb mode.
1329
81f5558e
NC		 13302013-03-21 Michael Schewe <michael.schewe@gmx.net>
1331
1332 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1333 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1334 R_H8_DISP32A16.
1335 * config/tc-h8300.h: Remove duplicated defines.
1336
71863e73
NC		 13372013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1338
1339 PR gas/15282
1340 * tc-avr.c (mcu_has_3_byte_pc): New function.
1341 (tc_cfi_frame_initial_instructions): Call it to find return
1342 address size.
1343
795b8e6b
NC		 13442013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1345
1346 PR gas/15095
1347 * config/tc-tic6x.c (tic6x_try_encode): Handle
1348 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1349 encode register pair numbers when required.
1350
ba86b375
WN		 13512013-03-15 Will Newton <will.newton@linaro.org>
1352
1353 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1354 in vstr in Thumb mode for pre-ARMv7 cores.
1355
9e6f3811
AS		 13562013-03-14 Andreas Schwab <schwab@suse.de>
1357
1358 * doc/c-arc.texi (ARC Directives): Revert last change and use
1359 @itemize instead of @table.
1360 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1361
b10bf8c5
NC		 13622013-03-14 Nick Clifton <nickc@redhat.com>
1363
1364 PR gas/15273
1365 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1366 NULL message, instead just check ARM_CPU_IS_ANY directly.
1367
ba724cfc
NC		 13682013-03-14 Nick Clifton <nickc@redhat.com>
1369
1370 PR gas/15212
9e6f3811 1371 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1372 for table format.
1373 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1374 to the @item directives.
1375 (ARM-Neon-Alignment): Move to correct place in the document.
1376 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1377 formatting.
1378 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1379 @smallexample.
1380
531a94fd
SL		 13812013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1382
1383 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1384 case. Add default BAD_CASE to switch.
1385
dad60f8e
SL		 13862013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1387
1388 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1389 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1390
dd5181d5
KT		 13912013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1392
1393 * config/tc-arm.c (crc_ext_armv8): New feature set.
1394 (UNPRED_REG): New macro.
1395 (do_crc32_1): New function.
1396 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1397 do_crc32ch, do_crc32cw): Likewise.
1398 (TUEc): New macro.
1399 (insns): Add entries for crc32 mnemonics.
1400 (arm_extensions): Add entry for crc.
1401
8e723a10
CLT		 14022013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1403
1404 * write.h (struct fix): Add fx_dot_frag field.
1405 (dot_frag): Declare.
1406 * write.c (dot_frag): New variable.
1407 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1408 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1409 * expr.c (expr): Save value of frag_now in dot_frag when setting
1410 dot_value.
1411 * read.c (emit_expr): Likewise. Delete comments.
1412
be05d201
L		 14132013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1414
1415 * config/tc-i386.c (flag_code_names): Removed.
1416 (i386_index_check): Rewrote.
1417
62b0d0d5
YZ		 14182013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1419
1420 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1421 add comment.
1422 (aarch64_double_precision_fmovable): New function.
1423 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1424 function; handle hexadecimal representation of IEEE754 encoding.
1425 (parse_operands): Update the call to parse_aarch64_imm_float.
1426
165de32a
L		 14272013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1428
1429 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1430 (check_hle): Updated.
1431 (md_assemble): Likewise.
1432 (parse_insn): Likewise.
1433
d5de92cf
L		 14342013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1435
1436 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1437 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1438 (parse_insn): Remove expecting_string_instruction. Set
1439 i.rep_prefix.
1440
e60bb1dd
YZ		 14412013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1442
1443 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1444
aeebdd9b
YZ		 14452013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1446
1447 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1448 for system registers.
1449
4107ae22
DD		 14502013-02-27 DJ Delorie <dj@redhat.com>
1451
1452 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1453 (rl78_op): Handle %code().
1454 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1455 (tc_gen_reloc): Likwise; convert to a computed reloc.
1456 (md_apply_fix): Likewise.
1457
151fa98f
NC		 14582013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1459
1460 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1461
70a8bc5b 14622013-02-25 Terry Guo <terry.guo@arm.com>
1463
1464 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1465 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1466 list of accepted CPUs.
1467
5c111e37
L		 14682013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1469
1470 PR gas/15159
1471 * config/tc-i386.c (cpu_arch): Add ".smap".
1472
1473 * doc/c-i386.texi: Document smap.
1474
8a75745d
MR		 14752013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1476
1477 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1478 mips_assembling_insn appropriately.
1479 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1480
79850f26
MR		 14812013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1482
cf29fc61 1483 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1484 extraneous braces.
1485
4c261dff
NC		 14862013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1487
5c111e37 1488 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1489
ea33f281
NC		 14902013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1491
1492 * configure.tgt: Add nios2-*-rtems*.
1493
a1ccaec9
YZ		 14942013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1495
1496 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1497 NULL.
1498
0aa27725
RS		 14992013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1500
1501 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1502 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1503
da4339ed
NC		 15042013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1505
1506 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1507 core.
1508
36591ba1 15092013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1510 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1511
1512 Based on patches from Altera Corporation.
1513
1514 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1515 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1516 * Makefile.in: Regenerated.
1517 * configure.tgt: Add case for nios2*-linux*.
1518 * config/obj-elf.c: Conditionally include elf/nios2.h.
1519 * config/tc-nios2.c: New file.
1520 * config/tc-nios2.h: New file.
1521 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1522 * doc/Makefile.in: Regenerated.
1523 * doc/all.texi: Set NIOSII.
1524 * doc/as.texinfo (Overview): Add Nios II options.
1525 (Machine Dependencies): Include c-nios2.texi.
1526 * doc/c-nios2.texi: New file.
1527 * NEWS: Note Altera Nios II support.
1528
94d4433a
AM		 15292013-02-06 Alan Modra <amodra@gmail.com>
1530
1531 PR gas/14255
1532 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1533 Don't skip fixups with fx_subsy non-NULL.
1534 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1535 with fx_subsy non-NULL.
1536
ace9af6f
L		 15372013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1538
1539 * doc/c-metag.texi: Add "@c man" markers.
1540
89d67ed9
AM		 15412013-02-04 Alan Modra <amodra@gmail.com>
1542
1543 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1544 related code.
1545 (TC_ADJUST_RELOC_COUNT): Delete.
1546 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1547
89072bd6
AM		 15482013-02-04 Alan Modra <amodra@gmail.com>
1549
1550 * po/POTFILES.in: Regenerate.
1551
f9b2d544
NC		 15522013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1553
1554 * config/tc-metag.c: Make SWAP instruction less permissive with
1555 its operands.
1556
392ca752
DD		 15572013-01-29 DJ Delorie <dj@redhat.com>
1558
1559 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1560 relocs in .word/.etc statements.
1561
427d0db6
RM		 15622013-01-29 Roland McGrath <mcgrathr@google.com>
1563
1564 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1565 immediate value for 8-bit offset" error so it shows line info.
1566
4faf939a
JM		 15672013-01-24 Joseph Myers <joseph@codesourcery.com>
1568
1569 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1570 for 64-bit output.
1571
78c8d46c
NC		 15722013-01-24 Nick Clifton <nickc@redhat.com>
1573
1574 * config/tc-v850.c: Add support for e3v5 architecture.
1575 * doc/c-v850.texi: Mention new support.
1576
fb5b7503
NC		 15772013-01-23 Nick Clifton <nickc@redhat.com>
1578
1579 PR gas/15039
1580 * config/tc-avr.c: Include dwarf2dbg.h.
1581
8ce3d284
L		 15822013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1583
1584 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1585 (tc_i386_fix_adjustable): Likewise.
1586 (lex_got): Likewise.
1587 (tc_gen_reloc): Likewise.
1588
f5555712
YZ		 15892013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1590
1591 * config/tc-aarch64.c (output_operand_error_record): Change to output
1592 the out-of-range error message as value-expected message if there is
1593 only one single value in the expected range.
1594 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1595 LSL #0 as a programmer-friendly feature.
1596
8fd4256d
L		 15972013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1598
1599 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1600 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1601 BFD_RELOC_64_SIZE relocations.
1602 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1603 for it.
1604 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1605 relocations against local symbols.
1606
a5840dce
AM		 16072013-01-16 Alan Modra <amodra@gmail.com>
1608
1609 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1610 finding some sort of toc syntax error, and break to avoid
1611 compiler uninit warning.
1612
af89796a
L		 16132013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1614
1615 PR gas/15019
1616 * config/tc-i386.c (lex_got): Increment length by 1 if the
1617 relocation token is removed.
1618
dd42f060
NC		 16192013-01-15 Nick Clifton <nickc@redhat.com>
1620
1621 * config/tc-v850.c (md_assemble): Allow signed values for
1622 V850E_IMMEDIATE.
1623
464e3686
SK		 16242013-01-11 Sean Keys <skeys@ipdatasys.com>
1625
1626 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1627 git to cvs.
464e3686 1628
5817ffd1
PB		 16292013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1630
1631 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1632 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1633 * config/tc-ppc.c (md_show_usage): Likewise.
1634 (ppc_handle_align): Handle power8's group ending nop.
1635
f4b1f6a9
SK		 16362013-01-10 Sean Keys <skeys@ipdatasys.com>
1637
1638 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1639 that the assember exits after the opcodes have been printed.
f4b1f6a9 1640
34bca508
L		 16412013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1642
1643 * app.c: Remove trailing white spaces.
1644 * as.c: Likewise.
1645 * as.h: Likewise.
1646 * cond.c: Likewise.
1647 * dw2gencfi.c: Likewise.
1648 * dwarf2dbg.h: Likewise.
1649 * ecoff.c: Likewise.
1650 * input-file.c: Likewise.
1651 * itbl-lex.h: Likewise.
1652 * output-file.c: Likewise.
1653 * read.c: Likewise.
1654 * sb.c: Likewise.
1655 * subsegs.c: Likewise.
1656 * symbols.c: Likewise.
1657 * write.c: Likewise.
1658 * config/tc-i386.c: Likewise.
1659 * doc/Makefile.am: Likewise.
1660 * doc/Makefile.in: Likewise.
1661 * doc/c-aarch64.texi: Likewise.
1662 * doc/c-alpha.texi: Likewise.
1663 * doc/c-arc.texi: Likewise.
1664 * doc/c-arm.texi: Likewise.
1665 * doc/c-avr.texi: Likewise.
1666 * doc/c-bfin.texi: Likewise.
1667 * doc/c-cr16.texi: Likewise.
1668 * doc/c-d10v.texi: Likewise.
1669 * doc/c-d30v.texi: Likewise.
1670 * doc/c-h8300.texi: Likewise.
1671 * doc/c-hppa.texi: Likewise.
1672 * doc/c-i370.texi: Likewise.
1673 * doc/c-i386.texi: Likewise.
1674 * doc/c-i860.texi: Likewise.
1675 * doc/c-m32c.texi: Likewise.
1676 * doc/c-m32r.texi: Likewise.
1677 * doc/c-m68hc11.texi: Likewise.
1678 * doc/c-m68k.texi: Likewise.
1679 * doc/c-microblaze.texi: Likewise.
1680 * doc/c-mips.texi: Likewise.
1681 * doc/c-msp430.texi: Likewise.
1682 * doc/c-mt.texi: Likewise.
1683 * doc/c-s390.texi: Likewise.
1684 * doc/c-score.texi: Likewise.
1685 * doc/c-sh.texi: Likewise.
1686 * doc/c-sh64.texi: Likewise.
1687 * doc/c-tic54x.texi: Likewise.
1688 * doc/c-tic6x.texi: Likewise.
1689 * doc/c-v850.texi: Likewise.
1690 * doc/c-xc16x.texi: Likewise.
1691 * doc/c-xgate.texi: Likewise.
1692 * doc/c-xtensa.texi: Likewise.
1693 * doc/c-z80.texi: Likewise.
1694 * doc/internals.texi: Likewise.
1695
4c665b71
RM		 16962013-01-10 Roland McGrath <mcgrathr@google.com>
1697
1698 * hash.c (hash_new_sized): Make it global.
1699 * hash.h: Declare it.
1700 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1701 pass a small size.
1702
a3c62988
NC		 17032013-01-10 Will Newton <will.newton@imgtec.com>
1704
1705 * Makefile.am: Add Meta.
1706 * Makefile.in: Regenerate.
1707 * config/tc-metag.c: New file.
1708 * config/tc-metag.h: New file.
1709 * configure.tgt: Add Meta.
1710 * doc/Makefile.am: Add Meta.
1711 * doc/Makefile.in: Regenerate.
1712 * doc/all.texi: Add Meta.
1713 * doc/as.texiinfo: Document Meta options.
1714 * doc/c-metag.texi: New file.
1715
b37df7c4
SE		 17162013-01-09 Steve Ellcey <sellcey@mips.com>
1717
1718 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1719 calls.
1720 * config/tc-mips.c (internalError): Remove, replace with abort.
1721
a3251895
YZ		 17222013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1723
1724 * config/tc-aarch64.c (parse_operands): Change to compare the result
1725 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1726
8ab8155f
NC		 17272013-01-07 Nick Clifton <nickc@redhat.com>
1728
1729 PR gas/14887
1730 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1731 anticipated character.
1732 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1733 here as it is no longer needed.
1734
a4ac1c42
AS		 17352013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1736
1737 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1738 * doc/c-score.texi (SCORE-Opts): Likewise.
1739 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1740
e407c74b
NC		 17412013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1742
1743 * config/tc-mips.c: Add support for MIPS r5900.
1744 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1745 lq and sq.
1746 (can_swap_branch_p, get_append_method): Detect some conditional
1747 short loops to fix a bug on the r5900 by NOP in the branch delay
1748 slot.
1749 (M_MUL): Support 3 operands in multu on r5900.
1750 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1751 (s_mipsset): Force 32 bit floating point on r5900.
1752 (mips_ip): Check parameter range of instructions mfps and mtps on
1753 r5900.
1754 * configure.in: Detect CPU type when target string contains r5900
1755 (e.g. mips64r5900el-linux-gnu).
1756
62658407
L		 17572013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1758
1759 * as.c (parse_args): Update copyright year to 2013.
1760
95830fd1
YZ		 17612013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1762
1763 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1764 and "cortex57".
1765
517bb291 17662013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 1767
517bb291
NC		 1768 PR gas/14987
1769 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1770 closing bracket.
d709e4e6 1771
517bb291 1772For older changes see ChangeLog-2012
08d56133 1773\f
517bb291 1774Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 1775
1776Copying and distribution of this file, with or without modification,
1777are permitted in any medium without royalty provided the copyright
1778notice and this notice are preserved.
1779
08d56133
NC		 1780Local Variables:
1781mode: change-log
1782left-margin: 8
1783fill-column: 74
1784version-control: never
1785End:
GDB Binutils - Deliverables
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