x86: Remove the prefix byte from non-VEX/EVEX base_opcode
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
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2
3* Support non-absolute segment values for i386 lcall and ljmp.
4
b71702f1
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5* When setting the link order attribute of ELF sections, it is now possible to
6 use a numeric section index instead of symbol name.
42c36b73 7
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8* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
9 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 10
b71702f1
NC
11* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
12 Extension) and TRBE (Trace Buffer Extension) system registers for AArch64.
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AC
13
14* Add support for Armv8-R AArch64.
15
81d54bb7 16* Add support for Intel TDX instructions.
96a84ea3 17
c4694f17
TG
18* Add support for Intel Key Locker instructions.
19
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20* Added a .nop directive to generate a single no-op instruction in a target
21 neutral manner. This instruction does have an effect on DWARF line number
22 generation, if that is active.
23
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24* Removed --reduce-memory-overheads and --hash-size as gas now
25 uses hash tables that can be expand and shrink automatically.
26
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L
27* Add {disp16} pseudo prefix to x86 assembler.
28
260cd341
LC
29* Add support for Intel AMX instructions.
30
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31* Configure with --enable-x86-used-note by default for Linux/x86.
32
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NC
33Changes in 2.35:
34
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L
35* X86 NaCl target support is removed.
36
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L
37* Extend .symver directive to update visibility of the original symbol
38 and assign one original symbol to different versioned symbols.
39
6e0e8b45
L
40* Add support for Intel SERIALIZE and TSXLDTRK instructions.
41
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L
42* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
43 -mlfence-before-ret= options to x86 assembler to help mitigate
44 CVE-2020-0551.
45
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46* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
47 (if such output is being generated). Added the ability to generate
48 version 5 .debug_line sections.
49
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50* Add -mbig-obj support to i386 MingW targets.
51
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NC
52Changes in 2.34:
53
5eb617a7
L
54* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
55 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
56 options to x86 assembler to align branches within a fixed boundary
57 with segment prefixes or NOPs.
58
6655dba2
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59* Add support for Zilog eZ80 and Zilog Z180 CPUs.
60
61* Add support for z80-elf target.
62
63* Add support for relocation of each byte or word of multibyte value to Z80
64 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
65 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
66
67* Add SDCC support for Z80 targets.
68
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69Changes in 2.33:
70
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MM
71* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
72 instructions.
73
74* Add support for the Arm Transactional Memory Extension (TME)
75 instructions.
76
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77* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
78 instructions.
79
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80* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
81 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
82 time option to set the default behavior. Set the default if the configure
83 option is not used to "no".
6f2117ba 84
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DZ
85* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
86 processors.
87
88* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
89 Cortex-A76AE, and Cortex-A77 processors.
90
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91* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
92 floating point literals. Add .float16_format directive and
93 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
94 encoding.
95
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96* Add --gdwarf-cie-version command line flag. This allows control over which
97 version of DWARF CIE the assembler creates.
98
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99Changes in 2.32:
100
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101* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
102 VEX.W-ignored (WIG) VEX instructions.
103
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104* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
105 notes. Add a --enable-x86-used-note configure time option to set the
106 default behavior. Set the default if the configure option is not used
107 to "no".
108
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109* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
110
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111* Add support for the MIPS Loongson EXTensions (EXT) instructions.
112
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113* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
114
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115* Add support for the C-SKY processor series.
116
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117* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
118 ASE.
119
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120Changes in 2.31:
121
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122* The ADR and ADRL pseudo-instructions supported by the ARM assembler
123 now only set the bottom bit of the address of thumb function symbols
124 if the -mthumb-interwork command line option is active.
125
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126* Add support for the MIPS Global INValidate (GINV) ASE.
127
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SE
128* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
129
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130* Add support for the Freescale S12Z architecture.
131
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NC
132* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
133 Build Attribute notes if none are present in the input sources. Add a
134 --enable-generate-build-notes=[yes|no] configure time option to set the
135 default behaviour. Set the default if the configure option is not used
136 to "no".
137
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138* Remove -mold-gcc command-line option for x86 targets.
139
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140* Add -O[2|s] command-line options to x86 assembler to enable alternate
141 shorter instruction encoding.
142
8f065d3b 143* Add support for .nops directive. It is currently supported only for
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144 x86 targets.
145
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NC
146Changes in 2.30:
147
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148* Add support for loaction views in DWARF debug line information.
149
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150Changes in 2.29:
151
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L
152* Add support for ELF SHF_GNU_MBIND.
153
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154* Add support for the WebAssembly file format and wasm32 ELF conversion.
155
7e0de605 156* PowerPC gas now checks that the correct register class is used in
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157 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
158 that the registers are invalid.
7e0de605 159
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160* Add support for the Texas Instruments PRU processor.
161
0cda1e19
TP
162* Support for the ARMv8-R architecture and Cortex-R52 processor has been
163 added to the ARM port.
ced40572 164
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TG
165Changes in 2.28:
166
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167* Add support for the RISC-V architecture.
168
b19ea8d2 169* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 170
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171Changes in 2.27:
172
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173* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
174
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175* Add --no-pad-sections to stop the assembler from padding the end of output
176 sections up to their alignment boundary.
177
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TP
178* Support for the ARMv8-M architecture has been added to the ARM port. Support
179 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
180 port.
181
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CZ
182* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
183 .extCoreRegister pseudo-ops that allow an user to define custom
184 instructions, conditional codes, auxiliary and core registers.
185
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186* Add a configure option --enable-elf-stt-common to decide whether ELF
187 assembler should generate common symbols with the STT_COMMON type by
188 default. Default to no.
189
a05a5b64 190* New command-line option --elf-stt-common= for ELF targets to control
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191 whether to generate common symbols with the STT_COMMON type.
192
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193* Add ability to set section flags and types via numeric values for ELF
194 based targets.
81c23f82 195
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196* Add a configure option --enable-x86-relax-relocations to decide whether
197 x86 assembler should generate relax relocations by default. Default to
198 yes, except for x86 Solaris targets older than Solaris 12.
199
a05a5b64 200* New command-line option -mrelax-relocations= for x86 target to control
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201 whether to generate relax relocations.
202
a05a5b64 203* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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204 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
205
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206* Add assembly-time relaxation option for ARC cpus.
207
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208* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
209 cpu type to be adjusted at configure time.
210
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211Changes in 2.26:
212
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213* Add a configure option --enable-compressed-debug-sections={all,gas} to
214 decide whether DWARF debug sections should be compressed by default.
e12fe555 215
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216* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
217 assembler support for Argonaut RISC architectures.
218
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219* Symbol and label names can now be enclosed in double quotes (") which allows
220 them to contain characters that are not part of valid symbol names in high
221 level languages.
222
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223* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
224 previous spelling, -march=armv6zk, is still accepted.
225
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226* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
227 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
228 extensions has also been added to the Aarch64 port.
229
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230* Support for the ARMv8.1 architecture has been added to the ARM port. Support
231 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
232 been added to the ARM port.
233
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234* Extend --compress-debug-sections option to support
235 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
236 targets.
237
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238* --compress-debug-sections is turned on for Linux/x86 by default.
239
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240Changes in 2.25:
241
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242* Add support for the AVR Tiny microcontrollers.
243
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244* Replace support for openrisc and or32 with support for or1k.
245
2e6976a8 246* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 247 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 248
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249* Add support for the Andes NDS32.
250
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251Changes in 2.24:
252
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NC
253* Add support for the Texas Instruments MSP430X processor.
254
a05a5b64 255* Add -gdwarf-sections command-line option to enable per-code-section
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256 generation of DWARF .debug_line sections.
257
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258* Add support for Altera Nios II.
259
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260* Add support for the Imagination Technologies Meta processor.
261
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262* Add support for the v850e3v5.
263
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264* Remove assembler support for MIPS ECOFF targets.
265
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266Changes in 2.23:
267
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NC
268* Add support for the 64-bit ARM architecture: AArch64.
269
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NC
270* Add support for S12X processor.
271
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JL
272* Add support for the VLE extension to the PowerPC architecture.
273
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274* Add support for the Freescale XGATE architecture.
275
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276* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
277 directives. These are currently available only for x86 and ARM targets.
278
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279* Add support for the Renesas RL78 architecture.
280
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281* Add support for the Adapteva EPIPHANY architecture.
282
fe13e45b 283* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 284
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285Changes in 2.22:
286
69f56ae1 287* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 288
90b3661c 289Changes in 2.21:
44f45767 290
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291* Gas no longer requires doubling of ampersands in macros.
292
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293* Add support for the TMS320C6000 (TI C6X) processor family.
294
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295* GAS now understands an extended syntax in the .section directive flags
296 for COFF targets that allows the section's alignment to be specified. This
297 feature has also been backported to the 2.20 release series, starting with
298 2.20.1.
299
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300* Add support for the Renesas RX processor.
301
a05a5b64 302* New command-line option, --compress-debug-sections, which requests
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303 compression of DWARF debug information sections in the relocatable output
304 file. Compressed debug sections are supported by readelf, objdump, and
305 gold, but not currently by Gnu ld.
306
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307Changes in 2.20:
308
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309* Added support for v850e2 and v850e2v3.
310
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NC
311* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
312 pseudo op. It marks the symbol as being globally unique in the entire
313 process.
314
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315* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
316 in binary rather than text.
6e33da12 317
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318* Add support for common symbol alignment to PE formats.
319
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320* Add support for the new discriminator column in the DWARF line table,
321 with a discriminator operand for the .loc directive.
322
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323* Add support for Sunplus score architecture.
324
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NC
325* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
326 indicate that if the symbol is the target of a relocation, its value should
327 not be use. Instead the function should be invoked and its result used as
328 the value.
fa94de6b 329
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330* Add support for Lattice Mico32 (lm32) architecture.
331
fa94de6b 332* Add support for Xilinx MicroBlaze architecture.
caa03924 333
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TG
334Changes in 2.19:
335
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336* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
337 tables without runtime relocation.
338
a05a5b64 339* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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340 adds compatibility with H'00 style hex constants.
341
a05a5b64 342* New command-line option, -msse-check=[none|error|warning], for x86
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343 targets.
344
a05a5b64 345* New sub-option added to the assembler's -a command-line switch to
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346 generate a listing output. The 'g' sub-option will insert into the listing
347 various information about the assembly, such as assembler version, the
a05a5b64 348 command-line options used, and a time stamp.
83f10cb2 349
a05a5b64 350* New command-line option -msse2avx for x86 target to encode SSE
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351 instructions with VEX prefix.
352
f1f8f695 353* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 354
a05a5b64 355* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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356 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
357 -mnaked-reg and -mold-gcc, for x86 targets.
358
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359* Support for generating wide character strings has been added via the new
360 pseudo ops: .string16, .string32 and .string64.
361
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MM
362* Support for SSE5 has been added to the i386 port.
363
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NC
364Changes in 2.18:
365
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366* The GAS sources are now released under the GPLv3.
367
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NC
368* Support for the National Semiconductor CR16 target has been added.
369
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AM
370* Added gas .reloc pseudo. This is a low-level interface for creating
371 relocations.
372
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373* Add support for x86_64 PE+ target.
374
1c0d3aa6 375* Add support for Score target.
83518699 376
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NC
377Changes in 2.17:
378
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379* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
380
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381* Support for ms2 architecture has been added.
382
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NC
383* Support for the Z80 processor family has been added.
384
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MM
385* Add support for the "@<file>" syntax to the command line, so that extra
386 switches can be read from <file>.
387
a05a5b64 388* The SH target supports a new command-line switch --enable-reg-prefix which,
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389 if enabled, will allow register names to be optionally prefixed with a $
390 character. This allows register names to be distinguished from label names.
fa94de6b 391
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392* Macros with a variable number of arguments are now supported. See the
393 documentation for how this works.
394
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NC
395* Added --reduce-memory-overheads switch to reduce the size of the hash
396 tables used, at the expense of longer assembly times, and
397 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
398
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399* Macro names and macro parameter names can now be any identifier that would
400 also be legal as a symbol elsewhere. For macro parameter names, this is
401 known to cause problems in certain sources when the respective target uses
402 characters inconsistently, and thus macro parameter references may no longer
403 be recognized as such (see the documentation for details).
fa94de6b 404
d2c5f73e
NC
405* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
406 for the VAX target in order to be more compatible with the VAX MACRO
407 assembler.
408
a05a5b64 409* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 410
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NC
411Changes in 2.16:
412
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413* Redefinition of macros now results in an error.
414
a05a5b64 415* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 416
a05a5b64 417* New command-line option -munwind-check=[warning|error] for IA64
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418 targets.
419
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420* The IA64 port now uses automatic dependency violation removal as its default
421 mode.
422
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423* Port to MAXQ processor contributed by HCL Tech.
424
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NC
425* Added support for generating unwind tables for ARM ELF targets.
426
a05a5b64 427* Add a -g command-line option to generate debug information in the target's
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428 preferred debug format.
429
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430* Support for the crx-elf target added.
431
1a320fbb 432* Support for the sh-symbianelf target added.
1fe1f39c 433
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BF
434* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
435 on pe[i]-i386; required for this target's DWARF 2 support.
436
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NC
437* Support for Motorola MCF521x/5249/547x/548x added.
438
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NC
439* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
440 instrucitons.
441
a05a5b64 442* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 443
a05a5b64 444* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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445 added to enter (and leave) alternate macro syntax mode.
446
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NC
447Changes in 2.15:
448
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CD
449* The MIPS -membedded-pic option (Embedded-PIC code generation) is
450 deprecated and will be removed in a future release.
451
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NC
452* Added PIC m32r Linux (ELF) and support to M32R assembler.
453
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MM
454* Added support for ARM V6.
455
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456* Added support for sh4a and variants.
457
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458* Support for Renesas M32R2 added.
459
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MS
460* Limited support for Mapping Symbols as specified in the ARM ELF
461 specification has been added to the arm assembler.
ed769ec1 462
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NC
463* On ARM architectures, added a new gas directive ".unreq" that undoes
464 definitions created by ".req".
465
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NC
466* Support for Motorola ColdFire MCF528x added.
467
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NC
468* Added --gstabs+ switch to enable the generation of STABS debug format
469 information with GNU extensions.
fa94de6b 470
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CD
471* Added support for MIPS64 Release 2.
472
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NC
473* Added support for v850e1.
474
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L
475* Added -n switch for x86 assembler. By default, x86 GAS replaces
476 multiple nop instructions used for alignment within code sections
477 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
478 switch disables the optimization.
479
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480* Removed -n option from MIPS assembler. It was not useful, and confused the
481 existing -non_shared option.
482
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CD
483Changes in 2.14:
484
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CD
485* Added support for MIPS32 Release 2.
486
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NC
487* Added support for Xtensa architecture.
488
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NC
489* Support for Intel's iWMMXt processor (an ARM variant) added.
490
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NC
491* An assembler test generator has been contributed and an example file that
492 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 493
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NC
494* Support for SH2E added.
495
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NC
496* GASP has now been removed.
497
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NC
498* Support for Texas Instruments TMS320C4x and TMS320C3x series of
499 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 500
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NC
501* Support for the Ubicom IP2xxx microcontroller added.
502
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NC
503Changes in 2.13:
504
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NC
505* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
506 and FR500 included.
0ebb9a87 507
a40cbfa3 508* Support for DLX processor added.
52216602 509
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NC
510* GASP has now been deprecated and will be removed in a future release. Use
511 the macro facilities in GAS instead.
3f965e60 512
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NC
513* GASP now correctly parses floating point numbers. Unless the base is
514 explicitly specified, they are interpreted as decimal numbers regardless of
515 the currently specified base.
1ac57253 516
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NC
517Changes in 2.12:
518
a40cbfa3 519* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 520
a40cbfa3 521* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 522
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523* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
524 specifying the target instruction set. The old method of specifying the
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525 target processor has been deprecated, but is still accepted for
526 compatibility.
03b1477f 527
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528* Support for the VFP floating-point instruction set has been added to
529 the ARM assembler.
252b5132 530
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531* New psuedo op: .incbin to include a set of binary data at a given point
532 in the assembly. Contributed by Anders Norlander.
7e005732 533
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534* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
535 but still works for compatability.
ec68c924 536
fa94de6b 537* The MIPS assembler no longer issues a warning by default when it
a05a5b64 538 generates a nop instruction from a macro. The new command-line option
a40cbfa3 539 -n will turn on the warning.
63486801 540
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541Changes in 2.11:
542
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543* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
544
a40cbfa3 545* x86 gas now supports the full Pentium4 instruction set.
a167610d 546
a40cbfa3 547* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 548
a40cbfa3 549* Support for Motorola 68HC11 and 68HC12.
df86943d 550
a40cbfa3 551* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 552
a40cbfa3 553* Support for IA-64.
2dac7317 554
a40cbfa3 555* Support for i860, by Jason Eckhardt.
22b36938 556
a40cbfa3 557* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 558
a40cbfa3 559* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 560
a05a5b64 561* x86 gas -q command-line option quietens warnings about register size changes
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562 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
563 translating various deprecated floating point instructions.
a38cf1db 564
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565Changes in 2.10:
566
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567* Support for the ARM msr instruction was changed to only allow an immediate
568 operand when altering the flags field.
d14442f4 569
a40cbfa3 570* Support for ATMEL AVR.
adde6300 571
a40cbfa3 572* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 573
a40cbfa3 574* Support for numbers with suffixes.
3fd9f047 575
a40cbfa3 576* Added support for breaking to the end of repeat loops.
6a6987a9 577
a40cbfa3 578* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 579
a40cbfa3 580* New .elseif pseudo-op added.
3fd9f047 581
a40cbfa3 582* New --fatal-warnings option.
1f776aa5 583
a40cbfa3 584* picoJava architecture support added.
252b5132 585
a40cbfa3 586* Motorola MCore 210 processor support added.
041dd5a9 587
fa94de6b 588* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 589 assembly programs with intel syntax.
252b5132 590
a40cbfa3 591* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 592
a40cbfa3 593* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 594
a40cbfa3 595* Full 16-bit mode support for i386.
252b5132 596
fa94de6b 597* Greatly improved instruction operand checking for i386. This change will
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598 produce errors or warnings on incorrect assembly code that previous versions
599 of gas accepted. If you get unexpected messages from code that worked with
600 older versions of gas, please double check the code before reporting a bug.
252b5132 601
a40cbfa3 602* Weak symbol support added for COFF targets.
252b5132 603
a40cbfa3 604* Mitsubishi D30V support added.
252b5132 605
a40cbfa3 606* Texas Instruments c80 (tms320c80) support added.
252b5132 607
a40cbfa3 608* i960 ELF support added.
bedf545c 609
a40cbfa3 610* ARM ELF support added.
a057431b 611
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612Changes in 2.9:
613
a40cbfa3 614* Texas Instruments c30 (tms320c30) support added.
252b5132 615
fa94de6b 616* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 617 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 618
a40cbfa3 619* Added --gstabs option to generate stabs debugging information.
252b5132 620
fa94de6b 621* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 622 listing.
252b5132 623
a40cbfa3 624* Added -MD option to print dependencies.
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625
626Changes in 2.8:
627
a40cbfa3 628* BeOS support added.
252b5132 629
a40cbfa3 630* MIPS16 support added.
252b5132 631
a40cbfa3 632* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 633
a40cbfa3 634* Alpha/VMS support added.
252b5132 635
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636* m68k options --base-size-default-16, --base-size-default-32,
637 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 638
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639* The alignment directives now take an optional third argument, which is the
640 maximum number of bytes to skip. If doing the alignment would require
641 skipping more than the given number of bytes, the alignment is not done at
642 all.
252b5132 643
a40cbfa3 644* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 645
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646* The -a option takes a new suboption, c (e.g., -alc), to skip false
647 conditionals in listings.
252b5132 648
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649* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
650 the symbol is already defined.
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651
652Changes in 2.7:
653
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654* The PowerPC assembler now allows the use of symbolic register names (r0,
655 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
656 can be used any time. PowerPC 860 move to/from SPR instructions have been
657 added.
252b5132 658
a40cbfa3 659* Alpha Linux (ELF) support added.
252b5132 660
a40cbfa3 661* PowerPC ELF support added.
252b5132 662
a40cbfa3 663* m68k Linux (ELF) support added.
252b5132 664
a40cbfa3 665* i960 Hx/Jx support added.
252b5132 666
a40cbfa3 667* i386/PowerPC gnu-win32 support added.
252b5132 668
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669* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
670 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 671 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 672 target=i386-unknown-sco3.2v5elf.
252b5132 673
a40cbfa3 674* m88k-motorola-sysv3* support added.
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675
676Changes in 2.6:
677
a40cbfa3 678* Gas now directly supports macros, without requiring GASP.
252b5132 679
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680* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
681 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
682 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 683
a40cbfa3 684* Added --defsym SYM=VALUE option.
252b5132 685
a40cbfa3 686* Added -mips4 support to MIPS assembler.
252b5132 687
a40cbfa3 688* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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689
690Changes in 2.4:
691
a40cbfa3 692* Converted this directory to use an autoconf-generated configure script.
252b5132 693
a40cbfa3 694* ARM support, from Richard Earnshaw.
252b5132 695
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696* Updated VMS support, from Pat Rankin, including considerably improved
697 debugging support.
252b5132 698
a40cbfa3 699* Support for the control registers in the 68060.
252b5132 700
a40cbfa3 701* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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702 provide for possible future gcc changes, for targets where gas provides some
703 features not available in the native assembler. If the native assembler is
a40cbfa3 704 used, it should become obvious pretty quickly what the problem is.
252b5132 705
a40cbfa3 706* Usage message is available with "--help".
252b5132 707
fa94de6b 708* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 709 also, but didn't get into the NEWS file.)
252b5132 710
a40cbfa3 711* Weak symbol support for a.out.
252b5132 712
fa94de6b 713* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 714 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 715
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716* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
717 Paul Kranenburg.
252b5132 718
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719* Improved Alpha support. Immediate constants can have a much larger range
720 now. Support for the 21164 has been contributed by Digital.
252b5132 721
a40cbfa3 722* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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723
724Changes in 2.3:
725
a40cbfa3 726* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 727
a40cbfa3 728* RS/6000 and PowerPC support by Ian Taylor.
252b5132 729
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730* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
731 based on mail received from various people. The `-h#' option should work
732 again too.
252b5132 733
a40cbfa3 734* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 735 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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736 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
737 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
738 in the "dist" directory.
252b5132 739
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740* Vax support in gas fixed for BSD, so it builds and seems to run a couple
741 simple tests okay. I haven't put it through extensive testing. (GNU make is
742 currently required for BSD 4.3 builds.)
252b5132 743
fa94de6b 744* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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745 based on code donated by CMU, which used an a.out-based format. I'm afraid
746 the alpha-a.out support is pretty badly mangled, and much of it removed;
747 making it work will require rewriting it as BFD support for the format anyways.
252b5132 748
a40cbfa3 749* Irix 5 support.
252b5132 750
fa94de6b 751* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 752 couple different versions of expect and dejagnu.
252b5132 753
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754* Symbols' values are now handled internally as expressions, permitting more
755 flexibility in evaluating them in some cases. Some details of relocation
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756 handling have also changed, and simple constant pool management has been
757 added, to make the Alpha port easier.
252b5132 758
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759* New option "--statistics" for printing out program run times. This is
760 intended to be used with the gcc "-Q" option, which prints out times spent in
761 various phases of compilation. (You should be able to get all of them
762 printed out with "gcc -Q -Wa,--statistics", I think.)
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763
764Changes in 2.2:
765
a40cbfa3 766* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 767
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768* Configurations that are still in development (and therefore are convenient to
769 have listed in configure.in) still get rejected without a minor change to
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770 gas/Makefile.in, so people not doing development work shouldn't get the
771 impression that support for such configurations is actually believed to be
772 reliable.
252b5132 773
fa94de6b 774* The program name (usually "as") is printed when a fatal error message is
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775 displayed. This should prevent some confusion about the source of occasional
776 messages about "internal errors".
252b5132 777
fa94de6b 778* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 779 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 780
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781* Symbol values are maintained as expressions instead of being immediately
782 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
783 more complex calculations involving symbols whose values are not alreadey
784 known.
252b5132 785
a40cbfa3 786* DBX-style debugging info ("stabs") is now supported for COFF formats.
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787 If any stabs directives are seen in the source, GAS will create two new
788 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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789 section is nearly identical to the a.out symbol format, and .stabstr is
790 its string table. For this to be useful, you must have configured GCC
791 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
792 that can use the stab sections (4.11 or later).
252b5132 793
fa94de6b 794* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 795 support is in progress.
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796
797Changes in 2.1:
798
fa94de6b 799* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 800 incorporated, but not well tested yet.
252b5132 801
fa94de6b 802* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 803 with gcc now.
252b5132 804
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805* Some minor adjustments to add (Convergent Technologies') Miniframe support,
806 suggested by Ronald Cole.
252b5132 807
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808* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
809 includes improved ELF support, which I've started adapting for SPARC Solaris
810 2.x. Integration isn't completely, so it probably won't work.
252b5132 811
a40cbfa3 812* HP9000/300 support, donated by HP, has been merged in.
252b5132 813
a40cbfa3 814* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 815
a40cbfa3 816* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 817
a40cbfa3 818* Test suite framework is starting to become reasonable.
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819
820Changes in 2.0:
821
a40cbfa3 822* Mostly bug fixes.
252b5132 823
a40cbfa3 824* Some more merging of BFD and ELF code, but ELF still doesn't work.
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825
826Changes in 1.94:
827
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828* BFD merge is partly done. Adventurous souls may try giving configure the
829 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
830 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
831 or "solaris". (ELF isn't really supported yet. It needs work. I've got
832 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
833 fully merged yet.)
252b5132 834
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835* The 68K opcode table has been split in half. It should now compile under gcc
836 without consuming ridiculous amounts of memory.
252b5132 837
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838* A couple data structures have been reduced in size. This should result in
839 saving a little bit of space at runtime.
252b5132 840
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841* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
842 code provided ROSE format support, which I haven't merged in yet. (I can
843 make it available, if anyone wants to try it out.) Ralph's code, for BSD
844 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
845 coming.
252b5132 846
a40cbfa3 847* Support for the Hitachi H8/500 has been added.
252b5132 848
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849* VMS host and target support should be working now, thanks chiefly to Eric
850 Youngdale.
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851
852Changes in 1.93.01:
853
a40cbfa3 854* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 855
a40cbfa3 856* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 857
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858* For m68k, "%" is now accepted before register names. For COFF format, which
859 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
860 can be distinguished from the register.
252b5132 861
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862* Last public release was 1.38. Lots of configuration changes since then, lots
863 of new CPUs and formats, lots of bugs fixed.
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864
865\f
b3adc24a 866Copyright (C) 2012-2020 Free Software Foundation, Inc.
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867
868Copying and distribution of this file, with or without modification,
869are permitted in any medium without royalty provided the copyright
870notice and this notice are preserved.
871
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872Local variables:
873fill-column: 79
874End:
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