x86: Support Intel UINTR
[deliverable/binutils-gdb.git] / gas / NEWS
CommitLineData
252b5132 1-*- text -*-
6d96a594 2
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3* Add support for Intel UINTR instructions.
4
6d96a594
C
5* Support non-absolute segment values for i386 lcall and ljmp.
6
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NC
7* When setting the link order attribute of ELF sections, it is now possible to
8 use a numeric section index instead of symbol name.
42c36b73 9
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10* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
11 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
77718e5b 12
b71702f1
NC
13* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
14 Extension) and TRBE (Trace Buffer Extension) system registers for AArch64.
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AC
15
16* Add support for Armv8-R AArch64.
17
81d54bb7 18* Add support for Intel TDX instructions.
96a84ea3 19
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20* Add support for Intel Key Locker instructions.
21
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NC
22* Added a .nop directive to generate a single no-op instruction in a target
23 neutral manner. This instruction does have an effect on DWARF line number
24 generation, if that is active.
25
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ML
26* Removed --reduce-memory-overheads and --hash-size as gas now
27 uses hash tables that can be expand and shrink automatically.
28
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L
29* Add {disp16} pseudo prefix to x86 assembler.
30
260cd341
LC
31* Add support for Intel AMX instructions.
32
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L
33* Configure with --enable-x86-used-note by default for Linux/x86.
34
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NC
35Changes in 2.35:
36
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L
37* X86 NaCl target support is removed.
38
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L
39* Extend .symver directive to update visibility of the original symbol
40 and assign one original symbol to different versioned symbols.
41
6e0e8b45
L
42* Add support for Intel SERIALIZE and TSXLDTRK instructions.
43
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L
44* Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
45 -mlfence-before-ret= options to x86 assembler to help mitigate
46 CVE-2020-0551.
47
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NC
48* Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
49 (if such output is being generated). Added the ability to generate
50 version 5 .debug_line sections.
51
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TC
52* Add -mbig-obj support to i386 MingW targets.
53
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NC
54Changes in 2.34:
55
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L
56* Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
57 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
58 options to x86 assembler to align branches within a fixed boundary
59 with segment prefixes or NOPs.
60
6655dba2
SB
61* Add support for Zilog eZ80 and Zilog Z180 CPUs.
62
63* Add support for z80-elf target.
64
65* Add support for relocation of each byte or word of multibyte value to Z80
66 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
67 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
68
69* Add SDCC support for Z80 targets.
70
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71Changes in 2.33:
72
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MM
73* Add support for the Arm Scalable Vector Extension version 2 (SVE2)
74 instructions.
75
76* Add support for the Arm Transactional Memory Extension (TME)
77 instructions.
78
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79* Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
80 instructions.
81
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BW
82* For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
83 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
84 time option to set the default behavior. Set the default if the configure
85 option is not used to "no".
6f2117ba 86
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DZ
87* Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
88 processors.
89
90* Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
91 Cortex-A76AE, and Cortex-A77 processors.
92
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93* Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
94 floating point literals. Add .float16_format directive and
95 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
96 encoding.
97
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AB
98* Add --gdwarf-cie-version command line flag. This allows control over which
99 version of DWARF CIE the assembler creates.
100
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101Changes in 2.32:
102
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103* Add -mvexwig=[0|1] option to x86 assembler to control encoding of
104 VEX.W-ignored (WIG) VEX instructions.
105
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L
106* Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
107 notes. Add a --enable-x86-used-note configure time option to set the
108 default behavior. Set the default if the configure option is not used
109 to "no".
110
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CX
111* Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
112
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CX
113* Add support for the MIPS Loongson EXTensions (EXT) instructions.
114
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115* Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
116
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117* Add support for the C-SKY processor series.
118
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119* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
120 ASE.
121
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122Changes in 2.31:
123
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124* The ADR and ADRL pseudo-instructions supported by the ARM assembler
125 now only set the bottom bit of the address of thumb function symbols
126 if the -mthumb-interwork command line option is active.
127
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128* Add support for the MIPS Global INValidate (GINV) ASE.
129
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SE
130* Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
131
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132* Add support for the Freescale S12Z architecture.
133
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NC
134* Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
135 Build Attribute notes if none are present in the input sources. Add a
136 --enable-generate-build-notes=[yes|no] configure time option to set the
137 default behaviour. Set the default if the configure option is not used
138 to "no".
139
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L
140* Remove -mold-gcc command-line option for x86 targets.
141
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L
142* Add -O[2|s] command-line options to x86 assembler to enable alternate
143 shorter instruction encoding.
144
8f065d3b 145* Add support for .nops directive. It is currently supported only for
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146 x86 targets.
147
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NC
148Changes in 2.30:
149
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AO
150* Add support for loaction views in DWARF debug line information.
151
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TG
152Changes in 2.29:
153
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L
154* Add support for ELF SHF_GNU_MBIND.
155
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PC
156* Add support for the WebAssembly file format and wasm32 ELF conversion.
157
7e0de605 158* PowerPC gas now checks that the correct register class is used in
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AM
159 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
160 that the registers are invalid.
7e0de605 161
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DD
162* Add support for the Texas Instruments PRU processor.
163
0cda1e19
TP
164* Support for the ARMv8-R architecture and Cortex-R52 processor has been
165 added to the ARM port.
ced40572 166
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TG
167Changes in 2.28:
168
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169* Add support for the RISC-V architecture.
170
b19ea8d2 171* Add support for the ARM Cortex-M23 and Cortex-M33 processors.
ce1b0a45 172
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TG
173Changes in 2.27:
174
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L
175* Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
176
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177* Add --no-pad-sections to stop the assembler from padding the end of output
178 sections up to their alignment boundary.
179
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TP
180* Support for the ARMv8-M architecture has been added to the ARM port. Support
181 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
182 port.
183
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CZ
184* ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
185 .extCoreRegister pseudo-ops that allow an user to define custom
186 instructions, conditional codes, auxiliary and core registers.
187
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L
188* Add a configure option --enable-elf-stt-common to decide whether ELF
189 assembler should generate common symbols with the STT_COMMON type by
190 default. Default to no.
191
a05a5b64 192* New command-line option --elf-stt-common= for ELF targets to control
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193 whether to generate common symbols with the STT_COMMON type.
194
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195* Add ability to set section flags and types via numeric values for ELF
196 based targets.
81c23f82 197
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L
198* Add a configure option --enable-x86-relax-relocations to decide whether
199 x86 assembler should generate relax relocations by default. Default to
200 yes, except for x86 Solaris targets older than Solaris 12.
201
a05a5b64 202* New command-line option -mrelax-relocations= for x86 target to control
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203 whether to generate relax relocations.
204
a05a5b64 205* New command-line option -mfence-as-lock-add=yes for x86 target to encode
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206 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
207
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CZ
208* Add assembly-time relaxation option for ARC cpus.
209
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210* Add --with-cpu=TYPE configure option for ARC gas. This allows the default
211 cpu type to be adjusted at configure time.
212
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213Changes in 2.26:
214
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L
215* Add a configure option --enable-compressed-debug-sections={all,gas} to
216 decide whether DWARF debug sections should be compressed by default.
e12fe555 217
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218* Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
219 assembler support for Argonaut RISC architectures.
220
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NC
221* Symbol and label names can now be enclosed in double quotes (") which allows
222 them to contain characters that are not part of valid symbol names in high
223 level languages.
224
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MW
225* Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
226 previous spelling, -march=armv6zk, is still accepted.
227
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228* Support for the ARMv8.1 architecture has been added to the Aarch64 port.
229 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
230 extensions has also been added to the Aarch64 port.
231
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232* Support for the ARMv8.1 architecture has been added to the ARM port. Support
233 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
234 been added to the ARM port.
235
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236* Extend --compress-debug-sections option to support
237 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
238 targets.
239
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L
240* --compress-debug-sections is turned on for Linux/x86 by default.
241
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242Changes in 2.25:
243
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244* Add support for the AVR Tiny microcontrollers.
245
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246* Replace support for openrisc and or32 with support for or1k.
247
2e6976a8 248* Enhanced the ARM port to accept the assembler output from the CodeComposer
a05a5b64 249 Studio tool. Support is enabled via the new command-line option -mccs.
2e6976a8 250
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251* Add support for the Andes NDS32.
252
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TG
253Changes in 2.24:
254
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NC
255* Add support for the Texas Instruments MSP430X processor.
256
a05a5b64 257* Add -gdwarf-sections command-line option to enable per-code-section
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258 generation of DWARF .debug_line sections.
259
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260* Add support for Altera Nios II.
261
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NC
262* Add support for the Imagination Technologies Meta processor.
263
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NC
264* Add support for the v850e3v5.
265
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RS
266* Remove assembler support for MIPS ECOFF targets.
267
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268Changes in 2.23:
269
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NC
270* Add support for the 64-bit ARM architecture: AArch64.
271
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NC
272* Add support for S12X processor.
273
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JL
274* Add support for the VLE extension to the PowerPC architecture.
275
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NC
276* Add support for the Freescale XGATE architecture.
277
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RM
278* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
279 directives. These are currently available only for x86 and ARM targets.
280
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281* Add support for the Renesas RL78 architecture.
282
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NC
283* Add support for the Adapteva EPIPHANY architecture.
284
fe13e45b 285* For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
29c048b6 286
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287Changes in 2.22:
288
69f56ae1 289* Add support for the Tilera TILEPro and TILE-Gx architectures.
44f45767 290
90b3661c 291Changes in 2.21:
44f45767 292
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293* Gas no longer requires doubling of ampersands in macros.
294
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JM
295* Add support for the TMS320C6000 (TI C6X) processor family.
296
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297* GAS now understands an extended syntax in the .section directive flags
298 for COFF targets that allows the section's alignment to be specified. This
299 feature has also been backported to the 2.20 release series, starting with
300 2.20.1.
301
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302* Add support for the Renesas RX processor.
303
a05a5b64 304* New command-line option, --compress-debug-sections, which requests
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305 compression of DWARF debug information sections in the relocatable output
306 file. Compressed debug sections are supported by readelf, objdump, and
307 gold, but not currently by Gnu ld.
308
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309Changes in 2.20:
310
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311* Added support for v850e2 and v850e2v3.
312
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NC
313* GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
314 pseudo op. It marks the symbol as being globally unique in the entire
315 process.
316
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317* ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
318 in binary rather than text.
6e33da12 319
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320* Add support for common symbol alignment to PE formats.
321
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322* Add support for the new discriminator column in the DWARF line table,
323 with a discriminator operand for the .loc directive.
324
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325* Add support for Sunplus score architecture.
326
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NC
327* The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
328 indicate that if the symbol is the target of a relocation, its value should
329 not be use. Instead the function should be invoked and its result used as
330 the value.
fa94de6b 331
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332* Add support for Lattice Mico32 (lm32) architecture.
333
fa94de6b 334* Add support for Xilinx MicroBlaze architecture.
caa03924 335
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336Changes in 2.19:
337
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338* New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
339 tables without runtime relocation.
340
a05a5b64 341* New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
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342 adds compatibility with H'00 style hex constants.
343
a05a5b64 344* New command-line option, -msse-check=[none|error|warning], for x86
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345 targets.
346
a05a5b64 347* New sub-option added to the assembler's -a command-line switch to
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348 generate a listing output. The 'g' sub-option will insert into the listing
349 various information about the assembly, such as assembler version, the
a05a5b64 350 command-line options used, and a time stamp.
83f10cb2 351
a05a5b64 352* New command-line option -msse2avx for x86 target to encode SSE
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353 instructions with VEX prefix.
354
f1f8f695 355* Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
c0f3af97 356
a05a5b64 357* New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
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358 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
359 -mnaked-reg and -mold-gcc, for x86 targets.
360
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NC
361* Support for generating wide character strings has been added via the new
362 pseudo ops: .string16, .string32 and .string64.
363
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MM
364* Support for SSE5 has been added to the i386 port.
365
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NC
366Changes in 2.18:
367
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368* The GAS sources are now released under the GPLv3.
369
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NC
370* Support for the National Semiconductor CR16 target has been added.
371
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AM
372* Added gas .reloc pseudo. This is a low-level interface for creating
373 relocations.
374
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375* Add support for x86_64 PE+ target.
376
1c0d3aa6 377* Add support for Score target.
83518699 378
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NC
379Changes in 2.17:
380
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381* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
382
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NS
383* Support for ms2 architecture has been added.
384
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NC
385* Support for the Z80 processor family has been added.
386
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MM
387* Add support for the "@<file>" syntax to the command line, so that extra
388 switches can be read from <file>.
389
a05a5b64 390* The SH target supports a new command-line switch --enable-reg-prefix which,
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391 if enabled, will allow register names to be optionally prefixed with a $
392 character. This allows register names to be distinguished from label names.
fa94de6b 393
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394* Macros with a variable number of arguments are now supported. See the
395 documentation for how this works.
396
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NC
397* Added --reduce-memory-overheads switch to reduce the size of the hash
398 tables used, at the expense of longer assembly times, and
399 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
400
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401* Macro names and macro parameter names can now be any identifier that would
402 also be legal as a symbol elsewhere. For macro parameter names, this is
403 known to cause problems in certain sources when the respective target uses
404 characters inconsistently, and thus macro parameter references may no longer
405 be recognized as such (see the documentation for details).
fa94de6b 406
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NC
407* Support the .f_floating, .d_floating, .g_floating and .h_floating directives
408 for the VAX target in order to be more compatible with the VAX MACRO
409 assembler.
410
a05a5b64 411* New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
8c2fda1d 412
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NC
413Changes in 2.16:
414
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415* Redefinition of macros now results in an error.
416
a05a5b64 417* New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
91d777ee 418
a05a5b64 419* New command-line option -munwind-check=[warning|error] for IA64
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420 targets.
421
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422* The IA64 port now uses automatic dependency violation removal as its default
423 mode.
424
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425* Port to MAXQ processor contributed by HCL Tech.
426
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NC
427* Added support for generating unwind tables for ARM ELF targets.
428
a05a5b64 429* Add a -g command-line option to generate debug information in the target's
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430 preferred debug format.
431
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432* Support for the crx-elf target added.
433
1a320fbb 434* Support for the sh-symbianelf target added.
1fe1f39c 435
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BF
436* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
437 on pe[i]-i386; required for this target's DWARF 2 support.
438
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NC
439* Support for Motorola MCF521x/5249/547x/548x added.
440
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NC
441* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
442 instrucitons.
443
a05a5b64 444* New command-line option -mno-shared for MIPS ELF targets.
aa6975fb 445
a05a5b64 446* New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
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447 added to enter (and leave) alternate macro syntax mode.
448
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NC
449Changes in 2.15:
450
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CD
451* The MIPS -membedded-pic option (Embedded-PIC code generation) is
452 deprecated and will be removed in a future release.
453
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NC
454* Added PIC m32r Linux (ELF) and support to M32R assembler.
455
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456* Added support for ARM V6.
457
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458* Added support for sh4a and variants.
459
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NC
460* Support for Renesas M32R2 added.
461
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462* Limited support for Mapping Symbols as specified in the ARM ELF
463 specification has been added to the arm assembler.
ed769ec1 464
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NC
465* On ARM architectures, added a new gas directive ".unreq" that undoes
466 definitions created by ".req".
467
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NC
468* Support for Motorola ColdFire MCF528x added.
469
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NC
470* Added --gstabs+ switch to enable the generation of STABS debug format
471 information with GNU extensions.
fa94de6b 472
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CD
473* Added support for MIPS64 Release 2.
474
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NC
475* Added support for v850e1.
476
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L
477* Added -n switch for x86 assembler. By default, x86 GAS replaces
478 multiple nop instructions used for alignment within code sections
479 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
480 switch disables the optimization.
481
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482* Removed -n option from MIPS assembler. It was not useful, and confused the
483 existing -non_shared option.
484
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CD
485Changes in 2.14:
486
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CD
487* Added support for MIPS32 Release 2.
488
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NC
489* Added support for Xtensa architecture.
490
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NC
491* Support for Intel's iWMMXt processor (an ARM variant) added.
492
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NC
493* An assembler test generator has been contributed and an example file that
494 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
fa94de6b 495
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NC
496* Support for SH2E added.
497
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NC
498* GASP has now been removed.
499
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500* Support for Texas Instruments TMS320C4x and TMS320C3x series of
501 DSP's contributed by Michael Hayes and Svein E. Seldal.
fa94de6b 502
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NC
503* Support for the Ubicom IP2xxx microcontroller added.
504
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NC
505Changes in 2.13:
506
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NC
507* Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
508 and FR500 included.
0ebb9a87 509
a40cbfa3 510* Support for DLX processor added.
52216602 511
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NC
512* GASP has now been deprecated and will be removed in a future release. Use
513 the macro facilities in GAS instead.
3f965e60 514
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NC
515* GASP now correctly parses floating point numbers. Unless the base is
516 explicitly specified, they are interpreted as decimal numbers regardless of
517 the currently specified base.
1ac57253 518
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519Changes in 2.12:
520
a40cbfa3 521* Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
49fda6c8 522
a40cbfa3 523* Support for the OpenRISC 32-bit embedded processor by OpenCores.
3b16e843 524
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525* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
526 specifying the target instruction set. The old method of specifying the
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527 target processor has been deprecated, but is still accepted for
528 compatibility.
03b1477f 529
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530* Support for the VFP floating-point instruction set has been added to
531 the ARM assembler.
252b5132 532
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533* New psuedo op: .incbin to include a set of binary data at a given point
534 in the assembly. Contributed by Anders Norlander.
7e005732 535
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536* The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
537 but still works for compatability.
ec68c924 538
fa94de6b 539* The MIPS assembler no longer issues a warning by default when it
a05a5b64 540 generates a nop instruction from a macro. The new command-line option
a40cbfa3 541 -n will turn on the warning.
63486801 542
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543Changes in 2.11:
544
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545* Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
546
a40cbfa3 547* x86 gas now supports the full Pentium4 instruction set.
a167610d 548
a40cbfa3 549* Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
c0d8940f 550
a40cbfa3 551* Support for Motorola 68HC11 and 68HC12.
df86943d 552
a40cbfa3 553* Support for Texas Instruments TMS320C54x (tic54x).
39bec121 554
a40cbfa3 555* Support for IA-64.
2dac7317 556
a40cbfa3 557* Support for i860, by Jason Eckhardt.
22b36938 558
a40cbfa3 559* Support for CRIS (Axis Communications ETRAX series).
5bcac8a4 560
a40cbfa3 561* x86 gas has a new .arch pseudo op to specify the target CPU architecture.
a38cf1db 562
a05a5b64 563* x86 gas -q command-line option quietens warnings about register size changes
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564 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
565 translating various deprecated floating point instructions.
a38cf1db 566
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567Changes in 2.10:
568
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569* Support for the ARM msr instruction was changed to only allow an immediate
570 operand when altering the flags field.
d14442f4 571
a40cbfa3 572* Support for ATMEL AVR.
adde6300 573
a40cbfa3 574* Support for IBM 370 ELF. Somewhat experimental.
b5ebe70e 575
a40cbfa3 576* Support for numbers with suffixes.
3fd9f047 577
a40cbfa3 578* Added support for breaking to the end of repeat loops.
6a6987a9 579
a40cbfa3 580* Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
6a6987a9 581
a40cbfa3 582* New .elseif pseudo-op added.
3fd9f047 583
a40cbfa3 584* New --fatal-warnings option.
1f776aa5 585
a40cbfa3 586* picoJava architecture support added.
252b5132 587
a40cbfa3 588* Motorola MCore 210 processor support added.
041dd5a9 589
fa94de6b 590* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
a40cbfa3 591 assembly programs with intel syntax.
252b5132 592
a40cbfa3 593* New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
252b5132 594
a40cbfa3 595* Added -gdwarf2 option to generate DWARF 2 debugging information.
041dd5a9 596
a40cbfa3 597* Full 16-bit mode support for i386.
252b5132 598
fa94de6b 599* Greatly improved instruction operand checking for i386. This change will
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600 produce errors or warnings on incorrect assembly code that previous versions
601 of gas accepted. If you get unexpected messages from code that worked with
602 older versions of gas, please double check the code before reporting a bug.
252b5132 603
a40cbfa3 604* Weak symbol support added for COFF targets.
252b5132 605
a40cbfa3 606* Mitsubishi D30V support added.
252b5132 607
a40cbfa3 608* Texas Instruments c80 (tms320c80) support added.
252b5132 609
a40cbfa3 610* i960 ELF support added.
bedf545c 611
a40cbfa3 612* ARM ELF support added.
a057431b 613
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614Changes in 2.9:
615
a40cbfa3 616* Texas Instruments c30 (tms320c30) support added.
252b5132 617
fa94de6b 618* The assembler now optimizes the exception frame information generated by egcs
a40cbfa3 619 and gcc 2.8. The new --traditional-format option disables this optimization.
252b5132 620
a40cbfa3 621* Added --gstabs option to generate stabs debugging information.
252b5132 622
fa94de6b 623* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
a40cbfa3 624 listing.
252b5132 625
a40cbfa3 626* Added -MD option to print dependencies.
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627
628Changes in 2.8:
629
a40cbfa3 630* BeOS support added.
252b5132 631
a40cbfa3 632* MIPS16 support added.
252b5132 633
a40cbfa3 634* Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
252b5132 635
a40cbfa3 636* Alpha/VMS support added.
252b5132 637
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638* m68k options --base-size-default-16, --base-size-default-32,
639 --disp-size-default-16, and --disp-size-default-32 added.
252b5132 640
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641* The alignment directives now take an optional third argument, which is the
642 maximum number of bytes to skip. If doing the alignment would require
643 skipping more than the given number of bytes, the alignment is not done at
644 all.
252b5132 645
a40cbfa3 646* The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
252b5132 647
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648* The -a option takes a new suboption, c (e.g., -alc), to skip false
649 conditionals in listings.
252b5132 650
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651* Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
652 the symbol is already defined.
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653
654Changes in 2.7:
655
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656* The PowerPC assembler now allows the use of symbolic register names (r0,
657 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
658 can be used any time. PowerPC 860 move to/from SPR instructions have been
659 added.
252b5132 660
a40cbfa3 661* Alpha Linux (ELF) support added.
252b5132 662
a40cbfa3 663* PowerPC ELF support added.
252b5132 664
a40cbfa3 665* m68k Linux (ELF) support added.
252b5132 666
a40cbfa3 667* i960 Hx/Jx support added.
252b5132 668
a40cbfa3 669* i386/PowerPC gnu-win32 support added.
252b5132 670
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671* SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
672 default is to build COFF-only support. To get a set of tools that generate
fa94de6b 673 ELF (they'll understand both COFF and ELF), you must configure with
a40cbfa3 674 target=i386-unknown-sco3.2v5elf.
252b5132 675
a40cbfa3 676* m88k-motorola-sysv3* support added.
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677
678Changes in 2.6:
679
a40cbfa3 680* Gas now directly supports macros, without requiring GASP.
252b5132 681
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682* Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
683 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
684 ``.mri 0'' is seen; this can be convenient for inline assembler code.
252b5132 685
a40cbfa3 686* Added --defsym SYM=VALUE option.
252b5132 687
a40cbfa3 688* Added -mips4 support to MIPS assembler.
252b5132 689
a40cbfa3 690* Added PIC support to Solaris and SPARC SunOS 4 assembler.
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691
692Changes in 2.4:
693
a40cbfa3 694* Converted this directory to use an autoconf-generated configure script.
252b5132 695
a40cbfa3 696* ARM support, from Richard Earnshaw.
252b5132 697
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698* Updated VMS support, from Pat Rankin, including considerably improved
699 debugging support.
252b5132 700
a40cbfa3 701* Support for the control registers in the 68060.
252b5132 702
a40cbfa3 703* Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
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704 provide for possible future gcc changes, for targets where gas provides some
705 features not available in the native assembler. If the native assembler is
a40cbfa3 706 used, it should become obvious pretty quickly what the problem is.
252b5132 707
a40cbfa3 708* Usage message is available with "--help".
252b5132 709
fa94de6b 710* The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
a40cbfa3 711 also, but didn't get into the NEWS file.)
252b5132 712
a40cbfa3 713* Weak symbol support for a.out.
252b5132 714
fa94de6b 715* A bug in the listing code which could cause an infinite loop has been fixed.
a40cbfa3 716 Bugs in listings when generating a COFF object file have also been fixed.
252b5132 717
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718* Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
719 Paul Kranenburg.
252b5132 720
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721* Improved Alpha support. Immediate constants can have a much larger range
722 now. Support for the 21164 has been contributed by Digital.
252b5132 723
a40cbfa3 724* Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
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725
726Changes in 2.3:
727
a40cbfa3 728* Mach i386 support, by David Mackenzie and Ken Raeburn.
252b5132 729
a40cbfa3 730* RS/6000 and PowerPC support by Ian Taylor.
252b5132 731
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732* VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
733 based on mail received from various people. The `-h#' option should work
734 again too.
252b5132 735
a40cbfa3 736* HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
fa94de6b 737 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
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738 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
739 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
740 in the "dist" directory.
252b5132 741
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742* Vax support in gas fixed for BSD, so it builds and seems to run a couple
743 simple tests okay. I haven't put it through extensive testing. (GNU make is
744 currently required for BSD 4.3 builds.)
252b5132 745
fa94de6b 746* Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
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747 based on code donated by CMU, which used an a.out-based format. I'm afraid
748 the alpha-a.out support is pretty badly mangled, and much of it removed;
749 making it work will require rewriting it as BFD support for the format anyways.
252b5132 750
a40cbfa3 751* Irix 5 support.
252b5132 752
fa94de6b 753* The test suites have been fixed up a bit, so that they should work with a
a40cbfa3 754 couple different versions of expect and dejagnu.
252b5132 755
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756* Symbols' values are now handled internally as expressions, permitting more
757 flexibility in evaluating them in some cases. Some details of relocation
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758 handling have also changed, and simple constant pool management has been
759 added, to make the Alpha port easier.
252b5132 760
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761* New option "--statistics" for printing out program run times. This is
762 intended to be used with the gcc "-Q" option, which prints out times spent in
763 various phases of compilation. (You should be able to get all of them
764 printed out with "gcc -Q -Wa,--statistics", I think.)
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765
766Changes in 2.2:
767
a40cbfa3 768* RS/6000 AIX and MIPS SGI Irix 5 support has been added.
252b5132 769
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770* Configurations that are still in development (and therefore are convenient to
771 have listed in configure.in) still get rejected without a minor change to
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772 gas/Makefile.in, so people not doing development work shouldn't get the
773 impression that support for such configurations is actually believed to be
774 reliable.
252b5132 775
fa94de6b 776* The program name (usually "as") is printed when a fatal error message is
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777 displayed. This should prevent some confusion about the source of occasional
778 messages about "internal errors".
252b5132 779
fa94de6b 780* ELF support is falling into place. Support for the 386 should be working.
a40cbfa3 781 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
252b5132 782
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783* Symbol values are maintained as expressions instead of being immediately
784 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
785 more complex calculations involving symbols whose values are not alreadey
786 known.
252b5132 787
a40cbfa3 788* DBX-style debugging info ("stabs") is now supported for COFF formats.
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789 If any stabs directives are seen in the source, GAS will create two new
790 sections: a ".stab" and a ".stabstr" section. The format of the .stab
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791 section is nearly identical to the a.out symbol format, and .stabstr is
792 its string table. For this to be useful, you must have configured GCC
793 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
794 that can use the stab sections (4.11 or later).
252b5132 795
fa94de6b 796* LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
a40cbfa3 797 support is in progress.
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798
799Changes in 2.1:
800
fa94de6b 801* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
a40cbfa3 802 incorporated, but not well tested yet.
252b5132 803
fa94de6b 804* Altered the opcode table split for m68k; it should require less VM to compile
a40cbfa3 805 with gcc now.
252b5132 806
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807* Some minor adjustments to add (Convergent Technologies') Miniframe support,
808 suggested by Ronald Cole.
252b5132 809
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810* HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
811 includes improved ELF support, which I've started adapting for SPARC Solaris
812 2.x. Integration isn't completely, so it probably won't work.
252b5132 813
a40cbfa3 814* HP9000/300 support, donated by HP, has been merged in.
252b5132 815
a40cbfa3 816* Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
252b5132 817
a40cbfa3 818* Better error messages for unsupported configurations (e.g., hppa-hpux).
252b5132 819
a40cbfa3 820* Test suite framework is starting to become reasonable.
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821
822Changes in 2.0:
823
a40cbfa3 824* Mostly bug fixes.
252b5132 825
a40cbfa3 826* Some more merging of BFD and ELF code, but ELF still doesn't work.
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827
828Changes in 1.94:
829
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830* BFD merge is partly done. Adventurous souls may try giving configure the
831 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
832 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
833 or "solaris". (ELF isn't really supported yet. It needs work. I've got
834 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
835 fully merged yet.)
252b5132 836
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837* The 68K opcode table has been split in half. It should now compile under gcc
838 without consuming ridiculous amounts of memory.
252b5132 839
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840* A couple data structures have been reduced in size. This should result in
841 saving a little bit of space at runtime.
252b5132 842
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843* Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
844 code provided ROSE format support, which I haven't merged in yet. (I can
845 make it available, if anyone wants to try it out.) Ralph's code, for BSD
846 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
847 coming.
252b5132 848
a40cbfa3 849* Support for the Hitachi H8/500 has been added.
252b5132 850
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851* VMS host and target support should be working now, thanks chiefly to Eric
852 Youngdale.
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853
854Changes in 1.93.01:
855
a40cbfa3 856* For m68k, support for more processors has been added: 68040, CPU32, 68851.
252b5132 857
a40cbfa3 858* For i386, .align is now power-of-two; was number-of-bytes.
252b5132 859
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860* For m68k, "%" is now accepted before register names. For COFF format, which
861 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
862 can be distinguished from the register.
252b5132 863
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864* Last public release was 1.38. Lots of configuration changes since then, lots
865 of new CPUs and formats, lots of bugs fixed.
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866
867\f
b3adc24a 868Copyright (C) 2012-2020 Free Software Foundation, Inc.
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869
870Copying and distribution of this file, with or without modification,
871are permitted in any medium without royalty provided the copyright
872notice and this notice are preserved.
873
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874Local variables:
875fill-column: 79
876End:
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