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841eff9e DE |
1 | /* GAS interface for targets using CGEN: Cpu tools GENerator. |
2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free Software | |
18 | Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
19 | ||
1002d8ed | 20 | #include <setjmp.h> |
841eff9e DE |
21 | #include "ansidecl.h" |
22 | #include "bfd.h" | |
23 | #include "cgen-opc.h" | |
24 | #include "as.h" | |
25 | #include "subsegs.h" | |
26 | ||
27 | /* Callback to insert a register into the symbol table. | |
28 | A target may choose to let GAS parse the registers. | |
29 | ??? Not currently used. */ | |
30 | ||
31 | void | |
32 | cgen_asm_record_register (name, number) | |
ebde3f62 NC |
33 | char * name; |
34 | int number; | |
841eff9e DE |
35 | { |
36 | /* Use symbol_create here instead of symbol_new so we don't try to | |
37 | output registers into the object file's symbol table. */ | |
38 | symbol_table_insert (symbol_create (name, reg_section, | |
ebde3f62 | 39 | number, & zero_address_frag)); |
841eff9e DE |
40 | } |
41 | ||
42 | /* We need to keep a list of fixups. We can't simply generate them as | |
43 | we go, because that would require us to first create the frag, and | |
44 | that would screw up references to ``.''. | |
45 | ||
46 | This is used by cpu's with simple operands. It keeps knowledge of what | |
47 | an `expressionS' is and what a `fixup' is out of CGEN which for the time | |
48 | being is preferable. | |
49 | ||
50 | OPINDEX is the index in the operand table. | |
51 | OPINFO is something the caller chooses to help in reloc determination. */ | |
52 | ||
53 | struct fixup | |
54 | { | |
ebde3f62 NC |
55 | int opindex; |
56 | int opinfo; | |
841eff9e DE |
57 | expressionS exp; |
58 | }; | |
59 | ||
60 | #define MAX_FIXUPS 5 | |
61 | ||
ebde3f62 NC |
62 | static struct fixup fixups [MAX_FIXUPS]; |
63 | static int num_fixups; | |
841eff9e | 64 | |
f3f00e94 DE |
65 | /* Prepare to parse an instruction. |
66 | ??? May wish to make this static and delete calls in md_assemble. */ | |
67 | ||
841eff9e DE |
68 | void |
69 | cgen_asm_init_parse () | |
70 | { | |
71 | num_fixups = 0; | |
72 | } | |
73 | ||
74 | /* Queue a fixup. */ | |
75 | ||
76 | void | |
77 | cgen_queue_fixup (opindex, opinfo, expP) | |
ebde3f62 NC |
78 | int opindex; |
79 | expressionS * expP; | |
841eff9e DE |
80 | { |
81 | /* We need to generate a fixup for this expression. */ | |
82 | if (num_fixups >= MAX_FIXUPS) | |
83 | as_fatal ("too many fixups"); | |
ebde3f62 | 84 | fixups[num_fixups].exp = * expP; |
841eff9e | 85 | fixups[num_fixups].opindex = opindex; |
ebde3f62 NC |
86 | fixups[num_fixups].opinfo = opinfo; |
87 | ++ num_fixups; | |
841eff9e DE |
88 | } |
89 | ||
90 | /* Default routine to record a fixup. | |
91 | This is a cover function to fix_new. | |
92 | It exists because we record INSN with the fixup. | |
93 | ||
94 | FRAG and WHERE are their respective arguments to fix_new_exp. | |
95 | LENGTH is in bits. | |
96 | OPINFO is something the caller chooses to help in reloc determination. | |
97 | ||
98 | At this point we do not use a bfd_reloc_code_real_type for | |
99 | operands residing in the insn, but instead just use the | |
100 | operand index. This lets us easily handle fixups for any | |
101 | operand type. We pick a BFD reloc type in md_apply_fix. */ | |
102 | ||
103 | fixS * | |
104 | cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset) | |
ebde3f62 NC |
105 | fragS * frag; |
106 | int where; | |
107 | const CGEN_INSN * insn; | |
108 | int length; | |
109 | const CGEN_OPERAND * operand; | |
110 | int opinfo; | |
111 | symbolS * symbol; | |
112 | offsetT offset; | |
841eff9e | 113 | { |
ebde3f62 | 114 | fixS * fixP; |
841eff9e DE |
115 | |
116 | /* It may seem strange to use operand->attrs and not insn->attrs here, | |
117 | but it is the operand that has a pc relative relocation. */ | |
118 | ||
119 | fixP = fix_new (frag, where, length / 8, symbol, offset, | |
120 | CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0, | |
121 | (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand))); | |
ebde3f62 | 122 | fixP->tc_fix_data.insn = (PTR) insn; |
841eff9e DE |
123 | fixP->tc_fix_data.opinfo = opinfo; |
124 | ||
125 | return fixP; | |
126 | } | |
127 | ||
128 | /* Default routine to record a fixup given an expression. | |
129 | This is a cover function to fix_new_exp. | |
130 | It exists because we record INSN with the fixup. | |
131 | ||
132 | FRAG and WHERE are their respective arguments to fix_new_exp. | |
133 | LENGTH is in bits. | |
134 | OPINFO is something the caller chooses to help in reloc determination. | |
135 | ||
136 | At this point we do not use a bfd_reloc_code_real_type for | |
137 | operands residing in the insn, but instead just use the | |
138 | operand index. This lets us easily handle fixups for any | |
139 | operand type. We pick a BFD reloc type in md_apply_fix. */ | |
140 | ||
141 | fixS * | |
142 | cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp) | |
ebde3f62 NC |
143 | fragS * frag; |
144 | int where; | |
145 | const CGEN_INSN * insn; | |
146 | int length; | |
147 | const CGEN_OPERAND * operand; | |
148 | int opinfo; | |
149 | expressionS * exp; | |
841eff9e | 150 | { |
ebde3f62 | 151 | fixS * fixP; |
841eff9e DE |
152 | |
153 | /* It may seem strange to use operand->attrs and not insn->attrs here, | |
154 | but it is the operand that has a pc relative relocation. */ | |
155 | ||
156 | fixP = fix_new_exp (frag, where, length / 8, exp, | |
157 | CGEN_OPERAND_ATTR (operand, CGEN_OPERAND_PCREL_ADDR) != 0, | |
158 | (bfd_reloc_code_real_type) ((int) BFD_RELOC_UNUSED + CGEN_OPERAND_INDEX (operand))); | |
159 | fixP->tc_fix_data.insn = (PTR) insn; | |
160 | fixP->tc_fix_data.opinfo = opinfo; | |
161 | ||
162 | return fixP; | |
163 | } | |
164 | ||
1002d8ed DE |
165 | /* Used for communication between the next two procedures. */ |
166 | static jmp_buf expr_jmp_buf; | |
167 | ||
841eff9e DE |
168 | /* Callback for cgen interface. Parse the expression at *STRP. |
169 | The result is an error message or NULL for success (in which case | |
170 | *STRP is advanced past the parsed text). | |
f3f00e94 DE |
171 | WANT is an indication of what the caller is looking for. |
172 | If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match | |
173 | a table entry with the insn, reset the queued fixups counter. | |
174 | An enum cgen_parse_operand_result is stored in RESULTP. | |
175 | OPINDEX is the operand's table entry index. | |
841eff9e DE |
176 | OPINFO is something the caller chooses to help in reloc determination. |
177 | The resulting value is stored in VALUEP. */ | |
178 | ||
179 | const char * | |
f3f00e94 | 180 | cgen_parse_operand (want, strP, opindex, opinfo, resultP, valueP) |
ebde3f62 NC |
181 | enum cgen_parse_operand_type want; |
182 | const char ** strP; | |
183 | int opindex; | |
184 | int opinfo; | |
185 | enum cgen_parse_operand_result * resultP; | |
186 | bfd_vma * valueP; | |
841eff9e | 187 | { |
1002d8ed DE |
188 | #ifdef __STDC__ |
189 | /* These is volatile to survive the setjmp. */ | |
ebde3f62 | 190 | char * volatile hold; |
1002d8ed DE |
191 | enum cgen_parse_operand_result * volatile resultP_1; |
192 | #else | |
ebde3f62 NC |
193 | static char * hold; |
194 | static enum cgen_parse_operand_result * resultP_1; | |
1002d8ed | 195 | #endif |
ebde3f62 NC |
196 | const char * errmsg = NULL; |
197 | expressionS exp; | |
841eff9e | 198 | |
f3f00e94 DE |
199 | if (want == CGEN_PARSE_OPERAND_INIT) |
200 | { | |
201 | cgen_asm_init_parse (); | |
202 | return NULL; | |
203 | } | |
204 | ||
1002d8ed | 205 | resultP_1 = resultP; |
841eff9e | 206 | hold = input_line_pointer; |
ebde3f62 | 207 | input_line_pointer = (char *) * strP; |
1002d8ed DE |
208 | |
209 | /* We rely on md_operand to longjmp back to us. | |
210 | This is done via cgen_md_operand. */ | |
211 | if (setjmp (expr_jmp_buf) != 0) | |
212 | { | |
213 | input_line_pointer = (char *) hold; | |
ebde3f62 | 214 | * resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR; |
1002d8ed DE |
215 | return "illegal operand"; |
216 | } | |
217 | ||
ebde3f62 | 218 | expression (& exp); |
1002d8ed | 219 | |
ebde3f62 | 220 | * strP = input_line_pointer; |
841eff9e DE |
221 | input_line_pointer = hold; |
222 | ||
f3f00e94 DE |
223 | /* FIXME: Need to check `want'. */ |
224 | ||
841eff9e DE |
225 | switch (exp.X_op) |
226 | { | |
227 | case O_illegal : | |
228 | errmsg = "illegal operand"; | |
ebde3f62 | 229 | * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
841eff9e DE |
230 | break; |
231 | case O_absent : | |
232 | errmsg = "missing operand"; | |
ebde3f62 | 233 | * resultP = CGEN_PARSE_OPERAND_RESULT_ERROR; |
841eff9e DE |
234 | break; |
235 | case O_constant : | |
ebde3f62 NC |
236 | * valueP = exp.X_add_number; |
237 | * resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER; | |
841eff9e DE |
238 | break; |
239 | case O_register : | |
ebde3f62 NC |
240 | * valueP = exp.X_add_number; |
241 | * resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER; | |
841eff9e DE |
242 | break; |
243 | default : | |
ebde3f62 NC |
244 | cgen_queue_fixup (opindex, opinfo, & exp); |
245 | * valueP = 0; | |
246 | * resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED; | |
841eff9e DE |
247 | break; |
248 | } | |
249 | ||
250 | return errmsg; | |
251 | } | |
252 | ||
1002d8ed DE |
253 | /* md_operand handler to catch unrecognized expressions and halt the |
254 | parsing process so the next entry can be tried. | |
255 | ||
256 | ??? This could be done differently by adding code to `expression'. */ | |
257 | ||
258 | void | |
259 | cgen_md_operand (expressionP) | |
ebde3f62 | 260 | expressionS * expressionP; |
1002d8ed DE |
261 | { |
262 | longjmp (expr_jmp_buf, 1); | |
263 | } | |
264 | ||
841eff9e DE |
265 | /* Finish assembling instruction INSN. |
266 | BUF contains what we've built up so far. | |
267 | LENGTH is the size of the insn in bits. */ | |
268 | ||
269 | void | |
270 | cgen_asm_finish_insn (insn, buf, length) | |
ebde3f62 NC |
271 | const CGEN_INSN * insn; |
272 | cgen_insn_t * buf; | |
273 | unsigned int length; | |
841eff9e | 274 | { |
ebde3f62 NC |
275 | int i; |
276 | int relax_operand; | |
277 | char * f; | |
841eff9e DE |
278 | unsigned int byte_len = length / 8; |
279 | ||
280 | /* ??? Target foo issues various warnings here, so one might want to provide | |
281 | a hook here. However, our caller is defined in tc-foo.c so there | |
282 | shouldn't be a need for a hook. */ | |
283 | ||
284 | /* Write out the instruction. | |
285 | It is important to fetch enough space in one call to `frag_more'. | |
286 | We use (f - frag_now->fr_literal) to compute where we are and we | |
287 | don't want frag_now to change between calls. | |
288 | ||
289 | Relaxable instructions: We need to ensure we allocate enough | |
290 | space for the largest insn. */ | |
291 | ||
292 | if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) | |
293 | abort (); /* These currently shouldn't get here. */ | |
294 | ||
295 | /* Is there a relaxable insn with the relaxable operand needing a fixup? */ | |
296 | ||
297 | relax_operand = -1; | |
298 | if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0) | |
299 | { | |
300 | /* Scan the fixups for the operand affected by relaxing | |
301 | (i.e. the branch address). */ | |
302 | ||
ebde3f62 | 303 | for (i = 0; i < num_fixups; ++ i) |
841eff9e DE |
304 | { |
305 | if (CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex], | |
306 | CGEN_OPERAND_RELAX) != 0) | |
307 | { | |
308 | relax_operand = i; | |
309 | break; | |
310 | } | |
311 | } | |
312 | } | |
313 | ||
314 | if (relax_operand != -1) | |
315 | { | |
ebde3f62 NC |
316 | int max_len; |
317 | fragS * old_frag; | |
841eff9e DE |
318 | |
319 | #ifdef TC_CGEN_MAX_RELAX | |
320 | max_len = TC_CGEN_MAX_RELAX (insn, byte_len); | |
321 | #else | |
322 | max_len = CGEN_MAX_INSN_SIZE; | |
323 | #endif | |
324 | /* Ensure variable part and fixed part are in same fragment. */ | |
325 | /* FIXME: Having to do this seems like a hack. */ | |
326 | frag_grow (max_len); | |
ebde3f62 | 327 | |
841eff9e DE |
328 | /* Allocate space for the fixed part. */ |
329 | f = frag_more (byte_len); | |
ebde3f62 | 330 | |
841eff9e DE |
331 | /* Create a relaxable fragment for this instruction. */ |
332 | old_frag = frag_now; | |
ebde3f62 | 333 | |
841eff9e DE |
334 | frag_var (rs_machine_dependent, |
335 | max_len - byte_len /* max chars */, | |
336 | 0 /* variable part already allocated */, | |
337 | /* FIXME: When we machine generate the relax table, | |
338 | machine generate a macro to compute subtype. */ | |
339 | 1 /* subtype */, | |
340 | fixups[relax_operand].exp.X_add_symbol, | |
341 | fixups[relax_operand].exp.X_add_number, | |
342 | f); | |
ebde3f62 | 343 | |
841eff9e DE |
344 | /* Record the operand number with the fragment so md_convert_frag |
345 | can use cgen_md_record_fixup to record the appropriate reloc. */ | |
ebde3f62 | 346 | old_frag->fr_cgen.insn = insn; |
1002d8ed | 347 | old_frag->fr_cgen.opindex = fixups[relax_operand].opindex; |
ebde3f62 | 348 | old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo; |
841eff9e DE |
349 | } |
350 | else | |
351 | f = frag_more (byte_len); | |
352 | ||
353 | /* If we're recording insns as numbers (rather than a string of bytes), | |
354 | target byte order handling is deferred until now. */ | |
355 | #if 0 /*def CGEN_INT_INSN*/ | |
356 | switch (length) | |
357 | { | |
358 | case 16: | |
359 | if (cgen_big_endian_p) | |
ebde3f62 | 360 | bfd_putb16 ((bfd_vma) * buf, f); |
841eff9e | 361 | else |
ebde3f62 | 362 | bfd_putl16 ((bfd_vma) * buf, f); |
841eff9e DE |
363 | break; |
364 | case 32: | |
365 | if (cgen_big_endian_p) | |
ebde3f62 | 366 | bfd_putb32 ((bfd_vma) * buf, f); |
841eff9e | 367 | else |
ebde3f62 | 368 | bfd_putl32 ((bfd_vma) * buf, f); |
841eff9e DE |
369 | break; |
370 | default: | |
371 | abort (); | |
372 | } | |
373 | #else | |
374 | memcpy (f, buf, byte_len); | |
375 | #endif | |
376 | ||
377 | /* Create any fixups. */ | |
378 | for (i = 0; i < num_fixups; ++i) | |
379 | { | |
380 | /* Don't create fixups for these. That's done during relaxation. | |
381 | We don't need to test for CGEN_INSN_RELAX as they can't get here | |
382 | (see above). */ | |
383 | if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0 | |
384 | && CGEN_OPERAND_ATTR (& CGEN_SYM (operand_table) [fixups[i].opindex], | |
385 | CGEN_OPERAND_RELAX) != 0) | |
386 | continue; | |
387 | ||
388 | #ifndef md_cgen_record_fixup_exp | |
389 | #define md_cgen_record_fixup_exp cgen_record_fixup_exp | |
390 | #endif | |
391 | ||
392 | md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal, | |
393 | insn, length, | |
394 | & CGEN_SYM (operand_table) [fixups[i].opindex], | |
395 | fixups[i].opinfo, | |
ebde3f62 | 396 | & fixups[i].exp); |
841eff9e DE |
397 | } |
398 | } | |
399 | ||
400 | /* Apply a fixup to the object code. This is called for all the | |
401 | fixups we generated by the call to fix_new_exp, above. In the call | |
402 | above we used a reloc code which was the largest legal reloc code | |
403 | plus the operand index. Here we undo that to recover the operand | |
404 | index. At this point all symbol values should be fully resolved, | |
405 | and we attempt to completely resolve the reloc. If we can not do | |
406 | that, we determine the correct reloc code and put it back in the fixup. */ | |
407 | ||
408 | /* FIXME: This function handles some of the fixups and bfd_install_relocation | |
409 | handles the rest. bfd_install_relocation (or some other bfd function) | |
410 | should handle them all. */ | |
411 | ||
412 | int | |
413 | cgen_md_apply_fix3 (fixP, valueP, seg) | |
ebde3f62 NC |
414 | fixS * fixP; |
415 | valueT * valueP; | |
416 | segT seg; | |
841eff9e | 417 | { |
ebde3f62 NC |
418 | char * where = fixP->fx_frag->fr_literal + fixP->fx_where; |
419 | valueT value; | |
841eff9e DE |
420 | |
421 | /* FIXME FIXME FIXME: The value we are passed in *valuep includes | |
422 | the symbol values. Since we are using BFD_ASSEMBLER, if we are | |
423 | doing this relocation the code in write.c is going to call | |
424 | bfd_install_relocation, which is also going to use the symbol | |
425 | value. That means that if the reloc is fully resolved we want to | |
426 | use *valuep since bfd_install_relocation is not being used. | |
427 | However, if the reloc is not fully resolved we do not want to use | |
428 | *valuep, and must use fx_offset instead. However, if the reloc | |
429 | is PC relative, we do want to use *valuep since it includes the | |
430 | result of md_pcrel_from. This is confusing. */ | |
431 | ||
432 | if (fixP->fx_addsy == (symbolS *) NULL) | |
433 | { | |
ebde3f62 | 434 | value = * valueP; |
841eff9e DE |
435 | fixP->fx_done = 1; |
436 | } | |
437 | else if (fixP->fx_pcrel) | |
ebde3f62 | 438 | value = * valueP; |
841eff9e DE |
439 | else |
440 | { | |
441 | value = fixP->fx_offset; | |
442 | if (fixP->fx_subsy != (symbolS *) NULL) | |
443 | { | |
444 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) | |
445 | value -= S_GET_VALUE (fixP->fx_subsy); | |
446 | else | |
447 | { | |
448 | /* We don't actually support subtracting a symbol. */ | |
449 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
450 | "expression too complex"); | |
451 | } | |
452 | } | |
453 | } | |
454 | ||
455 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) | |
456 | { | |
ebde3f62 NC |
457 | int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
458 | const CGEN_OPERAND * operand = & CGEN_SYM (operand_table) [opindex]; | |
459 | const char * errmsg; | |
841eff9e | 460 | bfd_reloc_code_real_type reloc_type; |
ebde3f62 NC |
461 | CGEN_FIELDS fields; |
462 | const CGEN_INSN * insn = (CGEN_INSN *) fixP->tc_fix_data.insn; | |
841eff9e DE |
463 | |
464 | /* If the reloc has been fully resolved finish the operand here. */ | |
465 | /* FIXME: This duplicates the capabilities of code in BFD. */ | |
466 | if (fixP->fx_done | |
467 | /* FIXME: If partial_inplace isn't set bfd_install_relocation won't | |
468 | finish the job. Testing for pcrel is a temporary hack. */ | |
469 | || fixP->fx_pcrel) | |
470 | { | |
471 | /* This may seem like overkill, and using bfd_install_relocation or | |
472 | some such may be preferable, but this is simple. */ | |
ebde3f62 NC |
473 | CGEN_FIELDS_BITSIZE (& fields) = CGEN_INSN_BITSIZE (insn); |
474 | CGEN_SYM (set_operand) (opindex, & value, & fields); | |
475 | errmsg = CGEN_SYM (validate_operand) (opindex, & fields); | |
841eff9e DE |
476 | if (errmsg) |
477 | as_warn_where (fixP->fx_file, fixP->fx_line, "%s\n", errmsg); | |
ebde3f62 | 478 | CGEN_SYM (insert_operand) (opindex, & fields, where); |
841eff9e DE |
479 | } |
480 | ||
481 | if (fixP->fx_done) | |
482 | return 1; | |
483 | ||
484 | /* The operand isn't fully resolved. Determine a BFD reloc value | |
485 | based on the operand information and leave it to | |
486 | bfd_install_relocation. Note that this doesn't work when | |
487 | partial_inplace == false. */ | |
488 | ||
489 | reloc_type = CGEN_SYM (lookup_reloc) (insn, operand, fixP); | |
490 | if (reloc_type != BFD_RELOC_NONE) | |
491 | { | |
492 | fixP->fx_r_type = reloc_type; | |
493 | } | |
494 | else | |
495 | { | |
496 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
497 | "unresolved expression that must be resolved"); | |
498 | fixP->fx_done = 1; | |
499 | return 1; | |
500 | } | |
501 | } | |
502 | else if (fixP->fx_done) | |
503 | { | |
504 | /* We're finished with this fixup. Install it because | |
505 | bfd_install_relocation won't be called to do it. */ | |
506 | switch (fixP->fx_r_type) | |
507 | { | |
508 | case BFD_RELOC_8: | |
509 | md_number_to_chars (where, value, 1); | |
510 | break; | |
511 | case BFD_RELOC_16: | |
512 | md_number_to_chars (where, value, 2); | |
513 | break; | |
514 | case BFD_RELOC_32: | |
515 | md_number_to_chars (where, value, 4); | |
516 | break; | |
517 | /* FIXME: later add support for 64 bits. */ | |
518 | default: | |
519 | abort (); | |
520 | } | |
521 | } | |
522 | else | |
523 | { | |
524 | /* bfd_install_relocation will be called to finish things up. */ | |
525 | } | |
526 | ||
527 | /* Tuck `value' away for use by tc_gen_reloc. | |
528 | See the comment describing fx_addnumber in write.h. | |
529 | This field is misnamed (or misused :-). */ | |
530 | fixP->fx_addnumber = value; | |
531 | ||
532 | return 1; | |
533 | } | |
534 | ||
535 | /* Translate internal representation of relocation info to BFD target format. | |
536 | ||
537 | FIXME: To what extent can we get all relevant targets to use this? */ | |
538 | ||
539 | arelent * | |
540 | cgen_tc_gen_reloc (section, fixP) | |
ebde3f62 NC |
541 | asection * section; |
542 | fixS * fixP; | |
841eff9e | 543 | { |
ebde3f62 | 544 | arelent * reloc; |
841eff9e | 545 | |
1002d8ed | 546 | reloc = (arelent *) bfd_alloc (stdoutput, sizeof (arelent)); |
841eff9e DE |
547 | |
548 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
549 | if (reloc->howto == (reloc_howto_type *) NULL) | |
550 | { | |
551 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
552 | "internal error: can't export reloc type %d (`%s')", | |
553 | fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type)); | |
554 | return NULL; | |
555 | } | |
556 | ||
557 | assert (!fixP->fx_pcrel == !reloc->howto->pc_relative); | |
558 | ||
ebde3f62 NC |
559 | reloc->sym_ptr_ptr = & fixP->fx_addsy->bsym; |
560 | reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; | |
561 | reloc->addend = fixP->fx_addnumber; | |
841eff9e DE |
562 | |
563 | return reloc; | |
564 | } |