Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
5ac34ac3 | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
a2a5a4fa | 18 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
030915dc | 24 | #include <ctype.h> |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
fecd2382 RP |
35 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ |
36 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
37 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
38 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
39 | ||
40 | /* handle of the OPCODE hash table */ | |
41 | static struct hash_control *op_hash = NULL; | |
42 | ||
355afbcd KR |
43 | struct machine_it |
44 | { | |
45 | char *error; | |
46 | unsigned long opcode; | |
47 | struct nlist *nlistp; | |
48 | expressionS exp; | |
49 | int pcrel; | |
50 | int reloc_offset; /* Offset of reloc within insn */ | |
51 | ||
52 | int reloc; | |
355afbcd | 53 | } |
355afbcd | 54 | the_insn; |
fecd2382 | 55 | |
a938b1d6 ILT |
56 | static void machine_ip PARAMS ((char *str)); |
57 | /* static void print_insn PARAMS ((struct machine_it *insn)); */ | |
604633ae | 58 | #ifndef OBJ_COFF |
a938b1d6 | 59 | static void s_data1 PARAMS ((void)); |
604633ae ILT |
60 | static void s_use PARAMS ((int)); |
61 | #endif | |
fecd2382 RP |
62 | |
63 | const pseudo_typeS | |
9956df6a | 64 | md_pseudo_table[] = |
355afbcd KR |
65 | { |
66 | {"align", s_align_bytes, 4}, | |
67 | {"block", s_space, 0}, | |
68 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
69 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
70 | {"space", s_ignore, 0}, /* Listing control */ | |
71 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 72 | #ifndef OBJ_COFF |
9956df6a | 73 | /* We can do this right with coff. */ |
355afbcd | 74 | {"use", s_use, 0}, |
c58dbabf | 75 | #endif |
355afbcd KR |
76 | {"word", cons, 4}, |
77 | {NULL, 0, 0}, | |
78 | }; | |
fecd2382 RP |
79 | |
80 | int md_short_jump_size = 4; | |
81 | int md_long_jump_size = 4; | |
57574979 SC |
82 | #if defined(BFD_HEADERS) |
83 | #ifdef RELSZ | |
49864cfa | 84 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 85 | #else |
49864cfa | 86 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
87 | #endif |
88 | #else | |
49864cfa | 89 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 90 | #endif |
fecd2382 RP |
91 | |
92 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 93 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 94 | const char comment_chars[] = ";"; |
fecd2382 RP |
95 | |
96 | /* This array holds the chars that only start a comment at the beginning of | |
97 | a line. If the line seems to have the form '# 123 filename' | |
98 | .line and .file directives will appear in the pre-processed output */ | |
99 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
100 | first line of the input file. This is because the compiler outputs | |
101 | #NO_APP at the beginning of its output. */ | |
102 | /* Also note that comments like this one will always work */ | |
587c4264 | 103 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
104 | |
105 | /* We needed an unused char for line separation to work around the | |
106 | lack of macros, using sed and such. */ | |
1f264bd5 | 107 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
108 | |
109 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 110 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
111 | |
112 | /* Chars that mean this number is a floating point constant */ | |
113 | /* As in 0f12.456 */ | |
114 | /* or 0d1.2345e12 */ | |
587c4264 | 115 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
116 | |
117 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9956df6a KR |
118 | changed in read.c. Ideally it shouldn't have to know about it at |
119 | all, but nothing is ideal around here. */ | |
fecd2382 | 120 | |
fecd2382 | 121 | /* |
355afbcd | 122 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
123 | */ |
124 | #define ANNUL (1 << 29) | |
125 | ||
604633ae ILT |
126 | #ifndef OBJ_COFF |
127 | ||
fecd2382 | 128 | static void |
604633ae ILT |
129 | s_use (ignore) |
130 | int ignore; | |
fecd2382 | 131 | { |
355afbcd KR |
132 | if (strncmp (input_line_pointer, ".text", 5) == 0) |
133 | { | |
134 | input_line_pointer += 5; | |
a938b1d6 | 135 | s_text (0); |
355afbcd KR |
136 | return; |
137 | } | |
138 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
139 | { | |
140 | input_line_pointer += 5; | |
a938b1d6 | 141 | s_data (0); |
355afbcd KR |
142 | return; |
143 | } | |
144 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
145 | { | |
146 | input_line_pointer += 6; | |
147 | s_data1 (); | |
148 | return; | |
149 | } | |
9956df6a KR |
150 | /* Literals can't go in the text segment because you can't read from |
151 | instruction memory on some 29k's. So, into initialized data. */ | |
355afbcd KR |
152 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
153 | { | |
154 | input_line_pointer += 4; | |
604633ae | 155 | subseg_set (SEG_DATA, 200); |
355afbcd KR |
156 | demand_empty_rest_of_line (); |
157 | return; | |
158 | } | |
159 | ||
160 | as_bad ("Unknown segment type"); | |
161 | demand_empty_rest_of_line (); | |
fecd2382 RP |
162 | } |
163 | ||
164 | static void | |
355afbcd | 165 | s_data1 () |
fecd2382 | 166 | { |
604633ae | 167 | subseg_set (SEG_DATA, 1); |
355afbcd | 168 | demand_empty_rest_of_line (); |
fecd2382 RP |
169 | } |
170 | ||
604633ae ILT |
171 | #endif /* OBJ_COFF */ |
172 | ||
fecd2382 RP |
173 | /* Install symbol definition that maps REGNAME to REGNO. |
174 | FIXME-SOON: These are not recognized in mixed case. */ | |
175 | ||
176 | static void | |
355afbcd KR |
177 | insert_sreg (regname, regnum) |
178 | char *regname; | |
179 | int regnum; | |
fecd2382 | 180 | { |
9956df6a KR |
181 | /* FIXME-SOON, put something in these syms so they won't be output |
182 | to the symbol table of the resulting object file. */ | |
355afbcd KR |
183 | |
184 | /* Must be large enough to hold the names of the special registers. */ | |
185 | char buf[80]; | |
186 | int i; | |
187 | ||
4f0bccc7 ILT |
188 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, |
189 | &zero_address_frag)); | |
355afbcd KR |
190 | for (i = 0; regname[i]; i++) |
191 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
192 | buf[i] = '\0'; | |
193 | ||
4f0bccc7 ILT |
194 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, |
195 | &zero_address_frag)); | |
9956df6a | 196 | } |
fecd2382 RP |
197 | |
198 | /* Install symbol definitions for assorted special registers. | |
199 | See ASM29K Ref page 2-9. */ | |
200 | ||
355afbcd KR |
201 | void |
202 | define_some_regs () | |
203 | { | |
fecd2382 | 204 | #define SREG 256 |
355afbcd KR |
205 | |
206 | /* Protected special-purpose register names */ | |
207 | insert_sreg ("vab", SREG + 0); | |
208 | insert_sreg ("ops", SREG + 1); | |
209 | insert_sreg ("cps", SREG + 2); | |
210 | insert_sreg ("cfg", SREG + 3); | |
211 | insert_sreg ("cha", SREG + 4); | |
212 | insert_sreg ("chd", SREG + 5); | |
213 | insert_sreg ("chc", SREG + 6); | |
214 | insert_sreg ("rbp", SREG + 7); | |
215 | insert_sreg ("tmc", SREG + 8); | |
216 | insert_sreg ("tmr", SREG + 9); | |
217 | insert_sreg ("pc0", SREG + 10); | |
218 | insert_sreg ("pc1", SREG + 11); | |
219 | insert_sreg ("pc2", SREG + 12); | |
220 | insert_sreg ("mmu", SREG + 13); | |
221 | insert_sreg ("lru", SREG + 14); | |
222 | ||
d6f72574 KR |
223 | /* Additional protected special-purpose registers for the 29050 */ |
224 | insert_sreg ("rsn", SREG + 15); | |
225 | insert_sreg ("rma0", SREG + 16); | |
226 | insert_sreg ("rmc0", SREG + 17); | |
227 | insert_sreg ("rma1", SREG + 18); | |
228 | insert_sreg ("rmc1", SREG + 19); | |
229 | insert_sreg ("spc0", SREG + 20); | |
230 | insert_sreg ("spc1", SREG + 21); | |
231 | insert_sreg ("spc2", SREG + 22); | |
232 | insert_sreg ("iba0", SREG + 23); | |
233 | insert_sreg ("ibc0", SREG + 24); | |
234 | insert_sreg ("iba1", SREG + 25); | |
235 | insert_sreg ("ibc1", SREG + 26); | |
236 | ||
030915dc ILT |
237 | /* Additional registers for the 29040. */ |
238 | insert_sreg ("dba", SREG + 27); | |
239 | insert_sreg ("dbc", SREG + 28); | |
240 | insert_sreg ("cir", SREG + 29); | |
241 | insert_sreg ("cdr", SREG + 30); | |
242 | ||
355afbcd KR |
243 | /* Unprotected special-purpose register names */ |
244 | insert_sreg ("ipc", SREG + 128); | |
245 | insert_sreg ("ipa", SREG + 129); | |
246 | insert_sreg ("ipb", SREG + 130); | |
247 | insert_sreg ("q", SREG + 131); | |
248 | insert_sreg ("alu", SREG + 132); | |
249 | insert_sreg ("bp", SREG + 133); | |
250 | insert_sreg ("fc", SREG + 134); | |
251 | insert_sreg ("cr", SREG + 135); | |
252 | insert_sreg ("fpe", SREG + 160); | |
253 | insert_sreg ("inte", SREG + 161); | |
254 | insert_sreg ("fps", SREG + 162); | |
255 | /* "", SREG+163); Reserved */ | |
256 | insert_sreg ("exop", SREG + 164); | |
9956df6a | 257 | } |
fecd2382 RP |
258 | |
259 | /* This function is called once, at assembler startup time. It should | |
9956df6a KR |
260 | set up all the tables, etc., that the MD part of the assembler will |
261 | need. */ | |
fecd2382 | 262 | void |
355afbcd | 263 | md_begin () |
fecd2382 | 264 | { |
604633ae | 265 | register const char *retval = NULL; |
355afbcd KR |
266 | int lose = 0; |
267 | register int skipnext = 0; | |
268 | register unsigned int i; | |
269 | register char *strend, *strend2; | |
270 | ||
271 | /* Hash up all the opcodes for fast use later. */ | |
272 | ||
273 | op_hash = hash_new (); | |
355afbcd KR |
274 | |
275 | for (i = 0; i < num_opcodes; i++) | |
276 | { | |
277 | const char *name = machine_opcodes[i].name; | |
278 | ||
279 | if (skipnext) | |
280 | { | |
281 | skipnext = 0; | |
282 | continue; | |
283 | } | |
284 | ||
285 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
9956df6a | 286 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
287 | |
288 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
289 | { | |
6121fb06 ILT |
290 | if ((machine_opcodes[i].opcode & 0x01000000) != 0 |
291 | || (machine_opcodes[i + 1].opcode & 0x01000000) == 0 | |
292 | || ((machine_opcodes[i].opcode | 0x01000000) | |
293 | != machine_opcodes[i + 1].opcode)) | |
355afbcd KR |
294 | goto bad_table; |
295 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
296 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
297 | switch (*strend) | |
298 | { | |
299 | case 'b': | |
300 | if (*strend2 != 'i') | |
301 | goto bad_table; | |
302 | break; | |
355afbcd KR |
303 | case 'P': |
304 | if (*strend2 != 'A') | |
305 | goto bad_table; | |
306 | break; | |
355afbcd KR |
307 | default: |
308 | bad_table: | |
9956df6a KR |
309 | fprintf (stderr, "internal error: can't handle opcode %s\n", |
310 | name); | |
355afbcd | 311 | lose = 1; |
a39116f1 | 312 | } |
355afbcd | 313 | |
9956df6a KR |
314 | /* OK, this is an i/b or A/P pair. We skip the |
315 | higher-valued one, and let the code for operand checking | |
316 | handle OR-ing in the bit. */ | |
6121fb06 | 317 | skipnext = 1; |
355afbcd KR |
318 | } |
319 | ||
604633ae | 320 | retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]); |
43029a8f | 321 | if (retval != NULL) |
355afbcd KR |
322 | { |
323 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
324 | machine_opcodes[i].name, retval); | |
325 | lose = 1; | |
326 | } | |
327 | } | |
328 | ||
329 | if (lose) | |
330 | as_fatal ("Broken assembler. No assembly attempted."); | |
331 | ||
355afbcd | 332 | define_some_regs (); |
fecd2382 RP |
333 | } |
334 | ||
fecd2382 RP |
335 | /* Assemble a single instruction. Its label has already been handled |
336 | by the generic front end. We just parse opcode and operands, and | |
337 | produce the bytes of data and relocation. */ | |
338 | ||
355afbcd KR |
339 | void |
340 | md_assemble (str) | |
341 | char *str; | |
fecd2382 | 342 | { |
355afbcd | 343 | char *toP; |
355afbcd KR |
344 | |
345 | know (str); | |
346 | machine_ip (str); | |
347 | toP = frag_more (4); | |
348 | /* put out the opcode */ | |
349 | md_number_to_chars (toP, the_insn.opcode, 4); | |
350 | ||
351 | /* put out the symbol-dependent stuff */ | |
352 | if (the_insn.reloc != NO_RELOC) | |
353 | { | |
5ac34ac3 ILT |
354 | fix_new_exp (frag_now, |
355 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
356 | 4, /* size */ | |
357 | &the_insn.exp, | |
358 | the_insn.pcrel, | |
359 | the_insn.reloc); | |
355afbcd | 360 | } |
fecd2382 RP |
361 | } |
362 | ||
363 | char * | |
030915dc | 364 | parse_operand (s, operandp, opt) |
355afbcd KR |
365 | char *s; |
366 | expressionS *operandp; | |
030915dc | 367 | int opt; |
fecd2382 | 368 | { |
c58dbabf SC |
369 | char *save = input_line_pointer; |
370 | char *new; | |
355afbcd | 371 | |
c58dbabf | 372 | input_line_pointer = s; |
283dba4b | 373 | expression (operandp); |
030915dc | 374 | if (operandp->X_op == O_absent && ! opt) |
5ac34ac3 | 375 | as_bad ("missing operand"); |
c58dbabf SC |
376 | new = input_line_pointer; |
377 | input_line_pointer = save; | |
c58dbabf | 378 | return new; |
fecd2382 RP |
379 | } |
380 | ||
355afbcd | 381 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
382 | Operands are at input_line_pointer. Output is in the_insn. |
383 | Warnings or errors are generated. */ | |
a39116f1 | 384 | |
fecd2382 | 385 | static void |
355afbcd KR |
386 | machine_ip (str) |
387 | char *str; | |
fecd2382 | 388 | { |
355afbcd KR |
389 | char *s; |
390 | const char *args; | |
355afbcd KR |
391 | struct machine_opcode *insn; |
392 | char *argsStart; | |
393 | unsigned long opcode; | |
355afbcd KR |
394 | expressionS the_operand; |
395 | expressionS *operand = &the_operand; | |
396 | unsigned int reg; | |
397 | ||
398 | /* Must handle `div0' opcode. */ | |
399 | s = str; | |
400 | if (isalpha (*s)) | |
401 | for (; isalnum (*s); ++s) | |
402 | if (isupper (*s)) | |
403 | *s = tolower (*s); | |
404 | ||
405 | switch (*s) | |
406 | { | |
407 | case '\0': | |
408 | break; | |
409 | ||
410 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
411 | *s++ = '\0'; | |
412 | break; | |
413 | ||
414 | default: | |
415 | as_bad ("Unknown opcode: `%s'", str); | |
416 | return; | |
417 | } | |
418 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
419 | { | |
420 | as_bad ("Unknown opcode `%s'.", str); | |
421 | return; | |
422 | } | |
423 | argsStart = s; | |
424 | opcode = insn->opcode; | |
425 | memset (&the_insn, '\0', sizeof (the_insn)); | |
426 | the_insn.reloc = NO_RELOC; | |
427 | ||
9956df6a KR |
428 | /* Build the opcode, checking as we go to make sure that the |
429 | operands match. | |
430 | ||
431 | If an operand matches, we modify the_insn or opcode appropriately, | |
432 | and do a "continue". If an operand fails to match, we "break". */ | |
433 | ||
355afbcd | 434 | if (insn->args[0] != '\0') |
030915dc ILT |
435 | { |
436 | /* Prime the pump. */ | |
437 | s = parse_operand (s, operand, insn->args[0] == 'I'); | |
438 | } | |
355afbcd KR |
439 | |
440 | for (args = insn->args;; ++args) | |
441 | { | |
442 | switch (*args) | |
443 | { | |
444 | ||
445 | case '\0': /* end of args */ | |
446 | if (*s == '\0') | |
447 | { | |
448 | /* We are truly done. */ | |
449 | the_insn.opcode = opcode; | |
450 | return; | |
451 | } | |
452 | as_bad ("Too many operands: %s", s); | |
453 | break; | |
454 | ||
455 | case ',': /* Must match a comma */ | |
456 | if (*s++ == ',') | |
457 | { | |
030915dc ILT |
458 | /* Parse next operand. */ |
459 | s = parse_operand (s, operand, args[1] == 'I'); | |
355afbcd KR |
460 | continue; |
461 | } | |
462 | break; | |
463 | ||
464 | case 'v': /* Trap numbers (immediate field) */ | |
5ac34ac3 | 465 | if (operand->X_op == O_constant) |
355afbcd KR |
466 | { |
467 | if (operand->X_add_number < 256) | |
468 | { | |
469 | opcode |= (operand->X_add_number << 16); | |
470 | continue; | |
471 | } | |
472 | else | |
473 | { | |
604633ae ILT |
474 | as_bad ("Immediate value of %ld is too large", |
475 | (long) operand->X_add_number); | |
355afbcd KR |
476 | continue; |
477 | } | |
478 | } | |
479 | the_insn.reloc = RELOC_8; | |
480 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
481 | the_insn.exp = *operand; | |
482 | continue; | |
483 | ||
484 | case 'b': /* A general register or 8-bit immediate */ | |
485 | case 'i': | |
486 | /* We treat the two cases identically since we mashed | |
9956df6a | 487 | them together in the opcode table. */ |
5ac34ac3 | 488 | if (operand->X_op == O_register) |
355afbcd KR |
489 | goto general_reg; |
490 | ||
6121fb06 ILT |
491 | /* Make sure the 'i' case really exists. */ |
492 | if ((insn->opcode | IMMEDIATE_BIT) != (insn + 1)->opcode) | |
493 | break; | |
494 | ||
355afbcd | 495 | opcode |= IMMEDIATE_BIT; |
5ac34ac3 | 496 | if (operand->X_op == O_constant) |
355afbcd KR |
497 | { |
498 | if (operand->X_add_number < 256) | |
499 | { | |
500 | opcode |= operand->X_add_number; | |
501 | continue; | |
502 | } | |
503 | else | |
504 | { | |
604633ae ILT |
505 | as_bad ("Immediate value of %ld is too large", |
506 | (long) operand->X_add_number); | |
355afbcd KR |
507 | continue; |
508 | } | |
509 | } | |
510 | the_insn.reloc = RELOC_8; | |
511 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
512 | the_insn.exp = *operand; | |
513 | continue; | |
514 | ||
515 | case 'a': /* next operand must be a register */ | |
516 | case 'c': | |
517 | general_reg: | |
518 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
5ac34ac3 | 519 | if (operand->X_op != O_register) |
355afbcd KR |
520 | break; /* Only registers */ |
521 | know (operand->X_add_symbol == 0); | |
5ac34ac3 | 522 | know (operand->X_op_symbol == 0); |
355afbcd KR |
523 | reg = operand->X_add_number; |
524 | if (reg >= SREG) | |
525 | break; /* No special registers */ | |
526 | ||
9956df6a KR |
527 | /* Got the register, now figure out where it goes in the |
528 | opcode. */ | |
355afbcd KR |
529 | switch (*args) |
530 | { | |
531 | case 'a': | |
532 | opcode |= reg << 8; | |
533 | continue; | |
534 | ||
535 | case 'b': | |
536 | case 'i': | |
537 | opcode |= reg; | |
538 | continue; | |
539 | ||
540 | case 'c': | |
541 | opcode |= reg << 16; | |
542 | continue; | |
543 | } | |
544 | as_fatal ("failed sanity check."); | |
545 | break; | |
546 | ||
547 | case 'x': /* 16 bit constant, zero-extended */ | |
548 | case 'X': /* 16 bit constant, one-extended */ | |
5ac34ac3 | 549 | if (operand->X_op == O_constant) |
355afbcd KR |
550 | { |
551 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
552 | ((operand->X_add_number & 0xFF00) << 8); | |
553 | continue; | |
554 | } | |
555 | the_insn.reloc = RELOC_CONST; | |
556 | the_insn.exp = *operand; | |
557 | continue; | |
558 | ||
559 | case 'h': | |
5ac34ac3 | 560 | if (operand->X_op == O_constant) |
355afbcd KR |
561 | { |
562 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
563 | (((unsigned long) operand->X_add_number | |
564 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
565 | continue; | |
566 | } | |
567 | the_insn.reloc = RELOC_CONSTH; | |
568 | the_insn.exp = *operand; | |
569 | continue; | |
570 | ||
571 | case 'P': /* PC-relative jump address */ | |
572 | case 'A': /* Absolute jump address */ | |
573 | /* These two are treated together since we folded the | |
5ac34ac3 ILT |
574 | opcode table entries together. */ |
575 | if (operand->X_op == O_constant) | |
355afbcd | 576 | { |
6121fb06 ILT |
577 | /* Make sure the 'A' case really exists. */ |
578 | if ((insn->opcode | ABSOLUTE_BIT) != (insn + 1)->opcode) | |
579 | break; | |
f4c01c95 KR |
580 | { |
581 | bfd_vma v, mask; | |
582 | mask = 0x1ffff; | |
583 | v = operand->X_add_number & ~ mask; | |
584 | if (v) | |
585 | as_bad ("call/jmp target out of range"); | |
586 | } | |
355afbcd KR |
587 | opcode |= ABSOLUTE_BIT | |
588 | (operand->X_add_number & 0x0003FC00) << 6 | | |
589 | ((operand->X_add_number & 0x000003FC) >> 2); | |
590 | continue; | |
591 | } | |
592 | the_insn.reloc = RELOC_JUMPTARG; | |
593 | the_insn.exp = *operand; | |
594 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
9956df6a KR |
595 | /* FIXME-SOON, Do we figure out whether abs later, after |
596 | know sym val? */ | |
355afbcd KR |
597 | continue; |
598 | ||
599 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
5ac34ac3 | 600 | if (operand->X_op == O_constant) |
355afbcd KR |
601 | { |
602 | if (operand->X_add_number == 0) | |
603 | continue; | |
604 | if (operand->X_add_number == 1) | |
605 | { | |
606 | opcode |= CE_BIT; | |
607 | continue; | |
fecd2382 | 608 | } |
355afbcd KR |
609 | } |
610 | break; | |
611 | ||
612 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
5ac34ac3 | 613 | if (operand->X_op == O_constant && |
355afbcd KR |
614 | operand->X_add_number < 128) |
615 | { | |
616 | opcode |= (operand->X_add_number << 16); | |
617 | continue; | |
618 | } | |
619 | break; | |
620 | ||
621 | case 's': /* Special register number */ | |
5ac34ac3 | 622 | if (operand->X_op != O_register) |
355afbcd KR |
623 | break; /* Only registers */ |
624 | if (operand->X_add_number < SREG) | |
625 | break; /* Not a special register */ | |
626 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
627 | continue; | |
628 | ||
629 | case 'u': /* UI bit of CONVERT */ | |
5ac34ac3 | 630 | if (operand->X_op == O_constant) |
355afbcd KR |
631 | { |
632 | if (operand->X_add_number == 0) | |
633 | continue; | |
634 | if (operand->X_add_number == 1) | |
635 | { | |
636 | opcode |= UI_BIT; | |
637 | continue; | |
638 | } | |
639 | } | |
640 | break; | |
641 | ||
642 | case 'r': /* RND bits of CONVERT */ | |
5ac34ac3 | 643 | if (operand->X_op == O_constant && |
355afbcd KR |
644 | operand->X_add_number < 8) |
645 | { | |
646 | opcode |= operand->X_add_number << 4; | |
647 | continue; | |
648 | } | |
649 | break; | |
650 | ||
030915dc ILT |
651 | case 'I': /* ID bits of INV and IRETINV. */ |
652 | /* This operand is optional. */ | |
653 | if (operand->X_op == O_absent) | |
654 | continue; | |
655 | else if (operand->X_op == O_constant | |
656 | && operand->X_add_number < 4) | |
657 | { | |
658 | opcode |= operand->X_add_number << 16; | |
659 | continue; | |
660 | } | |
661 | break; | |
662 | ||
355afbcd | 663 | case 'd': /* FD bits of CONVERT */ |
5ac34ac3 | 664 | if (operand->X_op == O_constant && |
355afbcd KR |
665 | operand->X_add_number < 4) |
666 | { | |
667 | opcode |= operand->X_add_number << 2; | |
668 | continue; | |
669 | } | |
670 | break; | |
671 | ||
672 | ||
673 | case 'f': /* FS bits of CONVERT */ | |
5ac34ac3 | 674 | if (operand->X_op == O_constant && |
355afbcd KR |
675 | operand->X_add_number < 4) |
676 | { | |
677 | opcode |= operand->X_add_number << 0; | |
678 | continue; | |
679 | } | |
680 | break; | |
681 | ||
682 | case 'C': | |
5ac34ac3 | 683 | if (operand->X_op == O_constant && |
355afbcd KR |
684 | operand->X_add_number < 4) |
685 | { | |
686 | opcode |= operand->X_add_number << 16; | |
687 | continue; | |
688 | } | |
689 | break; | |
690 | ||
691 | case 'F': | |
5ac34ac3 | 692 | if (operand->X_op == O_constant && |
355afbcd KR |
693 | operand->X_add_number < 16) |
694 | { | |
695 | opcode |= operand->X_add_number << 18; | |
696 | continue; | |
697 | } | |
698 | break; | |
699 | ||
700 | default: | |
701 | BAD_CASE (*args); | |
fecd2382 | 702 | } |
355afbcd KR |
703 | /* Types or values of args don't match. */ |
704 | as_bad ("Invalid operands"); | |
705 | return; | |
706 | } | |
fecd2382 RP |
707 | } |
708 | ||
9956df6a KR |
709 | /* This is identical to the md_atof in m68k.c. I think this is right, |
710 | but I'm not sure. | |
355afbcd | 711 | |
9956df6a KR |
712 | Turn a string in input_line_pointer into a floating point constant |
713 | of type type, and store the appropriate bytes in *litP. The number | |
714 | of LITTLENUMS emitted is stored in *sizeP . An error message is | |
715 | returned, or NULL on OK. */ | |
fecd2382 RP |
716 | |
717 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
718 | #define MAX_LITTLENUMS 6 | |
719 | ||
720 | char * | |
355afbcd KR |
721 | md_atof (type, litP, sizeP) |
722 | char type; | |
723 | char *litP; | |
724 | int *sizeP; | |
fecd2382 | 725 | { |
355afbcd KR |
726 | int prec; |
727 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
728 | LITTLENUM_TYPE *wordP; | |
729 | char *t; | |
730 | ||
731 | switch (type) | |
732 | { | |
733 | ||
734 | case 'f': | |
735 | case 'F': | |
736 | case 's': | |
737 | case 'S': | |
738 | prec = 2; | |
739 | break; | |
740 | ||
741 | case 'd': | |
742 | case 'D': | |
743 | case 'r': | |
744 | case 'R': | |
745 | prec = 4; | |
746 | break; | |
747 | ||
748 | case 'x': | |
749 | case 'X': | |
750 | prec = 6; | |
751 | break; | |
752 | ||
753 | case 'p': | |
754 | case 'P': | |
755 | prec = 6; | |
756 | break; | |
757 | ||
758 | default: | |
759 | *sizeP = 0; | |
760 | return "Bad call to MD_ATOF()"; | |
761 | } | |
762 | t = atof_ieee (input_line_pointer, type, words); | |
763 | if (t) | |
764 | input_line_pointer = t; | |
765 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
766 | for (wordP = words; prec--;) | |
767 | { | |
4f0bccc7 | 768 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
769 | litP += sizeof (LITTLENUM_TYPE); |
770 | } | |
99024047 | 771 | return 0; |
fecd2382 RP |
772 | } |
773 | ||
774 | /* | |
775 | * Write out big-endian. | |
776 | */ | |
777 | void | |
355afbcd KR |
778 | md_number_to_chars (buf, val, n) |
779 | char *buf; | |
c463189d | 780 | valueT val; |
355afbcd | 781 | int n; |
fecd2382 | 782 | { |
bfbfba45 | 783 | number_to_chars_bigendian (buf, val, n); |
fecd2382 RP |
784 | } |
785 | ||
355afbcd KR |
786 | void |
787 | md_apply_fix (fixP, val) | |
788 | fixS *fixP; | |
789 | long val; | |
fecd2382 | 790 | { |
355afbcd KR |
791 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
792 | ||
793 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
794 | ||
795 | ||
796 | know (fixP->fx_size == 4); | |
797 | know (fixP->fx_r_type < NO_RELOC); | |
798 | ||
9956df6a | 799 | /* This is a hack. There should be a better way to handle this. */ |
355afbcd KR |
800 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
801 | { | |
802 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
803 | } | |
804 | ||
805 | switch (fixP->fx_r_type) | |
806 | { | |
807 | ||
808 | case RELOC_32: | |
809 | buf[0] = val >> 24; | |
810 | buf[1] = val >> 16; | |
811 | buf[2] = val >> 8; | |
812 | buf[3] = val; | |
813 | break; | |
814 | ||
815 | case RELOC_8: | |
816 | buf[0] = val; | |
817 | break; | |
818 | ||
819 | case RELOC_WDISP30: | |
820 | val = (val >>= 2) + 1; | |
821 | buf[0] |= (val >> 24) & 0x3f; | |
822 | buf[1] = (val >> 16); | |
823 | buf[2] = val >> 8; | |
824 | buf[3] = val; | |
825 | break; | |
826 | ||
827 | case RELOC_HI22: | |
828 | buf[1] |= (val >> 26) & 0x3f; | |
829 | buf[2] = val >> 18; | |
830 | buf[3] = val >> 10; | |
831 | break; | |
832 | ||
833 | case RELOC_LO10: | |
834 | buf[2] |= (val >> 8) & 0x03; | |
835 | buf[3] = val; | |
836 | break; | |
837 | ||
838 | case RELOC_BASE13: | |
839 | buf[2] |= (val >> 8) & 0x1f; | |
840 | buf[3] = val; | |
841 | break; | |
842 | ||
843 | case RELOC_WDISP22: | |
844 | val = (val >>= 2) + 1; | |
845 | /* FALLTHROUGH */ | |
846 | case RELOC_BASE22: | |
847 | buf[1] |= (val >> 16) & 0x3f; | |
848 | buf[2] = val >> 8; | |
849 | buf[3] = val; | |
850 | break; | |
851 | ||
355afbcd | 852 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
f4c01c95 | 853 | if (!fixP->fx_done) |
a9a67596 ILT |
854 | { |
855 | /* The linker tries to support both AMD and old GNU style | |
856 | R_IREL relocs. That means that if the addend is exactly | |
857 | the negative of the address within the section, the | |
858 | linker will not handle it correctly. */ | |
859 | if (fixP->fx_pcrel | |
860 | && val != 0 | |
861 | && val == - (fixP->fx_frag->fr_address + fixP->fx_where)) | |
862 | as_bad_where | |
863 | (fixP->fx_file, fixP->fx_line, | |
864 | "the linker will not handle this relocation correctly"); | |
865 | } | |
f4c01c95 KR |
866 | else if (fixP->fx_pcrel) |
867 | { | |
a9a67596 | 868 | long v = val >> 17; |
f4c01c95 KR |
869 | if (v != 0 && v != -1) |
870 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
871 | "call/jmp target out of range"); | |
872 | } | |
873 | else | |
874 | /* this case was supposed to be handled in machine_ip */ | |
875 | abort (); | |
355afbcd KR |
876 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ |
877 | buf[3] = val >> 2; | |
878 | break; | |
879 | ||
880 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
881 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
882 | buf[3] = val; | |
883 | break; | |
884 | ||
885 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
886 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
887 | buf[3] = val >> 16; | |
888 | break; | |
889 | ||
890 | case NO_RELOC: | |
891 | default: | |
892 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
893 | break; | |
894 | } | |
fecd2382 RP |
895 | } |
896 | ||
897 | #ifdef OBJ_COFF | |
355afbcd KR |
898 | short |
899 | tc_coff_fix2rtype (fixP) | |
900 | fixS *fixP; | |
fecd2382 | 901 | { |
355afbcd KR |
902 | |
903 | switch (fixP->fx_r_type) | |
904 | { | |
905 | case RELOC_32: | |
906 | return (R_WORD); | |
907 | case RELOC_8: | |
908 | return (R_BYTE); | |
909 | case RELOC_CONST: | |
910 | return (R_ILOHALF); | |
911 | case RELOC_CONSTH: | |
912 | return (R_IHIHALF); | |
913 | case RELOC_JUMPTARG: | |
914 | return (R_IREL); | |
915 | default: | |
916 | printf ("need %o3\n", fixP->fx_r_type); | |
917 | abort (); | |
918 | } /* switch on type */ | |
919 | ||
920 | return (0); | |
9956df6a | 921 | } |
355afbcd | 922 | |
fecd2382 RP |
923 | #endif /* OBJ_COFF */ |
924 | ||
9956df6a | 925 | /* should never be called for 29k */ |
355afbcd KR |
926 | void |
927 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
928 | char *ptr; | |
c463189d | 929 | addressT from_addr, to_addr; |
355afbcd KR |
930 | fragS *frag; |
931 | symbolS *to_symbol; | |
fecd2382 | 932 | { |
355afbcd | 933 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
934 | } |
935 | ||
fecd2382 | 936 | /* should never be called for 29k */ |
355afbcd | 937 | void |
5f8cb05e | 938 | md_convert_frag (headers, seg, fragP) |
355afbcd | 939 | object_headers *headers; |
5f8cb05e | 940 | segT seg; |
355afbcd | 941 | register fragS *fragP; |
fecd2382 | 942 | { |
9956df6a | 943 | as_fatal ("a29k_convert_frag\n"); |
fecd2382 RP |
944 | } |
945 | ||
946 | /* should never be called for 29k */ | |
355afbcd KR |
947 | void |
948 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
949 | char *ptr; | |
c463189d ME |
950 | addressT from_addr; |
951 | addressT to_addr; | |
355afbcd KR |
952 | fragS *frag; |
953 | symbolS *to_symbol; | |
fecd2382 | 954 | { |
9956df6a | 955 | as_fatal ("a29k_create_long_jump\n"); |
fecd2382 RP |
956 | } |
957 | ||
542e1629 | 958 | /* should never be called for a29k */ |
355afbcd KR |
959 | int |
960 | md_estimate_size_before_relax (fragP, segtype) | |
961 | register fragS *fragP; | |
962 | segT segtype; | |
fecd2382 | 963 | { |
9956df6a KR |
964 | as_fatal ("a29k_estimate_size_before_relax\n"); |
965 | return 0; | |
fecd2382 RP |
966 | } |
967 | ||
968 | #if 0 | |
969 | /* for debugging only */ | |
970 | static void | |
355afbcd KR |
971 | print_insn (insn) |
972 | struct machine_it *insn; | |
fecd2382 | 973 | { |
355afbcd KR |
974 | char *Reloc[] = |
975 | { | |
976 | "RELOC_8", | |
977 | "RELOC_16", | |
978 | "RELOC_32", | |
979 | "RELOC_DISP8", | |
980 | "RELOC_DISP16", | |
981 | "RELOC_DISP32", | |
982 | "RELOC_WDISP30", | |
983 | "RELOC_WDISP22", | |
984 | "RELOC_HI22", | |
985 | "RELOC_22", | |
986 | "RELOC_13", | |
987 | "RELOC_LO10", | |
988 | "RELOC_SFA_BASE", | |
989 | "RELOC_SFA_OFF13", | |
990 | "RELOC_BASE10", | |
991 | "RELOC_BASE13", | |
992 | "RELOC_BASE22", | |
993 | "RELOC_PC10", | |
994 | "RELOC_PC22", | |
995 | "RELOC_JMP_TBL", | |
996 | "RELOC_SEGOFF16", | |
997 | "RELOC_GLOB_DAT", | |
998 | "RELOC_JMP_SLOT", | |
999 | "RELOC_RELATIVE", | |
1000 | "NO_RELOC" | |
1001 | }; | |
1002 | ||
1003 | if (insn->error) | |
1004 | { | |
1005 | fprintf (stderr, "ERROR: %s\n"); | |
1006 | } | |
1007 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
1008 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
1009 | fprintf (stderr, "exp = {\n"); | |
1010 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
1011 | insn->exp.X_add_symbol ? | |
1012 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
1013 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
5ac34ac3 ILT |
1014 | fprintf (stderr, "\t\tX_op_symbol = %s\n", |
1015 | insn->exp.X_op_symbol ? | |
1016 | (S_GET_NAME (insn->exp.X_op_symbol) ? | |
1017 | S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0"); | |
355afbcd KR |
1018 | fprintf (stderr, "\t\tX_add_number = %d\n", |
1019 | insn->exp.X_add_number); | |
1020 | fprintf (stderr, "}\n"); | |
fecd2382 | 1021 | } |
355afbcd | 1022 | |
fecd2382 RP |
1023 | #endif |
1024 | ||
a79c6033 | 1025 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1026 | |
a79c6033 RP |
1027 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1028 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1029 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1030 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1031 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1032 | |
a79c6033 | 1033 | #ifdef OBJ_AOUT |
fecd2382 | 1034 | |
355afbcd KR |
1035 | void |
1036 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1037 | char *where; | |
1038 | fixS *fixP; | |
1039 | relax_addressT segment_address_in_file; | |
a79c6033 | 1040 | { |
355afbcd KR |
1041 | long r_symbolnum; |
1042 | ||
1043 | know (fixP->fx_r_type < NO_RELOC); | |
1044 | know (fixP->fx_addsy != NULL); | |
1045 | ||
1046 | md_number_to_chars (where, | |
1047 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1048 | 4); | |
1049 | ||
1050 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1051 | ? S_GET_TYPE (fixP->fx_addsy) | |
1052 | : fixP->fx_addsy->sy_number); | |
1053 | ||
1054 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1055 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1056 | where[6] = r_symbolnum & 0x0ff; | |
1057 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1058 | /* Also easy */ | |
1059 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
9956df6a | 1060 | } |
fecd2382 RP |
1061 | |
1062 | #endif /* OBJ_AOUT */ | |
f3d817d8 DM |
1063 | \f |
1064 | CONST char *md_shortopts = ""; | |
1065 | struct option md_longopts[] = { | |
1066 | {NULL, no_argument, NULL, 0} | |
1067 | }; | |
1068 | size_t md_longopts_size = sizeof(md_longopts); | |
fecd2382 RP |
1069 | |
1070 | int | |
f3d817d8 DM |
1071 | md_parse_option (c, arg) |
1072 | int c; | |
1073 | char *arg; | |
fecd2382 | 1074 | { |
9956df6a | 1075 | return 0; |
fecd2382 RP |
1076 | } |
1077 | ||
f3d817d8 DM |
1078 | void |
1079 | md_show_usage (stream) | |
1080 | FILE *stream; | |
1081 | { | |
1082 | } | |
1083 | \f | |
1b10f50d ILT |
1084 | /* This is called when a line is unrecognized. This is used to handle |
1085 | definitions of a29k style local labels. */ | |
1086 | ||
1087 | int | |
1088 | a29k_unrecognized_line (c) | |
1089 | int c; | |
1090 | { | |
1091 | int lab; | |
1092 | char *s; | |
1093 | ||
1094 | if (c != '$' | |
1095 | || ! isdigit ((unsigned char) input_line_pointer[0])) | |
1096 | return 0; | |
1097 | ||
1098 | s = input_line_pointer; | |
1099 | ||
1100 | lab = 0; | |
1101 | while (isdigit ((unsigned char) *s)) | |
1102 | { | |
1103 | lab = lab * 10 + *s - '0'; | |
1104 | ++s; | |
1105 | } | |
1106 | ||
1107 | if (*s != ':') | |
1108 | { | |
1109 | /* Not a label definition. */ | |
1110 | return 0; | |
1111 | } | |
1112 | ||
1113 | if (dollar_label_defined (lab)) | |
1114 | { | |
1115 | as_bad ("label \"$%d\" redefined", lab); | |
1116 | return 0; | |
1117 | } | |
1118 | ||
1119 | define_dollar_label (lab); | |
1120 | colon (dollar_label_name (lab, 0)); | |
1121 | input_line_pointer = s + 1; | |
1122 | ||
1123 | return 1; | |
1124 | } | |
1125 | ||
fecd2382 RP |
1126 | /* Default the values of symbols known that should be "predefined". We |
1127 | don't bother to predefine them unless you actually use one, since there | |
1128 | are a lot of them. */ | |
1129 | ||
355afbcd KR |
1130 | symbolS * |
1131 | md_undefined_symbol (name) | |
1132 | char *name; | |
fecd2382 | 1133 | { |
355afbcd KR |
1134 | long regnum; |
1135 | char testbuf[5 + /*SLOP*/ 5]; | |
1136 | ||
030915dc ILT |
1137 | if (name[0] == 'g' || name[0] == 'G' |
1138 | || name[0] == 'l' || name[0] == 'L' | |
1139 | || name[0] == 's' || name[0] == 'S') | |
355afbcd KR |
1140 | { |
1141 | /* Perhaps a global or local register name */ | |
1142 | if (name[1] == 'r' || name[1] == 'R') | |
1143 | { | |
030915dc ILT |
1144 | long maxreg; |
1145 | ||
1146 | /* Parse the number, make sure it has no extra zeroes or | |
1147 | trailing chars. */ | |
355afbcd | 1148 | regnum = atol (&name[2]); |
030915dc ILT |
1149 | |
1150 | if (name[0] == 's' || name[0] == 'S') | |
1151 | maxreg = 255; | |
1152 | else | |
1153 | maxreg = 127; | |
1154 | if (regnum > maxreg) | |
1155 | return NULL; | |
1156 | ||
355afbcd KR |
1157 | sprintf (testbuf, "%ld", regnum); |
1158 | if (strcmp (testbuf, &name[2]) != 0) | |
030915dc | 1159 | return NULL; /* gr007 or lr7foo or whatever */ |
355afbcd KR |
1160 | |
1161 | /* We have a wiener! Define and return a new symbol for it. */ | |
1162 | if (name[0] == 'l' || name[0] == 'L') | |
1163 | regnum += 128; | |
030915dc ILT |
1164 | else if (name[0] == 's' || name[0] == 'S') |
1165 | regnum += SREG; | |
4f0bccc7 ILT |
1166 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, |
1167 | &zero_address_frag)); | |
355afbcd KR |
1168 | } |
1169 | } | |
1170 | ||
030915dc | 1171 | return NULL; |
fecd2382 RP |
1172 | } |
1173 | ||
1174 | /* Parse an operand that is machine-specific. */ | |
1175 | ||
355afbcd KR |
1176 | void |
1177 | md_operand (expressionP) | |
1178 | expressionS *expressionP; | |
fecd2382 | 1179 | { |
355afbcd KR |
1180 | |
1181 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1182 | { | |
1183 | /* We have a numeric register expression. No biggy. */ | |
1184 | input_line_pointer += 2; /* Skip %% */ | |
1185 | (void) expression (expressionP); | |
5ac34ac3 | 1186 | if (expressionP->X_op != O_constant |
355afbcd KR |
1187 | || expressionP->X_add_number > 255) |
1188 | as_bad ("Invalid expression after %%%%\n"); | |
5ac34ac3 | 1189 | expressionP->X_op = O_register; |
355afbcd KR |
1190 | } |
1191 | else if (input_line_pointer[0] == '&') | |
1192 | { | |
1193 | /* We are taking the 'address' of a register...this one is not | |
5ac34ac3 ILT |
1194 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1195 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1196 | input_line_pointer++; /* Skip & */ |
1197 | (void) expression (expressionP); | |
5ac34ac3 | 1198 | if (expressionP->X_op != O_register) |
355afbcd KR |
1199 | as_bad ("Invalid register in & expression"); |
1200 | else | |
5ac34ac3 | 1201 | expressionP->X_op = O_constant; |
355afbcd | 1202 | } |
1b10f50d ILT |
1203 | else if (input_line_pointer[0] == '$' |
1204 | && isdigit ((unsigned char) input_line_pointer[1])) | |
1205 | { | |
1206 | long lab; | |
1207 | char *name; | |
1208 | symbolS *sym; | |
1209 | ||
1210 | /* This is a local label. */ | |
1211 | ++input_line_pointer; | |
1212 | lab = (long) get_absolute_expression (); | |
1213 | if (dollar_label_defined (lab)) | |
1214 | { | |
1215 | name = dollar_label_name (lab, 0); | |
1216 | sym = symbol_find (name); | |
1217 | } | |
1218 | else | |
1219 | { | |
1220 | name = dollar_label_name (lab, 1); | |
1221 | sym = symbol_find_or_make (name); | |
1222 | } | |
1223 | ||
1224 | expressionP->X_op = O_symbol; | |
1225 | expressionP->X_add_symbol = sym; | |
1226 | expressionP->X_add_number = 0; | |
1227 | } | |
6a649eda ILT |
1228 | else if (input_line_pointer[0] == '$') |
1229 | { | |
1230 | char *s; | |
1231 | char type; | |
1232 | int fieldnum, fieldlimit; | |
1233 | LITTLENUM_TYPE floatbuf[8]; | |
1234 | ||
1235 | /* $float(), $doubleN(), or $extendN() convert floating values | |
1236 | to integers. */ | |
1237 | ||
1238 | s = input_line_pointer; | |
1239 | ||
1240 | ++s; | |
1241 | ||
1242 | fieldnum = 0; | |
1243 | if (strncmp (s, "double", sizeof "double" - 1) == 0) | |
1244 | { | |
1245 | s += sizeof "double" - 1; | |
1246 | type = 'd'; | |
1247 | fieldlimit = 2; | |
1248 | } | |
1249 | else if (strncmp (s, "float", sizeof "float" - 1) == 0) | |
1250 | { | |
1251 | s += sizeof "float" - 1; | |
1252 | type = 'f'; | |
1253 | fieldlimit = 1; | |
1254 | } | |
1255 | else if (strncmp (s, "extend", sizeof "extend" - 1) == 0) | |
1256 | { | |
1257 | s += sizeof "extend" - 1; | |
1258 | type = 'x'; | |
1259 | fieldlimit = 4; | |
1260 | } | |
1261 | else | |
1262 | { | |
6a649eda ILT |
1263 | return; |
1264 | } | |
1265 | ||
1266 | if (isdigit (*s)) | |
1267 | { | |
1268 | fieldnum = *s - '0'; | |
1269 | ++s; | |
1270 | } | |
1271 | if (fieldnum >= fieldlimit) | |
1272 | return; | |
1273 | ||
1274 | SKIP_WHITESPACE (); | |
1275 | if (*s != '(') | |
1276 | return; | |
1277 | ++s; | |
1278 | SKIP_WHITESPACE (); | |
1279 | ||
1280 | s = atof_ieee (s, type, floatbuf); | |
1281 | if (s == NULL) | |
1282 | return; | |
1283 | s = s; | |
1284 | ||
1285 | SKIP_WHITESPACE (); | |
1286 | if (*s != ')') | |
1287 | return; | |
1288 | ++s; | |
1289 | SKIP_WHITESPACE (); | |
1290 | ||
1291 | input_line_pointer = s; | |
1292 | expressionP->X_op = O_constant; | |
1293 | expressionP->X_unsigned = 1; | |
1294 | expressionP->X_add_number = ((floatbuf[fieldnum * 2] | |
1295 | << LITTLENUM_NUMBER_OF_BITS) | |
1296 | + floatbuf[fieldnum * 2 + 1]); | |
1297 | } | |
fecd2382 RP |
1298 | } |
1299 | ||
1300 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1301 | valueT |
355afbcd KR |
1302 | md_section_align (segment, size) |
1303 | segT segment; | |
c463189d | 1304 | valueT size; |
fecd2382 | 1305 | { |
355afbcd | 1306 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1307 | } |
1308 | ||
1309 | /* Exactly what point is a PC-relative offset relative TO? | |
1310 | On the 29000, they're relative to the address of the instruction, | |
1311 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1312 | long |
1313 | md_pcrel_from (fixP) | |
1314 | fixS *fixP; | |
fecd2382 | 1315 | { |
355afbcd | 1316 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1317 | } |
1318 | ||
fecd2382 | 1319 | /* end of tc-a29k.c */ |