Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
5ac34ac3 | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
030915dc | 24 | #include <ctype.h> |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
355afbcd | 35 | const relax_typeS md_relax_table[] = |
604633ae ILT |
36 | { |
37 | { 0, 0, 0, 0 } | |
38 | }; | |
fecd2382 RP |
39 | |
40 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
41 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
42 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
43 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
44 | ||
45 | /* handle of the OPCODE hash table */ | |
46 | static struct hash_control *op_hash = NULL; | |
47 | ||
355afbcd KR |
48 | struct machine_it |
49 | { | |
50 | char *error; | |
51 | unsigned long opcode; | |
52 | struct nlist *nlistp; | |
53 | expressionS exp; | |
54 | int pcrel; | |
55 | int reloc_offset; /* Offset of reloc within insn */ | |
56 | ||
57 | int reloc; | |
355afbcd | 58 | } |
355afbcd | 59 | the_insn; |
fecd2382 | 60 | |
a938b1d6 ILT |
61 | static void machine_ip PARAMS ((char *str)); |
62 | /* static void print_insn PARAMS ((struct machine_it *insn)); */ | |
604633ae | 63 | #ifndef OBJ_COFF |
a938b1d6 | 64 | static void s_data1 PARAMS ((void)); |
604633ae ILT |
65 | static void s_use PARAMS ((int)); |
66 | #endif | |
fecd2382 RP |
67 | |
68 | const pseudo_typeS | |
9956df6a | 69 | md_pseudo_table[] = |
355afbcd KR |
70 | { |
71 | {"align", s_align_bytes, 4}, | |
72 | {"block", s_space, 0}, | |
73 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
74 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
75 | {"space", s_ignore, 0}, /* Listing control */ | |
76 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 77 | #ifndef OBJ_COFF |
9956df6a | 78 | /* We can do this right with coff. */ |
355afbcd | 79 | {"use", s_use, 0}, |
c58dbabf | 80 | #endif |
355afbcd KR |
81 | {"word", cons, 4}, |
82 | {NULL, 0, 0}, | |
83 | }; | |
fecd2382 RP |
84 | |
85 | int md_short_jump_size = 4; | |
86 | int md_long_jump_size = 4; | |
57574979 SC |
87 | #if defined(BFD_HEADERS) |
88 | #ifdef RELSZ | |
49864cfa | 89 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 90 | #else |
49864cfa | 91 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
92 | #endif |
93 | #else | |
49864cfa | 94 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 95 | #endif |
fecd2382 RP |
96 | |
97 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 98 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 99 | const char comment_chars[] = ";"; |
fecd2382 RP |
100 | |
101 | /* This array holds the chars that only start a comment at the beginning of | |
102 | a line. If the line seems to have the form '# 123 filename' | |
103 | .line and .file directives will appear in the pre-processed output */ | |
104 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
105 | first line of the input file. This is because the compiler outputs | |
106 | #NO_APP at the beginning of its output. */ | |
107 | /* Also note that comments like this one will always work */ | |
587c4264 | 108 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
109 | |
110 | /* We needed an unused char for line separation to work around the | |
111 | lack of macros, using sed and such. */ | |
587c4264 | 112 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
113 | |
114 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 115 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
116 | |
117 | /* Chars that mean this number is a floating point constant */ | |
118 | /* As in 0f12.456 */ | |
119 | /* or 0d1.2345e12 */ | |
587c4264 | 120 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
121 | |
122 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9956df6a KR |
123 | changed in read.c. Ideally it shouldn't have to know about it at |
124 | all, but nothing is ideal around here. */ | |
fecd2382 RP |
125 | |
126 | static unsigned char octal[256]; | |
127 | #define isoctal(c) octal[c] | |
355afbcd | 128 | static unsigned char toHex[256]; |
fecd2382 RP |
129 | |
130 | /* | |
355afbcd | 131 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
132 | */ |
133 | #define ANNUL (1 << 29) | |
134 | ||
604633ae ILT |
135 | #ifndef OBJ_COFF |
136 | ||
fecd2382 | 137 | static void |
604633ae ILT |
138 | s_use (ignore) |
139 | int ignore; | |
fecd2382 | 140 | { |
355afbcd KR |
141 | if (strncmp (input_line_pointer, ".text", 5) == 0) |
142 | { | |
143 | input_line_pointer += 5; | |
a938b1d6 | 144 | s_text (0); |
355afbcd KR |
145 | return; |
146 | } | |
147 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
148 | { | |
149 | input_line_pointer += 5; | |
a938b1d6 | 150 | s_data (0); |
355afbcd KR |
151 | return; |
152 | } | |
153 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
154 | { | |
155 | input_line_pointer += 6; | |
156 | s_data1 (); | |
157 | return; | |
158 | } | |
9956df6a KR |
159 | /* Literals can't go in the text segment because you can't read from |
160 | instruction memory on some 29k's. So, into initialized data. */ | |
355afbcd KR |
161 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
162 | { | |
163 | input_line_pointer += 4; | |
604633ae | 164 | subseg_set (SEG_DATA, 200); |
355afbcd KR |
165 | demand_empty_rest_of_line (); |
166 | return; | |
167 | } | |
168 | ||
169 | as_bad ("Unknown segment type"); | |
170 | demand_empty_rest_of_line (); | |
fecd2382 RP |
171 | } |
172 | ||
173 | static void | |
355afbcd | 174 | s_data1 () |
fecd2382 | 175 | { |
604633ae | 176 | subseg_set (SEG_DATA, 1); |
355afbcd | 177 | demand_empty_rest_of_line (); |
fecd2382 RP |
178 | } |
179 | ||
604633ae ILT |
180 | #endif /* OBJ_COFF */ |
181 | ||
fecd2382 RP |
182 | /* Install symbol definition that maps REGNAME to REGNO. |
183 | FIXME-SOON: These are not recognized in mixed case. */ | |
184 | ||
185 | static void | |
355afbcd KR |
186 | insert_sreg (regname, regnum) |
187 | char *regname; | |
188 | int regnum; | |
fecd2382 | 189 | { |
9956df6a KR |
190 | /* FIXME-SOON, put something in these syms so they won't be output |
191 | to the symbol table of the resulting object file. */ | |
355afbcd KR |
192 | |
193 | /* Must be large enough to hold the names of the special registers. */ | |
194 | char buf[80]; | |
195 | int i; | |
196 | ||
4f0bccc7 ILT |
197 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, |
198 | &zero_address_frag)); | |
355afbcd KR |
199 | for (i = 0; regname[i]; i++) |
200 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
201 | buf[i] = '\0'; | |
202 | ||
4f0bccc7 ILT |
203 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, |
204 | &zero_address_frag)); | |
9956df6a | 205 | } |
fecd2382 RP |
206 | |
207 | /* Install symbol definitions for assorted special registers. | |
208 | See ASM29K Ref page 2-9. */ | |
209 | ||
355afbcd KR |
210 | void |
211 | define_some_regs () | |
212 | { | |
fecd2382 | 213 | #define SREG 256 |
355afbcd KR |
214 | |
215 | /* Protected special-purpose register names */ | |
216 | insert_sreg ("vab", SREG + 0); | |
217 | insert_sreg ("ops", SREG + 1); | |
218 | insert_sreg ("cps", SREG + 2); | |
219 | insert_sreg ("cfg", SREG + 3); | |
220 | insert_sreg ("cha", SREG + 4); | |
221 | insert_sreg ("chd", SREG + 5); | |
222 | insert_sreg ("chc", SREG + 6); | |
223 | insert_sreg ("rbp", SREG + 7); | |
224 | insert_sreg ("tmc", SREG + 8); | |
225 | insert_sreg ("tmr", SREG + 9); | |
226 | insert_sreg ("pc0", SREG + 10); | |
227 | insert_sreg ("pc1", SREG + 11); | |
228 | insert_sreg ("pc2", SREG + 12); | |
229 | insert_sreg ("mmu", SREG + 13); | |
230 | insert_sreg ("lru", SREG + 14); | |
231 | ||
d6f72574 KR |
232 | /* Additional protected special-purpose registers for the 29050 */ |
233 | insert_sreg ("rsn", SREG + 15); | |
234 | insert_sreg ("rma0", SREG + 16); | |
235 | insert_sreg ("rmc0", SREG + 17); | |
236 | insert_sreg ("rma1", SREG + 18); | |
237 | insert_sreg ("rmc1", SREG + 19); | |
238 | insert_sreg ("spc0", SREG + 20); | |
239 | insert_sreg ("spc1", SREG + 21); | |
240 | insert_sreg ("spc2", SREG + 22); | |
241 | insert_sreg ("iba0", SREG + 23); | |
242 | insert_sreg ("ibc0", SREG + 24); | |
243 | insert_sreg ("iba1", SREG + 25); | |
244 | insert_sreg ("ibc1", SREG + 26); | |
245 | ||
030915dc ILT |
246 | /* Additional registers for the 29040. */ |
247 | insert_sreg ("dba", SREG + 27); | |
248 | insert_sreg ("dbc", SREG + 28); | |
249 | insert_sreg ("cir", SREG + 29); | |
250 | insert_sreg ("cdr", SREG + 30); | |
251 | ||
355afbcd KR |
252 | /* Unprotected special-purpose register names */ |
253 | insert_sreg ("ipc", SREG + 128); | |
254 | insert_sreg ("ipa", SREG + 129); | |
255 | insert_sreg ("ipb", SREG + 130); | |
256 | insert_sreg ("q", SREG + 131); | |
257 | insert_sreg ("alu", SREG + 132); | |
258 | insert_sreg ("bp", SREG + 133); | |
259 | insert_sreg ("fc", SREG + 134); | |
260 | insert_sreg ("cr", SREG + 135); | |
261 | insert_sreg ("fpe", SREG + 160); | |
262 | insert_sreg ("inte", SREG + 161); | |
263 | insert_sreg ("fps", SREG + 162); | |
264 | /* "", SREG+163); Reserved */ | |
265 | insert_sreg ("exop", SREG + 164); | |
9956df6a | 266 | } |
fecd2382 RP |
267 | |
268 | /* This function is called once, at assembler startup time. It should | |
9956df6a KR |
269 | set up all the tables, etc., that the MD part of the assembler will |
270 | need. */ | |
fecd2382 | 271 | void |
355afbcd | 272 | md_begin () |
fecd2382 | 273 | { |
604633ae | 274 | register const char *retval = NULL; |
355afbcd KR |
275 | int lose = 0; |
276 | register int skipnext = 0; | |
277 | register unsigned int i; | |
278 | register char *strend, *strend2; | |
279 | ||
280 | /* Hash up all the opcodes for fast use later. */ | |
281 | ||
282 | op_hash = hash_new (); | |
355afbcd KR |
283 | |
284 | for (i = 0; i < num_opcodes; i++) | |
285 | { | |
286 | const char *name = machine_opcodes[i].name; | |
287 | ||
288 | if (skipnext) | |
289 | { | |
290 | skipnext = 0; | |
291 | continue; | |
292 | } | |
293 | ||
294 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
9956df6a | 295 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
296 | |
297 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
298 | { | |
6121fb06 ILT |
299 | if ((machine_opcodes[i].opcode & 0x01000000) != 0 |
300 | || (machine_opcodes[i + 1].opcode & 0x01000000) == 0 | |
301 | || ((machine_opcodes[i].opcode | 0x01000000) | |
302 | != machine_opcodes[i + 1].opcode)) | |
355afbcd KR |
303 | goto bad_table; |
304 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
305 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
306 | switch (*strend) | |
307 | { | |
308 | case 'b': | |
309 | if (*strend2 != 'i') | |
310 | goto bad_table; | |
311 | break; | |
355afbcd KR |
312 | case 'P': |
313 | if (*strend2 != 'A') | |
314 | goto bad_table; | |
315 | break; | |
355afbcd KR |
316 | default: |
317 | bad_table: | |
9956df6a KR |
318 | fprintf (stderr, "internal error: can't handle opcode %s\n", |
319 | name); | |
355afbcd | 320 | lose = 1; |
a39116f1 | 321 | } |
355afbcd | 322 | |
9956df6a KR |
323 | /* OK, this is an i/b or A/P pair. We skip the |
324 | higher-valued one, and let the code for operand checking | |
325 | handle OR-ing in the bit. */ | |
6121fb06 | 326 | skipnext = 1; |
355afbcd KR |
327 | } |
328 | ||
604633ae | 329 | retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]); |
43029a8f | 330 | if (retval != NULL) |
355afbcd KR |
331 | { |
332 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
333 | machine_opcodes[i].name, retval); | |
334 | lose = 1; | |
335 | } | |
336 | } | |
337 | ||
338 | if (lose) | |
339 | as_fatal ("Broken assembler. No assembly attempted."); | |
340 | ||
341 | for (i = '0'; i < '8'; ++i) | |
342 | octal[i] = 1; | |
343 | for (i = '0'; i <= '9'; ++i) | |
344 | toHex[i] = i - '0'; | |
345 | for (i = 'a'; i <= 'f'; ++i) | |
346 | toHex[i] = i + 10 - 'a'; | |
347 | for (i = 'A'; i <= 'F'; ++i) | |
348 | toHex[i] = i + 10 - 'A'; | |
349 | ||
350 | define_some_regs (); | |
fecd2382 RP |
351 | } |
352 | ||
fecd2382 RP |
353 | /* Assemble a single instruction. Its label has already been handled |
354 | by the generic front end. We just parse opcode and operands, and | |
355 | produce the bytes of data and relocation. */ | |
356 | ||
355afbcd KR |
357 | void |
358 | md_assemble (str) | |
359 | char *str; | |
fecd2382 | 360 | { |
355afbcd | 361 | char *toP; |
355afbcd KR |
362 | |
363 | know (str); | |
364 | machine_ip (str); | |
365 | toP = frag_more (4); | |
366 | /* put out the opcode */ | |
367 | md_number_to_chars (toP, the_insn.opcode, 4); | |
368 | ||
369 | /* put out the symbol-dependent stuff */ | |
370 | if (the_insn.reloc != NO_RELOC) | |
371 | { | |
5ac34ac3 ILT |
372 | fix_new_exp (frag_now, |
373 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
374 | 4, /* size */ | |
375 | &the_insn.exp, | |
376 | the_insn.pcrel, | |
377 | the_insn.reloc); | |
355afbcd | 378 | } |
fecd2382 RP |
379 | } |
380 | ||
381 | char * | |
030915dc | 382 | parse_operand (s, operandp, opt) |
355afbcd KR |
383 | char *s; |
384 | expressionS *operandp; | |
030915dc | 385 | int opt; |
fecd2382 | 386 | { |
c58dbabf SC |
387 | char *save = input_line_pointer; |
388 | char *new; | |
355afbcd | 389 | |
c58dbabf | 390 | input_line_pointer = s; |
283dba4b | 391 | expression (operandp); |
030915dc | 392 | if (operandp->X_op == O_absent && ! opt) |
5ac34ac3 | 393 | as_bad ("missing operand"); |
c58dbabf SC |
394 | new = input_line_pointer; |
395 | input_line_pointer = save; | |
c58dbabf | 396 | return new; |
fecd2382 RP |
397 | } |
398 | ||
355afbcd | 399 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
400 | Operands are at input_line_pointer. Output is in the_insn. |
401 | Warnings or errors are generated. */ | |
a39116f1 | 402 | |
fecd2382 | 403 | static void |
355afbcd KR |
404 | machine_ip (str) |
405 | char *str; | |
fecd2382 | 406 | { |
355afbcd KR |
407 | char *s; |
408 | const char *args; | |
355afbcd KR |
409 | struct machine_opcode *insn; |
410 | char *argsStart; | |
411 | unsigned long opcode; | |
355afbcd KR |
412 | expressionS the_operand; |
413 | expressionS *operand = &the_operand; | |
414 | unsigned int reg; | |
415 | ||
416 | /* Must handle `div0' opcode. */ | |
417 | s = str; | |
418 | if (isalpha (*s)) | |
419 | for (; isalnum (*s); ++s) | |
420 | if (isupper (*s)) | |
421 | *s = tolower (*s); | |
422 | ||
423 | switch (*s) | |
424 | { | |
425 | case '\0': | |
426 | break; | |
427 | ||
428 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
429 | *s++ = '\0'; | |
430 | break; | |
431 | ||
432 | default: | |
433 | as_bad ("Unknown opcode: `%s'", str); | |
434 | return; | |
435 | } | |
436 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
437 | { | |
438 | as_bad ("Unknown opcode `%s'.", str); | |
439 | return; | |
440 | } | |
441 | argsStart = s; | |
442 | opcode = insn->opcode; | |
443 | memset (&the_insn, '\0', sizeof (the_insn)); | |
444 | the_insn.reloc = NO_RELOC; | |
445 | ||
9956df6a KR |
446 | /* Build the opcode, checking as we go to make sure that the |
447 | operands match. | |
448 | ||
449 | If an operand matches, we modify the_insn or opcode appropriately, | |
450 | and do a "continue". If an operand fails to match, we "break". */ | |
451 | ||
355afbcd | 452 | if (insn->args[0] != '\0') |
030915dc ILT |
453 | { |
454 | /* Prime the pump. */ | |
455 | s = parse_operand (s, operand, insn->args[0] == 'I'); | |
456 | } | |
355afbcd KR |
457 | |
458 | for (args = insn->args;; ++args) | |
459 | { | |
460 | switch (*args) | |
461 | { | |
462 | ||
463 | case '\0': /* end of args */ | |
464 | if (*s == '\0') | |
465 | { | |
466 | /* We are truly done. */ | |
467 | the_insn.opcode = opcode; | |
468 | return; | |
469 | } | |
470 | as_bad ("Too many operands: %s", s); | |
471 | break; | |
472 | ||
473 | case ',': /* Must match a comma */ | |
474 | if (*s++ == ',') | |
475 | { | |
030915dc ILT |
476 | /* Parse next operand. */ |
477 | s = parse_operand (s, operand, args[1] == 'I'); | |
355afbcd KR |
478 | continue; |
479 | } | |
480 | break; | |
481 | ||
482 | case 'v': /* Trap numbers (immediate field) */ | |
5ac34ac3 | 483 | if (operand->X_op == O_constant) |
355afbcd KR |
484 | { |
485 | if (operand->X_add_number < 256) | |
486 | { | |
487 | opcode |= (operand->X_add_number << 16); | |
488 | continue; | |
489 | } | |
490 | else | |
491 | { | |
604633ae ILT |
492 | as_bad ("Immediate value of %ld is too large", |
493 | (long) operand->X_add_number); | |
355afbcd KR |
494 | continue; |
495 | } | |
496 | } | |
497 | the_insn.reloc = RELOC_8; | |
498 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
499 | the_insn.exp = *operand; | |
500 | continue; | |
501 | ||
502 | case 'b': /* A general register or 8-bit immediate */ | |
503 | case 'i': | |
504 | /* We treat the two cases identically since we mashed | |
9956df6a | 505 | them together in the opcode table. */ |
5ac34ac3 | 506 | if (operand->X_op == O_register) |
355afbcd KR |
507 | goto general_reg; |
508 | ||
6121fb06 ILT |
509 | /* Make sure the 'i' case really exists. */ |
510 | if ((insn->opcode | IMMEDIATE_BIT) != (insn + 1)->opcode) | |
511 | break; | |
512 | ||
355afbcd | 513 | opcode |= IMMEDIATE_BIT; |
5ac34ac3 | 514 | if (operand->X_op == O_constant) |
355afbcd KR |
515 | { |
516 | if (operand->X_add_number < 256) | |
517 | { | |
518 | opcode |= operand->X_add_number; | |
519 | continue; | |
520 | } | |
521 | else | |
522 | { | |
604633ae ILT |
523 | as_bad ("Immediate value of %ld is too large", |
524 | (long) operand->X_add_number); | |
355afbcd KR |
525 | continue; |
526 | } | |
527 | } | |
528 | the_insn.reloc = RELOC_8; | |
529 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
530 | the_insn.exp = *operand; | |
531 | continue; | |
532 | ||
533 | case 'a': /* next operand must be a register */ | |
534 | case 'c': | |
535 | general_reg: | |
536 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
5ac34ac3 | 537 | if (operand->X_op != O_register) |
355afbcd KR |
538 | break; /* Only registers */ |
539 | know (operand->X_add_symbol == 0); | |
5ac34ac3 | 540 | know (operand->X_op_symbol == 0); |
355afbcd KR |
541 | reg = operand->X_add_number; |
542 | if (reg >= SREG) | |
543 | break; /* No special registers */ | |
544 | ||
9956df6a KR |
545 | /* Got the register, now figure out where it goes in the |
546 | opcode. */ | |
355afbcd KR |
547 | switch (*args) |
548 | { | |
549 | case 'a': | |
550 | opcode |= reg << 8; | |
551 | continue; | |
552 | ||
553 | case 'b': | |
554 | case 'i': | |
555 | opcode |= reg; | |
556 | continue; | |
557 | ||
558 | case 'c': | |
559 | opcode |= reg << 16; | |
560 | continue; | |
561 | } | |
562 | as_fatal ("failed sanity check."); | |
563 | break; | |
564 | ||
565 | case 'x': /* 16 bit constant, zero-extended */ | |
566 | case 'X': /* 16 bit constant, one-extended */ | |
5ac34ac3 | 567 | if (operand->X_op == O_constant) |
355afbcd KR |
568 | { |
569 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
570 | ((operand->X_add_number & 0xFF00) << 8); | |
571 | continue; | |
572 | } | |
573 | the_insn.reloc = RELOC_CONST; | |
574 | the_insn.exp = *operand; | |
575 | continue; | |
576 | ||
577 | case 'h': | |
5ac34ac3 | 578 | if (operand->X_op == O_constant) |
355afbcd KR |
579 | { |
580 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
581 | (((unsigned long) operand->X_add_number | |
582 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
583 | continue; | |
584 | } | |
585 | the_insn.reloc = RELOC_CONSTH; | |
586 | the_insn.exp = *operand; | |
587 | continue; | |
588 | ||
589 | case 'P': /* PC-relative jump address */ | |
590 | case 'A': /* Absolute jump address */ | |
591 | /* These two are treated together since we folded the | |
5ac34ac3 ILT |
592 | opcode table entries together. */ |
593 | if (operand->X_op == O_constant) | |
355afbcd | 594 | { |
6121fb06 ILT |
595 | /* Make sure the 'A' case really exists. */ |
596 | if ((insn->opcode | ABSOLUTE_BIT) != (insn + 1)->opcode) | |
597 | break; | |
355afbcd KR |
598 | opcode |= ABSOLUTE_BIT | |
599 | (operand->X_add_number & 0x0003FC00) << 6 | | |
600 | ((operand->X_add_number & 0x000003FC) >> 2); | |
601 | continue; | |
602 | } | |
603 | the_insn.reloc = RELOC_JUMPTARG; | |
604 | the_insn.exp = *operand; | |
605 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
9956df6a KR |
606 | /* FIXME-SOON, Do we figure out whether abs later, after |
607 | know sym val? */ | |
355afbcd KR |
608 | continue; |
609 | ||
610 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
5ac34ac3 | 611 | if (operand->X_op == O_constant) |
355afbcd KR |
612 | { |
613 | if (operand->X_add_number == 0) | |
614 | continue; | |
615 | if (operand->X_add_number == 1) | |
616 | { | |
617 | opcode |= CE_BIT; | |
618 | continue; | |
fecd2382 | 619 | } |
355afbcd KR |
620 | } |
621 | break; | |
622 | ||
623 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
5ac34ac3 | 624 | if (operand->X_op == O_constant && |
355afbcd KR |
625 | operand->X_add_number < 128) |
626 | { | |
627 | opcode |= (operand->X_add_number << 16); | |
628 | continue; | |
629 | } | |
630 | break; | |
631 | ||
632 | case 's': /* Special register number */ | |
5ac34ac3 | 633 | if (operand->X_op != O_register) |
355afbcd KR |
634 | break; /* Only registers */ |
635 | if (operand->X_add_number < SREG) | |
636 | break; /* Not a special register */ | |
637 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
638 | continue; | |
639 | ||
640 | case 'u': /* UI bit of CONVERT */ | |
5ac34ac3 | 641 | if (operand->X_op == O_constant) |
355afbcd KR |
642 | { |
643 | if (operand->X_add_number == 0) | |
644 | continue; | |
645 | if (operand->X_add_number == 1) | |
646 | { | |
647 | opcode |= UI_BIT; | |
648 | continue; | |
649 | } | |
650 | } | |
651 | break; | |
652 | ||
653 | case 'r': /* RND bits of CONVERT */ | |
5ac34ac3 | 654 | if (operand->X_op == O_constant && |
355afbcd KR |
655 | operand->X_add_number < 8) |
656 | { | |
657 | opcode |= operand->X_add_number << 4; | |
658 | continue; | |
659 | } | |
660 | break; | |
661 | ||
030915dc ILT |
662 | case 'I': /* ID bits of INV and IRETINV. */ |
663 | /* This operand is optional. */ | |
664 | if (operand->X_op == O_absent) | |
665 | continue; | |
666 | else if (operand->X_op == O_constant | |
667 | && operand->X_add_number < 4) | |
668 | { | |
669 | opcode |= operand->X_add_number << 16; | |
670 | continue; | |
671 | } | |
672 | break; | |
673 | ||
355afbcd | 674 | case 'd': /* FD bits of CONVERT */ |
5ac34ac3 | 675 | if (operand->X_op == O_constant && |
355afbcd KR |
676 | operand->X_add_number < 4) |
677 | { | |
678 | opcode |= operand->X_add_number << 2; | |
679 | continue; | |
680 | } | |
681 | break; | |
682 | ||
683 | ||
684 | case 'f': /* FS bits of CONVERT */ | |
5ac34ac3 | 685 | if (operand->X_op == O_constant && |
355afbcd KR |
686 | operand->X_add_number < 4) |
687 | { | |
688 | opcode |= operand->X_add_number << 0; | |
689 | continue; | |
690 | } | |
691 | break; | |
692 | ||
693 | case 'C': | |
5ac34ac3 | 694 | if (operand->X_op == O_constant && |
355afbcd KR |
695 | operand->X_add_number < 4) |
696 | { | |
697 | opcode |= operand->X_add_number << 16; | |
698 | continue; | |
699 | } | |
700 | break; | |
701 | ||
702 | case 'F': | |
5ac34ac3 | 703 | if (operand->X_op == O_constant && |
355afbcd KR |
704 | operand->X_add_number < 16) |
705 | { | |
706 | opcode |= operand->X_add_number << 18; | |
707 | continue; | |
708 | } | |
709 | break; | |
710 | ||
711 | default: | |
712 | BAD_CASE (*args); | |
fecd2382 | 713 | } |
355afbcd KR |
714 | /* Types or values of args don't match. */ |
715 | as_bad ("Invalid operands"); | |
716 | return; | |
717 | } | |
fecd2382 RP |
718 | } |
719 | ||
9956df6a KR |
720 | /* This is identical to the md_atof in m68k.c. I think this is right, |
721 | but I'm not sure. | |
355afbcd | 722 | |
9956df6a KR |
723 | Turn a string in input_line_pointer into a floating point constant |
724 | of type type, and store the appropriate bytes in *litP. The number | |
725 | of LITTLENUMS emitted is stored in *sizeP . An error message is | |
726 | returned, or NULL on OK. */ | |
fecd2382 RP |
727 | |
728 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
729 | #define MAX_LITTLENUMS 6 | |
730 | ||
731 | char * | |
355afbcd KR |
732 | md_atof (type, litP, sizeP) |
733 | char type; | |
734 | char *litP; | |
735 | int *sizeP; | |
fecd2382 | 736 | { |
355afbcd KR |
737 | int prec; |
738 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
739 | LITTLENUM_TYPE *wordP; | |
740 | char *t; | |
741 | ||
742 | switch (type) | |
743 | { | |
744 | ||
745 | case 'f': | |
746 | case 'F': | |
747 | case 's': | |
748 | case 'S': | |
749 | prec = 2; | |
750 | break; | |
751 | ||
752 | case 'd': | |
753 | case 'D': | |
754 | case 'r': | |
755 | case 'R': | |
756 | prec = 4; | |
757 | break; | |
758 | ||
759 | case 'x': | |
760 | case 'X': | |
761 | prec = 6; | |
762 | break; | |
763 | ||
764 | case 'p': | |
765 | case 'P': | |
766 | prec = 6; | |
767 | break; | |
768 | ||
769 | default: | |
770 | *sizeP = 0; | |
771 | return "Bad call to MD_ATOF()"; | |
772 | } | |
773 | t = atof_ieee (input_line_pointer, type, words); | |
774 | if (t) | |
775 | input_line_pointer = t; | |
776 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
777 | for (wordP = words; prec--;) | |
778 | { | |
4f0bccc7 | 779 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
780 | litP += sizeof (LITTLENUM_TYPE); |
781 | } | |
99024047 | 782 | return 0; |
fecd2382 RP |
783 | } |
784 | ||
785 | /* | |
786 | * Write out big-endian. | |
787 | */ | |
788 | void | |
355afbcd KR |
789 | md_number_to_chars (buf, val, n) |
790 | char *buf; | |
c463189d | 791 | valueT val; |
355afbcd | 792 | int n; |
fecd2382 | 793 | { |
bfbfba45 | 794 | number_to_chars_bigendian (buf, val, n); |
fecd2382 RP |
795 | } |
796 | ||
355afbcd KR |
797 | void |
798 | md_apply_fix (fixP, val) | |
799 | fixS *fixP; | |
800 | long val; | |
fecd2382 | 801 | { |
355afbcd KR |
802 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
803 | ||
804 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
805 | ||
806 | ||
807 | know (fixP->fx_size == 4); | |
808 | know (fixP->fx_r_type < NO_RELOC); | |
809 | ||
9956df6a | 810 | /* This is a hack. There should be a better way to handle this. */ |
355afbcd KR |
811 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
812 | { | |
813 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
814 | } | |
815 | ||
816 | switch (fixP->fx_r_type) | |
817 | { | |
818 | ||
819 | case RELOC_32: | |
820 | buf[0] = val >> 24; | |
821 | buf[1] = val >> 16; | |
822 | buf[2] = val >> 8; | |
823 | buf[3] = val; | |
824 | break; | |
825 | ||
826 | case RELOC_8: | |
827 | buf[0] = val; | |
828 | break; | |
829 | ||
830 | case RELOC_WDISP30: | |
831 | val = (val >>= 2) + 1; | |
832 | buf[0] |= (val >> 24) & 0x3f; | |
833 | buf[1] = (val >> 16); | |
834 | buf[2] = val >> 8; | |
835 | buf[3] = val; | |
836 | break; | |
837 | ||
838 | case RELOC_HI22: | |
839 | buf[1] |= (val >> 26) & 0x3f; | |
840 | buf[2] = val >> 18; | |
841 | buf[3] = val >> 10; | |
842 | break; | |
843 | ||
844 | case RELOC_LO10: | |
845 | buf[2] |= (val >> 8) & 0x03; | |
846 | buf[3] = val; | |
847 | break; | |
848 | ||
849 | case RELOC_BASE13: | |
850 | buf[2] |= (val >> 8) & 0x1f; | |
851 | buf[3] = val; | |
852 | break; | |
853 | ||
854 | case RELOC_WDISP22: | |
855 | val = (val >>= 2) + 1; | |
856 | /* FALLTHROUGH */ | |
857 | case RELOC_BASE22: | |
858 | buf[1] |= (val >> 16) & 0x3f; | |
859 | buf[2] = val >> 8; | |
860 | buf[3] = val; | |
861 | break; | |
862 | ||
fecd2382 | 863 | #if 0 |
355afbcd KR |
864 | case RELOC_PC10: |
865 | case RELOC_PC22: | |
866 | case RELOC_JMP_TBL: | |
867 | case RELOC_SEGOFF16: | |
868 | case RELOC_GLOB_DAT: | |
869 | case RELOC_JMP_SLOT: | |
870 | case RELOC_RELATIVE: | |
fecd2382 | 871 | #endif |
355afbcd KR |
872 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
873 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
874 | buf[3] = val >> 2; | |
875 | break; | |
876 | ||
877 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
878 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
879 | buf[3] = val; | |
880 | break; | |
881 | ||
882 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
883 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
884 | buf[3] = val >> 16; | |
885 | break; | |
886 | ||
887 | case NO_RELOC: | |
888 | default: | |
889 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
890 | break; | |
891 | } | |
fecd2382 RP |
892 | } |
893 | ||
894 | #ifdef OBJ_COFF | |
355afbcd KR |
895 | short |
896 | tc_coff_fix2rtype (fixP) | |
897 | fixS *fixP; | |
fecd2382 | 898 | { |
355afbcd KR |
899 | |
900 | switch (fixP->fx_r_type) | |
901 | { | |
902 | case RELOC_32: | |
903 | return (R_WORD); | |
904 | case RELOC_8: | |
905 | return (R_BYTE); | |
906 | case RELOC_CONST: | |
907 | return (R_ILOHALF); | |
908 | case RELOC_CONSTH: | |
909 | return (R_IHIHALF); | |
910 | case RELOC_JUMPTARG: | |
911 | return (R_IREL); | |
912 | default: | |
913 | printf ("need %o3\n", fixP->fx_r_type); | |
914 | abort (); | |
915 | } /* switch on type */ | |
916 | ||
917 | return (0); | |
9956df6a | 918 | } |
355afbcd | 919 | |
fecd2382 RP |
920 | #endif /* OBJ_COFF */ |
921 | ||
9956df6a | 922 | /* should never be called for 29k */ |
355afbcd KR |
923 | void |
924 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
925 | char *ptr; | |
c463189d | 926 | addressT from_addr, to_addr; |
355afbcd KR |
927 | fragS *frag; |
928 | symbolS *to_symbol; | |
fecd2382 | 929 | { |
355afbcd | 930 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
931 | } |
932 | ||
fecd2382 | 933 | /* should never be called for 29k */ |
355afbcd KR |
934 | void |
935 | md_convert_frag (headers, fragP) | |
936 | object_headers *headers; | |
937 | register fragS *fragP; | |
fecd2382 | 938 | { |
9956df6a | 939 | as_fatal ("a29k_convert_frag\n"); |
fecd2382 RP |
940 | } |
941 | ||
942 | /* should never be called for 29k */ | |
355afbcd KR |
943 | void |
944 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
945 | char *ptr; | |
c463189d ME |
946 | addressT from_addr; |
947 | addressT to_addr; | |
355afbcd KR |
948 | fragS *frag; |
949 | symbolS *to_symbol; | |
fecd2382 | 950 | { |
9956df6a | 951 | as_fatal ("a29k_create_long_jump\n"); |
fecd2382 RP |
952 | } |
953 | ||
542e1629 | 954 | /* should never be called for a29k */ |
355afbcd KR |
955 | int |
956 | md_estimate_size_before_relax (fragP, segtype) | |
957 | register fragS *fragP; | |
958 | segT segtype; | |
fecd2382 | 959 | { |
9956df6a KR |
960 | as_fatal ("a29k_estimate_size_before_relax\n"); |
961 | return 0; | |
fecd2382 RP |
962 | } |
963 | ||
964 | #if 0 | |
965 | /* for debugging only */ | |
966 | static void | |
355afbcd KR |
967 | print_insn (insn) |
968 | struct machine_it *insn; | |
fecd2382 | 969 | { |
355afbcd KR |
970 | char *Reloc[] = |
971 | { | |
972 | "RELOC_8", | |
973 | "RELOC_16", | |
974 | "RELOC_32", | |
975 | "RELOC_DISP8", | |
976 | "RELOC_DISP16", | |
977 | "RELOC_DISP32", | |
978 | "RELOC_WDISP30", | |
979 | "RELOC_WDISP22", | |
980 | "RELOC_HI22", | |
981 | "RELOC_22", | |
982 | "RELOC_13", | |
983 | "RELOC_LO10", | |
984 | "RELOC_SFA_BASE", | |
985 | "RELOC_SFA_OFF13", | |
986 | "RELOC_BASE10", | |
987 | "RELOC_BASE13", | |
988 | "RELOC_BASE22", | |
989 | "RELOC_PC10", | |
990 | "RELOC_PC22", | |
991 | "RELOC_JMP_TBL", | |
992 | "RELOC_SEGOFF16", | |
993 | "RELOC_GLOB_DAT", | |
994 | "RELOC_JMP_SLOT", | |
995 | "RELOC_RELATIVE", | |
996 | "NO_RELOC" | |
997 | }; | |
998 | ||
999 | if (insn->error) | |
1000 | { | |
1001 | fprintf (stderr, "ERROR: %s\n"); | |
1002 | } | |
1003 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
1004 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
1005 | fprintf (stderr, "exp = {\n"); | |
1006 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
1007 | insn->exp.X_add_symbol ? | |
1008 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
1009 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
5ac34ac3 ILT |
1010 | fprintf (stderr, "\t\tX_op_symbol = %s\n", |
1011 | insn->exp.X_op_symbol ? | |
1012 | (S_GET_NAME (insn->exp.X_op_symbol) ? | |
1013 | S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0"); | |
355afbcd KR |
1014 | fprintf (stderr, "\t\tX_add_number = %d\n", |
1015 | insn->exp.X_add_number); | |
1016 | fprintf (stderr, "}\n"); | |
fecd2382 | 1017 | } |
355afbcd | 1018 | |
fecd2382 RP |
1019 | #endif |
1020 | ||
a79c6033 | 1021 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1022 | |
a79c6033 RP |
1023 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1024 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1025 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1026 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1027 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1028 | |
a79c6033 | 1029 | #ifdef OBJ_AOUT |
fecd2382 | 1030 | |
355afbcd KR |
1031 | void |
1032 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1033 | char *where; | |
1034 | fixS *fixP; | |
1035 | relax_addressT segment_address_in_file; | |
a79c6033 | 1036 | { |
355afbcd KR |
1037 | long r_symbolnum; |
1038 | ||
1039 | know (fixP->fx_r_type < NO_RELOC); | |
1040 | know (fixP->fx_addsy != NULL); | |
1041 | ||
1042 | md_number_to_chars (where, | |
1043 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1044 | 4); | |
1045 | ||
1046 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1047 | ? S_GET_TYPE (fixP->fx_addsy) | |
1048 | : fixP->fx_addsy->sy_number); | |
1049 | ||
1050 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1051 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1052 | where[6] = r_symbolnum & 0x0ff; | |
1053 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1054 | /* Also easy */ | |
1055 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
9956df6a | 1056 | } |
fecd2382 RP |
1057 | |
1058 | #endif /* OBJ_AOUT */ | |
f3d817d8 DM |
1059 | \f |
1060 | CONST char *md_shortopts = ""; | |
1061 | struct option md_longopts[] = { | |
1062 | {NULL, no_argument, NULL, 0} | |
1063 | }; | |
1064 | size_t md_longopts_size = sizeof(md_longopts); | |
fecd2382 RP |
1065 | |
1066 | int | |
f3d817d8 DM |
1067 | md_parse_option (c, arg) |
1068 | int c; | |
1069 | char *arg; | |
fecd2382 | 1070 | { |
9956df6a | 1071 | return 0; |
fecd2382 RP |
1072 | } |
1073 | ||
f3d817d8 DM |
1074 | void |
1075 | md_show_usage (stream) | |
1076 | FILE *stream; | |
1077 | { | |
1078 | } | |
1079 | \f | |
fecd2382 RP |
1080 | /* Default the values of symbols known that should be "predefined". We |
1081 | don't bother to predefine them unless you actually use one, since there | |
1082 | are a lot of them. */ | |
1083 | ||
355afbcd KR |
1084 | symbolS * |
1085 | md_undefined_symbol (name) | |
1086 | char *name; | |
fecd2382 | 1087 | { |
355afbcd KR |
1088 | long regnum; |
1089 | char testbuf[5 + /*SLOP*/ 5]; | |
1090 | ||
030915dc ILT |
1091 | if (name[0] == 'g' || name[0] == 'G' |
1092 | || name[0] == 'l' || name[0] == 'L' | |
1093 | || name[0] == 's' || name[0] == 'S') | |
355afbcd KR |
1094 | { |
1095 | /* Perhaps a global or local register name */ | |
1096 | if (name[1] == 'r' || name[1] == 'R') | |
1097 | { | |
030915dc ILT |
1098 | long maxreg; |
1099 | ||
1100 | /* Parse the number, make sure it has no extra zeroes or | |
1101 | trailing chars. */ | |
355afbcd | 1102 | regnum = atol (&name[2]); |
030915dc ILT |
1103 | |
1104 | if (name[0] == 's' || name[0] == 'S') | |
1105 | maxreg = 255; | |
1106 | else | |
1107 | maxreg = 127; | |
1108 | if (regnum > maxreg) | |
1109 | return NULL; | |
1110 | ||
355afbcd KR |
1111 | sprintf (testbuf, "%ld", regnum); |
1112 | if (strcmp (testbuf, &name[2]) != 0) | |
030915dc | 1113 | return NULL; /* gr007 or lr7foo or whatever */ |
355afbcd KR |
1114 | |
1115 | /* We have a wiener! Define and return a new symbol for it. */ | |
1116 | if (name[0] == 'l' || name[0] == 'L') | |
1117 | regnum += 128; | |
030915dc ILT |
1118 | else if (name[0] == 's' || name[0] == 'S') |
1119 | regnum += SREG; | |
4f0bccc7 ILT |
1120 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, |
1121 | &zero_address_frag)); | |
355afbcd KR |
1122 | } |
1123 | } | |
1124 | ||
030915dc | 1125 | return NULL; |
fecd2382 RP |
1126 | } |
1127 | ||
1128 | /* Parse an operand that is machine-specific. */ | |
1129 | ||
355afbcd KR |
1130 | void |
1131 | md_operand (expressionP) | |
1132 | expressionS *expressionP; | |
fecd2382 | 1133 | { |
355afbcd KR |
1134 | |
1135 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1136 | { | |
1137 | /* We have a numeric register expression. No biggy. */ | |
1138 | input_line_pointer += 2; /* Skip %% */ | |
1139 | (void) expression (expressionP); | |
5ac34ac3 | 1140 | if (expressionP->X_op != O_constant |
355afbcd KR |
1141 | || expressionP->X_add_number > 255) |
1142 | as_bad ("Invalid expression after %%%%\n"); | |
5ac34ac3 | 1143 | expressionP->X_op = O_register; |
355afbcd KR |
1144 | } |
1145 | else if (input_line_pointer[0] == '&') | |
1146 | { | |
1147 | /* We are taking the 'address' of a register...this one is not | |
5ac34ac3 ILT |
1148 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1149 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1150 | input_line_pointer++; /* Skip & */ |
1151 | (void) expression (expressionP); | |
5ac34ac3 | 1152 | if (expressionP->X_op != O_register) |
355afbcd KR |
1153 | as_bad ("Invalid register in & expression"); |
1154 | else | |
5ac34ac3 | 1155 | expressionP->X_op = O_constant; |
355afbcd | 1156 | } |
fecd2382 RP |
1157 | } |
1158 | ||
1159 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1160 | valueT |
355afbcd KR |
1161 | md_section_align (segment, size) |
1162 | segT segment; | |
c463189d | 1163 | valueT size; |
fecd2382 | 1164 | { |
355afbcd | 1165 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1166 | } |
1167 | ||
1168 | /* Exactly what point is a PC-relative offset relative TO? | |
1169 | On the 29000, they're relative to the address of the instruction, | |
1170 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1171 | long |
1172 | md_pcrel_from (fixP) | |
1173 | fixS *fixP; | |
fecd2382 | 1174 | { |
355afbcd | 1175 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1176 | } |
1177 | ||
fecd2382 | 1178 | /* end of tc-a29k.c */ |