Ran "indent", for GNU coding style; some code & comments still need fixup.
[deliverable/binutils-gdb.git] / gas / config / tc-a29k.c
CommitLineData
fecd2382 1/* tc-a29k.c -- Assemble for the AMD 29000.
01170860 2 Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
355afbcd 3
a39116f1 4 This file is part of GAS, the GNU Assembler.
355afbcd 5
a39116f1
RP
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
355afbcd 10
a39116f1
RP
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
355afbcd 15
a39116f1
RP
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
fecd2382 19
fecd2382
RP
20/* John Gilmore has reorganized this module somewhat, to make it easier
21 to convert it to new machines' assemblers as desired. There was too
22 much bloody rewriting required before. There still probably is. */
a39116f1 23
fecd2382 24#include "as.h"
587c4264 25#include "read.h"
fecd2382 26
a1d144c6 27#include "opcode/a29k.h"
fecd2382
RP
28
29/* Make it easier to clone this machine desc into another one. */
30#define machine_opcode a29k_opcode
31#define machine_opcodes a29k_opcodes
32#define machine_ip a29k_ip
33#define machine_it a29k_it
34
355afbcd
KR
35const relax_typeS md_relax_table[] =
36{0};
fecd2382
RP
37
38#define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
39#define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
40#define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
41#define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
42
43/* handle of the OPCODE hash table */
44static struct hash_control *op_hash = NULL;
45
355afbcd
KR
46struct machine_it
47 {
48 char *error;
49 unsigned long opcode;
50 struct nlist *nlistp;
51 expressionS exp;
52 int pcrel;
53 int reloc_offset; /* Offset of reloc within insn */
54
55 int reloc;
c593cf41 56
c593cf41 57
355afbcd 58 }
c593cf41 59
355afbcd 60the_insn;
fecd2382 61
a87b3269 62#if __STDC__ == 1
fecd2382
RP
63
64/* static int getExpression(char *str); */
355afbcd 65static void machine_ip (char *str);
fecd2382 66/* static void print_insn(struct machine_it *insn); */
355afbcd
KR
67static void s_data1 (void);
68static void s_use (void);
fecd2382 69
a87b3269 70#else /* not __STDC__ */
fecd2382
RP
71
72/* static int getExpression(); */
355afbcd 73static void machine_ip ();
fecd2382 74/* static void print_insn(); */
355afbcd
KR
75static void s_data1 ();
76static void s_use ();
fecd2382 77
a87b3269 78#endif /* not __STDC__ */
fecd2382
RP
79
80const pseudo_typeS
355afbcd
KR
81 md_pseudo_table[] =
82{
83 {"align", s_align_bytes, 4},
84 {"block", s_space, 0},
85 {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */
86 {"reg", s_lsym, 0}, /* Register equate, same as equ */
87 {"space", s_ignore, 0}, /* Listing control */
88 {"sect", s_ignore, 0}, /* Creation of coff sections */
c58dbabf 89#ifndef OBJ_COFF
355afbcd
KR
90/* We can do this right with coff */
91 {"use", s_use, 0},
c58dbabf 92#endif
355afbcd
KR
93 {"word", cons, 4},
94 {NULL, 0, 0},
95};
fecd2382
RP
96
97int md_short_jump_size = 4;
98int md_long_jump_size = 4;
57574979
SC
99#if defined(BFD_HEADERS)
100#ifdef RELSZ
101int md_reloc_size = RELSZ; /* Coff headers */
102#else
103int md_reloc_size = 12; /* something else headers */
104#endif
105#else
106int md_reloc_size = 12; /* Not bfdized*/
107#endif
fecd2382
RP
108
109/* This array holds the chars that always start a comment. If the
a39116f1 110 pre-processor is disabled, these aren't very useful */
587c4264 111const char comment_chars[] = ";";
fecd2382
RP
112
113/* This array holds the chars that only start a comment at the beginning of
114 a line. If the line seems to have the form '# 123 filename'
115 .line and .file directives will appear in the pre-processed output */
116/* Note that input_file.c hand checks for '#' at the beginning of the
117 first line of the input file. This is because the compiler outputs
118 #NO_APP at the beginning of its output. */
119/* Also note that comments like this one will always work */
587c4264 120const char line_comment_chars[] = "#";
fecd2382
RP
121
122/* We needed an unused char for line separation to work around the
123 lack of macros, using sed and such. */
587c4264 124const char line_separator_chars[] = "@";
fecd2382
RP
125
126/* Chars that can be used to separate mant from exp in floating point nums */
587c4264 127const char EXP_CHARS[] = "eE";
fecd2382
RP
128
129/* Chars that mean this number is a floating point constant */
130/* As in 0f12.456 */
131/* or 0d1.2345e12 */
587c4264 132const char FLT_CHARS[] = "rRsSfFdDxXpP";
fecd2382
RP
133
134/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
135 changed in read.c . Ideally it shouldn't have to know about it at all,
136 but nothing is ideal around here.
a39116f1 137 */
fecd2382
RP
138
139static unsigned char octal[256];
140#define isoctal(c) octal[c]
355afbcd 141static unsigned char toHex[256];
fecd2382
RP
142
143/*
355afbcd 144 * anull bit - causes the branch delay slot instructions to not be executed
fecd2382
RP
145 */
146#define ANNUL (1 << 29)
147
148static void
355afbcd 149s_use ()
fecd2382 150{
355afbcd
KR
151
152 if (strncmp (input_line_pointer, ".text", 5) == 0)
153 {
154 input_line_pointer += 5;
155 s_text ();
156 return;
157 }
158 if (strncmp (input_line_pointer, ".data", 5) == 0)
159 {
160 input_line_pointer += 5;
161 s_data ();
162 return;
163 }
164 if (strncmp (input_line_pointer, ".data1", 6) == 0)
165 {
166 input_line_pointer += 6;
167 s_data1 ();
168 return;
169 }
170 /* Literals can't go in the text segment because you can't read
a39116f1 171 from instruction memory on some 29k's. So, into initialized data. */
355afbcd
KR
172 if (strncmp (input_line_pointer, ".lit", 4) == 0)
173 {
174 input_line_pointer += 4;
175 subseg_new (SEG_DATA, 200);
176 demand_empty_rest_of_line ();
177 return;
178 }
179
180 as_bad ("Unknown segment type");
181 demand_empty_rest_of_line ();
182 return;
fecd2382
RP
183}
184
185static void
355afbcd 186s_data1 ()
fecd2382 187{
355afbcd
KR
188 subseg_new (SEG_DATA, 1);
189 demand_empty_rest_of_line ();
190 return;
fecd2382
RP
191}
192
193/* Install symbol definition that maps REGNAME to REGNO.
194 FIXME-SOON: These are not recognized in mixed case. */
195
196static void
355afbcd
KR
197insert_sreg (regname, regnum)
198 char *regname;
199 int regnum;
fecd2382 200{
355afbcd 201 /* FIXME-SOON, put something in these syms so they won't be output to the symbol
fecd2382 202 table of the resulting object file. */
355afbcd
KR
203
204 /* Must be large enough to hold the names of the special registers. */
205 char buf[80];
206 int i;
207
208 symbol_table_insert (symbol_new (regname, SEG_REGISTER, regnum, &zero_address_frag));
209 for (i = 0; regname[i]; i++)
210 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
211 buf[i] = '\0';
212
213 symbol_table_insert (symbol_new (buf, SEG_REGISTER, regnum, &zero_address_frag));
214} /* insert_sreg() */
fecd2382
RP
215
216/* Install symbol definitions for assorted special registers.
217 See ASM29K Ref page 2-9. */
218
355afbcd
KR
219void
220define_some_regs ()
221{
fecd2382 222#define SREG 256
355afbcd
KR
223
224 /* Protected special-purpose register names */
225 insert_sreg ("vab", SREG + 0);
226 insert_sreg ("ops", SREG + 1);
227 insert_sreg ("cps", SREG + 2);
228 insert_sreg ("cfg", SREG + 3);
229 insert_sreg ("cha", SREG + 4);
230 insert_sreg ("chd", SREG + 5);
231 insert_sreg ("chc", SREG + 6);
232 insert_sreg ("rbp", SREG + 7);
233 insert_sreg ("tmc", SREG + 8);
234 insert_sreg ("tmr", SREG + 9);
235 insert_sreg ("pc0", SREG + 10);
236 insert_sreg ("pc1", SREG + 11);
237 insert_sreg ("pc2", SREG + 12);
238 insert_sreg ("mmu", SREG + 13);
239 insert_sreg ("lru", SREG + 14);
240
241 /* Unprotected special-purpose register names */
242 insert_sreg ("ipc", SREG + 128);
243 insert_sreg ("ipa", SREG + 129);
244 insert_sreg ("ipb", SREG + 130);
245 insert_sreg ("q", SREG + 131);
246 insert_sreg ("alu", SREG + 132);
247 insert_sreg ("bp", SREG + 133);
248 insert_sreg ("fc", SREG + 134);
249 insert_sreg ("cr", SREG + 135);
250 insert_sreg ("fpe", SREG + 160);
251 insert_sreg ("inte", SREG + 161);
252 insert_sreg ("fps", SREG + 162);
253 /* "", SREG+163); Reserved */
254 insert_sreg ("exop", SREG + 164);
255} /* define_some_regs() */
fecd2382
RP
256
257/* This function is called once, at assembler startup time. It should
258 set up all the tables, etc. that the MD part of the assembler will need. */
259void
355afbcd 260md_begin ()
fecd2382 261{
355afbcd
KR
262 register char *retval = NULL;
263 int lose = 0;
264 register int skipnext = 0;
265 register unsigned int i;
266 register char *strend, *strend2;
267
268 /* Hash up all the opcodes for fast use later. */
269
270 op_hash = hash_new ();
271 if (op_hash == NULL)
272 as_fatal ("Virtual memory exhausted");
273
274 for (i = 0; i < num_opcodes; i++)
275 {
276 const char *name = machine_opcodes[i].name;
277
278 if (skipnext)
279 {
280 skipnext = 0;
281 continue;
282 }
283
284 /* Hack to avoid multiple opcode entries. We pre-locate all the
a39116f1 285 variations (b/i field and P/A field) and handle them. */
355afbcd
KR
286
287 if (!strcmp (name, machine_opcodes[i + 1].name))
288 {
289 if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode)
290 != 0x01000000)
291 goto bad_table;
292 strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1;
293 strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1;
294 switch (*strend)
295 {
296 case 'b':
297 if (*strend2 != 'i')
298 goto bad_table;
299 break;
300 case 'i':
301 if (*strend2 != 'b')
302 goto bad_table;
303 break;
304 case 'P':
305 if (*strend2 != 'A')
306 goto bad_table;
307 break;
308 case 'A':
309 if (*strend2 != 'P')
310 goto bad_table;
311 break;
312 default:
313 bad_table:
314 fprintf (stderr, "internal error: can't handle opcode %s\n", name);
315 lose = 1;
a39116f1 316 }
355afbcd
KR
317
318 /* OK, this is an i/b or A/P pair. We skip the higher-valued one,
319 and let the code for operand checking handle OR-ing in the bit. */
320 if (machine_opcodes[i].opcode & 1)
321 continue;
322 else
323 skipnext = 1;
324 }
325
326 retval = hash_insert (op_hash, name, &machine_opcodes[i]);
327 if (retval != NULL && *retval != '\0')
328 {
329 fprintf (stderr, "internal error: can't hash `%s': %s\n",
330 machine_opcodes[i].name, retval);
331 lose = 1;
332 }
333 }
334
335 if (lose)
336 as_fatal ("Broken assembler. No assembly attempted.");
337
338 for (i = '0'; i < '8'; ++i)
339 octal[i] = 1;
340 for (i = '0'; i <= '9'; ++i)
341 toHex[i] = i - '0';
342 for (i = 'a'; i <= 'f'; ++i)
343 toHex[i] = i + 10 - 'a';
344 for (i = 'A'; i <= 'F'; ++i)
345 toHex[i] = i + 10 - 'A';
346
347 define_some_regs ();
fecd2382
RP
348}
349
355afbcd
KR
350void
351md_end ()
352{
353 return;
fecd2382
RP
354}
355
356/* Assemble a single instruction. Its label has already been handled
357 by the generic front end. We just parse opcode and operands, and
358 produce the bytes of data and relocation. */
359
355afbcd
KR
360void
361md_assemble (str)
362 char *str;
fecd2382 363{
355afbcd
KR
364 char *toP;
365 /* !!!! int rsd; */
366
367 know (str);
368 machine_ip (str);
369 toP = frag_more (4);
370 /* put out the opcode */
371 md_number_to_chars (toP, the_insn.opcode, 4);
372
373 /* put out the symbol-dependent stuff */
374 if (the_insn.reloc != NO_RELOC)
375 {
376 fix_new (
377 frag_now, /* which frag */
378 (toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */
379 4, /* size */
380 the_insn.exp.X_add_symbol,
381 the_insn.exp.X_subtract_symbol,
382 the_insn.exp.X_add_number,
383 the_insn.pcrel,
384 the_insn.reloc
385 );
386 }
fecd2382
RP
387}
388
389char *
355afbcd
KR
390parse_operand (s, operandp)
391 char *s;
392 expressionS *operandp;
fecd2382 393{
c58dbabf
SC
394 char *save = input_line_pointer;
395 char *new;
396 segT seg;
355afbcd 397
c58dbabf
SC
398 input_line_pointer = s;
399 seg = expr (0, operandp);
400 new = input_line_pointer;
401 input_line_pointer = save;
402
355afbcd
KR
403 if (seg == SEG_ABSENT)
404 as_bad ("Missing operand");
c58dbabf 405 return new;
fecd2382
RP
406}
407
355afbcd 408/* Instruction parsing. Takes a string containing the opcode.
fecd2382
RP
409 Operands are at input_line_pointer. Output is in the_insn.
410 Warnings or errors are generated. */
a39116f1 411
fecd2382 412static void
355afbcd
KR
413machine_ip (str)
414 char *str;
fecd2382 415{
355afbcd
KR
416 char *s;
417 const char *args;
418 /* !!!! char c; */
419 /* !!!! unsigned long i; */
420 struct machine_opcode *insn;
421 char *argsStart;
422 unsigned long opcode;
423 /* !!!! unsigned int mask; */
424 expressionS the_operand;
425 expressionS *operand = &the_operand;
426 unsigned int reg;
427
428 /* Must handle `div0' opcode. */
429 s = str;
430 if (isalpha (*s))
431 for (; isalnum (*s); ++s)
432 if (isupper (*s))
433 *s = tolower (*s);
434
435 switch (*s)
436 {
437 case '\0':
438 break;
439
440 case ' ': /* FIXME-SOMEDAY more whitespace */
441 *s++ = '\0';
442 break;
443
444 default:
445 as_bad ("Unknown opcode: `%s'", str);
446 return;
447 }
448 if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL)
449 {
450 as_bad ("Unknown opcode `%s'.", str);
451 return;
452 }
453 argsStart = s;
454 opcode = insn->opcode;
455 memset (&the_insn, '\0', sizeof (the_insn));
456 the_insn.reloc = NO_RELOC;
457
458 /*
a39116f1
RP
459 * Build the opcode, checking as we go to make
460 * sure that the operands match.
461 *
462 * If an operand matches, we modify the_insn or opcode appropriately,
463 * and do a "continue". If an operand fails to match, we "break".
464 */
355afbcd
KR
465 if (insn->args[0] != '\0')
466 s = parse_operand (s, operand); /* Prime the pump */
467
468 for (args = insn->args;; ++args)
469 {
470 switch (*args)
471 {
472
473 case '\0': /* end of args */
474 if (*s == '\0')
475 {
476 /* We are truly done. */
477 the_insn.opcode = opcode;
478 return;
479 }
480 as_bad ("Too many operands: %s", s);
481 break;
482
483 case ',': /* Must match a comma */
484 if (*s++ == ',')
485 {
486 s = parse_operand (s, operand); /* Parse next opnd */
487 continue;
488 }
489 break;
490
491 case 'v': /* Trap numbers (immediate field) */
492 if (operand->X_seg == SEG_ABSOLUTE)
493 {
494 if (operand->X_add_number < 256)
495 {
496 opcode |= (operand->X_add_number << 16);
497 continue;
498 }
499 else
500 {
501 as_bad ("Immediate value of %d is too large",
502 operand->X_add_number);
503 continue;
504 }
505 }
506 the_insn.reloc = RELOC_8;
507 the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
508 the_insn.exp = *operand;
509 continue;
510
511 case 'b': /* A general register or 8-bit immediate */
512 case 'i':
513 /* We treat the two cases identically since we mashed
a39116f1 514 them together in the opcode table. */
355afbcd
KR
515 if (operand->X_seg == SEG_REGISTER)
516 goto general_reg;
517
518 opcode |= IMMEDIATE_BIT;
519 if (operand->X_seg == SEG_ABSOLUTE)
520 {
521 if (operand->X_add_number < 256)
522 {
523 opcode |= operand->X_add_number;
524 continue;
525 }
526 else
527 {
528 as_bad ("Immediate value of %d is too large",
529 operand->X_add_number);
530 continue;
531 }
532 }
533 the_insn.reloc = RELOC_8;
534 the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
535 the_insn.exp = *operand;
536 continue;
537
538 case 'a': /* next operand must be a register */
539 case 'c':
540 general_reg:
541 /* lrNNN or grNNN or %%expr or a user-def register name */
542 if (operand->X_seg != SEG_REGISTER)
543 break; /* Only registers */
544 know (operand->X_add_symbol == 0);
545 know (operand->X_subtract_symbol == 0);
546 reg = operand->X_add_number;
547 if (reg >= SREG)
548 break; /* No special registers */
549
550 /*
a39116f1
RP
551 * Got the register, now figure out where
552 * it goes in the opcode.
553 */
355afbcd
KR
554 switch (*args)
555 {
556 case 'a':
557 opcode |= reg << 8;
558 continue;
559
560 case 'b':
561 case 'i':
562 opcode |= reg;
563 continue;
564
565 case 'c':
566 opcode |= reg << 16;
567 continue;
568 }
569 as_fatal ("failed sanity check.");
570 break;
571
572 case 'x': /* 16 bit constant, zero-extended */
573 case 'X': /* 16 bit constant, one-extended */
574 if (operand->X_seg == SEG_ABSOLUTE)
575 {
576 opcode |= (operand->X_add_number & 0xFF) << 0 |
577 ((operand->X_add_number & 0xFF00) << 8);
578 continue;
579 }
580 the_insn.reloc = RELOC_CONST;
581 the_insn.exp = *operand;
582 continue;
583
584 case 'h':
585 if (operand->X_seg == SEG_ABSOLUTE)
586 {
587 opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
588 (((unsigned long) operand->X_add_number
589 /* avoid sign ext */ & 0xFF000000) >> 8);
590 continue;
591 }
592 the_insn.reloc = RELOC_CONSTH;
593 the_insn.exp = *operand;
594 continue;
595
596 case 'P': /* PC-relative jump address */
597 case 'A': /* Absolute jump address */
598 /* These two are treated together since we folded the
a39116f1 599 opcode table entries together. */
355afbcd
KR
600 if (operand->X_seg == SEG_ABSOLUTE)
601 {
602 opcode |= ABSOLUTE_BIT |
603 (operand->X_add_number & 0x0003FC00) << 6 |
604 ((operand->X_add_number & 0x000003FC) >> 2);
605 continue;
606 }
607 the_insn.reloc = RELOC_JUMPTARG;
608 the_insn.exp = *operand;
609 the_insn.pcrel = 1; /* Assume PC-relative jump */
610 /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
611 continue;
612
613 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
614 if (operand->X_seg == SEG_ABSOLUTE)
615 {
616 if (operand->X_add_number == 0)
617 continue;
618 if (operand->X_add_number == 1)
619 {
620 opcode |= CE_BIT;
621 continue;
fecd2382 622 }
355afbcd
KR
623 }
624 break;
625
626 case 'n': /* Control bits for LOAD/STORE instructions */
627 if (operand->X_seg == SEG_ABSOLUTE &&
628 operand->X_add_number < 128)
629 {
630 opcode |= (operand->X_add_number << 16);
631 continue;
632 }
633 break;
634
635 case 's': /* Special register number */
636 if (operand->X_seg != SEG_REGISTER)
637 break; /* Only registers */
638 if (operand->X_add_number < SREG)
639 break; /* Not a special register */
640 opcode |= (operand->X_add_number & 0xFF) << 8;
641 continue;
642
643 case 'u': /* UI bit of CONVERT */
644 if (operand->X_seg == SEG_ABSOLUTE)
645 {
646 if (operand->X_add_number == 0)
647 continue;
648 if (operand->X_add_number == 1)
649 {
650 opcode |= UI_BIT;
651 continue;
652 }
653 }
654 break;
655
656 case 'r': /* RND bits of CONVERT */
657 if (operand->X_seg == SEG_ABSOLUTE &&
658 operand->X_add_number < 8)
659 {
660 opcode |= operand->X_add_number << 4;
661 continue;
662 }
663 break;
664
665 case 'd': /* FD bits of CONVERT */
666 if (operand->X_seg == SEG_ABSOLUTE &&
667 operand->X_add_number < 4)
668 {
669 opcode |= operand->X_add_number << 2;
670 continue;
671 }
672 break;
673
674
675 case 'f': /* FS bits of CONVERT */
676 if (operand->X_seg == SEG_ABSOLUTE &&
677 operand->X_add_number < 4)
678 {
679 opcode |= operand->X_add_number << 0;
680 continue;
681 }
682 break;
683
684 case 'C':
685 if (operand->X_seg == SEG_ABSOLUTE &&
686 operand->X_add_number < 4)
687 {
688 opcode |= operand->X_add_number << 16;
689 continue;
690 }
691 break;
692
693 case 'F':
694 if (operand->X_seg == SEG_ABSOLUTE &&
695 operand->X_add_number < 16)
696 {
697 opcode |= operand->X_add_number << 18;
698 continue;
699 }
700 break;
701
702 default:
703 BAD_CASE (*args);
fecd2382 704 }
355afbcd
KR
705 /* Types or values of args don't match. */
706 as_bad ("Invalid operands");
707 return;
708 }
fecd2382
RP
709}
710
711/*
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712 This is identical to the md_atof in m68k.c. I think this is right,
713 but I'm not sure.
355afbcd 714
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715 Turn a string in input_line_pointer into a floating point constant of type
716 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
717 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
718 */
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719
720/* Equal to MAX_PRECISION in atof-ieee.c */
721#define MAX_LITTLENUMS 6
722
723char *
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724md_atof (type, litP, sizeP)
725 char type;
726 char *litP;
727 int *sizeP;
fecd2382 728{
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729 int prec;
730 LITTLENUM_TYPE words[MAX_LITTLENUMS];
731 LITTLENUM_TYPE *wordP;
732 char *t;
733
734 switch (type)
735 {
736
737 case 'f':
738 case 'F':
739 case 's':
740 case 'S':
741 prec = 2;
742 break;
743
744 case 'd':
745 case 'D':
746 case 'r':
747 case 'R':
748 prec = 4;
749 break;
750
751 case 'x':
752 case 'X':
753 prec = 6;
754 break;
755
756 case 'p':
757 case 'P':
758 prec = 6;
759 break;
760
761 default:
762 *sizeP = 0;
763 return "Bad call to MD_ATOF()";
764 }
765 t = atof_ieee (input_line_pointer, type, words);
766 if (t)
767 input_line_pointer = t;
768 *sizeP = prec * sizeof (LITTLENUM_TYPE);
769 for (wordP = words; prec--;)
770 {
771 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
772 litP += sizeof (LITTLENUM_TYPE);
773 }
774 return ""; /* Someone should teach Dean about null pointers */
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775}
776
777/*
778 * Write out big-endian.
779 */
780void
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781md_number_to_chars (buf, val, n)
782 char *buf;
783 long val;
784 int n;
fecd2382 785{
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786
787 switch (n)
788 {
789
790 case 4:
791 *buf++ = val >> 24;
792 *buf++ = val >> 16;
793 case 2:
794 *buf++ = val >> 8;
795 case 1:
796 *buf = val;
797 break;
798
799 default:
800 as_fatal ("failed sanity check.");
801 }
802 return;
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803}
804
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805void
806md_apply_fix (fixP, val)
807 fixS *fixP;
808 long val;
fecd2382 809{
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810 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
811
812 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
813
814
815 know (fixP->fx_size == 4);
816 know (fixP->fx_r_type < NO_RELOC);
817
818 /*
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819 * This is a hack. There should be a better way to
820 * handle this.
821 */
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822 if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy)
823 {
824 val += fixP->fx_where + fixP->fx_frag->fr_address;
825 }
826
827 switch (fixP->fx_r_type)
828 {
829
830 case RELOC_32:
831 buf[0] = val >> 24;
832 buf[1] = val >> 16;
833 buf[2] = val >> 8;
834 buf[3] = val;
835 break;
836
837 case RELOC_8:
838 buf[0] = val;
839 break;
840
841 case RELOC_WDISP30:
842 val = (val >>= 2) + 1;
843 buf[0] |= (val >> 24) & 0x3f;
844 buf[1] = (val >> 16);
845 buf[2] = val >> 8;
846 buf[3] = val;
847 break;
848
849 case RELOC_HI22:
850 buf[1] |= (val >> 26) & 0x3f;
851 buf[2] = val >> 18;
852 buf[3] = val >> 10;
853 break;
854
855 case RELOC_LO10:
856 buf[2] |= (val >> 8) & 0x03;
857 buf[3] = val;
858 break;
859
860 case RELOC_BASE13:
861 buf[2] |= (val >> 8) & 0x1f;
862 buf[3] = val;
863 break;
864
865 case RELOC_WDISP22:
866 val = (val >>= 2) + 1;
867 /* FALLTHROUGH */
868 case RELOC_BASE22:
869 buf[1] |= (val >> 16) & 0x3f;
870 buf[2] = val >> 8;
871 buf[3] = val;
872 break;
873
fecd2382 874#if 0
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875 case RELOC_PC10:
876 case RELOC_PC22:
877 case RELOC_JMP_TBL:
878 case RELOC_SEGOFF16:
879 case RELOC_GLOB_DAT:
880 case RELOC_JMP_SLOT:
881 case RELOC_RELATIVE:
fecd2382 882#endif
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883 case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
884 buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
885 buf[3] = val >> 2;
886 break;
887
888 case RELOC_CONST: /* 00XX00XX pattern in a word */
889 buf[1] = val >> 8; /* Holds bits 0000XXXX */
890 buf[3] = val;
891 break;
892
893 case RELOC_CONSTH: /* 00XX00XX pattern in a word */
894 buf[1] = val >> 24; /* Holds bits XXXX0000 */
895 buf[3] = val >> 16;
896 break;
897
898 case NO_RELOC:
899 default:
900 as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type);
901 break;
902 }
903 return;
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904}
905
906#ifdef OBJ_COFF
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907short
908tc_coff_fix2rtype (fixP)
909 fixS *fixP;
fecd2382 910{
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911
912 switch (fixP->fx_r_type)
913 {
914 case RELOC_32:
915 return (R_WORD);
916 case RELOC_8:
917 return (R_BYTE);
918 case RELOC_CONST:
919 return (R_ILOHALF);
920 case RELOC_CONSTH:
921 return (R_IHIHALF);
922 case RELOC_JUMPTARG:
923 return (R_IREL);
924 default:
925 printf ("need %o3\n", fixP->fx_r_type);
926 abort ();
927 } /* switch on type */
928
929 return (0);
930} /* tc_coff_fix2rtype() */
931
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932#endif /* OBJ_COFF */
933
934/* should never be called for sparc */
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935void
936md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
937 char *ptr;
938 long from_addr, to_addr;
939 fragS *frag;
940 symbolS *to_symbol;
fecd2382 941{
355afbcd 942 as_fatal ("a29k_create_short_jmp\n");
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943}
944
fecd2382 945/* should never be called for 29k */
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946void
947md_convert_frag (headers, fragP)
948 object_headers *headers;
949 register fragS *fragP;
fecd2382 950{
355afbcd 951 as_fatal ("sparc_convert_frag\n");
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952}
953
954/* should never be called for 29k */
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955void
956md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
957 char *ptr;
958 long from_addr;
959 long to_addr;
960 fragS *frag;
961 symbolS *to_symbol;
fecd2382 962{
355afbcd 963 as_fatal ("sparc_create_long_jump\n");
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964}
965
542e1629 966/* should never be called for a29k */
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967int
968md_estimate_size_before_relax (fragP, segtype)
969 register fragS *fragP;
970 segT segtype;
fecd2382 971{
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972 as_fatal ("sparc_estimate_size_before_relax\n");
973 return (0);
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974}
975
976#if 0
977/* for debugging only */
978static void
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979print_insn (insn)
980 struct machine_it *insn;
fecd2382 981{
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982 char *Reloc[] =
983 {
984 "RELOC_8",
985 "RELOC_16",
986 "RELOC_32",
987 "RELOC_DISP8",
988 "RELOC_DISP16",
989 "RELOC_DISP32",
990 "RELOC_WDISP30",
991 "RELOC_WDISP22",
992 "RELOC_HI22",
993 "RELOC_22",
994 "RELOC_13",
995 "RELOC_LO10",
996 "RELOC_SFA_BASE",
997 "RELOC_SFA_OFF13",
998 "RELOC_BASE10",
999 "RELOC_BASE13",
1000 "RELOC_BASE22",
1001 "RELOC_PC10",
1002 "RELOC_PC22",
1003 "RELOC_JMP_TBL",
1004 "RELOC_SEGOFF16",
1005 "RELOC_GLOB_DAT",
1006 "RELOC_JMP_SLOT",
1007 "RELOC_RELATIVE",
1008 "NO_RELOC"
1009 };
1010
1011 if (insn->error)
1012 {
1013 fprintf (stderr, "ERROR: %s\n");
1014 }
1015 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
1016 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
1017 fprintf (stderr, "exp = {\n");
1018 fprintf (stderr, "\t\tX_add_symbol = %s\n",
1019 insn->exp.X_add_symbol ?
1020 (S_GET_NAME (insn->exp.X_add_symbol) ?
1021 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
1022 fprintf (stderr, "\t\tX_sub_symbol = %s\n",
1023 insn->exp.X_subtract_symbol ?
1024 (S_GET_NAME (insn->exp.X_subtract_symbol) ?
1025 S_GET_NAME (insn->exp.X_subtract_symbol) : "???") : "0");
1026 fprintf (stderr, "\t\tX_add_number = %d\n",
1027 insn->exp.X_add_number);
1028 fprintf (stderr, "}\n");
1029 return;
fecd2382 1030}
355afbcd 1031
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1032#endif
1033
a79c6033 1034/* Translate internal representation of relocation info to target format.
355afbcd 1035
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1036 On sparc/29k: first 4 bytes are normal unsigned long address, next three
1037 bytes are index, most sig. byte first. Byte 7 is broken up with
1038 bit 7 as external, bits 6 & 5 unused, and the lower
1039 five bits as relocation type. Next 4 bytes are long addend. */
1040/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
fecd2382 1041
a79c6033 1042#ifdef OBJ_AOUT
fecd2382 1043
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1044void
1045tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1046 char *where;
1047 fixS *fixP;
1048 relax_addressT segment_address_in_file;
a79c6033 1049{
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1050 long r_symbolnum;
1051
1052 know (fixP->fx_r_type < NO_RELOC);
1053 know (fixP->fx_addsy != NULL);
1054
1055 md_number_to_chars (where,
1056 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1057 4);
1058
1059 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
1060 ? S_GET_TYPE (fixP->fx_addsy)
1061 : fixP->fx_addsy->sy_number);
1062
1063 where[4] = (r_symbolnum >> 16) & 0x0ff;
1064 where[5] = (r_symbolnum >> 8) & 0x0ff;
1065 where[6] = r_symbolnum & 0x0ff;
1066 where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
1067 /* Also easy */
1068 md_number_to_chars (&where[8], fixP->fx_addnumber, 4);
1069
1070 return;
1071} /* tc_aout_fix_to_chars() */
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1072
1073#endif /* OBJ_AOUT */
1074
1075int
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1076md_parse_option (argP, cntP, vecP)
1077 char **argP;
1078 int *cntP;
1079 char ***vecP;
fecd2382 1080{
355afbcd 1081 return (0);
fecd2382
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1082}
1083
1084
1085/* Default the values of symbols known that should be "predefined". We
1086 don't bother to predefine them unless you actually use one, since there
1087 are a lot of them. */
1088
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1089symbolS *
1090md_undefined_symbol (name)
1091 char *name;
fecd2382 1092{
355afbcd
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1093 long regnum;
1094 char testbuf[5 + /*SLOP*/ 5];
1095
1096 if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
1097 {
1098 /* Perhaps a global or local register name */
1099 if (name[1] == 'r' || name[1] == 'R')
1100 {
1101 /* Parse the number, make sure it has no extra zeroes or trailing
a39116f1 1102 chars */
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1103 regnum = atol (&name[2]);
1104 if (regnum > 127)
1105 return 0;
1106 sprintf (testbuf, "%ld", regnum);
1107 if (strcmp (testbuf, &name[2]) != 0)
1108 return 0; /* gr007 or lr7foo or whatever */
1109
1110 /* We have a wiener! Define and return a new symbol for it. */
1111 if (name[0] == 'l' || name[0] == 'L')
1112 regnum += 128;
1113 return (symbol_new (name, SEG_REGISTER, regnum, &zero_address_frag));
1114 }
1115 }
1116
1117 return 0;
fecd2382
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1118}
1119
1120/* Parse an operand that is machine-specific. */
1121
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1122void
1123md_operand (expressionP)
1124 expressionS *expressionP;
fecd2382 1125{
355afbcd
KR
1126
1127 if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
1128 {
1129 /* We have a numeric register expression. No biggy. */
1130 input_line_pointer += 2; /* Skip %% */
1131 (void) expression (expressionP);
1132 if (expressionP->X_seg != SEG_ABSOLUTE
1133 || expressionP->X_add_number > 255)
1134 as_bad ("Invalid expression after %%%%\n");
1135 expressionP->X_seg = SEG_REGISTER;
1136 }
1137 else if (input_line_pointer[0] == '&')
1138 {
1139 /* We are taking the 'address' of a register...this one is not
a39116f1
RP
1140 in the manual, but it *is* in traps/fpsymbol.h! What they
1141 seem to want is the register number, as an absolute number. */
355afbcd
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1142 input_line_pointer++; /* Skip & */
1143 (void) expression (expressionP);
1144 if (expressionP->X_seg != SEG_REGISTER)
1145 as_bad ("Invalid register in & expression");
1146 else
1147 expressionP->X_seg = SEG_ABSOLUTE;
1148 }
fecd2382
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1149}
1150
1151/* Round up a section size to the appropriate boundary. */
1152long
355afbcd
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1153md_section_align (segment, size)
1154 segT segment;
1155 long size;
fecd2382 1156{
355afbcd 1157 return size; /* Byte alignment is fine */
fecd2382
RP
1158}
1159
1160/* Exactly what point is a PC-relative offset relative TO?
1161 On the 29000, they're relative to the address of the instruction,
1162 which we have set up as the address of the fixup too. */
355afbcd
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1163long
1164md_pcrel_from (fixP)
1165 fixS *fixP;
fecd2382 1166{
355afbcd 1167 return fixP->fx_where + fixP->fx_frag->fr_address;
fecd2382
RP
1168}
1169
1170/*
1171 * Local Variables:
1172 * comment-column: 0
1173 * End:
1174 */
1175
1176/* end of tc-a29k.c */
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