Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
5ac34ac3 | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
d6f72574 | 24 | #include "ctype.h" |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
355afbcd | 35 | const relax_typeS md_relax_table[] = |
604633ae ILT |
36 | { |
37 | { 0, 0, 0, 0 } | |
38 | }; | |
fecd2382 RP |
39 | |
40 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
41 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
42 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
43 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
44 | ||
45 | /* handle of the OPCODE hash table */ | |
46 | static struct hash_control *op_hash = NULL; | |
47 | ||
355afbcd KR |
48 | struct machine_it |
49 | { | |
50 | char *error; | |
51 | unsigned long opcode; | |
52 | struct nlist *nlistp; | |
53 | expressionS exp; | |
54 | int pcrel; | |
55 | int reloc_offset; /* Offset of reloc within insn */ | |
56 | ||
57 | int reloc; | |
355afbcd | 58 | } |
355afbcd | 59 | the_insn; |
fecd2382 | 60 | |
a938b1d6 ILT |
61 | static void machine_ip PARAMS ((char *str)); |
62 | /* static void print_insn PARAMS ((struct machine_it *insn)); */ | |
604633ae | 63 | #ifndef OBJ_COFF |
a938b1d6 | 64 | static void s_data1 PARAMS ((void)); |
604633ae ILT |
65 | static void s_use PARAMS ((int)); |
66 | #endif | |
fecd2382 RP |
67 | |
68 | const pseudo_typeS | |
9956df6a | 69 | md_pseudo_table[] = |
355afbcd KR |
70 | { |
71 | {"align", s_align_bytes, 4}, | |
72 | {"block", s_space, 0}, | |
73 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
74 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
75 | {"space", s_ignore, 0}, /* Listing control */ | |
76 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 77 | #ifndef OBJ_COFF |
9956df6a | 78 | /* We can do this right with coff. */ |
355afbcd | 79 | {"use", s_use, 0}, |
c58dbabf | 80 | #endif |
355afbcd KR |
81 | {"word", cons, 4}, |
82 | {NULL, 0, 0}, | |
83 | }; | |
fecd2382 RP |
84 | |
85 | int md_short_jump_size = 4; | |
86 | int md_long_jump_size = 4; | |
57574979 SC |
87 | #if defined(BFD_HEADERS) |
88 | #ifdef RELSZ | |
49864cfa | 89 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 90 | #else |
49864cfa | 91 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
92 | #endif |
93 | #else | |
49864cfa | 94 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 95 | #endif |
fecd2382 RP |
96 | |
97 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 98 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 99 | const char comment_chars[] = ";"; |
fecd2382 RP |
100 | |
101 | /* This array holds the chars that only start a comment at the beginning of | |
102 | a line. If the line seems to have the form '# 123 filename' | |
103 | .line and .file directives will appear in the pre-processed output */ | |
104 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
105 | first line of the input file. This is because the compiler outputs | |
106 | #NO_APP at the beginning of its output. */ | |
107 | /* Also note that comments like this one will always work */ | |
587c4264 | 108 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
109 | |
110 | /* We needed an unused char for line separation to work around the | |
111 | lack of macros, using sed and such. */ | |
587c4264 | 112 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
113 | |
114 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 115 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
116 | |
117 | /* Chars that mean this number is a floating point constant */ | |
118 | /* As in 0f12.456 */ | |
119 | /* or 0d1.2345e12 */ | |
587c4264 | 120 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
121 | |
122 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9956df6a KR |
123 | changed in read.c. Ideally it shouldn't have to know about it at |
124 | all, but nothing is ideal around here. */ | |
fecd2382 RP |
125 | |
126 | static unsigned char octal[256]; | |
127 | #define isoctal(c) octal[c] | |
355afbcd | 128 | static unsigned char toHex[256]; |
fecd2382 RP |
129 | |
130 | /* | |
355afbcd | 131 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
132 | */ |
133 | #define ANNUL (1 << 29) | |
134 | ||
604633ae ILT |
135 | #ifndef OBJ_COFF |
136 | ||
fecd2382 | 137 | static void |
604633ae ILT |
138 | s_use (ignore) |
139 | int ignore; | |
fecd2382 | 140 | { |
355afbcd KR |
141 | if (strncmp (input_line_pointer, ".text", 5) == 0) |
142 | { | |
143 | input_line_pointer += 5; | |
a938b1d6 | 144 | s_text (0); |
355afbcd KR |
145 | return; |
146 | } | |
147 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
148 | { | |
149 | input_line_pointer += 5; | |
a938b1d6 | 150 | s_data (0); |
355afbcd KR |
151 | return; |
152 | } | |
153 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
154 | { | |
155 | input_line_pointer += 6; | |
156 | s_data1 (); | |
157 | return; | |
158 | } | |
9956df6a KR |
159 | /* Literals can't go in the text segment because you can't read from |
160 | instruction memory on some 29k's. So, into initialized data. */ | |
355afbcd KR |
161 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
162 | { | |
163 | input_line_pointer += 4; | |
604633ae | 164 | subseg_set (SEG_DATA, 200); |
355afbcd KR |
165 | demand_empty_rest_of_line (); |
166 | return; | |
167 | } | |
168 | ||
169 | as_bad ("Unknown segment type"); | |
170 | demand_empty_rest_of_line (); | |
171 | return; | |
fecd2382 RP |
172 | } |
173 | ||
174 | static void | |
355afbcd | 175 | s_data1 () |
fecd2382 | 176 | { |
604633ae | 177 | subseg_set (SEG_DATA, 1); |
355afbcd KR |
178 | demand_empty_rest_of_line (); |
179 | return; | |
fecd2382 RP |
180 | } |
181 | ||
604633ae ILT |
182 | #endif /* OBJ_COFF */ |
183 | ||
fecd2382 RP |
184 | /* Install symbol definition that maps REGNAME to REGNO. |
185 | FIXME-SOON: These are not recognized in mixed case. */ | |
186 | ||
187 | static void | |
355afbcd KR |
188 | insert_sreg (regname, regnum) |
189 | char *regname; | |
190 | int regnum; | |
fecd2382 | 191 | { |
9956df6a KR |
192 | /* FIXME-SOON, put something in these syms so they won't be output |
193 | to the symbol table of the resulting object file. */ | |
355afbcd KR |
194 | |
195 | /* Must be large enough to hold the names of the special registers. */ | |
196 | char buf[80]; | |
197 | int i; | |
198 | ||
4f0bccc7 ILT |
199 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, |
200 | &zero_address_frag)); | |
355afbcd KR |
201 | for (i = 0; regname[i]; i++) |
202 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
203 | buf[i] = '\0'; | |
204 | ||
4f0bccc7 ILT |
205 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, |
206 | &zero_address_frag)); | |
9956df6a | 207 | } |
fecd2382 RP |
208 | |
209 | /* Install symbol definitions for assorted special registers. | |
210 | See ASM29K Ref page 2-9. */ | |
211 | ||
355afbcd KR |
212 | void |
213 | define_some_regs () | |
214 | { | |
fecd2382 | 215 | #define SREG 256 |
355afbcd KR |
216 | |
217 | /* Protected special-purpose register names */ | |
218 | insert_sreg ("vab", SREG + 0); | |
219 | insert_sreg ("ops", SREG + 1); | |
220 | insert_sreg ("cps", SREG + 2); | |
221 | insert_sreg ("cfg", SREG + 3); | |
222 | insert_sreg ("cha", SREG + 4); | |
223 | insert_sreg ("chd", SREG + 5); | |
224 | insert_sreg ("chc", SREG + 6); | |
225 | insert_sreg ("rbp", SREG + 7); | |
226 | insert_sreg ("tmc", SREG + 8); | |
227 | insert_sreg ("tmr", SREG + 9); | |
228 | insert_sreg ("pc0", SREG + 10); | |
229 | insert_sreg ("pc1", SREG + 11); | |
230 | insert_sreg ("pc2", SREG + 12); | |
231 | insert_sreg ("mmu", SREG + 13); | |
232 | insert_sreg ("lru", SREG + 14); | |
233 | ||
d6f72574 KR |
234 | /* Additional protected special-purpose registers for the 29050 */ |
235 | insert_sreg ("rsn", SREG + 15); | |
236 | insert_sreg ("rma0", SREG + 16); | |
237 | insert_sreg ("rmc0", SREG + 17); | |
238 | insert_sreg ("rma1", SREG + 18); | |
239 | insert_sreg ("rmc1", SREG + 19); | |
240 | insert_sreg ("spc0", SREG + 20); | |
241 | insert_sreg ("spc1", SREG + 21); | |
242 | insert_sreg ("spc2", SREG + 22); | |
243 | insert_sreg ("iba0", SREG + 23); | |
244 | insert_sreg ("ibc0", SREG + 24); | |
245 | insert_sreg ("iba1", SREG + 25); | |
246 | insert_sreg ("ibc1", SREG + 26); | |
247 | ||
355afbcd KR |
248 | /* Unprotected special-purpose register names */ |
249 | insert_sreg ("ipc", SREG + 128); | |
250 | insert_sreg ("ipa", SREG + 129); | |
251 | insert_sreg ("ipb", SREG + 130); | |
252 | insert_sreg ("q", SREG + 131); | |
253 | insert_sreg ("alu", SREG + 132); | |
254 | insert_sreg ("bp", SREG + 133); | |
255 | insert_sreg ("fc", SREG + 134); | |
256 | insert_sreg ("cr", SREG + 135); | |
257 | insert_sreg ("fpe", SREG + 160); | |
258 | insert_sreg ("inte", SREG + 161); | |
259 | insert_sreg ("fps", SREG + 162); | |
260 | /* "", SREG+163); Reserved */ | |
261 | insert_sreg ("exop", SREG + 164); | |
9956df6a | 262 | } |
fecd2382 RP |
263 | |
264 | /* This function is called once, at assembler startup time. It should | |
9956df6a KR |
265 | set up all the tables, etc., that the MD part of the assembler will |
266 | need. */ | |
fecd2382 | 267 | void |
355afbcd | 268 | md_begin () |
fecd2382 | 269 | { |
604633ae | 270 | register const char *retval = NULL; |
355afbcd KR |
271 | int lose = 0; |
272 | register int skipnext = 0; | |
273 | register unsigned int i; | |
274 | register char *strend, *strend2; | |
275 | ||
276 | /* Hash up all the opcodes for fast use later. */ | |
277 | ||
278 | op_hash = hash_new (); | |
355afbcd KR |
279 | |
280 | for (i = 0; i < num_opcodes; i++) | |
281 | { | |
282 | const char *name = machine_opcodes[i].name; | |
283 | ||
284 | if (skipnext) | |
285 | { | |
286 | skipnext = 0; | |
287 | continue; | |
288 | } | |
289 | ||
290 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
9956df6a | 291 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
292 | |
293 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
294 | { | |
295 | if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode) | |
296 | != 0x01000000) | |
297 | goto bad_table; | |
298 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
299 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
300 | switch (*strend) | |
301 | { | |
302 | case 'b': | |
303 | if (*strend2 != 'i') | |
304 | goto bad_table; | |
305 | break; | |
306 | case 'i': | |
307 | if (*strend2 != 'b') | |
308 | goto bad_table; | |
309 | break; | |
310 | case 'P': | |
311 | if (*strend2 != 'A') | |
312 | goto bad_table; | |
313 | break; | |
314 | case 'A': | |
315 | if (*strend2 != 'P') | |
316 | goto bad_table; | |
317 | break; | |
318 | default: | |
319 | bad_table: | |
9956df6a KR |
320 | fprintf (stderr, "internal error: can't handle opcode %s\n", |
321 | name); | |
355afbcd | 322 | lose = 1; |
a39116f1 | 323 | } |
355afbcd | 324 | |
9956df6a KR |
325 | /* OK, this is an i/b or A/P pair. We skip the |
326 | higher-valued one, and let the code for operand checking | |
327 | handle OR-ing in the bit. */ | |
355afbcd KR |
328 | if (machine_opcodes[i].opcode & 1) |
329 | continue; | |
330 | else | |
331 | skipnext = 1; | |
332 | } | |
333 | ||
604633ae | 334 | retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]); |
43029a8f | 335 | if (retval != NULL) |
355afbcd KR |
336 | { |
337 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
338 | machine_opcodes[i].name, retval); | |
339 | lose = 1; | |
340 | } | |
341 | } | |
342 | ||
343 | if (lose) | |
344 | as_fatal ("Broken assembler. No assembly attempted."); | |
345 | ||
346 | for (i = '0'; i < '8'; ++i) | |
347 | octal[i] = 1; | |
348 | for (i = '0'; i <= '9'; ++i) | |
349 | toHex[i] = i - '0'; | |
350 | for (i = 'a'; i <= 'f'; ++i) | |
351 | toHex[i] = i + 10 - 'a'; | |
352 | for (i = 'A'; i <= 'F'; ++i) | |
353 | toHex[i] = i + 10 - 'A'; | |
354 | ||
355 | define_some_regs (); | |
fecd2382 RP |
356 | } |
357 | ||
355afbcd KR |
358 | void |
359 | md_end () | |
360 | { | |
361 | return; | |
fecd2382 RP |
362 | } |
363 | ||
364 | /* Assemble a single instruction. Its label has already been handled | |
365 | by the generic front end. We just parse opcode and operands, and | |
366 | produce the bytes of data and relocation. */ | |
367 | ||
355afbcd KR |
368 | void |
369 | md_assemble (str) | |
370 | char *str; | |
fecd2382 | 371 | { |
355afbcd | 372 | char *toP; |
355afbcd KR |
373 | |
374 | know (str); | |
375 | machine_ip (str); | |
376 | toP = frag_more (4); | |
377 | /* put out the opcode */ | |
378 | md_number_to_chars (toP, the_insn.opcode, 4); | |
379 | ||
380 | /* put out the symbol-dependent stuff */ | |
381 | if (the_insn.reloc != NO_RELOC) | |
382 | { | |
5ac34ac3 ILT |
383 | fix_new_exp (frag_now, |
384 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
385 | 4, /* size */ | |
386 | &the_insn.exp, | |
387 | the_insn.pcrel, | |
388 | the_insn.reloc); | |
355afbcd | 389 | } |
fecd2382 RP |
390 | } |
391 | ||
392 | char * | |
355afbcd KR |
393 | parse_operand (s, operandp) |
394 | char *s; | |
395 | expressionS *operandp; | |
fecd2382 | 396 | { |
c58dbabf SC |
397 | char *save = input_line_pointer; |
398 | char *new; | |
355afbcd | 399 | |
c58dbabf | 400 | input_line_pointer = s; |
283dba4b ILT |
401 | expression (operandp); |
402 | if (operandp->X_op == O_absent) | |
5ac34ac3 | 403 | as_bad ("missing operand"); |
c58dbabf SC |
404 | new = input_line_pointer; |
405 | input_line_pointer = save; | |
c58dbabf | 406 | return new; |
fecd2382 RP |
407 | } |
408 | ||
355afbcd | 409 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
410 | Operands are at input_line_pointer. Output is in the_insn. |
411 | Warnings or errors are generated. */ | |
a39116f1 | 412 | |
fecd2382 | 413 | static void |
355afbcd KR |
414 | machine_ip (str) |
415 | char *str; | |
fecd2382 | 416 | { |
355afbcd KR |
417 | char *s; |
418 | const char *args; | |
355afbcd KR |
419 | struct machine_opcode *insn; |
420 | char *argsStart; | |
421 | unsigned long opcode; | |
355afbcd KR |
422 | expressionS the_operand; |
423 | expressionS *operand = &the_operand; | |
424 | unsigned int reg; | |
425 | ||
426 | /* Must handle `div0' opcode. */ | |
427 | s = str; | |
428 | if (isalpha (*s)) | |
429 | for (; isalnum (*s); ++s) | |
430 | if (isupper (*s)) | |
431 | *s = tolower (*s); | |
432 | ||
433 | switch (*s) | |
434 | { | |
435 | case '\0': | |
436 | break; | |
437 | ||
438 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
439 | *s++ = '\0'; | |
440 | break; | |
441 | ||
442 | default: | |
443 | as_bad ("Unknown opcode: `%s'", str); | |
444 | return; | |
445 | } | |
446 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
447 | { | |
448 | as_bad ("Unknown opcode `%s'.", str); | |
449 | return; | |
450 | } | |
451 | argsStart = s; | |
452 | opcode = insn->opcode; | |
453 | memset (&the_insn, '\0', sizeof (the_insn)); | |
454 | the_insn.reloc = NO_RELOC; | |
455 | ||
9956df6a KR |
456 | /* Build the opcode, checking as we go to make sure that the |
457 | operands match. | |
458 | ||
459 | If an operand matches, we modify the_insn or opcode appropriately, | |
460 | and do a "continue". If an operand fails to match, we "break". */ | |
461 | ||
355afbcd KR |
462 | if (insn->args[0] != '\0') |
463 | s = parse_operand (s, operand); /* Prime the pump */ | |
464 | ||
465 | for (args = insn->args;; ++args) | |
466 | { | |
467 | switch (*args) | |
468 | { | |
469 | ||
470 | case '\0': /* end of args */ | |
471 | if (*s == '\0') | |
472 | { | |
473 | /* We are truly done. */ | |
474 | the_insn.opcode = opcode; | |
475 | return; | |
476 | } | |
477 | as_bad ("Too many operands: %s", s); | |
478 | break; | |
479 | ||
480 | case ',': /* Must match a comma */ | |
481 | if (*s++ == ',') | |
482 | { | |
483 | s = parse_operand (s, operand); /* Parse next opnd */ | |
484 | continue; | |
485 | } | |
486 | break; | |
487 | ||
488 | case 'v': /* Trap numbers (immediate field) */ | |
5ac34ac3 | 489 | if (operand->X_op == O_constant) |
355afbcd KR |
490 | { |
491 | if (operand->X_add_number < 256) | |
492 | { | |
493 | opcode |= (operand->X_add_number << 16); | |
494 | continue; | |
495 | } | |
496 | else | |
497 | { | |
604633ae ILT |
498 | as_bad ("Immediate value of %ld is too large", |
499 | (long) operand->X_add_number); | |
355afbcd KR |
500 | continue; |
501 | } | |
502 | } | |
503 | the_insn.reloc = RELOC_8; | |
504 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
505 | the_insn.exp = *operand; | |
506 | continue; | |
507 | ||
508 | case 'b': /* A general register or 8-bit immediate */ | |
509 | case 'i': | |
510 | /* We treat the two cases identically since we mashed | |
9956df6a | 511 | them together in the opcode table. */ |
5ac34ac3 | 512 | if (operand->X_op == O_register) |
355afbcd KR |
513 | goto general_reg; |
514 | ||
515 | opcode |= IMMEDIATE_BIT; | |
5ac34ac3 | 516 | if (operand->X_op == O_constant) |
355afbcd KR |
517 | { |
518 | if (operand->X_add_number < 256) | |
519 | { | |
520 | opcode |= operand->X_add_number; | |
521 | continue; | |
522 | } | |
523 | else | |
524 | { | |
604633ae ILT |
525 | as_bad ("Immediate value of %ld is too large", |
526 | (long) operand->X_add_number); | |
355afbcd KR |
527 | continue; |
528 | } | |
529 | } | |
530 | the_insn.reloc = RELOC_8; | |
531 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
532 | the_insn.exp = *operand; | |
533 | continue; | |
534 | ||
535 | case 'a': /* next operand must be a register */ | |
536 | case 'c': | |
537 | general_reg: | |
538 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
5ac34ac3 | 539 | if (operand->X_op != O_register) |
355afbcd KR |
540 | break; /* Only registers */ |
541 | know (operand->X_add_symbol == 0); | |
5ac34ac3 | 542 | know (operand->X_op_symbol == 0); |
355afbcd KR |
543 | reg = operand->X_add_number; |
544 | if (reg >= SREG) | |
545 | break; /* No special registers */ | |
546 | ||
9956df6a KR |
547 | /* Got the register, now figure out where it goes in the |
548 | opcode. */ | |
355afbcd KR |
549 | switch (*args) |
550 | { | |
551 | case 'a': | |
552 | opcode |= reg << 8; | |
553 | continue; | |
554 | ||
555 | case 'b': | |
556 | case 'i': | |
557 | opcode |= reg; | |
558 | continue; | |
559 | ||
560 | case 'c': | |
561 | opcode |= reg << 16; | |
562 | continue; | |
563 | } | |
564 | as_fatal ("failed sanity check."); | |
565 | break; | |
566 | ||
567 | case 'x': /* 16 bit constant, zero-extended */ | |
568 | case 'X': /* 16 bit constant, one-extended */ | |
5ac34ac3 | 569 | if (operand->X_op == O_constant) |
355afbcd KR |
570 | { |
571 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
572 | ((operand->X_add_number & 0xFF00) << 8); | |
573 | continue; | |
574 | } | |
575 | the_insn.reloc = RELOC_CONST; | |
576 | the_insn.exp = *operand; | |
577 | continue; | |
578 | ||
579 | case 'h': | |
5ac34ac3 | 580 | if (operand->X_op == O_constant) |
355afbcd KR |
581 | { |
582 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
583 | (((unsigned long) operand->X_add_number | |
584 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
585 | continue; | |
586 | } | |
587 | the_insn.reloc = RELOC_CONSTH; | |
588 | the_insn.exp = *operand; | |
589 | continue; | |
590 | ||
591 | case 'P': /* PC-relative jump address */ | |
592 | case 'A': /* Absolute jump address */ | |
593 | /* These two are treated together since we folded the | |
5ac34ac3 ILT |
594 | opcode table entries together. */ |
595 | if (operand->X_op == O_constant) | |
355afbcd KR |
596 | { |
597 | opcode |= ABSOLUTE_BIT | | |
598 | (operand->X_add_number & 0x0003FC00) << 6 | | |
599 | ((operand->X_add_number & 0x000003FC) >> 2); | |
600 | continue; | |
601 | } | |
602 | the_insn.reloc = RELOC_JUMPTARG; | |
603 | the_insn.exp = *operand; | |
604 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
9956df6a KR |
605 | /* FIXME-SOON, Do we figure out whether abs later, after |
606 | know sym val? */ | |
355afbcd KR |
607 | continue; |
608 | ||
609 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
5ac34ac3 | 610 | if (operand->X_op == O_constant) |
355afbcd KR |
611 | { |
612 | if (operand->X_add_number == 0) | |
613 | continue; | |
614 | if (operand->X_add_number == 1) | |
615 | { | |
616 | opcode |= CE_BIT; | |
617 | continue; | |
fecd2382 | 618 | } |
355afbcd KR |
619 | } |
620 | break; | |
621 | ||
622 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
5ac34ac3 | 623 | if (operand->X_op == O_constant && |
355afbcd KR |
624 | operand->X_add_number < 128) |
625 | { | |
626 | opcode |= (operand->X_add_number << 16); | |
627 | continue; | |
628 | } | |
629 | break; | |
630 | ||
631 | case 's': /* Special register number */ | |
5ac34ac3 | 632 | if (operand->X_op != O_register) |
355afbcd KR |
633 | break; /* Only registers */ |
634 | if (operand->X_add_number < SREG) | |
635 | break; /* Not a special register */ | |
636 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
637 | continue; | |
638 | ||
639 | case 'u': /* UI bit of CONVERT */ | |
5ac34ac3 | 640 | if (operand->X_op == O_constant) |
355afbcd KR |
641 | { |
642 | if (operand->X_add_number == 0) | |
643 | continue; | |
644 | if (operand->X_add_number == 1) | |
645 | { | |
646 | opcode |= UI_BIT; | |
647 | continue; | |
648 | } | |
649 | } | |
650 | break; | |
651 | ||
652 | case 'r': /* RND bits of CONVERT */ | |
5ac34ac3 | 653 | if (operand->X_op == O_constant && |
355afbcd KR |
654 | operand->X_add_number < 8) |
655 | { | |
656 | opcode |= operand->X_add_number << 4; | |
657 | continue; | |
658 | } | |
659 | break; | |
660 | ||
661 | case 'd': /* FD bits of CONVERT */ | |
5ac34ac3 | 662 | if (operand->X_op == O_constant && |
355afbcd KR |
663 | operand->X_add_number < 4) |
664 | { | |
665 | opcode |= operand->X_add_number << 2; | |
666 | continue; | |
667 | } | |
668 | break; | |
669 | ||
670 | ||
671 | case 'f': /* FS bits of CONVERT */ | |
5ac34ac3 | 672 | if (operand->X_op == O_constant && |
355afbcd KR |
673 | operand->X_add_number < 4) |
674 | { | |
675 | opcode |= operand->X_add_number << 0; | |
676 | continue; | |
677 | } | |
678 | break; | |
679 | ||
680 | case 'C': | |
5ac34ac3 | 681 | if (operand->X_op == O_constant && |
355afbcd KR |
682 | operand->X_add_number < 4) |
683 | { | |
684 | opcode |= operand->X_add_number << 16; | |
685 | continue; | |
686 | } | |
687 | break; | |
688 | ||
689 | case 'F': | |
5ac34ac3 | 690 | if (operand->X_op == O_constant && |
355afbcd KR |
691 | operand->X_add_number < 16) |
692 | { | |
693 | opcode |= operand->X_add_number << 18; | |
694 | continue; | |
695 | } | |
696 | break; | |
697 | ||
698 | default: | |
699 | BAD_CASE (*args); | |
fecd2382 | 700 | } |
355afbcd KR |
701 | /* Types or values of args don't match. */ |
702 | as_bad ("Invalid operands"); | |
703 | return; | |
704 | } | |
fecd2382 RP |
705 | } |
706 | ||
9956df6a KR |
707 | /* This is identical to the md_atof in m68k.c. I think this is right, |
708 | but I'm not sure. | |
355afbcd | 709 | |
9956df6a KR |
710 | Turn a string in input_line_pointer into a floating point constant |
711 | of type type, and store the appropriate bytes in *litP. The number | |
712 | of LITTLENUMS emitted is stored in *sizeP . An error message is | |
713 | returned, or NULL on OK. */ | |
fecd2382 RP |
714 | |
715 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
716 | #define MAX_LITTLENUMS 6 | |
717 | ||
718 | char * | |
355afbcd KR |
719 | md_atof (type, litP, sizeP) |
720 | char type; | |
721 | char *litP; | |
722 | int *sizeP; | |
fecd2382 | 723 | { |
355afbcd KR |
724 | int prec; |
725 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
726 | LITTLENUM_TYPE *wordP; | |
727 | char *t; | |
728 | ||
729 | switch (type) | |
730 | { | |
731 | ||
732 | case 'f': | |
733 | case 'F': | |
734 | case 's': | |
735 | case 'S': | |
736 | prec = 2; | |
737 | break; | |
738 | ||
739 | case 'd': | |
740 | case 'D': | |
741 | case 'r': | |
742 | case 'R': | |
743 | prec = 4; | |
744 | break; | |
745 | ||
746 | case 'x': | |
747 | case 'X': | |
748 | prec = 6; | |
749 | break; | |
750 | ||
751 | case 'p': | |
752 | case 'P': | |
753 | prec = 6; | |
754 | break; | |
755 | ||
756 | default: | |
757 | *sizeP = 0; | |
758 | return "Bad call to MD_ATOF()"; | |
759 | } | |
760 | t = atof_ieee (input_line_pointer, type, words); | |
761 | if (t) | |
762 | input_line_pointer = t; | |
763 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
764 | for (wordP = words; prec--;) | |
765 | { | |
4f0bccc7 | 766 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
767 | litP += sizeof (LITTLENUM_TYPE); |
768 | } | |
9956df6a | 769 | return ""; |
fecd2382 RP |
770 | } |
771 | ||
772 | /* | |
773 | * Write out big-endian. | |
774 | */ | |
775 | void | |
355afbcd KR |
776 | md_number_to_chars (buf, val, n) |
777 | char *buf; | |
c463189d | 778 | valueT val; |
355afbcd | 779 | int n; |
fecd2382 | 780 | { |
355afbcd KR |
781 | |
782 | switch (n) | |
783 | { | |
784 | ||
785 | case 4: | |
786 | *buf++ = val >> 24; | |
787 | *buf++ = val >> 16; | |
788 | case 2: | |
789 | *buf++ = val >> 8; | |
790 | case 1: | |
791 | *buf = val; | |
792 | break; | |
793 | ||
794 | default: | |
795 | as_fatal ("failed sanity check."); | |
796 | } | |
797 | return; | |
fecd2382 RP |
798 | } |
799 | ||
355afbcd KR |
800 | void |
801 | md_apply_fix (fixP, val) | |
802 | fixS *fixP; | |
803 | long val; | |
fecd2382 | 804 | { |
355afbcd KR |
805 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
806 | ||
807 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
808 | ||
809 | ||
810 | know (fixP->fx_size == 4); | |
811 | know (fixP->fx_r_type < NO_RELOC); | |
812 | ||
9956df6a | 813 | /* This is a hack. There should be a better way to handle this. */ |
355afbcd KR |
814 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
815 | { | |
816 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
817 | } | |
818 | ||
819 | switch (fixP->fx_r_type) | |
820 | { | |
821 | ||
822 | case RELOC_32: | |
823 | buf[0] = val >> 24; | |
824 | buf[1] = val >> 16; | |
825 | buf[2] = val >> 8; | |
826 | buf[3] = val; | |
827 | break; | |
828 | ||
829 | case RELOC_8: | |
830 | buf[0] = val; | |
831 | break; | |
832 | ||
833 | case RELOC_WDISP30: | |
834 | val = (val >>= 2) + 1; | |
835 | buf[0] |= (val >> 24) & 0x3f; | |
836 | buf[1] = (val >> 16); | |
837 | buf[2] = val >> 8; | |
838 | buf[3] = val; | |
839 | break; | |
840 | ||
841 | case RELOC_HI22: | |
842 | buf[1] |= (val >> 26) & 0x3f; | |
843 | buf[2] = val >> 18; | |
844 | buf[3] = val >> 10; | |
845 | break; | |
846 | ||
847 | case RELOC_LO10: | |
848 | buf[2] |= (val >> 8) & 0x03; | |
849 | buf[3] = val; | |
850 | break; | |
851 | ||
852 | case RELOC_BASE13: | |
853 | buf[2] |= (val >> 8) & 0x1f; | |
854 | buf[3] = val; | |
855 | break; | |
856 | ||
857 | case RELOC_WDISP22: | |
858 | val = (val >>= 2) + 1; | |
859 | /* FALLTHROUGH */ | |
860 | case RELOC_BASE22: | |
861 | buf[1] |= (val >> 16) & 0x3f; | |
862 | buf[2] = val >> 8; | |
863 | buf[3] = val; | |
864 | break; | |
865 | ||
fecd2382 | 866 | #if 0 |
355afbcd KR |
867 | case RELOC_PC10: |
868 | case RELOC_PC22: | |
869 | case RELOC_JMP_TBL: | |
870 | case RELOC_SEGOFF16: | |
871 | case RELOC_GLOB_DAT: | |
872 | case RELOC_JMP_SLOT: | |
873 | case RELOC_RELATIVE: | |
fecd2382 | 874 | #endif |
355afbcd KR |
875 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
876 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
877 | buf[3] = val >> 2; | |
878 | break; | |
879 | ||
880 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
881 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
882 | buf[3] = val; | |
883 | break; | |
884 | ||
885 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
886 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
887 | buf[3] = val >> 16; | |
888 | break; | |
889 | ||
890 | case NO_RELOC: | |
891 | default: | |
892 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
893 | break; | |
894 | } | |
895 | return; | |
fecd2382 RP |
896 | } |
897 | ||
898 | #ifdef OBJ_COFF | |
355afbcd KR |
899 | short |
900 | tc_coff_fix2rtype (fixP) | |
901 | fixS *fixP; | |
fecd2382 | 902 | { |
355afbcd KR |
903 | |
904 | switch (fixP->fx_r_type) | |
905 | { | |
906 | case RELOC_32: | |
907 | return (R_WORD); | |
908 | case RELOC_8: | |
909 | return (R_BYTE); | |
910 | case RELOC_CONST: | |
911 | return (R_ILOHALF); | |
912 | case RELOC_CONSTH: | |
913 | return (R_IHIHALF); | |
914 | case RELOC_JUMPTARG: | |
915 | return (R_IREL); | |
916 | default: | |
917 | printf ("need %o3\n", fixP->fx_r_type); | |
918 | abort (); | |
919 | } /* switch on type */ | |
920 | ||
921 | return (0); | |
9956df6a | 922 | } |
355afbcd | 923 | |
fecd2382 RP |
924 | #endif /* OBJ_COFF */ |
925 | ||
9956df6a | 926 | /* should never be called for 29k */ |
355afbcd KR |
927 | void |
928 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
929 | char *ptr; | |
c463189d | 930 | addressT from_addr, to_addr; |
355afbcd KR |
931 | fragS *frag; |
932 | symbolS *to_symbol; | |
fecd2382 | 933 | { |
355afbcd | 934 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
935 | } |
936 | ||
fecd2382 | 937 | /* should never be called for 29k */ |
355afbcd KR |
938 | void |
939 | md_convert_frag (headers, fragP) | |
940 | object_headers *headers; | |
941 | register fragS *fragP; | |
fecd2382 | 942 | { |
9956df6a | 943 | as_fatal ("a29k_convert_frag\n"); |
fecd2382 RP |
944 | } |
945 | ||
946 | /* should never be called for 29k */ | |
355afbcd KR |
947 | void |
948 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
949 | char *ptr; | |
c463189d ME |
950 | addressT from_addr; |
951 | addressT to_addr; | |
355afbcd KR |
952 | fragS *frag; |
953 | symbolS *to_symbol; | |
fecd2382 | 954 | { |
9956df6a | 955 | as_fatal ("a29k_create_long_jump\n"); |
fecd2382 RP |
956 | } |
957 | ||
542e1629 | 958 | /* should never be called for a29k */ |
355afbcd KR |
959 | int |
960 | md_estimate_size_before_relax (fragP, segtype) | |
961 | register fragS *fragP; | |
962 | segT segtype; | |
fecd2382 | 963 | { |
9956df6a KR |
964 | as_fatal ("a29k_estimate_size_before_relax\n"); |
965 | return 0; | |
fecd2382 RP |
966 | } |
967 | ||
968 | #if 0 | |
969 | /* for debugging only */ | |
970 | static void | |
355afbcd KR |
971 | print_insn (insn) |
972 | struct machine_it *insn; | |
fecd2382 | 973 | { |
355afbcd KR |
974 | char *Reloc[] = |
975 | { | |
976 | "RELOC_8", | |
977 | "RELOC_16", | |
978 | "RELOC_32", | |
979 | "RELOC_DISP8", | |
980 | "RELOC_DISP16", | |
981 | "RELOC_DISP32", | |
982 | "RELOC_WDISP30", | |
983 | "RELOC_WDISP22", | |
984 | "RELOC_HI22", | |
985 | "RELOC_22", | |
986 | "RELOC_13", | |
987 | "RELOC_LO10", | |
988 | "RELOC_SFA_BASE", | |
989 | "RELOC_SFA_OFF13", | |
990 | "RELOC_BASE10", | |
991 | "RELOC_BASE13", | |
992 | "RELOC_BASE22", | |
993 | "RELOC_PC10", | |
994 | "RELOC_PC22", | |
995 | "RELOC_JMP_TBL", | |
996 | "RELOC_SEGOFF16", | |
997 | "RELOC_GLOB_DAT", | |
998 | "RELOC_JMP_SLOT", | |
999 | "RELOC_RELATIVE", | |
1000 | "NO_RELOC" | |
1001 | }; | |
1002 | ||
1003 | if (insn->error) | |
1004 | { | |
1005 | fprintf (stderr, "ERROR: %s\n"); | |
1006 | } | |
1007 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
1008 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
1009 | fprintf (stderr, "exp = {\n"); | |
1010 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
1011 | insn->exp.X_add_symbol ? | |
1012 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
1013 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
5ac34ac3 ILT |
1014 | fprintf (stderr, "\t\tX_op_symbol = %s\n", |
1015 | insn->exp.X_op_symbol ? | |
1016 | (S_GET_NAME (insn->exp.X_op_symbol) ? | |
1017 | S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0"); | |
355afbcd KR |
1018 | fprintf (stderr, "\t\tX_add_number = %d\n", |
1019 | insn->exp.X_add_number); | |
1020 | fprintf (stderr, "}\n"); | |
1021 | return; | |
fecd2382 | 1022 | } |
355afbcd | 1023 | |
fecd2382 RP |
1024 | #endif |
1025 | ||
a79c6033 | 1026 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1027 | |
a79c6033 RP |
1028 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1029 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1030 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1031 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1032 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1033 | |
a79c6033 | 1034 | #ifdef OBJ_AOUT |
fecd2382 | 1035 | |
355afbcd KR |
1036 | void |
1037 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1038 | char *where; | |
1039 | fixS *fixP; | |
1040 | relax_addressT segment_address_in_file; | |
a79c6033 | 1041 | { |
355afbcd KR |
1042 | long r_symbolnum; |
1043 | ||
1044 | know (fixP->fx_r_type < NO_RELOC); | |
1045 | know (fixP->fx_addsy != NULL); | |
1046 | ||
1047 | md_number_to_chars (where, | |
1048 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1049 | 4); | |
1050 | ||
1051 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1052 | ? S_GET_TYPE (fixP->fx_addsy) | |
1053 | : fixP->fx_addsy->sy_number); | |
1054 | ||
1055 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1056 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1057 | where[6] = r_symbolnum & 0x0ff; | |
1058 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1059 | /* Also easy */ | |
1060 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
9956df6a | 1061 | } |
fecd2382 RP |
1062 | |
1063 | #endif /* OBJ_AOUT */ | |
1064 | ||
1065 | int | |
355afbcd KR |
1066 | md_parse_option (argP, cntP, vecP) |
1067 | char **argP; | |
1068 | int *cntP; | |
1069 | char ***vecP; | |
fecd2382 | 1070 | { |
9956df6a | 1071 | return 0; |
fecd2382 RP |
1072 | } |
1073 | ||
1074 | ||
1075 | /* Default the values of symbols known that should be "predefined". We | |
1076 | don't bother to predefine them unless you actually use one, since there | |
1077 | are a lot of them. */ | |
1078 | ||
355afbcd KR |
1079 | symbolS * |
1080 | md_undefined_symbol (name) | |
1081 | char *name; | |
fecd2382 | 1082 | { |
355afbcd KR |
1083 | long regnum; |
1084 | char testbuf[5 + /*SLOP*/ 5]; | |
1085 | ||
1086 | if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L') | |
1087 | { | |
1088 | /* Perhaps a global or local register name */ | |
1089 | if (name[1] == 'r' || name[1] == 'R') | |
1090 | { | |
1091 | /* Parse the number, make sure it has no extra zeroes or trailing | |
a39116f1 | 1092 | chars */ |
355afbcd KR |
1093 | regnum = atol (&name[2]); |
1094 | if (regnum > 127) | |
1095 | return 0; | |
1096 | sprintf (testbuf, "%ld", regnum); | |
1097 | if (strcmp (testbuf, &name[2]) != 0) | |
1098 | return 0; /* gr007 or lr7foo or whatever */ | |
1099 | ||
1100 | /* We have a wiener! Define and return a new symbol for it. */ | |
1101 | if (name[0] == 'l' || name[0] == 'L') | |
1102 | regnum += 128; | |
4f0bccc7 ILT |
1103 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, |
1104 | &zero_address_frag)); | |
355afbcd KR |
1105 | } |
1106 | } | |
1107 | ||
1108 | return 0; | |
fecd2382 RP |
1109 | } |
1110 | ||
1111 | /* Parse an operand that is machine-specific. */ | |
1112 | ||
355afbcd KR |
1113 | void |
1114 | md_operand (expressionP) | |
1115 | expressionS *expressionP; | |
fecd2382 | 1116 | { |
355afbcd KR |
1117 | |
1118 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1119 | { | |
1120 | /* We have a numeric register expression. No biggy. */ | |
1121 | input_line_pointer += 2; /* Skip %% */ | |
1122 | (void) expression (expressionP); | |
5ac34ac3 | 1123 | if (expressionP->X_op != O_constant |
355afbcd KR |
1124 | || expressionP->X_add_number > 255) |
1125 | as_bad ("Invalid expression after %%%%\n"); | |
5ac34ac3 | 1126 | expressionP->X_op = O_register; |
355afbcd KR |
1127 | } |
1128 | else if (input_line_pointer[0] == '&') | |
1129 | { | |
1130 | /* We are taking the 'address' of a register...this one is not | |
5ac34ac3 ILT |
1131 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1132 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1133 | input_line_pointer++; /* Skip & */ |
1134 | (void) expression (expressionP); | |
5ac34ac3 | 1135 | if (expressionP->X_op != O_register) |
355afbcd KR |
1136 | as_bad ("Invalid register in & expression"); |
1137 | else | |
5ac34ac3 | 1138 | expressionP->X_op = O_constant; |
355afbcd | 1139 | } |
fecd2382 RP |
1140 | } |
1141 | ||
1142 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1143 | valueT |
355afbcd KR |
1144 | md_section_align (segment, size) |
1145 | segT segment; | |
c463189d | 1146 | valueT size; |
fecd2382 | 1147 | { |
355afbcd | 1148 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1149 | } |
1150 | ||
1151 | /* Exactly what point is a PC-relative offset relative TO? | |
1152 | On the 29000, they're relative to the address of the instruction, | |
1153 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1154 | long |
1155 | md_pcrel_from (fixP) | |
1156 | fixS *fixP; | |
fecd2382 | 1157 | { |
355afbcd | 1158 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1159 | } |
1160 | ||
fecd2382 | 1161 | /* end of tc-a29k.c */ |