Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
5ac34ac3 | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
d6f72574 | 24 | #include "ctype.h" |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
355afbcd | 35 | const relax_typeS md_relax_table[] = |
604633ae ILT |
36 | { |
37 | { 0, 0, 0, 0 } | |
38 | }; | |
fecd2382 RP |
39 | |
40 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
41 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
42 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
43 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
44 | ||
45 | /* handle of the OPCODE hash table */ | |
46 | static struct hash_control *op_hash = NULL; | |
47 | ||
355afbcd KR |
48 | struct machine_it |
49 | { | |
50 | char *error; | |
51 | unsigned long opcode; | |
52 | struct nlist *nlistp; | |
53 | expressionS exp; | |
54 | int pcrel; | |
55 | int reloc_offset; /* Offset of reloc within insn */ | |
56 | ||
57 | int reloc; | |
c593cf41 | 58 | |
c593cf41 | 59 | |
355afbcd | 60 | } |
c593cf41 | 61 | |
355afbcd | 62 | the_insn; |
fecd2382 | 63 | |
a938b1d6 ILT |
64 | static void machine_ip PARAMS ((char *str)); |
65 | /* static void print_insn PARAMS ((struct machine_it *insn)); */ | |
604633ae | 66 | #ifndef OBJ_COFF |
a938b1d6 | 67 | static void s_data1 PARAMS ((void)); |
604633ae ILT |
68 | static void s_use PARAMS ((int)); |
69 | #endif | |
fecd2382 RP |
70 | |
71 | const pseudo_typeS | |
355afbcd KR |
72 | md_pseudo_table[] = |
73 | { | |
74 | {"align", s_align_bytes, 4}, | |
75 | {"block", s_space, 0}, | |
76 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
77 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
78 | {"space", s_ignore, 0}, /* Listing control */ | |
79 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 80 | #ifndef OBJ_COFF |
355afbcd KR |
81 | /* We can do this right with coff */ |
82 | {"use", s_use, 0}, | |
c58dbabf | 83 | #endif |
355afbcd KR |
84 | {"word", cons, 4}, |
85 | {NULL, 0, 0}, | |
86 | }; | |
fecd2382 RP |
87 | |
88 | int md_short_jump_size = 4; | |
89 | int md_long_jump_size = 4; | |
57574979 SC |
90 | #if defined(BFD_HEADERS) |
91 | #ifdef RELSZ | |
49864cfa | 92 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 93 | #else |
49864cfa | 94 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
95 | #endif |
96 | #else | |
49864cfa | 97 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 98 | #endif |
fecd2382 RP |
99 | |
100 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 101 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 102 | const char comment_chars[] = ";"; |
fecd2382 RP |
103 | |
104 | /* This array holds the chars that only start a comment at the beginning of | |
105 | a line. If the line seems to have the form '# 123 filename' | |
106 | .line and .file directives will appear in the pre-processed output */ | |
107 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
108 | first line of the input file. This is because the compiler outputs | |
109 | #NO_APP at the beginning of its output. */ | |
110 | /* Also note that comments like this one will always work */ | |
587c4264 | 111 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
112 | |
113 | /* We needed an unused char for line separation to work around the | |
114 | lack of macros, using sed and such. */ | |
587c4264 | 115 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
116 | |
117 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 118 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
119 | |
120 | /* Chars that mean this number is a floating point constant */ | |
121 | /* As in 0f12.456 */ | |
122 | /* or 0d1.2345e12 */ | |
587c4264 | 123 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
124 | |
125 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
126 | changed in read.c . Ideally it shouldn't have to know about it at all, | |
127 | but nothing is ideal around here. | |
a39116f1 | 128 | */ |
fecd2382 RP |
129 | |
130 | static unsigned char octal[256]; | |
131 | #define isoctal(c) octal[c] | |
355afbcd | 132 | static unsigned char toHex[256]; |
fecd2382 RP |
133 | |
134 | /* | |
355afbcd | 135 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
136 | */ |
137 | #define ANNUL (1 << 29) | |
138 | ||
604633ae ILT |
139 | #ifndef OBJ_COFF |
140 | ||
fecd2382 | 141 | static void |
604633ae ILT |
142 | s_use (ignore) |
143 | int ignore; | |
fecd2382 | 144 | { |
355afbcd KR |
145 | |
146 | if (strncmp (input_line_pointer, ".text", 5) == 0) | |
147 | { | |
148 | input_line_pointer += 5; | |
a938b1d6 | 149 | s_text (0); |
355afbcd KR |
150 | return; |
151 | } | |
152 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
153 | { | |
154 | input_line_pointer += 5; | |
a938b1d6 | 155 | s_data (0); |
355afbcd KR |
156 | return; |
157 | } | |
158 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
159 | { | |
160 | input_line_pointer += 6; | |
161 | s_data1 (); | |
162 | return; | |
163 | } | |
164 | /* Literals can't go in the text segment because you can't read | |
a39116f1 | 165 | from instruction memory on some 29k's. So, into initialized data. */ |
355afbcd KR |
166 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
167 | { | |
168 | input_line_pointer += 4; | |
604633ae | 169 | subseg_set (SEG_DATA, 200); |
355afbcd KR |
170 | demand_empty_rest_of_line (); |
171 | return; | |
172 | } | |
173 | ||
174 | as_bad ("Unknown segment type"); | |
175 | demand_empty_rest_of_line (); | |
176 | return; | |
fecd2382 RP |
177 | } |
178 | ||
179 | static void | |
355afbcd | 180 | s_data1 () |
fecd2382 | 181 | { |
604633ae | 182 | subseg_set (SEG_DATA, 1); |
355afbcd KR |
183 | demand_empty_rest_of_line (); |
184 | return; | |
fecd2382 RP |
185 | } |
186 | ||
604633ae ILT |
187 | #endif /* OBJ_COFF */ |
188 | ||
fecd2382 RP |
189 | /* Install symbol definition that maps REGNAME to REGNO. |
190 | FIXME-SOON: These are not recognized in mixed case. */ | |
191 | ||
192 | static void | |
355afbcd KR |
193 | insert_sreg (regname, regnum) |
194 | char *regname; | |
195 | int regnum; | |
fecd2382 | 196 | { |
355afbcd | 197 | /* FIXME-SOON, put something in these syms so they won't be output to the symbol |
fecd2382 | 198 | table of the resulting object file. */ |
355afbcd KR |
199 | |
200 | /* Must be large enough to hold the names of the special registers. */ | |
201 | char buf[80]; | |
202 | int i; | |
203 | ||
4f0bccc7 ILT |
204 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, |
205 | &zero_address_frag)); | |
355afbcd KR |
206 | for (i = 0; regname[i]; i++) |
207 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
208 | buf[i] = '\0'; | |
209 | ||
4f0bccc7 ILT |
210 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, |
211 | &zero_address_frag)); | |
355afbcd | 212 | } /* insert_sreg() */ |
fecd2382 RP |
213 | |
214 | /* Install symbol definitions for assorted special registers. | |
215 | See ASM29K Ref page 2-9. */ | |
216 | ||
355afbcd KR |
217 | void |
218 | define_some_regs () | |
219 | { | |
fecd2382 | 220 | #define SREG 256 |
355afbcd KR |
221 | |
222 | /* Protected special-purpose register names */ | |
223 | insert_sreg ("vab", SREG + 0); | |
224 | insert_sreg ("ops", SREG + 1); | |
225 | insert_sreg ("cps", SREG + 2); | |
226 | insert_sreg ("cfg", SREG + 3); | |
227 | insert_sreg ("cha", SREG + 4); | |
228 | insert_sreg ("chd", SREG + 5); | |
229 | insert_sreg ("chc", SREG + 6); | |
230 | insert_sreg ("rbp", SREG + 7); | |
231 | insert_sreg ("tmc", SREG + 8); | |
232 | insert_sreg ("tmr", SREG + 9); | |
233 | insert_sreg ("pc0", SREG + 10); | |
234 | insert_sreg ("pc1", SREG + 11); | |
235 | insert_sreg ("pc2", SREG + 12); | |
236 | insert_sreg ("mmu", SREG + 13); | |
237 | insert_sreg ("lru", SREG + 14); | |
238 | ||
d6f72574 KR |
239 | /* Additional protected special-purpose registers for the 29050 */ |
240 | insert_sreg ("rsn", SREG + 15); | |
241 | insert_sreg ("rma0", SREG + 16); | |
242 | insert_sreg ("rmc0", SREG + 17); | |
243 | insert_sreg ("rma1", SREG + 18); | |
244 | insert_sreg ("rmc1", SREG + 19); | |
245 | insert_sreg ("spc0", SREG + 20); | |
246 | insert_sreg ("spc1", SREG + 21); | |
247 | insert_sreg ("spc2", SREG + 22); | |
248 | insert_sreg ("iba0", SREG + 23); | |
249 | insert_sreg ("ibc0", SREG + 24); | |
250 | insert_sreg ("iba1", SREG + 25); | |
251 | insert_sreg ("ibc1", SREG + 26); | |
252 | ||
355afbcd KR |
253 | /* Unprotected special-purpose register names */ |
254 | insert_sreg ("ipc", SREG + 128); | |
255 | insert_sreg ("ipa", SREG + 129); | |
256 | insert_sreg ("ipb", SREG + 130); | |
257 | insert_sreg ("q", SREG + 131); | |
258 | insert_sreg ("alu", SREG + 132); | |
259 | insert_sreg ("bp", SREG + 133); | |
260 | insert_sreg ("fc", SREG + 134); | |
261 | insert_sreg ("cr", SREG + 135); | |
262 | insert_sreg ("fpe", SREG + 160); | |
263 | insert_sreg ("inte", SREG + 161); | |
264 | insert_sreg ("fps", SREG + 162); | |
265 | /* "", SREG+163); Reserved */ | |
266 | insert_sreg ("exop", SREG + 164); | |
267 | } /* define_some_regs() */ | |
fecd2382 RP |
268 | |
269 | /* This function is called once, at assembler startup time. It should | |
270 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
271 | void | |
355afbcd | 272 | md_begin () |
fecd2382 | 273 | { |
604633ae | 274 | register const char *retval = NULL; |
355afbcd KR |
275 | int lose = 0; |
276 | register int skipnext = 0; | |
277 | register unsigned int i; | |
278 | register char *strend, *strend2; | |
279 | ||
280 | /* Hash up all the opcodes for fast use later. */ | |
281 | ||
282 | op_hash = hash_new (); | |
355afbcd KR |
283 | |
284 | for (i = 0; i < num_opcodes; i++) | |
285 | { | |
286 | const char *name = machine_opcodes[i].name; | |
287 | ||
288 | if (skipnext) | |
289 | { | |
290 | skipnext = 0; | |
291 | continue; | |
292 | } | |
293 | ||
294 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
a39116f1 | 295 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
296 | |
297 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
298 | { | |
299 | if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode) | |
300 | != 0x01000000) | |
301 | goto bad_table; | |
302 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
303 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
304 | switch (*strend) | |
305 | { | |
306 | case 'b': | |
307 | if (*strend2 != 'i') | |
308 | goto bad_table; | |
309 | break; | |
310 | case 'i': | |
311 | if (*strend2 != 'b') | |
312 | goto bad_table; | |
313 | break; | |
314 | case 'P': | |
315 | if (*strend2 != 'A') | |
316 | goto bad_table; | |
317 | break; | |
318 | case 'A': | |
319 | if (*strend2 != 'P') | |
320 | goto bad_table; | |
321 | break; | |
322 | default: | |
323 | bad_table: | |
324 | fprintf (stderr, "internal error: can't handle opcode %s\n", name); | |
325 | lose = 1; | |
a39116f1 | 326 | } |
355afbcd KR |
327 | |
328 | /* OK, this is an i/b or A/P pair. We skip the higher-valued one, | |
329 | and let the code for operand checking handle OR-ing in the bit. */ | |
330 | if (machine_opcodes[i].opcode & 1) | |
331 | continue; | |
332 | else | |
333 | skipnext = 1; | |
334 | } | |
335 | ||
604633ae | 336 | retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]); |
355afbcd KR |
337 | if (retval != NULL && *retval != '\0') |
338 | { | |
339 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
340 | machine_opcodes[i].name, retval); | |
341 | lose = 1; | |
342 | } | |
343 | } | |
344 | ||
345 | if (lose) | |
346 | as_fatal ("Broken assembler. No assembly attempted."); | |
347 | ||
348 | for (i = '0'; i < '8'; ++i) | |
349 | octal[i] = 1; | |
350 | for (i = '0'; i <= '9'; ++i) | |
351 | toHex[i] = i - '0'; | |
352 | for (i = 'a'; i <= 'f'; ++i) | |
353 | toHex[i] = i + 10 - 'a'; | |
354 | for (i = 'A'; i <= 'F'; ++i) | |
355 | toHex[i] = i + 10 - 'A'; | |
356 | ||
357 | define_some_regs (); | |
fecd2382 RP |
358 | } |
359 | ||
355afbcd KR |
360 | void |
361 | md_end () | |
362 | { | |
363 | return; | |
fecd2382 RP |
364 | } |
365 | ||
366 | /* Assemble a single instruction. Its label has already been handled | |
367 | by the generic front end. We just parse opcode and operands, and | |
368 | produce the bytes of data and relocation. */ | |
369 | ||
355afbcd KR |
370 | void |
371 | md_assemble (str) | |
372 | char *str; | |
fecd2382 | 373 | { |
355afbcd KR |
374 | char *toP; |
375 | /* !!!! int rsd; */ | |
376 | ||
377 | know (str); | |
378 | machine_ip (str); | |
379 | toP = frag_more (4); | |
380 | /* put out the opcode */ | |
381 | md_number_to_chars (toP, the_insn.opcode, 4); | |
382 | ||
383 | /* put out the symbol-dependent stuff */ | |
384 | if (the_insn.reloc != NO_RELOC) | |
385 | { | |
5ac34ac3 ILT |
386 | fix_new_exp (frag_now, |
387 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
388 | 4, /* size */ | |
389 | &the_insn.exp, | |
390 | the_insn.pcrel, | |
391 | the_insn.reloc); | |
355afbcd | 392 | } |
fecd2382 RP |
393 | } |
394 | ||
395 | char * | |
355afbcd KR |
396 | parse_operand (s, operandp) |
397 | char *s; | |
398 | expressionS *operandp; | |
fecd2382 | 399 | { |
c58dbabf SC |
400 | char *save = input_line_pointer; |
401 | char *new; | |
355afbcd | 402 | |
c58dbabf | 403 | input_line_pointer = s; |
283dba4b ILT |
404 | expression (operandp); |
405 | if (operandp->X_op == O_absent) | |
5ac34ac3 | 406 | as_bad ("missing operand"); |
c58dbabf SC |
407 | new = input_line_pointer; |
408 | input_line_pointer = save; | |
c58dbabf | 409 | return new; |
fecd2382 RP |
410 | } |
411 | ||
355afbcd | 412 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
413 | Operands are at input_line_pointer. Output is in the_insn. |
414 | Warnings or errors are generated. */ | |
a39116f1 | 415 | |
fecd2382 | 416 | static void |
355afbcd KR |
417 | machine_ip (str) |
418 | char *str; | |
fecd2382 | 419 | { |
355afbcd KR |
420 | char *s; |
421 | const char *args; | |
422 | /* !!!! char c; */ | |
423 | /* !!!! unsigned long i; */ | |
424 | struct machine_opcode *insn; | |
425 | char *argsStart; | |
426 | unsigned long opcode; | |
427 | /* !!!! unsigned int mask; */ | |
428 | expressionS the_operand; | |
429 | expressionS *operand = &the_operand; | |
430 | unsigned int reg; | |
431 | ||
432 | /* Must handle `div0' opcode. */ | |
433 | s = str; | |
434 | if (isalpha (*s)) | |
435 | for (; isalnum (*s); ++s) | |
436 | if (isupper (*s)) | |
437 | *s = tolower (*s); | |
438 | ||
439 | switch (*s) | |
440 | { | |
441 | case '\0': | |
442 | break; | |
443 | ||
444 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
445 | *s++ = '\0'; | |
446 | break; | |
447 | ||
448 | default: | |
449 | as_bad ("Unknown opcode: `%s'", str); | |
450 | return; | |
451 | } | |
452 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
453 | { | |
454 | as_bad ("Unknown opcode `%s'.", str); | |
455 | return; | |
456 | } | |
457 | argsStart = s; | |
458 | opcode = insn->opcode; | |
459 | memset (&the_insn, '\0', sizeof (the_insn)); | |
460 | the_insn.reloc = NO_RELOC; | |
461 | ||
462 | /* | |
a39116f1 RP |
463 | * Build the opcode, checking as we go to make |
464 | * sure that the operands match. | |
465 | * | |
466 | * If an operand matches, we modify the_insn or opcode appropriately, | |
467 | * and do a "continue". If an operand fails to match, we "break". | |
468 | */ | |
355afbcd KR |
469 | if (insn->args[0] != '\0') |
470 | s = parse_operand (s, operand); /* Prime the pump */ | |
471 | ||
472 | for (args = insn->args;; ++args) | |
473 | { | |
474 | switch (*args) | |
475 | { | |
476 | ||
477 | case '\0': /* end of args */ | |
478 | if (*s == '\0') | |
479 | { | |
480 | /* We are truly done. */ | |
481 | the_insn.opcode = opcode; | |
482 | return; | |
483 | } | |
484 | as_bad ("Too many operands: %s", s); | |
485 | break; | |
486 | ||
487 | case ',': /* Must match a comma */ | |
488 | if (*s++ == ',') | |
489 | { | |
490 | s = parse_operand (s, operand); /* Parse next opnd */ | |
491 | continue; | |
492 | } | |
493 | break; | |
494 | ||
495 | case 'v': /* Trap numbers (immediate field) */ | |
5ac34ac3 | 496 | if (operand->X_op == O_constant) |
355afbcd KR |
497 | { |
498 | if (operand->X_add_number < 256) | |
499 | { | |
500 | opcode |= (operand->X_add_number << 16); | |
501 | continue; | |
502 | } | |
503 | else | |
504 | { | |
604633ae ILT |
505 | as_bad ("Immediate value of %ld is too large", |
506 | (long) operand->X_add_number); | |
355afbcd KR |
507 | continue; |
508 | } | |
509 | } | |
510 | the_insn.reloc = RELOC_8; | |
511 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
512 | the_insn.exp = *operand; | |
513 | continue; | |
514 | ||
515 | case 'b': /* A general register or 8-bit immediate */ | |
516 | case 'i': | |
517 | /* We treat the two cases identically since we mashed | |
a39116f1 | 518 | them together in the opcode table. */ |
5ac34ac3 | 519 | if (operand->X_op == O_register) |
355afbcd KR |
520 | goto general_reg; |
521 | ||
522 | opcode |= IMMEDIATE_BIT; | |
5ac34ac3 | 523 | if (operand->X_op == O_constant) |
355afbcd KR |
524 | { |
525 | if (operand->X_add_number < 256) | |
526 | { | |
527 | opcode |= operand->X_add_number; | |
528 | continue; | |
529 | } | |
530 | else | |
531 | { | |
604633ae ILT |
532 | as_bad ("Immediate value of %ld is too large", |
533 | (long) operand->X_add_number); | |
355afbcd KR |
534 | continue; |
535 | } | |
536 | } | |
537 | the_insn.reloc = RELOC_8; | |
538 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
539 | the_insn.exp = *operand; | |
540 | continue; | |
541 | ||
542 | case 'a': /* next operand must be a register */ | |
543 | case 'c': | |
544 | general_reg: | |
545 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
5ac34ac3 | 546 | if (operand->X_op != O_register) |
355afbcd KR |
547 | break; /* Only registers */ |
548 | know (operand->X_add_symbol == 0); | |
5ac34ac3 | 549 | know (operand->X_op_symbol == 0); |
355afbcd KR |
550 | reg = operand->X_add_number; |
551 | if (reg >= SREG) | |
552 | break; /* No special registers */ | |
553 | ||
554 | /* | |
a39116f1 RP |
555 | * Got the register, now figure out where |
556 | * it goes in the opcode. | |
557 | */ | |
355afbcd KR |
558 | switch (*args) |
559 | { | |
560 | case 'a': | |
561 | opcode |= reg << 8; | |
562 | continue; | |
563 | ||
564 | case 'b': | |
565 | case 'i': | |
566 | opcode |= reg; | |
567 | continue; | |
568 | ||
569 | case 'c': | |
570 | opcode |= reg << 16; | |
571 | continue; | |
572 | } | |
573 | as_fatal ("failed sanity check."); | |
574 | break; | |
575 | ||
576 | case 'x': /* 16 bit constant, zero-extended */ | |
577 | case 'X': /* 16 bit constant, one-extended */ | |
5ac34ac3 | 578 | if (operand->X_op == O_constant) |
355afbcd KR |
579 | { |
580 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
581 | ((operand->X_add_number & 0xFF00) << 8); | |
582 | continue; | |
583 | } | |
584 | the_insn.reloc = RELOC_CONST; | |
585 | the_insn.exp = *operand; | |
586 | continue; | |
587 | ||
588 | case 'h': | |
5ac34ac3 | 589 | if (operand->X_op == O_constant) |
355afbcd KR |
590 | { |
591 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
592 | (((unsigned long) operand->X_add_number | |
593 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
594 | continue; | |
595 | } | |
596 | the_insn.reloc = RELOC_CONSTH; | |
597 | the_insn.exp = *operand; | |
598 | continue; | |
599 | ||
600 | case 'P': /* PC-relative jump address */ | |
601 | case 'A': /* Absolute jump address */ | |
602 | /* These two are treated together since we folded the | |
5ac34ac3 ILT |
603 | opcode table entries together. */ |
604 | if (operand->X_op == O_constant) | |
355afbcd KR |
605 | { |
606 | opcode |= ABSOLUTE_BIT | | |
607 | (operand->X_add_number & 0x0003FC00) << 6 | | |
608 | ((operand->X_add_number & 0x000003FC) >> 2); | |
609 | continue; | |
610 | } | |
611 | the_insn.reloc = RELOC_JUMPTARG; | |
612 | the_insn.exp = *operand; | |
613 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
614 | /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */ | |
615 | continue; | |
616 | ||
617 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
5ac34ac3 | 618 | if (operand->X_op == O_constant) |
355afbcd KR |
619 | { |
620 | if (operand->X_add_number == 0) | |
621 | continue; | |
622 | if (operand->X_add_number == 1) | |
623 | { | |
624 | opcode |= CE_BIT; | |
625 | continue; | |
fecd2382 | 626 | } |
355afbcd KR |
627 | } |
628 | break; | |
629 | ||
630 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
5ac34ac3 | 631 | if (operand->X_op == O_constant && |
355afbcd KR |
632 | operand->X_add_number < 128) |
633 | { | |
634 | opcode |= (operand->X_add_number << 16); | |
635 | continue; | |
636 | } | |
637 | break; | |
638 | ||
639 | case 's': /* Special register number */ | |
5ac34ac3 | 640 | if (operand->X_op != O_register) |
355afbcd KR |
641 | break; /* Only registers */ |
642 | if (operand->X_add_number < SREG) | |
643 | break; /* Not a special register */ | |
644 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
645 | continue; | |
646 | ||
647 | case 'u': /* UI bit of CONVERT */ | |
5ac34ac3 | 648 | if (operand->X_op == O_constant) |
355afbcd KR |
649 | { |
650 | if (operand->X_add_number == 0) | |
651 | continue; | |
652 | if (operand->X_add_number == 1) | |
653 | { | |
654 | opcode |= UI_BIT; | |
655 | continue; | |
656 | } | |
657 | } | |
658 | break; | |
659 | ||
660 | case 'r': /* RND bits of CONVERT */ | |
5ac34ac3 | 661 | if (operand->X_op == O_constant && |
355afbcd KR |
662 | operand->X_add_number < 8) |
663 | { | |
664 | opcode |= operand->X_add_number << 4; | |
665 | continue; | |
666 | } | |
667 | break; | |
668 | ||
669 | case 'd': /* FD bits of CONVERT */ | |
5ac34ac3 | 670 | if (operand->X_op == O_constant && |
355afbcd KR |
671 | operand->X_add_number < 4) |
672 | { | |
673 | opcode |= operand->X_add_number << 2; | |
674 | continue; | |
675 | } | |
676 | break; | |
677 | ||
678 | ||
679 | case 'f': /* FS bits of CONVERT */ | |
5ac34ac3 | 680 | if (operand->X_op == O_constant && |
355afbcd KR |
681 | operand->X_add_number < 4) |
682 | { | |
683 | opcode |= operand->X_add_number << 0; | |
684 | continue; | |
685 | } | |
686 | break; | |
687 | ||
688 | case 'C': | |
5ac34ac3 | 689 | if (operand->X_op == O_constant && |
355afbcd KR |
690 | operand->X_add_number < 4) |
691 | { | |
692 | opcode |= operand->X_add_number << 16; | |
693 | continue; | |
694 | } | |
695 | break; | |
696 | ||
697 | case 'F': | |
5ac34ac3 | 698 | if (operand->X_op == O_constant && |
355afbcd KR |
699 | operand->X_add_number < 16) |
700 | { | |
701 | opcode |= operand->X_add_number << 18; | |
702 | continue; | |
703 | } | |
704 | break; | |
705 | ||
706 | default: | |
707 | BAD_CASE (*args); | |
fecd2382 | 708 | } |
355afbcd KR |
709 | /* Types or values of args don't match. */ |
710 | as_bad ("Invalid operands"); | |
711 | return; | |
712 | } | |
fecd2382 RP |
713 | } |
714 | ||
715 | /* | |
a39116f1 RP |
716 | This is identical to the md_atof in m68k.c. I think this is right, |
717 | but I'm not sure. | |
355afbcd | 718 | |
a39116f1 RP |
719 | Turn a string in input_line_pointer into a floating point constant of type |
720 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
721 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
722 | */ | |
fecd2382 RP |
723 | |
724 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
725 | #define MAX_LITTLENUMS 6 | |
726 | ||
727 | char * | |
355afbcd KR |
728 | md_atof (type, litP, sizeP) |
729 | char type; | |
730 | char *litP; | |
731 | int *sizeP; | |
fecd2382 | 732 | { |
355afbcd KR |
733 | int prec; |
734 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
735 | LITTLENUM_TYPE *wordP; | |
736 | char *t; | |
737 | ||
738 | switch (type) | |
739 | { | |
740 | ||
741 | case 'f': | |
742 | case 'F': | |
743 | case 's': | |
744 | case 'S': | |
745 | prec = 2; | |
746 | break; | |
747 | ||
748 | case 'd': | |
749 | case 'D': | |
750 | case 'r': | |
751 | case 'R': | |
752 | prec = 4; | |
753 | break; | |
754 | ||
755 | case 'x': | |
756 | case 'X': | |
757 | prec = 6; | |
758 | break; | |
759 | ||
760 | case 'p': | |
761 | case 'P': | |
762 | prec = 6; | |
763 | break; | |
764 | ||
765 | default: | |
766 | *sizeP = 0; | |
767 | return "Bad call to MD_ATOF()"; | |
768 | } | |
769 | t = atof_ieee (input_line_pointer, type, words); | |
770 | if (t) | |
771 | input_line_pointer = t; | |
772 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
773 | for (wordP = words; prec--;) | |
774 | { | |
4f0bccc7 | 775 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
776 | litP += sizeof (LITTLENUM_TYPE); |
777 | } | |
778 | return ""; /* Someone should teach Dean about null pointers */ | |
fecd2382 RP |
779 | } |
780 | ||
781 | /* | |
782 | * Write out big-endian. | |
783 | */ | |
784 | void | |
355afbcd KR |
785 | md_number_to_chars (buf, val, n) |
786 | char *buf; | |
c463189d | 787 | valueT val; |
355afbcd | 788 | int n; |
fecd2382 | 789 | { |
355afbcd KR |
790 | |
791 | switch (n) | |
792 | { | |
793 | ||
794 | case 4: | |
795 | *buf++ = val >> 24; | |
796 | *buf++ = val >> 16; | |
797 | case 2: | |
798 | *buf++ = val >> 8; | |
799 | case 1: | |
800 | *buf = val; | |
801 | break; | |
802 | ||
803 | default: | |
804 | as_fatal ("failed sanity check."); | |
805 | } | |
806 | return; | |
fecd2382 RP |
807 | } |
808 | ||
355afbcd KR |
809 | void |
810 | md_apply_fix (fixP, val) | |
811 | fixS *fixP; | |
812 | long val; | |
fecd2382 | 813 | { |
355afbcd KR |
814 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
815 | ||
816 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
817 | ||
818 | ||
819 | know (fixP->fx_size == 4); | |
820 | know (fixP->fx_r_type < NO_RELOC); | |
821 | ||
822 | /* | |
a39116f1 RP |
823 | * This is a hack. There should be a better way to |
824 | * handle this. | |
825 | */ | |
355afbcd KR |
826 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
827 | { | |
828 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
829 | } | |
830 | ||
831 | switch (fixP->fx_r_type) | |
832 | { | |
833 | ||
834 | case RELOC_32: | |
835 | buf[0] = val >> 24; | |
836 | buf[1] = val >> 16; | |
837 | buf[2] = val >> 8; | |
838 | buf[3] = val; | |
839 | break; | |
840 | ||
841 | case RELOC_8: | |
842 | buf[0] = val; | |
843 | break; | |
844 | ||
845 | case RELOC_WDISP30: | |
846 | val = (val >>= 2) + 1; | |
847 | buf[0] |= (val >> 24) & 0x3f; | |
848 | buf[1] = (val >> 16); | |
849 | buf[2] = val >> 8; | |
850 | buf[3] = val; | |
851 | break; | |
852 | ||
853 | case RELOC_HI22: | |
854 | buf[1] |= (val >> 26) & 0x3f; | |
855 | buf[2] = val >> 18; | |
856 | buf[3] = val >> 10; | |
857 | break; | |
858 | ||
859 | case RELOC_LO10: | |
860 | buf[2] |= (val >> 8) & 0x03; | |
861 | buf[3] = val; | |
862 | break; | |
863 | ||
864 | case RELOC_BASE13: | |
865 | buf[2] |= (val >> 8) & 0x1f; | |
866 | buf[3] = val; | |
867 | break; | |
868 | ||
869 | case RELOC_WDISP22: | |
870 | val = (val >>= 2) + 1; | |
871 | /* FALLTHROUGH */ | |
872 | case RELOC_BASE22: | |
873 | buf[1] |= (val >> 16) & 0x3f; | |
874 | buf[2] = val >> 8; | |
875 | buf[3] = val; | |
876 | break; | |
877 | ||
fecd2382 | 878 | #if 0 |
355afbcd KR |
879 | case RELOC_PC10: |
880 | case RELOC_PC22: | |
881 | case RELOC_JMP_TBL: | |
882 | case RELOC_SEGOFF16: | |
883 | case RELOC_GLOB_DAT: | |
884 | case RELOC_JMP_SLOT: | |
885 | case RELOC_RELATIVE: | |
fecd2382 | 886 | #endif |
355afbcd KR |
887 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
888 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
889 | buf[3] = val >> 2; | |
890 | break; | |
891 | ||
892 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
893 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
894 | buf[3] = val; | |
895 | break; | |
896 | ||
897 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
898 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
899 | buf[3] = val >> 16; | |
900 | break; | |
901 | ||
902 | case NO_RELOC: | |
903 | default: | |
904 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
905 | break; | |
906 | } | |
907 | return; | |
fecd2382 RP |
908 | } |
909 | ||
910 | #ifdef OBJ_COFF | |
355afbcd KR |
911 | short |
912 | tc_coff_fix2rtype (fixP) | |
913 | fixS *fixP; | |
fecd2382 | 914 | { |
355afbcd KR |
915 | |
916 | switch (fixP->fx_r_type) | |
917 | { | |
918 | case RELOC_32: | |
919 | return (R_WORD); | |
920 | case RELOC_8: | |
921 | return (R_BYTE); | |
922 | case RELOC_CONST: | |
923 | return (R_ILOHALF); | |
924 | case RELOC_CONSTH: | |
925 | return (R_IHIHALF); | |
926 | case RELOC_JUMPTARG: | |
927 | return (R_IREL); | |
928 | default: | |
929 | printf ("need %o3\n", fixP->fx_r_type); | |
930 | abort (); | |
931 | } /* switch on type */ | |
932 | ||
933 | return (0); | |
934 | } /* tc_coff_fix2rtype() */ | |
935 | ||
fecd2382 RP |
936 | #endif /* OBJ_COFF */ |
937 | ||
938 | /* should never be called for sparc */ | |
355afbcd KR |
939 | void |
940 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
941 | char *ptr; | |
c463189d | 942 | addressT from_addr, to_addr; |
355afbcd KR |
943 | fragS *frag; |
944 | symbolS *to_symbol; | |
fecd2382 | 945 | { |
355afbcd | 946 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
947 | } |
948 | ||
fecd2382 | 949 | /* should never be called for 29k */ |
355afbcd KR |
950 | void |
951 | md_convert_frag (headers, fragP) | |
952 | object_headers *headers; | |
953 | register fragS *fragP; | |
fecd2382 | 954 | { |
355afbcd | 955 | as_fatal ("sparc_convert_frag\n"); |
fecd2382 RP |
956 | } |
957 | ||
958 | /* should never be called for 29k */ | |
355afbcd KR |
959 | void |
960 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
961 | char *ptr; | |
c463189d ME |
962 | addressT from_addr; |
963 | addressT to_addr; | |
355afbcd KR |
964 | fragS *frag; |
965 | symbolS *to_symbol; | |
fecd2382 | 966 | { |
355afbcd | 967 | as_fatal ("sparc_create_long_jump\n"); |
fecd2382 RP |
968 | } |
969 | ||
542e1629 | 970 | /* should never be called for a29k */ |
355afbcd KR |
971 | int |
972 | md_estimate_size_before_relax (fragP, segtype) | |
973 | register fragS *fragP; | |
974 | segT segtype; | |
fecd2382 | 975 | { |
355afbcd KR |
976 | as_fatal ("sparc_estimate_size_before_relax\n"); |
977 | return (0); | |
fecd2382 RP |
978 | } |
979 | ||
980 | #if 0 | |
981 | /* for debugging only */ | |
982 | static void | |
355afbcd KR |
983 | print_insn (insn) |
984 | struct machine_it *insn; | |
fecd2382 | 985 | { |
355afbcd KR |
986 | char *Reloc[] = |
987 | { | |
988 | "RELOC_8", | |
989 | "RELOC_16", | |
990 | "RELOC_32", | |
991 | "RELOC_DISP8", | |
992 | "RELOC_DISP16", | |
993 | "RELOC_DISP32", | |
994 | "RELOC_WDISP30", | |
995 | "RELOC_WDISP22", | |
996 | "RELOC_HI22", | |
997 | "RELOC_22", | |
998 | "RELOC_13", | |
999 | "RELOC_LO10", | |
1000 | "RELOC_SFA_BASE", | |
1001 | "RELOC_SFA_OFF13", | |
1002 | "RELOC_BASE10", | |
1003 | "RELOC_BASE13", | |
1004 | "RELOC_BASE22", | |
1005 | "RELOC_PC10", | |
1006 | "RELOC_PC22", | |
1007 | "RELOC_JMP_TBL", | |
1008 | "RELOC_SEGOFF16", | |
1009 | "RELOC_GLOB_DAT", | |
1010 | "RELOC_JMP_SLOT", | |
1011 | "RELOC_RELATIVE", | |
1012 | "NO_RELOC" | |
1013 | }; | |
1014 | ||
1015 | if (insn->error) | |
1016 | { | |
1017 | fprintf (stderr, "ERROR: %s\n"); | |
1018 | } | |
1019 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
1020 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
1021 | fprintf (stderr, "exp = {\n"); | |
1022 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
1023 | insn->exp.X_add_symbol ? | |
1024 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
1025 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
5ac34ac3 ILT |
1026 | fprintf (stderr, "\t\tX_op_symbol = %s\n", |
1027 | insn->exp.X_op_symbol ? | |
1028 | (S_GET_NAME (insn->exp.X_op_symbol) ? | |
1029 | S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0"); | |
355afbcd KR |
1030 | fprintf (stderr, "\t\tX_add_number = %d\n", |
1031 | insn->exp.X_add_number); | |
1032 | fprintf (stderr, "}\n"); | |
1033 | return; | |
fecd2382 | 1034 | } |
355afbcd | 1035 | |
fecd2382 RP |
1036 | #endif |
1037 | ||
a79c6033 | 1038 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1039 | |
a79c6033 RP |
1040 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1041 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1042 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1043 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1044 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1045 | |
a79c6033 | 1046 | #ifdef OBJ_AOUT |
fecd2382 | 1047 | |
355afbcd KR |
1048 | void |
1049 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1050 | char *where; | |
1051 | fixS *fixP; | |
1052 | relax_addressT segment_address_in_file; | |
a79c6033 | 1053 | { |
355afbcd KR |
1054 | long r_symbolnum; |
1055 | ||
1056 | know (fixP->fx_r_type < NO_RELOC); | |
1057 | know (fixP->fx_addsy != NULL); | |
1058 | ||
1059 | md_number_to_chars (where, | |
1060 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1061 | 4); | |
1062 | ||
1063 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1064 | ? S_GET_TYPE (fixP->fx_addsy) | |
1065 | : fixP->fx_addsy->sy_number); | |
1066 | ||
1067 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1068 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1069 | where[6] = r_symbolnum & 0x0ff; | |
1070 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1071 | /* Also easy */ | |
1072 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
1073 | ||
1074 | return; | |
1075 | } /* tc_aout_fix_to_chars() */ | |
fecd2382 RP |
1076 | |
1077 | #endif /* OBJ_AOUT */ | |
1078 | ||
1079 | int | |
355afbcd KR |
1080 | md_parse_option (argP, cntP, vecP) |
1081 | char **argP; | |
1082 | int *cntP; | |
1083 | char ***vecP; | |
fecd2382 | 1084 | { |
355afbcd | 1085 | return (0); |
fecd2382 RP |
1086 | } |
1087 | ||
1088 | ||
1089 | /* Default the values of symbols known that should be "predefined". We | |
1090 | don't bother to predefine them unless you actually use one, since there | |
1091 | are a lot of them. */ | |
1092 | ||
355afbcd KR |
1093 | symbolS * |
1094 | md_undefined_symbol (name) | |
1095 | char *name; | |
fecd2382 | 1096 | { |
355afbcd KR |
1097 | long regnum; |
1098 | char testbuf[5 + /*SLOP*/ 5]; | |
1099 | ||
1100 | if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L') | |
1101 | { | |
1102 | /* Perhaps a global or local register name */ | |
1103 | if (name[1] == 'r' || name[1] == 'R') | |
1104 | { | |
1105 | /* Parse the number, make sure it has no extra zeroes or trailing | |
a39116f1 | 1106 | chars */ |
355afbcd KR |
1107 | regnum = atol (&name[2]); |
1108 | if (regnum > 127) | |
1109 | return 0; | |
1110 | sprintf (testbuf, "%ld", regnum); | |
1111 | if (strcmp (testbuf, &name[2]) != 0) | |
1112 | return 0; /* gr007 or lr7foo or whatever */ | |
1113 | ||
1114 | /* We have a wiener! Define and return a new symbol for it. */ | |
1115 | if (name[0] == 'l' || name[0] == 'L') | |
1116 | regnum += 128; | |
4f0bccc7 ILT |
1117 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, |
1118 | &zero_address_frag)); | |
355afbcd KR |
1119 | } |
1120 | } | |
1121 | ||
1122 | return 0; | |
fecd2382 RP |
1123 | } |
1124 | ||
1125 | /* Parse an operand that is machine-specific. */ | |
1126 | ||
355afbcd KR |
1127 | void |
1128 | md_operand (expressionP) | |
1129 | expressionS *expressionP; | |
fecd2382 | 1130 | { |
355afbcd KR |
1131 | |
1132 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1133 | { | |
1134 | /* We have a numeric register expression. No biggy. */ | |
1135 | input_line_pointer += 2; /* Skip %% */ | |
1136 | (void) expression (expressionP); | |
5ac34ac3 | 1137 | if (expressionP->X_op != O_constant |
355afbcd KR |
1138 | || expressionP->X_add_number > 255) |
1139 | as_bad ("Invalid expression after %%%%\n"); | |
5ac34ac3 | 1140 | expressionP->X_op = O_register; |
355afbcd KR |
1141 | } |
1142 | else if (input_line_pointer[0] == '&') | |
1143 | { | |
1144 | /* We are taking the 'address' of a register...this one is not | |
5ac34ac3 ILT |
1145 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1146 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1147 | input_line_pointer++; /* Skip & */ |
1148 | (void) expression (expressionP); | |
5ac34ac3 | 1149 | if (expressionP->X_op != O_register) |
355afbcd KR |
1150 | as_bad ("Invalid register in & expression"); |
1151 | else | |
5ac34ac3 | 1152 | expressionP->X_op = O_constant; |
355afbcd | 1153 | } |
fecd2382 RP |
1154 | } |
1155 | ||
1156 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1157 | valueT |
355afbcd KR |
1158 | md_section_align (segment, size) |
1159 | segT segment; | |
c463189d | 1160 | valueT size; |
fecd2382 | 1161 | { |
355afbcd | 1162 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1163 | } |
1164 | ||
1165 | /* Exactly what point is a PC-relative offset relative TO? | |
1166 | On the 29000, they're relative to the address of the instruction, | |
1167 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1168 | long |
1169 | md_pcrel_from (fixP) | |
1170 | fixS *fixP; | |
fecd2382 | 1171 | { |
355afbcd | 1172 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1173 | } |
1174 | ||
1175 | /* | |
1176 | * Local Variables: | |
1177 | * comment-column: 0 | |
1178 | * End: | |
1179 | */ | |
1180 | ||
1181 | /* end of tc-a29k.c */ |