Commit | Line | Data |
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fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
01170860 | 2 | Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc. |
a39116f1 RP |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
fecd2382 | 24 | #include "as.h" |
587c4264 | 25 | #include "read.h" |
fecd2382 | 26 | |
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
35 | const relax_typeS md_relax_table[] = { 0 }; | |
36 | ||
37 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
38 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
39 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
40 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
41 | ||
42 | /* handle of the OPCODE hash table */ | |
43 | static struct hash_control *op_hash = NULL; | |
44 | ||
45 | struct machine_it { | |
a39116f1 RP |
46 | char *error; |
47 | unsigned long opcode; | |
48 | struct nlist *nlistp; | |
49 | expressionS exp; | |
50 | int pcrel; | |
51 | int reloc_offset; /* Offset of reloc within insn */ | |
c593cf41 SC |
52 | |
53 | int reloc; | |
54 | ||
55 | ||
fecd2382 RP |
56 | } the_insn; |
57 | ||
a87b3269 | 58 | #if __STDC__ == 1 |
fecd2382 RP |
59 | |
60 | /* static int getExpression(char *str); */ | |
61 | static void machine_ip(char *str); | |
62 | /* static void print_insn(struct machine_it *insn); */ | |
63 | static void s_data1(void); | |
64 | static void s_use(void); | |
65 | ||
a87b3269 | 66 | #else /* not __STDC__ */ |
fecd2382 RP |
67 | |
68 | /* static int getExpression(); */ | |
69 | static void machine_ip(); | |
70 | /* static void print_insn(); */ | |
71 | static void s_data1(); | |
72 | static void s_use(); | |
73 | ||
a87b3269 | 74 | #endif /* not __STDC__ */ |
fecd2382 RP |
75 | |
76 | const pseudo_typeS | |
a39116f1 RP |
77 | md_pseudo_table[] = { |
78 | { "align", s_align_bytes, 4 }, | |
79 | { "block", s_space, 0 }, | |
80 | { "cputype", s_ignore, 0 }, /* CPU as 29000 or 29050 */ | |
81 | { "reg", s_lsym, 0 }, /* Register equate, same as equ */ | |
82 | { "space", s_ignore, 0 }, /* Listing control */ | |
83 | { "sect", s_ignore, 0 }, /* Creation of coff sections */ | |
c58dbabf SC |
84 | #ifndef OBJ_COFF |
85 | /* We can do this right with coff */ | |
a39116f1 | 86 | { "use", s_use, 0 }, |
c58dbabf | 87 | #endif |
a39116f1 RP |
88 | { "word", cons, 4 }, |
89 | { NULL, 0, 0 }, | |
90 | }; | |
fecd2382 RP |
91 | |
92 | int md_short_jump_size = 4; | |
93 | int md_long_jump_size = 4; | |
57574979 SC |
94 | #if defined(BFD_HEADERS) |
95 | #ifdef RELSZ | |
96 | int md_reloc_size = RELSZ; /* Coff headers */ | |
97 | #else | |
98 | int md_reloc_size = 12; /* something else headers */ | |
99 | #endif | |
100 | #else | |
101 | int md_reloc_size = 12; /* Not bfdized*/ | |
102 | #endif | |
fecd2382 RP |
103 | |
104 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 105 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 106 | const char comment_chars[] = ";"; |
fecd2382 RP |
107 | |
108 | /* This array holds the chars that only start a comment at the beginning of | |
109 | a line. If the line seems to have the form '# 123 filename' | |
110 | .line and .file directives will appear in the pre-processed output */ | |
111 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
112 | first line of the input file. This is because the compiler outputs | |
113 | #NO_APP at the beginning of its output. */ | |
114 | /* Also note that comments like this one will always work */ | |
587c4264 | 115 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
116 | |
117 | /* We needed an unused char for line separation to work around the | |
118 | lack of macros, using sed and such. */ | |
587c4264 | 119 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
120 | |
121 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 122 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
123 | |
124 | /* Chars that mean this number is a floating point constant */ | |
125 | /* As in 0f12.456 */ | |
126 | /* or 0d1.2345e12 */ | |
587c4264 | 127 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
128 | |
129 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
130 | changed in read.c . Ideally it shouldn't have to know about it at all, | |
131 | but nothing is ideal around here. | |
a39116f1 | 132 | */ |
fecd2382 RP |
133 | |
134 | static unsigned char octal[256]; | |
135 | #define isoctal(c) octal[c] | |
a39116f1 | 136 | static unsigned char toHex[256]; |
fecd2382 RP |
137 | |
138 | /* | |
139 | * anull bit - causes the branch delay slot instructions to not be executed | |
140 | */ | |
141 | #define ANNUL (1 << 29) | |
142 | ||
143 | static void | |
a39116f1 | 144 | s_use() |
fecd2382 | 145 | { |
a39116f1 RP |
146 | |
147 | if (strncmp(input_line_pointer, ".text", 5) == 0) { | |
148 | input_line_pointer += 5; | |
149 | s_text(); | |
150 | return; | |
151 | } | |
152 | if (strncmp(input_line_pointer, ".data", 5) == 0) { | |
153 | input_line_pointer += 5; | |
154 | s_data(); | |
155 | return; | |
156 | } | |
157 | if (strncmp(input_line_pointer, ".data1", 6) == 0) { | |
158 | input_line_pointer += 6; | |
159 | s_data1(); | |
160 | return; | |
161 | } | |
162 | /* Literals can't go in the text segment because you can't read | |
163 | from instruction memory on some 29k's. So, into initialized data. */ | |
164 | if (strncmp(input_line_pointer, ".lit", 4) == 0) { | |
165 | input_line_pointer += 4; | |
166 | subseg_new(SEG_DATA, 200); | |
167 | demand_empty_rest_of_line(); | |
168 | return; | |
169 | } | |
170 | ||
171 | as_bad("Unknown segment type"); | |
fecd2382 RP |
172 | demand_empty_rest_of_line(); |
173 | return; | |
fecd2382 RP |
174 | } |
175 | ||
176 | static void | |
a39116f1 | 177 | s_data1() |
fecd2382 | 178 | { |
a39116f1 RP |
179 | subseg_new(SEG_DATA, 1); |
180 | demand_empty_rest_of_line(); | |
181 | return; | |
fecd2382 RP |
182 | } |
183 | ||
184 | /* Install symbol definition that maps REGNAME to REGNO. | |
185 | FIXME-SOON: These are not recognized in mixed case. */ | |
186 | ||
187 | static void | |
a39116f1 RP |
188 | insert_sreg (regname, regnum) |
189 | char *regname; | |
190 | int regnum; | |
fecd2382 RP |
191 | { |
192 | /* FIXME-SOON, put something in these syms so they won't be output to the symbol | |
193 | table of the resulting object file. */ | |
194 | ||
195 | /* Must be large enough to hold the names of the special registers. */ | |
196 | char buf[80]; | |
197 | int i; | |
198 | ||
199 | symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag)); | |
200 | for (i = 0; regname[i]; i++) | |
201 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
202 | buf[i] = '\0'; | |
203 | ||
204 | symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag)); | |
205 | } /* insert_sreg() */ | |
206 | ||
207 | /* Install symbol definitions for assorted special registers. | |
208 | See ASM29K Ref page 2-9. */ | |
209 | ||
210 | void define_some_regs() { | |
211 | #define SREG 256 | |
212 | ||
213 | /* Protected special-purpose register names */ | |
214 | insert_sreg ("vab", SREG+0); | |
215 | insert_sreg ("ops", SREG+1); | |
216 | insert_sreg ("cps", SREG+2); | |
217 | insert_sreg ("cfg", SREG+3); | |
218 | insert_sreg ("cha", SREG+4); | |
219 | insert_sreg ("chd", SREG+5); | |
220 | insert_sreg ("chc", SREG+6); | |
221 | insert_sreg ("rbp", SREG+7); | |
222 | insert_sreg ("tmc", SREG+8); | |
223 | insert_sreg ("tmr", SREG+9); | |
224 | insert_sreg ("pc0", SREG+10); | |
225 | insert_sreg ("pc1", SREG+11); | |
226 | insert_sreg ("pc2", SREG+12); | |
227 | insert_sreg ("mmu", SREG+13); | |
228 | insert_sreg ("lru", SREG+14); | |
229 | ||
230 | /* Unprotected special-purpose register names */ | |
231 | insert_sreg ("ipc", SREG+128); | |
232 | insert_sreg ("ipa", SREG+129); | |
233 | insert_sreg ("ipb", SREG+130); | |
234 | insert_sreg ("q", SREG+131); | |
235 | insert_sreg ("alu", SREG+132); | |
236 | insert_sreg ("bp", SREG+133); | |
237 | insert_sreg ("fc", SREG+134); | |
238 | insert_sreg ("cr", SREG+135); | |
239 | insert_sreg ("fpe", SREG+160); | |
240 | insert_sreg ("inte",SREG+161); | |
241 | insert_sreg ("fps", SREG+162); | |
242 | /* "", SREG+163); Reserved */ | |
243 | insert_sreg ("exop",SREG+164); | |
244 | } /* define_some_regs() */ | |
245 | ||
246 | /* This function is called once, at assembler startup time. It should | |
247 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
248 | void | |
a39116f1 | 249 | md_begin() |
fecd2382 | 250 | { |
a39116f1 RP |
251 | register char *retval = NULL; |
252 | int lose = 0; | |
253 | register int skipnext = 0; | |
254 | register unsigned int i; | |
255 | register char *strend, *strend2; | |
256 | ||
257 | /* Hash up all the opcodes for fast use later. */ | |
258 | ||
259 | op_hash = hash_new(); | |
260 | if (op_hash == NULL) | |
261 | as_fatal("Virtual memory exhausted"); | |
262 | ||
263 | for (i = 0; i < num_opcodes; i++) | |
264 | { | |
265 | const char *name = machine_opcodes[i].name; | |
266 | ||
267 | if (skipnext) { | |
268 | skipnext = 0; | |
269 | continue; | |
270 | } | |
271 | ||
272 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
273 | variations (b/i field and P/A field) and handle them. */ | |
274 | ||
275 | if (!strcmp (name, machine_opcodes[i+1].name)) { | |
276 | if ((machine_opcodes[i].opcode ^ machine_opcodes[i+1].opcode) | |
277 | != 0x01000000) | |
278 | goto bad_table; | |
279 | strend = machine_opcodes[i ].args+strlen(machine_opcodes[i ].args)-1; | |
280 | strend2 = machine_opcodes[i+1].args+strlen(machine_opcodes[i+1].args)-1; | |
281 | switch (*strend) { | |
282 | case 'b': | |
283 | if (*strend2 != 'i') goto bad_table; | |
284 | break; | |
285 | case 'i': | |
286 | if (*strend2 != 'b') goto bad_table; | |
287 | break; | |
288 | case 'P': | |
289 | if (*strend2 != 'A') goto bad_table; | |
290 | break; | |
291 | case 'A': | |
292 | if (*strend2 != 'P') goto bad_table; | |
293 | break; | |
294 | default: | |
295 | bad_table: | |
296 | fprintf (stderr, "internal error: can't handle opcode %s\n", name); | |
297 | lose = 1; | |
298 | } | |
299 | ||
300 | /* OK, this is an i/b or A/P pair. We skip the higher-valued one, | |
301 | and let the code for operand checking handle OR-ing in the bit. */ | |
302 | if (machine_opcodes[i].opcode & 1) | |
303 | continue; | |
304 | else | |
305 | skipnext = 1; | |
306 | } | |
307 | ||
308 | retval = hash_insert (op_hash, name, &machine_opcodes[i]); | |
309 | if (retval != NULL && *retval != '\0') | |
310 | { | |
311 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
312 | machine_opcodes[i].name, retval); | |
313 | lose = 1; | |
314 | } | |
315 | } | |
316 | ||
317 | if (lose) | |
318 | as_fatal("Broken assembler. No assembly attempted."); | |
319 | ||
320 | for (i = '0'; i < '8'; ++i) | |
321 | octal[i] = 1; | |
322 | for (i = '0'; i <= '9'; ++i) | |
323 | toHex[i] = i - '0'; | |
324 | for (i = 'a'; i <= 'f'; ++i) | |
325 | toHex[i] = i + 10 - 'a'; | |
326 | for (i = 'A'; i <= 'F'; ++i) | |
327 | toHex[i] = i + 10 - 'A'; | |
328 | ||
329 | define_some_regs (); | |
fecd2382 RP |
330 | } |
331 | ||
332 | void md_end() { | |
a39116f1 | 333 | return; |
fecd2382 RP |
334 | } |
335 | ||
336 | /* Assemble a single instruction. Its label has already been handled | |
337 | by the generic front end. We just parse opcode and operands, and | |
338 | produce the bytes of data and relocation. */ | |
339 | ||
340 | void md_assemble(str) | |
a39116f1 | 341 | char *str; |
fecd2382 | 342 | { |
a39116f1 RP |
343 | char *toP; |
344 | /* !!!! int rsd; */ | |
345 | ||
346 | know(str); | |
347 | machine_ip(str); | |
348 | toP = frag_more(4); | |
349 | /* put out the opcode */ | |
350 | md_number_to_chars(toP, the_insn.opcode, 4); | |
351 | ||
352 | /* put out the symbol-dependent stuff */ | |
353 | if (the_insn.reloc != NO_RELOC) { | |
354 | fix_new( | |
355 | frag_now, /* which frag */ | |
356 | (toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */ | |
357 | 4, /* size */ | |
358 | the_insn.exp.X_add_symbol, | |
359 | the_insn.exp.X_subtract_symbol, | |
360 | the_insn.exp.X_add_number, | |
361 | the_insn.pcrel, | |
362 | the_insn.reloc | |
363 | ); | |
364 | } | |
fecd2382 RP |
365 | } |
366 | ||
367 | char * | |
a39116f1 RP |
368 | parse_operand (s, operandp) |
369 | char *s; | |
370 | expressionS *operandp; | |
fecd2382 | 371 | { |
c58dbabf SC |
372 | char *save = input_line_pointer; |
373 | char *new; | |
374 | segT seg; | |
a39116f1 | 375 | |
c58dbabf SC |
376 | input_line_pointer = s; |
377 | seg = expr (0, operandp); | |
378 | new = input_line_pointer; | |
379 | input_line_pointer = save; | |
380 | ||
381 | if (seg == SEG_ABSENT) | |
382 | as_bad("Missing operand"); | |
383 | return new; | |
fecd2382 RP |
384 | } |
385 | ||
386 | /* Instruction parsing. Takes a string containing the opcode. | |
387 | Operands are at input_line_pointer. Output is in the_insn. | |
388 | Warnings or errors are generated. */ | |
a39116f1 | 389 | |
fecd2382 | 390 | static void |
a39116f1 RP |
391 | machine_ip(str) |
392 | char *str; | |
fecd2382 | 393 | { |
a39116f1 RP |
394 | char *s; |
395 | const char *args; | |
396 | /* !!!! char c; */ | |
397 | /* !!!! unsigned long i; */ | |
398 | struct machine_opcode *insn; | |
399 | char *argsStart; | |
400 | unsigned long opcode; | |
401 | /* !!!! unsigned int mask; */ | |
402 | expressionS the_operand; | |
403 | expressionS *operand = &the_operand; | |
404 | unsigned int reg; | |
405 | ||
406 | /* Must handle `div0' opcode. */ | |
407 | s = str; | |
408 | if (isalpha(*s)) | |
409 | for (; isalnum(*s); ++s) | |
410 | if (isupper (*s)) | |
411 | *s = tolower (*s); | |
412 | ||
413 | switch (*s) { | |
414 | case '\0': | |
415 | break; | |
416 | ||
417 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
418 | *s++ = '\0'; | |
419 | break; | |
420 | ||
421 | default: | |
422 | as_bad("Unknown opcode: `%s'", str); | |
fecd2382 | 423 | return; |
a39116f1 RP |
424 | } |
425 | if ((insn = (struct machine_opcode *) hash_find(op_hash, str)) == NULL) { | |
426 | as_bad("Unknown opcode `%s'.", str); | |
427 | return; | |
428 | } | |
429 | argsStart = s; | |
430 | opcode = insn->opcode; | |
542e1629 | 431 | memset(&the_insn, '\0', sizeof(the_insn)); |
a39116f1 RP |
432 | the_insn.reloc = NO_RELOC; |
433 | ||
434 | /* | |
435 | * Build the opcode, checking as we go to make | |
436 | * sure that the operands match. | |
437 | * | |
438 | * If an operand matches, we modify the_insn or opcode appropriately, | |
439 | * and do a "continue". If an operand fails to match, we "break". | |
440 | */ | |
441 | if (insn->args[0] != '\0') | |
442 | s = parse_operand (s, operand); /* Prime the pump */ | |
443 | ||
444 | for (args = insn->args; ; ++args) { | |
445 | switch (*args) { | |
446 | ||
447 | case '\0': /* end of args */ | |
448 | if (*s == '\0') { | |
449 | /* We are truly done. */ | |
450 | the_insn.opcode = opcode; | |
451 | return; | |
452 | } | |
453 | as_bad("Too many operands: %s", s); | |
454 | break; | |
455 | ||
456 | case ',': /* Must match a comma */ | |
457 | if (*s++ == ',') { | |
458 | s = parse_operand (s, operand); /* Parse next opnd */ | |
459 | continue; | |
460 | } | |
461 | break; | |
462 | ||
463 | case 'v': /* Trap numbers (immediate field) */ | |
464 | if (operand->X_seg == SEG_ABSOLUTE) { | |
465 | if (operand->X_add_number < 256) { | |
466 | opcode |= (operand->X_add_number << 16); | |
467 | continue; | |
468 | } else { | |
469 | as_bad("Immediate value of %d is too large", | |
470 | operand->X_add_number); | |
471 | continue; | |
472 | } | |
473 | } | |
474 | the_insn.reloc = RELOC_8; | |
475 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
476 | the_insn.exp = *operand; | |
477 | continue; | |
478 | ||
479 | case 'b': /* A general register or 8-bit immediate */ | |
480 | case 'i': | |
481 | /* We treat the two cases identically since we mashed | |
482 | them together in the opcode table. */ | |
483 | if (operand->X_seg == SEG_REGISTER) | |
484 | goto general_reg; | |
485 | ||
486 | opcode |= IMMEDIATE_BIT; | |
487 | if (operand->X_seg == SEG_ABSOLUTE) { | |
488 | if (operand->X_add_number < 256) { | |
489 | opcode |= operand->X_add_number; | |
490 | continue; | |
491 | } else { | |
492 | as_bad("Immediate value of %d is too large", | |
493 | operand->X_add_number); | |
494 | continue; | |
495 | } | |
496 | } | |
497 | the_insn.reloc = RELOC_8; | |
498 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
499 | the_insn.exp = *operand; | |
500 | continue; | |
501 | ||
502 | case 'a': /* next operand must be a register */ | |
503 | case 'c': | |
504 | general_reg: | |
505 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
506 | if (operand->X_seg != SEG_REGISTER) | |
507 | break; /* Only registers */ | |
508 | know (operand->X_add_symbol == 0); | |
509 | know (operand->X_subtract_symbol == 0); | |
510 | reg = operand->X_add_number; | |
511 | if (reg >= SREG) | |
512 | break; /* No special registers */ | |
513 | ||
514 | /* | |
515 | * Got the register, now figure out where | |
516 | * it goes in the opcode. | |
517 | */ | |
518 | switch (*args) { | |
519 | case 'a': | |
520 | opcode |= reg << 8; | |
521 | continue; | |
522 | ||
523 | case 'b': | |
524 | case 'i': | |
525 | opcode |= reg; | |
526 | continue; | |
527 | ||
528 | case 'c': | |
529 | opcode |= reg << 16; | |
530 | continue; | |
531 | } | |
532 | as_fatal("failed sanity check."); | |
533 | break; | |
534 | ||
535 | case 'x': /* 16 bit constant, zero-extended */ | |
536 | case 'X': /* 16 bit constant, one-extended */ | |
537 | if (operand->X_seg == SEG_ABSOLUTE) { | |
538 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
539 | ((operand->X_add_number & 0xFF00) << 8); | |
540 | continue; | |
541 | } | |
542 | the_insn.reloc = RELOC_CONST; | |
543 | the_insn.exp = *operand; | |
544 | continue; | |
545 | ||
546 | case 'h': | |
547 | if (operand->X_seg == SEG_ABSOLUTE) { | |
548 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
549 | (((unsigned long)operand->X_add_number | |
550 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
551 | continue; | |
552 | } | |
553 | the_insn.reloc = RELOC_CONSTH; | |
554 | the_insn.exp = *operand; | |
555 | continue; | |
556 | ||
557 | case 'P': /* PC-relative jump address */ | |
558 | case 'A': /* Absolute jump address */ | |
559 | /* These two are treated together since we folded the | |
560 | opcode table entries together. */ | |
561 | if (operand->X_seg == SEG_ABSOLUTE) { | |
562 | opcode |= ABSOLUTE_BIT | | |
563 | (operand->X_add_number & 0x0003FC00) << 6 | | |
564 | ((operand->X_add_number & 0x000003FC) >> 2); | |
565 | continue; | |
566 | } | |
567 | the_insn.reloc = RELOC_JUMPTARG; | |
568 | the_insn.exp = *operand; | |
569 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
570 | /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */ | |
571 | continue; | |
572 | ||
573 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
574 | if (operand->X_seg == SEG_ABSOLUTE) { | |
575 | if (operand->X_add_number == 0) | |
576 | continue; | |
577 | if (operand->X_add_number == 1) { | |
578 | opcode |= CE_BIT; | |
579 | continue; | |
580 | } | |
581 | } | |
582 | break; | |
583 | ||
584 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
585 | if (operand->X_seg == SEG_ABSOLUTE && | |
586 | operand->X_add_number < 128) { | |
587 | opcode |= (operand->X_add_number << 16); | |
588 | continue; | |
589 | } | |
590 | break; | |
591 | ||
592 | case 's': /* Special register number */ | |
593 | if (operand->X_seg != SEG_REGISTER) | |
594 | break; /* Only registers */ | |
595 | if (operand->X_add_number < SREG) | |
596 | break; /* Not a special register */ | |
597 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
598 | continue; | |
599 | ||
600 | case 'u': /* UI bit of CONVERT */ | |
601 | if (operand->X_seg == SEG_ABSOLUTE) { | |
602 | if (operand->X_add_number == 0) | |
603 | continue; | |
604 | if (operand->X_add_number == 1) { | |
605 | opcode |= UI_BIT; | |
606 | continue; | |
607 | } | |
608 | } | |
609 | break; | |
610 | ||
611 | case 'r': /* RND bits of CONVERT */ | |
612 | if (operand->X_seg == SEG_ABSOLUTE && | |
613 | operand->X_add_number < 8) { | |
614 | opcode |= operand->X_add_number << 4; | |
615 | continue; | |
616 | } | |
617 | break; | |
618 | ||
619 | case 'd': /* FD bits of CONVERT */ | |
620 | if (operand->X_seg == SEG_ABSOLUTE && | |
621 | operand->X_add_number < 4) { | |
622 | opcode |= operand->X_add_number << 2; | |
623 | continue; | |
624 | } | |
625 | break; | |
626 | ||
627 | ||
628 | case 'f': /* FS bits of CONVERT */ | |
629 | if (operand->X_seg == SEG_ABSOLUTE && | |
630 | operand->X_add_number < 4) { | |
631 | opcode |= operand->X_add_number << 0; | |
632 | continue; | |
633 | } | |
634 | break; | |
635 | ||
636 | case 'C': | |
637 | if (operand->X_seg == SEG_ABSOLUTE && | |
638 | operand->X_add_number < 4) { | |
639 | opcode |= operand->X_add_number << 16; | |
640 | continue; | |
641 | } | |
642 | break; | |
643 | ||
644 | case 'F': | |
645 | if (operand->X_seg == SEG_ABSOLUTE && | |
646 | operand->X_add_number < 16) { | |
647 | opcode |= operand->X_add_number << 18; | |
648 | continue; | |
649 | } | |
650 | break; | |
651 | ||
652 | default: | |
653 | BAD_CASE (*args); | |
fecd2382 | 654 | } |
a39116f1 RP |
655 | /* Types or values of args don't match. */ |
656 | as_bad("Invalid operands"); | |
657 | return; | |
fecd2382 | 658 | } |
fecd2382 RP |
659 | } |
660 | ||
661 | /* | |
a39116f1 RP |
662 | This is identical to the md_atof in m68k.c. I think this is right, |
663 | but I'm not sure. | |
664 | ||
665 | Turn a string in input_line_pointer into a floating point constant of type | |
666 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
667 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
668 | */ | |
fecd2382 RP |
669 | |
670 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
671 | #define MAX_LITTLENUMS 6 | |
672 | ||
673 | char * | |
a39116f1 RP |
674 | md_atof(type,litP,sizeP) |
675 | char type; | |
676 | char *litP; | |
677 | int *sizeP; | |
fecd2382 | 678 | { |
a39116f1 RP |
679 | int prec; |
680 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
681 | LITTLENUM_TYPE *wordP; | |
682 | char *t; | |
683 | ||
684 | switch(type) { | |
685 | ||
686 | case 'f': | |
687 | case 'F': | |
688 | case 's': | |
689 | case 'S': | |
690 | prec = 2; | |
691 | break; | |
692 | ||
693 | case 'd': | |
694 | case 'D': | |
695 | case 'r': | |
696 | case 'R': | |
697 | prec = 4; | |
698 | break; | |
699 | ||
700 | case 'x': | |
701 | case 'X': | |
702 | prec = 6; | |
703 | break; | |
704 | ||
705 | case 'p': | |
706 | case 'P': | |
707 | prec = 6; | |
708 | break; | |
709 | ||
710 | default: | |
711 | *sizeP=0; | |
712 | return "Bad call to MD_ATOF()"; | |
713 | } | |
714 | t=atof_ieee(input_line_pointer,type,words); | |
715 | if(t) | |
716 | input_line_pointer=t; | |
717 | *sizeP=prec * sizeof(LITTLENUM_TYPE); | |
718 | for(wordP=words;prec--;) { | |
719 | md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE)); | |
720 | litP+=sizeof(LITTLENUM_TYPE); | |
721 | } | |
722 | return ""; /* Someone should teach Dean about null pointers */ | |
fecd2382 RP |
723 | } |
724 | ||
725 | /* | |
726 | * Write out big-endian. | |
727 | */ | |
728 | void | |
a39116f1 RP |
729 | md_number_to_chars(buf,val,n) |
730 | char *buf; | |
731 | long val; | |
732 | int n; | |
fecd2382 | 733 | { |
a39116f1 RP |
734 | |
735 | switch(n) { | |
736 | ||
737 | case 4: | |
738 | *buf++ = val >> 24; | |
739 | *buf++ = val >> 16; | |
740 | case 2: | |
741 | *buf++ = val >> 8; | |
742 | case 1: | |
743 | *buf = val; | |
744 | break; | |
745 | ||
746 | default: | |
747 | as_fatal("failed sanity check."); | |
748 | } | |
749 | return; | |
fecd2382 RP |
750 | } |
751 | ||
752 | void md_apply_fix(fixP, val) | |
a39116f1 RP |
753 | fixS *fixP; |
754 | long val; | |
fecd2382 | 755 | { |
a39116f1 RP |
756 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
757 | ||
758 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
759 | ||
760 | ||
761 | know(fixP->fx_size == 4); | |
762 | know(fixP->fx_r_type < NO_RELOC); | |
763 | ||
764 | /* | |
765 | * This is a hack. There should be a better way to | |
766 | * handle this. | |
767 | */ | |
768 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) { | |
769 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
770 | } | |
771 | ||
772 | switch (fixP->fx_r_type) { | |
773 | ||
774 | case RELOC_32: | |
775 | buf[0] = val >> 24; | |
776 | buf[1] = val >> 16; | |
777 | buf[2] = val >> 8; | |
778 | buf[3] = val; | |
779 | break; | |
780 | ||
781 | case RELOC_8: | |
782 | buf[0] = val; | |
783 | break; | |
784 | ||
785 | case RELOC_WDISP30: | |
786 | val = (val >>= 2) + 1; | |
787 | buf[0] |= (val >> 24) & 0x3f; | |
788 | buf[1]= (val >> 16); | |
789 | buf[2] = val >> 8; | |
790 | buf[3] = val; | |
791 | break; | |
792 | ||
793 | case RELOC_HI22: | |
794 | buf[1] |= (val >> 26) & 0x3f; | |
795 | buf[2] = val >> 18; | |
796 | buf[3] = val >> 10; | |
797 | break; | |
798 | ||
799 | case RELOC_LO10: | |
800 | buf[2] |= (val >> 8) & 0x03; | |
801 | buf[3] = val; | |
802 | break; | |
803 | ||
804 | case RELOC_BASE13: | |
805 | buf[2] |= (val >> 8) & 0x1f; | |
806 | buf[3] = val; | |
807 | break; | |
808 | ||
809 | case RELOC_WDISP22: | |
810 | val = (val >>= 2) + 1; | |
811 | /* FALLTHROUGH */ | |
812 | case RELOC_BASE22: | |
813 | buf[1] |= (val >> 16) & 0x3f; | |
814 | buf[2] = val >> 8; | |
815 | buf[3] = val; | |
816 | break; | |
817 | ||
fecd2382 | 818 | #if 0 |
a39116f1 RP |
819 | case RELOC_PC10: |
820 | case RELOC_PC22: | |
821 | case RELOC_JMP_TBL: | |
822 | case RELOC_SEGOFF16: | |
823 | case RELOC_GLOB_DAT: | |
824 | case RELOC_JMP_SLOT: | |
825 | case RELOC_RELATIVE: | |
fecd2382 | 826 | #endif |
a39116f1 RP |
827 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
828 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
829 | buf[3] = val >> 2; | |
830 | break; | |
831 | ||
832 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
833 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
834 | buf[3] = val; | |
835 | break; | |
836 | ||
837 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
838 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
839 | buf[3] = val >> 16; | |
840 | break; | |
841 | ||
842 | case NO_RELOC: | |
843 | default: | |
844 | as_bad("bad relocation type: 0x%02x", fixP->fx_r_type); | |
845 | break; | |
846 | } | |
847 | return; | |
fecd2382 RP |
848 | } |
849 | ||
850 | #ifdef OBJ_COFF | |
851 | short tc_coff_fix2rtype(fixP) | |
852 | fixS *fixP; | |
853 | { | |
a39116f1 | 854 | |
fecd2382 RP |
855 | switch (fixP->fx_r_type) { |
856 | case RELOC_32: return(R_WORD); | |
857 | case RELOC_8: return(R_BYTE); | |
57574979 SC |
858 | case RELOC_CONST: return (R_ILOHALF); |
859 | case RELOC_CONSTH: return (R_IHIHALF); | |
860 | case RELOC_JUMPTARG: return (R_IREL); | |
861 | default: printf("need %o3\n", fixP->fx_r_type); | |
d312e231 | 862 | abort(); |
fecd2382 | 863 | } /* switch on type */ |
a39116f1 | 864 | |
fecd2382 RP |
865 | return(0); |
866 | } /* tc_coff_fix2rtype() */ | |
867 | #endif /* OBJ_COFF */ | |
868 | ||
869 | /* should never be called for sparc */ | |
870 | void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol) | |
a39116f1 RP |
871 | char *ptr; |
872 | long from_addr, to_addr; | |
fecd2382 RP |
873 | fragS *frag; |
874 | symbolS *to_symbol; | |
875 | { | |
a39116f1 | 876 | as_fatal("a29k_create_short_jmp\n"); |
fecd2382 RP |
877 | } |
878 | ||
fecd2382 | 879 | /* should never be called for 29k */ |
f6e504fe RP |
880 | void md_convert_frag(headers, fragP) |
881 | object_headers *headers; | |
a39116f1 | 882 | register fragS *fragP; |
fecd2382 | 883 | { |
a39116f1 | 884 | as_fatal("sparc_convert_frag\n"); |
fecd2382 RP |
885 | } |
886 | ||
887 | /* should never be called for 29k */ | |
888 | void md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol) | |
a39116f1 | 889 | char *ptr; |
542e1629 RP |
890 | long from_addr; |
891 | long to_addr; | |
a39116f1 RP |
892 | fragS *frag; |
893 | symbolS *to_symbol; | |
fecd2382 | 894 | { |
ac1ac0cd | 895 | as_fatal("sparc_create_long_jump\n"); |
fecd2382 RP |
896 | } |
897 | ||
542e1629 | 898 | /* should never be called for a29k */ |
fecd2382 | 899 | int md_estimate_size_before_relax(fragP, segtype) |
a39116f1 | 900 | register fragS *fragP; |
fecd2382 RP |
901 | segT segtype; |
902 | { | |
a39116f1 | 903 | as_fatal("sparc_estimate_size_before_relax\n"); |
542e1629 | 904 | return(0); |
fecd2382 RP |
905 | } |
906 | ||
907 | #if 0 | |
908 | /* for debugging only */ | |
909 | static void | |
a39116f1 RP |
910 | print_insn(insn) |
911 | struct machine_it *insn; | |
fecd2382 | 912 | { |
a39116f1 RP |
913 | char *Reloc[] = { |
914 | "RELOC_8", | |
915 | "RELOC_16", | |
916 | "RELOC_32", | |
917 | "RELOC_DISP8", | |
918 | "RELOC_DISP16", | |
919 | "RELOC_DISP32", | |
920 | "RELOC_WDISP30", | |
921 | "RELOC_WDISP22", | |
922 | "RELOC_HI22", | |
923 | "RELOC_22", | |
924 | "RELOC_13", | |
925 | "RELOC_LO10", | |
926 | "RELOC_SFA_BASE", | |
927 | "RELOC_SFA_OFF13", | |
928 | "RELOC_BASE10", | |
929 | "RELOC_BASE13", | |
930 | "RELOC_BASE22", | |
931 | "RELOC_PC10", | |
932 | "RELOC_PC22", | |
933 | "RELOC_JMP_TBL", | |
934 | "RELOC_SEGOFF16", | |
935 | "RELOC_GLOB_DAT", | |
936 | "RELOC_JMP_SLOT", | |
937 | "RELOC_RELATIVE", | |
938 | "NO_RELOC" | |
939 | }; | |
940 | ||
941 | if (insn->error) { | |
942 | fprintf(stderr, "ERROR: %s\n"); | |
943 | } | |
944 | fprintf(stderr, "opcode=0x%08x\n", insn->opcode); | |
945 | fprintf(stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
946 | fprintf(stderr, "exp = {\n"); | |
947 | fprintf(stderr, "\t\tX_add_symbol = %s\n", | |
948 | insn->exp.X_add_symbol ? | |
949 | (S_GET_NAME(insn->exp.X_add_symbol) ? | |
950 | S_GET_NAME(insn->exp.X_add_symbol) : "???") : "0"); | |
951 | fprintf(stderr, "\t\tX_sub_symbol = %s\n", | |
952 | insn->exp.X_subtract_symbol ? | |
953 | (S_GET_NAME(insn->exp.X_subtract_symbol) ? | |
954 | S_GET_NAME(insn->exp.X_subtract_symbol) : "???") : "0"); | |
955 | fprintf(stderr, "\t\tX_add_number = %d\n", | |
956 | insn->exp.X_add_number); | |
957 | fprintf(stderr, "}\n"); | |
958 | return; | |
fecd2382 RP |
959 | } |
960 | #endif | |
961 | ||
a79c6033 | 962 | /* Translate internal representation of relocation info to target format. |
a39116f1 | 963 | |
a79c6033 RP |
964 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
965 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
966 | bit 7 as external, bits 6 & 5 unused, and the lower | |
967 | five bits as relocation type. Next 4 bytes are long addend. */ | |
968 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 969 | |
a79c6033 | 970 | #ifdef OBJ_AOUT |
fecd2382 | 971 | |
a79c6033 RP |
972 | void tc_aout_fix_to_chars(where, fixP, segment_address_in_file) |
973 | char *where; | |
974 | fixS *fixP; | |
975 | relax_addressT segment_address_in_file; | |
976 | { | |
542e1629 | 977 | long r_symbolnum; |
a79c6033 RP |
978 | |
979 | know(fixP->fx_r_type < NO_RELOC); | |
980 | know(fixP->fx_addsy != NULL); | |
981 | ||
a79c6033 RP |
982 | md_number_to_chars(where, |
983 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
984 | 4); | |
985 | ||
542e1629 RP |
986 | r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy) |
987 | ? S_GET_TYPE(fixP->fx_addsy) | |
988 | : fixP->fx_addsy->sy_number); | |
989 | ||
990 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
991 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
992 | where[6] = r_symbolnum & 0x0ff; | |
a79c6033 RP |
993 | where[7] = (((!S_IS_DEFINED(fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); |
994 | /* Also easy */ | |
995 | md_number_to_chars(&where[8], fixP->fx_addnumber, 4); | |
a39116f1 | 996 | |
a79c6033 RP |
997 | return; |
998 | } /* tc_aout_fix_to_chars() */ | |
fecd2382 RP |
999 | |
1000 | #endif /* OBJ_AOUT */ | |
1001 | ||
1002 | int | |
a39116f1 RP |
1003 | md_parse_option(argP,cntP,vecP) |
1004 | char **argP; | |
1005 | int *cntP; | |
1006 | char ***vecP; | |
fecd2382 | 1007 | { |
a39116f1 | 1008 | return(0); |
fecd2382 RP |
1009 | } |
1010 | ||
1011 | ||
1012 | /* Default the values of symbols known that should be "predefined". We | |
1013 | don't bother to predefine them unless you actually use one, since there | |
1014 | are a lot of them. */ | |
1015 | ||
1016 | symbolS *md_undefined_symbol (name) | |
a39116f1 | 1017 | char *name; |
fecd2382 | 1018 | { |
a39116f1 RP |
1019 | long regnum; |
1020 | char testbuf[5+ /*SLOP*/ 5]; | |
1021 | ||
1022 | if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L') | |
1023 | { | |
1024 | /* Perhaps a global or local register name */ | |
1025 | if (name[1] == 'r' || name[1] == 'R') | |
1026 | { | |
1027 | /* Parse the number, make sure it has no extra zeroes or trailing | |
1028 | chars */ | |
1029 | regnum = atol(&name[2]); | |
1030 | if (regnum > 127) | |
1031 | return 0; | |
1032 | sprintf(testbuf, "%ld", regnum); | |
1033 | if (strcmp (testbuf, &name[2]) != 0) | |
1034 | return 0; /* gr007 or lr7foo or whatever */ | |
1035 | ||
1036 | /* We have a wiener! Define and return a new symbol for it. */ | |
1037 | if (name[0] == 'l' || name[0] == 'L') | |
1038 | regnum += 128; | |
1039 | return(symbol_new(name, SEG_REGISTER, regnum, &zero_address_frag)); | |
1040 | } | |
1041 | } | |
1042 | ||
1043 | return 0; | |
fecd2382 RP |
1044 | } |
1045 | ||
1046 | /* Parse an operand that is machine-specific. */ | |
1047 | ||
1048 | void md_operand(expressionP) | |
a39116f1 | 1049 | expressionS *expressionP; |
fecd2382 | 1050 | { |
a39116f1 RP |
1051 | |
1052 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1053 | { | |
1054 | /* We have a numeric register expression. No biggy. */ | |
1055 | input_line_pointer += 2; /* Skip %% */ | |
1056 | (void)expression (expressionP); | |
1057 | if (expressionP->X_seg != SEG_ABSOLUTE | |
1058 | || expressionP->X_add_number > 255) | |
1059 | as_bad("Invalid expression after %%%%\n"); | |
1060 | expressionP->X_seg = SEG_REGISTER; | |
1061 | } | |
1062 | else if (input_line_pointer[0] == '&') | |
1063 | { | |
1064 | /* We are taking the 'address' of a register...this one is not | |
1065 | in the manual, but it *is* in traps/fpsymbol.h! What they | |
1066 | seem to want is the register number, as an absolute number. */ | |
1067 | input_line_pointer++; /* Skip & */ | |
1068 | (void)expression (expressionP); | |
1069 | if (expressionP->X_seg != SEG_REGISTER) | |
1070 | as_bad("Invalid register in & expression"); | |
1071 | else | |
1072 | expressionP->X_seg = SEG_ABSOLUTE; | |
1073 | } | |
fecd2382 RP |
1074 | } |
1075 | ||
1076 | /* Round up a section size to the appropriate boundary. */ | |
1077 | long | |
a39116f1 RP |
1078 | md_section_align (segment, size) |
1079 | segT segment; | |
1080 | long size; | |
fecd2382 | 1081 | { |
a39116f1 | 1082 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1083 | } |
1084 | ||
1085 | /* Exactly what point is a PC-relative offset relative TO? | |
1086 | On the 29000, they're relative to the address of the instruction, | |
1087 | which we have set up as the address of the fixup too. */ | |
1088 | long md_pcrel_from (fixP) | |
a39116f1 | 1089 | fixS *fixP; |
fecd2382 | 1090 | { |
a39116f1 | 1091 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1092 | } |
1093 | ||
1094 | /* | |
1095 | * Local Variables: | |
1096 | * comment-column: 0 | |
1097 | * End: | |
1098 | */ | |
1099 | ||
1100 | /* end of tc-a29k.c */ |