Commit | Line | Data |
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fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
01170860 | 2 | Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
d6f72574 | 24 | #include "ctype.h" |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
355afbcd KR |
35 | const relax_typeS md_relax_table[] = |
36 | {0}; | |
fecd2382 RP |
37 | |
38 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
39 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
40 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
41 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
42 | ||
43 | /* handle of the OPCODE hash table */ | |
44 | static struct hash_control *op_hash = NULL; | |
45 | ||
355afbcd KR |
46 | struct machine_it |
47 | { | |
48 | char *error; | |
49 | unsigned long opcode; | |
50 | struct nlist *nlistp; | |
51 | expressionS exp; | |
52 | int pcrel; | |
53 | int reloc_offset; /* Offset of reloc within insn */ | |
54 | ||
55 | int reloc; | |
c593cf41 | 56 | |
c593cf41 | 57 | |
355afbcd | 58 | } |
c593cf41 | 59 | |
355afbcd | 60 | the_insn; |
fecd2382 | 61 | |
a87b3269 | 62 | #if __STDC__ == 1 |
fecd2382 RP |
63 | |
64 | /* static int getExpression(char *str); */ | |
355afbcd | 65 | static void machine_ip (char *str); |
fecd2382 | 66 | /* static void print_insn(struct machine_it *insn); */ |
355afbcd KR |
67 | static void s_data1 (void); |
68 | static void s_use (void); | |
fecd2382 | 69 | |
a87b3269 | 70 | #else /* not __STDC__ */ |
fecd2382 RP |
71 | |
72 | /* static int getExpression(); */ | |
355afbcd | 73 | static void machine_ip (); |
fecd2382 | 74 | /* static void print_insn(); */ |
355afbcd KR |
75 | static void s_data1 (); |
76 | static void s_use (); | |
fecd2382 | 77 | |
a87b3269 | 78 | #endif /* not __STDC__ */ |
fecd2382 RP |
79 | |
80 | const pseudo_typeS | |
355afbcd KR |
81 | md_pseudo_table[] = |
82 | { | |
83 | {"align", s_align_bytes, 4}, | |
84 | {"block", s_space, 0}, | |
85 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
86 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
87 | {"space", s_ignore, 0}, /* Listing control */ | |
88 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 89 | #ifndef OBJ_COFF |
355afbcd KR |
90 | /* We can do this right with coff */ |
91 | {"use", s_use, 0}, | |
c58dbabf | 92 | #endif |
355afbcd KR |
93 | {"word", cons, 4}, |
94 | {NULL, 0, 0}, | |
95 | }; | |
fecd2382 RP |
96 | |
97 | int md_short_jump_size = 4; | |
98 | int md_long_jump_size = 4; | |
57574979 SC |
99 | #if defined(BFD_HEADERS) |
100 | #ifdef RELSZ | |
49864cfa | 101 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 102 | #else |
49864cfa | 103 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
104 | #endif |
105 | #else | |
49864cfa | 106 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 107 | #endif |
fecd2382 RP |
108 | |
109 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 110 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 111 | const char comment_chars[] = ";"; |
fecd2382 RP |
112 | |
113 | /* This array holds the chars that only start a comment at the beginning of | |
114 | a line. If the line seems to have the form '# 123 filename' | |
115 | .line and .file directives will appear in the pre-processed output */ | |
116 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
117 | first line of the input file. This is because the compiler outputs | |
118 | #NO_APP at the beginning of its output. */ | |
119 | /* Also note that comments like this one will always work */ | |
587c4264 | 120 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
121 | |
122 | /* We needed an unused char for line separation to work around the | |
123 | lack of macros, using sed and such. */ | |
587c4264 | 124 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
125 | |
126 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 127 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
128 | |
129 | /* Chars that mean this number is a floating point constant */ | |
130 | /* As in 0f12.456 */ | |
131 | /* or 0d1.2345e12 */ | |
587c4264 | 132 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
133 | |
134 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
135 | changed in read.c . Ideally it shouldn't have to know about it at all, | |
136 | but nothing is ideal around here. | |
a39116f1 | 137 | */ |
fecd2382 RP |
138 | |
139 | static unsigned char octal[256]; | |
140 | #define isoctal(c) octal[c] | |
355afbcd | 141 | static unsigned char toHex[256]; |
fecd2382 RP |
142 | |
143 | /* | |
355afbcd | 144 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
145 | */ |
146 | #define ANNUL (1 << 29) | |
147 | ||
148 | static void | |
355afbcd | 149 | s_use () |
fecd2382 | 150 | { |
355afbcd KR |
151 | |
152 | if (strncmp (input_line_pointer, ".text", 5) == 0) | |
153 | { | |
154 | input_line_pointer += 5; | |
155 | s_text (); | |
156 | return; | |
157 | } | |
158 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
159 | { | |
160 | input_line_pointer += 5; | |
161 | s_data (); | |
162 | return; | |
163 | } | |
164 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
165 | { | |
166 | input_line_pointer += 6; | |
167 | s_data1 (); | |
168 | return; | |
169 | } | |
170 | /* Literals can't go in the text segment because you can't read | |
a39116f1 | 171 | from instruction memory on some 29k's. So, into initialized data. */ |
355afbcd KR |
172 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
173 | { | |
174 | input_line_pointer += 4; | |
175 | subseg_new (SEG_DATA, 200); | |
176 | demand_empty_rest_of_line (); | |
177 | return; | |
178 | } | |
179 | ||
180 | as_bad ("Unknown segment type"); | |
181 | demand_empty_rest_of_line (); | |
182 | return; | |
fecd2382 RP |
183 | } |
184 | ||
185 | static void | |
355afbcd | 186 | s_data1 () |
fecd2382 | 187 | { |
355afbcd KR |
188 | subseg_new (SEG_DATA, 1); |
189 | demand_empty_rest_of_line (); | |
190 | return; | |
fecd2382 RP |
191 | } |
192 | ||
193 | /* Install symbol definition that maps REGNAME to REGNO. | |
194 | FIXME-SOON: These are not recognized in mixed case. */ | |
195 | ||
196 | static void | |
355afbcd KR |
197 | insert_sreg (regname, regnum) |
198 | char *regname; | |
199 | int regnum; | |
fecd2382 | 200 | { |
355afbcd | 201 | /* FIXME-SOON, put something in these syms so they won't be output to the symbol |
fecd2382 | 202 | table of the resulting object file. */ |
355afbcd KR |
203 | |
204 | /* Must be large enough to hold the names of the special registers. */ | |
205 | char buf[80]; | |
206 | int i; | |
207 | ||
208 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, regnum, &zero_address_frag)); | |
209 | for (i = 0; regname[i]; i++) | |
210 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
211 | buf[i] = '\0'; | |
212 | ||
213 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, regnum, &zero_address_frag)); | |
214 | } /* insert_sreg() */ | |
fecd2382 RP |
215 | |
216 | /* Install symbol definitions for assorted special registers. | |
217 | See ASM29K Ref page 2-9. */ | |
218 | ||
355afbcd KR |
219 | void |
220 | define_some_regs () | |
221 | { | |
fecd2382 | 222 | #define SREG 256 |
355afbcd KR |
223 | |
224 | /* Protected special-purpose register names */ | |
225 | insert_sreg ("vab", SREG + 0); | |
226 | insert_sreg ("ops", SREG + 1); | |
227 | insert_sreg ("cps", SREG + 2); | |
228 | insert_sreg ("cfg", SREG + 3); | |
229 | insert_sreg ("cha", SREG + 4); | |
230 | insert_sreg ("chd", SREG + 5); | |
231 | insert_sreg ("chc", SREG + 6); | |
232 | insert_sreg ("rbp", SREG + 7); | |
233 | insert_sreg ("tmc", SREG + 8); | |
234 | insert_sreg ("tmr", SREG + 9); | |
235 | insert_sreg ("pc0", SREG + 10); | |
236 | insert_sreg ("pc1", SREG + 11); | |
237 | insert_sreg ("pc2", SREG + 12); | |
238 | insert_sreg ("mmu", SREG + 13); | |
239 | insert_sreg ("lru", SREG + 14); | |
240 | ||
d6f72574 KR |
241 | /* Additional protected special-purpose registers for the 29050 */ |
242 | insert_sreg ("rsn", SREG + 15); | |
243 | insert_sreg ("rma0", SREG + 16); | |
244 | insert_sreg ("rmc0", SREG + 17); | |
245 | insert_sreg ("rma1", SREG + 18); | |
246 | insert_sreg ("rmc1", SREG + 19); | |
247 | insert_sreg ("spc0", SREG + 20); | |
248 | insert_sreg ("spc1", SREG + 21); | |
249 | insert_sreg ("spc2", SREG + 22); | |
250 | insert_sreg ("iba0", SREG + 23); | |
251 | insert_sreg ("ibc0", SREG + 24); | |
252 | insert_sreg ("iba1", SREG + 25); | |
253 | insert_sreg ("ibc1", SREG + 26); | |
254 | ||
355afbcd KR |
255 | /* Unprotected special-purpose register names */ |
256 | insert_sreg ("ipc", SREG + 128); | |
257 | insert_sreg ("ipa", SREG + 129); | |
258 | insert_sreg ("ipb", SREG + 130); | |
259 | insert_sreg ("q", SREG + 131); | |
260 | insert_sreg ("alu", SREG + 132); | |
261 | insert_sreg ("bp", SREG + 133); | |
262 | insert_sreg ("fc", SREG + 134); | |
263 | insert_sreg ("cr", SREG + 135); | |
264 | insert_sreg ("fpe", SREG + 160); | |
265 | insert_sreg ("inte", SREG + 161); | |
266 | insert_sreg ("fps", SREG + 162); | |
267 | /* "", SREG+163); Reserved */ | |
268 | insert_sreg ("exop", SREG + 164); | |
269 | } /* define_some_regs() */ | |
fecd2382 RP |
270 | |
271 | /* This function is called once, at assembler startup time. It should | |
272 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
273 | void | |
355afbcd | 274 | md_begin () |
fecd2382 | 275 | { |
355afbcd KR |
276 | register char *retval = NULL; |
277 | int lose = 0; | |
278 | register int skipnext = 0; | |
279 | register unsigned int i; | |
280 | register char *strend, *strend2; | |
281 | ||
282 | /* Hash up all the opcodes for fast use later. */ | |
283 | ||
284 | op_hash = hash_new (); | |
355afbcd KR |
285 | |
286 | for (i = 0; i < num_opcodes; i++) | |
287 | { | |
288 | const char *name = machine_opcodes[i].name; | |
289 | ||
290 | if (skipnext) | |
291 | { | |
292 | skipnext = 0; | |
293 | continue; | |
294 | } | |
295 | ||
296 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
a39116f1 | 297 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
298 | |
299 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
300 | { | |
301 | if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode) | |
302 | != 0x01000000) | |
303 | goto bad_table; | |
304 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
305 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
306 | switch (*strend) | |
307 | { | |
308 | case 'b': | |
309 | if (*strend2 != 'i') | |
310 | goto bad_table; | |
311 | break; | |
312 | case 'i': | |
313 | if (*strend2 != 'b') | |
314 | goto bad_table; | |
315 | break; | |
316 | case 'P': | |
317 | if (*strend2 != 'A') | |
318 | goto bad_table; | |
319 | break; | |
320 | case 'A': | |
321 | if (*strend2 != 'P') | |
322 | goto bad_table; | |
323 | break; | |
324 | default: | |
325 | bad_table: | |
326 | fprintf (stderr, "internal error: can't handle opcode %s\n", name); | |
327 | lose = 1; | |
a39116f1 | 328 | } |
355afbcd KR |
329 | |
330 | /* OK, this is an i/b or A/P pair. We skip the higher-valued one, | |
331 | and let the code for operand checking handle OR-ing in the bit. */ | |
332 | if (machine_opcodes[i].opcode & 1) | |
333 | continue; | |
334 | else | |
335 | skipnext = 1; | |
336 | } | |
337 | ||
338 | retval = hash_insert (op_hash, name, &machine_opcodes[i]); | |
339 | if (retval != NULL && *retval != '\0') | |
340 | { | |
341 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
342 | machine_opcodes[i].name, retval); | |
343 | lose = 1; | |
344 | } | |
345 | } | |
346 | ||
347 | if (lose) | |
348 | as_fatal ("Broken assembler. No assembly attempted."); | |
349 | ||
350 | for (i = '0'; i < '8'; ++i) | |
351 | octal[i] = 1; | |
352 | for (i = '0'; i <= '9'; ++i) | |
353 | toHex[i] = i - '0'; | |
354 | for (i = 'a'; i <= 'f'; ++i) | |
355 | toHex[i] = i + 10 - 'a'; | |
356 | for (i = 'A'; i <= 'F'; ++i) | |
357 | toHex[i] = i + 10 - 'A'; | |
358 | ||
359 | define_some_regs (); | |
fecd2382 RP |
360 | } |
361 | ||
355afbcd KR |
362 | void |
363 | md_end () | |
364 | { | |
365 | return; | |
fecd2382 RP |
366 | } |
367 | ||
368 | /* Assemble a single instruction. Its label has already been handled | |
369 | by the generic front end. We just parse opcode and operands, and | |
370 | produce the bytes of data and relocation. */ | |
371 | ||
355afbcd KR |
372 | void |
373 | md_assemble (str) | |
374 | char *str; | |
fecd2382 | 375 | { |
355afbcd KR |
376 | char *toP; |
377 | /* !!!! int rsd; */ | |
378 | ||
379 | know (str); | |
380 | machine_ip (str); | |
381 | toP = frag_more (4); | |
382 | /* put out the opcode */ | |
383 | md_number_to_chars (toP, the_insn.opcode, 4); | |
384 | ||
385 | /* put out the symbol-dependent stuff */ | |
386 | if (the_insn.reloc != NO_RELOC) | |
387 | { | |
388 | fix_new ( | |
389 | frag_now, /* which frag */ | |
390 | (toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */ | |
391 | 4, /* size */ | |
392 | the_insn.exp.X_add_symbol, | |
393 | the_insn.exp.X_subtract_symbol, | |
394 | the_insn.exp.X_add_number, | |
395 | the_insn.pcrel, | |
396 | the_insn.reloc | |
397 | ); | |
398 | } | |
fecd2382 RP |
399 | } |
400 | ||
401 | char * | |
355afbcd KR |
402 | parse_operand (s, operandp) |
403 | char *s; | |
404 | expressionS *operandp; | |
fecd2382 | 405 | { |
c58dbabf SC |
406 | char *save = input_line_pointer; |
407 | char *new; | |
408 | segT seg; | |
355afbcd | 409 | |
c58dbabf SC |
410 | input_line_pointer = s; |
411 | seg = expr (0, operandp); | |
412 | new = input_line_pointer; | |
413 | input_line_pointer = save; | |
414 | ||
355afbcd KR |
415 | if (seg == SEG_ABSENT) |
416 | as_bad ("Missing operand"); | |
c58dbabf | 417 | return new; |
fecd2382 RP |
418 | } |
419 | ||
355afbcd | 420 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
421 | Operands are at input_line_pointer. Output is in the_insn. |
422 | Warnings or errors are generated. */ | |
a39116f1 | 423 | |
fecd2382 | 424 | static void |
355afbcd KR |
425 | machine_ip (str) |
426 | char *str; | |
fecd2382 | 427 | { |
355afbcd KR |
428 | char *s; |
429 | const char *args; | |
430 | /* !!!! char c; */ | |
431 | /* !!!! unsigned long i; */ | |
432 | struct machine_opcode *insn; | |
433 | char *argsStart; | |
434 | unsigned long opcode; | |
435 | /* !!!! unsigned int mask; */ | |
436 | expressionS the_operand; | |
437 | expressionS *operand = &the_operand; | |
438 | unsigned int reg; | |
439 | ||
440 | /* Must handle `div0' opcode. */ | |
441 | s = str; | |
442 | if (isalpha (*s)) | |
443 | for (; isalnum (*s); ++s) | |
444 | if (isupper (*s)) | |
445 | *s = tolower (*s); | |
446 | ||
447 | switch (*s) | |
448 | { | |
449 | case '\0': | |
450 | break; | |
451 | ||
452 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
453 | *s++ = '\0'; | |
454 | break; | |
455 | ||
456 | default: | |
457 | as_bad ("Unknown opcode: `%s'", str); | |
458 | return; | |
459 | } | |
460 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
461 | { | |
462 | as_bad ("Unknown opcode `%s'.", str); | |
463 | return; | |
464 | } | |
465 | argsStart = s; | |
466 | opcode = insn->opcode; | |
467 | memset (&the_insn, '\0', sizeof (the_insn)); | |
468 | the_insn.reloc = NO_RELOC; | |
469 | ||
470 | /* | |
a39116f1 RP |
471 | * Build the opcode, checking as we go to make |
472 | * sure that the operands match. | |
473 | * | |
474 | * If an operand matches, we modify the_insn or opcode appropriately, | |
475 | * and do a "continue". If an operand fails to match, we "break". | |
476 | */ | |
355afbcd KR |
477 | if (insn->args[0] != '\0') |
478 | s = parse_operand (s, operand); /* Prime the pump */ | |
479 | ||
480 | for (args = insn->args;; ++args) | |
481 | { | |
482 | switch (*args) | |
483 | { | |
484 | ||
485 | case '\0': /* end of args */ | |
486 | if (*s == '\0') | |
487 | { | |
488 | /* We are truly done. */ | |
489 | the_insn.opcode = opcode; | |
490 | return; | |
491 | } | |
492 | as_bad ("Too many operands: %s", s); | |
493 | break; | |
494 | ||
495 | case ',': /* Must match a comma */ | |
496 | if (*s++ == ',') | |
497 | { | |
498 | s = parse_operand (s, operand); /* Parse next opnd */ | |
499 | continue; | |
500 | } | |
501 | break; | |
502 | ||
503 | case 'v': /* Trap numbers (immediate field) */ | |
504 | if (operand->X_seg == SEG_ABSOLUTE) | |
505 | { | |
506 | if (operand->X_add_number < 256) | |
507 | { | |
508 | opcode |= (operand->X_add_number << 16); | |
509 | continue; | |
510 | } | |
511 | else | |
512 | { | |
513 | as_bad ("Immediate value of %d is too large", | |
514 | operand->X_add_number); | |
515 | continue; | |
516 | } | |
517 | } | |
518 | the_insn.reloc = RELOC_8; | |
519 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
520 | the_insn.exp = *operand; | |
521 | continue; | |
522 | ||
523 | case 'b': /* A general register or 8-bit immediate */ | |
524 | case 'i': | |
525 | /* We treat the two cases identically since we mashed | |
a39116f1 | 526 | them together in the opcode table. */ |
355afbcd KR |
527 | if (operand->X_seg == SEG_REGISTER) |
528 | goto general_reg; | |
529 | ||
530 | opcode |= IMMEDIATE_BIT; | |
531 | if (operand->X_seg == SEG_ABSOLUTE) | |
532 | { | |
533 | if (operand->X_add_number < 256) | |
534 | { | |
535 | opcode |= operand->X_add_number; | |
536 | continue; | |
537 | } | |
538 | else | |
539 | { | |
540 | as_bad ("Immediate value of %d is too large", | |
541 | operand->X_add_number); | |
542 | continue; | |
543 | } | |
544 | } | |
545 | the_insn.reloc = RELOC_8; | |
546 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
547 | the_insn.exp = *operand; | |
548 | continue; | |
549 | ||
550 | case 'a': /* next operand must be a register */ | |
551 | case 'c': | |
552 | general_reg: | |
553 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
554 | if (operand->X_seg != SEG_REGISTER) | |
555 | break; /* Only registers */ | |
556 | know (operand->X_add_symbol == 0); | |
557 | know (operand->X_subtract_symbol == 0); | |
558 | reg = operand->X_add_number; | |
559 | if (reg >= SREG) | |
560 | break; /* No special registers */ | |
561 | ||
562 | /* | |
a39116f1 RP |
563 | * Got the register, now figure out where |
564 | * it goes in the opcode. | |
565 | */ | |
355afbcd KR |
566 | switch (*args) |
567 | { | |
568 | case 'a': | |
569 | opcode |= reg << 8; | |
570 | continue; | |
571 | ||
572 | case 'b': | |
573 | case 'i': | |
574 | opcode |= reg; | |
575 | continue; | |
576 | ||
577 | case 'c': | |
578 | opcode |= reg << 16; | |
579 | continue; | |
580 | } | |
581 | as_fatal ("failed sanity check."); | |
582 | break; | |
583 | ||
584 | case 'x': /* 16 bit constant, zero-extended */ | |
585 | case 'X': /* 16 bit constant, one-extended */ | |
586 | if (operand->X_seg == SEG_ABSOLUTE) | |
587 | { | |
588 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
589 | ((operand->X_add_number & 0xFF00) << 8); | |
590 | continue; | |
591 | } | |
592 | the_insn.reloc = RELOC_CONST; | |
593 | the_insn.exp = *operand; | |
594 | continue; | |
595 | ||
596 | case 'h': | |
597 | if (operand->X_seg == SEG_ABSOLUTE) | |
598 | { | |
599 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
600 | (((unsigned long) operand->X_add_number | |
601 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
602 | continue; | |
603 | } | |
604 | the_insn.reloc = RELOC_CONSTH; | |
605 | the_insn.exp = *operand; | |
606 | continue; | |
607 | ||
608 | case 'P': /* PC-relative jump address */ | |
609 | case 'A': /* Absolute jump address */ | |
610 | /* These two are treated together since we folded the | |
a39116f1 | 611 | opcode table entries together. */ |
355afbcd KR |
612 | if (operand->X_seg == SEG_ABSOLUTE) |
613 | { | |
614 | opcode |= ABSOLUTE_BIT | | |
615 | (operand->X_add_number & 0x0003FC00) << 6 | | |
616 | ((operand->X_add_number & 0x000003FC) >> 2); | |
617 | continue; | |
618 | } | |
619 | the_insn.reloc = RELOC_JUMPTARG; | |
620 | the_insn.exp = *operand; | |
621 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
622 | /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */ | |
623 | continue; | |
624 | ||
625 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
626 | if (operand->X_seg == SEG_ABSOLUTE) | |
627 | { | |
628 | if (operand->X_add_number == 0) | |
629 | continue; | |
630 | if (operand->X_add_number == 1) | |
631 | { | |
632 | opcode |= CE_BIT; | |
633 | continue; | |
fecd2382 | 634 | } |
355afbcd KR |
635 | } |
636 | break; | |
637 | ||
638 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
639 | if (operand->X_seg == SEG_ABSOLUTE && | |
640 | operand->X_add_number < 128) | |
641 | { | |
642 | opcode |= (operand->X_add_number << 16); | |
643 | continue; | |
644 | } | |
645 | break; | |
646 | ||
647 | case 's': /* Special register number */ | |
648 | if (operand->X_seg != SEG_REGISTER) | |
649 | break; /* Only registers */ | |
650 | if (operand->X_add_number < SREG) | |
651 | break; /* Not a special register */ | |
652 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
653 | continue; | |
654 | ||
655 | case 'u': /* UI bit of CONVERT */ | |
656 | if (operand->X_seg == SEG_ABSOLUTE) | |
657 | { | |
658 | if (operand->X_add_number == 0) | |
659 | continue; | |
660 | if (operand->X_add_number == 1) | |
661 | { | |
662 | opcode |= UI_BIT; | |
663 | continue; | |
664 | } | |
665 | } | |
666 | break; | |
667 | ||
668 | case 'r': /* RND bits of CONVERT */ | |
669 | if (operand->X_seg == SEG_ABSOLUTE && | |
670 | operand->X_add_number < 8) | |
671 | { | |
672 | opcode |= operand->X_add_number << 4; | |
673 | continue; | |
674 | } | |
675 | break; | |
676 | ||
677 | case 'd': /* FD bits of CONVERT */ | |
678 | if (operand->X_seg == SEG_ABSOLUTE && | |
679 | operand->X_add_number < 4) | |
680 | { | |
681 | opcode |= operand->X_add_number << 2; | |
682 | continue; | |
683 | } | |
684 | break; | |
685 | ||
686 | ||
687 | case 'f': /* FS bits of CONVERT */ | |
688 | if (operand->X_seg == SEG_ABSOLUTE && | |
689 | operand->X_add_number < 4) | |
690 | { | |
691 | opcode |= operand->X_add_number << 0; | |
692 | continue; | |
693 | } | |
694 | break; | |
695 | ||
696 | case 'C': | |
697 | if (operand->X_seg == SEG_ABSOLUTE && | |
698 | operand->X_add_number < 4) | |
699 | { | |
700 | opcode |= operand->X_add_number << 16; | |
701 | continue; | |
702 | } | |
703 | break; | |
704 | ||
705 | case 'F': | |
706 | if (operand->X_seg == SEG_ABSOLUTE && | |
707 | operand->X_add_number < 16) | |
708 | { | |
709 | opcode |= operand->X_add_number << 18; | |
710 | continue; | |
711 | } | |
712 | break; | |
713 | ||
714 | default: | |
715 | BAD_CASE (*args); | |
fecd2382 | 716 | } |
355afbcd KR |
717 | /* Types or values of args don't match. */ |
718 | as_bad ("Invalid operands"); | |
719 | return; | |
720 | } | |
fecd2382 RP |
721 | } |
722 | ||
723 | /* | |
a39116f1 RP |
724 | This is identical to the md_atof in m68k.c. I think this is right, |
725 | but I'm not sure. | |
355afbcd | 726 | |
a39116f1 RP |
727 | Turn a string in input_line_pointer into a floating point constant of type |
728 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
729 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
730 | */ | |
fecd2382 RP |
731 | |
732 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
733 | #define MAX_LITTLENUMS 6 | |
734 | ||
735 | char * | |
355afbcd KR |
736 | md_atof (type, litP, sizeP) |
737 | char type; | |
738 | char *litP; | |
739 | int *sizeP; | |
fecd2382 | 740 | { |
355afbcd KR |
741 | int prec; |
742 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
743 | LITTLENUM_TYPE *wordP; | |
744 | char *t; | |
745 | ||
746 | switch (type) | |
747 | { | |
748 | ||
749 | case 'f': | |
750 | case 'F': | |
751 | case 's': | |
752 | case 'S': | |
753 | prec = 2; | |
754 | break; | |
755 | ||
756 | case 'd': | |
757 | case 'D': | |
758 | case 'r': | |
759 | case 'R': | |
760 | prec = 4; | |
761 | break; | |
762 | ||
763 | case 'x': | |
764 | case 'X': | |
765 | prec = 6; | |
766 | break; | |
767 | ||
768 | case 'p': | |
769 | case 'P': | |
770 | prec = 6; | |
771 | break; | |
772 | ||
773 | default: | |
774 | *sizeP = 0; | |
775 | return "Bad call to MD_ATOF()"; | |
776 | } | |
777 | t = atof_ieee (input_line_pointer, type, words); | |
778 | if (t) | |
779 | input_line_pointer = t; | |
780 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
781 | for (wordP = words; prec--;) | |
782 | { | |
783 | md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
784 | litP += sizeof (LITTLENUM_TYPE); | |
785 | } | |
786 | return ""; /* Someone should teach Dean about null pointers */ | |
fecd2382 RP |
787 | } |
788 | ||
789 | /* | |
790 | * Write out big-endian. | |
791 | */ | |
792 | void | |
355afbcd KR |
793 | md_number_to_chars (buf, val, n) |
794 | char *buf; | |
c463189d | 795 | valueT val; |
355afbcd | 796 | int n; |
fecd2382 | 797 | { |
355afbcd KR |
798 | |
799 | switch (n) | |
800 | { | |
801 | ||
802 | case 4: | |
803 | *buf++ = val >> 24; | |
804 | *buf++ = val >> 16; | |
805 | case 2: | |
806 | *buf++ = val >> 8; | |
807 | case 1: | |
808 | *buf = val; | |
809 | break; | |
810 | ||
811 | default: | |
812 | as_fatal ("failed sanity check."); | |
813 | } | |
814 | return; | |
fecd2382 RP |
815 | } |
816 | ||
355afbcd KR |
817 | void |
818 | md_apply_fix (fixP, val) | |
819 | fixS *fixP; | |
820 | long val; | |
fecd2382 | 821 | { |
355afbcd KR |
822 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
823 | ||
824 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
825 | ||
826 | ||
827 | know (fixP->fx_size == 4); | |
828 | know (fixP->fx_r_type < NO_RELOC); | |
829 | ||
830 | /* | |
a39116f1 RP |
831 | * This is a hack. There should be a better way to |
832 | * handle this. | |
833 | */ | |
355afbcd KR |
834 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
835 | { | |
836 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
837 | } | |
838 | ||
839 | switch (fixP->fx_r_type) | |
840 | { | |
841 | ||
842 | case RELOC_32: | |
843 | buf[0] = val >> 24; | |
844 | buf[1] = val >> 16; | |
845 | buf[2] = val >> 8; | |
846 | buf[3] = val; | |
847 | break; | |
848 | ||
849 | case RELOC_8: | |
850 | buf[0] = val; | |
851 | break; | |
852 | ||
853 | case RELOC_WDISP30: | |
854 | val = (val >>= 2) + 1; | |
855 | buf[0] |= (val >> 24) & 0x3f; | |
856 | buf[1] = (val >> 16); | |
857 | buf[2] = val >> 8; | |
858 | buf[3] = val; | |
859 | break; | |
860 | ||
861 | case RELOC_HI22: | |
862 | buf[1] |= (val >> 26) & 0x3f; | |
863 | buf[2] = val >> 18; | |
864 | buf[3] = val >> 10; | |
865 | break; | |
866 | ||
867 | case RELOC_LO10: | |
868 | buf[2] |= (val >> 8) & 0x03; | |
869 | buf[3] = val; | |
870 | break; | |
871 | ||
872 | case RELOC_BASE13: | |
873 | buf[2] |= (val >> 8) & 0x1f; | |
874 | buf[3] = val; | |
875 | break; | |
876 | ||
877 | case RELOC_WDISP22: | |
878 | val = (val >>= 2) + 1; | |
879 | /* FALLTHROUGH */ | |
880 | case RELOC_BASE22: | |
881 | buf[1] |= (val >> 16) & 0x3f; | |
882 | buf[2] = val >> 8; | |
883 | buf[3] = val; | |
884 | break; | |
885 | ||
fecd2382 | 886 | #if 0 |
355afbcd KR |
887 | case RELOC_PC10: |
888 | case RELOC_PC22: | |
889 | case RELOC_JMP_TBL: | |
890 | case RELOC_SEGOFF16: | |
891 | case RELOC_GLOB_DAT: | |
892 | case RELOC_JMP_SLOT: | |
893 | case RELOC_RELATIVE: | |
fecd2382 | 894 | #endif |
355afbcd KR |
895 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
896 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
897 | buf[3] = val >> 2; | |
898 | break; | |
899 | ||
900 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
901 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
902 | buf[3] = val; | |
903 | break; | |
904 | ||
905 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
906 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
907 | buf[3] = val >> 16; | |
908 | break; | |
909 | ||
910 | case NO_RELOC: | |
911 | default: | |
912 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
913 | break; | |
914 | } | |
915 | return; | |
fecd2382 RP |
916 | } |
917 | ||
918 | #ifdef OBJ_COFF | |
355afbcd KR |
919 | short |
920 | tc_coff_fix2rtype (fixP) | |
921 | fixS *fixP; | |
fecd2382 | 922 | { |
355afbcd KR |
923 | |
924 | switch (fixP->fx_r_type) | |
925 | { | |
926 | case RELOC_32: | |
927 | return (R_WORD); | |
928 | case RELOC_8: | |
929 | return (R_BYTE); | |
930 | case RELOC_CONST: | |
931 | return (R_ILOHALF); | |
932 | case RELOC_CONSTH: | |
933 | return (R_IHIHALF); | |
934 | case RELOC_JUMPTARG: | |
935 | return (R_IREL); | |
936 | default: | |
937 | printf ("need %o3\n", fixP->fx_r_type); | |
938 | abort (); | |
939 | } /* switch on type */ | |
940 | ||
941 | return (0); | |
942 | } /* tc_coff_fix2rtype() */ | |
943 | ||
fecd2382 RP |
944 | #endif /* OBJ_COFF */ |
945 | ||
946 | /* should never be called for sparc */ | |
355afbcd KR |
947 | void |
948 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
949 | char *ptr; | |
c463189d | 950 | addressT from_addr, to_addr; |
355afbcd KR |
951 | fragS *frag; |
952 | symbolS *to_symbol; | |
fecd2382 | 953 | { |
355afbcd | 954 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
955 | } |
956 | ||
fecd2382 | 957 | /* should never be called for 29k */ |
355afbcd KR |
958 | void |
959 | md_convert_frag (headers, fragP) | |
960 | object_headers *headers; | |
961 | register fragS *fragP; | |
fecd2382 | 962 | { |
355afbcd | 963 | as_fatal ("sparc_convert_frag\n"); |
fecd2382 RP |
964 | } |
965 | ||
966 | /* should never be called for 29k */ | |
355afbcd KR |
967 | void |
968 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
969 | char *ptr; | |
c463189d ME |
970 | addressT from_addr; |
971 | addressT to_addr; | |
355afbcd KR |
972 | fragS *frag; |
973 | symbolS *to_symbol; | |
fecd2382 | 974 | { |
355afbcd | 975 | as_fatal ("sparc_create_long_jump\n"); |
fecd2382 RP |
976 | } |
977 | ||
542e1629 | 978 | /* should never be called for a29k */ |
355afbcd KR |
979 | int |
980 | md_estimate_size_before_relax (fragP, segtype) | |
981 | register fragS *fragP; | |
982 | segT segtype; | |
fecd2382 | 983 | { |
355afbcd KR |
984 | as_fatal ("sparc_estimate_size_before_relax\n"); |
985 | return (0); | |
fecd2382 RP |
986 | } |
987 | ||
988 | #if 0 | |
989 | /* for debugging only */ | |
990 | static void | |
355afbcd KR |
991 | print_insn (insn) |
992 | struct machine_it *insn; | |
fecd2382 | 993 | { |
355afbcd KR |
994 | char *Reloc[] = |
995 | { | |
996 | "RELOC_8", | |
997 | "RELOC_16", | |
998 | "RELOC_32", | |
999 | "RELOC_DISP8", | |
1000 | "RELOC_DISP16", | |
1001 | "RELOC_DISP32", | |
1002 | "RELOC_WDISP30", | |
1003 | "RELOC_WDISP22", | |
1004 | "RELOC_HI22", | |
1005 | "RELOC_22", | |
1006 | "RELOC_13", | |
1007 | "RELOC_LO10", | |
1008 | "RELOC_SFA_BASE", | |
1009 | "RELOC_SFA_OFF13", | |
1010 | "RELOC_BASE10", | |
1011 | "RELOC_BASE13", | |
1012 | "RELOC_BASE22", | |
1013 | "RELOC_PC10", | |
1014 | "RELOC_PC22", | |
1015 | "RELOC_JMP_TBL", | |
1016 | "RELOC_SEGOFF16", | |
1017 | "RELOC_GLOB_DAT", | |
1018 | "RELOC_JMP_SLOT", | |
1019 | "RELOC_RELATIVE", | |
1020 | "NO_RELOC" | |
1021 | }; | |
1022 | ||
1023 | if (insn->error) | |
1024 | { | |
1025 | fprintf (stderr, "ERROR: %s\n"); | |
1026 | } | |
1027 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
1028 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
1029 | fprintf (stderr, "exp = {\n"); | |
1030 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
1031 | insn->exp.X_add_symbol ? | |
1032 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
1033 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
1034 | fprintf (stderr, "\t\tX_sub_symbol = %s\n", | |
1035 | insn->exp.X_subtract_symbol ? | |
1036 | (S_GET_NAME (insn->exp.X_subtract_symbol) ? | |
1037 | S_GET_NAME (insn->exp.X_subtract_symbol) : "???") : "0"); | |
1038 | fprintf (stderr, "\t\tX_add_number = %d\n", | |
1039 | insn->exp.X_add_number); | |
1040 | fprintf (stderr, "}\n"); | |
1041 | return; | |
fecd2382 | 1042 | } |
355afbcd | 1043 | |
fecd2382 RP |
1044 | #endif |
1045 | ||
a79c6033 | 1046 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1047 | |
a79c6033 RP |
1048 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1049 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1050 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1051 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1052 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1053 | |
a79c6033 | 1054 | #ifdef OBJ_AOUT |
fecd2382 | 1055 | |
355afbcd KR |
1056 | void |
1057 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1058 | char *where; | |
1059 | fixS *fixP; | |
1060 | relax_addressT segment_address_in_file; | |
a79c6033 | 1061 | { |
355afbcd KR |
1062 | long r_symbolnum; |
1063 | ||
1064 | know (fixP->fx_r_type < NO_RELOC); | |
1065 | know (fixP->fx_addsy != NULL); | |
1066 | ||
1067 | md_number_to_chars (where, | |
1068 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1069 | 4); | |
1070 | ||
1071 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1072 | ? S_GET_TYPE (fixP->fx_addsy) | |
1073 | : fixP->fx_addsy->sy_number); | |
1074 | ||
1075 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1076 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1077 | where[6] = r_symbolnum & 0x0ff; | |
1078 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1079 | /* Also easy */ | |
1080 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
1081 | ||
1082 | return; | |
1083 | } /* tc_aout_fix_to_chars() */ | |
fecd2382 RP |
1084 | |
1085 | #endif /* OBJ_AOUT */ | |
1086 | ||
1087 | int | |
355afbcd KR |
1088 | md_parse_option (argP, cntP, vecP) |
1089 | char **argP; | |
1090 | int *cntP; | |
1091 | char ***vecP; | |
fecd2382 | 1092 | { |
355afbcd | 1093 | return (0); |
fecd2382 RP |
1094 | } |
1095 | ||
1096 | ||
1097 | /* Default the values of symbols known that should be "predefined". We | |
1098 | don't bother to predefine them unless you actually use one, since there | |
1099 | are a lot of them. */ | |
1100 | ||
355afbcd KR |
1101 | symbolS * |
1102 | md_undefined_symbol (name) | |
1103 | char *name; | |
fecd2382 | 1104 | { |
355afbcd KR |
1105 | long regnum; |
1106 | char testbuf[5 + /*SLOP*/ 5]; | |
1107 | ||
1108 | if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L') | |
1109 | { | |
1110 | /* Perhaps a global or local register name */ | |
1111 | if (name[1] == 'r' || name[1] == 'R') | |
1112 | { | |
1113 | /* Parse the number, make sure it has no extra zeroes or trailing | |
a39116f1 | 1114 | chars */ |
355afbcd KR |
1115 | regnum = atol (&name[2]); |
1116 | if (regnum > 127) | |
1117 | return 0; | |
1118 | sprintf (testbuf, "%ld", regnum); | |
1119 | if (strcmp (testbuf, &name[2]) != 0) | |
1120 | return 0; /* gr007 or lr7foo or whatever */ | |
1121 | ||
1122 | /* We have a wiener! Define and return a new symbol for it. */ | |
1123 | if (name[0] == 'l' || name[0] == 'L') | |
1124 | regnum += 128; | |
1125 | return (symbol_new (name, SEG_REGISTER, regnum, &zero_address_frag)); | |
1126 | } | |
1127 | } | |
1128 | ||
1129 | return 0; | |
fecd2382 RP |
1130 | } |
1131 | ||
1132 | /* Parse an operand that is machine-specific. */ | |
1133 | ||
355afbcd KR |
1134 | void |
1135 | md_operand (expressionP) | |
1136 | expressionS *expressionP; | |
fecd2382 | 1137 | { |
355afbcd KR |
1138 | |
1139 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1140 | { | |
1141 | /* We have a numeric register expression. No biggy. */ | |
1142 | input_line_pointer += 2; /* Skip %% */ | |
1143 | (void) expression (expressionP); | |
1144 | if (expressionP->X_seg != SEG_ABSOLUTE | |
1145 | || expressionP->X_add_number > 255) | |
1146 | as_bad ("Invalid expression after %%%%\n"); | |
1147 | expressionP->X_seg = SEG_REGISTER; | |
1148 | } | |
1149 | else if (input_line_pointer[0] == '&') | |
1150 | { | |
1151 | /* We are taking the 'address' of a register...this one is not | |
a39116f1 RP |
1152 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1153 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1154 | input_line_pointer++; /* Skip & */ |
1155 | (void) expression (expressionP); | |
1156 | if (expressionP->X_seg != SEG_REGISTER) | |
1157 | as_bad ("Invalid register in & expression"); | |
1158 | else | |
1159 | expressionP->X_seg = SEG_ABSOLUTE; | |
1160 | } | |
fecd2382 RP |
1161 | } |
1162 | ||
1163 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1164 | valueT |
355afbcd KR |
1165 | md_section_align (segment, size) |
1166 | segT segment; | |
c463189d | 1167 | valueT size; |
fecd2382 | 1168 | { |
355afbcd | 1169 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1170 | } |
1171 | ||
1172 | /* Exactly what point is a PC-relative offset relative TO? | |
1173 | On the 29000, they're relative to the address of the instruction, | |
1174 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1175 | long |
1176 | md_pcrel_from (fixP) | |
1177 | fixS *fixP; | |
fecd2382 | 1178 | { |
355afbcd | 1179 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1180 | } |
1181 | ||
1182 | /* | |
1183 | * Local Variables: | |
1184 | * comment-column: 0 | |
1185 | * End: | |
1186 | */ | |
1187 | ||
1188 | /* end of tc-a29k.c */ |