Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-a29k.c -- Assemble for the AMD 29000. |
5ac34ac3 | 2 | Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
355afbcd | 3 | |
a39116f1 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
a39116f1 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
355afbcd | 10 | |
a39116f1 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
a39116f1 RP |
16 | You should have received a copy of the GNU General Public License |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
fecd2382 | 19 | |
fecd2382 RP |
20 | /* John Gilmore has reorganized this module somewhat, to make it easier |
21 | to convert it to new machines' assemblers as desired. There was too | |
22 | much bloody rewriting required before. There still probably is. */ | |
a39116f1 | 23 | |
d6f72574 | 24 | #include "ctype.h" |
fecd2382 RP |
25 | #include "as.h" |
26 | ||
a1d144c6 | 27 | #include "opcode/a29k.h" |
fecd2382 RP |
28 | |
29 | /* Make it easier to clone this machine desc into another one. */ | |
30 | #define machine_opcode a29k_opcode | |
31 | #define machine_opcodes a29k_opcodes | |
32 | #define machine_ip a29k_ip | |
33 | #define machine_it a29k_it | |
34 | ||
355afbcd | 35 | const relax_typeS md_relax_table[] = |
604633ae ILT |
36 | { |
37 | { 0, 0, 0, 0 } | |
38 | }; | |
fecd2382 RP |
39 | |
40 | #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */ | |
41 | #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */ | |
42 | #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */ | |
43 | #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */ | |
44 | ||
45 | /* handle of the OPCODE hash table */ | |
46 | static struct hash_control *op_hash = NULL; | |
47 | ||
355afbcd KR |
48 | struct machine_it |
49 | { | |
50 | char *error; | |
51 | unsigned long opcode; | |
52 | struct nlist *nlistp; | |
53 | expressionS exp; | |
54 | int pcrel; | |
55 | int reloc_offset; /* Offset of reloc within insn */ | |
56 | ||
57 | int reloc; | |
355afbcd | 58 | } |
355afbcd | 59 | the_insn; |
fecd2382 | 60 | |
a938b1d6 ILT |
61 | static void machine_ip PARAMS ((char *str)); |
62 | /* static void print_insn PARAMS ((struct machine_it *insn)); */ | |
604633ae | 63 | #ifndef OBJ_COFF |
a938b1d6 | 64 | static void s_data1 PARAMS ((void)); |
604633ae ILT |
65 | static void s_use PARAMS ((int)); |
66 | #endif | |
fecd2382 RP |
67 | |
68 | const pseudo_typeS | |
9956df6a | 69 | md_pseudo_table[] = |
355afbcd KR |
70 | { |
71 | {"align", s_align_bytes, 4}, | |
72 | {"block", s_space, 0}, | |
73 | {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */ | |
74 | {"reg", s_lsym, 0}, /* Register equate, same as equ */ | |
75 | {"space", s_ignore, 0}, /* Listing control */ | |
76 | {"sect", s_ignore, 0}, /* Creation of coff sections */ | |
c58dbabf | 77 | #ifndef OBJ_COFF |
9956df6a | 78 | /* We can do this right with coff. */ |
355afbcd | 79 | {"use", s_use, 0}, |
c58dbabf | 80 | #endif |
355afbcd KR |
81 | {"word", cons, 4}, |
82 | {NULL, 0, 0}, | |
83 | }; | |
fecd2382 RP |
84 | |
85 | int md_short_jump_size = 4; | |
86 | int md_long_jump_size = 4; | |
57574979 SC |
87 | #if defined(BFD_HEADERS) |
88 | #ifdef RELSZ | |
49864cfa | 89 | const int md_reloc_size = RELSZ; /* Coff headers */ |
57574979 | 90 | #else |
49864cfa | 91 | const int md_reloc_size = 12; /* something else headers */ |
57574979 SC |
92 | #endif |
93 | #else | |
49864cfa | 94 | const int md_reloc_size = 12; /* Not bfdized*/ |
57574979 | 95 | #endif |
fecd2382 RP |
96 | |
97 | /* This array holds the chars that always start a comment. If the | |
a39116f1 | 98 | pre-processor is disabled, these aren't very useful */ |
587c4264 | 99 | const char comment_chars[] = ";"; |
fecd2382 RP |
100 | |
101 | /* This array holds the chars that only start a comment at the beginning of | |
102 | a line. If the line seems to have the form '# 123 filename' | |
103 | .line and .file directives will appear in the pre-processed output */ | |
104 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
105 | first line of the input file. This is because the compiler outputs | |
106 | #NO_APP at the beginning of its output. */ | |
107 | /* Also note that comments like this one will always work */ | |
587c4264 | 108 | const char line_comment_chars[] = "#"; |
fecd2382 RP |
109 | |
110 | /* We needed an unused char for line separation to work around the | |
111 | lack of macros, using sed and such. */ | |
587c4264 | 112 | const char line_separator_chars[] = "@"; |
fecd2382 RP |
113 | |
114 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
587c4264 | 115 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
116 | |
117 | /* Chars that mean this number is a floating point constant */ | |
118 | /* As in 0f12.456 */ | |
119 | /* or 0d1.2345e12 */ | |
587c4264 | 120 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
121 | |
122 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9956df6a KR |
123 | changed in read.c. Ideally it shouldn't have to know about it at |
124 | all, but nothing is ideal around here. */ | |
fecd2382 RP |
125 | |
126 | static unsigned char octal[256]; | |
127 | #define isoctal(c) octal[c] | |
355afbcd | 128 | static unsigned char toHex[256]; |
fecd2382 RP |
129 | |
130 | /* | |
355afbcd | 131 | * anull bit - causes the branch delay slot instructions to not be executed |
fecd2382 RP |
132 | */ |
133 | #define ANNUL (1 << 29) | |
134 | ||
604633ae ILT |
135 | #ifndef OBJ_COFF |
136 | ||
fecd2382 | 137 | static void |
604633ae ILT |
138 | s_use (ignore) |
139 | int ignore; | |
fecd2382 | 140 | { |
355afbcd KR |
141 | if (strncmp (input_line_pointer, ".text", 5) == 0) |
142 | { | |
143 | input_line_pointer += 5; | |
a938b1d6 | 144 | s_text (0); |
355afbcd KR |
145 | return; |
146 | } | |
147 | if (strncmp (input_line_pointer, ".data", 5) == 0) | |
148 | { | |
149 | input_line_pointer += 5; | |
a938b1d6 | 150 | s_data (0); |
355afbcd KR |
151 | return; |
152 | } | |
153 | if (strncmp (input_line_pointer, ".data1", 6) == 0) | |
154 | { | |
155 | input_line_pointer += 6; | |
156 | s_data1 (); | |
157 | return; | |
158 | } | |
9956df6a KR |
159 | /* Literals can't go in the text segment because you can't read from |
160 | instruction memory on some 29k's. So, into initialized data. */ | |
355afbcd KR |
161 | if (strncmp (input_line_pointer, ".lit", 4) == 0) |
162 | { | |
163 | input_line_pointer += 4; | |
604633ae | 164 | subseg_set (SEG_DATA, 200); |
355afbcd KR |
165 | demand_empty_rest_of_line (); |
166 | return; | |
167 | } | |
168 | ||
169 | as_bad ("Unknown segment type"); | |
170 | demand_empty_rest_of_line (); | |
fecd2382 RP |
171 | } |
172 | ||
173 | static void | |
355afbcd | 174 | s_data1 () |
fecd2382 | 175 | { |
604633ae | 176 | subseg_set (SEG_DATA, 1); |
355afbcd | 177 | demand_empty_rest_of_line (); |
fecd2382 RP |
178 | } |
179 | ||
604633ae ILT |
180 | #endif /* OBJ_COFF */ |
181 | ||
fecd2382 RP |
182 | /* Install symbol definition that maps REGNAME to REGNO. |
183 | FIXME-SOON: These are not recognized in mixed case. */ | |
184 | ||
185 | static void | |
355afbcd KR |
186 | insert_sreg (regname, regnum) |
187 | char *regname; | |
188 | int regnum; | |
fecd2382 | 189 | { |
9956df6a KR |
190 | /* FIXME-SOON, put something in these syms so they won't be output |
191 | to the symbol table of the resulting object file. */ | |
355afbcd KR |
192 | |
193 | /* Must be large enough to hold the names of the special registers. */ | |
194 | char buf[80]; | |
195 | int i; | |
196 | ||
4f0bccc7 ILT |
197 | symbol_table_insert (symbol_new (regname, SEG_REGISTER, (valueT) regnum, |
198 | &zero_address_frag)); | |
355afbcd KR |
199 | for (i = 0; regname[i]; i++) |
200 | buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i]; | |
201 | buf[i] = '\0'; | |
202 | ||
4f0bccc7 ILT |
203 | symbol_table_insert (symbol_new (buf, SEG_REGISTER, (valueT) regnum, |
204 | &zero_address_frag)); | |
9956df6a | 205 | } |
fecd2382 RP |
206 | |
207 | /* Install symbol definitions for assorted special registers. | |
208 | See ASM29K Ref page 2-9. */ | |
209 | ||
355afbcd KR |
210 | void |
211 | define_some_regs () | |
212 | { | |
fecd2382 | 213 | #define SREG 256 |
355afbcd KR |
214 | |
215 | /* Protected special-purpose register names */ | |
216 | insert_sreg ("vab", SREG + 0); | |
217 | insert_sreg ("ops", SREG + 1); | |
218 | insert_sreg ("cps", SREG + 2); | |
219 | insert_sreg ("cfg", SREG + 3); | |
220 | insert_sreg ("cha", SREG + 4); | |
221 | insert_sreg ("chd", SREG + 5); | |
222 | insert_sreg ("chc", SREG + 6); | |
223 | insert_sreg ("rbp", SREG + 7); | |
224 | insert_sreg ("tmc", SREG + 8); | |
225 | insert_sreg ("tmr", SREG + 9); | |
226 | insert_sreg ("pc0", SREG + 10); | |
227 | insert_sreg ("pc1", SREG + 11); | |
228 | insert_sreg ("pc2", SREG + 12); | |
229 | insert_sreg ("mmu", SREG + 13); | |
230 | insert_sreg ("lru", SREG + 14); | |
231 | ||
d6f72574 KR |
232 | /* Additional protected special-purpose registers for the 29050 */ |
233 | insert_sreg ("rsn", SREG + 15); | |
234 | insert_sreg ("rma0", SREG + 16); | |
235 | insert_sreg ("rmc0", SREG + 17); | |
236 | insert_sreg ("rma1", SREG + 18); | |
237 | insert_sreg ("rmc1", SREG + 19); | |
238 | insert_sreg ("spc0", SREG + 20); | |
239 | insert_sreg ("spc1", SREG + 21); | |
240 | insert_sreg ("spc2", SREG + 22); | |
241 | insert_sreg ("iba0", SREG + 23); | |
242 | insert_sreg ("ibc0", SREG + 24); | |
243 | insert_sreg ("iba1", SREG + 25); | |
244 | insert_sreg ("ibc1", SREG + 26); | |
245 | ||
355afbcd KR |
246 | /* Unprotected special-purpose register names */ |
247 | insert_sreg ("ipc", SREG + 128); | |
248 | insert_sreg ("ipa", SREG + 129); | |
249 | insert_sreg ("ipb", SREG + 130); | |
250 | insert_sreg ("q", SREG + 131); | |
251 | insert_sreg ("alu", SREG + 132); | |
252 | insert_sreg ("bp", SREG + 133); | |
253 | insert_sreg ("fc", SREG + 134); | |
254 | insert_sreg ("cr", SREG + 135); | |
255 | insert_sreg ("fpe", SREG + 160); | |
256 | insert_sreg ("inte", SREG + 161); | |
257 | insert_sreg ("fps", SREG + 162); | |
258 | /* "", SREG+163); Reserved */ | |
259 | insert_sreg ("exop", SREG + 164); | |
9956df6a | 260 | } |
fecd2382 RP |
261 | |
262 | /* This function is called once, at assembler startup time. It should | |
9956df6a KR |
263 | set up all the tables, etc., that the MD part of the assembler will |
264 | need. */ | |
fecd2382 | 265 | void |
355afbcd | 266 | md_begin () |
fecd2382 | 267 | { |
604633ae | 268 | register const char *retval = NULL; |
355afbcd KR |
269 | int lose = 0; |
270 | register int skipnext = 0; | |
271 | register unsigned int i; | |
272 | register char *strend, *strend2; | |
273 | ||
274 | /* Hash up all the opcodes for fast use later. */ | |
275 | ||
276 | op_hash = hash_new (); | |
355afbcd KR |
277 | |
278 | for (i = 0; i < num_opcodes; i++) | |
279 | { | |
280 | const char *name = machine_opcodes[i].name; | |
281 | ||
282 | if (skipnext) | |
283 | { | |
284 | skipnext = 0; | |
285 | continue; | |
286 | } | |
287 | ||
288 | /* Hack to avoid multiple opcode entries. We pre-locate all the | |
9956df6a | 289 | variations (b/i field and P/A field) and handle them. */ |
355afbcd KR |
290 | |
291 | if (!strcmp (name, machine_opcodes[i + 1].name)) | |
292 | { | |
6121fb06 ILT |
293 | if ((machine_opcodes[i].opcode & 0x01000000) != 0 |
294 | || (machine_opcodes[i + 1].opcode & 0x01000000) == 0 | |
295 | || ((machine_opcodes[i].opcode | 0x01000000) | |
296 | != machine_opcodes[i + 1].opcode)) | |
355afbcd KR |
297 | goto bad_table; |
298 | strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1; | |
299 | strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1; | |
300 | switch (*strend) | |
301 | { | |
302 | case 'b': | |
303 | if (*strend2 != 'i') | |
304 | goto bad_table; | |
305 | break; | |
355afbcd KR |
306 | case 'P': |
307 | if (*strend2 != 'A') | |
308 | goto bad_table; | |
309 | break; | |
355afbcd KR |
310 | default: |
311 | bad_table: | |
9956df6a KR |
312 | fprintf (stderr, "internal error: can't handle opcode %s\n", |
313 | name); | |
355afbcd | 314 | lose = 1; |
a39116f1 | 315 | } |
355afbcd | 316 | |
9956df6a KR |
317 | /* OK, this is an i/b or A/P pair. We skip the |
318 | higher-valued one, and let the code for operand checking | |
319 | handle OR-ing in the bit. */ | |
6121fb06 | 320 | skipnext = 1; |
355afbcd KR |
321 | } |
322 | ||
604633ae | 323 | retval = hash_insert (op_hash, name, (PTR) &machine_opcodes[i]); |
43029a8f | 324 | if (retval != NULL) |
355afbcd KR |
325 | { |
326 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
327 | machine_opcodes[i].name, retval); | |
328 | lose = 1; | |
329 | } | |
330 | } | |
331 | ||
332 | if (lose) | |
333 | as_fatal ("Broken assembler. No assembly attempted."); | |
334 | ||
335 | for (i = '0'; i < '8'; ++i) | |
336 | octal[i] = 1; | |
337 | for (i = '0'; i <= '9'; ++i) | |
338 | toHex[i] = i - '0'; | |
339 | for (i = 'a'; i <= 'f'; ++i) | |
340 | toHex[i] = i + 10 - 'a'; | |
341 | for (i = 'A'; i <= 'F'; ++i) | |
342 | toHex[i] = i + 10 - 'A'; | |
343 | ||
344 | define_some_regs (); | |
fecd2382 RP |
345 | } |
346 | ||
355afbcd KR |
347 | void |
348 | md_end () | |
349 | { | |
fecd2382 RP |
350 | } |
351 | ||
352 | /* Assemble a single instruction. Its label has already been handled | |
353 | by the generic front end. We just parse opcode and operands, and | |
354 | produce the bytes of data and relocation. */ | |
355 | ||
355afbcd KR |
356 | void |
357 | md_assemble (str) | |
358 | char *str; | |
fecd2382 | 359 | { |
355afbcd | 360 | char *toP; |
355afbcd KR |
361 | |
362 | know (str); | |
363 | machine_ip (str); | |
364 | toP = frag_more (4); | |
365 | /* put out the opcode */ | |
366 | md_number_to_chars (toP, the_insn.opcode, 4); | |
367 | ||
368 | /* put out the symbol-dependent stuff */ | |
369 | if (the_insn.reloc != NO_RELOC) | |
370 | { | |
5ac34ac3 ILT |
371 | fix_new_exp (frag_now, |
372 | (toP - frag_now->fr_literal + the_insn.reloc_offset), | |
373 | 4, /* size */ | |
374 | &the_insn.exp, | |
375 | the_insn.pcrel, | |
376 | the_insn.reloc); | |
355afbcd | 377 | } |
fecd2382 RP |
378 | } |
379 | ||
380 | char * | |
355afbcd KR |
381 | parse_operand (s, operandp) |
382 | char *s; | |
383 | expressionS *operandp; | |
fecd2382 | 384 | { |
c58dbabf SC |
385 | char *save = input_line_pointer; |
386 | char *new; | |
355afbcd | 387 | |
c58dbabf | 388 | input_line_pointer = s; |
283dba4b ILT |
389 | expression (operandp); |
390 | if (operandp->X_op == O_absent) | |
5ac34ac3 | 391 | as_bad ("missing operand"); |
c58dbabf SC |
392 | new = input_line_pointer; |
393 | input_line_pointer = save; | |
c58dbabf | 394 | return new; |
fecd2382 RP |
395 | } |
396 | ||
355afbcd | 397 | /* Instruction parsing. Takes a string containing the opcode. |
fecd2382 RP |
398 | Operands are at input_line_pointer. Output is in the_insn. |
399 | Warnings or errors are generated. */ | |
a39116f1 | 400 | |
fecd2382 | 401 | static void |
355afbcd KR |
402 | machine_ip (str) |
403 | char *str; | |
fecd2382 | 404 | { |
355afbcd KR |
405 | char *s; |
406 | const char *args; | |
355afbcd KR |
407 | struct machine_opcode *insn; |
408 | char *argsStart; | |
409 | unsigned long opcode; | |
355afbcd KR |
410 | expressionS the_operand; |
411 | expressionS *operand = &the_operand; | |
412 | unsigned int reg; | |
413 | ||
414 | /* Must handle `div0' opcode. */ | |
415 | s = str; | |
416 | if (isalpha (*s)) | |
417 | for (; isalnum (*s); ++s) | |
418 | if (isupper (*s)) | |
419 | *s = tolower (*s); | |
420 | ||
421 | switch (*s) | |
422 | { | |
423 | case '\0': | |
424 | break; | |
425 | ||
426 | case ' ': /* FIXME-SOMEDAY more whitespace */ | |
427 | *s++ = '\0'; | |
428 | break; | |
429 | ||
430 | default: | |
431 | as_bad ("Unknown opcode: `%s'", str); | |
432 | return; | |
433 | } | |
434 | if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL) | |
435 | { | |
436 | as_bad ("Unknown opcode `%s'.", str); | |
437 | return; | |
438 | } | |
439 | argsStart = s; | |
440 | opcode = insn->opcode; | |
441 | memset (&the_insn, '\0', sizeof (the_insn)); | |
442 | the_insn.reloc = NO_RELOC; | |
443 | ||
9956df6a KR |
444 | /* Build the opcode, checking as we go to make sure that the |
445 | operands match. | |
446 | ||
447 | If an operand matches, we modify the_insn or opcode appropriately, | |
448 | and do a "continue". If an operand fails to match, we "break". */ | |
449 | ||
355afbcd KR |
450 | if (insn->args[0] != '\0') |
451 | s = parse_operand (s, operand); /* Prime the pump */ | |
452 | ||
453 | for (args = insn->args;; ++args) | |
454 | { | |
455 | switch (*args) | |
456 | { | |
457 | ||
458 | case '\0': /* end of args */ | |
459 | if (*s == '\0') | |
460 | { | |
461 | /* We are truly done. */ | |
462 | the_insn.opcode = opcode; | |
463 | return; | |
464 | } | |
465 | as_bad ("Too many operands: %s", s); | |
466 | break; | |
467 | ||
468 | case ',': /* Must match a comma */ | |
469 | if (*s++ == ',') | |
470 | { | |
471 | s = parse_operand (s, operand); /* Parse next opnd */ | |
472 | continue; | |
473 | } | |
474 | break; | |
475 | ||
476 | case 'v': /* Trap numbers (immediate field) */ | |
5ac34ac3 | 477 | if (operand->X_op == O_constant) |
355afbcd KR |
478 | { |
479 | if (operand->X_add_number < 256) | |
480 | { | |
481 | opcode |= (operand->X_add_number << 16); | |
482 | continue; | |
483 | } | |
484 | else | |
485 | { | |
604633ae ILT |
486 | as_bad ("Immediate value of %ld is too large", |
487 | (long) operand->X_add_number); | |
355afbcd KR |
488 | continue; |
489 | } | |
490 | } | |
491 | the_insn.reloc = RELOC_8; | |
492 | the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */ | |
493 | the_insn.exp = *operand; | |
494 | continue; | |
495 | ||
496 | case 'b': /* A general register or 8-bit immediate */ | |
497 | case 'i': | |
498 | /* We treat the two cases identically since we mashed | |
9956df6a | 499 | them together in the opcode table. */ |
5ac34ac3 | 500 | if (operand->X_op == O_register) |
355afbcd KR |
501 | goto general_reg; |
502 | ||
6121fb06 ILT |
503 | /* Make sure the 'i' case really exists. */ |
504 | if ((insn->opcode | IMMEDIATE_BIT) != (insn + 1)->opcode) | |
505 | break; | |
506 | ||
355afbcd | 507 | opcode |= IMMEDIATE_BIT; |
5ac34ac3 | 508 | if (operand->X_op == O_constant) |
355afbcd KR |
509 | { |
510 | if (operand->X_add_number < 256) | |
511 | { | |
512 | opcode |= operand->X_add_number; | |
513 | continue; | |
514 | } | |
515 | else | |
516 | { | |
604633ae ILT |
517 | as_bad ("Immediate value of %ld is too large", |
518 | (long) operand->X_add_number); | |
355afbcd KR |
519 | continue; |
520 | } | |
521 | } | |
522 | the_insn.reloc = RELOC_8; | |
523 | the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */ | |
524 | the_insn.exp = *operand; | |
525 | continue; | |
526 | ||
527 | case 'a': /* next operand must be a register */ | |
528 | case 'c': | |
529 | general_reg: | |
530 | /* lrNNN or grNNN or %%expr or a user-def register name */ | |
5ac34ac3 | 531 | if (operand->X_op != O_register) |
355afbcd KR |
532 | break; /* Only registers */ |
533 | know (operand->X_add_symbol == 0); | |
5ac34ac3 | 534 | know (operand->X_op_symbol == 0); |
355afbcd KR |
535 | reg = operand->X_add_number; |
536 | if (reg >= SREG) | |
537 | break; /* No special registers */ | |
538 | ||
9956df6a KR |
539 | /* Got the register, now figure out where it goes in the |
540 | opcode. */ | |
355afbcd KR |
541 | switch (*args) |
542 | { | |
543 | case 'a': | |
544 | opcode |= reg << 8; | |
545 | continue; | |
546 | ||
547 | case 'b': | |
548 | case 'i': | |
549 | opcode |= reg; | |
550 | continue; | |
551 | ||
552 | case 'c': | |
553 | opcode |= reg << 16; | |
554 | continue; | |
555 | } | |
556 | as_fatal ("failed sanity check."); | |
557 | break; | |
558 | ||
559 | case 'x': /* 16 bit constant, zero-extended */ | |
560 | case 'X': /* 16 bit constant, one-extended */ | |
5ac34ac3 | 561 | if (operand->X_op == O_constant) |
355afbcd KR |
562 | { |
563 | opcode |= (operand->X_add_number & 0xFF) << 0 | | |
564 | ((operand->X_add_number & 0xFF00) << 8); | |
565 | continue; | |
566 | } | |
567 | the_insn.reloc = RELOC_CONST; | |
568 | the_insn.exp = *operand; | |
569 | continue; | |
570 | ||
571 | case 'h': | |
5ac34ac3 | 572 | if (operand->X_op == O_constant) |
355afbcd KR |
573 | { |
574 | opcode |= (operand->X_add_number & 0x00FF0000) >> 16 | | |
575 | (((unsigned long) operand->X_add_number | |
576 | /* avoid sign ext */ & 0xFF000000) >> 8); | |
577 | continue; | |
578 | } | |
579 | the_insn.reloc = RELOC_CONSTH; | |
580 | the_insn.exp = *operand; | |
581 | continue; | |
582 | ||
583 | case 'P': /* PC-relative jump address */ | |
584 | case 'A': /* Absolute jump address */ | |
585 | /* These two are treated together since we folded the | |
5ac34ac3 ILT |
586 | opcode table entries together. */ |
587 | if (operand->X_op == O_constant) | |
355afbcd | 588 | { |
6121fb06 ILT |
589 | /* Make sure the 'A' case really exists. */ |
590 | if ((insn->opcode | ABSOLUTE_BIT) != (insn + 1)->opcode) | |
591 | break; | |
355afbcd KR |
592 | opcode |= ABSOLUTE_BIT | |
593 | (operand->X_add_number & 0x0003FC00) << 6 | | |
594 | ((operand->X_add_number & 0x000003FC) >> 2); | |
595 | continue; | |
596 | } | |
597 | the_insn.reloc = RELOC_JUMPTARG; | |
598 | the_insn.exp = *operand; | |
599 | the_insn.pcrel = 1; /* Assume PC-relative jump */ | |
9956df6a KR |
600 | /* FIXME-SOON, Do we figure out whether abs later, after |
601 | know sym val? */ | |
355afbcd KR |
602 | continue; |
603 | ||
604 | case 'e': /* Coprocessor enable bit for LOAD/STORE insn */ | |
5ac34ac3 | 605 | if (operand->X_op == O_constant) |
355afbcd KR |
606 | { |
607 | if (operand->X_add_number == 0) | |
608 | continue; | |
609 | if (operand->X_add_number == 1) | |
610 | { | |
611 | opcode |= CE_BIT; | |
612 | continue; | |
fecd2382 | 613 | } |
355afbcd KR |
614 | } |
615 | break; | |
616 | ||
617 | case 'n': /* Control bits for LOAD/STORE instructions */ | |
5ac34ac3 | 618 | if (operand->X_op == O_constant && |
355afbcd KR |
619 | operand->X_add_number < 128) |
620 | { | |
621 | opcode |= (operand->X_add_number << 16); | |
622 | continue; | |
623 | } | |
624 | break; | |
625 | ||
626 | case 's': /* Special register number */ | |
5ac34ac3 | 627 | if (operand->X_op != O_register) |
355afbcd KR |
628 | break; /* Only registers */ |
629 | if (operand->X_add_number < SREG) | |
630 | break; /* Not a special register */ | |
631 | opcode |= (operand->X_add_number & 0xFF) << 8; | |
632 | continue; | |
633 | ||
634 | case 'u': /* UI bit of CONVERT */ | |
5ac34ac3 | 635 | if (operand->X_op == O_constant) |
355afbcd KR |
636 | { |
637 | if (operand->X_add_number == 0) | |
638 | continue; | |
639 | if (operand->X_add_number == 1) | |
640 | { | |
641 | opcode |= UI_BIT; | |
642 | continue; | |
643 | } | |
644 | } | |
645 | break; | |
646 | ||
647 | case 'r': /* RND bits of CONVERT */ | |
5ac34ac3 | 648 | if (operand->X_op == O_constant && |
355afbcd KR |
649 | operand->X_add_number < 8) |
650 | { | |
651 | opcode |= operand->X_add_number << 4; | |
652 | continue; | |
653 | } | |
654 | break; | |
655 | ||
656 | case 'd': /* FD bits of CONVERT */ | |
5ac34ac3 | 657 | if (operand->X_op == O_constant && |
355afbcd KR |
658 | operand->X_add_number < 4) |
659 | { | |
660 | opcode |= operand->X_add_number << 2; | |
661 | continue; | |
662 | } | |
663 | break; | |
664 | ||
665 | ||
666 | case 'f': /* FS bits of CONVERT */ | |
5ac34ac3 | 667 | if (operand->X_op == O_constant && |
355afbcd KR |
668 | operand->X_add_number < 4) |
669 | { | |
670 | opcode |= operand->X_add_number << 0; | |
671 | continue; | |
672 | } | |
673 | break; | |
674 | ||
675 | case 'C': | |
5ac34ac3 | 676 | if (operand->X_op == O_constant && |
355afbcd KR |
677 | operand->X_add_number < 4) |
678 | { | |
679 | opcode |= operand->X_add_number << 16; | |
680 | continue; | |
681 | } | |
682 | break; | |
683 | ||
684 | case 'F': | |
5ac34ac3 | 685 | if (operand->X_op == O_constant && |
355afbcd KR |
686 | operand->X_add_number < 16) |
687 | { | |
688 | opcode |= operand->X_add_number << 18; | |
689 | continue; | |
690 | } | |
691 | break; | |
692 | ||
693 | default: | |
694 | BAD_CASE (*args); | |
fecd2382 | 695 | } |
355afbcd KR |
696 | /* Types or values of args don't match. */ |
697 | as_bad ("Invalid operands"); | |
698 | return; | |
699 | } | |
fecd2382 RP |
700 | } |
701 | ||
9956df6a KR |
702 | /* This is identical to the md_atof in m68k.c. I think this is right, |
703 | but I'm not sure. | |
355afbcd | 704 | |
9956df6a KR |
705 | Turn a string in input_line_pointer into a floating point constant |
706 | of type type, and store the appropriate bytes in *litP. The number | |
707 | of LITTLENUMS emitted is stored in *sizeP . An error message is | |
708 | returned, or NULL on OK. */ | |
fecd2382 RP |
709 | |
710 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
711 | #define MAX_LITTLENUMS 6 | |
712 | ||
713 | char * | |
355afbcd KR |
714 | md_atof (type, litP, sizeP) |
715 | char type; | |
716 | char *litP; | |
717 | int *sizeP; | |
fecd2382 | 718 | { |
355afbcd KR |
719 | int prec; |
720 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
721 | LITTLENUM_TYPE *wordP; | |
722 | char *t; | |
723 | ||
724 | switch (type) | |
725 | { | |
726 | ||
727 | case 'f': | |
728 | case 'F': | |
729 | case 's': | |
730 | case 'S': | |
731 | prec = 2; | |
732 | break; | |
733 | ||
734 | case 'd': | |
735 | case 'D': | |
736 | case 'r': | |
737 | case 'R': | |
738 | prec = 4; | |
739 | break; | |
740 | ||
741 | case 'x': | |
742 | case 'X': | |
743 | prec = 6; | |
744 | break; | |
745 | ||
746 | case 'p': | |
747 | case 'P': | |
748 | prec = 6; | |
749 | break; | |
750 | ||
751 | default: | |
752 | *sizeP = 0; | |
753 | return "Bad call to MD_ATOF()"; | |
754 | } | |
755 | t = atof_ieee (input_line_pointer, type, words); | |
756 | if (t) | |
757 | input_line_pointer = t; | |
758 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
759 | for (wordP = words; prec--;) | |
760 | { | |
4f0bccc7 | 761 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
762 | litP += sizeof (LITTLENUM_TYPE); |
763 | } | |
99024047 | 764 | return 0; |
fecd2382 RP |
765 | } |
766 | ||
767 | /* | |
768 | * Write out big-endian. | |
769 | */ | |
770 | void | |
355afbcd KR |
771 | md_number_to_chars (buf, val, n) |
772 | char *buf; | |
c463189d | 773 | valueT val; |
355afbcd | 774 | int n; |
fecd2382 | 775 | { |
bfbfba45 | 776 | number_to_chars_bigendian (buf, val, n); |
fecd2382 RP |
777 | } |
778 | ||
355afbcd KR |
779 | void |
780 | md_apply_fix (fixP, val) | |
781 | fixS *fixP; | |
782 | long val; | |
fecd2382 | 783 | { |
355afbcd KR |
784 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
785 | ||
786 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
787 | ||
788 | ||
789 | know (fixP->fx_size == 4); | |
790 | know (fixP->fx_r_type < NO_RELOC); | |
791 | ||
9956df6a | 792 | /* This is a hack. There should be a better way to handle this. */ |
355afbcd KR |
793 | if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) |
794 | { | |
795 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
796 | } | |
797 | ||
798 | switch (fixP->fx_r_type) | |
799 | { | |
800 | ||
801 | case RELOC_32: | |
802 | buf[0] = val >> 24; | |
803 | buf[1] = val >> 16; | |
804 | buf[2] = val >> 8; | |
805 | buf[3] = val; | |
806 | break; | |
807 | ||
808 | case RELOC_8: | |
809 | buf[0] = val; | |
810 | break; | |
811 | ||
812 | case RELOC_WDISP30: | |
813 | val = (val >>= 2) + 1; | |
814 | buf[0] |= (val >> 24) & 0x3f; | |
815 | buf[1] = (val >> 16); | |
816 | buf[2] = val >> 8; | |
817 | buf[3] = val; | |
818 | break; | |
819 | ||
820 | case RELOC_HI22: | |
821 | buf[1] |= (val >> 26) & 0x3f; | |
822 | buf[2] = val >> 18; | |
823 | buf[3] = val >> 10; | |
824 | break; | |
825 | ||
826 | case RELOC_LO10: | |
827 | buf[2] |= (val >> 8) & 0x03; | |
828 | buf[3] = val; | |
829 | break; | |
830 | ||
831 | case RELOC_BASE13: | |
832 | buf[2] |= (val >> 8) & 0x1f; | |
833 | buf[3] = val; | |
834 | break; | |
835 | ||
836 | case RELOC_WDISP22: | |
837 | val = (val >>= 2) + 1; | |
838 | /* FALLTHROUGH */ | |
839 | case RELOC_BASE22: | |
840 | buf[1] |= (val >> 16) & 0x3f; | |
841 | buf[2] = val >> 8; | |
842 | buf[3] = val; | |
843 | break; | |
844 | ||
fecd2382 | 845 | #if 0 |
355afbcd KR |
846 | case RELOC_PC10: |
847 | case RELOC_PC22: | |
848 | case RELOC_JMP_TBL: | |
849 | case RELOC_SEGOFF16: | |
850 | case RELOC_GLOB_DAT: | |
851 | case RELOC_JMP_SLOT: | |
852 | case RELOC_RELATIVE: | |
fecd2382 | 853 | #endif |
355afbcd KR |
854 | case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */ |
855 | buf[1] = val >> 10; /* Holds bits 0003FFFC of address */ | |
856 | buf[3] = val >> 2; | |
857 | break; | |
858 | ||
859 | case RELOC_CONST: /* 00XX00XX pattern in a word */ | |
860 | buf[1] = val >> 8; /* Holds bits 0000XXXX */ | |
861 | buf[3] = val; | |
862 | break; | |
863 | ||
864 | case RELOC_CONSTH: /* 00XX00XX pattern in a word */ | |
865 | buf[1] = val >> 24; /* Holds bits XXXX0000 */ | |
866 | buf[3] = val >> 16; | |
867 | break; | |
868 | ||
869 | case NO_RELOC: | |
870 | default: | |
871 | as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type); | |
872 | break; | |
873 | } | |
fecd2382 RP |
874 | } |
875 | ||
876 | #ifdef OBJ_COFF | |
355afbcd KR |
877 | short |
878 | tc_coff_fix2rtype (fixP) | |
879 | fixS *fixP; | |
fecd2382 | 880 | { |
355afbcd KR |
881 | |
882 | switch (fixP->fx_r_type) | |
883 | { | |
884 | case RELOC_32: | |
885 | return (R_WORD); | |
886 | case RELOC_8: | |
887 | return (R_BYTE); | |
888 | case RELOC_CONST: | |
889 | return (R_ILOHALF); | |
890 | case RELOC_CONSTH: | |
891 | return (R_IHIHALF); | |
892 | case RELOC_JUMPTARG: | |
893 | return (R_IREL); | |
894 | default: | |
895 | printf ("need %o3\n", fixP->fx_r_type); | |
896 | abort (); | |
897 | } /* switch on type */ | |
898 | ||
899 | return (0); | |
9956df6a | 900 | } |
355afbcd | 901 | |
fecd2382 RP |
902 | #endif /* OBJ_COFF */ |
903 | ||
9956df6a | 904 | /* should never be called for 29k */ |
355afbcd KR |
905 | void |
906 | md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
907 | char *ptr; | |
c463189d | 908 | addressT from_addr, to_addr; |
355afbcd KR |
909 | fragS *frag; |
910 | symbolS *to_symbol; | |
fecd2382 | 911 | { |
355afbcd | 912 | as_fatal ("a29k_create_short_jmp\n"); |
fecd2382 RP |
913 | } |
914 | ||
fecd2382 | 915 | /* should never be called for 29k */ |
355afbcd KR |
916 | void |
917 | md_convert_frag (headers, fragP) | |
918 | object_headers *headers; | |
919 | register fragS *fragP; | |
fecd2382 | 920 | { |
9956df6a | 921 | as_fatal ("a29k_convert_frag\n"); |
fecd2382 RP |
922 | } |
923 | ||
924 | /* should never be called for 29k */ | |
355afbcd KR |
925 | void |
926 | md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol) | |
927 | char *ptr; | |
c463189d ME |
928 | addressT from_addr; |
929 | addressT to_addr; | |
355afbcd KR |
930 | fragS *frag; |
931 | symbolS *to_symbol; | |
fecd2382 | 932 | { |
9956df6a | 933 | as_fatal ("a29k_create_long_jump\n"); |
fecd2382 RP |
934 | } |
935 | ||
542e1629 | 936 | /* should never be called for a29k */ |
355afbcd KR |
937 | int |
938 | md_estimate_size_before_relax (fragP, segtype) | |
939 | register fragS *fragP; | |
940 | segT segtype; | |
fecd2382 | 941 | { |
9956df6a KR |
942 | as_fatal ("a29k_estimate_size_before_relax\n"); |
943 | return 0; | |
fecd2382 RP |
944 | } |
945 | ||
946 | #if 0 | |
947 | /* for debugging only */ | |
948 | static void | |
355afbcd KR |
949 | print_insn (insn) |
950 | struct machine_it *insn; | |
fecd2382 | 951 | { |
355afbcd KR |
952 | char *Reloc[] = |
953 | { | |
954 | "RELOC_8", | |
955 | "RELOC_16", | |
956 | "RELOC_32", | |
957 | "RELOC_DISP8", | |
958 | "RELOC_DISP16", | |
959 | "RELOC_DISP32", | |
960 | "RELOC_WDISP30", | |
961 | "RELOC_WDISP22", | |
962 | "RELOC_HI22", | |
963 | "RELOC_22", | |
964 | "RELOC_13", | |
965 | "RELOC_LO10", | |
966 | "RELOC_SFA_BASE", | |
967 | "RELOC_SFA_OFF13", | |
968 | "RELOC_BASE10", | |
969 | "RELOC_BASE13", | |
970 | "RELOC_BASE22", | |
971 | "RELOC_PC10", | |
972 | "RELOC_PC22", | |
973 | "RELOC_JMP_TBL", | |
974 | "RELOC_SEGOFF16", | |
975 | "RELOC_GLOB_DAT", | |
976 | "RELOC_JMP_SLOT", | |
977 | "RELOC_RELATIVE", | |
978 | "NO_RELOC" | |
979 | }; | |
980 | ||
981 | if (insn->error) | |
982 | { | |
983 | fprintf (stderr, "ERROR: %s\n"); | |
984 | } | |
985 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); | |
986 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
987 | fprintf (stderr, "exp = {\n"); | |
988 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
989 | insn->exp.X_add_symbol ? | |
990 | (S_GET_NAME (insn->exp.X_add_symbol) ? | |
991 | S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0"); | |
5ac34ac3 ILT |
992 | fprintf (stderr, "\t\tX_op_symbol = %s\n", |
993 | insn->exp.X_op_symbol ? | |
994 | (S_GET_NAME (insn->exp.X_op_symbol) ? | |
995 | S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0"); | |
355afbcd KR |
996 | fprintf (stderr, "\t\tX_add_number = %d\n", |
997 | insn->exp.X_add_number); | |
998 | fprintf (stderr, "}\n"); | |
fecd2382 | 999 | } |
355afbcd | 1000 | |
fecd2382 RP |
1001 | #endif |
1002 | ||
a79c6033 | 1003 | /* Translate internal representation of relocation info to target format. |
355afbcd | 1004 | |
a79c6033 RP |
1005 | On sparc/29k: first 4 bytes are normal unsigned long address, next three |
1006 | bytes are index, most sig. byte first. Byte 7 is broken up with | |
1007 | bit 7 as external, bits 6 & 5 unused, and the lower | |
1008 | five bits as relocation type. Next 4 bytes are long addend. */ | |
1009 | /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */ | |
fecd2382 | 1010 | |
a79c6033 | 1011 | #ifdef OBJ_AOUT |
fecd2382 | 1012 | |
355afbcd KR |
1013 | void |
1014 | tc_aout_fix_to_chars (where, fixP, segment_address_in_file) | |
1015 | char *where; | |
1016 | fixS *fixP; | |
1017 | relax_addressT segment_address_in_file; | |
a79c6033 | 1018 | { |
355afbcd KR |
1019 | long r_symbolnum; |
1020 | ||
1021 | know (fixP->fx_r_type < NO_RELOC); | |
1022 | know (fixP->fx_addsy != NULL); | |
1023 | ||
1024 | md_number_to_chars (where, | |
1025 | fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file, | |
1026 | 4); | |
1027 | ||
1028 | r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy) | |
1029 | ? S_GET_TYPE (fixP->fx_addsy) | |
1030 | : fixP->fx_addsy->sy_number); | |
1031 | ||
1032 | where[4] = (r_symbolnum >> 16) & 0x0ff; | |
1033 | where[5] = (r_symbolnum >> 8) & 0x0ff; | |
1034 | where[6] = r_symbolnum & 0x0ff; | |
1035 | where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F); | |
1036 | /* Also easy */ | |
1037 | md_number_to_chars (&where[8], fixP->fx_addnumber, 4); | |
9956df6a | 1038 | } |
fecd2382 RP |
1039 | |
1040 | #endif /* OBJ_AOUT */ | |
1041 | ||
1042 | int | |
355afbcd KR |
1043 | md_parse_option (argP, cntP, vecP) |
1044 | char **argP; | |
1045 | int *cntP; | |
1046 | char ***vecP; | |
fecd2382 | 1047 | { |
9956df6a | 1048 | return 0; |
fecd2382 RP |
1049 | } |
1050 | ||
1051 | ||
1052 | /* Default the values of symbols known that should be "predefined". We | |
1053 | don't bother to predefine them unless you actually use one, since there | |
1054 | are a lot of them. */ | |
1055 | ||
355afbcd KR |
1056 | symbolS * |
1057 | md_undefined_symbol (name) | |
1058 | char *name; | |
fecd2382 | 1059 | { |
355afbcd KR |
1060 | long regnum; |
1061 | char testbuf[5 + /*SLOP*/ 5]; | |
1062 | ||
1063 | if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L') | |
1064 | { | |
1065 | /* Perhaps a global or local register name */ | |
1066 | if (name[1] == 'r' || name[1] == 'R') | |
1067 | { | |
1068 | /* Parse the number, make sure it has no extra zeroes or trailing | |
a39116f1 | 1069 | chars */ |
355afbcd KR |
1070 | regnum = atol (&name[2]); |
1071 | if (regnum > 127) | |
1072 | return 0; | |
1073 | sprintf (testbuf, "%ld", regnum); | |
1074 | if (strcmp (testbuf, &name[2]) != 0) | |
1075 | return 0; /* gr007 or lr7foo or whatever */ | |
1076 | ||
1077 | /* We have a wiener! Define and return a new symbol for it. */ | |
1078 | if (name[0] == 'l' || name[0] == 'L') | |
1079 | regnum += 128; | |
4f0bccc7 ILT |
1080 | return (symbol_new (name, SEG_REGISTER, (valueT) regnum, |
1081 | &zero_address_frag)); | |
355afbcd KR |
1082 | } |
1083 | } | |
1084 | ||
1085 | return 0; | |
fecd2382 RP |
1086 | } |
1087 | ||
1088 | /* Parse an operand that is machine-specific. */ | |
1089 | ||
355afbcd KR |
1090 | void |
1091 | md_operand (expressionP) | |
1092 | expressionS *expressionP; | |
fecd2382 | 1093 | { |
355afbcd KR |
1094 | |
1095 | if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%') | |
1096 | { | |
1097 | /* We have a numeric register expression. No biggy. */ | |
1098 | input_line_pointer += 2; /* Skip %% */ | |
1099 | (void) expression (expressionP); | |
5ac34ac3 | 1100 | if (expressionP->X_op != O_constant |
355afbcd KR |
1101 | || expressionP->X_add_number > 255) |
1102 | as_bad ("Invalid expression after %%%%\n"); | |
5ac34ac3 | 1103 | expressionP->X_op = O_register; |
355afbcd KR |
1104 | } |
1105 | else if (input_line_pointer[0] == '&') | |
1106 | { | |
1107 | /* We are taking the 'address' of a register...this one is not | |
5ac34ac3 ILT |
1108 | in the manual, but it *is* in traps/fpsymbol.h! What they |
1109 | seem to want is the register number, as an absolute number. */ | |
355afbcd KR |
1110 | input_line_pointer++; /* Skip & */ |
1111 | (void) expression (expressionP); | |
5ac34ac3 | 1112 | if (expressionP->X_op != O_register) |
355afbcd KR |
1113 | as_bad ("Invalid register in & expression"); |
1114 | else | |
5ac34ac3 | 1115 | expressionP->X_op = O_constant; |
355afbcd | 1116 | } |
fecd2382 RP |
1117 | } |
1118 | ||
1119 | /* Round up a section size to the appropriate boundary. */ | |
c463189d | 1120 | valueT |
355afbcd KR |
1121 | md_section_align (segment, size) |
1122 | segT segment; | |
c463189d | 1123 | valueT size; |
fecd2382 | 1124 | { |
355afbcd | 1125 | return size; /* Byte alignment is fine */ |
fecd2382 RP |
1126 | } |
1127 | ||
1128 | /* Exactly what point is a PC-relative offset relative TO? | |
1129 | On the 29000, they're relative to the address of the instruction, | |
1130 | which we have set up as the address of the fixup too. */ | |
355afbcd KR |
1131 | long |
1132 | md_pcrel_from (fixP) | |
1133 | fixS *fixP; | |
fecd2382 | 1134 | { |
355afbcd | 1135 | return fixP->fx_where + fixP->fx_frag->fr_address; |
fecd2382 RP |
1136 | } |
1137 | ||
fecd2382 | 1138 | /* end of tc-a29k.c */ |