Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU. |
6f2750fe | 2 | Copyright (C) 1989-2016 Free Software Foundation, Inc. |
252b5132 RH |
3 | Contributed by Carnegie Mellon University, 1993. |
4 | Written by Alessandro Forin, based on earlier gas-1.38 target CPU files. | |
5 | Modified by Ken Raeburn for gas-2.x and ECOFF support. | |
6 | Modified by Richard Henderson for ELF support. | |
9de8d8f1 | 7 | Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support. |
252b5132 RH |
8 | |
9 | This file is part of GAS, the GNU Assembler. | |
10 | ||
11 | GAS is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 13 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
14 | any later version. |
15 | ||
16 | GAS is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
23 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
24 | 02110-1301, USA. */ | |
252b5132 | 25 | |
ea1562b3 NC |
26 | /* Mach Operating System |
27 | Copyright (c) 1993 Carnegie Mellon University | |
28 | All Rights Reserved. | |
29 | ||
30 | Permission to use, copy, modify and distribute this software and its | |
31 | documentation is hereby granted, provided that both the copyright | |
32 | notice and this permission notice appear in all copies of the | |
33 | software, derivative works or modified versions, and any portions | |
34 | thereof, and that both notices appear in supporting documentation. | |
35 | ||
36 | CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS | |
37 | CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
38 | ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
39 | ||
40 | Carnegie Mellon requests users of this software to return to | |
41 | ||
42 | Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
43 | School of Computer Science | |
44 | Carnegie Mellon University | |
45 | Pittsburgh PA 15213-3890 | |
46 | ||
47 | any improvements or extensions that they make and grant Carnegie the | |
48 | rights to redistribute these changes. */ | |
252b5132 RH |
49 | |
50 | #include "as.h" | |
51 | #include "subsegs.h" | |
43b4c25e | 52 | #include "struc-symbol.h" |
252b5132 RH |
53 | #include "ecoff.h" |
54 | ||
55 | #include "opcode/alpha.h" | |
56 | ||
57 | #ifdef OBJ_ELF | |
58 | #include "elf/alpha.h" | |
59 | #endif | |
60 | ||
198f1251 TG |
61 | #ifdef OBJ_EVAX |
62 | #include "vms.h" | |
d8703844 | 63 | #include "vms/egps.h" |
198f1251 TG |
64 | #endif |
65 | ||
66 | #include "dwarf2dbg.h" | |
ea1562b3 | 67 | #include "dw2gencfi.h" |
3882b010 | 68 | #include "safe-ctype.h" |
252b5132 | 69 | \f |
11f45fb5 | 70 | /* Local types. */ |
252b5132 | 71 | |
ea1562b3 NC |
72 | #define TOKENIZE_ERROR -1 |
73 | #define TOKENIZE_ERROR_REPORT -2 | |
74 | #define MAX_INSN_FIXUPS 2 | |
75 | #define MAX_INSN_ARGS 5 | |
252b5132 | 76 | |
21d799b5 NC |
77 | /* Used since new relocation types are introduced in this |
78 | file (DUMMY_RELOC_LITUSE_*) */ | |
79 | typedef int extended_bfd_reloc_code_real_type; | |
80 | ||
11f45fb5 NC |
81 | struct alpha_fixup |
82 | { | |
252b5132 | 83 | expressionS exp; |
21d799b5 NC |
84 | /* bfd_reloc_code_real_type reloc; */ |
85 | extended_bfd_reloc_code_real_type reloc; | |
198f1251 | 86 | #ifdef OBJ_EVAX |
51794af8 TG |
87 | /* The symbol of the item in the linkage section. */ |
88 | symbolS *xtrasym; | |
89 | ||
90 | /* The symbol of the procedure descriptor. */ | |
91 | symbolS *procsym; | |
198f1251 | 92 | #endif |
252b5132 RH |
93 | }; |
94 | ||
11f45fb5 NC |
95 | struct alpha_insn |
96 | { | |
252b5132 RH |
97 | unsigned insn; |
98 | int nfixups; | |
99 | struct alpha_fixup fixups[MAX_INSN_FIXUPS]; | |
19f78583 | 100 | long sequence; |
252b5132 RH |
101 | }; |
102 | ||
11f45fb5 NC |
103 | enum alpha_macro_arg |
104 | { | |
105 | MACRO_EOA = 1, | |
106 | MACRO_IR, | |
107 | MACRO_PIR, | |
108 | MACRO_OPIR, | |
109 | MACRO_CPIR, | |
110 | MACRO_FPR, | |
198f1251 | 111 | MACRO_EXP |
11f45fb5 | 112 | }; |
252b5132 | 113 | |
11f45fb5 NC |
114 | struct alpha_macro |
115 | { | |
252b5132 | 116 | const char *name; |
ea1562b3 NC |
117 | void (*emit) (const expressionS *, int, const void *); |
118 | const void * arg; | |
252b5132 RH |
119 | enum alpha_macro_arg argsets[16]; |
120 | }; | |
121 | ||
1dab94dd | 122 | /* Extra expression types. */ |
252b5132 | 123 | |
ea1562b3 NC |
124 | #define O_pregister O_md1 /* O_register, in parentheses. */ |
125 | #define O_cpregister O_md2 /* + a leading comma. */ | |
252b5132 | 126 | |
3765b1be | 127 | /* The alpha_reloc_op table below depends on the ordering of these. */ |
04fe8f58 RH |
128 | #define O_literal O_md3 /* !literal relocation. */ |
129 | #define O_lituse_addr O_md4 /* !lituse_addr relocation. */ | |
130 | #define O_lituse_base O_md5 /* !lituse_base relocation. */ | |
131 | #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */ | |
132 | #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */ | |
133 | #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */ | |
134 | #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */ | |
135 | #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */ | |
136 | #define O_gpdisp O_md11 /* !gpdisp relocation. */ | |
137 | #define O_gprelhigh O_md12 /* !gprelhigh relocation. */ | |
138 | #define O_gprellow O_md13 /* !gprellow relocation. */ | |
139 | #define O_gprel O_md14 /* !gprel relocation. */ | |
140 | #define O_samegp O_md15 /* !samegp relocation. */ | |
141 | #define O_tlsgd O_md16 /* !tlsgd relocation. */ | |
142 | #define O_tlsldm O_md17 /* !tlsldm relocation. */ | |
143 | #define O_gotdtprel O_md18 /* !gotdtprel relocation. */ | |
144 | #define O_dtprelhi O_md19 /* !dtprelhi relocation. */ | |
145 | #define O_dtprello O_md20 /* !dtprello relocation. */ | |
146 | #define O_dtprel O_md21 /* !dtprel relocation. */ | |
147 | #define O_gottprel O_md22 /* !gottprel relocation. */ | |
148 | #define O_tprelhi O_md23 /* !tprelhi relocation. */ | |
149 | #define O_tprello O_md24 /* !tprello relocation. */ | |
150 | #define O_tprel O_md25 /* !tprel relocation. */ | |
19f78583 RH |
151 | |
152 | #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1) | |
153 | #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2) | |
154 | #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3) | |
155 | #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4) | |
3765b1be RH |
156 | #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5) |
157 | #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6) | |
04fe8f58 | 158 | #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7) |
19f78583 | 159 | |
3765b1be | 160 | #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel) |
43b4c25e | 161 | |
11f45fb5 | 162 | /* Macros for extracting the type and number of encoded register tokens. */ |
252b5132 RH |
163 | |
164 | #define is_ir_num(x) (((x) & 32) == 0) | |
165 | #define is_fpr_num(x) (((x) & 32) != 0) | |
166 | #define regno(x) ((x) & 31) | |
167 | ||
11f45fb5 | 168 | /* Something odd inherited from the old assembler. */ |
252b5132 RH |
169 | |
170 | #define note_gpreg(R) (alpha_gprmask |= (1 << (R))) | |
171 | #define note_fpreg(R) (alpha_fprmask |= (1 << (R))) | |
172 | ||
173 | /* Predicates for 16- and 32-bit ranges */ | |
174 | /* XXX: The non-shift version appears to trigger a compiler bug when | |
175 | cross-assembling from x86 w/ gcc 2.7.2. */ | |
176 | ||
177 | #if 1 | |
178 | #define range_signed_16(x) \ | |
bc805888 | 179 | (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) |
252b5132 | 180 | #define range_signed_32(x) \ |
bc805888 | 181 | (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) |
252b5132 | 182 | #else |
32ff5c2e KH |
183 | #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \ |
184 | (offsetT) (x) <= (offsetT) 0x7FFF) | |
185 | #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \ | |
186 | (offsetT) (x) <= (offsetT) 0x7FFFFFFF) | |
252b5132 RH |
187 | #endif |
188 | ||
189 | /* Macros for sign extending from 16- and 32-bits. */ | |
190 | /* XXX: The cast macros will work on all the systems that I care about, | |
191 | but really a predicate should be found to use the non-cast forms. */ | |
192 | ||
193 | #if 1 | |
bc805888 KH |
194 | #define sign_extend_16(x) ((short) (x)) |
195 | #define sign_extend_32(x) ((int) (x)) | |
252b5132 | 196 | #else |
bc805888 KH |
197 | #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) |
198 | #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ | |
252b5132 RH |
199 | ^ 0x80000000) - 0x80000000) |
200 | #endif | |
201 | ||
11f45fb5 | 202 | /* Macros to build tokens. */ |
252b5132 | 203 | |
32ff5c2e | 204 | #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
205 | (t).X_op = O_register, \ |
206 | (t).X_add_number = (r)) | |
32ff5c2e | 207 | #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
208 | (t).X_op = O_pregister, \ |
209 | (t).X_add_number = (r)) | |
32ff5c2e | 210 | #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
211 | (t).X_op = O_cpregister, \ |
212 | (t).X_add_number = (r)) | |
32ff5c2e | 213 | #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 | 214 | (t).X_op = O_register, \ |
66498417 | 215 | (t).X_add_number = (r) + 32) |
32ff5c2e | 216 | #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
217 | (t).X_op = O_symbol, \ |
218 | (t).X_add_symbol = (s), \ | |
219 | (t).X_add_number = (a)) | |
32ff5c2e | 220 | #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
221 | (t).X_op = O_constant, \ |
222 | (t).X_add_number = (n)) | |
252b5132 | 223 | \f |
252b5132 RH |
224 | /* Generic assembler global variables which must be defined by all |
225 | targets. */ | |
226 | ||
227 | /* Characters which always start a comment. */ | |
228 | const char comment_chars[] = "#"; | |
229 | ||
230 | /* Characters which start a comment at the beginning of a line. */ | |
231 | const char line_comment_chars[] = "#"; | |
232 | ||
233 | /* Characters which may be used to separate multiple commands on a | |
234 | single line. */ | |
235 | const char line_separator_chars[] = ";"; | |
236 | ||
237 | /* Characters which are used to indicate an exponent in a floating | |
238 | point number. */ | |
239 | const char EXP_CHARS[] = "eE"; | |
240 | ||
241 | /* Characters which mean that a number is a floating point constant, | |
242 | as in 0d1.0. */ | |
252b5132 RH |
243 | /* XXX: Do all of these really get used on the alpha?? */ |
244 | char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
252b5132 RH |
245 | |
246 | #ifdef OBJ_EVAX | |
247 | const char *md_shortopts = "Fm:g+1h:HG:"; | |
248 | #else | |
249 | const char *md_shortopts = "Fm:gG:"; | |
250 | #endif | |
251 | ||
11f45fb5 NC |
252 | struct option md_longopts[] = |
253 | { | |
252b5132 | 254 | #define OPTION_32ADDR (OPTION_MD_BASE) |
11f45fb5 | 255 | { "32addr", no_argument, NULL, OPTION_32ADDR }, |
66498417 | 256 | #define OPTION_RELAX (OPTION_32ADDR + 1) |
11f45fb5 | 257 | { "relax", no_argument, NULL, OPTION_RELAX }, |
252b5132 | 258 | #ifdef OBJ_ELF |
66498417 KH |
259 | #define OPTION_MDEBUG (OPTION_RELAX + 1) |
260 | #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1) | |
11f45fb5 NC |
261 | { "mdebug", no_argument, NULL, OPTION_MDEBUG }, |
262 | { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG }, | |
198f1251 TG |
263 | #endif |
264 | #ifdef OBJ_EVAX | |
265 | #define OPTION_REPLACE (OPTION_RELAX + 1) | |
266 | #define OPTION_NOREPLACE (OPTION_REPLACE+1) | |
267 | { "replace", no_argument, NULL, OPTION_REPLACE }, | |
3739860c | 268 | { "noreplace", no_argument, NULL, OPTION_NOREPLACE }, |
252b5132 | 269 | #endif |
11f45fb5 NC |
270 | { NULL, no_argument, NULL, 0 } |
271 | }; | |
252b5132 | 272 | |
bc805888 | 273 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
274 | \f |
275 | #ifdef OBJ_EVAX | |
276 | #define AXP_REG_R0 0 | |
277 | #define AXP_REG_R16 16 | |
278 | #define AXP_REG_R17 17 | |
279 | #undef AXP_REG_T9 | |
280 | #define AXP_REG_T9 22 | |
281 | #undef AXP_REG_T10 | |
282 | #define AXP_REG_T10 23 | |
283 | #undef AXP_REG_T11 | |
284 | #define AXP_REG_T11 24 | |
285 | #undef AXP_REG_T12 | |
286 | #define AXP_REG_T12 25 | |
287 | #define AXP_REG_AI 25 | |
288 | #undef AXP_REG_FP | |
289 | #define AXP_REG_FP 29 | |
290 | ||
291 | #undef AXP_REG_GP | |
292 | #define AXP_REG_GP AXP_REG_PV | |
198f1251 | 293 | |
252b5132 RH |
294 | #endif /* OBJ_EVAX */ |
295 | ||
11f45fb5 | 296 | /* The cpu for which we are generating code. */ |
252b5132 RH |
297 | static unsigned alpha_target = AXP_OPCODE_BASE; |
298 | static const char *alpha_target_name = "<all>"; | |
299 | ||
11f45fb5 | 300 | /* The hash table of instruction opcodes. */ |
252b5132 RH |
301 | static struct hash_control *alpha_opcode_hash; |
302 | ||
11f45fb5 | 303 | /* The hash table of macro opcodes. */ |
252b5132 RH |
304 | static struct hash_control *alpha_macro_hash; |
305 | ||
306 | #ifdef OBJ_ECOFF | |
11f45fb5 | 307 | /* The $gp relocation symbol. */ |
252b5132 RH |
308 | static symbolS *alpha_gp_symbol; |
309 | ||
310 | /* XXX: what is this, and why is it exported? */ | |
311 | valueT alpha_gp_value; | |
312 | #endif | |
313 | ||
11f45fb5 | 314 | /* The current $gp register. */ |
252b5132 RH |
315 | static int alpha_gp_register = AXP_REG_GP; |
316 | ||
11f45fb5 | 317 | /* A table of the register symbols. */ |
252b5132 RH |
318 | static symbolS *alpha_register_table[64]; |
319 | ||
11f45fb5 | 320 | /* Constant sections, or sections of constants. */ |
252b5132 RH |
321 | #ifdef OBJ_ECOFF |
322 | static segT alpha_lita_section; | |
252b5132 RH |
323 | #endif |
324 | #ifdef OBJ_EVAX | |
198f1251 | 325 | segT alpha_link_section; |
252b5132 | 326 | #endif |
198f1251 | 327 | #ifndef OBJ_EVAX |
252b5132 | 328 | static segT alpha_lit8_section; |
198f1251 | 329 | #endif |
252b5132 | 330 | |
1dab94dd | 331 | /* Symbols referring to said sections. */ |
252b5132 RH |
332 | #ifdef OBJ_ECOFF |
333 | static symbolS *alpha_lita_symbol; | |
252b5132 RH |
334 | #endif |
335 | #ifdef OBJ_EVAX | |
336 | static symbolS *alpha_link_symbol; | |
252b5132 | 337 | #endif |
198f1251 | 338 | #ifndef OBJ_EVAX |
252b5132 | 339 | static symbolS *alpha_lit8_symbol; |
198f1251 | 340 | #endif |
252b5132 | 341 | |
11f45fb5 | 342 | /* Literal for .litX+0x8000 within .lita. */ |
252b5132 | 343 | #ifdef OBJ_ECOFF |
252b5132 RH |
344 | static offsetT alpha_lit8_literal; |
345 | #endif | |
346 | ||
11f45fb5 | 347 | /* Is the assembler not allowed to use $at? */ |
252b5132 RH |
348 | static int alpha_noat_on = 0; |
349 | ||
11f45fb5 | 350 | /* Are macros enabled? */ |
252b5132 RH |
351 | static int alpha_macros_on = 1; |
352 | ||
11f45fb5 | 353 | /* Are floats disabled? */ |
252b5132 RH |
354 | static int alpha_nofloats_on = 0; |
355 | ||
11f45fb5 | 356 | /* Are addresses 32 bit? */ |
252b5132 RH |
357 | static int alpha_addr32_on = 0; |
358 | ||
359 | /* Symbol labelling the current insn. When the Alpha gas sees | |
360 | foo: | |
361 | .quad 0 | |
362 | and the section happens to not be on an eight byte boundary, it | |
363 | will align both the symbol and the .quad to an eight byte boundary. */ | |
364 | static symbolS *alpha_insn_label; | |
eb979bfb | 365 | #if defined(OBJ_ELF) || defined (OBJ_EVAX) |
198f1251 | 366 | static symbolS *alpha_prologue_label; |
d9319cec | 367 | #endif |
198f1251 TG |
368 | |
369 | #ifdef OBJ_EVAX | |
370 | /* Symbol associate with the current jsr instruction. */ | |
371 | static symbolS *alpha_linkage_symbol; | |
372 | #endif | |
252b5132 RH |
373 | |
374 | /* Whether we should automatically align data generation pseudo-ops. | |
375 | .align 0 will turn this off. */ | |
376 | static int alpha_auto_align_on = 1; | |
377 | ||
378 | /* The known current alignment of the current section. */ | |
379 | static int alpha_current_align; | |
380 | ||
381 | /* These are exported to ECOFF code. */ | |
382 | unsigned long alpha_gprmask, alpha_fprmask; | |
383 | ||
384 | /* Whether the debugging option was seen. */ | |
385 | static int alpha_debug; | |
386 | ||
387 | #ifdef OBJ_ELF | |
388 | /* Whether we are emitting an mdebug section. */ | |
a8316fe2 | 389 | int alpha_flag_mdebug = -1; |
252b5132 RH |
390 | #endif |
391 | ||
198f1251 TG |
392 | #ifdef OBJ_EVAX |
393 | /* Whether to perform the VMS procedure call optimization. */ | |
394 | int alpha_flag_replace = 1; | |
395 | #endif | |
396 | ||
252b5132 RH |
397 | /* Don't fully resolve relocations, allowing code movement in the linker. */ |
398 | static int alpha_flag_relax; | |
399 | ||
400 | /* What value to give to bfd_set_gp_size. */ | |
401 | static int g_switch_value = 8; | |
402 | ||
403 | #ifdef OBJ_EVAX | |
404 | /* Collect information about current procedure here. */ | |
198f1251 | 405 | struct alpha_evax_procs |
ea1562b3 NC |
406 | { |
407 | symbolS *symbol; /* Proc pdesc symbol. */ | |
252b5132 | 408 | int pdsckind; |
ea1562b3 NC |
409 | int framereg; /* Register for frame pointer. */ |
410 | int framesize; /* Size of frame. */ | |
252b5132 RH |
411 | int rsa_offset; |
412 | int ra_save; | |
413 | int fp_save; | |
414 | long imask; | |
415 | long fmask; | |
416 | int type; | |
417 | int prologue; | |
198f1251 TG |
418 | symbolS *handler; |
419 | int handler_data; | |
420 | }; | |
421 | ||
51794af8 | 422 | /* Linked list of .linkage fixups. */ |
198f1251 TG |
423 | struct alpha_linkage_fixups *alpha_linkage_fixup_root; |
424 | static struct alpha_linkage_fixups *alpha_linkage_fixup_tail; | |
425 | ||
51794af8 | 426 | /* Current procedure descriptor. */ |
198f1251 | 427 | static struct alpha_evax_procs *alpha_evax_proc; |
4b1c4d2b | 428 | static struct alpha_evax_procs alpha_evax_proc_data; |
252b5132 RH |
429 | |
430 | static int alpha_flag_hash_long_names = 0; /* -+ */ | |
431 | static int alpha_flag_show_after_trunc = 0; /* -H */ | |
432 | ||
433 | /* If the -+ switch is given, then a hash is appended to any name that is | |
11f45fb5 | 434 | longer than 64 characters, else longer symbol names are truncated. */ |
252b5132 | 435 | |
43b4c25e MM |
436 | #endif |
437 | \f | |
438 | #ifdef RELOC_OP_P | |
439 | /* A table to map the spelling of a relocation operand into an appropriate | |
440 | bfd_reloc_code_real_type type. The table is assumed to be ordered such | |
441 | that op-O_literal indexes into it. */ | |
442 | ||
443 | #define ALPHA_RELOC_TABLE(op) \ | |
19f78583 | 444 | (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \ |
43b4c25e | 445 | ? (abort (), 0) \ |
19f78583 | 446 | : (int) (op) - (int) O_literal) ]) |
43b4c25e | 447 | |
ec8fcf4a RH |
448 | #define DEF(NAME, RELOC, REQ, ALLOW) \ |
449 | { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW} | |
43b4c25e | 450 | |
11f45fb5 NC |
451 | static const struct alpha_reloc_op_tag |
452 | { | |
ea1562b3 NC |
453 | const char *name; /* String to lookup. */ |
454 | size_t length; /* Size of the string. */ | |
455 | operatorT op; /* Which operator to use. */ | |
21d799b5 | 456 | extended_bfd_reloc_code_real_type reloc; |
ea1562b3 NC |
457 | unsigned int require_seq : 1; /* Require a sequence number. */ |
458 | unsigned int allow_seq : 1; /* Allow a sequence number. */ | |
11f45fb5 NC |
459 | } |
460 | alpha_reloc_op[] = | |
461 | { | |
ea1562b3 NC |
462 | DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1), |
463 | DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1), | |
464 | DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1), | |
465 | DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1), | |
466 | DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1), | |
467 | DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1), | |
468 | DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1), | |
04fe8f58 | 469 | DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1), |
ea1562b3 NC |
470 | DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1), |
471 | DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0), | |
472 | DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0), | |
473 | DEF (gprel, BFD_RELOC_GPREL16, 0, 0), | |
474 | DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0), | |
475 | DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1), | |
476 | DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1), | |
477 | DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0), | |
478 | DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0), | |
479 | DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0), | |
480 | DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0), | |
481 | DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0), | |
482 | DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0), | |
483 | DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0), | |
484 | DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0), | |
43b4c25e MM |
485 | }; |
486 | ||
19f78583 RH |
487 | #undef DEF |
488 | ||
43b4c25e | 489 | static const int alpha_num_reloc_op |
bc805888 | 490 | = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); |
19f78583 | 491 | #endif /* RELOC_OP_P */ |
43b4c25e | 492 | |
ea1562b3 | 493 | /* Maximum # digits needed to hold the largest sequence #. */ |
43b4c25e MM |
494 | #define ALPHA_RELOC_DIGITS 25 |
495 | ||
2d2255b5 | 496 | /* Structure to hold explicit sequence information. */ |
19f78583 | 497 | struct alpha_reloc_tag |
43b4c25e | 498 | { |
ea1562b3 | 499 | fixS *master; /* The literal reloc. */ |
198f1251 | 500 | #ifdef OBJ_EVAX |
51794af8 TG |
501 | struct symbol *sym; /* Linkage section item symbol. */ |
502 | struct symbol *psym; /* Pdesc symbol. */ | |
198f1251 | 503 | #endif |
ea1562b3 NC |
504 | fixS *slaves; /* Head of linked list of lituses. */ |
505 | segT segment; /* Segment relocs are in or undefined_section. */ | |
506 | long sequence; /* Sequence #. */ | |
507 | unsigned n_master; /* # of literals. */ | |
508 | unsigned n_slaves; /* # of lituses. */ | |
509 | unsigned saw_tlsgd : 1; /* True if ... */ | |
3765b1be RH |
510 | unsigned saw_tlsldm : 1; |
511 | unsigned saw_lu_tlsgd : 1; | |
512 | unsigned saw_lu_tlsldm : 1; | |
ea1562b3 NC |
513 | unsigned multi_section_p : 1; /* True if more than one section was used. */ |
514 | char string[1]; /* Printable form of sequence to hash with. */ | |
43b4c25e MM |
515 | }; |
516 | ||
ea1562b3 | 517 | /* Hash table to link up literals with the appropriate lituse. */ |
43b4c25e | 518 | static struct hash_control *alpha_literal_hash; |
19f78583 RH |
519 | |
520 | /* Sequence numbers for internal use by macros. */ | |
521 | static long next_sequence_num = -1; | |
252b5132 RH |
522 | \f |
523 | /* A table of CPU names and opcode sets. */ | |
524 | ||
11f45fb5 NC |
525 | static const struct cpu_type |
526 | { | |
252b5132 RH |
527 | const char *name; |
528 | unsigned flags; | |
11f45fb5 NC |
529 | } |
530 | cpu_types[] = | |
531 | { | |
252b5132 | 532 | /* Ad hoc convention: cpu number gets palcode, process code doesn't. |
1dab94dd | 533 | This supports usage under DU 4.0b that does ".arch ev4", and |
252b5132 RH |
534 | usage in MILO that does -m21064. Probably something more |
535 | specific like -m21064-pal should be used, but oh well. */ | |
536 | ||
537 | { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
538 | { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
539 | { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
540 | { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
541 | { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 }, | |
542 | { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX }, | |
543 | { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX | |
544 | |AXP_OPCODE_MAX) }, | |
545 | { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
546 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
dbac4f5b RH |
547 | { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX |
548 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
549 | { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
550 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
252b5132 RH |
551 | |
552 | { "ev4", AXP_OPCODE_BASE }, | |
553 | { "ev45", AXP_OPCODE_BASE }, | |
554 | { "lca45", AXP_OPCODE_BASE }, | |
555 | { "ev5", AXP_OPCODE_BASE }, | |
556 | { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, | |
557 | { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, | |
558 | { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
dbac4f5b RH |
559 | { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, |
560 | { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
252b5132 RH |
561 | |
562 | { "all", AXP_OPCODE_BASE }, | |
446a06c9 | 563 | { 0, 0 } |
252b5132 RH |
564 | }; |
565 | ||
ea1562b3 NC |
566 | /* Some instruction sets indexed by lg(size). */ |
567 | static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL }; | |
568 | static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" }; | |
569 | static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" }; | |
570 | static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" }; | |
571 | static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" }; | |
572 | static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" }; | |
573 | static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" }; | |
574 | static const char * const stX_op[] = { "stb", "stw", "stl", "stq" }; | |
575 | static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL }; | |
252b5132 | 576 | |
21d799b5 | 577 | static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type); |
ea1562b3 NC |
578 | static void emit_insn (struct alpha_insn *); |
579 | static void assemble_tokens (const char *, const expressionS *, int, int); | |
198f1251 | 580 | #ifdef OBJ_EVAX |
6d4af3c2 | 581 | static const char *s_alpha_section_name (void); |
8aacb050 | 582 | static symbolS *add_to_link_pool (symbolS *, offsetT); |
198f1251 | 583 | #endif |
ea1562b3 NC |
584 | \f |
585 | static struct alpha_reloc_tag * | |
586 | get_alpha_reloc_tag (long sequence) | |
11f45fb5 | 587 | { |
ea1562b3 NC |
588 | char buffer[ALPHA_RELOC_DIGITS]; |
589 | struct alpha_reloc_tag *info; | |
252b5132 | 590 | |
ea1562b3 | 591 | sprintf (buffer, "!%ld", sequence); |
252b5132 | 592 | |
ea1562b3 NC |
593 | info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer); |
594 | if (! info) | |
595 | { | |
596 | size_t len = strlen (buffer); | |
597 | const char *errmsg; | |
252b5132 | 598 | |
21d799b5 NC |
599 | info = (struct alpha_reloc_tag *) |
600 | xcalloc (sizeof (struct alpha_reloc_tag) + len, 1); | |
252b5132 | 601 | |
ea1562b3 NC |
602 | info->segment = now_seg; |
603 | info->sequence = sequence; | |
604 | strcpy (info->string, buffer); | |
605 | errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info); | |
606 | if (errmsg) | |
20203fb9 | 607 | as_fatal ("%s", errmsg); |
198f1251 TG |
608 | #ifdef OBJ_EVAX |
609 | info->sym = 0; | |
610 | info->psym = 0; | |
611 | #endif | |
ea1562b3 | 612 | } |
252b5132 | 613 | |
ea1562b3 NC |
614 | return info; |
615 | } | |
252b5132 | 616 | |
198f1251 TG |
617 | #ifndef OBJ_EVAX |
618 | ||
ea1562b3 NC |
619 | static void |
620 | alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED, | |
621 | asection *sec, | |
622 | void * ptr ATTRIBUTE_UNUSED) | |
623 | { | |
624 | segment_info_type *seginfo = seg_info (sec); | |
625 | fixS **prevP; | |
626 | fixS *fixp; | |
627 | fixS *next; | |
628 | fixS *slave; | |
252b5132 | 629 | |
ea1562b3 NC |
630 | /* If seginfo is NULL, we did not create this section; don't do |
631 | anything with it. By using a pointer to a pointer, we can update | |
632 | the links in place. */ | |
633 | if (seginfo == NULL) | |
634 | return; | |
252b5132 | 635 | |
ea1562b3 NC |
636 | /* If there are no relocations, skip the section. */ |
637 | if (! seginfo->fix_root) | |
638 | return; | |
252b5132 | 639 | |
ea1562b3 NC |
640 | /* First rebuild the fixup chain without the explicit lituse and |
641 | gpdisp_lo16 relocs. */ | |
642 | prevP = &seginfo->fix_root; | |
643 | for (fixp = seginfo->fix_root; fixp; fixp = next) | |
644 | { | |
645 | next = fixp->fx_next; | |
646 | fixp->fx_next = (fixS *) 0; | |
252b5132 | 647 | |
ea1562b3 NC |
648 | switch (fixp->fx_r_type) |
649 | { | |
650 | case BFD_RELOC_ALPHA_LITUSE: | |
651 | if (fixp->tc_fix_data.info->n_master == 0) | |
652 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
653 | _("No !literal!%ld was found"), | |
654 | fixp->tc_fix_data.info->sequence); | |
655 | #ifdef RELOC_OP_P | |
656 | if (fixp->fx_offset == LITUSE_ALPHA_TLSGD) | |
657 | { | |
658 | if (! fixp->tc_fix_data.info->saw_tlsgd) | |
659 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
660 | _("No !tlsgd!%ld was found"), | |
661 | fixp->tc_fix_data.info->sequence); | |
662 | } | |
663 | else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM) | |
664 | { | |
665 | if (! fixp->tc_fix_data.info->saw_tlsldm) | |
666 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
667 | _("No !tlsldm!%ld was found"), | |
668 | fixp->tc_fix_data.info->sequence); | |
669 | } | |
670 | #endif | |
671 | break; | |
252b5132 | 672 | |
ea1562b3 NC |
673 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
674 | if (fixp->tc_fix_data.info->n_master == 0) | |
675 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
676 | _("No ldah !gpdisp!%ld was found"), | |
677 | fixp->tc_fix_data.info->sequence); | |
678 | break; | |
252b5132 | 679 | |
ea1562b3 NC |
680 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
681 | if (fixp->tc_fix_data.info | |
682 | && (fixp->tc_fix_data.info->saw_tlsgd | |
683 | || fixp->tc_fix_data.info->saw_tlsldm)) | |
684 | break; | |
685 | /* FALLTHRU */ | |
252b5132 | 686 | |
ea1562b3 NC |
687 | default: |
688 | *prevP = fixp; | |
689 | prevP = &fixp->fx_next; | |
690 | break; | |
252b5132 | 691 | } |
252b5132 RH |
692 | } |
693 | ||
ea1562b3 NC |
694 | /* Go back and re-chain dependent relocations. They are currently |
695 | linked through the next_reloc field in reverse order, so as we | |
696 | go through the next_reloc chain, we effectively reverse the chain | |
697 | once again. | |
252b5132 | 698 | |
ea1562b3 NC |
699 | Except if there is more than one !literal for a given sequence |
700 | number. In that case, the programmer and/or compiler is not sure | |
701 | how control flows from literal to lituse, and we can't be sure to | |
702 | get the relaxation correct. | |
252b5132 | 703 | |
ea1562b3 NC |
704 | ??? Well, actually we could, if there are enough lituses such that |
705 | we can make each literal have at least one of each lituse type | |
706 | present. Not implemented. | |
252b5132 | 707 | |
ea1562b3 NC |
708 | Also suppress the optimization if the !literals/!lituses are spread |
709 | in different segments. This can happen with "intersting" uses of | |
710 | inline assembly; examples are present in the Linux kernel semaphores. */ | |
11f45fb5 | 711 | |
ea1562b3 | 712 | for (fixp = seginfo->fix_root; fixp; fixp = next) |
252b5132 | 713 | { |
ea1562b3 NC |
714 | next = fixp->fx_next; |
715 | switch (fixp->fx_r_type) | |
716 | { | |
717 | case BFD_RELOC_ALPHA_TLSGD: | |
718 | case BFD_RELOC_ALPHA_TLSLDM: | |
719 | if (!fixp->tc_fix_data.info) | |
720 | break; | |
721 | if (fixp->tc_fix_data.info->n_master == 0) | |
722 | break; | |
723 | else if (fixp->tc_fix_data.info->n_master > 1) | |
724 | { | |
725 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
726 | _("too many !literal!%ld for %s"), | |
727 | fixp->tc_fix_data.info->sequence, | |
728 | (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD | |
729 | ? "!tlsgd" : "!tlsldm")); | |
730 | break; | |
731 | } | |
252b5132 | 732 | |
ea1562b3 NC |
733 | fixp->tc_fix_data.info->master->fx_next = fixp->fx_next; |
734 | fixp->fx_next = fixp->tc_fix_data.info->master; | |
735 | fixp = fixp->fx_next; | |
736 | /* Fall through. */ | |
252b5132 | 737 | |
ea1562b3 NC |
738 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
739 | if (fixp->tc_fix_data.info | |
740 | && fixp->tc_fix_data.info->n_master == 1 | |
741 | && ! fixp->tc_fix_data.info->multi_section_p) | |
742 | { | |
743 | for (slave = fixp->tc_fix_data.info->slaves; | |
744 | slave != (fixS *) 0; | |
745 | slave = slave->tc_fix_data.next_reloc) | |
746 | { | |
747 | slave->fx_next = fixp->fx_next; | |
748 | fixp->fx_next = slave; | |
749 | } | |
750 | } | |
751 | break; | |
252b5132 | 752 | |
ea1562b3 NC |
753 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
754 | if (fixp->tc_fix_data.info->n_slaves == 0) | |
755 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
756 | _("No lda !gpdisp!%ld was found"), | |
757 | fixp->tc_fix_data.info->sequence); | |
758 | else | |
759 | { | |
760 | slave = fixp->tc_fix_data.info->slaves; | |
761 | slave->fx_next = next; | |
762 | fixp->fx_next = slave; | |
763 | } | |
764 | break; | |
252b5132 | 765 | |
ea1562b3 NC |
766 | default: |
767 | break; | |
768 | } | |
252b5132 | 769 | } |
252b5132 RH |
770 | } |
771 | ||
ea1562b3 NC |
772 | /* Before the relocations are written, reorder them, so that user |
773 | supplied !lituse relocations follow the appropriate !literal | |
774 | relocations, and similarly for !gpdisp relocations. */ | |
252b5132 RH |
775 | |
776 | void | |
ea1562b3 | 777 | alpha_before_fix (void) |
252b5132 | 778 | { |
ea1562b3 NC |
779 | if (alpha_literal_hash) |
780 | bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL); | |
252b5132 | 781 | } |
198f1251 TG |
782 | |
783 | #endif | |
ea1562b3 NC |
784 | \f |
785 | #ifdef DEBUG_ALPHA | |
786 | static void | |
787 | debug_exp (expressionS tok[], int ntok) | |
252b5132 | 788 | { |
ea1562b3 | 789 | int i; |
252b5132 | 790 | |
ea1562b3 NC |
791 | fprintf (stderr, "debug_exp: %d tokens", ntok); |
792 | for (i = 0; i < ntok; i++) | |
252b5132 | 793 | { |
ea1562b3 NC |
794 | expressionS *t = &tok[i]; |
795 | const char *name; | |
252b5132 | 796 | |
ea1562b3 NC |
797 | switch (t->X_op) |
798 | { | |
799 | default: name = "unknown"; break; | |
800 | case O_illegal: name = "O_illegal"; break; | |
801 | case O_absent: name = "O_absent"; break; | |
802 | case O_constant: name = "O_constant"; break; | |
803 | case O_symbol: name = "O_symbol"; break; | |
804 | case O_symbol_rva: name = "O_symbol_rva"; break; | |
805 | case O_register: name = "O_register"; break; | |
806 | case O_big: name = "O_big"; break; | |
807 | case O_uminus: name = "O_uminus"; break; | |
808 | case O_bit_not: name = "O_bit_not"; break; | |
809 | case O_logical_not: name = "O_logical_not"; break; | |
810 | case O_multiply: name = "O_multiply"; break; | |
811 | case O_divide: name = "O_divide"; break; | |
812 | case O_modulus: name = "O_modulus"; break; | |
813 | case O_left_shift: name = "O_left_shift"; break; | |
814 | case O_right_shift: name = "O_right_shift"; break; | |
815 | case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break; | |
816 | case O_bit_or_not: name = "O_bit_or_not"; break; | |
817 | case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break; | |
818 | case O_bit_and: name = "O_bit_and"; break; | |
819 | case O_add: name = "O_add"; break; | |
820 | case O_subtract: name = "O_subtract"; break; | |
821 | case O_eq: name = "O_eq"; break; | |
822 | case O_ne: name = "O_ne"; break; | |
823 | case O_lt: name = "O_lt"; break; | |
824 | case O_le: name = "O_le"; break; | |
825 | case O_ge: name = "O_ge"; break; | |
826 | case O_gt: name = "O_gt"; break; | |
827 | case O_logical_and: name = "O_logical_and"; break; | |
828 | case O_logical_or: name = "O_logical_or"; break; | |
829 | case O_index: name = "O_index"; break; | |
830 | case O_pregister: name = "O_pregister"; break; | |
831 | case O_cpregister: name = "O_cpregister"; break; | |
832 | case O_literal: name = "O_literal"; break; | |
833 | case O_lituse_addr: name = "O_lituse_addr"; break; | |
834 | case O_lituse_base: name = "O_lituse_base"; break; | |
835 | case O_lituse_bytoff: name = "O_lituse_bytoff"; break; | |
836 | case O_lituse_jsr: name = "O_lituse_jsr"; break; | |
837 | case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break; | |
838 | case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break; | |
04fe8f58 | 839 | case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break; |
ea1562b3 NC |
840 | case O_gpdisp: name = "O_gpdisp"; break; |
841 | case O_gprelhigh: name = "O_gprelhigh"; break; | |
842 | case O_gprellow: name = "O_gprellow"; break; | |
843 | case O_gprel: name = "O_gprel"; break; | |
844 | case O_samegp: name = "O_samegp"; break; | |
845 | case O_tlsgd: name = "O_tlsgd"; break; | |
846 | case O_tlsldm: name = "O_tlsldm"; break; | |
847 | case O_gotdtprel: name = "O_gotdtprel"; break; | |
848 | case O_dtprelhi: name = "O_dtprelhi"; break; | |
849 | case O_dtprello: name = "O_dtprello"; break; | |
850 | case O_dtprel: name = "O_dtprel"; break; | |
851 | case O_gottprel: name = "O_gottprel"; break; | |
852 | case O_tprelhi: name = "O_tprelhi"; break; | |
853 | case O_tprello: name = "O_tprello"; break; | |
854 | case O_tprel: name = "O_tprel"; break; | |
855 | } | |
252b5132 | 856 | |
ea1562b3 NC |
857 | fprintf (stderr, ", %s(%s, %s, %d)", name, |
858 | (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--", | |
859 | (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--", | |
860 | (int) t->X_add_number); | |
252b5132 | 861 | } |
ea1562b3 NC |
862 | fprintf (stderr, "\n"); |
863 | fflush (stderr); | |
252b5132 | 864 | } |
ea1562b3 | 865 | #endif |
252b5132 | 866 | |
ea1562b3 | 867 | /* Parse the arguments to an opcode. */ |
252b5132 | 868 | |
ea1562b3 NC |
869 | static int |
870 | tokenize_arguments (char *str, | |
871 | expressionS tok[], | |
872 | int ntok) | |
252b5132 | 873 | { |
ea1562b3 NC |
874 | expressionS *end_tok = tok + ntok; |
875 | char *old_input_line_pointer; | |
876 | int saw_comma = 0, saw_arg = 0; | |
877 | #ifdef DEBUG_ALPHA | |
878 | expressionS *orig_tok = tok; | |
879 | #endif | |
880 | #ifdef RELOC_OP_P | |
881 | char *p; | |
882 | const struct alpha_reloc_op_tag *r; | |
883 | int c, i; | |
884 | size_t len; | |
885 | int reloc_found_p = 0; | |
886 | #endif | |
252b5132 | 887 | |
ea1562b3 | 888 | memset (tok, 0, sizeof (*tok) * ntok); |
252b5132 | 889 | |
ea1562b3 NC |
890 | /* Save and restore input_line_pointer around this function. */ |
891 | old_input_line_pointer = input_line_pointer; | |
892 | input_line_pointer = str; | |
252b5132 | 893 | |
ea1562b3 NC |
894 | #ifdef RELOC_OP_P |
895 | /* ??? Wrest control of ! away from the regular expression parser. */ | |
896 | is_end_of_line[(unsigned char) '!'] = 1; | |
897 | #endif | |
252b5132 | 898 | |
ea1562b3 NC |
899 | while (tok < end_tok && *input_line_pointer) |
900 | { | |
901 | SKIP_WHITESPACE (); | |
902 | switch (*input_line_pointer) | |
903 | { | |
904 | case '\0': | |
905 | goto fini; | |
906 | ||
907 | #ifdef RELOC_OP_P | |
908 | case '!': | |
909 | /* A relocation operand can be placed after the normal operand on an | |
910 | assembly language statement, and has the following form: | |
911 | !relocation_type!sequence_number. */ | |
912 | if (reloc_found_p) | |
252b5132 | 913 | { |
ea1562b3 NC |
914 | /* Only support one relocation op per insn. */ |
915 | as_bad (_("More than one relocation op per insn")); | |
916 | goto err_report; | |
252b5132 | 917 | } |
252b5132 | 918 | |
ea1562b3 NC |
919 | if (!saw_arg) |
920 | goto err; | |
252b5132 | 921 | |
ea1562b3 NC |
922 | ++input_line_pointer; |
923 | SKIP_WHITESPACE (); | |
d02603dc | 924 | c = get_symbol_name (&p); |
252b5132 | 925 | |
ea1562b3 NC |
926 | /* Parse !relocation_type. */ |
927 | len = input_line_pointer - p; | |
928 | if (len == 0) | |
929 | { | |
930 | as_bad (_("No relocation operand")); | |
931 | goto err_report; | |
932 | } | |
252b5132 | 933 | |
ea1562b3 NC |
934 | r = &alpha_reloc_op[0]; |
935 | for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++) | |
936 | if (len == r->length && memcmp (p, r->name, len) == 0) | |
937 | break; | |
938 | if (i < 0) | |
939 | { | |
940 | as_bad (_("Unknown relocation operand: !%s"), p); | |
941 | goto err_report; | |
942 | } | |
252b5132 | 943 | |
ea1562b3 | 944 | *input_line_pointer = c; |
d02603dc | 945 | SKIP_WHITESPACE_AFTER_NAME (); |
ea1562b3 NC |
946 | if (*input_line_pointer != '!') |
947 | { | |
948 | if (r->require_seq) | |
949 | { | |
950 | as_bad (_("no sequence number after !%s"), p); | |
951 | goto err_report; | |
952 | } | |
252b5132 | 953 | |
ea1562b3 NC |
954 | tok->X_add_number = 0; |
955 | } | |
956 | else | |
957 | { | |
958 | if (! r->allow_seq) | |
959 | { | |
960 | as_bad (_("!%s does not use a sequence number"), p); | |
961 | goto err_report; | |
962 | } | |
252b5132 | 963 | |
ea1562b3 | 964 | input_line_pointer++; |
252b5132 | 965 | |
ea1562b3 NC |
966 | /* Parse !sequence_number. */ |
967 | expression (tok); | |
968 | if (tok->X_op != O_constant || tok->X_add_number <= 0) | |
969 | { | |
970 | as_bad (_("Bad sequence number: !%s!%s"), | |
971 | r->name, input_line_pointer); | |
972 | goto err_report; | |
973 | } | |
974 | } | |
252b5132 | 975 | |
ea1562b3 NC |
976 | tok->X_op = r->op; |
977 | reloc_found_p = 1; | |
978 | ++tok; | |
979 | break; | |
980 | #endif /* RELOC_OP_P */ | |
252b5132 | 981 | |
ea1562b3 NC |
982 | case ',': |
983 | ++input_line_pointer; | |
984 | if (saw_comma || !saw_arg) | |
985 | goto err; | |
986 | saw_comma = 1; | |
987 | break; | |
252b5132 | 988 | |
ea1562b3 NC |
989 | case '(': |
990 | { | |
991 | char *hold = input_line_pointer++; | |
252b5132 | 992 | |
ea1562b3 NC |
993 | /* First try for parenthesized register ... */ |
994 | expression (tok); | |
995 | if (*input_line_pointer == ')' && tok->X_op == O_register) | |
996 | { | |
997 | tok->X_op = (saw_comma ? O_cpregister : O_pregister); | |
998 | saw_comma = 0; | |
999 | saw_arg = 1; | |
1000 | ++input_line_pointer; | |
1001 | ++tok; | |
1002 | break; | |
1003 | } | |
252b5132 | 1004 | |
ea1562b3 NC |
1005 | /* ... then fall through to plain expression. */ |
1006 | input_line_pointer = hold; | |
1007 | } | |
252b5132 | 1008 | |
ea1562b3 NC |
1009 | default: |
1010 | if (saw_arg && !saw_comma) | |
1011 | goto err; | |
252b5132 | 1012 | |
ea1562b3 NC |
1013 | expression (tok); |
1014 | if (tok->X_op == O_illegal || tok->X_op == O_absent) | |
1015 | goto err; | |
252b5132 | 1016 | |
ea1562b3 NC |
1017 | saw_comma = 0; |
1018 | saw_arg = 1; | |
1019 | ++tok; | |
1020 | break; | |
1021 | } | |
1022 | } | |
252b5132 | 1023 | |
ea1562b3 NC |
1024 | fini: |
1025 | if (saw_comma) | |
1026 | goto err; | |
1027 | input_line_pointer = old_input_line_pointer; | |
252b5132 | 1028 | |
ea1562b3 NC |
1029 | #ifdef DEBUG_ALPHA |
1030 | debug_exp (orig_tok, ntok - (end_tok - tok)); | |
252b5132 | 1031 | #endif |
ea1562b3 NC |
1032 | #ifdef RELOC_OP_P |
1033 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1034 | #endif |
252b5132 | 1035 | |
ea1562b3 | 1036 | return ntok - (end_tok - tok); |
00f7efb6 | 1037 | |
ea1562b3 NC |
1038 | err: |
1039 | #ifdef RELOC_OP_P | |
1040 | is_end_of_line[(unsigned char) '!'] = 0; | |
543833df | 1041 | #endif |
ea1562b3 NC |
1042 | input_line_pointer = old_input_line_pointer; |
1043 | return TOKENIZE_ERROR; | |
543833df | 1044 | |
ea1562b3 NC |
1045 | #ifdef RELOC_OP_P |
1046 | err_report: | |
1047 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1048 | #endif |
ea1562b3 NC |
1049 | input_line_pointer = old_input_line_pointer; |
1050 | return TOKENIZE_ERROR_REPORT; | |
1051 | } | |
252b5132 | 1052 | |
ea1562b3 NC |
1053 | /* Search forward through all variants of an opcode looking for a |
1054 | syntax match. */ | |
252b5132 | 1055 | |
ea1562b3 NC |
1056 | static const struct alpha_opcode * |
1057 | find_opcode_match (const struct alpha_opcode *first_opcode, | |
1058 | const expressionS *tok, | |
1059 | int *pntok, | |
1060 | int *pcpumatch) | |
1061 | { | |
1062 | const struct alpha_opcode *opcode = first_opcode; | |
1063 | int ntok = *pntok; | |
1064 | int got_cpu_match = 0; | |
252b5132 | 1065 | |
ea1562b3 | 1066 | do |
252b5132 | 1067 | { |
ea1562b3 NC |
1068 | const unsigned char *opidx; |
1069 | int tokidx = 0; | |
252b5132 | 1070 | |
ea1562b3 NC |
1071 | /* Don't match opcodes that don't exist on this architecture. */ |
1072 | if (!(opcode->flags & alpha_target)) | |
1073 | goto match_failed; | |
252b5132 | 1074 | |
ea1562b3 | 1075 | got_cpu_match = 1; |
252b5132 | 1076 | |
ea1562b3 | 1077 | for (opidx = opcode->operands; *opidx; ++opidx) |
252b5132 | 1078 | { |
ea1562b3 | 1079 | const struct alpha_operand *operand = &alpha_operands[*opidx]; |
252b5132 | 1080 | |
ea1562b3 NC |
1081 | /* Only take input from real operands. */ |
1082 | if (operand->flags & AXP_OPERAND_FAKE) | |
1083 | continue; | |
252b5132 | 1084 | |
ea1562b3 NC |
1085 | /* When we expect input, make sure we have it. */ |
1086 | if (tokidx >= ntok) | |
252b5132 | 1087 | { |
ea1562b3 NC |
1088 | if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0) |
1089 | goto match_failed; | |
1090 | continue; | |
252b5132 | 1091 | } |
252b5132 | 1092 | |
ea1562b3 NC |
1093 | /* Match operand type with expression type. */ |
1094 | switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK) | |
252b5132 | 1095 | { |
ea1562b3 NC |
1096 | case AXP_OPERAND_IR: |
1097 | if (tok[tokidx].X_op != O_register | |
1098 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1099 | goto match_failed; | |
1100 | break; | |
1101 | case AXP_OPERAND_FPR: | |
1102 | if (tok[tokidx].X_op != O_register | |
1103 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
1104 | goto match_failed; | |
1105 | break; | |
1106 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS: | |
1107 | if (tok[tokidx].X_op != O_pregister | |
1108 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1109 | goto match_failed; | |
1110 | break; | |
1111 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA: | |
1112 | if (tok[tokidx].X_op != O_cpregister | |
1113 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1114 | goto match_failed; | |
1115 | break; | |
252b5132 | 1116 | |
ea1562b3 NC |
1117 | case AXP_OPERAND_RELATIVE: |
1118 | case AXP_OPERAND_SIGNED: | |
1119 | case AXP_OPERAND_UNSIGNED: | |
1120 | switch (tok[tokidx].X_op) | |
1121 | { | |
1122 | case O_illegal: | |
1123 | case O_absent: | |
1124 | case O_register: | |
1125 | case O_pregister: | |
1126 | case O_cpregister: | |
1127 | goto match_failed; | |
252b5132 | 1128 | |
ea1562b3 NC |
1129 | default: |
1130 | break; | |
1131 | } | |
1132 | break; | |
1133 | ||
1134 | default: | |
1135 | /* Everything else should have been fake. */ | |
1136 | abort (); | |
1137 | } | |
1138 | ++tokidx; | |
252b5132 | 1139 | } |
ea1562b3 NC |
1140 | |
1141 | /* Possible match -- did we use all of our input? */ | |
1142 | if (tokidx == ntok) | |
1143 | { | |
1144 | *pntok = ntok; | |
1145 | return opcode; | |
1146 | } | |
1147 | ||
1148 | match_failed:; | |
252b5132 | 1149 | } |
ea1562b3 NC |
1150 | while (++opcode - alpha_opcodes < (int) alpha_num_opcodes |
1151 | && !strcmp (opcode->name, first_opcode->name)); | |
252b5132 | 1152 | |
ea1562b3 NC |
1153 | if (*pcpumatch) |
1154 | *pcpumatch = got_cpu_match; | |
252b5132 | 1155 | |
ea1562b3 | 1156 | return NULL; |
252b5132 | 1157 | } |
252b5132 | 1158 | |
ea1562b3 NC |
1159 | /* Given an opcode name and a pre-tokenized set of arguments, assemble |
1160 | the insn, but do not emit it. | |
252b5132 | 1161 | |
ea1562b3 NC |
1162 | Note that this implies no macros allowed, since we can't store more |
1163 | than one insn in an insn structure. */ | |
1164 | ||
1165 | static void | |
1166 | assemble_tokens_to_insn (const char *opname, | |
1167 | const expressionS *tok, | |
1168 | int ntok, | |
1169 | struct alpha_insn *insn) | |
252b5132 | 1170 | { |
ea1562b3 NC |
1171 | const struct alpha_opcode *opcode; |
1172 | ||
1173 | /* Search opcodes. */ | |
1174 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
1175 | if (opcode) | |
1176 | { | |
1177 | int cpumatch; | |
1178 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
1179 | if (opcode) | |
1180 | { | |
1181 | assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED); | |
1182 | return; | |
1183 | } | |
1184 | else if (cpumatch) | |
1185 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
1186 | else | |
1187 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
1188 | alpha_target_name); | |
1189 | } | |
1190 | else | |
1191 | as_bad (_("unknown opcode `%s'"), opname); | |
252b5132 RH |
1192 | } |
1193 | ||
ea1562b3 NC |
1194 | /* Build a BFD section with its flags set appropriately for the .lita, |
1195 | .lit8, or .lit4 sections. */ | |
252b5132 | 1196 | |
ea1562b3 NC |
1197 | static void |
1198 | create_literal_section (const char *name, | |
1199 | segT *secp, | |
1200 | symbolS **symp) | |
252b5132 | 1201 | { |
ea1562b3 NC |
1202 | segT current_section = now_seg; |
1203 | int current_subsec = now_subseg; | |
1204 | segT new_sec; | |
252b5132 | 1205 | |
ea1562b3 NC |
1206 | *secp = new_sec = subseg_new (name, 0); |
1207 | subseg_set (current_section, current_subsec); | |
1208 | bfd_set_section_alignment (stdoutput, new_sec, 4); | |
1209 | bfd_set_section_flags (stdoutput, new_sec, | |
1210 | SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY | |
1211 | | SEC_DATA); | |
a161fe53 | 1212 | |
ea1562b3 | 1213 | S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec)); |
252b5132 RH |
1214 | } |
1215 | ||
ea1562b3 | 1216 | /* Load a (partial) expression into a target register. |
252b5132 | 1217 | |
ea1562b3 NC |
1218 | If poffset is not null, after the call it will either contain |
1219 | O_constant 0, or a 16-bit offset appropriate for any MEM format | |
1220 | instruction. In addition, pbasereg will be modified to point to | |
1221 | the base register to use in that MEM format instruction. | |
252b5132 | 1222 | |
ea1562b3 NC |
1223 | In any case, *pbasereg should contain a base register to add to the |
1224 | expression. This will normally be either AXP_REG_ZERO or | |
1225 | alpha_gp_register. Symbol addresses will always be loaded via $gp, | |
1226 | so "foo($0)" is interpreted as adding the address of foo to $0; | |
1227 | i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps, | |
1228 | but this is what OSF/1 does. | |
252b5132 | 1229 | |
ea1562b3 NC |
1230 | If explicit relocations of the form !literal!<number> are allowed, |
1231 | and used, then explicit_reloc with be an expression pointer. | |
252b5132 | 1232 | |
ea1562b3 NC |
1233 | Finally, the return value is nonzero if the calling macro may emit |
1234 | a LITUSE reloc if otherwise appropriate; the return value is the | |
1235 | sequence number to use. */ | |
252b5132 | 1236 | |
ea1562b3 NC |
1237 | static long |
1238 | load_expression (int targreg, | |
1239 | const expressionS *exp, | |
1240 | int *pbasereg, | |
198f1251 TG |
1241 | expressionS *poffset, |
1242 | const char *opname) | |
ea1562b3 NC |
1243 | { |
1244 | long emit_lituse = 0; | |
1245 | offsetT addend = exp->X_add_number; | |
1246 | int basereg = *pbasereg; | |
1247 | struct alpha_insn insn; | |
1248 | expressionS newtok[3]; | |
3765b1be | 1249 | |
ea1562b3 NC |
1250 | switch (exp->X_op) |
1251 | { | |
1252 | case O_symbol: | |
66ba4c77 | 1253 | { |
ea1562b3 NC |
1254 | #ifdef OBJ_ECOFF |
1255 | offsetT lit; | |
66ba4c77 | 1256 | |
ea1562b3 NC |
1257 | /* Attempt to reduce .lit load by splitting the offset from |
1258 | its symbol when possible, but don't create a situation in | |
1259 | which we'd fail. */ | |
1260 | if (!range_signed_32 (addend) && | |
1261 | (alpha_noat_on || targreg == AXP_REG_AT)) | |
66ba4c77 | 1262 | { |
ea1562b3 NC |
1263 | lit = add_to_literal_pool (exp->X_add_symbol, addend, |
1264 | alpha_lita_section, 8); | |
1265 | addend = 0; | |
66ba4c77 | 1266 | } |
ea1562b3 NC |
1267 | else |
1268 | lit = add_to_literal_pool (exp->X_add_symbol, 0, | |
1269 | alpha_lita_section, 8); | |
252b5132 | 1270 | |
ea1562b3 NC |
1271 | if (lit >= 0x8000) |
1272 | as_fatal (_("overflow in literal (.lita) table")); | |
252b5132 | 1273 | |
ea1562b3 | 1274 | /* Emit "ldq r, lit(gp)". */ |
252b5132 | 1275 | |
ea1562b3 NC |
1276 | if (basereg != alpha_gp_register && targreg == basereg) |
1277 | { | |
1278 | if (alpha_noat_on) | |
1279 | as_bad (_("macro requires $at register while noat in effect")); | |
1280 | if (targreg == AXP_REG_AT) | |
1281 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1282 | |
ea1562b3 NC |
1283 | set_tok_reg (newtok[0], AXP_REG_AT); |
1284 | } | |
1285 | else | |
1286 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1287 | |
ea1562b3 NC |
1288 | set_tok_sym (newtok[1], alpha_lita_symbol, lit); |
1289 | set_tok_preg (newtok[2], alpha_gp_register); | |
252b5132 | 1290 | |
ea1562b3 | 1291 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1292 | |
9c2799c2 | 1293 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1294 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; |
1295 | insn.sequence = emit_lituse = next_sequence_num--; | |
1296 | #endif /* OBJ_ECOFF */ | |
252b5132 | 1297 | #ifdef OBJ_ELF |
ea1562b3 | 1298 | /* Emit "ldq r, gotoff(gp)". */ |
252b5132 | 1299 | |
ea1562b3 NC |
1300 | if (basereg != alpha_gp_register && targreg == basereg) |
1301 | { | |
1302 | if (alpha_noat_on) | |
1303 | as_bad (_("macro requires $at register while noat in effect")); | |
1304 | if (targreg == AXP_REG_AT) | |
1305 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1306 | |
ea1562b3 NC |
1307 | set_tok_reg (newtok[0], AXP_REG_AT); |
1308 | } | |
1309 | else | |
1310 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1311 | |
ea1562b3 NC |
1312 | /* XXX: Disable this .got minimizing optimization so that we can get |
1313 | better instruction offset knowledge in the compiler. This happens | |
1314 | very infrequently anyway. */ | |
1315 | if (1 | |
1316 | || (!range_signed_32 (addend) | |
1317 | && (alpha_noat_on || targreg == AXP_REG_AT))) | |
1318 | { | |
1319 | newtok[1] = *exp; | |
1320 | addend = 0; | |
1321 | } | |
1322 | else | |
1323 | set_tok_sym (newtok[1], exp->X_add_symbol, 0); | |
252b5132 | 1324 | |
ea1562b3 | 1325 | set_tok_preg (newtok[2], alpha_gp_register); |
252b5132 | 1326 | |
ea1562b3 | 1327 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1328 | |
9c2799c2 | 1329 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1330 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; |
1331 | insn.sequence = emit_lituse = next_sequence_num--; | |
1332 | #endif /* OBJ_ELF */ | |
1333 | #ifdef OBJ_EVAX | |
ea1562b3 | 1334 | /* Find symbol or symbol pointer in link section. */ |
252b5132 | 1335 | |
198f1251 | 1336 | if (exp->X_add_symbol == alpha_evax_proc->symbol) |
ea1562b3 | 1337 | { |
51794af8 TG |
1338 | /* Linkage-relative expression. */ |
1339 | set_tok_reg (newtok[0], targreg); | |
1340 | ||
ea1562b3 NC |
1341 | if (range_signed_16 (addend)) |
1342 | { | |
ea1562b3 | 1343 | set_tok_const (newtok[1], addend); |
ea1562b3 NC |
1344 | addend = 0; |
1345 | } | |
1346 | else | |
1347 | { | |
ea1562b3 | 1348 | set_tok_const (newtok[1], 0); |
ea1562b3 | 1349 | } |
51794af8 TG |
1350 | set_tok_preg (newtok[2], basereg); |
1351 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); | |
ea1562b3 NC |
1352 | } |
1353 | else | |
1354 | { | |
198f1251 TG |
1355 | const char *symname = S_GET_NAME (exp->X_add_symbol); |
1356 | const char *ptr1, *ptr2; | |
1357 | int symlen = strlen (symname); | |
1358 | ||
1359 | if ((symlen > 4 && | |
1360 | strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0)) | |
ea1562b3 | 1361 | { |
51794af8 TG |
1362 | /* Access to an item whose address is stored in the linkage |
1363 | section. Just read the address. */ | |
198f1251 TG |
1364 | set_tok_reg (newtok[0], targreg); |
1365 | ||
1366 | newtok[1] = *exp; | |
1367 | newtok[1].X_op = O_subtract; | |
1368 | newtok[1].X_op_symbol = alpha_evax_proc->symbol; | |
1369 | ||
1370 | set_tok_preg (newtok[2], basereg); | |
1371 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1372 | alpha_linkage_symbol = exp->X_add_symbol; | |
1373 | ||
1374 | if (poffset) | |
1375 | set_tok_const (*poffset, 0); | |
1376 | ||
1377 | if (alpha_flag_replace && targreg == 26) | |
1378 | { | |
51794af8 | 1379 | /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */ |
198f1251 TG |
1380 | char *ensymname; |
1381 | symbolS *ensym; | |
198f1251 | 1382 | |
51794af8 | 1383 | /* Build the entry name as 'NAME..en'. */ |
198f1251 TG |
1384 | ptr1 = strstr (symname, "..") + 2; |
1385 | if (ptr1 > ptr2) | |
1386 | ptr1 = symname; | |
39a0d071 | 1387 | ensymname = (char *) xmalloc (ptr2 - ptr1 + 5); |
198f1251 TG |
1388 | memcpy (ensymname, ptr1, ptr2 - ptr1); |
1389 | memcpy (ensymname + (ptr2 - ptr1), "..en", 5); | |
1390 | ||
9c2799c2 | 1391 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1392 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP; |
1393 | ensym = symbol_find_or_make (ensymname); | |
39a0d071 | 1394 | free (ensymname); |
f8e24652 | 1395 | symbol_mark_used (ensym); |
198f1251 TG |
1396 | /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH |
1397 | case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker | |
1398 | Utility Manual. */ | |
1399 | insn.fixups[insn.nfixups].exp.X_op = O_symbol; | |
1400 | insn.fixups[insn.nfixups].exp.X_add_symbol = ensym; | |
1401 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1402 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1403 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1404 | insn.nfixups++; | |
1405 | ||
1406 | /* ??? Force bsym to be instantiated now, as it will be | |
1407 | too late to do so in tc_gen_reloc. */ | |
87975d2a | 1408 | symbol_get_bfdsym (exp->X_add_symbol); |
198f1251 TG |
1409 | } |
1410 | else if (alpha_flag_replace && targreg == 27) | |
1411 | { | |
51794af8 | 1412 | /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */ |
198f1251 TG |
1413 | char *psymname; |
1414 | symbolS *psym; | |
1415 | ||
51794af8 | 1416 | /* Extract NAME. */ |
198f1251 TG |
1417 | ptr1 = strstr (symname, "..") + 2; |
1418 | if (ptr1 > ptr2) | |
1419 | ptr1 = symname; | |
39a0d071 | 1420 | psymname = (char *) xmalloc (ptr2 - ptr1 + 1); |
198f1251 TG |
1421 | memcpy (psymname, ptr1, ptr2 - ptr1); |
1422 | psymname [ptr2 - ptr1] = 0; | |
51794af8 | 1423 | |
9c2799c2 | 1424 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1425 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA; |
1426 | psym = symbol_find_or_make (psymname); | |
39a0d071 | 1427 | free (psymname); |
f8e24652 | 1428 | symbol_mark_used (psym); |
198f1251 TG |
1429 | insn.fixups[insn.nfixups].exp.X_op = O_subtract; |
1430 | insn.fixups[insn.nfixups].exp.X_add_symbol = psym; | |
1431 | insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol; | |
1432 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1433 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1434 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1435 | insn.nfixups++; | |
1436 | } | |
1437 | ||
51794af8 | 1438 | emit_insn (&insn); |
198f1251 | 1439 | return 0; |
ea1562b3 NC |
1440 | } |
1441 | else | |
198f1251 | 1442 | { |
51794af8 TG |
1443 | /* Not in the linkage section. Put the value into the linkage |
1444 | section. */ | |
198f1251 | 1445 | symbolS *linkexp; |
252b5132 | 1446 | |
198f1251 TG |
1447 | if (!range_signed_32 (addend)) |
1448 | addend = sign_extend_32 (addend); | |
8aacb050 | 1449 | linkexp = add_to_link_pool (exp->X_add_symbol, 0); |
198f1251 TG |
1450 | set_tok_reg (newtok[0], targreg); |
1451 | set_tok_sym (newtok[1], linkexp, 0); | |
1452 | set_tok_preg (newtok[2], basereg); | |
1453 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1454 | } | |
ea1562b3 NC |
1455 | } |
1456 | #endif /* OBJ_EVAX */ | |
252b5132 | 1457 | |
ea1562b3 | 1458 | emit_insn (&insn); |
19f78583 | 1459 | |
ea1562b3 NC |
1460 | #ifndef OBJ_EVAX |
1461 | if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO) | |
1462 | { | |
1463 | /* Emit "addq r, base, r". */ | |
19f78583 | 1464 | |
ea1562b3 NC |
1465 | set_tok_reg (newtok[1], basereg); |
1466 | set_tok_reg (newtok[2], targreg); | |
1467 | assemble_tokens ("addq", newtok, 3, 0); | |
1468 | } | |
1469 | #endif | |
1470 | basereg = targreg; | |
1471 | } | |
1472 | break; | |
19f78583 | 1473 | |
ea1562b3 NC |
1474 | case O_constant: |
1475 | break; | |
19f78583 | 1476 | |
ea1562b3 NC |
1477 | case O_subtract: |
1478 | /* Assume that this difference expression will be resolved to an | |
1479 | absolute value and that that value will fit in 16 bits. */ | |
19f78583 | 1480 | |
ea1562b3 NC |
1481 | set_tok_reg (newtok[0], targreg); |
1482 | newtok[1] = *exp; | |
1483 | set_tok_preg (newtok[2], basereg); | |
198f1251 | 1484 | assemble_tokens (opname, newtok, 3, 0); |
43b4c25e | 1485 | |
ea1562b3 NC |
1486 | if (poffset) |
1487 | set_tok_const (*poffset, 0); | |
1488 | return 0; | |
43b4c25e | 1489 | |
ea1562b3 NC |
1490 | case O_big: |
1491 | if (exp->X_add_number > 0) | |
1492 | as_bad (_("bignum invalid; zero assumed")); | |
1493 | else | |
1494 | as_bad (_("floating point number invalid; zero assumed")); | |
1495 | addend = 0; | |
1496 | break; | |
43b4c25e | 1497 | |
ea1562b3 NC |
1498 | default: |
1499 | as_bad (_("can't handle expression")); | |
1500 | addend = 0; | |
1501 | break; | |
1502 | } | |
43b4c25e | 1503 | |
ea1562b3 | 1504 | if (!range_signed_32 (addend)) |
43b4c25e | 1505 | { |
198f1251 TG |
1506 | #ifdef OBJ_EVAX |
1507 | symbolS *litexp; | |
1508 | #else | |
ea1562b3 NC |
1509 | offsetT lit; |
1510 | long seq_num = next_sequence_num--; | |
198f1251 | 1511 | #endif |
43b4c25e | 1512 | |
ea1562b3 NC |
1513 | /* For 64-bit addends, just put it in the literal pool. */ |
1514 | #ifdef OBJ_EVAX | |
1515 | /* Emit "ldq targreg, lit(basereg)". */ | |
8aacb050 | 1516 | litexp = add_to_link_pool (section_symbol (absolute_section), addend); |
ea1562b3 | 1517 | set_tok_reg (newtok[0], targreg); |
198f1251 | 1518 | set_tok_sym (newtok[1], litexp, 0); |
ea1562b3 NC |
1519 | set_tok_preg (newtok[2], alpha_gp_register); |
1520 | assemble_tokens ("ldq", newtok, 3, 0); | |
1521 | #else | |
1522 | ||
1523 | if (alpha_lit8_section == NULL) | |
43b4c25e | 1524 | { |
ea1562b3 NC |
1525 | create_literal_section (".lit8", |
1526 | &alpha_lit8_section, | |
1527 | &alpha_lit8_symbol); | |
1528 | ||
1529 | #ifdef OBJ_ECOFF | |
1530 | alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000, | |
1531 | alpha_lita_section, 8); | |
1532 | if (alpha_lit8_literal >= 0x8000) | |
1533 | as_fatal (_("overflow in literal (.lita) table")); | |
11f45fb5 | 1534 | #endif |
ea1562b3 | 1535 | } |
43b4c25e | 1536 | |
ea1562b3 NC |
1537 | lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000; |
1538 | if (lit >= 0x8000) | |
1539 | as_fatal (_("overflow in literal (.lit8) table")); | |
19f78583 | 1540 | |
ea1562b3 | 1541 | /* Emit "lda litreg, .lit8+0x8000". */ |
3765b1be | 1542 | |
ea1562b3 NC |
1543 | if (targreg == basereg) |
1544 | { | |
1545 | if (alpha_noat_on) | |
1546 | as_bad (_("macro requires $at register while noat in effect")); | |
1547 | if (targreg == AXP_REG_AT) | |
1548 | as_bad (_("macro requires $at while $at in use")); | |
1549 | ||
1550 | set_tok_reg (newtok[0], AXP_REG_AT); | |
43b4c25e | 1551 | } |
ea1562b3 NC |
1552 | else |
1553 | set_tok_reg (newtok[0], targreg); | |
1554 | #ifdef OBJ_ECOFF | |
1555 | set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal); | |
1556 | #endif | |
1557 | #ifdef OBJ_ELF | |
1558 | set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000); | |
1559 | #endif | |
1560 | set_tok_preg (newtok[2], alpha_gp_register); | |
43b4c25e | 1561 | |
ea1562b3 | 1562 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
19f78583 | 1563 | |
9c2799c2 | 1564 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1565 | #ifdef OBJ_ECOFF |
1566 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; | |
1567 | #endif | |
1568 | #ifdef OBJ_ELF | |
1569 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; | |
1570 | #endif | |
1571 | insn.sequence = seq_num; | |
19f78583 | 1572 | |
ea1562b3 | 1573 | emit_insn (&insn); |
19f78583 | 1574 | |
ea1562b3 | 1575 | /* Emit "ldq litreg, lit(litreg)". */ |
19f78583 | 1576 | |
ea1562b3 NC |
1577 | set_tok_const (newtok[1], lit); |
1578 | set_tok_preg (newtok[2], newtok[0].X_add_number); | |
1579 | ||
1580 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1581 | ||
9c2799c2 | 1582 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
1583 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
1584 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
1585 | insn.nfixups++; | |
1586 | insn.sequence = seq_num; | |
1587 | emit_lituse = 0; | |
1588 | ||
1589 | emit_insn (&insn); | |
1590 | ||
1591 | /* Emit "addq litreg, base, target". */ | |
1592 | ||
1593 | if (basereg != AXP_REG_ZERO) | |
1594 | { | |
1595 | set_tok_reg (newtok[1], basereg); | |
1596 | set_tok_reg (newtok[2], targreg); | |
1597 | assemble_tokens ("addq", newtok, 3, 0); | |
1598 | } | |
1599 | #endif /* !OBJ_EVAX */ | |
1600 | ||
1601 | if (poffset) | |
1602 | set_tok_const (*poffset, 0); | |
1603 | *pbasereg = targreg; | |
1604 | } | |
1605 | else | |
43b4c25e | 1606 | { |
ea1562b3 NC |
1607 | offsetT low, high, extra, tmp; |
1608 | ||
1609 | /* For 32-bit operands, break up the addend. */ | |
1610 | ||
1611 | low = sign_extend_16 (addend); | |
1612 | tmp = addend - low; | |
1613 | high = sign_extend_16 (tmp >> 16); | |
1614 | ||
1615 | if (tmp - (high << 16)) | |
43b4c25e | 1616 | { |
ea1562b3 NC |
1617 | extra = 0x4000; |
1618 | tmp -= 0x40000000; | |
1619 | high = sign_extend_16 (tmp >> 16); | |
1620 | } | |
1621 | else | |
1622 | extra = 0; | |
3765b1be | 1623 | |
ea1562b3 NC |
1624 | set_tok_reg (newtok[0], targreg); |
1625 | set_tok_preg (newtok[2], basereg); | |
3765b1be | 1626 | |
ea1562b3 NC |
1627 | if (extra) |
1628 | { | |
1629 | /* Emit "ldah r, extra(r). */ | |
1630 | set_tok_const (newtok[1], extra); | |
1631 | assemble_tokens ("ldah", newtok, 3, 0); | |
1632 | set_tok_preg (newtok[2], basereg = targreg); | |
1633 | } | |
43b4c25e | 1634 | |
ea1562b3 NC |
1635 | if (high) |
1636 | { | |
1637 | /* Emit "ldah r, high(r). */ | |
1638 | set_tok_const (newtok[1], high); | |
1639 | assemble_tokens ("ldah", newtok, 3, 0); | |
1640 | basereg = targreg; | |
1641 | set_tok_preg (newtok[2], basereg); | |
1642 | } | |
19f78583 | 1643 | |
ea1562b3 NC |
1644 | if ((low && !poffset) || (!poffset && basereg != targreg)) |
1645 | { | |
1646 | /* Emit "lda r, low(base)". */ | |
1647 | set_tok_const (newtok[1], low); | |
1648 | assemble_tokens ("lda", newtok, 3, 0); | |
1649 | basereg = targreg; | |
1650 | low = 0; | |
43b4c25e | 1651 | } |
ea1562b3 NC |
1652 | |
1653 | if (poffset) | |
1654 | set_tok_const (*poffset, low); | |
1655 | *pbasereg = basereg; | |
43b4c25e | 1656 | } |
ea1562b3 NC |
1657 | |
1658 | return emit_lituse; | |
43b4c25e | 1659 | } |
43b4c25e | 1660 | |
ea1562b3 NC |
1661 | /* The lda macro differs from the lda instruction in that it handles |
1662 | most simple expressions, particularly symbol address loads and | |
1663 | large constants. */ | |
11f45fb5 | 1664 | |
ea1562b3 NC |
1665 | static void |
1666 | emit_lda (const expressionS *tok, | |
1667 | int ntok, | |
1668 | const void * unused ATTRIBUTE_UNUSED) | |
1669 | { | |
1670 | int basereg; | |
43b4c25e | 1671 | |
ea1562b3 NC |
1672 | if (ntok == 2) |
1673 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
1674 | else | |
1675 | basereg = tok[2].X_add_number; | |
1676 | ||
198f1251 | 1677 | (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda"); |
43b4c25e | 1678 | } |
43b4c25e | 1679 | |
ea1562b3 NC |
1680 | /* The ldah macro differs from the ldah instruction in that it has $31 |
1681 | as an implied base register. */ | |
252b5132 | 1682 | |
ea1562b3 NC |
1683 | static void |
1684 | emit_ldah (const expressionS *tok, | |
1685 | int ntok ATTRIBUTE_UNUSED, | |
1686 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 1687 | { |
ea1562b3 | 1688 | expressionS newtok[3]; |
252b5132 | 1689 | |
ea1562b3 NC |
1690 | newtok[0] = tok[0]; |
1691 | newtok[1] = tok[1]; | |
1692 | set_tok_preg (newtok[2], AXP_REG_ZERO); | |
252b5132 | 1693 | |
ea1562b3 NC |
1694 | assemble_tokens ("ldah", newtok, 3, 0); |
1695 | } | |
19f78583 | 1696 | |
ea1562b3 NC |
1697 | /* Called internally to handle all alignment needs. This takes care |
1698 | of eliding calls to frag_align if'n the cached current alignment | |
1699 | says we've already got it, as well as taking care of the auto-align | |
1700 | feature wrt labels. */ | |
252b5132 | 1701 | |
ea1562b3 NC |
1702 | static void |
1703 | alpha_align (int n, | |
1704 | char *pfill, | |
1705 | symbolS *label, | |
1706 | int force ATTRIBUTE_UNUSED) | |
1707 | { | |
1708 | if (alpha_current_align >= n) | |
1709 | return; | |
43b4c25e | 1710 | |
ea1562b3 NC |
1711 | if (pfill == NULL) |
1712 | { | |
1713 | if (subseg_text_p (now_seg)) | |
1714 | frag_align_code (n, 0); | |
1715 | else | |
1716 | frag_align (n, 0, 0); | |
1717 | } | |
1718 | else | |
1719 | frag_align (n, *pfill, 0); | |
43b4c25e | 1720 | |
ea1562b3 | 1721 | alpha_current_align = n; |
43b4c25e | 1722 | |
ea1562b3 NC |
1723 | if (label != NULL && S_GET_SEGMENT (label) == now_seg) |
1724 | { | |
1725 | symbol_set_frag (label, frag_now); | |
1726 | S_SET_VALUE (label, (valueT) frag_now_fix ()); | |
1727 | } | |
43b4c25e | 1728 | |
ea1562b3 | 1729 | record_alignment (now_seg, n); |
43b4c25e | 1730 | |
ea1562b3 NC |
1731 | /* ??? If alpha_flag_relax && force && elf, record the requested alignment |
1732 | in a reloc for the linker to see. */ | |
1733 | } | |
19f78583 | 1734 | |
ea1562b3 | 1735 | /* Actually output an instruction with its fixup. */ |
19f78583 | 1736 | |
ea1562b3 NC |
1737 | static void |
1738 | emit_insn (struct alpha_insn *insn) | |
1739 | { | |
1740 | char *f; | |
1741 | int i; | |
43b4c25e | 1742 | |
ea1562b3 NC |
1743 | /* Take care of alignment duties. */ |
1744 | if (alpha_auto_align_on && alpha_current_align < 2) | |
1745 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
1746 | if (alpha_current_align > 2) | |
1747 | alpha_current_align = 2; | |
1748 | alpha_insn_label = NULL; | |
43b4c25e | 1749 | |
ea1562b3 NC |
1750 | /* Write out the instruction. */ |
1751 | f = frag_more (4); | |
1752 | md_number_to_chars (f, insn->insn, 4); | |
43b4c25e | 1753 | |
ea1562b3 NC |
1754 | #ifdef OBJ_ELF |
1755 | dwarf2_emit_insn (4); | |
1756 | #endif | |
252b5132 | 1757 | |
ea1562b3 NC |
1758 | /* Apply the fixups in order. */ |
1759 | for (i = 0; i < insn->nfixups; ++i) | |
1760 | { | |
1761 | const struct alpha_operand *operand = (const struct alpha_operand *) 0; | |
1762 | struct alpha_fixup *fixup = &insn->fixups[i]; | |
1763 | struct alpha_reloc_tag *info = NULL; | |
1764 | int size, pcrel; | |
1765 | fixS *fixP; | |
252b5132 | 1766 | |
ea1562b3 NC |
1767 | /* Some fixups are only used internally and so have no howto. */ |
1768 | if ((int) fixup->reloc < 0) | |
1769 | { | |
1770 | operand = &alpha_operands[-(int) fixup->reloc]; | |
1771 | size = 4; | |
1772 | pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0); | |
1773 | } | |
1774 | else if (fixup->reloc > BFD_RELOC_UNUSED | |
1775 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16 | |
1776 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16) | |
1777 | { | |
1778 | size = 2; | |
1779 | pcrel = 0; | |
1780 | } | |
1781 | else | |
1782 | { | |
21d799b5 NC |
1783 | reloc_howto_type *reloc_howto = |
1784 | bfd_reloc_type_lookup (stdoutput, | |
1785 | (bfd_reloc_code_real_type) fixup->reloc); | |
9c2799c2 | 1786 | gas_assert (reloc_howto); |
252b5132 | 1787 | |
ea1562b3 | 1788 | size = bfd_get_reloc_size (reloc_howto); |
252b5132 | 1789 | |
198f1251 TG |
1790 | switch (fixup->reloc) |
1791 | { | |
1792 | #ifdef OBJ_EVAX | |
1793 | case BFD_RELOC_ALPHA_NOP: | |
1794 | case BFD_RELOC_ALPHA_BSR: | |
1795 | case BFD_RELOC_ALPHA_LDA: | |
1796 | case BFD_RELOC_ALPHA_BOH: | |
1797 | break; | |
1798 | #endif | |
1799 | default: | |
9c2799c2 | 1800 | gas_assert (size >= 1 && size <= 4); |
198f1251 | 1801 | } |
3739860c | 1802 | |
ea1562b3 NC |
1803 | pcrel = reloc_howto->pc_relative; |
1804 | } | |
43b4c25e | 1805 | |
ea1562b3 | 1806 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, |
21d799b5 | 1807 | &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc); |
252b5132 | 1808 | |
ea1562b3 NC |
1809 | /* Turn off complaints that the addend is too large for some fixups, |
1810 | and copy in the sequence number for the explicit relocations. */ | |
1811 | switch (fixup->reloc) | |
1812 | { | |
1813 | case BFD_RELOC_ALPHA_HINT: | |
1814 | case BFD_RELOC_GPREL32: | |
1815 | case BFD_RELOC_GPREL16: | |
1816 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
1817 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
1818 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
1819 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
1820 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
1821 | case BFD_RELOC_ALPHA_DTPREL16: | |
1822 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
1823 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
1824 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
1825 | case BFD_RELOC_ALPHA_TPREL16: | |
1826 | fixP->fx_no_overflow = 1; | |
252b5132 | 1827 | break; |
252b5132 | 1828 | |
ea1562b3 NC |
1829 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
1830 | fixP->fx_no_overflow = 1; | |
1831 | fixP->fx_addsy = section_symbol (now_seg); | |
1832 | fixP->fx_offset = 0; | |
43b4c25e | 1833 | |
ea1562b3 NC |
1834 | info = get_alpha_reloc_tag (insn->sequence); |
1835 | if (++info->n_master > 1) | |
1836 | as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence); | |
1837 | if (info->segment != now_seg) | |
1838 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1839 | insn->sequence); | |
1840 | fixP->tc_fix_data.info = info; | |
1841 | break; | |
43b4c25e | 1842 | |
ea1562b3 NC |
1843 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
1844 | fixP->fx_no_overflow = 1; | |
252b5132 | 1845 | |
ea1562b3 NC |
1846 | info = get_alpha_reloc_tag (insn->sequence); |
1847 | if (++info->n_slaves > 1) | |
1848 | as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence); | |
1849 | if (info->segment != now_seg) | |
1850 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1851 | insn->sequence); | |
1852 | fixP->tc_fix_data.info = info; | |
1853 | info->slaves = fixP; | |
1854 | break; | |
1855 | ||
1856 | case BFD_RELOC_ALPHA_LITERAL: | |
1857 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
1858 | fixP->fx_no_overflow = 1; | |
1859 | ||
1860 | if (insn->sequence == 0) | |
1861 | break; | |
1862 | info = get_alpha_reloc_tag (insn->sequence); | |
1863 | info->master = fixP; | |
1864 | info->n_master++; | |
1865 | if (info->segment != now_seg) | |
1866 | info->multi_section_p = 1; | |
1867 | fixP->tc_fix_data.info = info; | |
1868 | break; | |
43b4c25e | 1869 | |
19f78583 | 1870 | #ifdef RELOC_OP_P |
ea1562b3 NC |
1871 | case DUMMY_RELOC_LITUSE_ADDR: |
1872 | fixP->fx_offset = LITUSE_ALPHA_ADDR; | |
1873 | goto do_lituse; | |
1874 | case DUMMY_RELOC_LITUSE_BASE: | |
1875 | fixP->fx_offset = LITUSE_ALPHA_BASE; | |
1876 | goto do_lituse; | |
1877 | case DUMMY_RELOC_LITUSE_BYTOFF: | |
1878 | fixP->fx_offset = LITUSE_ALPHA_BYTOFF; | |
1879 | goto do_lituse; | |
1880 | case DUMMY_RELOC_LITUSE_JSR: | |
1881 | fixP->fx_offset = LITUSE_ALPHA_JSR; | |
1882 | goto do_lituse; | |
1883 | case DUMMY_RELOC_LITUSE_TLSGD: | |
1884 | fixP->fx_offset = LITUSE_ALPHA_TLSGD; | |
1885 | goto do_lituse; | |
1886 | case DUMMY_RELOC_LITUSE_TLSLDM: | |
1887 | fixP->fx_offset = LITUSE_ALPHA_TLSLDM; | |
1888 | goto do_lituse; | |
04fe8f58 RH |
1889 | case DUMMY_RELOC_LITUSE_JSRDIRECT: |
1890 | fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT; | |
1891 | goto do_lituse; | |
ea1562b3 NC |
1892 | do_lituse: |
1893 | fixP->fx_addsy = section_symbol (now_seg); | |
1894 | fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE; | |
1895 | ||
1896 | info = get_alpha_reloc_tag (insn->sequence); | |
1897 | if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD) | |
1898 | info->saw_lu_tlsgd = 1; | |
1899 | else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM) | |
1900 | info->saw_lu_tlsldm = 1; | |
1901 | if (++info->n_slaves > 1) | |
1902 | { | |
1903 | if (info->saw_lu_tlsgd) | |
1904 | as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"), | |
1905 | insn->sequence); | |
1906 | else if (info->saw_lu_tlsldm) | |
1907 | as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"), | |
1908 | insn->sequence); | |
1909 | } | |
1910 | fixP->tc_fix_data.info = info; | |
1911 | fixP->tc_fix_data.next_reloc = info->slaves; | |
1912 | info->slaves = fixP; | |
1913 | if (info->segment != now_seg) | |
1914 | info->multi_section_p = 1; | |
1915 | break; | |
1916 | ||
1917 | case BFD_RELOC_ALPHA_TLSGD: | |
1918 | fixP->fx_no_overflow = 1; | |
1919 | ||
1920 | if (insn->sequence == 0) | |
1921 | break; | |
1922 | info = get_alpha_reloc_tag (insn->sequence); | |
1923 | if (info->saw_tlsgd) | |
1924 | as_bad (_("duplicate !tlsgd!%ld"), insn->sequence); | |
1925 | else if (info->saw_tlsldm) | |
1926 | as_bad (_("sequence number in use for !tlsldm!%ld"), | |
1927 | insn->sequence); | |
1928 | else | |
1929 | info->saw_tlsgd = 1; | |
1930 | fixP->tc_fix_data.info = info; | |
1931 | break; | |
1932 | ||
1933 | case BFD_RELOC_ALPHA_TLSLDM: | |
1934 | fixP->fx_no_overflow = 1; | |
1935 | ||
1936 | if (insn->sequence == 0) | |
1937 | break; | |
1938 | info = get_alpha_reloc_tag (insn->sequence); | |
1939 | if (info->saw_tlsldm) | |
1940 | as_bad (_("duplicate !tlsldm!%ld"), insn->sequence); | |
1941 | else if (info->saw_tlsgd) | |
1942 | as_bad (_("sequence number in use for !tlsgd!%ld"), | |
1943 | insn->sequence); | |
1944 | else | |
1945 | info->saw_tlsldm = 1; | |
1946 | fixP->tc_fix_data.info = info; | |
1947 | break; | |
19f78583 | 1948 | #endif |
198f1251 TG |
1949 | #ifdef OBJ_EVAX |
1950 | case BFD_RELOC_ALPHA_NOP: | |
1951 | case BFD_RELOC_ALPHA_LDA: | |
1952 | case BFD_RELOC_ALPHA_BSR: | |
1953 | case BFD_RELOC_ALPHA_BOH: | |
1954 | info = get_alpha_reloc_tag (next_sequence_num--); | |
1955 | fixP->tc_fix_data.info = info; | |
1956 | fixP->tc_fix_data.info->sym = fixup->xtrasym; | |
1957 | fixP->tc_fix_data.info->psym = fixup->procsym; | |
1958 | break; | |
1959 | #endif | |
1960 | ||
ea1562b3 NC |
1961 | default: |
1962 | if ((int) fixup->reloc < 0) | |
1963 | { | |
1964 | if (operand->flags & AXP_OPERAND_NOOVERFLOW) | |
1965 | fixP->fx_no_overflow = 1; | |
1966 | } | |
1967 | break; | |
1968 | } | |
1969 | } | |
252b5132 RH |
1970 | } |
1971 | ||
ea1562b3 | 1972 | /* Insert an operand value into an instruction. */ |
252b5132 | 1973 | |
ea1562b3 NC |
1974 | static unsigned |
1975 | insert_operand (unsigned insn, | |
1976 | const struct alpha_operand *operand, | |
1977 | offsetT val, | |
3b4dbbbf | 1978 | const char *file, |
ea1562b3 | 1979 | unsigned line) |
252b5132 | 1980 | { |
ea1562b3 | 1981 | if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW)) |
252b5132 | 1982 | { |
ea1562b3 | 1983 | offsetT min, max; |
252b5132 | 1984 | |
ea1562b3 | 1985 | if (operand->flags & AXP_OPERAND_SIGNED) |
252b5132 | 1986 | { |
ea1562b3 NC |
1987 | max = (1 << (operand->bits - 1)) - 1; |
1988 | min = -(1 << (operand->bits - 1)); | |
1989 | } | |
1990 | else | |
1991 | { | |
1992 | max = (1 << operand->bits) - 1; | |
1993 | min = 0; | |
1994 | } | |
252b5132 | 1995 | |
ea1562b3 | 1996 | if (val < min || val > max) |
a06413e3 | 1997 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); |
ea1562b3 | 1998 | } |
252b5132 | 1999 | |
ea1562b3 NC |
2000 | if (operand->insert) |
2001 | { | |
2002 | const char *errmsg = NULL; | |
252b5132 RH |
2003 | |
2004 | insn = (*operand->insert) (insn, val, &errmsg); | |
2005 | if (errmsg) | |
20203fb9 | 2006 | as_warn ("%s", errmsg); |
252b5132 RH |
2007 | } |
2008 | else | |
2009 | insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift); | |
2010 | ||
2011 | return insn; | |
2012 | } | |
2013 | ||
11f45fb5 NC |
2014 | /* Turn an opcode description and a set of arguments into |
2015 | an instruction and a fixup. */ | |
252b5132 RH |
2016 | |
2017 | static void | |
ea1562b3 NC |
2018 | assemble_insn (const struct alpha_opcode *opcode, |
2019 | const expressionS *tok, | |
2020 | int ntok, | |
2021 | struct alpha_insn *insn, | |
21d799b5 | 2022 | extended_bfd_reloc_code_real_type reloc) |
252b5132 | 2023 | { |
19f78583 RH |
2024 | const struct alpha_operand *reloc_operand = NULL; |
2025 | const expressionS *reloc_exp = NULL; | |
252b5132 RH |
2026 | const unsigned char *argidx; |
2027 | unsigned image; | |
2028 | int tokidx = 0; | |
2029 | ||
2030 | memset (insn, 0, sizeof (*insn)); | |
2031 | image = opcode->opcode; | |
2032 | ||
2033 | for (argidx = opcode->operands; *argidx; ++argidx) | |
2034 | { | |
2035 | const struct alpha_operand *operand = &alpha_operands[*argidx]; | |
32ff5c2e | 2036 | const expressionS *t = (const expressionS *) 0; |
252b5132 RH |
2037 | |
2038 | if (operand->flags & AXP_OPERAND_FAKE) | |
2039 | { | |
ea1562b3 | 2040 | /* Fake operands take no value and generate no fixup. */ |
32ff5c2e | 2041 | image = insert_operand (image, operand, 0, NULL, 0); |
252b5132 RH |
2042 | continue; |
2043 | } | |
2044 | ||
2045 | if (tokidx >= ntok) | |
2046 | { | |
2047 | switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK) | |
2048 | { | |
2049 | case AXP_OPERAND_DEFAULT_FIRST: | |
2050 | t = &tok[0]; | |
2051 | break; | |
2052 | case AXP_OPERAND_DEFAULT_SECOND: | |
2053 | t = &tok[1]; | |
2054 | break; | |
2055 | case AXP_OPERAND_DEFAULT_ZERO: | |
2056 | { | |
446a06c9 | 2057 | static expressionS zero_exp; |
252b5132 | 2058 | t = &zero_exp; |
446a06c9 MM |
2059 | zero_exp.X_op = O_constant; |
2060 | zero_exp.X_unsigned = 1; | |
252b5132 RH |
2061 | } |
2062 | break; | |
2063 | default: | |
bc805888 | 2064 | abort (); |
252b5132 RH |
2065 | } |
2066 | } | |
2067 | else | |
2068 | t = &tok[tokidx++]; | |
2069 | ||
2070 | switch (t->X_op) | |
2071 | { | |
2072 | case O_register: | |
2073 | case O_pregister: | |
2074 | case O_cpregister: | |
32ff5c2e KH |
2075 | image = insert_operand (image, operand, regno (t->X_add_number), |
2076 | NULL, 0); | |
252b5132 RH |
2077 | break; |
2078 | ||
2079 | case O_constant: | |
32ff5c2e | 2080 | image = insert_operand (image, operand, t->X_add_number, NULL, 0); |
9c2799c2 | 2081 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2082 | reloc_operand = operand; |
2083 | reloc_exp = t; | |
252b5132 RH |
2084 | break; |
2085 | ||
2086 | default: | |
19f78583 RH |
2087 | /* This is only 0 for fields that should contain registers, |
2088 | which means this pattern shouldn't have matched. */ | |
2089 | if (operand->default_reloc == 0) | |
2090 | abort (); | |
252b5132 | 2091 | |
19f78583 | 2092 | /* There is one special case for which an insn receives two |
cc8a6dd0 | 2093 | relocations, and thus the user-supplied reloc does not |
19f78583 RH |
2094 | override the operand reloc. */ |
2095 | if (operand->default_reloc == BFD_RELOC_ALPHA_HINT) | |
2096 | { | |
2097 | struct alpha_fixup *fixup; | |
252b5132 | 2098 | |
19f78583 RH |
2099 | if (insn->nfixups >= MAX_INSN_FIXUPS) |
2100 | as_fatal (_("too many fixups")); | |
252b5132 | 2101 | |
19f78583 RH |
2102 | fixup = &insn->fixups[insn->nfixups++]; |
2103 | fixup->exp = *t; | |
2104 | fixup->reloc = BFD_RELOC_ALPHA_HINT; | |
2105 | } | |
2106 | else | |
2107 | { | |
2108 | if (reloc == BFD_RELOC_UNUSED) | |
2109 | reloc = operand->default_reloc; | |
2110 | ||
9c2799c2 | 2111 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2112 | reloc_operand = operand; |
2113 | reloc_exp = t; | |
2114 | } | |
252b5132 RH |
2115 | break; |
2116 | } | |
2117 | } | |
2118 | ||
19f78583 RH |
2119 | if (reloc != BFD_RELOC_UNUSED) |
2120 | { | |
2121 | struct alpha_fixup *fixup; | |
2122 | ||
2123 | if (insn->nfixups >= MAX_INSN_FIXUPS) | |
2124 | as_fatal (_("too many fixups")); | |
2125 | ||
2126 | /* ??? My but this is hacky. But the OSF/1 assembler uses the same | |
2127 | relocation tag for both ldah and lda with gpdisp. Choose the | |
2128 | correct internal relocation based on the opcode. */ | |
2129 | if (reloc == BFD_RELOC_ALPHA_GPDISP) | |
2130 | { | |
2131 | if (strcmp (opcode->name, "ldah") == 0) | |
2132 | reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2133 | else if (strcmp (opcode->name, "lda") == 0) | |
2134 | reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
2135 | else | |
2136 | as_bad (_("invalid relocation for instruction")); | |
2137 | } | |
2138 | ||
2139 | /* If this is a real relocation (as opposed to a lituse hint), then | |
198f1251 | 2140 | the relocation width should match the operand width. |
3739860c | 2141 | Take care of -MDISP in operand table. */ |
198f1251 | 2142 | else if (reloc < BFD_RELOC_UNUSED && reloc > 0) |
19f78583 RH |
2143 | { |
2144 | reloc_howto_type *reloc_howto | |
21d799b5 NC |
2145 | = bfd_reloc_type_lookup (stdoutput, |
2146 | (bfd_reloc_code_real_type) reloc); | |
ee21dcab AM |
2147 | if (reloc_operand == NULL |
2148 | || reloc_howto->bitsize != reloc_operand->bits) | |
19f78583 RH |
2149 | { |
2150 | as_bad (_("invalid relocation for field")); | |
2151 | return; | |
2152 | } | |
2153 | } | |
2154 | ||
2155 | fixup = &insn->fixups[insn->nfixups++]; | |
2156 | if (reloc_exp) | |
2157 | fixup->exp = *reloc_exp; | |
2158 | else | |
2159 | fixup->exp.X_op = O_absent; | |
2160 | fixup->reloc = reloc; | |
2161 | } | |
2162 | ||
252b5132 RH |
2163 | insn->insn = image; |
2164 | } | |
2165 | ||
ea1562b3 NC |
2166 | /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u, |
2167 | etc. They differ from the real instructions in that they do simple | |
2168 | expressions like the lda macro. */ | |
252b5132 RH |
2169 | |
2170 | static void | |
ea1562b3 NC |
2171 | emit_ir_load (const expressionS *tok, |
2172 | int ntok, | |
2173 | const void * opname) | |
252b5132 | 2174 | { |
ea1562b3 NC |
2175 | int basereg; |
2176 | long lituse; | |
2177 | expressionS newtok[3]; | |
2178 | struct alpha_insn insn; | |
198f1251 TG |
2179 | const char *symname |
2180 | = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): ""; | |
2181 | int symlen = strlen (symname); | |
252b5132 | 2182 | |
ea1562b3 NC |
2183 | if (ntok == 2) |
2184 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2185 | else | |
2186 | basereg = tok[2].X_add_number; | |
252b5132 | 2187 | |
198f1251 | 2188 | lituse = load_expression (tok[0].X_add_number, &tok[1], |
21d799b5 | 2189 | &basereg, &newtok[1], (const char *) opname); |
252b5132 | 2190 | |
198f1251 TG |
2191 | if (basereg == alpha_gp_register && |
2192 | (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0)) | |
2193 | return; | |
3739860c | 2194 | |
ea1562b3 NC |
2195 | newtok[0] = tok[0]; |
2196 | set_tok_preg (newtok[2], basereg); | |
4dc7ead9 | 2197 | |
ea1562b3 NC |
2198 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
2199 | ||
2200 | if (lituse) | |
252b5132 | 2201 | { |
9c2799c2 | 2202 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2203 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2204 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2205 | insn.nfixups++; | |
2206 | insn.sequence = lituse; | |
2207 | } | |
252b5132 | 2208 | |
ea1562b3 NC |
2209 | emit_insn (&insn); |
2210 | } | |
252b5132 | 2211 | |
ea1562b3 NC |
2212 | /* Handle fp register loads, and both integer and fp register stores. |
2213 | Again, we handle simple expressions. */ | |
43b4c25e | 2214 | |
ea1562b3 NC |
2215 | static void |
2216 | emit_loadstore (const expressionS *tok, | |
2217 | int ntok, | |
2218 | const void * opname) | |
2219 | { | |
2220 | int basereg; | |
2221 | long lituse; | |
2222 | expressionS newtok[3]; | |
2223 | struct alpha_insn insn; | |
252b5132 | 2224 | |
ea1562b3 NC |
2225 | if (ntok == 2) |
2226 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2227 | else | |
2228 | basereg = tok[2].X_add_number; | |
252b5132 | 2229 | |
ea1562b3 NC |
2230 | if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number)) |
2231 | { | |
2232 | if (alpha_noat_on) | |
2233 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2234 | |
3739860c | 2235 | lituse = load_expression (AXP_REG_AT, &tok[1], |
21d799b5 | 2236 | &basereg, &newtok[1], (const char *) opname); |
ea1562b3 NC |
2237 | } |
2238 | else | |
2239 | { | |
2240 | newtok[1] = tok[1]; | |
2241 | lituse = 0; | |
2242 | } | |
43b4c25e | 2243 | |
ea1562b3 NC |
2244 | newtok[0] = tok[0]; |
2245 | set_tok_preg (newtok[2], basereg); | |
43b4c25e | 2246 | |
ea1562b3 | 2247 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
43b4c25e | 2248 | |
ea1562b3 NC |
2249 | if (lituse) |
2250 | { | |
9c2799c2 | 2251 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2252 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2253 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2254 | insn.nfixups++; | |
2255 | insn.sequence = lituse; | |
2256 | } | |
43b4c25e | 2257 | |
ea1562b3 NC |
2258 | emit_insn (&insn); |
2259 | } | |
43b4c25e | 2260 | |
ea1562b3 | 2261 | /* Load a half-word or byte as an unsigned value. */ |
43b4c25e | 2262 | |
ea1562b3 NC |
2263 | static void |
2264 | emit_ldXu (const expressionS *tok, | |
2265 | int ntok, | |
2266 | const void * vlgsize) | |
2267 | { | |
2268 | if (alpha_target & AXP_OPCODE_BWX) | |
2269 | emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]); | |
2270 | else | |
2271 | { | |
2272 | expressionS newtok[3]; | |
2273 | struct alpha_insn insn; | |
2274 | int basereg; | |
2275 | long lituse; | |
19f78583 | 2276 | |
ea1562b3 NC |
2277 | if (alpha_noat_on) |
2278 | as_bad (_("macro requires $at register while noat in effect")); | |
43b4c25e | 2279 | |
ea1562b3 NC |
2280 | if (ntok == 2) |
2281 | basereg = (tok[1].X_op == O_constant | |
2282 | ? AXP_REG_ZERO : alpha_gp_register); | |
2283 | else | |
2284 | basereg = tok[2].X_add_number; | |
3765b1be | 2285 | |
ea1562b3 | 2286 | /* Emit "lda $at, exp". */ |
198f1251 | 2287 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
3765b1be | 2288 | |
ea1562b3 NC |
2289 | /* Emit "ldq_u targ, 0($at)". */ |
2290 | newtok[0] = tok[0]; | |
2291 | set_tok_const (newtok[1], 0); | |
2292 | set_tok_preg (newtok[2], basereg); | |
2293 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
3765b1be | 2294 | |
ea1562b3 NC |
2295 | if (lituse) |
2296 | { | |
9c2799c2 | 2297 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2298 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2299 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2300 | insn.nfixups++; | |
2301 | insn.sequence = lituse; | |
252b5132 | 2302 | } |
252b5132 | 2303 | |
ea1562b3 | 2304 | emit_insn (&insn); |
252b5132 | 2305 | |
ea1562b3 NC |
2306 | /* Emit "extXl targ, $at, targ". */ |
2307 | set_tok_reg (newtok[1], basereg); | |
2308 | newtok[2] = newtok[0]; | |
2309 | assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn); | |
252b5132 | 2310 | |
ea1562b3 | 2311 | if (lituse) |
252b5132 | 2312 | { |
9c2799c2 | 2313 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2314 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2315 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2316 | insn.nfixups++; | |
2317 | insn.sequence = lituse; | |
252b5132 | 2318 | } |
ea1562b3 NC |
2319 | |
2320 | emit_insn (&insn); | |
252b5132 | 2321 | } |
252b5132 RH |
2322 | } |
2323 | ||
ea1562b3 | 2324 | /* Load a half-word or byte as a signed value. */ |
252b5132 RH |
2325 | |
2326 | static void | |
ea1562b3 NC |
2327 | emit_ldX (const expressionS *tok, |
2328 | int ntok, | |
2329 | const void * vlgsize) | |
252b5132 | 2330 | { |
ea1562b3 NC |
2331 | emit_ldXu (tok, ntok, vlgsize); |
2332 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2333 | } | |
252b5132 | 2334 | |
ea1562b3 NC |
2335 | /* Load an integral value from an unaligned address as an unsigned |
2336 | value. */ | |
252b5132 RH |
2337 | |
2338 | static void | |
ea1562b3 NC |
2339 | emit_uldXu (const expressionS *tok, |
2340 | int ntok, | |
2341 | const void * vlgsize) | |
252b5132 | 2342 | { |
ea1562b3 | 2343 | long lgsize = (long) vlgsize; |
252b5132 | 2344 | expressionS newtok[3]; |
252b5132 | 2345 | |
ea1562b3 NC |
2346 | if (alpha_noat_on) |
2347 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2348 | |
ea1562b3 NC |
2349 | /* Emit "lda $at, exp". */ |
2350 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2351 | newtok[0].X_add_number = AXP_REG_AT; | |
2352 | assemble_tokens ("lda", newtok, ntok, 1); | |
2353 | ||
2354 | /* Emit "ldq_u $t9, 0($at)". */ | |
2355 | set_tok_reg (newtok[0], AXP_REG_T9); | |
252b5132 | 2356 | set_tok_const (newtok[1], 0); |
ea1562b3 NC |
2357 | set_tok_preg (newtok[2], AXP_REG_AT); |
2358 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2359 | |
ea1562b3 NC |
2360 | /* Emit "ldq_u $t10, size-1($at)". */ |
2361 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2362 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2363 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2364 | |
ea1562b3 NC |
2365 | /* Emit "extXl $t9, $at, $t9". */ |
2366 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2367 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2368 | set_tok_reg (newtok[2], AXP_REG_T9); | |
2369 | assemble_tokens (extXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2370 | |
ea1562b3 NC |
2371 | /* Emit "extXh $t10, $at, $t10". */ |
2372 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2373 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2374 | assemble_tokens (extXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2375 | |
ea1562b3 NC |
2376 | /* Emit "or $t9, $t10, targ". */ |
2377 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2378 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2379 | newtok[2] = tok[0]; | |
2380 | assemble_tokens ("or", newtok, 3, 1); | |
2381 | } | |
252b5132 | 2382 | |
ea1562b3 NC |
2383 | /* Load an integral value from an unaligned address as a signed value. |
2384 | Note that quads should get funneled to the unsigned load since we | |
2385 | don't have to do the sign extension. */ | |
252b5132 | 2386 | |
ea1562b3 NC |
2387 | static void |
2388 | emit_uldX (const expressionS *tok, | |
2389 | int ntok, | |
2390 | const void * vlgsize) | |
2391 | { | |
2392 | emit_uldXu (tok, ntok, vlgsize); | |
2393 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2394 | } | |
252b5132 | 2395 | |
ea1562b3 | 2396 | /* Implement the ldil macro. */ |
252b5132 | 2397 | |
ea1562b3 NC |
2398 | static void |
2399 | emit_ldil (const expressionS *tok, | |
2400 | int ntok, | |
2401 | const void * unused ATTRIBUTE_UNUSED) | |
2402 | { | |
2403 | expressionS newtok[2]; | |
252b5132 | 2404 | |
ea1562b3 NC |
2405 | memcpy (newtok, tok, sizeof (newtok)); |
2406 | newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); | |
252b5132 | 2407 | |
ea1562b3 | 2408 | assemble_tokens ("lda", newtok, ntok, 1); |
252b5132 RH |
2409 | } |
2410 | ||
ea1562b3 | 2411 | /* Store a half-word or byte. */ |
252b5132 | 2412 | |
ea1562b3 NC |
2413 | static void |
2414 | emit_stX (const expressionS *tok, | |
2415 | int ntok, | |
2416 | const void * vlgsize) | |
252b5132 | 2417 | { |
ea1562b3 | 2418 | int lgsize = (int) (long) vlgsize; |
252b5132 | 2419 | |
ea1562b3 NC |
2420 | if (alpha_target & AXP_OPCODE_BWX) |
2421 | emit_loadstore (tok, ntok, stX_op[lgsize]); | |
2422 | else | |
2423 | { | |
2424 | expressionS newtok[3]; | |
2425 | struct alpha_insn insn; | |
2426 | int basereg; | |
2427 | long lituse; | |
252b5132 | 2428 | |
ea1562b3 NC |
2429 | if (alpha_noat_on) |
2430 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2431 | |
ea1562b3 NC |
2432 | if (ntok == 2) |
2433 | basereg = (tok[1].X_op == O_constant | |
2434 | ? AXP_REG_ZERO : alpha_gp_register); | |
2435 | else | |
2436 | basereg = tok[2].X_add_number; | |
252b5132 | 2437 | |
ea1562b3 | 2438 | /* Emit "lda $at, exp". */ |
198f1251 | 2439 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
252b5132 | 2440 | |
ea1562b3 NC |
2441 | /* Emit "ldq_u $t9, 0($at)". */ |
2442 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2443 | set_tok_const (newtok[1], 0); | |
2444 | set_tok_preg (newtok[2], basereg); | |
2445 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
252b5132 | 2446 | |
ea1562b3 NC |
2447 | if (lituse) |
2448 | { | |
9c2799c2 | 2449 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2450 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2451 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2452 | insn.nfixups++; | |
2453 | insn.sequence = lituse; | |
2454 | } | |
252b5132 | 2455 | |
ea1562b3 | 2456 | emit_insn (&insn); |
252b5132 | 2457 | |
ea1562b3 NC |
2458 | /* Emit "insXl src, $at, $t10". */ |
2459 | newtok[0] = tok[0]; | |
2460 | set_tok_reg (newtok[1], basereg); | |
2461 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2462 | assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn); | |
252b5132 | 2463 | |
ea1562b3 NC |
2464 | if (lituse) |
2465 | { | |
9c2799c2 | 2466 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2467 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2468 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2469 | insn.nfixups++; | |
2470 | insn.sequence = lituse; | |
2471 | } | |
252b5132 | 2472 | |
ea1562b3 | 2473 | emit_insn (&insn); |
252b5132 | 2474 | |
ea1562b3 NC |
2475 | /* Emit "mskXl $t9, $at, $t9". */ |
2476 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2477 | newtok[2] = newtok[0]; | |
2478 | assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn); | |
43b4c25e | 2479 | |
ea1562b3 NC |
2480 | if (lituse) |
2481 | { | |
9c2799c2 | 2482 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2483 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2484 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2485 | insn.nfixups++; | |
2486 | insn.sequence = lituse; | |
2487 | } | |
252b5132 | 2488 | |
ea1562b3 | 2489 | emit_insn (&insn); |
252b5132 | 2490 | |
ea1562b3 NC |
2491 | /* Emit "or $t9, $t10, $t9". */ |
2492 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2493 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2494 | |
ea1562b3 NC |
2495 | /* Emit "stq_u $t9, 0($at). */ |
2496 | set_tok_const(newtok[1], 0); | |
2497 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2498 | assemble_tokens_to_insn ("stq_u", newtok, 3, &insn); | |
252b5132 | 2499 | |
ea1562b3 NC |
2500 | if (lituse) |
2501 | { | |
9c2799c2 | 2502 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2503 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2504 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2505 | insn.nfixups++; | |
2506 | insn.sequence = lituse; | |
2507 | } | |
252b5132 | 2508 | |
ea1562b3 NC |
2509 | emit_insn (&insn); |
2510 | } | |
2511 | } | |
252b5132 | 2512 | |
ea1562b3 | 2513 | /* Store an integer to an unaligned address. */ |
252b5132 | 2514 | |
ea1562b3 NC |
2515 | static void |
2516 | emit_ustX (const expressionS *tok, | |
2517 | int ntok, | |
2518 | const void * vlgsize) | |
2519 | { | |
2520 | int lgsize = (int) (long) vlgsize; | |
2521 | expressionS newtok[3]; | |
252b5132 | 2522 | |
ea1562b3 NC |
2523 | /* Emit "lda $at, exp". */ |
2524 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2525 | newtok[0].X_add_number = AXP_REG_AT; | |
2526 | assemble_tokens ("lda", newtok, ntok, 1); | |
252b5132 | 2527 | |
ea1562b3 NC |
2528 | /* Emit "ldq_u $9, 0($at)". */ |
2529 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2530 | set_tok_const (newtok[1], 0); | |
2531 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2532 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2533 | |
ea1562b3 NC |
2534 | /* Emit "ldq_u $10, size-1($at)". */ |
2535 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2536 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2537 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2538 | |
ea1562b3 NC |
2539 | /* Emit "insXl src, $at, $t11". */ |
2540 | newtok[0] = tok[0]; | |
2541 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2542 | set_tok_reg (newtok[2], AXP_REG_T11); | |
2543 | assemble_tokens (insXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2544 | |
ea1562b3 NC |
2545 | /* Emit "insXh src, $at, $t12". */ |
2546 | set_tok_reg (newtok[2], AXP_REG_T12); | |
2547 | assemble_tokens (insXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2548 | |
ea1562b3 NC |
2549 | /* Emit "mskXl $t9, $at, $t9". */ |
2550 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2551 | newtok[2] = newtok[0]; | |
2552 | assemble_tokens (mskXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2553 | |
ea1562b3 NC |
2554 | /* Emit "mskXh $t10, $at, $t10". */ |
2555 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2556 | newtok[2] = newtok[0]; | |
2557 | assemble_tokens (mskXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2558 | |
ea1562b3 NC |
2559 | /* Emit "or $t9, $t11, $t9". */ |
2560 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2561 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2562 | newtok[2] = newtok[0]; | |
2563 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2564 | |
ea1562b3 NC |
2565 | /* Emit "or $t10, $t12, $t10". */ |
2566 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2567 | set_tok_reg (newtok[1], AXP_REG_T12); | |
2568 | newtok[2] = newtok[0]; | |
2569 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2570 | |
ea1562b3 NC |
2571 | /* Emit "stq_u $t10, size-1($at)". */ |
2572 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2573 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
af1c1010 NC |
2574 | set_tok_preg (newtok[2], AXP_REG_AT); |
2575 | assemble_tokens ("stq_u", newtok, 3, 1); | |
2576 | ||
2577 | /* Emit "stq_u $t9, 0($at)". */ | |
2578 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2579 | set_tok_const (newtok[1], 0); | |
ea1562b3 NC |
2580 | assemble_tokens ("stq_u", newtok, 3, 1); |
2581 | } | |
252b5132 | 2582 | |
ea1562b3 NC |
2583 | /* Sign extend a half-word or byte. The 32-bit sign extend is |
2584 | implemented as "addl $31, $r, $t" in the opcode table. */ | |
252b5132 | 2585 | |
ea1562b3 NC |
2586 | static void |
2587 | emit_sextX (const expressionS *tok, | |
2588 | int ntok, | |
2589 | const void * vlgsize) | |
2590 | { | |
2591 | long lgsize = (long) vlgsize; | |
252b5132 | 2592 | |
ea1562b3 NC |
2593 | if (alpha_target & AXP_OPCODE_BWX) |
2594 | assemble_tokens (sextX_op[lgsize], tok, ntok, 0); | |
2595 | else | |
2596 | { | |
2597 | int bitshift = 64 - 8 * (1 << lgsize); | |
2598 | expressionS newtok[3]; | |
252b5132 | 2599 | |
ea1562b3 NC |
2600 | /* Emit "sll src,bits,dst". */ |
2601 | newtok[0] = tok[0]; | |
2602 | set_tok_const (newtok[1], bitshift); | |
2603 | newtok[2] = tok[ntok - 1]; | |
2604 | assemble_tokens ("sll", newtok, 3, 1); | |
252b5132 | 2605 | |
ea1562b3 NC |
2606 | /* Emit "sra dst,bits,dst". */ |
2607 | newtok[0] = newtok[2]; | |
2608 | assemble_tokens ("sra", newtok, 3, 1); | |
252b5132 | 2609 | } |
ea1562b3 | 2610 | } |
252b5132 | 2611 | |
ea1562b3 | 2612 | /* Implement the division and modulus macros. */ |
252b5132 RH |
2613 | |
2614 | #ifdef OBJ_EVAX | |
252b5132 | 2615 | |
ea1562b3 NC |
2616 | /* Make register usage like in normal procedure call. |
2617 | Don't clobber PV and RA. */ | |
252b5132 | 2618 | |
ea1562b3 NC |
2619 | static void |
2620 | emit_division (const expressionS *tok, | |
2621 | int ntok, | |
2622 | const void * symname) | |
2623 | { | |
2624 | /* DIVISION and MODULUS. Yech. | |
252b5132 | 2625 | |
ea1562b3 NC |
2626 | Convert |
2627 | OP x,y,result | |
2628 | to | |
2629 | mov x,R16 # if x != R16 | |
2630 | mov y,R17 # if y != R17 | |
2631 | lda AT,__OP | |
2632 | jsr AT,(AT),0 | |
2633 | mov R0,result | |
252b5132 | 2634 | |
ea1562b3 NC |
2635 | with appropriate optimizations if R0,R16,R17 are the registers |
2636 | specified by the compiler. */ | |
252b5132 | 2637 | |
ea1562b3 NC |
2638 | int xr, yr, rr; |
2639 | symbolS *sym; | |
2640 | expressionS newtok[3]; | |
252b5132 | 2641 | |
ea1562b3 NC |
2642 | xr = regno (tok[0].X_add_number); |
2643 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2644 | |
ea1562b3 NC |
2645 | if (ntok < 3) |
2646 | rr = xr; | |
2647 | else | |
2648 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2649 | |
ea1562b3 NC |
2650 | /* Move the operands into the right place. */ |
2651 | if (yr == AXP_REG_R16 && xr == AXP_REG_R17) | |
2652 | { | |
2653 | /* They are in exactly the wrong order -- swap through AT. */ | |
2654 | if (alpha_noat_on) | |
2655 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2656 | |
ea1562b3 NC |
2657 | set_tok_reg (newtok[0], AXP_REG_R16); |
2658 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2659 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2660 | |
ea1562b3 NC |
2661 | set_tok_reg (newtok[0], AXP_REG_R17); |
2662 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2663 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2664 | |
ea1562b3 NC |
2665 | set_tok_reg (newtok[0], AXP_REG_AT); |
2666 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2667 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2668 | } |
2669 | else | |
2670 | { | |
ea1562b3 | 2671 | if (yr == AXP_REG_R16) |
252b5132 | 2672 | { |
ea1562b3 NC |
2673 | set_tok_reg (newtok[0], AXP_REG_R16); |
2674 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2675 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2676 | } |
2677 | ||
ea1562b3 | 2678 | if (xr != AXP_REG_R16) |
252b5132 | 2679 | { |
ea1562b3 NC |
2680 | set_tok_reg (newtok[0], xr); |
2681 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2682 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2683 | } |
2684 | ||
ea1562b3 | 2685 | if (yr != AXP_REG_R16 && yr != AXP_REG_R17) |
252b5132 | 2686 | { |
ea1562b3 NC |
2687 | set_tok_reg (newtok[0], yr); |
2688 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2689 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2690 | } |
252b5132 RH |
2691 | } |
2692 | ||
ea1562b3 | 2693 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2694 | |
ea1562b3 NC |
2695 | set_tok_reg (newtok[0], AXP_REG_AT); |
2696 | set_tok_sym (newtok[1], sym, 0); | |
2697 | assemble_tokens ("lda", newtok, 2, 1); | |
252b5132 | 2698 | |
ea1562b3 NC |
2699 | /* Call the division routine. */ |
2700 | set_tok_reg (newtok[0], AXP_REG_AT); | |
2701 | set_tok_cpreg (newtok[1], AXP_REG_AT); | |
2702 | set_tok_const (newtok[2], 0); | |
2703 | assemble_tokens ("jsr", newtok, 3, 1); | |
252b5132 | 2704 | |
ea1562b3 NC |
2705 | /* Move the result to the right place. */ |
2706 | if (rr != AXP_REG_R0) | |
2707 | { | |
2708 | set_tok_reg (newtok[0], AXP_REG_R0); | |
2709 | set_tok_reg (newtok[1], rr); | |
2710 | assemble_tokens ("mov", newtok, 2, 1); | |
2711 | } | |
252b5132 RH |
2712 | } |
2713 | ||
ea1562b3 | 2714 | #else /* !OBJ_EVAX */ |
252b5132 RH |
2715 | |
2716 | static void | |
ea1562b3 NC |
2717 | emit_division (const expressionS *tok, |
2718 | int ntok, | |
2719 | const void * symname) | |
252b5132 | 2720 | { |
ea1562b3 NC |
2721 | /* DIVISION and MODULUS. Yech. |
2722 | Convert | |
2723 | OP x,y,result | |
2724 | to | |
2725 | lda pv,__OP | |
2726 | mov x,t10 | |
2727 | mov y,t11 | |
2728 | jsr t9,(pv),__OP | |
2729 | mov t12,result | |
252b5132 | 2730 | |
ea1562b3 NC |
2731 | with appropriate optimizations if t10,t11,t12 are the registers |
2732 | specified by the compiler. */ | |
252b5132 | 2733 | |
ea1562b3 NC |
2734 | int xr, yr, rr; |
2735 | symbolS *sym; | |
252b5132 | 2736 | expressionS newtok[3]; |
252b5132 | 2737 | |
ea1562b3 NC |
2738 | xr = regno (tok[0].X_add_number); |
2739 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2740 | |
ea1562b3 NC |
2741 | if (ntok < 3) |
2742 | rr = xr; | |
2743 | else | |
2744 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2745 | |
ea1562b3 | 2746 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2747 | |
ea1562b3 NC |
2748 | /* Move the operands into the right place. */ |
2749 | if (yr == AXP_REG_T10 && xr == AXP_REG_T11) | |
252b5132 | 2750 | { |
ea1562b3 NC |
2751 | /* They are in exactly the wrong order -- swap through AT. */ |
2752 | if (alpha_noat_on) | |
2753 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2754 | |
ea1562b3 NC |
2755 | set_tok_reg (newtok[0], AXP_REG_T10); |
2756 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2757 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2758 | |
ea1562b3 NC |
2759 | set_tok_reg (newtok[0], AXP_REG_T11); |
2760 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2761 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2762 | |
ea1562b3 NC |
2763 | set_tok_reg (newtok[0], AXP_REG_AT); |
2764 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2765 | assemble_tokens ("mov", newtok, 2, 1); | |
2766 | } | |
2767 | else | |
2768 | { | |
2769 | if (yr == AXP_REG_T10) | |
2770 | { | |
2771 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2772 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2773 | assemble_tokens ("mov", newtok, 2, 1); | |
2774 | } | |
2775 | ||
2776 | if (xr != AXP_REG_T10) | |
2777 | { | |
2778 | set_tok_reg (newtok[0], xr); | |
2779 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2780 | assemble_tokens ("mov", newtok, 2, 1); | |
2781 | } | |
2782 | ||
2783 | if (yr != AXP_REG_T10 && yr != AXP_REG_T11) | |
2784 | { | |
2785 | set_tok_reg (newtok[0], yr); | |
2786 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2787 | assemble_tokens ("mov", newtok, 2, 1); | |
2788 | } | |
2789 | } | |
2790 | ||
2791 | /* Call the division routine. */ | |
2792 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2793 | set_tok_sym (newtok[1], sym, 0); | |
2794 | assemble_tokens ("jsr", newtok, 2, 1); | |
2795 | ||
2796 | /* Reload the GP register. */ | |
2797 | #ifdef OBJ_AOUT | |
2798 | FIXME | |
2799 | #endif | |
2800 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2801 | set_tok_reg (newtok[0], alpha_gp_register); | |
2802 | set_tok_const (newtok[1], 0); | |
2803 | set_tok_preg (newtok[2], AXP_REG_T9); | |
2804 | assemble_tokens ("ldgp", newtok, 3, 1); | |
2805 | #endif | |
2806 | ||
2807 | /* Move the result to the right place. */ | |
2808 | if (rr != AXP_REG_T12) | |
2809 | { | |
2810 | set_tok_reg (newtok[0], AXP_REG_T12); | |
2811 | set_tok_reg (newtok[1], rr); | |
2812 | assemble_tokens ("mov", newtok, 2, 1); | |
2813 | } | |
2814 | } | |
2815 | ||
2816 | #endif /* !OBJ_EVAX */ | |
2817 | ||
2818 | /* The jsr and jmp macros differ from their instruction counterparts | |
2819 | in that they can load the target address and default most | |
2820 | everything. */ | |
2821 | ||
2822 | static void | |
2823 | emit_jsrjmp (const expressionS *tok, | |
2824 | int ntok, | |
2825 | const void * vopname) | |
252b5132 | 2826 | { |
ea1562b3 | 2827 | const char *opname = (const char *) vopname; |
252b5132 | 2828 | struct alpha_insn insn; |
ea1562b3 NC |
2829 | expressionS newtok[3]; |
2830 | int r, tokidx = 0; | |
2831 | long lituse = 0; | |
252b5132 | 2832 | |
ea1562b3 NC |
2833 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2834 | r = regno (tok[tokidx++].X_add_number); | |
252b5132 | 2835 | else |
ea1562b3 | 2836 | r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA; |
252b5132 | 2837 | |
ea1562b3 | 2838 | set_tok_reg (newtok[0], r); |
252b5132 | 2839 | |
ea1562b3 NC |
2840 | if (tokidx < ntok && |
2841 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2842 | r = regno (tok[tokidx++].X_add_number); | |
2843 | #ifdef OBJ_EVAX | |
2844 | /* Keep register if jsr $n.<sym>. */ | |
2845 | #else | |
252b5132 RH |
2846 | else |
2847 | { | |
ea1562b3 | 2848 | int basereg = alpha_gp_register; |
198f1251 TG |
2849 | lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], |
2850 | &basereg, NULL, opname); | |
252b5132 | 2851 | } |
ea1562b3 | 2852 | #endif |
252b5132 | 2853 | |
ea1562b3 | 2854 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2855 | |
198f1251 | 2856 | #ifndef OBJ_EVAX |
ea1562b3 NC |
2857 | if (tokidx < ntok) |
2858 | newtok[2] = tok[tokidx]; | |
2859 | else | |
2860 | #endif | |
2861 | set_tok_const (newtok[2], 0); | |
2862 | ||
2863 | assemble_tokens_to_insn (opname, newtok, 3, &insn); | |
252b5132 RH |
2864 | |
2865 | if (lituse) | |
2866 | { | |
9c2799c2 | 2867 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 | 2868 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR; |
19f78583 | 2869 | insn.fixups[insn.nfixups].exp.X_op = O_absent; |
252b5132 | 2870 | insn.nfixups++; |
19f78583 | 2871 | insn.sequence = lituse; |
252b5132 RH |
2872 | } |
2873 | ||
198f1251 TG |
2874 | #ifdef OBJ_EVAX |
2875 | if (alpha_flag_replace | |
2876 | && r == AXP_REG_RA | |
2877 | && tok[tokidx].X_add_symbol | |
2878 | && alpha_linkage_symbol) | |
2879 | { | |
51794af8 | 2880 | /* Create a BOH reloc for 'jsr $27,NAME'. */ |
198f1251 TG |
2881 | const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol); |
2882 | int symlen = strlen (symname); | |
2883 | char *ensymname; | |
2884 | ||
51794af8 | 2885 | /* Build the entry name as 'NAME..en'. */ |
39a0d071 | 2886 | ensymname = (char *) xmalloc (symlen + 5); |
198f1251 TG |
2887 | memcpy (ensymname, symname, symlen); |
2888 | memcpy (ensymname + symlen, "..en", 5); | |
2889 | ||
9c2799c2 | 2890 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
198f1251 TG |
2891 | if (insn.nfixups > 0) |
2892 | { | |
2893 | memmove (&insn.fixups[1], &insn.fixups[0], | |
2894 | sizeof(struct alpha_fixup) * insn.nfixups); | |
2895 | } | |
2896 | ||
2897 | /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP | |
2898 | case in load_expression. See B.4.5.2 of the OpenVMS | |
2899 | Linker Utility Manual. */ | |
2900 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH; | |
2901 | insn.fixups[0].exp.X_op = O_symbol; | |
2902 | insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname); | |
2903 | insn.fixups[0].exp.X_add_number = 0; | |
2904 | insn.fixups[0].xtrasym = alpha_linkage_symbol; | |
2905 | insn.fixups[0].procsym = alpha_evax_proc->symbol; | |
2906 | insn.nfixups++; | |
2907 | alpha_linkage_symbol = 0; | |
39a0d071 | 2908 | free (ensymname); |
198f1251 TG |
2909 | } |
2910 | #endif | |
2911 | ||
252b5132 RH |
2912 | emit_insn (&insn); |
2913 | } | |
2914 | ||
ea1562b3 NC |
2915 | /* The ret and jcr instructions differ from their instruction |
2916 | counterparts in that everything can be defaulted. */ | |
252b5132 RH |
2917 | |
2918 | static void | |
ea1562b3 NC |
2919 | emit_retjcr (const expressionS *tok, |
2920 | int ntok, | |
2921 | const void * vopname) | |
252b5132 | 2922 | { |
ea1562b3 NC |
2923 | const char *opname = (const char *) vopname; |
2924 | expressionS newtok[3]; | |
2925 | int r, tokidx = 0; | |
252b5132 | 2926 | |
ea1562b3 NC |
2927 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2928 | r = regno (tok[tokidx++].X_add_number); | |
2929 | else | |
2930 | r = AXP_REG_ZERO; | |
252b5132 | 2931 | |
ea1562b3 | 2932 | set_tok_reg (newtok[0], r); |
19f78583 | 2933 | |
ea1562b3 NC |
2934 | if (tokidx < ntok && |
2935 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2936 | r = regno (tok[tokidx++].X_add_number); | |
2937 | else | |
2938 | r = AXP_REG_RA; | |
19f78583 | 2939 | |
ea1562b3 | 2940 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2941 | |
ea1562b3 NC |
2942 | if (tokidx < ntok) |
2943 | newtok[2] = tok[tokidx]; | |
2944 | else | |
2945 | set_tok_const (newtok[2], strcmp (opname, "ret") == 0); | |
252b5132 | 2946 | |
ea1562b3 | 2947 | assemble_tokens (opname, newtok, 3, 0); |
252b5132 RH |
2948 | } |
2949 | ||
ea1562b3 | 2950 | /* Implement the ldgp macro. */ |
252b5132 RH |
2951 | |
2952 | static void | |
87975d2a | 2953 | emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED, |
ea1562b3 NC |
2954 | int ntok ATTRIBUTE_UNUSED, |
2955 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 2956 | { |
ea1562b3 NC |
2957 | #ifdef OBJ_AOUT |
2958 | FIXME | |
2959 | #endif | |
2960 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2961 | /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)" | |
2962 | with appropriate constants and relocations. */ | |
2963 | struct alpha_insn insn; | |
252b5132 | 2964 | expressionS newtok[3]; |
ea1562b3 | 2965 | expressionS addend; |
252b5132 | 2966 | |
ea1562b3 NC |
2967 | #ifdef OBJ_ECOFF |
2968 | if (regno (tok[2].X_add_number) == AXP_REG_PV) | |
2969 | ecoff_set_gp_prolog_size (0); | |
2970 | #endif | |
252b5132 | 2971 | |
ea1562b3 NC |
2972 | newtok[0] = tok[0]; |
2973 | set_tok_const (newtok[1], 0); | |
2974 | newtok[2] = tok[2]; | |
252b5132 | 2975 | |
ea1562b3 | 2976 | assemble_tokens_to_insn ("ldah", newtok, 3, &insn); |
252b5132 | 2977 | |
ea1562b3 | 2978 | addend = tok[1]; |
252b5132 | 2979 | |
ea1562b3 NC |
2980 | #ifdef OBJ_ECOFF |
2981 | if (addend.X_op != O_constant) | |
2982 | as_bad (_("can not resolve expression")); | |
2983 | addend.X_op = O_symbol; | |
2984 | addend.X_add_symbol = alpha_gp_symbol; | |
2985 | #endif | |
252b5132 | 2986 | |
ea1562b3 NC |
2987 | insn.nfixups = 1; |
2988 | insn.fixups[0].exp = addend; | |
2989 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2990 | insn.sequence = next_sequence_num; | |
252b5132 | 2991 | |
ea1562b3 | 2992 | emit_insn (&insn); |
252b5132 | 2993 | |
ea1562b3 | 2994 | set_tok_preg (newtok[2], tok[0].X_add_number); |
252b5132 | 2995 | |
ea1562b3 | 2996 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); |
252b5132 | 2997 | |
ea1562b3 NC |
2998 | #ifdef OBJ_ECOFF |
2999 | addend.X_add_number += 4; | |
3000 | #endif | |
252b5132 | 3001 | |
ea1562b3 NC |
3002 | insn.nfixups = 1; |
3003 | insn.fixups[0].exp = addend; | |
3004 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
3005 | insn.sequence = next_sequence_num--; | |
252b5132 | 3006 | |
ea1562b3 | 3007 | emit_insn (&insn); |
87975d2a | 3008 | #endif /* OBJ_ECOFF || OBJ_ELF */ |
252b5132 RH |
3009 | } |
3010 | ||
ea1562b3 | 3011 | /* The macro table. */ |
252b5132 | 3012 | |
ea1562b3 | 3013 | static const struct alpha_macro alpha_macros[] = |
252b5132 | 3014 | { |
ea1562b3 NC |
3015 | /* Load/Store macros. */ |
3016 | { "lda", emit_lda, NULL, | |
3017 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3018 | { "ldah", emit_ldah, NULL, | |
3019 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3020 | |
ea1562b3 NC |
3021 | { "ldl", emit_ir_load, "ldl", |
3022 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3023 | { "ldl_l", emit_ir_load, "ldl_l", | |
3024 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3025 | { "ldq", emit_ir_load, "ldq", | |
3026 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3027 | { "ldq_l", emit_ir_load, "ldq_l", | |
3028 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3029 | { "ldq_u", emit_ir_load, "ldq_u", | |
3030 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3031 | { "ldf", emit_loadstore, "ldf", | |
3032 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3033 | { "ldg", emit_loadstore, "ldg", | |
3034 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3035 | { "lds", emit_loadstore, "lds", | |
3036 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3037 | { "ldt", emit_loadstore, "ldt", | |
3038 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3039 | |
ea1562b3 NC |
3040 | { "ldb", emit_ldX, (void *) 0, |
3041 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3042 | { "ldbu", emit_ldXu, (void *) 0, | |
3043 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3044 | { "ldw", emit_ldX, (void *) 1, | |
3045 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3046 | { "ldwu", emit_ldXu, (void *) 1, | |
3047 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3048 | |
ea1562b3 NC |
3049 | { "uldw", emit_uldX, (void *) 1, |
3050 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3051 | { "uldwu", emit_uldXu, (void *) 1, | |
3052 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3053 | { "uldl", emit_uldX, (void *) 2, | |
3054 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3055 | { "uldlu", emit_uldXu, (void *) 2, | |
3056 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3057 | { "uldq", emit_uldXu, (void *) 3, | |
3058 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3059 | |
ea1562b3 NC |
3060 | { "ldgp", emit_ldgp, NULL, |
3061 | { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } }, | |
252b5132 | 3062 | |
ea1562b3 NC |
3063 | { "ldi", emit_lda, NULL, |
3064 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3065 | { "ldil", emit_ldil, NULL, | |
3066 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3067 | { "ldiq", emit_lda, NULL, | |
3068 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3069 | |
ea1562b3 NC |
3070 | { "stl", emit_loadstore, "stl", |
3071 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3072 | { "stl_c", emit_loadstore, "stl_c", | |
3073 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3074 | { "stq", emit_loadstore, "stq", | |
3075 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3076 | { "stq_c", emit_loadstore, "stq_c", | |
3077 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3078 | { "stq_u", emit_loadstore, "stq_u", | |
3079 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3080 | { "stf", emit_loadstore, "stf", | |
3081 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3082 | { "stg", emit_loadstore, "stg", | |
3083 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3084 | { "sts", emit_loadstore, "sts", | |
3085 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3086 | { "stt", emit_loadstore, "stt", | |
3087 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3088 | |
ea1562b3 NC |
3089 | { "stb", emit_stX, (void *) 0, |
3090 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3091 | { "stw", emit_stX, (void *) 1, | |
3092 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3093 | { "ustw", emit_ustX, (void *) 1, | |
3094 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3095 | { "ustl", emit_ustX, (void *) 2, | |
3096 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3097 | { "ustq", emit_ustX, (void *) 3, | |
3098 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3099 | |
ea1562b3 | 3100 | /* Arithmetic macros. */ |
19f78583 | 3101 | |
ea1562b3 NC |
3102 | { "sextb", emit_sextX, (void *) 0, |
3103 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3104 | MACRO_IR, MACRO_EOA, | |
3105 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
3106 | { "sextw", emit_sextX, (void *) 1, | |
3107 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3108 | MACRO_IR, MACRO_EOA, | |
3109 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
252b5132 | 3110 | |
ea1562b3 NC |
3111 | { "divl", emit_division, "__divl", |
3112 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3113 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3114 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3115 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3116 | { "divlu", emit_division, "__divlu", | |
3117 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3118 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3119 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3120 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3121 | { "divq", emit_division, "__divq", | |
3122 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3123 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3124 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3125 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3126 | { "divqu", emit_division, "__divqu", | |
3127 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3128 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3129 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3130 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3131 | { "reml", emit_division, "__reml", | |
3132 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3133 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3134 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3135 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3136 | { "remlu", emit_division, "__remlu", | |
3137 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3138 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3139 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3140 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3141 | { "remq", emit_division, "__remq", | |
3142 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3143 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3144 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3145 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3146 | { "remqu", emit_division, "__remqu", | |
3147 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3148 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3149 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3150 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
252b5132 | 3151 | |
ea1562b3 NC |
3152 | { "jsr", emit_jsrjmp, "jsr", |
3153 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3154 | MACRO_PIR, MACRO_EOA, | |
3155 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3156 | MACRO_EXP, MACRO_EOA } }, | |
3157 | { "jmp", emit_jsrjmp, "jmp", | |
3158 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3159 | MACRO_PIR, MACRO_EOA, | |
3160 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3161 | MACRO_EXP, MACRO_EOA } }, | |
3162 | { "ret", emit_retjcr, "ret", | |
3163 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3164 | MACRO_IR, MACRO_EOA, | |
3165 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3166 | MACRO_PIR, MACRO_EOA, | |
3167 | MACRO_EXP, MACRO_EOA, | |
3168 | MACRO_EOA } }, | |
3169 | { "jcr", emit_retjcr, "jcr", | |
3170 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3171 | MACRO_IR, MACRO_EOA, | |
3172 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3173 | MACRO_PIR, MACRO_EOA, | |
3174 | MACRO_EXP, MACRO_EOA, | |
3175 | MACRO_EOA } }, | |
3176 | { "jsr_coroutine", emit_retjcr, "jcr", | |
3177 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3178 | MACRO_IR, MACRO_EOA, | |
3179 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3180 | MACRO_PIR, MACRO_EOA, | |
3181 | MACRO_EXP, MACRO_EOA, | |
3182 | MACRO_EOA } }, | |
3183 | }; | |
252b5132 | 3184 | |
ea1562b3 NC |
3185 | static const unsigned int alpha_num_macros |
3186 | = sizeof (alpha_macros) / sizeof (*alpha_macros); | |
19f78583 | 3187 | |
ea1562b3 NC |
3188 | /* Search forward through all variants of a macro looking for a syntax |
3189 | match. */ | |
19f78583 | 3190 | |
ea1562b3 NC |
3191 | static const struct alpha_macro * |
3192 | find_macro_match (const struct alpha_macro *first_macro, | |
3193 | const expressionS *tok, | |
3194 | int *pntok) | |
252b5132 | 3195 | |
ea1562b3 NC |
3196 | { |
3197 | const struct alpha_macro *macro = first_macro; | |
3198 | int ntok = *pntok; | |
252b5132 | 3199 | |
ea1562b3 NC |
3200 | do |
3201 | { | |
3202 | const enum alpha_macro_arg *arg = macro->argsets; | |
3203 | int tokidx = 0; | |
19f78583 | 3204 | |
ea1562b3 | 3205 | while (*arg) |
19f78583 | 3206 | { |
ea1562b3 NC |
3207 | switch (*arg) |
3208 | { | |
3209 | case MACRO_EOA: | |
3210 | if (tokidx == ntok) | |
3211 | return macro; | |
3212 | else | |
3213 | tokidx = 0; | |
3214 | break; | |
252b5132 | 3215 | |
ea1562b3 NC |
3216 | /* Index register. */ |
3217 | case MACRO_IR: | |
3218 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3219 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3220 | goto match_failed; | |
3221 | ++tokidx; | |
3222 | break; | |
19f78583 | 3223 | |
ea1562b3 NC |
3224 | /* Parenthesized index register. */ |
3225 | case MACRO_PIR: | |
3226 | if (tokidx >= ntok || tok[tokidx].X_op != O_pregister | |
3227 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3228 | goto match_failed; | |
3229 | ++tokidx; | |
3230 | break; | |
19f78583 | 3231 | |
ea1562b3 NC |
3232 | /* Optional parenthesized index register. */ |
3233 | case MACRO_OPIR: | |
3234 | if (tokidx < ntok && tok[tokidx].X_op == O_pregister | |
3235 | && is_ir_num (tok[tokidx].X_add_number)) | |
3236 | ++tokidx; | |
3237 | break; | |
252b5132 | 3238 | |
ea1562b3 NC |
3239 | /* Leading comma with a parenthesized index register. */ |
3240 | case MACRO_CPIR: | |
3241 | if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister | |
3242 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3243 | goto match_failed; | |
3244 | ++tokidx; | |
3245 | break; | |
252b5132 | 3246 | |
ea1562b3 NC |
3247 | /* Floating point register. */ |
3248 | case MACRO_FPR: | |
3249 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3250 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
3251 | goto match_failed; | |
3252 | ++tokidx; | |
3253 | break; | |
252b5132 | 3254 | |
ea1562b3 NC |
3255 | /* Normal expression. */ |
3256 | case MACRO_EXP: | |
3257 | if (tokidx >= ntok) | |
3258 | goto match_failed; | |
3259 | switch (tok[tokidx].X_op) | |
3260 | { | |
3261 | case O_illegal: | |
3262 | case O_absent: | |
3263 | case O_register: | |
3264 | case O_pregister: | |
3265 | case O_cpregister: | |
3266 | case O_literal: | |
3267 | case O_lituse_base: | |
3268 | case O_lituse_bytoff: | |
3269 | case O_lituse_jsr: | |
3270 | case O_gpdisp: | |
3271 | case O_gprelhigh: | |
3272 | case O_gprellow: | |
3273 | case O_gprel: | |
3274 | case O_samegp: | |
3275 | goto match_failed; | |
252b5132 | 3276 | |
ea1562b3 NC |
3277 | default: |
3278 | break; | |
3279 | } | |
3280 | ++tokidx; | |
3281 | break; | |
19f78583 | 3282 | |
ea1562b3 NC |
3283 | match_failed: |
3284 | while (*arg != MACRO_EOA) | |
3285 | ++arg; | |
3286 | tokidx = 0; | |
3287 | break; | |
3288 | } | |
3289 | ++arg; | |
19f78583 | 3290 | } |
252b5132 | 3291 | } |
ea1562b3 NC |
3292 | while (++macro - alpha_macros < (int) alpha_num_macros |
3293 | && !strcmp (macro->name, first_macro->name)); | |
3294 | ||
3295 | return NULL; | |
252b5132 RH |
3296 | } |
3297 | ||
ea1562b3 NC |
3298 | /* Given an opcode name and a pre-tokenized set of arguments, take the |
3299 | opcode all the way through emission. */ | |
252b5132 RH |
3300 | |
3301 | static void | |
ea1562b3 NC |
3302 | assemble_tokens (const char *opname, |
3303 | const expressionS *tok, | |
3304 | int ntok, | |
3305 | int local_macros_on) | |
252b5132 | 3306 | { |
ea1562b3 NC |
3307 | int found_something = 0; |
3308 | const struct alpha_opcode *opcode; | |
3309 | const struct alpha_macro *macro; | |
3310 | int cpumatch = 1; | |
21d799b5 | 3311 | extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; |
252b5132 | 3312 | |
ea1562b3 NC |
3313 | #ifdef RELOC_OP_P |
3314 | /* If a user-specified relocation is present, this is not a macro. */ | |
3315 | if (ntok && USER_RELOC_P (tok[ntok - 1].X_op)) | |
3316 | { | |
3317 | reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc; | |
3318 | ntok--; | |
3319 | } | |
3320 | else | |
3321 | #endif | |
3322 | if (local_macros_on) | |
3323 | { | |
3324 | macro = ((const struct alpha_macro *) | |
3325 | hash_find (alpha_macro_hash, opname)); | |
3326 | if (macro) | |
3327 | { | |
3328 | found_something = 1; | |
3329 | macro = find_macro_match (macro, tok, &ntok); | |
3330 | if (macro) | |
3331 | { | |
3332 | (*macro->emit) (tok, ntok, macro->arg); | |
3333 | return; | |
3334 | } | |
3335 | } | |
3336 | } | |
252b5132 | 3337 | |
ea1562b3 NC |
3338 | /* Search opcodes. */ |
3339 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
3340 | if (opcode) | |
3341 | { | |
3342 | found_something = 1; | |
3343 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
3344 | if (opcode) | |
3345 | { | |
3346 | struct alpha_insn insn; | |
3347 | assemble_insn (opcode, tok, ntok, &insn, reloc); | |
252b5132 | 3348 | |
ea1562b3 NC |
3349 | /* Copy the sequence number for the reloc from the reloc token. */ |
3350 | if (reloc != BFD_RELOC_UNUSED) | |
3351 | insn.sequence = tok[ntok].X_add_number; | |
252b5132 | 3352 | |
ea1562b3 NC |
3353 | emit_insn (&insn); |
3354 | return; | |
3355 | } | |
3356 | } | |
252b5132 | 3357 | |
ea1562b3 NC |
3358 | if (found_something) |
3359 | { | |
3360 | if (cpumatch) | |
3361 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
3362 | else | |
3363 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
3364 | alpha_target_name); | |
3365 | } | |
3366 | else | |
3367 | as_bad (_("unknown opcode `%s'"), opname); | |
3368 | } | |
3369 | \f | |
3370 | #ifdef OBJ_EVAX | |
252b5132 | 3371 | |
576d3307 | 3372 | /* Add sym+addend to link pool. |
8aacb050 | 3373 | Return offset from curent procedure value (pv) to entry in link pool. |
252b5132 | 3374 | |
ea1562b3 | 3375 | Add new fixup only if offset isn't 16bit. */ |
252b5132 | 3376 | |
198f1251 | 3377 | static symbolS * |
8aacb050 | 3378 | add_to_link_pool (symbolS *sym, offsetT addend) |
ea1562b3 | 3379 | { |
8aacb050 | 3380 | symbolS *basesym; |
ea1562b3 NC |
3381 | segT current_section = now_seg; |
3382 | int current_subsec = now_subseg; | |
ea1562b3 NC |
3383 | char *p; |
3384 | segment_info_type *seginfo = seg_info (alpha_link_section); | |
3385 | fixS *fixp; | |
198f1251 TG |
3386 | symbolS *linksym, *expsym; |
3387 | expressionS e; | |
3739860c | 3388 | |
8aacb050 TG |
3389 | basesym = alpha_evax_proc->symbol; |
3390 | ||
ea1562b3 NC |
3391 | /* @@ This assumes all entries in a given section will be of the same |
3392 | size... Probably correct, but unwise to rely on. */ | |
3393 | /* This must always be called with the same subsegment. */ | |
252b5132 | 3394 | |
ea1562b3 NC |
3395 | if (seginfo->frchainP) |
3396 | for (fixp = seginfo->frchainP->fix_root; | |
3397 | fixp != (fixS *) NULL; | |
198f1251 | 3398 | fixp = fixp->fx_next) |
ea1562b3 | 3399 | { |
198f1251 TG |
3400 | if (fixp->fx_addsy == sym |
3401 | && fixp->fx_offset == (valueT)addend | |
3402 | && fixp->tc_fix_data.info | |
3403 | && fixp->tc_fix_data.info->sym | |
3404 | && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym) | |
3405 | return fixp->tc_fix_data.info->sym; | |
ea1562b3 | 3406 | } |
252b5132 | 3407 | |
8aacb050 | 3408 | /* Not found, add a new entry. */ |
ea1562b3 | 3409 | subseg_set (alpha_link_section, 0); |
198f1251 TG |
3410 | linksym = symbol_new |
3411 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
ea1562b3 NC |
3412 | p = frag_more (8); |
3413 | memset (p, 0, 8); | |
252b5132 | 3414 | |
0189c2eb | 3415 | /* Create a symbol for 'basesym - linksym' (offset of the added entry). */ |
198f1251 TG |
3416 | e.X_op = O_subtract; |
3417 | e.X_add_symbol = linksym; | |
3418 | e.X_op_symbol = basesym; | |
3419 | e.X_add_number = 0; | |
3420 | expsym = make_expr_symbol (&e); | |
3421 | ||
0189c2eb | 3422 | /* Create a fixup for the entry. */ |
198f1251 | 3423 | fixp = fix_new |
576d3307 | 3424 | (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64); |
198f1251 TG |
3425 | fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--); |
3426 | fixp->tc_fix_data.info->sym = expsym; | |
252b5132 | 3427 | |
ea1562b3 | 3428 | subseg_set (current_section, current_subsec); |
0189c2eb TG |
3429 | |
3430 | /* Return the symbol. */ | |
198f1251 | 3431 | return expsym; |
ea1562b3 | 3432 | } |
ea1562b3 NC |
3433 | #endif /* OBJ_EVAX */ |
3434 | \f | |
3435 | /* Assembler directives. */ | |
252b5132 | 3436 | |
ea1562b3 NC |
3437 | /* Handle the .text pseudo-op. This is like the usual one, but it |
3438 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3439 | |
ea1562b3 NC |
3440 | static void |
3441 | s_alpha_text (int i) | |
ea1562b3 NC |
3442 | { |
3443 | #ifdef OBJ_ELF | |
3444 | obj_elf_text (i); | |
3445 | #else | |
3446 | s_text (i); | |
198f1251 TG |
3447 | #endif |
3448 | #ifdef OBJ_EVAX | |
3449 | { | |
3450 | symbolS * symbolP; | |
3451 | ||
3452 | symbolP = symbol_find (".text"); | |
3453 | if (symbolP == NULL) | |
3454 | { | |
3455 | symbolP = symbol_make (".text"); | |
3456 | S_SET_SEGMENT (symbolP, text_section); | |
3457 | symbol_table_insert (symbolP); | |
3458 | } | |
3459 | } | |
ea1562b3 NC |
3460 | #endif |
3461 | alpha_insn_label = NULL; | |
3462 | alpha_auto_align_on = 1; | |
3463 | alpha_current_align = 0; | |
252b5132 RH |
3464 | } |
3465 | ||
ea1562b3 NC |
3466 | /* Handle the .data pseudo-op. This is like the usual one, but it |
3467 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3468 | |
3469 | static void | |
ea1562b3 | 3470 | s_alpha_data (int i) |
252b5132 | 3471 | { |
ea1562b3 NC |
3472 | #ifdef OBJ_ELF |
3473 | obj_elf_data (i); | |
3474 | #else | |
3475 | s_data (i); | |
3476 | #endif | |
3477 | alpha_insn_label = NULL; | |
3478 | alpha_auto_align_on = 1; | |
3479 | alpha_current_align = 0; | |
252b5132 RH |
3480 | } |
3481 | ||
ea1562b3 | 3482 | #if defined (OBJ_ECOFF) || defined (OBJ_EVAX) |
252b5132 | 3483 | |
198f1251 | 3484 | /* Handle the OSF/1 and openVMS .comm pseudo quirks. */ |
252b5132 RH |
3485 | |
3486 | static void | |
ea1562b3 | 3487 | s_alpha_comm (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3488 | { |
ea1562b3 NC |
3489 | char *name; |
3490 | char c; | |
3491 | char *p; | |
d9319cec | 3492 | offsetT size; |
ea1562b3 | 3493 | symbolS *symbolP; |
d9319cec NC |
3494 | #ifdef OBJ_EVAX |
3495 | offsetT temp; | |
198f1251 | 3496 | int log_align = 0; |
d9319cec | 3497 | #endif |
252b5132 | 3498 | |
d02603dc | 3499 | c = get_symbol_name (&name); |
252b5132 | 3500 | |
ea1562b3 NC |
3501 | /* Just after name is now '\0'. */ |
3502 | p = input_line_pointer; | |
3503 | *p = c; | |
252b5132 | 3504 | |
d02603dc | 3505 | SKIP_WHITESPACE_AFTER_NAME (); |
252b5132 | 3506 | |
ea1562b3 NC |
3507 | /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */ |
3508 | if (*input_line_pointer == ',') | |
252b5132 | 3509 | { |
ea1562b3 NC |
3510 | input_line_pointer++; |
3511 | SKIP_WHITESPACE (); | |
3512 | } | |
198f1251 | 3513 | if ((size = get_absolute_expression ()) < 0) |
ea1562b3 | 3514 | { |
198f1251 | 3515 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); |
ea1562b3 NC |
3516 | ignore_rest_of_line (); |
3517 | return; | |
3518 | } | |
252b5132 | 3519 | |
ea1562b3 NC |
3520 | *p = 0; |
3521 | symbolP = symbol_find_or_make (name); | |
ea1562b3 | 3522 | *p = c; |
252b5132 | 3523 | |
ea1562b3 NC |
3524 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) |
3525 | { | |
3526 | as_bad (_("Ignoring attempt to re-define symbol")); | |
3527 | ignore_rest_of_line (); | |
3528 | return; | |
3529 | } | |
3530 | ||
3531 | #ifdef OBJ_EVAX | |
198f1251 TG |
3532 | if (*input_line_pointer != ',') |
3533 | temp = 8; /* Default alignment. */ | |
3534 | else | |
ea1562b3 | 3535 | { |
198f1251 TG |
3536 | input_line_pointer++; |
3537 | SKIP_WHITESPACE (); | |
3538 | temp = get_absolute_expression (); | |
ea1562b3 | 3539 | } |
198f1251 TG |
3540 | |
3541 | /* ??? Unlike on OSF/1, the alignment factor is not in log units. */ | |
3542 | while ((temp >>= 1) != 0) | |
3543 | ++log_align; | |
3544 | ||
3545 | if (*input_line_pointer == ',') | |
ea1562b3 | 3546 | { |
198f1251 TG |
3547 | /* Extended form of the directive |
3548 | ||
3549 | .comm symbol, size, alignment, section | |
3550 | ||
3551 | where the "common" semantics is transferred to the section. | |
3552 | The symbol is effectively an alias for the section name. */ | |
3553 | ||
3554 | segT sec; | |
6d4af3c2 | 3555 | const char *sec_name; |
198f1251 TG |
3556 | symbolS *sec_symbol; |
3557 | segT current_seg = now_seg; | |
3558 | subsegT current_subseg = now_subseg; | |
3559 | int cur_size; | |
3739860c | 3560 | |
198f1251 TG |
3561 | input_line_pointer++; |
3562 | SKIP_WHITESPACE (); | |
3563 | sec_name = s_alpha_section_name (); | |
3564 | sec_symbol = symbol_find_or_make (sec_name); | |
3565 | sec = subseg_new (sec_name, 0); | |
3566 | S_SET_SEGMENT (sec_symbol, sec); | |
3567 | symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
3568 | bfd_vms_set_section_flags (stdoutput, sec, 0, |
3569 | EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD); | |
198f1251 TG |
3570 | record_alignment (sec, log_align); |
3571 | ||
3572 | /* Reuse stab_string_size to store the size of the section. */ | |
3573 | cur_size = seg_info (sec)->stabu.stab_string_size; | |
3574 | if ((int) size > cur_size) | |
3575 | { | |
3576 | char *pfrag | |
3577 | = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, | |
3578 | (valueT)size - (valueT)cur_size, NULL); | |
3579 | *pfrag = 0; | |
3580 | seg_info (sec)->stabu.stab_string_size = (int)size; | |
3581 | } | |
3582 | ||
3583 | S_SET_SEGMENT (symbolP, sec); | |
3584 | ||
3585 | subseg_set (current_seg, current_subseg); | |
3586 | } | |
3587 | else | |
3588 | { | |
3589 | /* Regular form of the directive | |
3590 | ||
3591 | .comm symbol, size, alignment | |
3592 | ||
3593 | where the "common" semantics in on the symbol. | |
3594 | These symbols are assembled in the .bss section. */ | |
3595 | ||
3596 | char *pfrag; | |
3597 | segT current_seg = now_seg; | |
3598 | subsegT current_subseg = now_subseg; | |
3599 | ||
3600 | subseg_set (bss_section, 1); | |
3601 | frag_align (log_align, 0, 0); | |
3602 | record_alignment (bss_section, log_align); | |
3603 | ||
f8e24652 | 3604 | symbol_set_frag (symbolP, frag_now); |
198f1251 TG |
3605 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
3606 | size, NULL); | |
3607 | *pfrag = 0; | |
3608 | ||
3609 | S_SET_SEGMENT (symbolP, bss_section); | |
3610 | ||
3611 | subseg_set (current_seg, current_subseg); | |
252b5132 | 3612 | } |
ea1562b3 | 3613 | #endif |
3739860c | 3614 | |
198f1251 TG |
3615 | if (S_GET_VALUE (symbolP)) |
3616 | { | |
3617 | if (S_GET_VALUE (symbolP) != (valueT) size) | |
20203fb9 | 3618 | as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), |
198f1251 TG |
3619 | S_GET_NAME (symbolP), |
3620 | (long) S_GET_VALUE (symbolP), | |
3621 | (long) size); | |
3622 | } | |
252b5132 RH |
3623 | else |
3624 | { | |
198f1251 TG |
3625 | #ifndef OBJ_EVAX |
3626 | S_SET_VALUE (symbolP, (valueT) size); | |
ea1562b3 NC |
3627 | #endif |
3628 | S_SET_EXTERNAL (symbolP); | |
3629 | } | |
3739860c | 3630 | |
198f1251 TG |
3631 | #ifndef OBJ_EVAX |
3632 | know (symbolP->sy_frag == &zero_address_frag); | |
ea1562b3 | 3633 | #endif |
ea1562b3 NC |
3634 | demand_empty_rest_of_line (); |
3635 | } | |
252b5132 | 3636 | |
ea1562b3 | 3637 | #endif /* ! OBJ_ELF */ |
252b5132 | 3638 | |
ea1562b3 | 3639 | #ifdef OBJ_ECOFF |
252b5132 | 3640 | |
ea1562b3 NC |
3641 | /* Handle the .rdata pseudo-op. This is like the usual one, but it |
3642 | clears alpha_insn_label and restores auto alignment. */ | |
3643 | ||
3644 | static void | |
3645 | s_alpha_rdata (int ignore ATTRIBUTE_UNUSED) | |
3646 | { | |
87975d2a | 3647 | get_absolute_expression (); |
ea1562b3 NC |
3648 | subseg_new (".rdata", 0); |
3649 | demand_empty_rest_of_line (); | |
3650 | alpha_insn_label = NULL; | |
3651 | alpha_auto_align_on = 1; | |
3652 | alpha_current_align = 0; | |
252b5132 RH |
3653 | } |
3654 | ||
ea1562b3 NC |
3655 | #endif |
3656 | ||
3657 | #ifdef OBJ_ECOFF | |
3658 | ||
3659 | /* Handle the .sdata pseudo-op. This is like the usual one, but it | |
3660 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3661 | |
3662 | static void | |
ea1562b3 | 3663 | s_alpha_sdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3664 | { |
87975d2a | 3665 | get_absolute_expression (); |
ea1562b3 NC |
3666 | subseg_new (".sdata", 0); |
3667 | demand_empty_rest_of_line (); | |
3668 | alpha_insn_label = NULL; | |
3669 | alpha_auto_align_on = 1; | |
3670 | alpha_current_align = 0; | |
3671 | } | |
3672 | #endif | |
252b5132 | 3673 | |
ea1562b3 NC |
3674 | #ifdef OBJ_ELF |
3675 | struct alpha_elf_frame_data | |
3676 | { | |
3677 | symbolS *func_sym; | |
3678 | symbolS *func_end_sym; | |
3679 | symbolS *prologue_sym; | |
3680 | unsigned int mask; | |
3681 | unsigned int fmask; | |
3682 | int fp_regno; | |
3683 | int ra_regno; | |
3684 | offsetT frame_size; | |
3685 | offsetT mask_offset; | |
3686 | offsetT fmask_offset; | |
252b5132 | 3687 | |
ea1562b3 NC |
3688 | struct alpha_elf_frame_data *next; |
3689 | }; | |
252b5132 | 3690 | |
ea1562b3 NC |
3691 | static struct alpha_elf_frame_data *all_frame_data; |
3692 | static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data; | |
3693 | static struct alpha_elf_frame_data *cur_frame_data; | |
252b5132 | 3694 | |
2f0c68f2 CM |
3695 | extern int all_cfi_sections; |
3696 | ||
ea1562b3 NC |
3697 | /* Handle the .section pseudo-op. This is like the usual one, but it |
3698 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3699 | |
ea1562b3 NC |
3700 | static void |
3701 | s_alpha_section (int ignore ATTRIBUTE_UNUSED) | |
3702 | { | |
3703 | obj_elf_section (ignore); | |
252b5132 | 3704 | |
ea1562b3 NC |
3705 | alpha_insn_label = NULL; |
3706 | alpha_auto_align_on = 1; | |
3707 | alpha_current_align = 0; | |
3708 | } | |
252b5132 | 3709 | |
ea1562b3 NC |
3710 | static void |
3711 | s_alpha_ent (int dummy ATTRIBUTE_UNUSED) | |
3712 | { | |
3713 | if (ECOFF_DEBUGGING) | |
3714 | ecoff_directive_ent (0); | |
252b5132 RH |
3715 | else |
3716 | { | |
ea1562b3 | 3717 | char *name, name_end; |
d02603dc NC |
3718 | |
3719 | name_end = get_symbol_name (&name); | |
2f0c68f2 CM |
3720 | /* CFI_EMIT_eh_frame is the default. */ |
3721 | all_cfi_sections = CFI_EMIT_eh_frame; | |
252b5132 | 3722 | |
ea1562b3 | 3723 | if (! is_name_beginner (*name)) |
252b5132 | 3724 | { |
ea1562b3 | 3725 | as_warn (_(".ent directive has no name")); |
d02603dc | 3726 | (void) restore_line_pointer (name_end); |
252b5132 | 3727 | } |
ea1562b3 | 3728 | else |
252b5132 | 3729 | { |
ea1562b3 | 3730 | symbolS *sym; |
252b5132 | 3731 | |
ea1562b3 NC |
3732 | if (cur_frame_data) |
3733 | as_warn (_("nested .ent directives")); | |
252b5132 | 3734 | |
ea1562b3 NC |
3735 | sym = symbol_find_or_make (name); |
3736 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
252b5132 | 3737 | |
21d799b5 NC |
3738 | cur_frame_data = (struct alpha_elf_frame_data *) |
3739 | calloc (1, sizeof (*cur_frame_data)); | |
ea1562b3 | 3740 | cur_frame_data->func_sym = sym; |
252b5132 | 3741 | |
ea1562b3 NC |
3742 | /* Provide sensible defaults. */ |
3743 | cur_frame_data->fp_regno = 30; /* sp */ | |
3744 | cur_frame_data->ra_regno = 26; /* ra */ | |
252b5132 | 3745 | |
ea1562b3 NC |
3746 | *plast_frame_data = cur_frame_data; |
3747 | plast_frame_data = &cur_frame_data->next; | |
3748 | ||
3749 | /* The .ent directive is sometimes followed by a number. Not sure | |
3750 | what it really means, but ignore it. */ | |
3751 | *input_line_pointer = name_end; | |
d02603dc | 3752 | SKIP_WHITESPACE_AFTER_NAME (); |
ea1562b3 NC |
3753 | if (*input_line_pointer == ',') |
3754 | { | |
3755 | input_line_pointer++; | |
3756 | SKIP_WHITESPACE (); | |
3757 | } | |
3758 | if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') | |
3759 | (void) get_absolute_expression (); | |
3760 | } | |
3761 | demand_empty_rest_of_line (); | |
3762 | } | |
3763 | } | |
252b5132 RH |
3764 | |
3765 | static void | |
ea1562b3 | 3766 | s_alpha_end (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3767 | { |
ea1562b3 NC |
3768 | if (ECOFF_DEBUGGING) |
3769 | ecoff_directive_end (0); | |
252b5132 | 3770 | else |
ea1562b3 NC |
3771 | { |
3772 | char *name, name_end; | |
d02603dc NC |
3773 | |
3774 | name_end = get_symbol_name (&name); | |
252b5132 | 3775 | |
ea1562b3 NC |
3776 | if (! is_name_beginner (*name)) |
3777 | { | |
3778 | as_warn (_(".end directive has no name")); | |
ea1562b3 NC |
3779 | } |
3780 | else | |
3781 | { | |
3782 | symbolS *sym; | |
252b5132 | 3783 | |
ea1562b3 NC |
3784 | sym = symbol_find (name); |
3785 | if (!cur_frame_data) | |
3786 | as_warn (_(".end directive without matching .ent")); | |
3787 | else if (sym != cur_frame_data->func_sym) | |
3788 | as_warn (_(".end directive names different symbol than .ent")); | |
252b5132 | 3789 | |
ea1562b3 NC |
3790 | /* Create an expression to calculate the size of the function. */ |
3791 | if (sym && cur_frame_data) | |
3792 | { | |
3793 | OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym); | |
21d799b5 | 3794 | expressionS *exp = (expressionS *) xmalloc (sizeof (expressionS)); |
252b5132 | 3795 | |
ea1562b3 NC |
3796 | obj->size = exp; |
3797 | exp->X_op = O_subtract; | |
3798 | exp->X_add_symbol = symbol_temp_new_now (); | |
3799 | exp->X_op_symbol = sym; | |
3800 | exp->X_add_number = 0; | |
252b5132 | 3801 | |
ea1562b3 NC |
3802 | cur_frame_data->func_end_sym = exp->X_add_symbol; |
3803 | } | |
252b5132 | 3804 | |
ea1562b3 | 3805 | cur_frame_data = NULL; |
ea1562b3 | 3806 | } |
d02603dc NC |
3807 | |
3808 | (void) restore_line_pointer (name_end); | |
ea1562b3 NC |
3809 | demand_empty_rest_of_line (); |
3810 | } | |
252b5132 RH |
3811 | } |
3812 | ||
252b5132 | 3813 | static void |
ea1562b3 | 3814 | s_alpha_mask (int fp) |
252b5132 | 3815 | { |
ea1562b3 NC |
3816 | if (ECOFF_DEBUGGING) |
3817 | { | |
3818 | if (fp) | |
3819 | ecoff_directive_fmask (0); | |
3820 | else | |
3821 | ecoff_directive_mask (0); | |
3822 | } | |
252b5132 | 3823 | else |
ea1562b3 NC |
3824 | { |
3825 | long val; | |
3826 | offsetT offset; | |
252b5132 | 3827 | |
ea1562b3 NC |
3828 | if (!cur_frame_data) |
3829 | { | |
3830 | if (fp) | |
3831 | as_warn (_(".fmask outside of .ent")); | |
3832 | else | |
3833 | as_warn (_(".mask outside of .ent")); | |
3834 | discard_rest_of_line (); | |
3835 | return; | |
3836 | } | |
252b5132 | 3837 | |
ea1562b3 NC |
3838 | if (get_absolute_expression_and_terminator (&val) != ',') |
3839 | { | |
3840 | if (fp) | |
3841 | as_warn (_("bad .fmask directive")); | |
3842 | else | |
3843 | as_warn (_("bad .mask directive")); | |
3844 | --input_line_pointer; | |
3845 | discard_rest_of_line (); | |
3846 | return; | |
3847 | } | |
252b5132 | 3848 | |
ea1562b3 NC |
3849 | offset = get_absolute_expression (); |
3850 | demand_empty_rest_of_line (); | |
252b5132 | 3851 | |
ea1562b3 NC |
3852 | if (fp) |
3853 | { | |
3854 | cur_frame_data->fmask = val; | |
3855 | cur_frame_data->fmask_offset = offset; | |
3856 | } | |
3857 | else | |
3858 | { | |
3859 | cur_frame_data->mask = val; | |
3860 | cur_frame_data->mask_offset = offset; | |
3861 | } | |
3862 | } | |
252b5132 | 3863 | } |
252b5132 RH |
3864 | |
3865 | static void | |
ea1562b3 | 3866 | s_alpha_frame (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3867 | { |
ea1562b3 NC |
3868 | if (ECOFF_DEBUGGING) |
3869 | ecoff_directive_frame (0); | |
3870 | else | |
3871 | { | |
3872 | long val; | |
252b5132 | 3873 | |
ea1562b3 NC |
3874 | if (!cur_frame_data) |
3875 | { | |
3876 | as_warn (_(".frame outside of .ent")); | |
3877 | discard_rest_of_line (); | |
3878 | return; | |
3879 | } | |
252b5132 | 3880 | |
ea1562b3 | 3881 | cur_frame_data->fp_regno = tc_get_register (1); |
252b5132 | 3882 | |
ea1562b3 NC |
3883 | SKIP_WHITESPACE (); |
3884 | if (*input_line_pointer++ != ',' | |
3885 | || get_absolute_expression_and_terminator (&val) != ',') | |
3886 | { | |
3887 | as_warn (_("bad .frame directive")); | |
3888 | --input_line_pointer; | |
3889 | discard_rest_of_line (); | |
3890 | return; | |
3891 | } | |
3892 | cur_frame_data->frame_size = val; | |
252b5132 | 3893 | |
ea1562b3 NC |
3894 | cur_frame_data->ra_regno = tc_get_register (0); |
3895 | ||
3896 | /* Next comes the "offset of saved $a0 from $sp". In gcc terms | |
3897 | this is current_function_pretend_args_size. There's no place | |
3898 | to put this value, so ignore it. */ | |
3899 | s_ignore (42); | |
3900 | } | |
3901 | } | |
252b5132 RH |
3902 | |
3903 | static void | |
ea1562b3 | 3904 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3905 | { |
ea1562b3 NC |
3906 | symbolS *sym; |
3907 | int arg; | |
252b5132 | 3908 | |
ea1562b3 NC |
3909 | arg = get_absolute_expression (); |
3910 | demand_empty_rest_of_line (); | |
198f1251 TG |
3911 | alpha_prologue_label = symbol_new |
3912 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
252b5132 | 3913 | |
ea1562b3 NC |
3914 | if (ECOFF_DEBUGGING) |
3915 | sym = ecoff_get_cur_proc_sym (); | |
3916 | else | |
3917 | sym = cur_frame_data ? cur_frame_data->func_sym : NULL; | |
252b5132 | 3918 | |
ea1562b3 | 3919 | if (sym == NULL) |
252b5132 | 3920 | { |
ea1562b3 | 3921 | as_bad (_(".prologue directive without a preceding .ent directive")); |
252b5132 RH |
3922 | return; |
3923 | } | |
3924 | ||
ea1562b3 | 3925 | switch (arg) |
252b5132 | 3926 | { |
ea1562b3 NC |
3927 | case 0: /* No PV required. */ |
3928 | S_SET_OTHER (sym, STO_ALPHA_NOPV | |
3929 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3930 | break; | |
3931 | case 1: /* Std GP load. */ | |
3932 | S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD | |
3933 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3934 | break; | |
3935 | case 2: /* Non-std use of PV. */ | |
3936 | break; | |
252b5132 | 3937 | |
ea1562b3 NC |
3938 | default: |
3939 | as_bad (_("Invalid argument %d to .prologue."), arg); | |
3940 | break; | |
252b5132 RH |
3941 | } |
3942 | ||
ea1562b3 NC |
3943 | if (cur_frame_data) |
3944 | cur_frame_data->prologue_sym = symbol_temp_new_now (); | |
252b5132 RH |
3945 | } |
3946 | ||
ea1562b3 | 3947 | static char *first_file_directive; |
252b5132 RH |
3948 | |
3949 | static void | |
ea1562b3 | 3950 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3951 | { |
ea1562b3 NC |
3952 | /* Save the first .file directive we see, so that we can change our |
3953 | minds about whether ecoff debugging should or shouldn't be enabled. */ | |
3954 | if (alpha_flag_mdebug < 0 && ! first_file_directive) | |
3955 | { | |
3956 | char *start = input_line_pointer; | |
3957 | size_t len; | |
252b5132 | 3958 | |
ea1562b3 | 3959 | discard_rest_of_line (); |
252b5132 | 3960 | |
ea1562b3 | 3961 | len = input_line_pointer - start; |
21d799b5 | 3962 | first_file_directive = (char *) xmalloc (len + 1); |
ea1562b3 NC |
3963 | memcpy (first_file_directive, start, len); |
3964 | first_file_directive[len] = '\0'; | |
252b5132 | 3965 | |
ea1562b3 NC |
3966 | input_line_pointer = start; |
3967 | } | |
252b5132 | 3968 | |
ea1562b3 NC |
3969 | if (ECOFF_DEBUGGING) |
3970 | ecoff_directive_file (0); | |
3971 | else | |
3972 | dwarf2_directive_file (0); | |
3973 | } | |
252b5132 RH |
3974 | |
3975 | static void | |
ea1562b3 | 3976 | s_alpha_loc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3977 | { |
ea1562b3 NC |
3978 | if (ECOFF_DEBUGGING) |
3979 | ecoff_directive_loc (0); | |
3980 | else | |
3981 | dwarf2_directive_loc (0); | |
252b5132 | 3982 | } |
252b5132 | 3983 | |
ea1562b3 NC |
3984 | static void |
3985 | s_alpha_stab (int n) | |
f37f01cf | 3986 | { |
ea1562b3 NC |
3987 | /* If we've been undecided about mdebug, make up our minds in favour. */ |
3988 | if (alpha_flag_mdebug < 0) | |
3989 | { | |
3990 | segT sec = subseg_new (".mdebug", 0); | |
3991 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
3992 | bfd_set_section_alignment (stdoutput, sec, 3); | |
f37f01cf | 3993 | |
ea1562b3 | 3994 | ecoff_read_begin_hook (); |
f37f01cf | 3995 | |
ea1562b3 NC |
3996 | if (first_file_directive) |
3997 | { | |
3998 | char *save_ilp = input_line_pointer; | |
3999 | input_line_pointer = first_file_directive; | |
4000 | ecoff_directive_file (0); | |
4001 | input_line_pointer = save_ilp; | |
4002 | free (first_file_directive); | |
4003 | } | |
252b5132 | 4004 | |
ea1562b3 NC |
4005 | alpha_flag_mdebug = 1; |
4006 | } | |
4007 | s_stab (n); | |
4008 | } | |
252b5132 RH |
4009 | |
4010 | static void | |
ea1562b3 | 4011 | s_alpha_coff_wrapper (int which) |
252b5132 | 4012 | { |
5a49b8ac | 4013 | static void (* const fns[]) (int) = { |
ea1562b3 NC |
4014 | ecoff_directive_begin, |
4015 | ecoff_directive_bend, | |
4016 | ecoff_directive_def, | |
4017 | ecoff_directive_dim, | |
4018 | ecoff_directive_endef, | |
4019 | ecoff_directive_scl, | |
4020 | ecoff_directive_tag, | |
4021 | ecoff_directive_val, | |
4022 | }; | |
252b5132 | 4023 | |
9c2799c2 | 4024 | gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); |
252b5132 | 4025 | |
252b5132 | 4026 | if (ECOFF_DEBUGGING) |
ea1562b3 | 4027 | (*fns[which]) (0); |
252b5132 RH |
4028 | else |
4029 | { | |
ea1562b3 NC |
4030 | as_bad (_("ECOFF debugging is disabled.")); |
4031 | ignore_rest_of_line (); | |
4032 | } | |
4033 | } | |
252b5132 | 4034 | |
ea1562b3 NC |
4035 | /* Called at the end of assembly. Here we emit unwind info for frames |
4036 | unless the compiler has done it for us. */ | |
252b5132 | 4037 | |
ea1562b3 NC |
4038 | void |
4039 | alpha_elf_md_end (void) | |
4040 | { | |
4041 | struct alpha_elf_frame_data *p; | |
f37f01cf | 4042 | |
ea1562b3 NC |
4043 | if (cur_frame_data) |
4044 | as_warn (_(".ent directive without matching .end")); | |
f37f01cf | 4045 | |
ea1562b3 NC |
4046 | /* If someone has generated the unwind info themselves, great. */ |
4047 | if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL) | |
4048 | return; | |
f37f01cf | 4049 | |
af385746 RH |
4050 | /* ??? In theory we could look for functions for which we have |
4051 | generated unwind info via CFI directives, and those we have not. | |
4052 | Those we have not could still get their unwind info from here. | |
4053 | For now, do nothing if we've seen any CFI directives. Note that | |
4054 | the above test will not trigger, as we've not emitted data yet. */ | |
4055 | if (all_fde_data != NULL) | |
4056 | return; | |
4057 | ||
ea1562b3 NC |
4058 | /* Generate .eh_frame data for the unwind directives specified. */ |
4059 | for (p = all_frame_data; p ; p = p->next) | |
4060 | if (p->prologue_sym) | |
4061 | { | |
4062 | /* Create a temporary symbol at the same location as our | |
4063 | function symbol. This prevents problems with globals. */ | |
4064 | cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym), | |
4065 | S_GET_VALUE (p->func_sym), | |
4066 | symbol_get_frag (p->func_sym))); | |
252b5132 | 4067 | |
2f0c68f2 | 4068 | cfi_set_sections (); |
ea1562b3 NC |
4069 | cfi_set_return_column (p->ra_regno); |
4070 | cfi_add_CFA_def_cfa_register (30); | |
4071 | if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size) | |
4072 | { | |
4073 | unsigned int mask; | |
4074 | offsetT offset; | |
252b5132 | 4075 | |
ea1562b3 | 4076 | cfi_add_advance_loc (p->prologue_sym); |
252b5132 | 4077 | |
ea1562b3 NC |
4078 | if (p->fp_regno != 30) |
4079 | if (p->frame_size != 0) | |
4080 | cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size); | |
4081 | else | |
4082 | cfi_add_CFA_def_cfa_register (p->fp_regno); | |
4083 | else if (p->frame_size != 0) | |
4084 | cfi_add_CFA_def_cfa_offset (p->frame_size); | |
252b5132 | 4085 | |
ea1562b3 NC |
4086 | mask = p->mask; |
4087 | offset = p->mask_offset; | |
252b5132 | 4088 | |
ea1562b3 NC |
4089 | /* Recall that $26 is special-cased and stored first. */ |
4090 | if ((mask >> 26) & 1) | |
4091 | { | |
4092 | cfi_add_CFA_offset (26, offset); | |
4093 | offset += 8; | |
4094 | mask &= ~(1 << 26); | |
4095 | } | |
4096 | while (mask) | |
4097 | { | |
4098 | unsigned int i; | |
4099 | i = mask & -mask; | |
4100 | mask ^= i; | |
4101 | i = ffs (i) - 1; | |
f37f01cf | 4102 | |
ea1562b3 NC |
4103 | cfi_add_CFA_offset (i, offset); |
4104 | offset += 8; | |
4105 | } | |
f37f01cf | 4106 | |
ea1562b3 NC |
4107 | mask = p->fmask; |
4108 | offset = p->fmask_offset; | |
4109 | while (mask) | |
4110 | { | |
4111 | unsigned int i; | |
4112 | i = mask & -mask; | |
4113 | mask ^= i; | |
4114 | i = ffs (i) - 1; | |
252b5132 | 4115 | |
ea1562b3 NC |
4116 | cfi_add_CFA_offset (i + 32, offset); |
4117 | offset += 8; | |
4118 | } | |
4119 | } | |
252b5132 | 4120 | |
ea1562b3 NC |
4121 | cfi_end_fde (p->func_end_sym); |
4122 | } | |
252b5132 RH |
4123 | } |
4124 | ||
4125 | static void | |
ea1562b3 | 4126 | s_alpha_usepv (int unused ATTRIBUTE_UNUSED) |
252b5132 | 4127 | { |
ea1562b3 NC |
4128 | char *name, name_end; |
4129 | char *which, which_end; | |
4130 | symbolS *sym; | |
4131 | int other; | |
f37f01cf | 4132 | |
d02603dc | 4133 | name_end = get_symbol_name (&name); |
f37f01cf | 4134 | |
ea1562b3 NC |
4135 | if (! is_name_beginner (*name)) |
4136 | { | |
4137 | as_bad (_(".usepv directive has no name")); | |
d02603dc | 4138 | (void) restore_line_pointer (name_end); |
ea1562b3 NC |
4139 | ignore_rest_of_line (); |
4140 | return; | |
4141 | } | |
f37f01cf | 4142 | |
ea1562b3 | 4143 | sym = symbol_find_or_make (name); |
d02603dc NC |
4144 | name_end = restore_line_pointer (name_end); |
4145 | if (! is_end_of_line[(unsigned char) name_end]) | |
4146 | input_line_pointer++; | |
f37f01cf | 4147 | |
ea1562b3 NC |
4148 | if (name_end != ',') |
4149 | { | |
4150 | as_bad (_(".usepv directive has no type")); | |
4151 | ignore_rest_of_line (); | |
4152 | return; | |
f37f01cf | 4153 | } |
252b5132 | 4154 | |
ea1562b3 | 4155 | SKIP_WHITESPACE (); |
d02603dc NC |
4156 | |
4157 | which_end = get_symbol_name (&which); | |
ea1562b3 NC |
4158 | |
4159 | if (strcmp (which, "no") == 0) | |
4160 | other = STO_ALPHA_NOPV; | |
4161 | else if (strcmp (which, "std") == 0) | |
4162 | other = STO_ALPHA_STD_GPLOAD; | |
252b5132 | 4163 | else |
f37f01cf | 4164 | { |
ea1562b3 NC |
4165 | as_bad (_("unknown argument for .usepv")); |
4166 | other = 0; | |
4167 | } | |
f37f01cf | 4168 | |
d02603dc | 4169 | (void) restore_line_pointer (which_end); |
ea1562b3 | 4170 | demand_empty_rest_of_line (); |
f37f01cf | 4171 | |
ea1562b3 NC |
4172 | S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); |
4173 | } | |
4174 | #endif /* OBJ_ELF */ | |
f37f01cf | 4175 | |
ea1562b3 | 4176 | /* Standard calling conventions leaves the CFA at $30 on entry. */ |
f37f01cf | 4177 | |
ea1562b3 NC |
4178 | void |
4179 | alpha_cfi_frame_initial_instructions (void) | |
4180 | { | |
4181 | cfi_add_CFA_def_cfa_register (30); | |
252b5132 RH |
4182 | } |
4183 | ||
ea1562b3 NC |
4184 | #ifdef OBJ_EVAX |
4185 | ||
198f1251 | 4186 | /* Get name of section. */ |
6d4af3c2 | 4187 | static const char * |
198f1251 TG |
4188 | s_alpha_section_name (void) |
4189 | { | |
4190 | char *name; | |
4191 | ||
4192 | SKIP_WHITESPACE (); | |
4193 | if (*input_line_pointer == '"') | |
4194 | { | |
4195 | int dummy; | |
4196 | ||
4197 | name = demand_copy_C_string (&dummy); | |
4198 | if (name == NULL) | |
4199 | { | |
4200 | ignore_rest_of_line (); | |
4201 | return NULL; | |
4202 | } | |
4203 | } | |
4204 | else | |
4205 | { | |
4206 | char *end = input_line_pointer; | |
4207 | ||
4208 | while (0 == strchr ("\n\t,; ", *end)) | |
4209 | end++; | |
4210 | if (end == input_line_pointer) | |
4211 | { | |
4212 | as_warn (_("missing name")); | |
4213 | ignore_rest_of_line (); | |
4214 | return NULL; | |
4215 | } | |
4216 | ||
4217 | name = xmalloc (end - input_line_pointer + 1); | |
4218 | memcpy (name, input_line_pointer, end - input_line_pointer); | |
4219 | name[end - input_line_pointer] = '\0'; | |
4220 | input_line_pointer = end; | |
4221 | } | |
4222 | SKIP_WHITESPACE (); | |
4223 | return name; | |
4224 | } | |
4225 | ||
d8703844 TG |
4226 | /* Put clear/set flags in one flagword. The LSBs are flags to be set, |
4227 | the MSBs are the flags to be cleared. */ | |
4228 | ||
4229 | #define EGPS__V_NO_SHIFT 16 | |
4230 | #define EGPS__V_MASK 0xffff | |
4231 | ||
4232 | /* Parse one VMS section flag. */ | |
4233 | ||
198f1251 TG |
4234 | static flagword |
4235 | s_alpha_section_word (char *str, size_t len) | |
4236 | { | |
4237 | int no = 0; | |
4238 | flagword flag = 0; | |
4239 | ||
4240 | if (len == 5 && strncmp (str, "NO", 2) == 0) | |
4241 | { | |
4242 | no = 1; | |
4243 | str += 2; | |
3739860c | 4244 | len -= 2; |
198f1251 TG |
4245 | } |
4246 | ||
4247 | if (len == 3) | |
4248 | { | |
4249 | if (strncmp (str, "PIC", 3) == 0) | |
d8703844 | 4250 | flag = EGPS__V_PIC; |
198f1251 | 4251 | else if (strncmp (str, "LIB", 3) == 0) |
d8703844 | 4252 | flag = EGPS__V_LIB; |
198f1251 | 4253 | else if (strncmp (str, "OVR", 3) == 0) |
d8703844 | 4254 | flag = EGPS__V_OVR; |
198f1251 | 4255 | else if (strncmp (str, "REL", 3) == 0) |
d8703844 | 4256 | flag = EGPS__V_REL; |
198f1251 | 4257 | else if (strncmp (str, "GBL", 3) == 0) |
d8703844 | 4258 | flag = EGPS__V_GBL; |
198f1251 | 4259 | else if (strncmp (str, "SHR", 3) == 0) |
d8703844 | 4260 | flag = EGPS__V_SHR; |
198f1251 | 4261 | else if (strncmp (str, "EXE", 3) == 0) |
d8703844 | 4262 | flag = EGPS__V_EXE; |
198f1251 | 4263 | else if (strncmp (str, "WRT", 3) == 0) |
d8703844 | 4264 | flag = EGPS__V_WRT; |
198f1251 | 4265 | else if (strncmp (str, "VEC", 3) == 0) |
d8703844 | 4266 | flag = EGPS__V_VEC; |
198f1251 TG |
4267 | else if (strncmp (str, "MOD", 3) == 0) |
4268 | { | |
d8703844 | 4269 | flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT; |
198f1251 TG |
4270 | no = 0; |
4271 | } | |
4272 | else if (strncmp (str, "COM", 3) == 0) | |
d8703844 | 4273 | flag = EGPS__V_COM; |
198f1251 TG |
4274 | } |
4275 | ||
4276 | if (flag == 0) | |
4277 | { | |
4278 | char c = str[len]; | |
4279 | str[len] = 0; | |
4280 | as_warn (_("unknown section attribute %s"), str); | |
4281 | str[len] = c; | |
4282 | return 0; | |
4283 | } | |
4284 | ||
4285 | if (no) | |
d8703844 | 4286 | return flag << EGPS__V_NO_SHIFT; |
198f1251 TG |
4287 | else |
4288 | return flag; | |
4289 | } | |
4290 | ||
ea1562b3 NC |
4291 | /* Handle the section specific pseudo-op. */ |
4292 | ||
198f1251 TG |
4293 | #define EVAX_SECTION_COUNT 5 |
4294 | ||
6d4af3c2 | 4295 | static const char *section_name[EVAX_SECTION_COUNT + 1] = |
198f1251 TG |
4296 | { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" }; |
4297 | ||
252b5132 | 4298 | static void |
ea1562b3 | 4299 | s_alpha_section (int secid) |
252b5132 | 4300 | { |
6d4af3c2 AM |
4301 | const char *name; |
4302 | char *beg; | |
198f1251 TG |
4303 | segT sec; |
4304 | flagword vms_flags = 0; | |
4305 | symbolS *symbol; | |
252b5132 | 4306 | |
198f1251 | 4307 | if (secid == 0) |
81283cde | 4308 | { |
198f1251 TG |
4309 | name = s_alpha_section_name (); |
4310 | if (name == NULL) | |
4311 | return; | |
4312 | sec = subseg_new (name, 0); | |
4313 | if (*input_line_pointer == ',') | |
4314 | { | |
4315 | /* Skip the comma. */ | |
4316 | ++input_line_pointer; | |
4317 | SKIP_WHITESPACE (); | |
4318 | ||
4319 | do | |
4320 | { | |
4321 | char c; | |
4322 | ||
4323 | SKIP_WHITESPACE (); | |
d02603dc | 4324 | c = get_symbol_name (&beg); |
198f1251 TG |
4325 | *input_line_pointer = c; |
4326 | ||
4327 | vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg); | |
4328 | ||
d02603dc | 4329 | SKIP_WHITESPACE_AFTER_NAME (); |
198f1251 TG |
4330 | } |
4331 | while (*input_line_pointer++ == ','); | |
d02603dc | 4332 | |
198f1251 TG |
4333 | --input_line_pointer; |
4334 | } | |
4335 | ||
4336 | symbol = symbol_find_or_make (name); | |
4337 | S_SET_SEGMENT (symbol, sec); | |
4338 | symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
4339 | bfd_vms_set_section_flags |
4340 | (stdoutput, sec, | |
4341 | (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK, | |
4342 | vms_flags & EGPS__V_MASK); | |
81283cde | 4343 | } |
198f1251 TG |
4344 | else |
4345 | { | |
87975d2a | 4346 | get_absolute_expression (); |
198f1251 TG |
4347 | subseg_new (section_name[secid], 0); |
4348 | } | |
4349 | ||
4350 | demand_empty_rest_of_line (); | |
4351 | alpha_insn_label = NULL; | |
4352 | alpha_auto_align_on = 1; | |
4353 | alpha_current_align = 0; | |
4354 | } | |
4355 | ||
4356 | static void | |
4357 | s_alpha_literals (int ignore ATTRIBUTE_UNUSED) | |
4358 | { | |
4359 | subseg_new (".literals", 0); | |
ea1562b3 NC |
4360 | demand_empty_rest_of_line (); |
4361 | alpha_insn_label = NULL; | |
4362 | alpha_auto_align_on = 1; | |
4363 | alpha_current_align = 0; | |
252b5132 RH |
4364 | } |
4365 | ||
ea1562b3 | 4366 | /* Parse .ent directives. */ |
a8316fe2 | 4367 | |
4dc7ead9 | 4368 | static void |
ea1562b3 | 4369 | s_alpha_ent (int ignore ATTRIBUTE_UNUSED) |
4dc7ead9 | 4370 | { |
ea1562b3 NC |
4371 | symbolS *symbol; |
4372 | expressionS symexpr; | |
a8316fe2 | 4373 | |
4b1c4d2b TG |
4374 | if (alpha_evax_proc != NULL) |
4375 | as_bad (_("previous .ent not closed by a .end")); | |
4376 | ||
4377 | alpha_evax_proc = &alpha_evax_proc_data; | |
198f1251 TG |
4378 | |
4379 | alpha_evax_proc->pdsckind = 0; | |
4380 | alpha_evax_proc->framereg = -1; | |
4381 | alpha_evax_proc->framesize = 0; | |
4382 | alpha_evax_proc->rsa_offset = 0; | |
4383 | alpha_evax_proc->ra_save = AXP_REG_RA; | |
4384 | alpha_evax_proc->fp_save = -1; | |
4385 | alpha_evax_proc->imask = 0; | |
4386 | alpha_evax_proc->fmask = 0; | |
4387 | alpha_evax_proc->prologue = 0; | |
4388 | alpha_evax_proc->type = 0; | |
4389 | alpha_evax_proc->handler = 0; | |
4390 | alpha_evax_proc->handler_data = 0; | |
a8316fe2 | 4391 | |
ea1562b3 | 4392 | expression (&symexpr); |
a8316fe2 | 4393 | |
ea1562b3 NC |
4394 | if (symexpr.X_op != O_symbol) |
4395 | { | |
4396 | as_fatal (_(".ent directive has no symbol")); | |
4397 | demand_empty_rest_of_line (); | |
4398 | return; | |
a8316fe2 RH |
4399 | } |
4400 | ||
ea1562b3 NC |
4401 | symbol = make_expr_symbol (&symexpr); |
4402 | symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION; | |
198f1251 TG |
4403 | alpha_evax_proc->symbol = symbol; |
4404 | ||
ea1562b3 | 4405 | demand_empty_rest_of_line (); |
4dc7ead9 RH |
4406 | } |
4407 | ||
198f1251 TG |
4408 | static void |
4409 | s_alpha_handler (int is_data) | |
4410 | { | |
4411 | if (is_data) | |
4412 | alpha_evax_proc->handler_data = get_absolute_expression (); | |
4413 | else | |
4414 | { | |
4415 | char *name, name_end; | |
d02603dc NC |
4416 | |
4417 | name_end = get_symbol_name (&name); | |
198f1251 TG |
4418 | |
4419 | if (! is_name_beginner (*name)) | |
4420 | { | |
4421 | as_warn (_(".handler directive has no name")); | |
198f1251 TG |
4422 | } |
4423 | else | |
4424 | { | |
4425 | symbolS *sym; | |
4426 | ||
4427 | sym = symbol_find_or_make (name); | |
4428 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
4429 | alpha_evax_proc->handler = sym; | |
198f1251 | 4430 | } |
d02603dc NC |
4431 | |
4432 | (void) restore_line_pointer (name_end); | |
4433 | } | |
4434 | ||
198f1251 TG |
4435 | demand_empty_rest_of_line (); |
4436 | } | |
4437 | ||
ea1562b3 NC |
4438 | /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */ |
4439 | ||
a8316fe2 | 4440 | static void |
ea1562b3 | 4441 | s_alpha_frame (int ignore ATTRIBUTE_UNUSED) |
a8316fe2 | 4442 | { |
ea1562b3 | 4443 | long val; |
467b607e | 4444 | int ra; |
a8316fe2 | 4445 | |
198f1251 | 4446 | alpha_evax_proc->framereg = tc_get_register (1); |
a8316fe2 | 4447 | |
ea1562b3 NC |
4448 | SKIP_WHITESPACE (); |
4449 | if (*input_line_pointer++ != ',' | |
4450 | || get_absolute_expression_and_terminator (&val) != ',') | |
4451 | { | |
4452 | as_warn (_("Bad .frame directive 1./2. param")); | |
4453 | --input_line_pointer; | |
4454 | demand_empty_rest_of_line (); | |
4455 | return; | |
4456 | } | |
a8316fe2 | 4457 | |
198f1251 | 4458 | alpha_evax_proc->framesize = val; |
ea1562b3 | 4459 | |
467b607e TG |
4460 | ra = tc_get_register (1); |
4461 | if (ra != AXP_REG_RA) | |
4462 | as_warn (_("Bad RA (%d) register for .frame"), ra); | |
4463 | ||
ea1562b3 NC |
4464 | SKIP_WHITESPACE (); |
4465 | if (*input_line_pointer++ != ',') | |
4466 | { | |
4467 | as_warn (_("Bad .frame directive 3./4. param")); | |
4468 | --input_line_pointer; | |
4469 | demand_empty_rest_of_line (); | |
4470 | return; | |
a8316fe2 | 4471 | } |
198f1251 TG |
4472 | alpha_evax_proc->rsa_offset = get_absolute_expression (); |
4473 | } | |
4474 | ||
51794af8 TG |
4475 | /* Parse .prologue. */ |
4476 | ||
198f1251 TG |
4477 | static void |
4478 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) | |
4479 | { | |
198f1251 TG |
4480 | demand_empty_rest_of_line (); |
4481 | alpha_prologue_label = symbol_new | |
4482 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
a8316fe2 RH |
4483 | } |
4484 | ||
467b607e | 4485 | /* Parse .pdesc <entry_name>,{null|stack|reg} |
51794af8 TG |
4486 | Insert a procedure descriptor. */ |
4487 | ||
252b5132 | 4488 | static void |
ea1562b3 | 4489 | s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4490 | { |
ea1562b3 NC |
4491 | char *name; |
4492 | char name_end; | |
ed9e98c2 | 4493 | char *p; |
ea1562b3 NC |
4494 | expressionS exp; |
4495 | symbolS *entry_sym; | |
198f1251 | 4496 | const char *entry_sym_name; |
4b1c4d2b TG |
4497 | const char *pdesc_sym_name; |
4498 | fixS *fixp; | |
4499 | size_t len; | |
252b5132 | 4500 | |
ea1562b3 NC |
4501 | if (now_seg != alpha_link_section) |
4502 | { | |
4503 | as_bad (_(".pdesc directive not in link (.link) section")); | |
ea1562b3 NC |
4504 | return; |
4505 | } | |
252b5132 | 4506 | |
198f1251 TG |
4507 | expression (&exp); |
4508 | if (exp.X_op != O_symbol) | |
252b5132 | 4509 | { |
4b1c4d2b | 4510 | as_bad (_(".pdesc directive has no entry symbol")); |
ea1562b3 | 4511 | return; |
252b5132 | 4512 | } |
3739860c | 4513 | |
198f1251 | 4514 | entry_sym = make_expr_symbol (&exp); |
4b1c4d2b | 4515 | entry_sym_name = S_GET_NAME (entry_sym); |
3739860c | 4516 | |
8aacb050 | 4517 | /* Strip "..en". */ |
198f1251 | 4518 | len = strlen (entry_sym_name); |
4b1c4d2b | 4519 | if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0) |
ea1562b3 | 4520 | { |
4b1c4d2b TG |
4521 | as_bad (_(".pdesc has a bad entry symbol")); |
4522 | return; | |
4523 | } | |
4524 | len -= 4; | |
4525 | pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol); | |
4526 | ||
4527 | if (!alpha_evax_proc | |
4528 | || !S_IS_DEFINED (alpha_evax_proc->symbol) | |
4529 | || strlen (pdesc_sym_name) != len | |
4530 | || memcmp (entry_sym_name, pdesc_sym_name, len) != 0) | |
4531 | { | |
4532 | as_fatal (_(".pdesc doesn't match with last .ent")); | |
ea1562b3 NC |
4533 | return; |
4534 | } | |
f37f01cf | 4535 | |
8aacb050 | 4536 | /* Define pdesc symbol. */ |
4b1c4d2b | 4537 | symbol_set_value_now (alpha_evax_proc->symbol); |
3739860c | 4538 | |
198f1251 TG |
4539 | /* Save bfd symbol of proc entry in function symbol. */ |
4540 | ((struct evax_private_udata_struct *) | |
4541 | symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym | |
4542 | = symbol_get_bfdsym (entry_sym); | |
3739860c | 4543 | |
ea1562b3 NC |
4544 | SKIP_WHITESPACE (); |
4545 | if (*input_line_pointer++ != ',') | |
4546 | { | |
4547 | as_warn (_("No comma after .pdesc <entryname>")); | |
4548 | demand_empty_rest_of_line (); | |
4549 | return; | |
4550 | } | |
f37f01cf | 4551 | |
ea1562b3 | 4552 | SKIP_WHITESPACE (); |
d02603dc | 4553 | name_end = get_symbol_name (&name); |
f37f01cf | 4554 | |
ea1562b3 | 4555 | if (strncmp (name, "stack", 5) == 0) |
198f1251 | 4556 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK; |
f37f01cf | 4557 | |
ea1562b3 | 4558 | else if (strncmp (name, "reg", 3) == 0) |
198f1251 | 4559 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER; |
f37f01cf | 4560 | |
ea1562b3 | 4561 | else if (strncmp (name, "null", 4) == 0) |
198f1251 | 4562 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL; |
f37f01cf | 4563 | |
ea1562b3 NC |
4564 | else |
4565 | { | |
d02603dc | 4566 | (void) restore_line_pointer (name_end); |
ea1562b3 NC |
4567 | as_fatal (_("unknown procedure kind")); |
4568 | demand_empty_rest_of_line (); | |
4569 | return; | |
4570 | } | |
f37f01cf | 4571 | |
d02603dc | 4572 | (void) restore_line_pointer (name_end); |
ea1562b3 | 4573 | demand_empty_rest_of_line (); |
f37f01cf | 4574 | |
ea1562b3 NC |
4575 | #ifdef md_flush_pending_output |
4576 | md_flush_pending_output (); | |
4577 | #endif | |
252b5132 RH |
4578 | |
4579 | frag_align (3, 0, 0); | |
4580 | p = frag_more (16); | |
4581 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0); | |
4582 | fixp->fx_done = 1; | |
252b5132 | 4583 | |
198f1251 TG |
4584 | *p = alpha_evax_proc->pdsckind |
4585 | | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0) | |
4586 | | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0) | |
4587 | | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0); | |
66498417 | 4588 | *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET; |
252b5132 | 4589 | |
198f1251 | 4590 | switch (alpha_evax_proc->pdsckind) |
252b5132 | 4591 | { |
1aad8cf8 | 4592 | case PDSC_S_K_KIND_NULL: |
66498417 KH |
4593 | *(p + 2) = 0; |
4594 | *(p + 3) = 0; | |
1aad8cf8 KH |
4595 | break; |
4596 | case PDSC_S_K_KIND_FP_REGISTER: | |
198f1251 TG |
4597 | *(p + 2) = alpha_evax_proc->fp_save; |
4598 | *(p + 3) = alpha_evax_proc->ra_save; | |
1aad8cf8 KH |
4599 | break; |
4600 | case PDSC_S_K_KIND_FP_STACK: | |
198f1251 | 4601 | md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2); |
1aad8cf8 KH |
4602 | break; |
4603 | default: /* impossible */ | |
4604 | break; | |
252b5132 RH |
4605 | } |
4606 | ||
66498417 | 4607 | *(p + 4) = 0; |
198f1251 | 4608 | *(p + 5) = alpha_evax_proc->type & 0x0f; |
252b5132 RH |
4609 | |
4610 | /* Signature offset. */ | |
66498417 | 4611 | md_number_to_chars (p + 6, (valueT) 0, 2); |
252b5132 | 4612 | |
af24f60c TG |
4613 | fix_new_exp (frag_now, p - frag_now->fr_literal + 8, |
4614 | 8, &exp, 0, BFD_RELOC_64); | |
252b5132 | 4615 | |
198f1251 | 4616 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL) |
252b5132 RH |
4617 | return; |
4618 | ||
252b5132 | 4619 | /* pdesc+16: Size. */ |
af24f60c | 4620 | p = frag_more (6); |
198f1251 | 4621 | md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4); |
66498417 | 4622 | md_number_to_chars (p + 4, (valueT) 0, 2); |
252b5132 RH |
4623 | |
4624 | /* Entry length. */ | |
198f1251 TG |
4625 | exp.X_op = O_subtract; |
4626 | exp.X_add_symbol = alpha_prologue_label; | |
4627 | exp.X_op_symbol = entry_sym; | |
4628 | emit_expr (&exp, 2); | |
252b5132 | 4629 | |
198f1251 | 4630 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER) |
252b5132 RH |
4631 | return; |
4632 | ||
252b5132 | 4633 | /* pdesc+24: register masks. */ |
af24f60c | 4634 | p = frag_more (8); |
198f1251 TG |
4635 | md_number_to_chars (p, alpha_evax_proc->imask, 4); |
4636 | md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4); | |
4637 | ||
4638 | if (alpha_evax_proc->handler) | |
4639 | { | |
4640 | p = frag_more (8); | |
4641 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, | |
4642 | alpha_evax_proc->handler, 0, 0, BFD_RELOC_64); | |
4643 | } | |
4644 | ||
4645 | if (alpha_evax_proc->handler_data) | |
4646 | { | |
198f1251 | 4647 | p = frag_more (8); |
198f1251 TG |
4648 | md_number_to_chars (p, alpha_evax_proc->handler_data, 8); |
4649 | } | |
252b5132 RH |
4650 | } |
4651 | ||
252b5132 RH |
4652 | /* Support for crash debug on vms. */ |
4653 | ||
4654 | static void | |
ea1562b3 | 4655 | s_alpha_name (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4656 | { |
ea1562b3 | 4657 | char *p; |
252b5132 | 4658 | expressionS exp; |
252b5132 RH |
4659 | |
4660 | if (now_seg != alpha_link_section) | |
4661 | { | |
4662 | as_bad (_(".name directive not in link (.link) section")); | |
4663 | demand_empty_rest_of_line (); | |
4664 | return; | |
4665 | } | |
4666 | ||
4667 | expression (&exp); | |
4668 | if (exp.X_op != O_symbol) | |
4669 | { | |
4670 | as_warn (_(".name directive has no symbol")); | |
4671 | demand_empty_rest_of_line (); | |
4672 | return; | |
4673 | } | |
4674 | ||
4675 | demand_empty_rest_of_line (); | |
4676 | ||
4677 | #ifdef md_flush_pending_output | |
4678 | md_flush_pending_output (); | |
4679 | #endif | |
4680 | ||
4681 | frag_align (3, 0, 0); | |
4682 | p = frag_more (8); | |
252b5132 | 4683 | |
66498417 | 4684 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64); |
252b5132 RH |
4685 | } |
4686 | ||
51794af8 TG |
4687 | /* Parse .linkage <symbol>. |
4688 | Create a linkage pair relocation. */ | |
4689 | ||
252b5132 | 4690 | static void |
ea1562b3 | 4691 | s_alpha_linkage (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4692 | { |
4693 | expressionS exp; | |
4694 | char *p; | |
198f1251 | 4695 | fixS *fixp; |
252b5132 RH |
4696 | |
4697 | #ifdef md_flush_pending_output | |
4698 | md_flush_pending_output (); | |
4699 | #endif | |
4700 | ||
4701 | expression (&exp); | |
4702 | if (exp.X_op != O_symbol) | |
4703 | { | |
4704 | as_fatal (_("No symbol after .linkage")); | |
4705 | } | |
4706 | else | |
4707 | { | |
198f1251 | 4708 | struct alpha_linkage_fixups *linkage_fixup; |
3739860c | 4709 | |
252b5132 RH |
4710 | p = frag_more (LKP_S_K_SIZE); |
4711 | memset (p, 0, LKP_S_K_SIZE); | |
198f1251 | 4712 | fixp = fix_new_exp |
0ac5db19 | 4713 | (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0, |
198f1251 TG |
4714 | BFD_RELOC_ALPHA_LINKAGE); |
4715 | ||
0ac5db19 TG |
4716 | if (alpha_insn_label == NULL) |
4717 | alpha_insn_label = symbol_new | |
4718 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
4719 | ||
4720 | /* Create a linkage element. */ | |
198f1251 TG |
4721 | linkage_fixup = (struct alpha_linkage_fixups *) |
4722 | xmalloc (sizeof (struct alpha_linkage_fixups)); | |
198f1251 | 4723 | linkage_fixup->fixp = fixp; |
0ac5db19 | 4724 | linkage_fixup->next = NULL; |
198f1251 TG |
4725 | linkage_fixup->label = alpha_insn_label; |
4726 | ||
0ac5db19 TG |
4727 | /* Append it to the list. */ |
4728 | if (alpha_linkage_fixup_root == NULL) | |
4729 | alpha_linkage_fixup_root = linkage_fixup; | |
198f1251 | 4730 | else |
0ac5db19 TG |
4731 | alpha_linkage_fixup_tail->next = linkage_fixup; |
4732 | alpha_linkage_fixup_tail = linkage_fixup; | |
252b5132 RH |
4733 | } |
4734 | demand_empty_rest_of_line (); | |
252b5132 RH |
4735 | } |
4736 | ||
51794af8 TG |
4737 | /* Parse .code_address <symbol>. |
4738 | Create a code address relocation. */ | |
4739 | ||
252b5132 | 4740 | static void |
ea1562b3 | 4741 | s_alpha_code_address (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4742 | { |
4743 | expressionS exp; | |
4744 | char *p; | |
4745 | ||
4746 | #ifdef md_flush_pending_output | |
4747 | md_flush_pending_output (); | |
4748 | #endif | |
4749 | ||
4750 | expression (&exp); | |
4751 | if (exp.X_op != O_symbol) | |
ea1562b3 | 4752 | as_fatal (_("No symbol after .code_address")); |
252b5132 RH |
4753 | else |
4754 | { | |
4755 | p = frag_more (8); | |
4756 | memset (p, 0, 8); | |
4757 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\ | |
4758 | BFD_RELOC_ALPHA_CODEADDR); | |
4759 | } | |
4760 | demand_empty_rest_of_line (); | |
252b5132 RH |
4761 | } |
4762 | ||
252b5132 | 4763 | static void |
ea1562b3 | 4764 | s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4765 | { |
198f1251 | 4766 | alpha_evax_proc->fp_save = tc_get_register (1); |
252b5132 RH |
4767 | |
4768 | demand_empty_rest_of_line (); | |
252b5132 RH |
4769 | } |
4770 | ||
252b5132 | 4771 | static void |
ea1562b3 | 4772 | s_alpha_mask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4773 | { |
4774 | long val; | |
4775 | ||
4776 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4777 | { | |
4778 | as_warn (_("Bad .mask directive")); | |
4779 | --input_line_pointer; | |
4780 | } | |
4781 | else | |
4782 | { | |
198f1251 | 4783 | alpha_evax_proc->imask = val; |
32ff5c2e | 4784 | (void) get_absolute_expression (); |
252b5132 RH |
4785 | } |
4786 | demand_empty_rest_of_line (); | |
252b5132 RH |
4787 | } |
4788 | ||
252b5132 | 4789 | static void |
ea1562b3 | 4790 | s_alpha_fmask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4791 | { |
4792 | long val; | |
4793 | ||
4794 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4795 | { | |
4796 | as_warn (_("Bad .fmask directive")); | |
4797 | --input_line_pointer; | |
4798 | } | |
4799 | else | |
4800 | { | |
198f1251 | 4801 | alpha_evax_proc->fmask = val; |
252b5132 RH |
4802 | (void) get_absolute_expression (); |
4803 | } | |
4804 | demand_empty_rest_of_line (); | |
252b5132 RH |
4805 | } |
4806 | ||
4807 | static void | |
ea1562b3 | 4808 | s_alpha_end (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4809 | { |
d02603dc | 4810 | char *name; |
252b5132 RH |
4811 | char c; |
4812 | ||
d02603dc NC |
4813 | c = get_symbol_name (&name); |
4814 | (void) restore_line_pointer (c); | |
252b5132 | 4815 | demand_empty_rest_of_line (); |
8aacb050 | 4816 | alpha_evax_proc = NULL; |
252b5132 RH |
4817 | } |
4818 | ||
252b5132 | 4819 | static void |
ea1562b3 | 4820 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4821 | { |
4822 | symbolS *s; | |
4823 | int length; | |
4824 | static char case_hack[32]; | |
4825 | ||
252b5132 | 4826 | sprintf (case_hack, "<CASE:%01d%01d>", |
9de8d8f1 | 4827 | alpha_flag_hash_long_names, alpha_flag_show_after_trunc); |
252b5132 RH |
4828 | |
4829 | s = symbol_find_or_make (case_hack); | |
9de8d8f1 | 4830 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 RH |
4831 | |
4832 | get_absolute_expression (); | |
4833 | s = symbol_find_or_make (demand_copy_string (&length)); | |
9de8d8f1 | 4834 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 | 4835 | demand_empty_rest_of_line (); |
252b5132 RH |
4836 | } |
4837 | #endif /* OBJ_EVAX */ | |
4838 | ||
4839 | /* Handle the .gprel32 pseudo op. */ | |
4840 | ||
4841 | static void | |
ea1562b3 | 4842 | s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4843 | { |
4844 | expressionS e; | |
4845 | char *p; | |
4846 | ||
4847 | SKIP_WHITESPACE (); | |
4848 | expression (&e); | |
4849 | ||
4850 | #ifdef OBJ_ELF | |
4851 | switch (e.X_op) | |
4852 | { | |
4853 | case O_constant: | |
32ff5c2e | 4854 | e.X_add_symbol = section_symbol (absolute_section); |
252b5132 RH |
4855 | e.X_op = O_symbol; |
4856 | /* FALLTHRU */ | |
4857 | case O_symbol: | |
4858 | break; | |
4859 | default: | |
bc805888 | 4860 | abort (); |
252b5132 RH |
4861 | } |
4862 | #else | |
4863 | #ifdef OBJ_ECOFF | |
4864 | switch (e.X_op) | |
4865 | { | |
4866 | case O_constant: | |
4867 | e.X_add_symbol = section_symbol (absolute_section); | |
4868 | /* fall through */ | |
4869 | case O_symbol: | |
4870 | e.X_op = O_subtract; | |
4871 | e.X_op_symbol = alpha_gp_symbol; | |
4872 | break; | |
4873 | default: | |
4874 | abort (); | |
4875 | } | |
4876 | #endif | |
4877 | #endif | |
4878 | ||
4879 | if (alpha_auto_align_on && alpha_current_align < 2) | |
4880 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
4881 | if (alpha_current_align > 2) | |
4882 | alpha_current_align = 2; | |
4883 | alpha_insn_label = NULL; | |
4884 | ||
4885 | p = frag_more (4); | |
4886 | memset (p, 0, 4); | |
66498417 | 4887 | fix_new_exp (frag_now, p - frag_now->fr_literal, 4, |
252b5132 RH |
4888 | &e, 0, BFD_RELOC_GPREL32); |
4889 | } | |
4890 | ||
4891 | /* Handle floating point allocation pseudo-ops. This is like the | |
4892 | generic vresion, but it makes sure the current label, if any, is | |
4893 | correctly aligned. */ | |
4894 | ||
4895 | static void | |
ea1562b3 | 4896 | s_alpha_float_cons (int type) |
252b5132 RH |
4897 | { |
4898 | int log_size; | |
4899 | ||
4900 | switch (type) | |
4901 | { | |
4902 | default: | |
4903 | case 'f': | |
4904 | case 'F': | |
4905 | log_size = 2; | |
4906 | break; | |
4907 | ||
4908 | case 'd': | |
4909 | case 'D': | |
4910 | case 'G': | |
4911 | log_size = 3; | |
4912 | break; | |
4913 | ||
4914 | case 'x': | |
4915 | case 'X': | |
4916 | case 'p': | |
4917 | case 'P': | |
4918 | log_size = 4; | |
4919 | break; | |
4920 | } | |
4921 | ||
4922 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
4923 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
4924 | if (alpha_current_align > log_size) | |
4925 | alpha_current_align = log_size; | |
4926 | alpha_insn_label = NULL; | |
4927 | ||
4928 | float_cons (type); | |
4929 | } | |
4930 | ||
4931 | /* Handle the .proc pseudo op. We don't really do much with it except | |
4932 | parse it. */ | |
4933 | ||
4934 | static void | |
ea1562b3 | 4935 | s_alpha_proc (int is_static ATTRIBUTE_UNUSED) |
252b5132 RH |
4936 | { |
4937 | char *name; | |
4938 | char c; | |
4939 | char *p; | |
4940 | symbolS *symbolP; | |
4941 | int temp; | |
4942 | ||
ea1562b3 | 4943 | /* Takes ".proc name,nargs". */ |
252b5132 | 4944 | SKIP_WHITESPACE (); |
d02603dc | 4945 | c = get_symbol_name (&name); |
252b5132 RH |
4946 | p = input_line_pointer; |
4947 | symbolP = symbol_find_or_make (name); | |
4948 | *p = c; | |
d02603dc | 4949 | SKIP_WHITESPACE_AFTER_NAME (); |
252b5132 RH |
4950 | if (*input_line_pointer != ',') |
4951 | { | |
4952 | *p = 0; | |
4953 | as_warn (_("Expected comma after name \"%s\""), name); | |
4954 | *p = c; | |
4955 | temp = 0; | |
4956 | ignore_rest_of_line (); | |
4957 | } | |
4958 | else | |
4959 | { | |
4960 | input_line_pointer++; | |
4961 | temp = get_absolute_expression (); | |
4962 | } | |
7dcc9865 | 4963 | /* *symbol_get_obj (symbolP) = (signed char) temp; */ |
87975d2a | 4964 | (void) symbolP; |
252b5132 RH |
4965 | as_warn (_("unhandled: .proc %s,%d"), name, temp); |
4966 | demand_empty_rest_of_line (); | |
4967 | } | |
4968 | ||
4969 | /* Handle the .set pseudo op. This is used to turn on and off most of | |
4970 | the assembler features. */ | |
4971 | ||
4972 | static void | |
ea1562b3 | 4973 | s_alpha_set (int x ATTRIBUTE_UNUSED) |
252b5132 RH |
4974 | { |
4975 | char *name, ch, *s; | |
4976 | int yesno = 1; | |
4977 | ||
4978 | SKIP_WHITESPACE (); | |
252b5132 | 4979 | |
d02603dc | 4980 | ch = get_symbol_name (&name); |
252b5132 RH |
4981 | s = name; |
4982 | if (s[0] == 'n' && s[1] == 'o') | |
4983 | { | |
4984 | yesno = 0; | |
4985 | s += 2; | |
4986 | } | |
4987 | if (!strcmp ("reorder", s)) | |
4988 | /* ignore */ ; | |
4989 | else if (!strcmp ("at", s)) | |
4990 | alpha_noat_on = !yesno; | |
4991 | else if (!strcmp ("macro", s)) | |
4992 | alpha_macros_on = yesno; | |
4993 | else if (!strcmp ("move", s)) | |
4994 | /* ignore */ ; | |
4995 | else if (!strcmp ("volatile", s)) | |
4996 | /* ignore */ ; | |
4997 | else | |
4998 | as_warn (_("Tried to .set unrecognized mode `%s'"), name); | |
4999 | ||
d02603dc | 5000 | (void) restore_line_pointer (ch); |
252b5132 RH |
5001 | demand_empty_rest_of_line (); |
5002 | } | |
5003 | ||
5004 | /* Handle the .base pseudo op. This changes the assembler's notion of | |
5005 | the $gp register. */ | |
5006 | ||
5007 | static void | |
ea1562b3 | 5008 | s_alpha_base (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5009 | { |
252b5132 | 5010 | SKIP_WHITESPACE (); |
ea1562b3 | 5011 | |
252b5132 | 5012 | if (*input_line_pointer == '$') |
ea1562b3 NC |
5013 | { |
5014 | /* $rNN form. */ | |
252b5132 RH |
5015 | input_line_pointer++; |
5016 | if (*input_line_pointer == 'r') | |
5017 | input_line_pointer++; | |
5018 | } | |
5019 | ||
5020 | alpha_gp_register = get_absolute_expression (); | |
5021 | if (alpha_gp_register < 0 || alpha_gp_register > 31) | |
5022 | { | |
5023 | alpha_gp_register = AXP_REG_GP; | |
5024 | as_warn (_("Bad base register, using $%d."), alpha_gp_register); | |
5025 | } | |
5026 | ||
5027 | demand_empty_rest_of_line (); | |
5028 | } | |
5029 | ||
5030 | /* Handle the .align pseudo-op. This aligns to a power of two. It | |
5031 | also adjusts any current instruction label. We treat this the same | |
5032 | way the MIPS port does: .align 0 turns off auto alignment. */ | |
5033 | ||
5034 | static void | |
ea1562b3 | 5035 | s_alpha_align (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5036 | { |
5037 | int align; | |
5038 | char fill, *pfill; | |
198f1251 | 5039 | long max_alignment = 16; |
252b5132 RH |
5040 | |
5041 | align = get_absolute_expression (); | |
5042 | if (align > max_alignment) | |
5043 | { | |
5044 | align = max_alignment; | |
5045 | as_bad (_("Alignment too large: %d. assumed"), align); | |
5046 | } | |
5047 | else if (align < 0) | |
5048 | { | |
5049 | as_warn (_("Alignment negative: 0 assumed")); | |
5050 | align = 0; | |
5051 | } | |
5052 | ||
5053 | if (*input_line_pointer == ',') | |
5054 | { | |
5055 | input_line_pointer++; | |
5056 | fill = get_absolute_expression (); | |
5057 | pfill = &fill; | |
5058 | } | |
5059 | else | |
5060 | pfill = NULL; | |
5061 | ||
5062 | if (align != 0) | |
5063 | { | |
5064 | alpha_auto_align_on = 1; | |
af3ecb4a | 5065 | alpha_align (align, pfill, NULL, 1); |
252b5132 RH |
5066 | } |
5067 | else | |
5068 | { | |
5069 | alpha_auto_align_on = 0; | |
5070 | } | |
af3ecb4a | 5071 | alpha_insn_label = NULL; |
252b5132 RH |
5072 | |
5073 | demand_empty_rest_of_line (); | |
5074 | } | |
5075 | ||
5076 | /* Hook the normal string processor to reset known alignment. */ | |
5077 | ||
5078 | static void | |
ea1562b3 | 5079 | s_alpha_stringer (int terminate) |
252b5132 RH |
5080 | { |
5081 | alpha_current_align = 0; | |
5082 | alpha_insn_label = NULL; | |
38a57ae7 | 5083 | stringer (8 + terminate); |
252b5132 RH |
5084 | } |
5085 | ||
5086 | /* Hook the normal space processing to reset known alignment. */ | |
5087 | ||
5088 | static void | |
ea1562b3 | 5089 | s_alpha_space (int ignore) |
252b5132 RH |
5090 | { |
5091 | alpha_current_align = 0; | |
5092 | alpha_insn_label = NULL; | |
5093 | s_space (ignore); | |
5094 | } | |
5095 | ||
5096 | /* Hook into cons for auto-alignment. */ | |
5097 | ||
5098 | void | |
ea1562b3 | 5099 | alpha_cons_align (int size) |
252b5132 RH |
5100 | { |
5101 | int log_size; | |
5102 | ||
5103 | log_size = 0; | |
5104 | while ((size >>= 1) != 0) | |
5105 | ++log_size; | |
5106 | ||
5107 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
5108 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
5109 | if (alpha_current_align > log_size) | |
5110 | alpha_current_align = log_size; | |
5111 | alpha_insn_label = NULL; | |
5112 | } | |
5113 | ||
5114 | /* Here come the .uword, .ulong, and .uquad explicitly unaligned | |
5115 | pseudos. We just turn off auto-alignment and call down to cons. */ | |
5116 | ||
5117 | static void | |
ea1562b3 | 5118 | s_alpha_ucons (int bytes) |
252b5132 RH |
5119 | { |
5120 | int hold = alpha_auto_align_on; | |
5121 | alpha_auto_align_on = 0; | |
5122 | cons (bytes); | |
5123 | alpha_auto_align_on = hold; | |
5124 | } | |
5125 | ||
5126 | /* Switch the working cpu type. */ | |
5127 | ||
5128 | static void | |
ea1562b3 | 5129 | s_alpha_arch (int ignored ATTRIBUTE_UNUSED) |
252b5132 RH |
5130 | { |
5131 | char *name, ch; | |
5132 | const struct cpu_type *p; | |
5133 | ||
5134 | SKIP_WHITESPACE (); | |
d02603dc NC |
5135 | |
5136 | ch = get_symbol_name (&name); | |
252b5132 RH |
5137 | |
5138 | for (p = cpu_types; p->name; ++p) | |
32ff5c2e | 5139 | if (strcmp (name, p->name) == 0) |
252b5132 | 5140 | { |
1aad8cf8 | 5141 | alpha_target_name = p->name, alpha_target = p->flags; |
252b5132 RH |
5142 | goto found; |
5143 | } | |
20203fb9 | 5144 | as_warn (_("Unknown CPU identifier `%s'"), name); |
252b5132 RH |
5145 | |
5146 | found: | |
d02603dc | 5147 | (void) restore_line_pointer (ch); |
252b5132 RH |
5148 | demand_empty_rest_of_line (); |
5149 | } | |
252b5132 | 5150 | \f |
252b5132 RH |
5151 | #ifdef DEBUG1 |
5152 | /* print token expression with alpha specific extension. */ | |
5153 | ||
5154 | static void | |
ea1562b3 | 5155 | alpha_print_token (FILE *f, const expressionS *exp) |
252b5132 RH |
5156 | { |
5157 | switch (exp->X_op) | |
5158 | { | |
1aad8cf8 KH |
5159 | case O_cpregister: |
5160 | putc (',', f); | |
5161 | /* FALLTHRU */ | |
5162 | case O_pregister: | |
5163 | putc ('(', f); | |
5164 | { | |
5165 | expressionS nexp = *exp; | |
5166 | nexp.X_op = O_register; | |
198f1251 | 5167 | print_expr_1 (f, &nexp); |
1aad8cf8 KH |
5168 | } |
5169 | putc (')', f); | |
5170 | break; | |
5171 | default: | |
198f1251 | 5172 | print_expr_1 (f, exp); |
1aad8cf8 | 5173 | break; |
252b5132 | 5174 | } |
252b5132 RH |
5175 | } |
5176 | #endif | |
5177 | \f | |
5178 | /* The target specific pseudo-ops which we support. */ | |
5179 | ||
ea1562b3 NC |
5180 | const pseudo_typeS md_pseudo_table[] = |
5181 | { | |
252b5132 | 5182 | #ifdef OBJ_ECOFF |
ea1562b3 | 5183 | {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */ |
252b5132 RH |
5184 | {"rdata", s_alpha_rdata, 0}, |
5185 | #endif | |
5186 | {"text", s_alpha_text, 0}, | |
5187 | {"data", s_alpha_data, 0}, | |
5188 | #ifdef OBJ_ECOFF | |
5189 | {"sdata", s_alpha_sdata, 0}, | |
5190 | #endif | |
5191 | #ifdef OBJ_ELF | |
5192 | {"section", s_alpha_section, 0}, | |
5193 | {"section.s", s_alpha_section, 0}, | |
5194 | {"sect", s_alpha_section, 0}, | |
5195 | {"sect.s", s_alpha_section, 0}, | |
5196 | #endif | |
5197 | #ifdef OBJ_EVAX | |
198f1251 TG |
5198 | {"section", s_alpha_section, 0}, |
5199 | {"literals", s_alpha_literals, 0}, | |
5200 | {"pdesc", s_alpha_pdesc, 0}, | |
5201 | {"name", s_alpha_name, 0}, | |
5202 | {"linkage", s_alpha_linkage, 0}, | |
5203 | {"code_address", s_alpha_code_address, 0}, | |
5204 | {"ent", s_alpha_ent, 0}, | |
5205 | {"frame", s_alpha_frame, 0}, | |
5206 | {"fp_save", s_alpha_fp_save, 0}, | |
5207 | {"mask", s_alpha_mask, 0}, | |
5208 | {"fmask", s_alpha_fmask, 0}, | |
5209 | {"end", s_alpha_end, 0}, | |
5210 | {"file", s_alpha_file, 0}, | |
5211 | {"rdata", s_alpha_section, 1}, | |
5212 | {"comm", s_alpha_comm, 0}, | |
5213 | {"link", s_alpha_section, 3}, | |
5214 | {"ctors", s_alpha_section, 4}, | |
5215 | {"dtors", s_alpha_section, 5}, | |
5216 | {"handler", s_alpha_handler, 0}, | |
5217 | {"handler_data", s_alpha_handler, 1}, | |
252b5132 RH |
5218 | #endif |
5219 | #ifdef OBJ_ELF | |
5220 | /* Frame related pseudos. */ | |
5221 | {"ent", s_alpha_ent, 0}, | |
5222 | {"end", s_alpha_end, 0}, | |
5223 | {"mask", s_alpha_mask, 0}, | |
5224 | {"fmask", s_alpha_mask, 1}, | |
5225 | {"frame", s_alpha_frame, 0}, | |
5226 | {"prologue", s_alpha_prologue, 0}, | |
4dc7ead9 RH |
5227 | {"file", s_alpha_file, 5}, |
5228 | {"loc", s_alpha_loc, 9}, | |
a8316fe2 RH |
5229 | {"stabs", s_alpha_stab, 's'}, |
5230 | {"stabn", s_alpha_stab, 'n'}, | |
f4b97536 | 5231 | {"usepv", s_alpha_usepv, 0}, |
252b5132 RH |
5232 | /* COFF debugging related pseudos. */ |
5233 | {"begin", s_alpha_coff_wrapper, 0}, | |
5234 | {"bend", s_alpha_coff_wrapper, 1}, | |
5235 | {"def", s_alpha_coff_wrapper, 2}, | |
5236 | {"dim", s_alpha_coff_wrapper, 3}, | |
5237 | {"endef", s_alpha_coff_wrapper, 4}, | |
4dc7ead9 RH |
5238 | {"scl", s_alpha_coff_wrapper, 5}, |
5239 | {"tag", s_alpha_coff_wrapper, 6}, | |
5240 | {"val", s_alpha_coff_wrapper, 7}, | |
198f1251 TG |
5241 | #else |
5242 | #ifdef OBJ_EVAX | |
5243 | {"prologue", s_alpha_prologue, 0}, | |
252b5132 RH |
5244 | #else |
5245 | {"prologue", s_ignore, 0}, | |
198f1251 | 5246 | #endif |
252b5132 RH |
5247 | #endif |
5248 | {"gprel32", s_alpha_gprel32, 0}, | |
5249 | {"t_floating", s_alpha_float_cons, 'd'}, | |
5250 | {"s_floating", s_alpha_float_cons, 'f'}, | |
5251 | {"f_floating", s_alpha_float_cons, 'F'}, | |
5252 | {"g_floating", s_alpha_float_cons, 'G'}, | |
5253 | {"d_floating", s_alpha_float_cons, 'D'}, | |
5254 | ||
5255 | {"proc", s_alpha_proc, 0}, | |
5256 | {"aproc", s_alpha_proc, 1}, | |
5257 | {"set", s_alpha_set, 0}, | |
5258 | {"reguse", s_ignore, 0}, | |
5259 | {"livereg", s_ignore, 0}, | |
5260 | {"base", s_alpha_base, 0}, /*??*/ | |
5261 | {"option", s_ignore, 0}, | |
5262 | {"aent", s_ignore, 0}, | |
5263 | {"ugen", s_ignore, 0}, | |
5264 | {"eflag", s_ignore, 0}, | |
5265 | ||
5266 | {"align", s_alpha_align, 0}, | |
5267 | {"double", s_alpha_float_cons, 'd'}, | |
5268 | {"float", s_alpha_float_cons, 'f'}, | |
5269 | {"single", s_alpha_float_cons, 'f'}, | |
5270 | {"ascii", s_alpha_stringer, 0}, | |
5271 | {"asciz", s_alpha_stringer, 1}, | |
5272 | {"string", s_alpha_stringer, 1}, | |
5273 | {"space", s_alpha_space, 0}, | |
5274 | {"skip", s_alpha_space, 0}, | |
5275 | {"zero", s_alpha_space, 0}, | |
5276 | ||
5277 | /* Unaligned data pseudos. */ | |
5278 | {"uword", s_alpha_ucons, 2}, | |
5279 | {"ulong", s_alpha_ucons, 4}, | |
5280 | {"uquad", s_alpha_ucons, 8}, | |
5281 | ||
5282 | #ifdef OBJ_ELF | |
5283 | /* Dwarf wants these versions of unaligned. */ | |
5284 | {"2byte", s_alpha_ucons, 2}, | |
5285 | {"4byte", s_alpha_ucons, 4}, | |
5286 | {"8byte", s_alpha_ucons, 8}, | |
5287 | #endif | |
5288 | ||
5289 | /* We don't do any optimizing, so we can safely ignore these. */ | |
5290 | {"noalias", s_ignore, 0}, | |
5291 | {"alias", s_ignore, 0}, | |
5292 | ||
5293 | {"arch", s_alpha_arch, 0}, | |
5294 | ||
5295 | {NULL, 0, 0}, | |
5296 | }; | |
252b5132 | 5297 | \f |
ea1562b3 | 5298 | #ifdef OBJ_ECOFF |
252b5132 | 5299 | |
ea1562b3 NC |
5300 | /* @@@ GP selection voodoo. All of this seems overly complicated and |
5301 | unnecessary; which is the primary reason it's for ECOFF only. */ | |
ea1562b3 NC |
5302 | |
5303 | static inline void | |
5304 | maybe_set_gp (asection *sec) | |
252b5132 | 5305 | { |
ea1562b3 NC |
5306 | bfd_vma vma; |
5307 | ||
5308 | if (!sec) | |
5309 | return; | |
a0f49396 | 5310 | vma = bfd_get_section_vma (sec->owner, sec); |
ea1562b3 NC |
5311 | if (vma && vma < alpha_gp_value) |
5312 | alpha_gp_value = vma; | |
5313 | } | |
5314 | ||
5315 | static void | |
5316 | select_gp_value (void) | |
5317 | { | |
9c2799c2 | 5318 | gas_assert (alpha_gp_value == 0); |
ea1562b3 NC |
5319 | |
5320 | /* Get minus-one in whatever width... */ | |
5321 | alpha_gp_value = 0; | |
5322 | alpha_gp_value--; | |
5323 | ||
5324 | /* Select the smallest VMA of these existing sections. */ | |
5325 | maybe_set_gp (alpha_lita_section); | |
5326 | ||
5327 | /* @@ Will a simple 0x8000 work here? If not, why not? */ | |
5328 | #define GP_ADJUSTMENT (0x8000 - 0x10) | |
5329 | ||
5330 | alpha_gp_value += GP_ADJUSTMENT; | |
5331 | ||
5332 | S_SET_VALUE (alpha_gp_symbol, alpha_gp_value); | |
5333 | ||
5334 | #ifdef DEBUG1 | |
5335 | printf (_("Chose GP value of %lx\n"), alpha_gp_value); | |
5336 | #endif | |
5337 | } | |
5338 | #endif /* OBJ_ECOFF */ | |
5339 | ||
5340 | #ifdef OBJ_ELF | |
5341 | /* Map 's' to SHF_ALPHA_GPREL. */ | |
5342 | ||
01e1a5bc | 5343 | bfd_vma |
6d4af3c2 | 5344 | alpha_elf_section_letter (int letter, const char **ptr_msg) |
ea1562b3 NC |
5345 | { |
5346 | if (letter == 's') | |
5347 | return SHF_ALPHA_GPREL; | |
5348 | ||
8f3bae45 | 5349 | *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string"); |
ea1562b3 NC |
5350 | return -1; |
5351 | } | |
5352 | ||
5353 | /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ | |
5354 | ||
5355 | flagword | |
01e1a5bc | 5356 | alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED) |
ea1562b3 NC |
5357 | { |
5358 | if (attr & SHF_ALPHA_GPREL) | |
5359 | flags |= SEC_SMALL_DATA; | |
5360 | return flags; | |
5361 | } | |
5362 | #endif /* OBJ_ELF */ | |
5363 | ||
5364 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents | |
5365 | of an rs_align_code fragment. */ | |
5366 | ||
5367 | void | |
5368 | alpha_handle_align (fragS *fragp) | |
5369 | { | |
d9235011 TS |
5370 | static unsigned char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f }; |
5371 | static unsigned char const nopunop[8] = | |
ea1562b3 NC |
5372 | { |
5373 | 0x1f, 0x04, 0xff, 0x47, | |
5374 | 0x00, 0x00, 0xfe, 0x2f | |
5375 | }; | |
5376 | ||
5377 | int bytes, fix; | |
5378 | char *p; | |
5379 | ||
5380 | if (fragp->fr_type != rs_align_code) | |
5381 | return; | |
5382 | ||
5383 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
5384 | p = fragp->fr_literal + fragp->fr_fix; | |
5385 | fix = 0; | |
5386 | ||
5387 | if (bytes & 3) | |
5388 | { | |
5389 | fix = bytes & 3; | |
5390 | memset (p, 0, fix); | |
5391 | p += fix; | |
5392 | bytes -= fix; | |
5393 | } | |
5394 | ||
5395 | if (bytes & 4) | |
5396 | { | |
5397 | memcpy (p, unop, 4); | |
5398 | p += 4; | |
5399 | bytes -= 4; | |
5400 | fix += 4; | |
5401 | } | |
5402 | ||
5403 | memcpy (p, nopunop, 8); | |
5404 | ||
5405 | fragp->fr_fix += fix; | |
5406 | fragp->fr_var = 8; | |
5407 | } | |
5408 | \f | |
5409 | /* Public interface functions. */ | |
5410 | ||
5411 | /* This function is called once, at assembler startup time. It sets | |
5412 | up all the tables, etc. that the MD part of the assembler will | |
5413 | need, that can be determined before arguments are parsed. */ | |
5414 | ||
5415 | void | |
5416 | md_begin (void) | |
5417 | { | |
5418 | unsigned int i; | |
5419 | ||
5420 | /* Verify that X_op field is wide enough. */ | |
5421 | { | |
5422 | expressionS e; | |
5423 | ||
5424 | e.X_op = O_max; | |
9c2799c2 | 5425 | gas_assert (e.X_op == O_max); |
ea1562b3 NC |
5426 | } |
5427 | ||
5428 | /* Create the opcode hash table. */ | |
5429 | alpha_opcode_hash = hash_new (); | |
5430 | ||
5431 | for (i = 0; i < alpha_num_opcodes;) | |
5432 | { | |
5433 | const char *name, *retval, *slash; | |
5434 | ||
5435 | name = alpha_opcodes[i].name; | |
5436 | retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]); | |
5437 | if (retval) | |
5438 | as_fatal (_("internal error: can't hash opcode `%s': %s"), | |
5439 | name, retval); | |
5440 | ||
5441 | /* Some opcodes include modifiers of various sorts with a "/mod" | |
5442 | syntax, like the architecture manual suggests. However, for | |
5443 | use with gcc at least, we also need access to those same opcodes | |
5444 | without the "/". */ | |
5445 | ||
5446 | if ((slash = strchr (name, '/')) != NULL) | |
5447 | { | |
21d799b5 | 5448 | char *p = (char *) xmalloc (strlen (name)); |
ea1562b3 NC |
5449 | |
5450 | memcpy (p, name, slash - name); | |
5451 | strcpy (p + (slash - name), slash + 1); | |
5452 | ||
5453 | (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]); | |
5454 | /* Ignore failures -- the opcode table does duplicate some | |
5455 | variants in different forms, like "hw_stq" and "hw_st/q". */ | |
5456 | } | |
5457 | ||
5458 | while (++i < alpha_num_opcodes | |
5459 | && (alpha_opcodes[i].name == name | |
5460 | || !strcmp (alpha_opcodes[i].name, name))) | |
5461 | continue; | |
5462 | } | |
5463 | ||
5464 | /* Create the macro hash table. */ | |
5465 | alpha_macro_hash = hash_new (); | |
5466 | ||
5467 | for (i = 0; i < alpha_num_macros;) | |
5468 | { | |
5469 | const char *name, *retval; | |
5470 | ||
5471 | name = alpha_macros[i].name; | |
5472 | retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]); | |
5473 | if (retval) | |
5474 | as_fatal (_("internal error: can't hash macro `%s': %s"), | |
5475 | name, retval); | |
5476 | ||
5477 | while (++i < alpha_num_macros | |
5478 | && (alpha_macros[i].name == name | |
5479 | || !strcmp (alpha_macros[i].name, name))) | |
5480 | continue; | |
5481 | } | |
5482 | ||
5483 | /* Construct symbols for each of the registers. */ | |
5484 | for (i = 0; i < 32; ++i) | |
5485 | { | |
5486 | char name[4]; | |
5487 | ||
5488 | sprintf (name, "$%d", i); | |
5489 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5490 | &zero_address_frag); | |
5491 | } | |
5492 | ||
5493 | for (; i < 64; ++i) | |
5494 | { | |
5495 | char name[5]; | |
5496 | ||
5497 | sprintf (name, "$f%d", i - 32); | |
5498 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5499 | &zero_address_frag); | |
5500 | } | |
5501 | ||
5502 | /* Create the special symbols and sections we'll be using. */ | |
5503 | ||
5504 | /* So .sbss will get used for tiny objects. */ | |
5505 | bfd_set_gp_size (stdoutput, g_switch_value); | |
5506 | ||
5507 | #ifdef OBJ_ECOFF | |
5508 | create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol); | |
5509 | ||
5510 | /* For handling the GP, create a symbol that won't be output in the | |
5511 | symbol table. We'll edit it out of relocs later. */ | |
5512 | alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000, | |
5513 | &zero_address_frag); | |
5514 | #endif | |
5515 | ||
5516 | #ifdef OBJ_EVAX | |
5517 | create_literal_section (".link", &alpha_link_section, &alpha_link_symbol); | |
5518 | #endif | |
5519 | ||
5520 | #ifdef OBJ_ELF | |
5521 | if (ECOFF_DEBUGGING) | |
5522 | { | |
5523 | segT sec = subseg_new (".mdebug", (subsegT) 0); | |
5524 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
5525 | bfd_set_section_alignment (stdoutput, sec, 3); | |
5526 | } | |
5527 | #endif | |
5528 | ||
5529 | /* Create literal lookup hash table. */ | |
5530 | alpha_literal_hash = hash_new (); | |
5531 | ||
5532 | subseg_set (text_section, 0); | |
5533 | } | |
5534 | ||
5535 | /* The public interface to the instruction assembler. */ | |
5536 | ||
5537 | void | |
5538 | md_assemble (char *str) | |
5539 | { | |
5540 | /* Current maximum is 13. */ | |
5541 | char opname[32]; | |
5542 | expressionS tok[MAX_INSN_ARGS]; | |
5543 | int ntok, trunclen; | |
5544 | size_t opnamelen; | |
5545 | ||
5546 | /* Split off the opcode. */ | |
5547 | opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819"); | |
5548 | trunclen = (opnamelen < sizeof (opname) - 1 | |
5549 | ? opnamelen | |
5550 | : sizeof (opname) - 1); | |
5551 | memcpy (opname, str, trunclen); | |
5552 | opname[trunclen] = '\0'; | |
5553 | ||
5554 | /* Tokenize the rest of the line. */ | |
5555 | if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0) | |
5556 | { | |
5557 | if (ntok != TOKENIZE_ERROR_REPORT) | |
5558 | as_bad (_("syntax error")); | |
5559 | ||
5560 | return; | |
5561 | } | |
5562 | ||
5563 | /* Finish it off. */ | |
5564 | assemble_tokens (opname, tok, ntok, alpha_macros_on); | |
5565 | } | |
5566 | ||
5567 | /* Round up a section's size to the appropriate boundary. */ | |
5568 | ||
5569 | valueT | |
5570 | md_section_align (segT seg, valueT size) | |
5571 | { | |
5572 | int align = bfd_get_section_alignment (stdoutput, seg); | |
5573 | valueT mask = ((valueT) 1 << align) - 1; | |
5574 | ||
5575 | return (size + mask) & ~mask; | |
5576 | } | |
5577 | ||
5578 | /* Turn a string in input_line_pointer into a floating point constant | |
5579 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
5580 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
5581 | returned, or NULL on OK. */ | |
5582 | ||
6d4af3c2 | 5583 | const char * |
ea1562b3 NC |
5584 | md_atof (int type, char *litP, int *sizeP) |
5585 | { | |
6d4af3c2 | 5586 | extern const char *vax_md_atof (int, char *, int *); |
ea1562b3 NC |
5587 | |
5588 | switch (type) | |
5589 | { | |
5590 | /* VAX floats. */ | |
5591 | case 'G': | |
499ac353 | 5592 | /* vax_md_atof() doesn't like "G" for some reason. */ |
ea1562b3 NC |
5593 | type = 'g'; |
5594 | case 'F': | |
5595 | case 'D': | |
5596 | return vax_md_atof (type, litP, sizeP); | |
5597 | ||
ea1562b3 | 5598 | default: |
499ac353 | 5599 | return ieee_md_atof (type, litP, sizeP, FALSE); |
ea1562b3 | 5600 | } |
ea1562b3 NC |
5601 | } |
5602 | ||
5603 | /* Take care of the target-specific command-line options. */ | |
5604 | ||
5605 | int | |
17b9d67d | 5606 | md_parse_option (int c, const char *arg) |
ea1562b3 NC |
5607 | { |
5608 | switch (c) | |
5609 | { | |
5610 | case 'F': | |
5611 | alpha_nofloats_on = 1; | |
5612 | break; | |
5613 | ||
5614 | case OPTION_32ADDR: | |
5615 | alpha_addr32_on = 1; | |
5616 | break; | |
5617 | ||
5618 | case 'g': | |
5619 | alpha_debug = 1; | |
5620 | break; | |
5621 | ||
5622 | case 'G': | |
5623 | g_switch_value = atoi (arg); | |
5624 | break; | |
5625 | ||
5626 | case 'm': | |
5627 | { | |
5628 | const struct cpu_type *p; | |
5629 | ||
5630 | for (p = cpu_types; p->name; ++p) | |
5631 | if (strcmp (arg, p->name) == 0) | |
5632 | { | |
5633 | alpha_target_name = p->name, alpha_target = p->flags; | |
5634 | goto found; | |
5635 | } | |
5636 | as_warn (_("Unknown CPU identifier `%s'"), arg); | |
5637 | found:; | |
5638 | } | |
5639 | break; | |
5640 | ||
5641 | #ifdef OBJ_EVAX | |
5642 | case '+': /* For g++. Hash any name > 63 chars long. */ | |
5643 | alpha_flag_hash_long_names = 1; | |
5644 | break; | |
5645 | ||
5646 | case 'H': /* Show new symbol after hash truncation. */ | |
5647 | alpha_flag_show_after_trunc = 1; | |
5648 | break; | |
5649 | ||
5650 | case 'h': /* For gnu-c/vax compatibility. */ | |
5651 | break; | |
198f1251 TG |
5652 | |
5653 | case OPTION_REPLACE: | |
5654 | alpha_flag_replace = 1; | |
5655 | break; | |
5656 | ||
5657 | case OPTION_NOREPLACE: | |
5658 | alpha_flag_replace = 0; | |
5659 | break; | |
ea1562b3 NC |
5660 | #endif |
5661 | ||
5662 | case OPTION_RELAX: | |
5663 | alpha_flag_relax = 1; | |
5664 | break; | |
5665 | ||
5666 | #ifdef OBJ_ELF | |
5667 | case OPTION_MDEBUG: | |
5668 | alpha_flag_mdebug = 1; | |
5669 | break; | |
5670 | case OPTION_NO_MDEBUG: | |
5671 | alpha_flag_mdebug = 0; | |
5672 | break; | |
5673 | #endif | |
5674 | ||
5675 | default: | |
5676 | return 0; | |
5677 | } | |
5678 | ||
5679 | return 1; | |
5680 | } | |
5681 | ||
5682 | /* Print a description of the command-line options that we accept. */ | |
5683 | ||
5684 | void | |
5685 | md_show_usage (FILE *stream) | |
5686 | { | |
5687 | fputs (_("\ | |
5688 | Alpha options:\n\ | |
5689 | -32addr treat addresses as 32-bit values\n\ | |
5690 | -F lack floating point instructions support\n\ | |
5691 | -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ | |
5692 | specify variant of Alpha architecture\n\ | |
5693 | -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ | |
5694 | these variants include PALcode opcodes\n"), | |
5695 | stream); | |
5696 | #ifdef OBJ_EVAX | |
5697 | fputs (_("\ | |
5698 | VMS options:\n\ | |
198f1251 TG |
5699 | -+ encode (don't truncate) names longer than 64 characters\n\ |
5700 | -H show new symbol after hash truncation\n\ | |
5701 | -replace/-noreplace enable or disable the optimization of procedure calls\n"), | |
ea1562b3 NC |
5702 | stream); |
5703 | #endif | |
5704 | } | |
5705 | ||
5706 | /* Decide from what point a pc-relative relocation is relative to, | |
5707 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
5708 | ||
5709 | long | |
5710 | md_pcrel_from (fixS *fixP) | |
5711 | { | |
5712 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; | |
5713 | ||
5714 | switch (fixP->fx_r_type) | |
5715 | { | |
5716 | case BFD_RELOC_23_PCREL_S2: | |
5717 | case BFD_RELOC_ALPHA_HINT: | |
5718 | case BFD_RELOC_ALPHA_BRSGP: | |
5719 | return addr + 4; | |
5720 | default: | |
5721 | return addr; | |
5722 | } | |
5723 | } | |
5724 | ||
5725 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
5726 | ignored; perhaps it was once meaningful, but now it is historical. | |
5727 | To indicate that a fixup has been eliminated, set fixP->fx_done. | |
5728 | ||
5729 | For ELF, here it is that we transform the GPDISP_HI16 reloc we used | |
5730 | internally into the GPDISP reloc used externally. We had to do | |
5731 | this so that we'd have the GPDISP_LO16 reloc as a tag to compute | |
5732 | the distance to the "lda" instruction for setting the addend to | |
5733 | GPDISP. */ | |
5734 | ||
5735 | void | |
55cf6793 | 5736 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
ea1562b3 NC |
5737 | { |
5738 | char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; | |
5739 | valueT value = * valP; | |
5740 | unsigned image, size; | |
5741 | ||
5742 | switch (fixP->fx_r_type) | |
5743 | { | |
5744 | /* The GPDISP relocations are processed internally with a symbol | |
5745 | referring to the current function's section; we need to drop | |
5746 | in a value which, when added to the address of the start of | |
5747 | the function, gives the desired GP. */ | |
5748 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
5749 | { | |
5750 | fixS *next = fixP->fx_next; | |
5751 | ||
5752 | /* With user-specified !gpdisp relocations, we can be missing | |
5753 | the matching LO16 reloc. We will have already issued an | |
5754 | error message. */ | |
5755 | if (next) | |
5756 | fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where | |
5757 | - fixP->fx_frag->fr_address - fixP->fx_where); | |
5758 | ||
5759 | value = (value - sign_extend_16 (value)) >> 16; | |
5760 | } | |
5761 | #ifdef OBJ_ELF | |
5762 | fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP; | |
5763 | #endif | |
5764 | goto do_reloc_gp; | |
5765 | ||
5766 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
5767 | value = sign_extend_16 (value); | |
5768 | fixP->fx_offset = 0; | |
5769 | #ifdef OBJ_ELF | |
5770 | fixP->fx_done = 1; | |
5771 | #endif | |
5772 | ||
5773 | do_reloc_gp: | |
5774 | fixP->fx_addsy = section_symbol (seg); | |
5775 | md_number_to_chars (fixpos, value, 2); | |
5776 | break; | |
5777 | ||
5778 | case BFD_RELOC_16: | |
5779 | if (fixP->fx_pcrel) | |
5780 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
5781 | size = 2; | |
5782 | goto do_reloc_xx; | |
5783 | ||
5784 | case BFD_RELOC_32: | |
5785 | if (fixP->fx_pcrel) | |
5786 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
5787 | size = 4; | |
5788 | goto do_reloc_xx; | |
5789 | ||
5790 | case BFD_RELOC_64: | |
5791 | if (fixP->fx_pcrel) | |
5792 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
5793 | size = 8; | |
5794 | ||
5795 | do_reloc_xx: | |
5796 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5797 | { | |
5798 | md_number_to_chars (fixpos, value, size); | |
5799 | goto done; | |
5800 | } | |
5801 | return; | |
5802 | ||
5803 | #ifdef OBJ_ECOFF | |
5804 | case BFD_RELOC_GPREL32: | |
9c2799c2 | 5805 | gas_assert (fixP->fx_subsy == alpha_gp_symbol); |
ea1562b3 NC |
5806 | fixP->fx_subsy = 0; |
5807 | /* FIXME: inherited this obliviousness of `value' -- why? */ | |
5808 | md_number_to_chars (fixpos, -alpha_gp_value, 4); | |
5809 | break; | |
5810 | #else | |
5811 | case BFD_RELOC_GPREL32: | |
5812 | #endif | |
5813 | case BFD_RELOC_GPREL16: | |
5814 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
5815 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
5816 | return; | |
5817 | ||
5818 | case BFD_RELOC_23_PCREL_S2: | |
5819 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5820 | { | |
5821 | image = bfd_getl32 (fixpos); | |
5822 | image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF); | |
5823 | goto write_done; | |
5824 | } | |
5825 | return; | |
5826 | ||
5827 | case BFD_RELOC_ALPHA_HINT: | |
5828 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5829 | { | |
5830 | image = bfd_getl32 (fixpos); | |
5831 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5832 | goto write_done; | |
5833 | } | |
5834 | return; | |
5835 | ||
5836 | #ifdef OBJ_ELF | |
5837 | case BFD_RELOC_ALPHA_BRSGP: | |
5838 | return; | |
5839 | ||
5840 | case BFD_RELOC_ALPHA_TLSGD: | |
5841 | case BFD_RELOC_ALPHA_TLSLDM: | |
5842 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
5843 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
5844 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
5845 | case BFD_RELOC_ALPHA_DTPREL16: | |
5846 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
5847 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
5848 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
5849 | case BFD_RELOC_ALPHA_TPREL16: | |
5850 | if (fixP->fx_addsy) | |
5851 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
5852 | return; | |
5853 | #endif | |
5854 | ||
5855 | #ifdef OBJ_ECOFF | |
5856 | case BFD_RELOC_ALPHA_LITERAL: | |
5857 | md_number_to_chars (fixpos, value, 2); | |
5858 | return; | |
5859 | #endif | |
5860 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
5861 | case BFD_RELOC_ALPHA_LITUSE: | |
5862 | case BFD_RELOC_ALPHA_LINKAGE: | |
5863 | case BFD_RELOC_ALPHA_CODEADDR: | |
5864 | return; | |
5865 | ||
198f1251 TG |
5866 | #ifdef OBJ_EVAX |
5867 | case BFD_RELOC_ALPHA_NOP: | |
5868 | value -= (8 + 4); /* PC-relative, base is jsr+4. */ | |
5869 | ||
5870 | /* From B.4.5.2 of the OpenVMS Linker Utility Manual: | |
5871 | "Finally, the ETIR$C_STC_BSR command passes the same address | |
5872 | as ETIR$C_STC_NOP (so that they will fail or succeed together), | |
5873 | and the same test is done again." */ | |
5874 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5875 | { | |
5876 | fixP->fx_addnumber = -value; | |
5877 | return; | |
5878 | } | |
5879 | ||
5880 | if ((abs (value) >> 2) & ~0xfffff) | |
5881 | goto done; | |
5882 | else | |
5883 | { | |
5884 | /* Change to a nop. */ | |
5885 | image = 0x47FF041F; | |
5886 | goto write_done; | |
5887 | } | |
5888 | ||
5889 | case BFD_RELOC_ALPHA_LDA: | |
5890 | /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute | |
5891 | the value for an O_subtract. */ | |
5892 | if (fixP->fx_addsy | |
5893 | && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5894 | { | |
5895 | fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value; | |
5896 | return; | |
5897 | } | |
5898 | ||
5899 | if ((abs (value)) & ~0x7fff) | |
5900 | goto done; | |
5901 | else | |
5902 | { | |
5903 | /* Change to an lda. */ | |
5904 | image = 0x237B0000 | (value & 0xFFFF); | |
5905 | goto write_done; | |
5906 | } | |
5907 | ||
5908 | case BFD_RELOC_ALPHA_BSR: | |
5909 | case BFD_RELOC_ALPHA_BOH: | |
5910 | value -= 4; /* PC-relative, base is jsr+4. */ | |
5911 | ||
5912 | /* See comment in the BFD_RELOC_ALPHA_NOP case above. */ | |
5913 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5914 | { | |
5915 | fixP->fx_addnumber = -value; | |
5916 | return; | |
5917 | } | |
5918 | ||
5919 | if ((abs (value) >> 2) & ~0xfffff) | |
5920 | { | |
5921 | /* Out of range. */ | |
5922 | if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH) | |
5923 | { | |
5924 | /* Add a hint. */ | |
5925 | image = bfd_getl32(fixpos); | |
5926 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5927 | goto write_done; | |
5928 | } | |
5929 | goto done; | |
5930 | } | |
5931 | else | |
5932 | { | |
5933 | /* Change to a branch. */ | |
5934 | image = 0xD3400000 | ((value >> 2) & 0x1FFFFF); | |
5935 | goto write_done; | |
5936 | } | |
5937 | #endif | |
5938 | ||
ea1562b3 NC |
5939 | case BFD_RELOC_VTABLE_INHERIT: |
5940 | case BFD_RELOC_VTABLE_ENTRY: | |
5941 | return; | |
5942 | ||
5943 | default: | |
5944 | { | |
5945 | const struct alpha_operand *operand; | |
5946 | ||
5947 | if ((int) fixP->fx_r_type >= 0) | |
5948 | as_fatal (_("unhandled relocation type %s"), | |
5949 | bfd_get_reloc_code_name (fixP->fx_r_type)); | |
5950 | ||
9c2799c2 | 5951 | gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands); |
ea1562b3 NC |
5952 | operand = &alpha_operands[-(int) fixP->fx_r_type]; |
5953 | ||
5954 | /* The rest of these fixups only exist internally during symbol | |
5955 | resolution and have no representation in the object file. | |
5956 | Therefore they must be completely resolved as constants. */ | |
5957 | ||
5958 | if (fixP->fx_addsy != 0 | |
5959 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section) | |
5960 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
5961 | _("non-absolute expression in constant field")); | |
5962 | ||
5963 | image = bfd_getl32 (fixpos); | |
5964 | image = insert_operand (image, operand, (offsetT) value, | |
5965 | fixP->fx_file, fixP->fx_line); | |
5966 | } | |
5967 | goto write_done; | |
5968 | } | |
5969 | ||
5970 | if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0) | |
5971 | return; | |
5972 | else | |
5973 | { | |
5974 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
5975 | _("type %d reloc done?\n"), (int) fixP->fx_r_type); | |
5976 | goto done; | |
5977 | } | |
5978 | ||
5979 | write_done: | |
5980 | md_number_to_chars (fixpos, image, 4); | |
5981 | ||
5982 | done: | |
5983 | fixP->fx_done = 1; | |
5984 | } | |
5985 | ||
5986 | /* Look for a register name in the given symbol. */ | |
5987 | ||
5988 | symbolS * | |
5989 | md_undefined_symbol (char *name) | |
5990 | { | |
5991 | if (*name == '$') | |
5992 | { | |
5993 | int is_float = 0, num; | |
5994 | ||
5995 | switch (*++name) | |
5996 | { | |
5997 | case 'f': | |
5998 | if (name[1] == 'p' && name[2] == '\0') | |
5999 | return alpha_register_table[AXP_REG_FP]; | |
6000 | is_float = 32; | |
6001 | /* Fall through. */ | |
6002 | ||
6003 | case 'r': | |
6004 | if (!ISDIGIT (*++name)) | |
6005 | break; | |
6006 | /* Fall through. */ | |
6007 | ||
6008 | case '0': case '1': case '2': case '3': case '4': | |
6009 | case '5': case '6': case '7': case '8': case '9': | |
6010 | if (name[1] == '\0') | |
6011 | num = name[0] - '0'; | |
6012 | else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0') | |
6013 | { | |
6014 | num = (name[0] - '0') * 10 + name[1] - '0'; | |
6015 | if (num >= 32) | |
6016 | break; | |
6017 | } | |
6018 | else | |
6019 | break; | |
6020 | ||
6021 | if (!alpha_noat_on && (num + is_float) == AXP_REG_AT) | |
6022 | as_warn (_("Used $at without \".set noat\"")); | |
6023 | return alpha_register_table[num + is_float]; | |
6024 | ||
6025 | case 'a': | |
6026 | if (name[1] == 't' && name[2] == '\0') | |
6027 | { | |
6028 | if (!alpha_noat_on) | |
6029 | as_warn (_("Used $at without \".set noat\"")); | |
6030 | return alpha_register_table[AXP_REG_AT]; | |
6031 | } | |
6032 | break; | |
6033 | ||
6034 | case 'g': | |
6035 | if (name[1] == 'p' && name[2] == '\0') | |
6036 | return alpha_register_table[alpha_gp_register]; | |
6037 | break; | |
6038 | ||
6039 | case 's': | |
6040 | if (name[1] == 'p' && name[2] == '\0') | |
6041 | return alpha_register_table[AXP_REG_SP]; | |
6042 | break; | |
6043 | } | |
6044 | } | |
6045 | return NULL; | |
6046 | } | |
6047 | ||
6048 | #ifdef OBJ_ECOFF | |
6049 | /* @@@ Magic ECOFF bits. */ | |
6050 | ||
6051 | void | |
6052 | alpha_frob_ecoff_data (void) | |
6053 | { | |
6054 | select_gp_value (); | |
6055 | /* $zero and $f31 are read-only. */ | |
6056 | alpha_gprmask &= ~1; | |
6057 | alpha_fprmask &= ~1; | |
6058 | } | |
6059 | #endif | |
6060 | ||
6061 | /* Hook to remember a recently defined label so that the auto-align | |
6062 | code can adjust the symbol after we know what alignment will be | |
6063 | required. */ | |
6064 | ||
6065 | void | |
6066 | alpha_define_label (symbolS *sym) | |
6067 | { | |
6068 | alpha_insn_label = sym; | |
07a53e5c RH |
6069 | #ifdef OBJ_ELF |
6070 | dwarf2_emit_label (sym); | |
6071 | #endif | |
ea1562b3 NC |
6072 | } |
6073 | ||
6074 | /* Return true if we must always emit a reloc for a type and false if | |
6075 | there is some hope of resolving it at assembly time. */ | |
6076 | ||
6077 | int | |
6078 | alpha_force_relocation (fixS *f) | |
6079 | { | |
6080 | if (alpha_flag_relax) | |
6081 | return 1; | |
6082 | ||
6083 | switch (f->fx_r_type) | |
6084 | { | |
6085 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6086 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6087 | case BFD_RELOC_ALPHA_GPDISP: | |
6088 | case BFD_RELOC_ALPHA_LITERAL: | |
6089 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6090 | case BFD_RELOC_ALPHA_LITUSE: | |
6091 | case BFD_RELOC_GPREL16: | |
6092 | case BFD_RELOC_GPREL32: | |
6093 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6094 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6095 | case BFD_RELOC_ALPHA_LINKAGE: | |
6096 | case BFD_RELOC_ALPHA_CODEADDR: | |
6097 | case BFD_RELOC_ALPHA_BRSGP: | |
6098 | case BFD_RELOC_ALPHA_TLSGD: | |
6099 | case BFD_RELOC_ALPHA_TLSLDM: | |
6100 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6101 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6102 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6103 | case BFD_RELOC_ALPHA_DTPREL16: | |
6104 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6105 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6106 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6107 | case BFD_RELOC_ALPHA_TPREL16: | |
198f1251 TG |
6108 | #ifdef OBJ_EVAX |
6109 | case BFD_RELOC_ALPHA_NOP: | |
6110 | case BFD_RELOC_ALPHA_BSR: | |
6111 | case BFD_RELOC_ALPHA_LDA: | |
6112 | case BFD_RELOC_ALPHA_BOH: | |
6113 | #endif | |
ea1562b3 | 6114 | return 1; |
252b5132 | 6115 | |
ea1562b3 NC |
6116 | default: |
6117 | break; | |
6118 | } | |
252b5132 | 6119 | |
ea1562b3 | 6120 | return generic_force_reloc (f); |
252b5132 RH |
6121 | } |
6122 | ||
ea1562b3 | 6123 | /* Return true if we can partially resolve a relocation now. */ |
252b5132 | 6124 | |
ea1562b3 NC |
6125 | int |
6126 | alpha_fix_adjustable (fixS *f) | |
252b5132 | 6127 | { |
ea1562b3 NC |
6128 | /* Are there any relocation types for which we must generate a |
6129 | reloc but we can adjust the values contained within it? */ | |
6130 | switch (f->fx_r_type) | |
6131 | { | |
6132 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6133 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6134 | case BFD_RELOC_ALPHA_GPDISP: | |
6135 | return 0; | |
252b5132 | 6136 | |
ea1562b3 NC |
6137 | case BFD_RELOC_ALPHA_LITERAL: |
6138 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6139 | case BFD_RELOC_ALPHA_LITUSE: | |
6140 | case BFD_RELOC_ALPHA_LINKAGE: | |
6141 | case BFD_RELOC_ALPHA_CODEADDR: | |
6142 | return 1; | |
252b5132 | 6143 | |
ea1562b3 NC |
6144 | case BFD_RELOC_VTABLE_ENTRY: |
6145 | case BFD_RELOC_VTABLE_INHERIT: | |
6146 | return 0; | |
252b5132 | 6147 | |
ea1562b3 NC |
6148 | case BFD_RELOC_GPREL16: |
6149 | case BFD_RELOC_GPREL32: | |
6150 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6151 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6152 | case BFD_RELOC_23_PCREL_S2: | |
198f1251 | 6153 | case BFD_RELOC_16: |
ea1562b3 NC |
6154 | case BFD_RELOC_32: |
6155 | case BFD_RELOC_64: | |
6156 | case BFD_RELOC_ALPHA_HINT: | |
6157 | return 1; | |
252b5132 | 6158 | |
ea1562b3 NC |
6159 | case BFD_RELOC_ALPHA_TLSGD: |
6160 | case BFD_RELOC_ALPHA_TLSLDM: | |
6161 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6162 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6163 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6164 | case BFD_RELOC_ALPHA_DTPREL16: | |
6165 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6166 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6167 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6168 | case BFD_RELOC_ALPHA_TPREL16: | |
6169 | /* ??? No idea why we can't return a reference to .tbss+10, but | |
6170 | we're preventing this in the other assemblers. Follow for now. */ | |
6171 | return 0; | |
252b5132 | 6172 | |
ea1562b3 NC |
6173 | #ifdef OBJ_ELF |
6174 | case BFD_RELOC_ALPHA_BRSGP: | |
6175 | /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and | |
6176 | let it get resolved at assembly time. */ | |
6177 | { | |
6178 | symbolS *sym = f->fx_addsy; | |
6179 | const char *name; | |
6180 | int offset = 0; | |
252b5132 | 6181 | |
ea1562b3 NC |
6182 | if (generic_force_reloc (f)) |
6183 | return 0; | |
252b5132 | 6184 | |
ea1562b3 NC |
6185 | switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD) |
6186 | { | |
6187 | case STO_ALPHA_NOPV: | |
6188 | break; | |
6189 | case STO_ALPHA_STD_GPLOAD: | |
6190 | offset = 8; | |
6191 | break; | |
6192 | default: | |
6193 | if (S_IS_LOCAL (sym)) | |
6194 | name = "<local>"; | |
6195 | else | |
6196 | name = S_GET_NAME (sym); | |
6197 | as_bad_where (f->fx_file, f->fx_line, | |
6198 | _("!samegp reloc against symbol without .prologue: %s"), | |
6199 | name); | |
6200 | break; | |
6201 | } | |
6202 | f->fx_r_type = BFD_RELOC_23_PCREL_S2; | |
6203 | f->fx_offset += offset; | |
6204 | return 1; | |
6205 | } | |
252b5132 | 6206 | #endif |
198f1251 TG |
6207 | #ifdef OBJ_EVAX |
6208 | case BFD_RELOC_ALPHA_NOP: | |
6209 | case BFD_RELOC_ALPHA_BSR: | |
6210 | case BFD_RELOC_ALPHA_LDA: | |
6211 | case BFD_RELOC_ALPHA_BOH: | |
6212 | return 1; | |
6213 | #endif | |
d61a78a7 | 6214 | |
ea1562b3 NC |
6215 | default: |
6216 | return 1; | |
6217 | } | |
d61a78a7 RH |
6218 | } |
6219 | ||
ea1562b3 NC |
6220 | /* Generate the BFD reloc to be stuck in the object file from the |
6221 | fixup used internally in the assembler. */ | |
d61a78a7 | 6222 | |
ea1562b3 NC |
6223 | arelent * |
6224 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, | |
6225 | fixS *fixp) | |
d61a78a7 | 6226 | { |
ea1562b3 | 6227 | arelent *reloc; |
d61a78a7 | 6228 | |
21d799b5 NC |
6229 | reloc = (arelent *) xmalloc (sizeof (* reloc)); |
6230 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
ea1562b3 NC |
6231 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
6232 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
252b5132 | 6233 | |
ea1562b3 NC |
6234 | /* Make sure none of our internal relocations make it this far. |
6235 | They'd better have been fully resolved by this point. */ | |
9c2799c2 | 6236 | gas_assert ((int) fixp->fx_r_type > 0); |
252b5132 | 6237 | |
ea1562b3 NC |
6238 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
6239 | if (reloc->howto == NULL) | |
252b5132 | 6240 | { |
ea1562b3 NC |
6241 | as_bad_where (fixp->fx_file, fixp->fx_line, |
6242 | _("cannot represent `%s' relocation in object file"), | |
6243 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
6244 | return NULL; | |
252b5132 | 6245 | } |
252b5132 | 6246 | |
ea1562b3 NC |
6247 | if (!fixp->fx_pcrel != !reloc->howto->pc_relative) |
6248 | as_fatal (_("internal error? cannot generate `%s' relocation"), | |
6249 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
252b5132 | 6250 | |
9c2799c2 | 6251 | gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); |
ea1562b3 | 6252 | |
bc1bc43f RH |
6253 | reloc->addend = fixp->fx_offset; |
6254 | ||
ea1562b3 | 6255 | #ifdef OBJ_ECOFF |
bc1bc43f RH |
6256 | /* Fake out bfd_perform_relocation. sigh. */ |
6257 | /* ??? Better would be to use the special_function hook. */ | |
ea1562b3 | 6258 | if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL) |
ea1562b3 | 6259 | reloc->addend = -alpha_gp_value; |
ea1562b3 | 6260 | #endif |
252b5132 | 6261 | |
198f1251 TG |
6262 | #ifdef OBJ_EVAX |
6263 | switch (fixp->fx_r_type) | |
6264 | { | |
6265 | struct evax_private_udata_struct *udata; | |
6266 | const char *pname; | |
6267 | int pname_len; | |
6268 | ||
6269 | case BFD_RELOC_ALPHA_LINKAGE: | |
51794af8 | 6270 | /* Copy the linkage index. */ |
198f1251 TG |
6271 | reloc->addend = fixp->fx_addnumber; |
6272 | break; | |
6273 | ||
6274 | case BFD_RELOC_ALPHA_NOP: | |
6275 | case BFD_RELOC_ALPHA_BSR: | |
6276 | case BFD_RELOC_ALPHA_LDA: | |
6277 | case BFD_RELOC_ALPHA_BOH: | |
6278 | pname = symbol_get_bfdsym (fixp->fx_addsy)->name; | |
6279 | ||
6280 | /* We need the non-suffixed name of the procedure. Beware that | |
6281 | the main symbol might be equated so look it up and take its name. */ | |
6282 | pname_len = strlen (pname); | |
6283 | if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0) | |
6284 | { | |
6285 | symbolS *sym; | |
39a0d071 | 6286 | char *my_pname = (char *) xmalloc (pname_len - 4 + 1); |
e1f4d6bd TG |
6287 | |
6288 | memcpy (my_pname, pname, pname_len - 4); | |
198f1251 TG |
6289 | my_pname [pname_len - 4] = 0; |
6290 | sym = symbol_find (my_pname); | |
39a0d071 | 6291 | free (my_pname); |
198f1251 TG |
6292 | if (sym == NULL) |
6293 | abort (); | |
e1f4d6bd | 6294 | |
198f1251 TG |
6295 | while (symbol_equated_reloc_p (sym)) |
6296 | { | |
6297 | symbolS *n = symbol_get_value_expression (sym)->X_add_symbol; | |
6298 | ||
6299 | /* We must avoid looping, as that can occur with a badly | |
6300 | written program. */ | |
6301 | if (n == sym) | |
6302 | break; | |
6303 | sym = n; | |
6304 | } | |
6305 | pname = symbol_get_bfdsym (sym)->name; | |
6306 | } | |
6307 | ||
6308 | udata = (struct evax_private_udata_struct *) | |
6309 | xmalloc (sizeof (struct evax_private_udata_struct)); | |
6310 | udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy); | |
6311 | udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym); | |
6312 | udata->origname = (char *)pname; | |
6313 | udata->lkindex = ((struct evax_private_udata_struct *) | |
6314 | symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex; | |
6315 | reloc->sym_ptr_ptr = (void *)udata; | |
6316 | reloc->addend = fixp->fx_addnumber; | |
6317 | ||
6318 | default: | |
6319 | break; | |
6320 | } | |
6321 | #endif | |
6322 | ||
ea1562b3 | 6323 | return reloc; |
252b5132 RH |
6324 | } |
6325 | ||
ea1562b3 NC |
6326 | /* Parse a register name off of the input_line and return a register |
6327 | number. Gets md_undefined_symbol above to do the register name | |
6328 | matching for us. | |
0a9ef439 | 6329 | |
ea1562b3 | 6330 | Only called as a part of processing the ECOFF .frame directive. */ |
0a9ef439 | 6331 | |
ea1562b3 NC |
6332 | int |
6333 | tc_get_register (int frame ATTRIBUTE_UNUSED) | |
6334 | { | |
6335 | int framereg = AXP_REG_SP; | |
0a9ef439 | 6336 | |
ea1562b3 NC |
6337 | SKIP_WHITESPACE (); |
6338 | if (*input_line_pointer == '$') | |
0a9ef439 | 6339 | { |
d02603dc NC |
6340 | char *s; |
6341 | char c = get_symbol_name (&s); | |
ea1562b3 | 6342 | symbolS *sym = md_undefined_symbol (s); |
0a9ef439 | 6343 | |
ea1562b3 NC |
6344 | *strchr (s, '\0') = c; |
6345 | if (sym && (framereg = S_GET_VALUE (sym)) <= 31) | |
6346 | goto found; | |
0a9ef439 | 6347 | } |
ea1562b3 | 6348 | as_warn (_("frame reg expected, using $%d."), framereg); |
0a9ef439 | 6349 | |
ea1562b3 NC |
6350 | found: |
6351 | note_gpreg (framereg); | |
6352 | return framereg; | |
6353 | } | |
0a9ef439 | 6354 | |
ea1562b3 NC |
6355 | /* This is called before the symbol table is processed. In order to |
6356 | work with gcc when using mips-tfile, we must keep all local labels. | |
6357 | However, in other cases, we want to discard them. If we were | |
6358 | called with -g, but we didn't see any debugging information, it may | |
6359 | mean that gcc is smuggling debugging information through to | |
6360 | mips-tfile, in which case we must generate all local labels. */ | |
6361 | ||
6362 | #ifdef OBJ_ECOFF | |
6363 | ||
6364 | void | |
6365 | alpha_frob_file_before_adjust (void) | |
6366 | { | |
6367 | if (alpha_debug != 0 | |
6368 | && ! ecoff_debugging_seen) | |
6369 | flag_keep_locals = 1; | |
0a9ef439 RH |
6370 | } |
6371 | ||
ea1562b3 NC |
6372 | #endif /* OBJ_ECOFF */ |
6373 | ||
252b5132 RH |
6374 | /* The Alpha has support for some VAX floating point types, as well as for |
6375 | IEEE floating point. We consider IEEE to be the primary floating point | |
6376 | format, and sneak in the VAX floating point support here. */ | |
252b5132 | 6377 | #include "config/atof-vax.c" |