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252b5132 | 1 | /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU. |
219d1afa | 2 | Copyright (C) 1989-2018 Free Software Foundation, Inc. |
252b5132 RH |
3 | Contributed by Carnegie Mellon University, 1993. |
4 | Written by Alessandro Forin, based on earlier gas-1.38 target CPU files. | |
5 | Modified by Ken Raeburn for gas-2.x and ECOFF support. | |
6 | Modified by Richard Henderson for ELF support. | |
9de8d8f1 | 7 | Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support. |
252b5132 RH |
8 | |
9 | This file is part of GAS, the GNU Assembler. | |
10 | ||
11 | GAS is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 13 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
14 | any later version. |
15 | ||
16 | GAS is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
23 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
24 | 02110-1301, USA. */ | |
252b5132 | 25 | |
ea1562b3 NC |
26 | /* Mach Operating System |
27 | Copyright (c) 1993 Carnegie Mellon University | |
28 | All Rights Reserved. | |
29 | ||
30 | Permission to use, copy, modify and distribute this software and its | |
31 | documentation is hereby granted, provided that both the copyright | |
32 | notice and this permission notice appear in all copies of the | |
33 | software, derivative works or modified versions, and any portions | |
34 | thereof, and that both notices appear in supporting documentation. | |
35 | ||
36 | CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS | |
37 | CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
38 | ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
39 | ||
40 | Carnegie Mellon requests users of this software to return to | |
41 | ||
42 | Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
43 | School of Computer Science | |
44 | Carnegie Mellon University | |
45 | Pittsburgh PA 15213-3890 | |
46 | ||
47 | any improvements or extensions that they make and grant Carnegie the | |
48 | rights to redistribute these changes. */ | |
252b5132 RH |
49 | |
50 | #include "as.h" | |
51 | #include "subsegs.h" | |
43b4c25e | 52 | #include "struc-symbol.h" |
252b5132 RH |
53 | #include "ecoff.h" |
54 | ||
55 | #include "opcode/alpha.h" | |
56 | ||
57 | #ifdef OBJ_ELF | |
58 | #include "elf/alpha.h" | |
59 | #endif | |
60 | ||
198f1251 TG |
61 | #ifdef OBJ_EVAX |
62 | #include "vms.h" | |
d8703844 | 63 | #include "vms/egps.h" |
198f1251 TG |
64 | #endif |
65 | ||
66 | #include "dwarf2dbg.h" | |
ea1562b3 | 67 | #include "dw2gencfi.h" |
3882b010 | 68 | #include "safe-ctype.h" |
252b5132 | 69 | \f |
11f45fb5 | 70 | /* Local types. */ |
252b5132 | 71 | |
ea1562b3 NC |
72 | #define TOKENIZE_ERROR -1 |
73 | #define TOKENIZE_ERROR_REPORT -2 | |
74 | #define MAX_INSN_FIXUPS 2 | |
75 | #define MAX_INSN_ARGS 5 | |
252b5132 | 76 | |
21d799b5 NC |
77 | /* Used since new relocation types are introduced in this |
78 | file (DUMMY_RELOC_LITUSE_*) */ | |
79 | typedef int extended_bfd_reloc_code_real_type; | |
80 | ||
11f45fb5 NC |
81 | struct alpha_fixup |
82 | { | |
252b5132 | 83 | expressionS exp; |
21d799b5 NC |
84 | /* bfd_reloc_code_real_type reloc; */ |
85 | extended_bfd_reloc_code_real_type reloc; | |
198f1251 | 86 | #ifdef OBJ_EVAX |
51794af8 TG |
87 | /* The symbol of the item in the linkage section. */ |
88 | symbolS *xtrasym; | |
89 | ||
90 | /* The symbol of the procedure descriptor. */ | |
91 | symbolS *procsym; | |
198f1251 | 92 | #endif |
252b5132 RH |
93 | }; |
94 | ||
11f45fb5 NC |
95 | struct alpha_insn |
96 | { | |
252b5132 RH |
97 | unsigned insn; |
98 | int nfixups; | |
99 | struct alpha_fixup fixups[MAX_INSN_FIXUPS]; | |
19f78583 | 100 | long sequence; |
252b5132 RH |
101 | }; |
102 | ||
11f45fb5 NC |
103 | enum alpha_macro_arg |
104 | { | |
105 | MACRO_EOA = 1, | |
106 | MACRO_IR, | |
107 | MACRO_PIR, | |
108 | MACRO_OPIR, | |
109 | MACRO_CPIR, | |
110 | MACRO_FPR, | |
198f1251 | 111 | MACRO_EXP |
11f45fb5 | 112 | }; |
252b5132 | 113 | |
11f45fb5 NC |
114 | struct alpha_macro |
115 | { | |
252b5132 | 116 | const char *name; |
ea1562b3 NC |
117 | void (*emit) (const expressionS *, int, const void *); |
118 | const void * arg; | |
252b5132 RH |
119 | enum alpha_macro_arg argsets[16]; |
120 | }; | |
121 | ||
1dab94dd | 122 | /* Extra expression types. */ |
252b5132 | 123 | |
ea1562b3 NC |
124 | #define O_pregister O_md1 /* O_register, in parentheses. */ |
125 | #define O_cpregister O_md2 /* + a leading comma. */ | |
252b5132 | 126 | |
3765b1be | 127 | /* The alpha_reloc_op table below depends on the ordering of these. */ |
04fe8f58 RH |
128 | #define O_literal O_md3 /* !literal relocation. */ |
129 | #define O_lituse_addr O_md4 /* !lituse_addr relocation. */ | |
130 | #define O_lituse_base O_md5 /* !lituse_base relocation. */ | |
131 | #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */ | |
132 | #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */ | |
133 | #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */ | |
134 | #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */ | |
135 | #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */ | |
136 | #define O_gpdisp O_md11 /* !gpdisp relocation. */ | |
137 | #define O_gprelhigh O_md12 /* !gprelhigh relocation. */ | |
138 | #define O_gprellow O_md13 /* !gprellow relocation. */ | |
139 | #define O_gprel O_md14 /* !gprel relocation. */ | |
140 | #define O_samegp O_md15 /* !samegp relocation. */ | |
141 | #define O_tlsgd O_md16 /* !tlsgd relocation. */ | |
142 | #define O_tlsldm O_md17 /* !tlsldm relocation. */ | |
143 | #define O_gotdtprel O_md18 /* !gotdtprel relocation. */ | |
144 | #define O_dtprelhi O_md19 /* !dtprelhi relocation. */ | |
145 | #define O_dtprello O_md20 /* !dtprello relocation. */ | |
146 | #define O_dtprel O_md21 /* !dtprel relocation. */ | |
147 | #define O_gottprel O_md22 /* !gottprel relocation. */ | |
148 | #define O_tprelhi O_md23 /* !tprelhi relocation. */ | |
149 | #define O_tprello O_md24 /* !tprello relocation. */ | |
150 | #define O_tprel O_md25 /* !tprel relocation. */ | |
19f78583 RH |
151 | |
152 | #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1) | |
153 | #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2) | |
154 | #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3) | |
155 | #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4) | |
3765b1be RH |
156 | #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5) |
157 | #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6) | |
04fe8f58 | 158 | #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7) |
19f78583 | 159 | |
3765b1be | 160 | #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel) |
43b4c25e | 161 | |
11f45fb5 | 162 | /* Macros for extracting the type and number of encoded register tokens. */ |
252b5132 RH |
163 | |
164 | #define is_ir_num(x) (((x) & 32) == 0) | |
165 | #define is_fpr_num(x) (((x) & 32) != 0) | |
166 | #define regno(x) ((x) & 31) | |
167 | ||
11f45fb5 | 168 | /* Something odd inherited from the old assembler. */ |
252b5132 RH |
169 | |
170 | #define note_gpreg(R) (alpha_gprmask |= (1 << (R))) | |
171 | #define note_fpreg(R) (alpha_fprmask |= (1 << (R))) | |
172 | ||
173 | /* Predicates for 16- and 32-bit ranges */ | |
174 | /* XXX: The non-shift version appears to trigger a compiler bug when | |
175 | cross-assembling from x86 w/ gcc 2.7.2. */ | |
176 | ||
177 | #if 1 | |
178 | #define range_signed_16(x) \ | |
bc805888 | 179 | (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) |
252b5132 | 180 | #define range_signed_32(x) \ |
bc805888 | 181 | (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) |
252b5132 | 182 | #else |
32ff5c2e KH |
183 | #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \ |
184 | (offsetT) (x) <= (offsetT) 0x7FFF) | |
185 | #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \ | |
186 | (offsetT) (x) <= (offsetT) 0x7FFFFFFF) | |
252b5132 RH |
187 | #endif |
188 | ||
189 | /* Macros for sign extending from 16- and 32-bits. */ | |
190 | /* XXX: The cast macros will work on all the systems that I care about, | |
191 | but really a predicate should be found to use the non-cast forms. */ | |
192 | ||
193 | #if 1 | |
bc805888 KH |
194 | #define sign_extend_16(x) ((short) (x)) |
195 | #define sign_extend_32(x) ((int) (x)) | |
252b5132 | 196 | #else |
bc805888 KH |
197 | #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) |
198 | #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ | |
252b5132 RH |
199 | ^ 0x80000000) - 0x80000000) |
200 | #endif | |
201 | ||
11f45fb5 | 202 | /* Macros to build tokens. */ |
252b5132 | 203 | |
32ff5c2e | 204 | #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
205 | (t).X_op = O_register, \ |
206 | (t).X_add_number = (r)) | |
32ff5c2e | 207 | #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
208 | (t).X_op = O_pregister, \ |
209 | (t).X_add_number = (r)) | |
32ff5c2e | 210 | #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
211 | (t).X_op = O_cpregister, \ |
212 | (t).X_add_number = (r)) | |
32ff5c2e | 213 | #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 | 214 | (t).X_op = O_register, \ |
66498417 | 215 | (t).X_add_number = (r) + 32) |
32ff5c2e | 216 | #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
217 | (t).X_op = O_symbol, \ |
218 | (t).X_add_symbol = (s), \ | |
219 | (t).X_add_number = (a)) | |
32ff5c2e | 220 | #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
221 | (t).X_op = O_constant, \ |
222 | (t).X_add_number = (n)) | |
252b5132 | 223 | \f |
252b5132 RH |
224 | /* Generic assembler global variables which must be defined by all |
225 | targets. */ | |
226 | ||
227 | /* Characters which always start a comment. */ | |
228 | const char comment_chars[] = "#"; | |
229 | ||
230 | /* Characters which start a comment at the beginning of a line. */ | |
231 | const char line_comment_chars[] = "#"; | |
232 | ||
233 | /* Characters which may be used to separate multiple commands on a | |
234 | single line. */ | |
235 | const char line_separator_chars[] = ";"; | |
236 | ||
237 | /* Characters which are used to indicate an exponent in a floating | |
238 | point number. */ | |
239 | const char EXP_CHARS[] = "eE"; | |
240 | ||
241 | /* Characters which mean that a number is a floating point constant, | |
242 | as in 0d1.0. */ | |
252b5132 | 243 | /* XXX: Do all of these really get used on the alpha?? */ |
ae2689b0 | 244 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
252b5132 RH |
245 | |
246 | #ifdef OBJ_EVAX | |
247 | const char *md_shortopts = "Fm:g+1h:HG:"; | |
248 | #else | |
249 | const char *md_shortopts = "Fm:gG:"; | |
250 | #endif | |
251 | ||
11f45fb5 NC |
252 | struct option md_longopts[] = |
253 | { | |
252b5132 | 254 | #define OPTION_32ADDR (OPTION_MD_BASE) |
11f45fb5 | 255 | { "32addr", no_argument, NULL, OPTION_32ADDR }, |
66498417 | 256 | #define OPTION_RELAX (OPTION_32ADDR + 1) |
11f45fb5 | 257 | { "relax", no_argument, NULL, OPTION_RELAX }, |
252b5132 | 258 | #ifdef OBJ_ELF |
66498417 KH |
259 | #define OPTION_MDEBUG (OPTION_RELAX + 1) |
260 | #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1) | |
11f45fb5 NC |
261 | { "mdebug", no_argument, NULL, OPTION_MDEBUG }, |
262 | { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG }, | |
198f1251 TG |
263 | #endif |
264 | #ifdef OBJ_EVAX | |
265 | #define OPTION_REPLACE (OPTION_RELAX + 1) | |
266 | #define OPTION_NOREPLACE (OPTION_REPLACE+1) | |
267 | { "replace", no_argument, NULL, OPTION_REPLACE }, | |
3739860c | 268 | { "noreplace", no_argument, NULL, OPTION_NOREPLACE }, |
252b5132 | 269 | #endif |
11f45fb5 NC |
270 | { NULL, no_argument, NULL, 0 } |
271 | }; | |
252b5132 | 272 | |
bc805888 | 273 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
274 | \f |
275 | #ifdef OBJ_EVAX | |
276 | #define AXP_REG_R0 0 | |
277 | #define AXP_REG_R16 16 | |
278 | #define AXP_REG_R17 17 | |
279 | #undef AXP_REG_T9 | |
280 | #define AXP_REG_T9 22 | |
281 | #undef AXP_REG_T10 | |
282 | #define AXP_REG_T10 23 | |
283 | #undef AXP_REG_T11 | |
284 | #define AXP_REG_T11 24 | |
285 | #undef AXP_REG_T12 | |
286 | #define AXP_REG_T12 25 | |
287 | #define AXP_REG_AI 25 | |
288 | #undef AXP_REG_FP | |
289 | #define AXP_REG_FP 29 | |
290 | ||
291 | #undef AXP_REG_GP | |
292 | #define AXP_REG_GP AXP_REG_PV | |
198f1251 | 293 | |
252b5132 RH |
294 | #endif /* OBJ_EVAX */ |
295 | ||
11f45fb5 | 296 | /* The cpu for which we are generating code. */ |
252b5132 RH |
297 | static unsigned alpha_target = AXP_OPCODE_BASE; |
298 | static const char *alpha_target_name = "<all>"; | |
299 | ||
11f45fb5 | 300 | /* The hash table of instruction opcodes. */ |
252b5132 RH |
301 | static struct hash_control *alpha_opcode_hash; |
302 | ||
11f45fb5 | 303 | /* The hash table of macro opcodes. */ |
252b5132 RH |
304 | static struct hash_control *alpha_macro_hash; |
305 | ||
306 | #ifdef OBJ_ECOFF | |
11f45fb5 | 307 | /* The $gp relocation symbol. */ |
252b5132 RH |
308 | static symbolS *alpha_gp_symbol; |
309 | ||
310 | /* XXX: what is this, and why is it exported? */ | |
311 | valueT alpha_gp_value; | |
312 | #endif | |
313 | ||
11f45fb5 | 314 | /* The current $gp register. */ |
252b5132 RH |
315 | static int alpha_gp_register = AXP_REG_GP; |
316 | ||
11f45fb5 | 317 | /* A table of the register symbols. */ |
252b5132 RH |
318 | static symbolS *alpha_register_table[64]; |
319 | ||
11f45fb5 | 320 | /* Constant sections, or sections of constants. */ |
252b5132 RH |
321 | #ifdef OBJ_ECOFF |
322 | static segT alpha_lita_section; | |
252b5132 RH |
323 | #endif |
324 | #ifdef OBJ_EVAX | |
198f1251 | 325 | segT alpha_link_section; |
252b5132 | 326 | #endif |
198f1251 | 327 | #ifndef OBJ_EVAX |
252b5132 | 328 | static segT alpha_lit8_section; |
198f1251 | 329 | #endif |
252b5132 | 330 | |
1dab94dd | 331 | /* Symbols referring to said sections. */ |
252b5132 RH |
332 | #ifdef OBJ_ECOFF |
333 | static symbolS *alpha_lita_symbol; | |
252b5132 RH |
334 | #endif |
335 | #ifdef OBJ_EVAX | |
336 | static symbolS *alpha_link_symbol; | |
252b5132 | 337 | #endif |
198f1251 | 338 | #ifndef OBJ_EVAX |
252b5132 | 339 | static symbolS *alpha_lit8_symbol; |
198f1251 | 340 | #endif |
252b5132 | 341 | |
11f45fb5 | 342 | /* Literal for .litX+0x8000 within .lita. */ |
252b5132 | 343 | #ifdef OBJ_ECOFF |
252b5132 RH |
344 | static offsetT alpha_lit8_literal; |
345 | #endif | |
346 | ||
11f45fb5 | 347 | /* Is the assembler not allowed to use $at? */ |
252b5132 RH |
348 | static int alpha_noat_on = 0; |
349 | ||
11f45fb5 | 350 | /* Are macros enabled? */ |
252b5132 RH |
351 | static int alpha_macros_on = 1; |
352 | ||
11f45fb5 | 353 | /* Are floats disabled? */ |
252b5132 RH |
354 | static int alpha_nofloats_on = 0; |
355 | ||
11f45fb5 | 356 | /* Are addresses 32 bit? */ |
252b5132 RH |
357 | static int alpha_addr32_on = 0; |
358 | ||
359 | /* Symbol labelling the current insn. When the Alpha gas sees | |
360 | foo: | |
361 | .quad 0 | |
362 | and the section happens to not be on an eight byte boundary, it | |
363 | will align both the symbol and the .quad to an eight byte boundary. */ | |
364 | static symbolS *alpha_insn_label; | |
eb979bfb | 365 | #if defined(OBJ_ELF) || defined (OBJ_EVAX) |
198f1251 | 366 | static symbolS *alpha_prologue_label; |
d9319cec | 367 | #endif |
198f1251 TG |
368 | |
369 | #ifdef OBJ_EVAX | |
370 | /* Symbol associate with the current jsr instruction. */ | |
371 | static symbolS *alpha_linkage_symbol; | |
372 | #endif | |
252b5132 RH |
373 | |
374 | /* Whether we should automatically align data generation pseudo-ops. | |
375 | .align 0 will turn this off. */ | |
376 | static int alpha_auto_align_on = 1; | |
377 | ||
378 | /* The known current alignment of the current section. */ | |
379 | static int alpha_current_align; | |
380 | ||
381 | /* These are exported to ECOFF code. */ | |
382 | unsigned long alpha_gprmask, alpha_fprmask; | |
383 | ||
384 | /* Whether the debugging option was seen. */ | |
385 | static int alpha_debug; | |
386 | ||
387 | #ifdef OBJ_ELF | |
388 | /* Whether we are emitting an mdebug section. */ | |
a8316fe2 | 389 | int alpha_flag_mdebug = -1; |
252b5132 RH |
390 | #endif |
391 | ||
198f1251 TG |
392 | #ifdef OBJ_EVAX |
393 | /* Whether to perform the VMS procedure call optimization. */ | |
394 | int alpha_flag_replace = 1; | |
395 | #endif | |
396 | ||
252b5132 RH |
397 | /* Don't fully resolve relocations, allowing code movement in the linker. */ |
398 | static int alpha_flag_relax; | |
399 | ||
400 | /* What value to give to bfd_set_gp_size. */ | |
401 | static int g_switch_value = 8; | |
402 | ||
403 | #ifdef OBJ_EVAX | |
404 | /* Collect information about current procedure here. */ | |
198f1251 | 405 | struct alpha_evax_procs |
ea1562b3 NC |
406 | { |
407 | symbolS *symbol; /* Proc pdesc symbol. */ | |
252b5132 | 408 | int pdsckind; |
ea1562b3 NC |
409 | int framereg; /* Register for frame pointer. */ |
410 | int framesize; /* Size of frame. */ | |
252b5132 RH |
411 | int rsa_offset; |
412 | int ra_save; | |
413 | int fp_save; | |
414 | long imask; | |
415 | long fmask; | |
416 | int type; | |
417 | int prologue; | |
198f1251 TG |
418 | symbolS *handler; |
419 | int handler_data; | |
420 | }; | |
421 | ||
51794af8 | 422 | /* Linked list of .linkage fixups. */ |
198f1251 TG |
423 | struct alpha_linkage_fixups *alpha_linkage_fixup_root; |
424 | static struct alpha_linkage_fixups *alpha_linkage_fixup_tail; | |
425 | ||
51794af8 | 426 | /* Current procedure descriptor. */ |
198f1251 | 427 | static struct alpha_evax_procs *alpha_evax_proc; |
4b1c4d2b | 428 | static struct alpha_evax_procs alpha_evax_proc_data; |
252b5132 RH |
429 | |
430 | static int alpha_flag_hash_long_names = 0; /* -+ */ | |
431 | static int alpha_flag_show_after_trunc = 0; /* -H */ | |
432 | ||
433 | /* If the -+ switch is given, then a hash is appended to any name that is | |
11f45fb5 | 434 | longer than 64 characters, else longer symbol names are truncated. */ |
252b5132 | 435 | |
43b4c25e MM |
436 | #endif |
437 | \f | |
438 | #ifdef RELOC_OP_P | |
439 | /* A table to map the spelling of a relocation operand into an appropriate | |
440 | bfd_reloc_code_real_type type. The table is assumed to be ordered such | |
441 | that op-O_literal indexes into it. */ | |
442 | ||
443 | #define ALPHA_RELOC_TABLE(op) \ | |
19f78583 | 444 | (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \ |
43b4c25e | 445 | ? (abort (), 0) \ |
19f78583 | 446 | : (int) (op) - (int) O_literal) ]) |
43b4c25e | 447 | |
ec8fcf4a RH |
448 | #define DEF(NAME, RELOC, REQ, ALLOW) \ |
449 | { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW} | |
43b4c25e | 450 | |
11f45fb5 NC |
451 | static const struct alpha_reloc_op_tag |
452 | { | |
ea1562b3 NC |
453 | const char *name; /* String to lookup. */ |
454 | size_t length; /* Size of the string. */ | |
455 | operatorT op; /* Which operator to use. */ | |
21d799b5 | 456 | extended_bfd_reloc_code_real_type reloc; |
ea1562b3 NC |
457 | unsigned int require_seq : 1; /* Require a sequence number. */ |
458 | unsigned int allow_seq : 1; /* Allow a sequence number. */ | |
11f45fb5 NC |
459 | } |
460 | alpha_reloc_op[] = | |
461 | { | |
ea1562b3 NC |
462 | DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1), |
463 | DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1), | |
464 | DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1), | |
465 | DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1), | |
466 | DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1), | |
467 | DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1), | |
468 | DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1), | |
04fe8f58 | 469 | DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1), |
ea1562b3 NC |
470 | DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1), |
471 | DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0), | |
472 | DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0), | |
473 | DEF (gprel, BFD_RELOC_GPREL16, 0, 0), | |
474 | DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0), | |
475 | DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1), | |
476 | DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1), | |
477 | DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0), | |
478 | DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0), | |
479 | DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0), | |
480 | DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0), | |
481 | DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0), | |
482 | DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0), | |
483 | DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0), | |
484 | DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0), | |
43b4c25e MM |
485 | }; |
486 | ||
19f78583 RH |
487 | #undef DEF |
488 | ||
43b4c25e | 489 | static const int alpha_num_reloc_op |
bc805888 | 490 | = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); |
19f78583 | 491 | #endif /* RELOC_OP_P */ |
43b4c25e | 492 | |
ea1562b3 | 493 | /* Maximum # digits needed to hold the largest sequence #. */ |
43b4c25e MM |
494 | #define ALPHA_RELOC_DIGITS 25 |
495 | ||
2d2255b5 | 496 | /* Structure to hold explicit sequence information. */ |
19f78583 | 497 | struct alpha_reloc_tag |
43b4c25e | 498 | { |
ea1562b3 | 499 | fixS *master; /* The literal reloc. */ |
198f1251 | 500 | #ifdef OBJ_EVAX |
51794af8 TG |
501 | struct symbol *sym; /* Linkage section item symbol. */ |
502 | struct symbol *psym; /* Pdesc symbol. */ | |
198f1251 | 503 | #endif |
ea1562b3 NC |
504 | fixS *slaves; /* Head of linked list of lituses. */ |
505 | segT segment; /* Segment relocs are in or undefined_section. */ | |
506 | long sequence; /* Sequence #. */ | |
507 | unsigned n_master; /* # of literals. */ | |
508 | unsigned n_slaves; /* # of lituses. */ | |
509 | unsigned saw_tlsgd : 1; /* True if ... */ | |
3765b1be RH |
510 | unsigned saw_tlsldm : 1; |
511 | unsigned saw_lu_tlsgd : 1; | |
512 | unsigned saw_lu_tlsldm : 1; | |
ea1562b3 NC |
513 | unsigned multi_section_p : 1; /* True if more than one section was used. */ |
514 | char string[1]; /* Printable form of sequence to hash with. */ | |
43b4c25e MM |
515 | }; |
516 | ||
ea1562b3 | 517 | /* Hash table to link up literals with the appropriate lituse. */ |
43b4c25e | 518 | static struct hash_control *alpha_literal_hash; |
19f78583 RH |
519 | |
520 | /* Sequence numbers for internal use by macros. */ | |
521 | static long next_sequence_num = -1; | |
252b5132 RH |
522 | \f |
523 | /* A table of CPU names and opcode sets. */ | |
524 | ||
11f45fb5 NC |
525 | static const struct cpu_type |
526 | { | |
252b5132 RH |
527 | const char *name; |
528 | unsigned flags; | |
11f45fb5 NC |
529 | } |
530 | cpu_types[] = | |
531 | { | |
252b5132 | 532 | /* Ad hoc convention: cpu number gets palcode, process code doesn't. |
1dab94dd | 533 | This supports usage under DU 4.0b that does ".arch ev4", and |
252b5132 RH |
534 | usage in MILO that does -m21064. Probably something more |
535 | specific like -m21064-pal should be used, but oh well. */ | |
536 | ||
537 | { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
538 | { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
539 | { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
540 | { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
541 | { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 }, | |
542 | { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX }, | |
543 | { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX | |
544 | |AXP_OPCODE_MAX) }, | |
545 | { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
546 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
dbac4f5b RH |
547 | { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX |
548 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
549 | { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
550 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
252b5132 RH |
551 | |
552 | { "ev4", AXP_OPCODE_BASE }, | |
553 | { "ev45", AXP_OPCODE_BASE }, | |
554 | { "lca45", AXP_OPCODE_BASE }, | |
555 | { "ev5", AXP_OPCODE_BASE }, | |
556 | { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, | |
557 | { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, | |
558 | { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
dbac4f5b RH |
559 | { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, |
560 | { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
252b5132 RH |
561 | |
562 | { "all", AXP_OPCODE_BASE }, | |
446a06c9 | 563 | { 0, 0 } |
252b5132 RH |
564 | }; |
565 | ||
ea1562b3 NC |
566 | /* Some instruction sets indexed by lg(size). */ |
567 | static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL }; | |
568 | static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" }; | |
569 | static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" }; | |
570 | static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" }; | |
571 | static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" }; | |
572 | static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" }; | |
573 | static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" }; | |
574 | static const char * const stX_op[] = { "stb", "stw", "stl", "stq" }; | |
575 | static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL }; | |
252b5132 | 576 | |
21d799b5 | 577 | static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type); |
ea1562b3 NC |
578 | static void emit_insn (struct alpha_insn *); |
579 | static void assemble_tokens (const char *, const expressionS *, int, int); | |
198f1251 | 580 | #ifdef OBJ_EVAX |
6d4af3c2 | 581 | static const char *s_alpha_section_name (void); |
8aacb050 | 582 | static symbolS *add_to_link_pool (symbolS *, offsetT); |
198f1251 | 583 | #endif |
ea1562b3 NC |
584 | \f |
585 | static struct alpha_reloc_tag * | |
586 | get_alpha_reloc_tag (long sequence) | |
11f45fb5 | 587 | { |
ea1562b3 NC |
588 | char buffer[ALPHA_RELOC_DIGITS]; |
589 | struct alpha_reloc_tag *info; | |
252b5132 | 590 | |
ea1562b3 | 591 | sprintf (buffer, "!%ld", sequence); |
252b5132 | 592 | |
ea1562b3 NC |
593 | info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer); |
594 | if (! info) | |
595 | { | |
596 | size_t len = strlen (buffer); | |
597 | const char *errmsg; | |
252b5132 | 598 | |
21d799b5 NC |
599 | info = (struct alpha_reloc_tag *) |
600 | xcalloc (sizeof (struct alpha_reloc_tag) + len, 1); | |
252b5132 | 601 | |
ea1562b3 NC |
602 | info->segment = now_seg; |
603 | info->sequence = sequence; | |
604 | strcpy (info->string, buffer); | |
605 | errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info); | |
606 | if (errmsg) | |
20203fb9 | 607 | as_fatal ("%s", errmsg); |
198f1251 TG |
608 | #ifdef OBJ_EVAX |
609 | info->sym = 0; | |
610 | info->psym = 0; | |
611 | #endif | |
ea1562b3 | 612 | } |
252b5132 | 613 | |
ea1562b3 NC |
614 | return info; |
615 | } | |
252b5132 | 616 | |
198f1251 TG |
617 | #ifndef OBJ_EVAX |
618 | ||
ea1562b3 NC |
619 | static void |
620 | alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED, | |
621 | asection *sec, | |
622 | void * ptr ATTRIBUTE_UNUSED) | |
623 | { | |
624 | segment_info_type *seginfo = seg_info (sec); | |
625 | fixS **prevP; | |
626 | fixS *fixp; | |
627 | fixS *next; | |
628 | fixS *slave; | |
252b5132 | 629 | |
ea1562b3 NC |
630 | /* If seginfo is NULL, we did not create this section; don't do |
631 | anything with it. By using a pointer to a pointer, we can update | |
632 | the links in place. */ | |
633 | if (seginfo == NULL) | |
634 | return; | |
252b5132 | 635 | |
ea1562b3 NC |
636 | /* If there are no relocations, skip the section. */ |
637 | if (! seginfo->fix_root) | |
638 | return; | |
252b5132 | 639 | |
ea1562b3 NC |
640 | /* First rebuild the fixup chain without the explicit lituse and |
641 | gpdisp_lo16 relocs. */ | |
642 | prevP = &seginfo->fix_root; | |
643 | for (fixp = seginfo->fix_root; fixp; fixp = next) | |
644 | { | |
645 | next = fixp->fx_next; | |
646 | fixp->fx_next = (fixS *) 0; | |
252b5132 | 647 | |
ea1562b3 NC |
648 | switch (fixp->fx_r_type) |
649 | { | |
650 | case BFD_RELOC_ALPHA_LITUSE: | |
651 | if (fixp->tc_fix_data.info->n_master == 0) | |
652 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
653 | _("No !literal!%ld was found"), | |
654 | fixp->tc_fix_data.info->sequence); | |
655 | #ifdef RELOC_OP_P | |
656 | if (fixp->fx_offset == LITUSE_ALPHA_TLSGD) | |
657 | { | |
658 | if (! fixp->tc_fix_data.info->saw_tlsgd) | |
659 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
660 | _("No !tlsgd!%ld was found"), | |
661 | fixp->tc_fix_data.info->sequence); | |
662 | } | |
663 | else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM) | |
664 | { | |
665 | if (! fixp->tc_fix_data.info->saw_tlsldm) | |
666 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
667 | _("No !tlsldm!%ld was found"), | |
668 | fixp->tc_fix_data.info->sequence); | |
669 | } | |
670 | #endif | |
671 | break; | |
252b5132 | 672 | |
ea1562b3 NC |
673 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
674 | if (fixp->tc_fix_data.info->n_master == 0) | |
675 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
676 | _("No ldah !gpdisp!%ld was found"), | |
677 | fixp->tc_fix_data.info->sequence); | |
678 | break; | |
252b5132 | 679 | |
ea1562b3 NC |
680 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
681 | if (fixp->tc_fix_data.info | |
682 | && (fixp->tc_fix_data.info->saw_tlsgd | |
683 | || fixp->tc_fix_data.info->saw_tlsldm)) | |
684 | break; | |
685 | /* FALLTHRU */ | |
252b5132 | 686 | |
ea1562b3 NC |
687 | default: |
688 | *prevP = fixp; | |
689 | prevP = &fixp->fx_next; | |
690 | break; | |
252b5132 | 691 | } |
252b5132 RH |
692 | } |
693 | ||
ea1562b3 NC |
694 | /* Go back and re-chain dependent relocations. They are currently |
695 | linked through the next_reloc field in reverse order, so as we | |
696 | go through the next_reloc chain, we effectively reverse the chain | |
697 | once again. | |
252b5132 | 698 | |
ea1562b3 NC |
699 | Except if there is more than one !literal for a given sequence |
700 | number. In that case, the programmer and/or compiler is not sure | |
701 | how control flows from literal to lituse, and we can't be sure to | |
702 | get the relaxation correct. | |
252b5132 | 703 | |
ea1562b3 NC |
704 | ??? Well, actually we could, if there are enough lituses such that |
705 | we can make each literal have at least one of each lituse type | |
706 | present. Not implemented. | |
252b5132 | 707 | |
ea1562b3 | 708 | Also suppress the optimization if the !literals/!lituses are spread |
33eaf5de | 709 | in different segments. This can happen with "interesting" uses of |
ea1562b3 | 710 | inline assembly; examples are present in the Linux kernel semaphores. */ |
11f45fb5 | 711 | |
ea1562b3 | 712 | for (fixp = seginfo->fix_root; fixp; fixp = next) |
252b5132 | 713 | { |
ea1562b3 NC |
714 | next = fixp->fx_next; |
715 | switch (fixp->fx_r_type) | |
716 | { | |
717 | case BFD_RELOC_ALPHA_TLSGD: | |
718 | case BFD_RELOC_ALPHA_TLSLDM: | |
719 | if (!fixp->tc_fix_data.info) | |
720 | break; | |
721 | if (fixp->tc_fix_data.info->n_master == 0) | |
722 | break; | |
723 | else if (fixp->tc_fix_data.info->n_master > 1) | |
724 | { | |
725 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
726 | _("too many !literal!%ld for %s"), | |
727 | fixp->tc_fix_data.info->sequence, | |
728 | (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD | |
729 | ? "!tlsgd" : "!tlsldm")); | |
730 | break; | |
731 | } | |
252b5132 | 732 | |
ea1562b3 NC |
733 | fixp->tc_fix_data.info->master->fx_next = fixp->fx_next; |
734 | fixp->fx_next = fixp->tc_fix_data.info->master; | |
735 | fixp = fixp->fx_next; | |
736 | /* Fall through. */ | |
252b5132 | 737 | |
ea1562b3 NC |
738 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
739 | if (fixp->tc_fix_data.info | |
740 | && fixp->tc_fix_data.info->n_master == 1 | |
741 | && ! fixp->tc_fix_data.info->multi_section_p) | |
742 | { | |
743 | for (slave = fixp->tc_fix_data.info->slaves; | |
744 | slave != (fixS *) 0; | |
745 | slave = slave->tc_fix_data.next_reloc) | |
746 | { | |
747 | slave->fx_next = fixp->fx_next; | |
748 | fixp->fx_next = slave; | |
749 | } | |
750 | } | |
751 | break; | |
252b5132 | 752 | |
ea1562b3 NC |
753 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
754 | if (fixp->tc_fix_data.info->n_slaves == 0) | |
755 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
756 | _("No lda !gpdisp!%ld was found"), | |
757 | fixp->tc_fix_data.info->sequence); | |
758 | else | |
759 | { | |
760 | slave = fixp->tc_fix_data.info->slaves; | |
761 | slave->fx_next = next; | |
762 | fixp->fx_next = slave; | |
763 | } | |
764 | break; | |
252b5132 | 765 | |
ea1562b3 NC |
766 | default: |
767 | break; | |
768 | } | |
252b5132 | 769 | } |
252b5132 RH |
770 | } |
771 | ||
ea1562b3 NC |
772 | /* Before the relocations are written, reorder them, so that user |
773 | supplied !lituse relocations follow the appropriate !literal | |
774 | relocations, and similarly for !gpdisp relocations. */ | |
252b5132 RH |
775 | |
776 | void | |
ea1562b3 | 777 | alpha_before_fix (void) |
252b5132 | 778 | { |
ea1562b3 NC |
779 | if (alpha_literal_hash) |
780 | bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL); | |
252b5132 | 781 | } |
198f1251 TG |
782 | |
783 | #endif | |
ea1562b3 NC |
784 | \f |
785 | #ifdef DEBUG_ALPHA | |
786 | static void | |
787 | debug_exp (expressionS tok[], int ntok) | |
252b5132 | 788 | { |
ea1562b3 | 789 | int i; |
252b5132 | 790 | |
ea1562b3 NC |
791 | fprintf (stderr, "debug_exp: %d tokens", ntok); |
792 | for (i = 0; i < ntok; i++) | |
252b5132 | 793 | { |
ea1562b3 NC |
794 | expressionS *t = &tok[i]; |
795 | const char *name; | |
252b5132 | 796 | |
ea1562b3 NC |
797 | switch (t->X_op) |
798 | { | |
799 | default: name = "unknown"; break; | |
800 | case O_illegal: name = "O_illegal"; break; | |
801 | case O_absent: name = "O_absent"; break; | |
802 | case O_constant: name = "O_constant"; break; | |
803 | case O_symbol: name = "O_symbol"; break; | |
804 | case O_symbol_rva: name = "O_symbol_rva"; break; | |
805 | case O_register: name = "O_register"; break; | |
806 | case O_big: name = "O_big"; break; | |
807 | case O_uminus: name = "O_uminus"; break; | |
808 | case O_bit_not: name = "O_bit_not"; break; | |
809 | case O_logical_not: name = "O_logical_not"; break; | |
810 | case O_multiply: name = "O_multiply"; break; | |
811 | case O_divide: name = "O_divide"; break; | |
812 | case O_modulus: name = "O_modulus"; break; | |
813 | case O_left_shift: name = "O_left_shift"; break; | |
814 | case O_right_shift: name = "O_right_shift"; break; | |
815 | case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break; | |
816 | case O_bit_or_not: name = "O_bit_or_not"; break; | |
817 | case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break; | |
818 | case O_bit_and: name = "O_bit_and"; break; | |
819 | case O_add: name = "O_add"; break; | |
820 | case O_subtract: name = "O_subtract"; break; | |
821 | case O_eq: name = "O_eq"; break; | |
822 | case O_ne: name = "O_ne"; break; | |
823 | case O_lt: name = "O_lt"; break; | |
824 | case O_le: name = "O_le"; break; | |
825 | case O_ge: name = "O_ge"; break; | |
826 | case O_gt: name = "O_gt"; break; | |
827 | case O_logical_and: name = "O_logical_and"; break; | |
828 | case O_logical_or: name = "O_logical_or"; break; | |
829 | case O_index: name = "O_index"; break; | |
830 | case O_pregister: name = "O_pregister"; break; | |
831 | case O_cpregister: name = "O_cpregister"; break; | |
832 | case O_literal: name = "O_literal"; break; | |
833 | case O_lituse_addr: name = "O_lituse_addr"; break; | |
834 | case O_lituse_base: name = "O_lituse_base"; break; | |
835 | case O_lituse_bytoff: name = "O_lituse_bytoff"; break; | |
836 | case O_lituse_jsr: name = "O_lituse_jsr"; break; | |
837 | case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break; | |
838 | case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break; | |
04fe8f58 | 839 | case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break; |
ea1562b3 NC |
840 | case O_gpdisp: name = "O_gpdisp"; break; |
841 | case O_gprelhigh: name = "O_gprelhigh"; break; | |
842 | case O_gprellow: name = "O_gprellow"; break; | |
843 | case O_gprel: name = "O_gprel"; break; | |
844 | case O_samegp: name = "O_samegp"; break; | |
845 | case O_tlsgd: name = "O_tlsgd"; break; | |
846 | case O_tlsldm: name = "O_tlsldm"; break; | |
847 | case O_gotdtprel: name = "O_gotdtprel"; break; | |
848 | case O_dtprelhi: name = "O_dtprelhi"; break; | |
849 | case O_dtprello: name = "O_dtprello"; break; | |
850 | case O_dtprel: name = "O_dtprel"; break; | |
851 | case O_gottprel: name = "O_gottprel"; break; | |
852 | case O_tprelhi: name = "O_tprelhi"; break; | |
853 | case O_tprello: name = "O_tprello"; break; | |
854 | case O_tprel: name = "O_tprel"; break; | |
855 | } | |
252b5132 | 856 | |
ea1562b3 NC |
857 | fprintf (stderr, ", %s(%s, %s, %d)", name, |
858 | (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--", | |
859 | (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--", | |
860 | (int) t->X_add_number); | |
252b5132 | 861 | } |
ea1562b3 NC |
862 | fprintf (stderr, "\n"); |
863 | fflush (stderr); | |
252b5132 | 864 | } |
ea1562b3 | 865 | #endif |
252b5132 | 866 | |
ea1562b3 | 867 | /* Parse the arguments to an opcode. */ |
252b5132 | 868 | |
ea1562b3 NC |
869 | static int |
870 | tokenize_arguments (char *str, | |
871 | expressionS tok[], | |
872 | int ntok) | |
252b5132 | 873 | { |
ea1562b3 NC |
874 | expressionS *end_tok = tok + ntok; |
875 | char *old_input_line_pointer; | |
876 | int saw_comma = 0, saw_arg = 0; | |
877 | #ifdef DEBUG_ALPHA | |
878 | expressionS *orig_tok = tok; | |
879 | #endif | |
880 | #ifdef RELOC_OP_P | |
881 | char *p; | |
882 | const struct alpha_reloc_op_tag *r; | |
883 | int c, i; | |
884 | size_t len; | |
885 | int reloc_found_p = 0; | |
886 | #endif | |
252b5132 | 887 | |
ea1562b3 | 888 | memset (tok, 0, sizeof (*tok) * ntok); |
252b5132 | 889 | |
ea1562b3 NC |
890 | /* Save and restore input_line_pointer around this function. */ |
891 | old_input_line_pointer = input_line_pointer; | |
892 | input_line_pointer = str; | |
252b5132 | 893 | |
ea1562b3 NC |
894 | #ifdef RELOC_OP_P |
895 | /* ??? Wrest control of ! away from the regular expression parser. */ | |
896 | is_end_of_line[(unsigned char) '!'] = 1; | |
897 | #endif | |
252b5132 | 898 | |
ea1562b3 NC |
899 | while (tok < end_tok && *input_line_pointer) |
900 | { | |
901 | SKIP_WHITESPACE (); | |
902 | switch (*input_line_pointer) | |
903 | { | |
904 | case '\0': | |
905 | goto fini; | |
906 | ||
907 | #ifdef RELOC_OP_P | |
908 | case '!': | |
909 | /* A relocation operand can be placed after the normal operand on an | |
910 | assembly language statement, and has the following form: | |
911 | !relocation_type!sequence_number. */ | |
912 | if (reloc_found_p) | |
252b5132 | 913 | { |
ea1562b3 NC |
914 | /* Only support one relocation op per insn. */ |
915 | as_bad (_("More than one relocation op per insn")); | |
916 | goto err_report; | |
252b5132 | 917 | } |
252b5132 | 918 | |
ea1562b3 NC |
919 | if (!saw_arg) |
920 | goto err; | |
252b5132 | 921 | |
ea1562b3 NC |
922 | ++input_line_pointer; |
923 | SKIP_WHITESPACE (); | |
d02603dc | 924 | c = get_symbol_name (&p); |
252b5132 | 925 | |
ea1562b3 NC |
926 | /* Parse !relocation_type. */ |
927 | len = input_line_pointer - p; | |
928 | if (len == 0) | |
929 | { | |
930 | as_bad (_("No relocation operand")); | |
931 | goto err_report; | |
932 | } | |
252b5132 | 933 | |
ea1562b3 NC |
934 | r = &alpha_reloc_op[0]; |
935 | for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++) | |
936 | if (len == r->length && memcmp (p, r->name, len) == 0) | |
937 | break; | |
938 | if (i < 0) | |
939 | { | |
940 | as_bad (_("Unknown relocation operand: !%s"), p); | |
941 | goto err_report; | |
942 | } | |
252b5132 | 943 | |
ea1562b3 | 944 | *input_line_pointer = c; |
d02603dc | 945 | SKIP_WHITESPACE_AFTER_NAME (); |
ea1562b3 NC |
946 | if (*input_line_pointer != '!') |
947 | { | |
948 | if (r->require_seq) | |
949 | { | |
950 | as_bad (_("no sequence number after !%s"), p); | |
951 | goto err_report; | |
952 | } | |
252b5132 | 953 | |
ea1562b3 NC |
954 | tok->X_add_number = 0; |
955 | } | |
956 | else | |
957 | { | |
958 | if (! r->allow_seq) | |
959 | { | |
960 | as_bad (_("!%s does not use a sequence number"), p); | |
961 | goto err_report; | |
962 | } | |
252b5132 | 963 | |
ea1562b3 | 964 | input_line_pointer++; |
252b5132 | 965 | |
ea1562b3 NC |
966 | /* Parse !sequence_number. */ |
967 | expression (tok); | |
968 | if (tok->X_op != O_constant || tok->X_add_number <= 0) | |
969 | { | |
970 | as_bad (_("Bad sequence number: !%s!%s"), | |
971 | r->name, input_line_pointer); | |
972 | goto err_report; | |
973 | } | |
974 | } | |
252b5132 | 975 | |
ea1562b3 NC |
976 | tok->X_op = r->op; |
977 | reloc_found_p = 1; | |
978 | ++tok; | |
979 | break; | |
980 | #endif /* RELOC_OP_P */ | |
252b5132 | 981 | |
ea1562b3 NC |
982 | case ',': |
983 | ++input_line_pointer; | |
984 | if (saw_comma || !saw_arg) | |
985 | goto err; | |
986 | saw_comma = 1; | |
987 | break; | |
252b5132 | 988 | |
ea1562b3 NC |
989 | case '(': |
990 | { | |
991 | char *hold = input_line_pointer++; | |
252b5132 | 992 | |
ea1562b3 NC |
993 | /* First try for parenthesized register ... */ |
994 | expression (tok); | |
995 | if (*input_line_pointer == ')' && tok->X_op == O_register) | |
996 | { | |
997 | tok->X_op = (saw_comma ? O_cpregister : O_pregister); | |
998 | saw_comma = 0; | |
999 | saw_arg = 1; | |
1000 | ++input_line_pointer; | |
1001 | ++tok; | |
1002 | break; | |
1003 | } | |
252b5132 | 1004 | |
ea1562b3 NC |
1005 | /* ... then fall through to plain expression. */ |
1006 | input_line_pointer = hold; | |
1007 | } | |
1a0670f3 | 1008 | /* Fall through. */ |
252b5132 | 1009 | |
ea1562b3 NC |
1010 | default: |
1011 | if (saw_arg && !saw_comma) | |
1012 | goto err; | |
252b5132 | 1013 | |
ea1562b3 NC |
1014 | expression (tok); |
1015 | if (tok->X_op == O_illegal || tok->X_op == O_absent) | |
1016 | goto err; | |
252b5132 | 1017 | |
ea1562b3 NC |
1018 | saw_comma = 0; |
1019 | saw_arg = 1; | |
1020 | ++tok; | |
1021 | break; | |
1022 | } | |
1023 | } | |
252b5132 | 1024 | |
ea1562b3 NC |
1025 | fini: |
1026 | if (saw_comma) | |
1027 | goto err; | |
1028 | input_line_pointer = old_input_line_pointer; | |
252b5132 | 1029 | |
ea1562b3 NC |
1030 | #ifdef DEBUG_ALPHA |
1031 | debug_exp (orig_tok, ntok - (end_tok - tok)); | |
252b5132 | 1032 | #endif |
ea1562b3 NC |
1033 | #ifdef RELOC_OP_P |
1034 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1035 | #endif |
252b5132 | 1036 | |
ea1562b3 | 1037 | return ntok - (end_tok - tok); |
00f7efb6 | 1038 | |
ea1562b3 NC |
1039 | err: |
1040 | #ifdef RELOC_OP_P | |
1041 | is_end_of_line[(unsigned char) '!'] = 0; | |
543833df | 1042 | #endif |
ea1562b3 NC |
1043 | input_line_pointer = old_input_line_pointer; |
1044 | return TOKENIZE_ERROR; | |
543833df | 1045 | |
ea1562b3 NC |
1046 | #ifdef RELOC_OP_P |
1047 | err_report: | |
1048 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1049 | #endif |
ea1562b3 NC |
1050 | input_line_pointer = old_input_line_pointer; |
1051 | return TOKENIZE_ERROR_REPORT; | |
1052 | } | |
252b5132 | 1053 | |
ea1562b3 NC |
1054 | /* Search forward through all variants of an opcode looking for a |
1055 | syntax match. */ | |
252b5132 | 1056 | |
ea1562b3 NC |
1057 | static const struct alpha_opcode * |
1058 | find_opcode_match (const struct alpha_opcode *first_opcode, | |
1059 | const expressionS *tok, | |
1060 | int *pntok, | |
1061 | int *pcpumatch) | |
1062 | { | |
1063 | const struct alpha_opcode *opcode = first_opcode; | |
1064 | int ntok = *pntok; | |
1065 | int got_cpu_match = 0; | |
252b5132 | 1066 | |
ea1562b3 | 1067 | do |
252b5132 | 1068 | { |
ea1562b3 NC |
1069 | const unsigned char *opidx; |
1070 | int tokidx = 0; | |
252b5132 | 1071 | |
ea1562b3 NC |
1072 | /* Don't match opcodes that don't exist on this architecture. */ |
1073 | if (!(opcode->flags & alpha_target)) | |
1074 | goto match_failed; | |
252b5132 | 1075 | |
ea1562b3 | 1076 | got_cpu_match = 1; |
252b5132 | 1077 | |
ea1562b3 | 1078 | for (opidx = opcode->operands; *opidx; ++opidx) |
252b5132 | 1079 | { |
ea1562b3 | 1080 | const struct alpha_operand *operand = &alpha_operands[*opidx]; |
252b5132 | 1081 | |
ea1562b3 NC |
1082 | /* Only take input from real operands. */ |
1083 | if (operand->flags & AXP_OPERAND_FAKE) | |
1084 | continue; | |
252b5132 | 1085 | |
ea1562b3 NC |
1086 | /* When we expect input, make sure we have it. */ |
1087 | if (tokidx >= ntok) | |
252b5132 | 1088 | { |
ea1562b3 NC |
1089 | if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0) |
1090 | goto match_failed; | |
1091 | continue; | |
252b5132 | 1092 | } |
252b5132 | 1093 | |
ea1562b3 NC |
1094 | /* Match operand type with expression type. */ |
1095 | switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK) | |
252b5132 | 1096 | { |
ea1562b3 NC |
1097 | case AXP_OPERAND_IR: |
1098 | if (tok[tokidx].X_op != O_register | |
1099 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1100 | goto match_failed; | |
1101 | break; | |
1102 | case AXP_OPERAND_FPR: | |
1103 | if (tok[tokidx].X_op != O_register | |
1104 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
1105 | goto match_failed; | |
1106 | break; | |
1107 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS: | |
1108 | if (tok[tokidx].X_op != O_pregister | |
1109 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1110 | goto match_failed; | |
1111 | break; | |
1112 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA: | |
1113 | if (tok[tokidx].X_op != O_cpregister | |
1114 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1115 | goto match_failed; | |
1116 | break; | |
252b5132 | 1117 | |
ea1562b3 NC |
1118 | case AXP_OPERAND_RELATIVE: |
1119 | case AXP_OPERAND_SIGNED: | |
1120 | case AXP_OPERAND_UNSIGNED: | |
1121 | switch (tok[tokidx].X_op) | |
1122 | { | |
1123 | case O_illegal: | |
1124 | case O_absent: | |
1125 | case O_register: | |
1126 | case O_pregister: | |
1127 | case O_cpregister: | |
1128 | goto match_failed; | |
252b5132 | 1129 | |
ea1562b3 NC |
1130 | default: |
1131 | break; | |
1132 | } | |
1133 | break; | |
1134 | ||
1135 | default: | |
1136 | /* Everything else should have been fake. */ | |
1137 | abort (); | |
1138 | } | |
1139 | ++tokidx; | |
252b5132 | 1140 | } |
ea1562b3 NC |
1141 | |
1142 | /* Possible match -- did we use all of our input? */ | |
1143 | if (tokidx == ntok) | |
1144 | { | |
1145 | *pntok = ntok; | |
1146 | return opcode; | |
1147 | } | |
1148 | ||
1149 | match_failed:; | |
252b5132 | 1150 | } |
ea1562b3 NC |
1151 | while (++opcode - alpha_opcodes < (int) alpha_num_opcodes |
1152 | && !strcmp (opcode->name, first_opcode->name)); | |
252b5132 | 1153 | |
ea1562b3 NC |
1154 | if (*pcpumatch) |
1155 | *pcpumatch = got_cpu_match; | |
252b5132 | 1156 | |
ea1562b3 | 1157 | return NULL; |
252b5132 | 1158 | } |
252b5132 | 1159 | |
ea1562b3 NC |
1160 | /* Given an opcode name and a pre-tokenized set of arguments, assemble |
1161 | the insn, but do not emit it. | |
252b5132 | 1162 | |
ea1562b3 NC |
1163 | Note that this implies no macros allowed, since we can't store more |
1164 | than one insn in an insn structure. */ | |
1165 | ||
1166 | static void | |
1167 | assemble_tokens_to_insn (const char *opname, | |
1168 | const expressionS *tok, | |
1169 | int ntok, | |
1170 | struct alpha_insn *insn) | |
252b5132 | 1171 | { |
ea1562b3 NC |
1172 | const struct alpha_opcode *opcode; |
1173 | ||
1174 | /* Search opcodes. */ | |
1175 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
1176 | if (opcode) | |
1177 | { | |
1178 | int cpumatch; | |
1179 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
1180 | if (opcode) | |
1181 | { | |
1182 | assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED); | |
1183 | return; | |
1184 | } | |
1185 | else if (cpumatch) | |
1186 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
1187 | else | |
1188 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
1189 | alpha_target_name); | |
1190 | } | |
1191 | else | |
1192 | as_bad (_("unknown opcode `%s'"), opname); | |
252b5132 RH |
1193 | } |
1194 | ||
ea1562b3 NC |
1195 | /* Build a BFD section with its flags set appropriately for the .lita, |
1196 | .lit8, or .lit4 sections. */ | |
252b5132 | 1197 | |
ea1562b3 NC |
1198 | static void |
1199 | create_literal_section (const char *name, | |
1200 | segT *secp, | |
1201 | symbolS **symp) | |
252b5132 | 1202 | { |
ea1562b3 NC |
1203 | segT current_section = now_seg; |
1204 | int current_subsec = now_subseg; | |
1205 | segT new_sec; | |
252b5132 | 1206 | |
ea1562b3 NC |
1207 | *secp = new_sec = subseg_new (name, 0); |
1208 | subseg_set (current_section, current_subsec); | |
1209 | bfd_set_section_alignment (stdoutput, new_sec, 4); | |
1210 | bfd_set_section_flags (stdoutput, new_sec, | |
1211 | SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY | |
1212 | | SEC_DATA); | |
a161fe53 | 1213 | |
ea1562b3 | 1214 | S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec)); |
252b5132 RH |
1215 | } |
1216 | ||
ea1562b3 | 1217 | /* Load a (partial) expression into a target register. |
252b5132 | 1218 | |
ea1562b3 NC |
1219 | If poffset is not null, after the call it will either contain |
1220 | O_constant 0, or a 16-bit offset appropriate for any MEM format | |
1221 | instruction. In addition, pbasereg will be modified to point to | |
1222 | the base register to use in that MEM format instruction. | |
252b5132 | 1223 | |
ea1562b3 NC |
1224 | In any case, *pbasereg should contain a base register to add to the |
1225 | expression. This will normally be either AXP_REG_ZERO or | |
1226 | alpha_gp_register. Symbol addresses will always be loaded via $gp, | |
1227 | so "foo($0)" is interpreted as adding the address of foo to $0; | |
1228 | i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps, | |
1229 | but this is what OSF/1 does. | |
252b5132 | 1230 | |
ea1562b3 NC |
1231 | If explicit relocations of the form !literal!<number> are allowed, |
1232 | and used, then explicit_reloc with be an expression pointer. | |
252b5132 | 1233 | |
ea1562b3 NC |
1234 | Finally, the return value is nonzero if the calling macro may emit |
1235 | a LITUSE reloc if otherwise appropriate; the return value is the | |
1236 | sequence number to use. */ | |
252b5132 | 1237 | |
ea1562b3 NC |
1238 | static long |
1239 | load_expression (int targreg, | |
1240 | const expressionS *exp, | |
1241 | int *pbasereg, | |
198f1251 TG |
1242 | expressionS *poffset, |
1243 | const char *opname) | |
ea1562b3 NC |
1244 | { |
1245 | long emit_lituse = 0; | |
1246 | offsetT addend = exp->X_add_number; | |
1247 | int basereg = *pbasereg; | |
1248 | struct alpha_insn insn; | |
1249 | expressionS newtok[3]; | |
3765b1be | 1250 | |
ea1562b3 NC |
1251 | switch (exp->X_op) |
1252 | { | |
1253 | case O_symbol: | |
66ba4c77 | 1254 | { |
ea1562b3 NC |
1255 | #ifdef OBJ_ECOFF |
1256 | offsetT lit; | |
66ba4c77 | 1257 | |
ea1562b3 NC |
1258 | /* Attempt to reduce .lit load by splitting the offset from |
1259 | its symbol when possible, but don't create a situation in | |
1260 | which we'd fail. */ | |
1261 | if (!range_signed_32 (addend) && | |
1262 | (alpha_noat_on || targreg == AXP_REG_AT)) | |
66ba4c77 | 1263 | { |
ea1562b3 NC |
1264 | lit = add_to_literal_pool (exp->X_add_symbol, addend, |
1265 | alpha_lita_section, 8); | |
1266 | addend = 0; | |
66ba4c77 | 1267 | } |
ea1562b3 NC |
1268 | else |
1269 | lit = add_to_literal_pool (exp->X_add_symbol, 0, | |
1270 | alpha_lita_section, 8); | |
252b5132 | 1271 | |
ea1562b3 NC |
1272 | if (lit >= 0x8000) |
1273 | as_fatal (_("overflow in literal (.lita) table")); | |
252b5132 | 1274 | |
ea1562b3 | 1275 | /* Emit "ldq r, lit(gp)". */ |
252b5132 | 1276 | |
ea1562b3 NC |
1277 | if (basereg != alpha_gp_register && targreg == basereg) |
1278 | { | |
1279 | if (alpha_noat_on) | |
1280 | as_bad (_("macro requires $at register while noat in effect")); | |
1281 | if (targreg == AXP_REG_AT) | |
1282 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1283 | |
ea1562b3 NC |
1284 | set_tok_reg (newtok[0], AXP_REG_AT); |
1285 | } | |
1286 | else | |
1287 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1288 | |
ea1562b3 NC |
1289 | set_tok_sym (newtok[1], alpha_lita_symbol, lit); |
1290 | set_tok_preg (newtok[2], alpha_gp_register); | |
252b5132 | 1291 | |
ea1562b3 | 1292 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1293 | |
9c2799c2 | 1294 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1295 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; |
1296 | insn.sequence = emit_lituse = next_sequence_num--; | |
1297 | #endif /* OBJ_ECOFF */ | |
252b5132 | 1298 | #ifdef OBJ_ELF |
ea1562b3 | 1299 | /* Emit "ldq r, gotoff(gp)". */ |
252b5132 | 1300 | |
ea1562b3 NC |
1301 | if (basereg != alpha_gp_register && targreg == basereg) |
1302 | { | |
1303 | if (alpha_noat_on) | |
1304 | as_bad (_("macro requires $at register while noat in effect")); | |
1305 | if (targreg == AXP_REG_AT) | |
1306 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1307 | |
ea1562b3 NC |
1308 | set_tok_reg (newtok[0], AXP_REG_AT); |
1309 | } | |
1310 | else | |
1311 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1312 | |
ea1562b3 NC |
1313 | /* XXX: Disable this .got minimizing optimization so that we can get |
1314 | better instruction offset knowledge in the compiler. This happens | |
1315 | very infrequently anyway. */ | |
1316 | if (1 | |
1317 | || (!range_signed_32 (addend) | |
1318 | && (alpha_noat_on || targreg == AXP_REG_AT))) | |
1319 | { | |
1320 | newtok[1] = *exp; | |
1321 | addend = 0; | |
1322 | } | |
1323 | else | |
1324 | set_tok_sym (newtok[1], exp->X_add_symbol, 0); | |
252b5132 | 1325 | |
ea1562b3 | 1326 | set_tok_preg (newtok[2], alpha_gp_register); |
252b5132 | 1327 | |
ea1562b3 | 1328 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1329 | |
9c2799c2 | 1330 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1331 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; |
1332 | insn.sequence = emit_lituse = next_sequence_num--; | |
1333 | #endif /* OBJ_ELF */ | |
1334 | #ifdef OBJ_EVAX | |
ea1562b3 | 1335 | /* Find symbol or symbol pointer in link section. */ |
252b5132 | 1336 | |
198f1251 | 1337 | if (exp->X_add_symbol == alpha_evax_proc->symbol) |
ea1562b3 | 1338 | { |
51794af8 TG |
1339 | /* Linkage-relative expression. */ |
1340 | set_tok_reg (newtok[0], targreg); | |
1341 | ||
ea1562b3 NC |
1342 | if (range_signed_16 (addend)) |
1343 | { | |
ea1562b3 | 1344 | set_tok_const (newtok[1], addend); |
ea1562b3 NC |
1345 | addend = 0; |
1346 | } | |
1347 | else | |
1348 | { | |
ea1562b3 | 1349 | set_tok_const (newtok[1], 0); |
ea1562b3 | 1350 | } |
51794af8 TG |
1351 | set_tok_preg (newtok[2], basereg); |
1352 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); | |
ea1562b3 NC |
1353 | } |
1354 | else | |
1355 | { | |
198f1251 TG |
1356 | const char *symname = S_GET_NAME (exp->X_add_symbol); |
1357 | const char *ptr1, *ptr2; | |
1358 | int symlen = strlen (symname); | |
1359 | ||
1360 | if ((symlen > 4 && | |
1361 | strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0)) | |
ea1562b3 | 1362 | { |
51794af8 TG |
1363 | /* Access to an item whose address is stored in the linkage |
1364 | section. Just read the address. */ | |
198f1251 TG |
1365 | set_tok_reg (newtok[0], targreg); |
1366 | ||
1367 | newtok[1] = *exp; | |
1368 | newtok[1].X_op = O_subtract; | |
1369 | newtok[1].X_op_symbol = alpha_evax_proc->symbol; | |
1370 | ||
1371 | set_tok_preg (newtok[2], basereg); | |
1372 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1373 | alpha_linkage_symbol = exp->X_add_symbol; | |
1374 | ||
1375 | if (poffset) | |
1376 | set_tok_const (*poffset, 0); | |
1377 | ||
1378 | if (alpha_flag_replace && targreg == 26) | |
1379 | { | |
51794af8 | 1380 | /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */ |
198f1251 TG |
1381 | char *ensymname; |
1382 | symbolS *ensym; | |
198f1251 | 1383 | |
51794af8 | 1384 | /* Build the entry name as 'NAME..en'. */ |
198f1251 TG |
1385 | ptr1 = strstr (symname, "..") + 2; |
1386 | if (ptr1 > ptr2) | |
1387 | ptr1 = symname; | |
add39d23 | 1388 | ensymname = XNEWVEC (char, ptr2 - ptr1 + 5); |
198f1251 TG |
1389 | memcpy (ensymname, ptr1, ptr2 - ptr1); |
1390 | memcpy (ensymname + (ptr2 - ptr1), "..en", 5); | |
1391 | ||
9c2799c2 | 1392 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1393 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP; |
1394 | ensym = symbol_find_or_make (ensymname); | |
39a0d071 | 1395 | free (ensymname); |
f8e24652 | 1396 | symbol_mark_used (ensym); |
198f1251 TG |
1397 | /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH |
1398 | case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker | |
1399 | Utility Manual. */ | |
1400 | insn.fixups[insn.nfixups].exp.X_op = O_symbol; | |
1401 | insn.fixups[insn.nfixups].exp.X_add_symbol = ensym; | |
1402 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1403 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1404 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1405 | insn.nfixups++; | |
1406 | ||
1407 | /* ??? Force bsym to be instantiated now, as it will be | |
1408 | too late to do so in tc_gen_reloc. */ | |
87975d2a | 1409 | symbol_get_bfdsym (exp->X_add_symbol); |
198f1251 TG |
1410 | } |
1411 | else if (alpha_flag_replace && targreg == 27) | |
1412 | { | |
51794af8 | 1413 | /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */ |
198f1251 TG |
1414 | char *psymname; |
1415 | symbolS *psym; | |
1416 | ||
51794af8 | 1417 | /* Extract NAME. */ |
198f1251 TG |
1418 | ptr1 = strstr (symname, "..") + 2; |
1419 | if (ptr1 > ptr2) | |
1420 | ptr1 = symname; | |
29a2809e | 1421 | psymname = xmemdup0 (ptr1, ptr2 - ptr1); |
51794af8 | 1422 | |
9c2799c2 | 1423 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1424 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA; |
1425 | psym = symbol_find_or_make (psymname); | |
39a0d071 | 1426 | free (psymname); |
f8e24652 | 1427 | symbol_mark_used (psym); |
198f1251 TG |
1428 | insn.fixups[insn.nfixups].exp.X_op = O_subtract; |
1429 | insn.fixups[insn.nfixups].exp.X_add_symbol = psym; | |
1430 | insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol; | |
1431 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1432 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1433 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1434 | insn.nfixups++; | |
1435 | } | |
1436 | ||
51794af8 | 1437 | emit_insn (&insn); |
198f1251 | 1438 | return 0; |
ea1562b3 NC |
1439 | } |
1440 | else | |
198f1251 | 1441 | { |
51794af8 TG |
1442 | /* Not in the linkage section. Put the value into the linkage |
1443 | section. */ | |
198f1251 | 1444 | symbolS *linkexp; |
252b5132 | 1445 | |
198f1251 TG |
1446 | if (!range_signed_32 (addend)) |
1447 | addend = sign_extend_32 (addend); | |
8aacb050 | 1448 | linkexp = add_to_link_pool (exp->X_add_symbol, 0); |
198f1251 TG |
1449 | set_tok_reg (newtok[0], targreg); |
1450 | set_tok_sym (newtok[1], linkexp, 0); | |
1451 | set_tok_preg (newtok[2], basereg); | |
1452 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1453 | } | |
ea1562b3 NC |
1454 | } |
1455 | #endif /* OBJ_EVAX */ | |
252b5132 | 1456 | |
ea1562b3 | 1457 | emit_insn (&insn); |
19f78583 | 1458 | |
ea1562b3 NC |
1459 | #ifndef OBJ_EVAX |
1460 | if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO) | |
1461 | { | |
1462 | /* Emit "addq r, base, r". */ | |
19f78583 | 1463 | |
ea1562b3 NC |
1464 | set_tok_reg (newtok[1], basereg); |
1465 | set_tok_reg (newtok[2], targreg); | |
1466 | assemble_tokens ("addq", newtok, 3, 0); | |
1467 | } | |
1468 | #endif | |
1469 | basereg = targreg; | |
1470 | } | |
1471 | break; | |
19f78583 | 1472 | |
ea1562b3 NC |
1473 | case O_constant: |
1474 | break; | |
19f78583 | 1475 | |
ea1562b3 NC |
1476 | case O_subtract: |
1477 | /* Assume that this difference expression will be resolved to an | |
1478 | absolute value and that that value will fit in 16 bits. */ | |
19f78583 | 1479 | |
ea1562b3 NC |
1480 | set_tok_reg (newtok[0], targreg); |
1481 | newtok[1] = *exp; | |
1482 | set_tok_preg (newtok[2], basereg); | |
198f1251 | 1483 | assemble_tokens (opname, newtok, 3, 0); |
43b4c25e | 1484 | |
ea1562b3 NC |
1485 | if (poffset) |
1486 | set_tok_const (*poffset, 0); | |
1487 | return 0; | |
43b4c25e | 1488 | |
ea1562b3 NC |
1489 | case O_big: |
1490 | if (exp->X_add_number > 0) | |
1491 | as_bad (_("bignum invalid; zero assumed")); | |
1492 | else | |
1493 | as_bad (_("floating point number invalid; zero assumed")); | |
1494 | addend = 0; | |
1495 | break; | |
43b4c25e | 1496 | |
ea1562b3 NC |
1497 | default: |
1498 | as_bad (_("can't handle expression")); | |
1499 | addend = 0; | |
1500 | break; | |
1501 | } | |
43b4c25e | 1502 | |
ea1562b3 | 1503 | if (!range_signed_32 (addend)) |
43b4c25e | 1504 | { |
198f1251 TG |
1505 | #ifdef OBJ_EVAX |
1506 | symbolS *litexp; | |
1507 | #else | |
ea1562b3 NC |
1508 | offsetT lit; |
1509 | long seq_num = next_sequence_num--; | |
198f1251 | 1510 | #endif |
43b4c25e | 1511 | |
ea1562b3 NC |
1512 | /* For 64-bit addends, just put it in the literal pool. */ |
1513 | #ifdef OBJ_EVAX | |
1514 | /* Emit "ldq targreg, lit(basereg)". */ | |
8aacb050 | 1515 | litexp = add_to_link_pool (section_symbol (absolute_section), addend); |
ea1562b3 | 1516 | set_tok_reg (newtok[0], targreg); |
198f1251 | 1517 | set_tok_sym (newtok[1], litexp, 0); |
ea1562b3 NC |
1518 | set_tok_preg (newtok[2], alpha_gp_register); |
1519 | assemble_tokens ("ldq", newtok, 3, 0); | |
1520 | #else | |
1521 | ||
1522 | if (alpha_lit8_section == NULL) | |
43b4c25e | 1523 | { |
ea1562b3 NC |
1524 | create_literal_section (".lit8", |
1525 | &alpha_lit8_section, | |
1526 | &alpha_lit8_symbol); | |
1527 | ||
1528 | #ifdef OBJ_ECOFF | |
1529 | alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000, | |
1530 | alpha_lita_section, 8); | |
1531 | if (alpha_lit8_literal >= 0x8000) | |
1532 | as_fatal (_("overflow in literal (.lita) table")); | |
11f45fb5 | 1533 | #endif |
ea1562b3 | 1534 | } |
43b4c25e | 1535 | |
ea1562b3 NC |
1536 | lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000; |
1537 | if (lit >= 0x8000) | |
1538 | as_fatal (_("overflow in literal (.lit8) table")); | |
19f78583 | 1539 | |
ea1562b3 | 1540 | /* Emit "lda litreg, .lit8+0x8000". */ |
3765b1be | 1541 | |
ea1562b3 NC |
1542 | if (targreg == basereg) |
1543 | { | |
1544 | if (alpha_noat_on) | |
1545 | as_bad (_("macro requires $at register while noat in effect")); | |
1546 | if (targreg == AXP_REG_AT) | |
1547 | as_bad (_("macro requires $at while $at in use")); | |
1548 | ||
1549 | set_tok_reg (newtok[0], AXP_REG_AT); | |
43b4c25e | 1550 | } |
ea1562b3 NC |
1551 | else |
1552 | set_tok_reg (newtok[0], targreg); | |
1553 | #ifdef OBJ_ECOFF | |
1554 | set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal); | |
1555 | #endif | |
1556 | #ifdef OBJ_ELF | |
1557 | set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000); | |
1558 | #endif | |
1559 | set_tok_preg (newtok[2], alpha_gp_register); | |
43b4c25e | 1560 | |
ea1562b3 | 1561 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
19f78583 | 1562 | |
9c2799c2 | 1563 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1564 | #ifdef OBJ_ECOFF |
1565 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; | |
1566 | #endif | |
1567 | #ifdef OBJ_ELF | |
1568 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; | |
1569 | #endif | |
1570 | insn.sequence = seq_num; | |
19f78583 | 1571 | |
ea1562b3 | 1572 | emit_insn (&insn); |
19f78583 | 1573 | |
ea1562b3 | 1574 | /* Emit "ldq litreg, lit(litreg)". */ |
19f78583 | 1575 | |
ea1562b3 NC |
1576 | set_tok_const (newtok[1], lit); |
1577 | set_tok_preg (newtok[2], newtok[0].X_add_number); | |
1578 | ||
1579 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1580 | ||
9c2799c2 | 1581 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
1582 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
1583 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
1584 | insn.nfixups++; | |
1585 | insn.sequence = seq_num; | |
1586 | emit_lituse = 0; | |
1587 | ||
1588 | emit_insn (&insn); | |
1589 | ||
1590 | /* Emit "addq litreg, base, target". */ | |
1591 | ||
1592 | if (basereg != AXP_REG_ZERO) | |
1593 | { | |
1594 | set_tok_reg (newtok[1], basereg); | |
1595 | set_tok_reg (newtok[2], targreg); | |
1596 | assemble_tokens ("addq", newtok, 3, 0); | |
1597 | } | |
1598 | #endif /* !OBJ_EVAX */ | |
1599 | ||
1600 | if (poffset) | |
1601 | set_tok_const (*poffset, 0); | |
1602 | *pbasereg = targreg; | |
1603 | } | |
1604 | else | |
43b4c25e | 1605 | { |
ea1562b3 NC |
1606 | offsetT low, high, extra, tmp; |
1607 | ||
1608 | /* For 32-bit operands, break up the addend. */ | |
1609 | ||
1610 | low = sign_extend_16 (addend); | |
1611 | tmp = addend - low; | |
1612 | high = sign_extend_16 (tmp >> 16); | |
1613 | ||
1614 | if (tmp - (high << 16)) | |
43b4c25e | 1615 | { |
ea1562b3 NC |
1616 | extra = 0x4000; |
1617 | tmp -= 0x40000000; | |
1618 | high = sign_extend_16 (tmp >> 16); | |
1619 | } | |
1620 | else | |
1621 | extra = 0; | |
3765b1be | 1622 | |
ea1562b3 NC |
1623 | set_tok_reg (newtok[0], targreg); |
1624 | set_tok_preg (newtok[2], basereg); | |
3765b1be | 1625 | |
ea1562b3 NC |
1626 | if (extra) |
1627 | { | |
1628 | /* Emit "ldah r, extra(r). */ | |
1629 | set_tok_const (newtok[1], extra); | |
1630 | assemble_tokens ("ldah", newtok, 3, 0); | |
1631 | set_tok_preg (newtok[2], basereg = targreg); | |
1632 | } | |
43b4c25e | 1633 | |
ea1562b3 NC |
1634 | if (high) |
1635 | { | |
1636 | /* Emit "ldah r, high(r). */ | |
1637 | set_tok_const (newtok[1], high); | |
1638 | assemble_tokens ("ldah", newtok, 3, 0); | |
1639 | basereg = targreg; | |
1640 | set_tok_preg (newtok[2], basereg); | |
1641 | } | |
19f78583 | 1642 | |
ea1562b3 NC |
1643 | if ((low && !poffset) || (!poffset && basereg != targreg)) |
1644 | { | |
1645 | /* Emit "lda r, low(base)". */ | |
1646 | set_tok_const (newtok[1], low); | |
1647 | assemble_tokens ("lda", newtok, 3, 0); | |
1648 | basereg = targreg; | |
1649 | low = 0; | |
43b4c25e | 1650 | } |
ea1562b3 NC |
1651 | |
1652 | if (poffset) | |
1653 | set_tok_const (*poffset, low); | |
1654 | *pbasereg = basereg; | |
43b4c25e | 1655 | } |
ea1562b3 NC |
1656 | |
1657 | return emit_lituse; | |
43b4c25e | 1658 | } |
43b4c25e | 1659 | |
ea1562b3 NC |
1660 | /* The lda macro differs from the lda instruction in that it handles |
1661 | most simple expressions, particularly symbol address loads and | |
1662 | large constants. */ | |
11f45fb5 | 1663 | |
ea1562b3 NC |
1664 | static void |
1665 | emit_lda (const expressionS *tok, | |
1666 | int ntok, | |
1667 | const void * unused ATTRIBUTE_UNUSED) | |
1668 | { | |
1669 | int basereg; | |
43b4c25e | 1670 | |
ea1562b3 NC |
1671 | if (ntok == 2) |
1672 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
1673 | else | |
1674 | basereg = tok[2].X_add_number; | |
1675 | ||
198f1251 | 1676 | (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda"); |
43b4c25e | 1677 | } |
43b4c25e | 1678 | |
ea1562b3 NC |
1679 | /* The ldah macro differs from the ldah instruction in that it has $31 |
1680 | as an implied base register. */ | |
252b5132 | 1681 | |
ea1562b3 NC |
1682 | static void |
1683 | emit_ldah (const expressionS *tok, | |
1684 | int ntok ATTRIBUTE_UNUSED, | |
1685 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 1686 | { |
ea1562b3 | 1687 | expressionS newtok[3]; |
252b5132 | 1688 | |
ea1562b3 NC |
1689 | newtok[0] = tok[0]; |
1690 | newtok[1] = tok[1]; | |
1691 | set_tok_preg (newtok[2], AXP_REG_ZERO); | |
252b5132 | 1692 | |
ea1562b3 NC |
1693 | assemble_tokens ("ldah", newtok, 3, 0); |
1694 | } | |
19f78583 | 1695 | |
ea1562b3 NC |
1696 | /* Called internally to handle all alignment needs. This takes care |
1697 | of eliding calls to frag_align if'n the cached current alignment | |
1698 | says we've already got it, as well as taking care of the auto-align | |
1699 | feature wrt labels. */ | |
252b5132 | 1700 | |
ea1562b3 NC |
1701 | static void |
1702 | alpha_align (int n, | |
1703 | char *pfill, | |
1704 | symbolS *label, | |
1705 | int force ATTRIBUTE_UNUSED) | |
1706 | { | |
1707 | if (alpha_current_align >= n) | |
1708 | return; | |
43b4c25e | 1709 | |
ea1562b3 NC |
1710 | if (pfill == NULL) |
1711 | { | |
1712 | if (subseg_text_p (now_seg)) | |
1713 | frag_align_code (n, 0); | |
1714 | else | |
1715 | frag_align (n, 0, 0); | |
1716 | } | |
1717 | else | |
1718 | frag_align (n, *pfill, 0); | |
43b4c25e | 1719 | |
ea1562b3 | 1720 | alpha_current_align = n; |
43b4c25e | 1721 | |
ea1562b3 NC |
1722 | if (label != NULL && S_GET_SEGMENT (label) == now_seg) |
1723 | { | |
1724 | symbol_set_frag (label, frag_now); | |
1725 | S_SET_VALUE (label, (valueT) frag_now_fix ()); | |
1726 | } | |
43b4c25e | 1727 | |
ea1562b3 | 1728 | record_alignment (now_seg, n); |
43b4c25e | 1729 | |
ea1562b3 NC |
1730 | /* ??? If alpha_flag_relax && force && elf, record the requested alignment |
1731 | in a reloc for the linker to see. */ | |
1732 | } | |
19f78583 | 1733 | |
ea1562b3 | 1734 | /* Actually output an instruction with its fixup. */ |
19f78583 | 1735 | |
ea1562b3 NC |
1736 | static void |
1737 | emit_insn (struct alpha_insn *insn) | |
1738 | { | |
1739 | char *f; | |
1740 | int i; | |
43b4c25e | 1741 | |
ea1562b3 NC |
1742 | /* Take care of alignment duties. */ |
1743 | if (alpha_auto_align_on && alpha_current_align < 2) | |
1744 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
1745 | if (alpha_current_align > 2) | |
1746 | alpha_current_align = 2; | |
1747 | alpha_insn_label = NULL; | |
43b4c25e | 1748 | |
ea1562b3 NC |
1749 | /* Write out the instruction. */ |
1750 | f = frag_more (4); | |
1751 | md_number_to_chars (f, insn->insn, 4); | |
43b4c25e | 1752 | |
ea1562b3 NC |
1753 | #ifdef OBJ_ELF |
1754 | dwarf2_emit_insn (4); | |
1755 | #endif | |
252b5132 | 1756 | |
ea1562b3 NC |
1757 | /* Apply the fixups in order. */ |
1758 | for (i = 0; i < insn->nfixups; ++i) | |
1759 | { | |
1760 | const struct alpha_operand *operand = (const struct alpha_operand *) 0; | |
1761 | struct alpha_fixup *fixup = &insn->fixups[i]; | |
1762 | struct alpha_reloc_tag *info = NULL; | |
1763 | int size, pcrel; | |
1764 | fixS *fixP; | |
252b5132 | 1765 | |
ea1562b3 NC |
1766 | /* Some fixups are only used internally and so have no howto. */ |
1767 | if ((int) fixup->reloc < 0) | |
1768 | { | |
1769 | operand = &alpha_operands[-(int) fixup->reloc]; | |
1770 | size = 4; | |
1771 | pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0); | |
1772 | } | |
1773 | else if (fixup->reloc > BFD_RELOC_UNUSED | |
1774 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16 | |
1775 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16) | |
1776 | { | |
1777 | size = 2; | |
1778 | pcrel = 0; | |
1779 | } | |
1780 | else | |
1781 | { | |
21d799b5 NC |
1782 | reloc_howto_type *reloc_howto = |
1783 | bfd_reloc_type_lookup (stdoutput, | |
1784 | (bfd_reloc_code_real_type) fixup->reloc); | |
9c2799c2 | 1785 | gas_assert (reloc_howto); |
252b5132 | 1786 | |
ea1562b3 | 1787 | size = bfd_get_reloc_size (reloc_howto); |
252b5132 | 1788 | |
198f1251 TG |
1789 | switch (fixup->reloc) |
1790 | { | |
1791 | #ifdef OBJ_EVAX | |
1792 | case BFD_RELOC_ALPHA_NOP: | |
1793 | case BFD_RELOC_ALPHA_BSR: | |
1794 | case BFD_RELOC_ALPHA_LDA: | |
1795 | case BFD_RELOC_ALPHA_BOH: | |
1796 | break; | |
1797 | #endif | |
1798 | default: | |
9c2799c2 | 1799 | gas_assert (size >= 1 && size <= 4); |
198f1251 | 1800 | } |
3739860c | 1801 | |
ea1562b3 NC |
1802 | pcrel = reloc_howto->pc_relative; |
1803 | } | |
43b4c25e | 1804 | |
ea1562b3 | 1805 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, |
21d799b5 | 1806 | &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc); |
252b5132 | 1807 | |
ea1562b3 NC |
1808 | /* Turn off complaints that the addend is too large for some fixups, |
1809 | and copy in the sequence number for the explicit relocations. */ | |
1810 | switch (fixup->reloc) | |
1811 | { | |
1812 | case BFD_RELOC_ALPHA_HINT: | |
1813 | case BFD_RELOC_GPREL32: | |
1814 | case BFD_RELOC_GPREL16: | |
1815 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
1816 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
1817 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
1818 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
1819 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
1820 | case BFD_RELOC_ALPHA_DTPREL16: | |
1821 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
1822 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
1823 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
1824 | case BFD_RELOC_ALPHA_TPREL16: | |
1825 | fixP->fx_no_overflow = 1; | |
252b5132 | 1826 | break; |
252b5132 | 1827 | |
ea1562b3 NC |
1828 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
1829 | fixP->fx_no_overflow = 1; | |
1830 | fixP->fx_addsy = section_symbol (now_seg); | |
1831 | fixP->fx_offset = 0; | |
43b4c25e | 1832 | |
ea1562b3 NC |
1833 | info = get_alpha_reloc_tag (insn->sequence); |
1834 | if (++info->n_master > 1) | |
1835 | as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence); | |
1836 | if (info->segment != now_seg) | |
1837 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1838 | insn->sequence); | |
1839 | fixP->tc_fix_data.info = info; | |
1840 | break; | |
43b4c25e | 1841 | |
ea1562b3 NC |
1842 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
1843 | fixP->fx_no_overflow = 1; | |
252b5132 | 1844 | |
ea1562b3 NC |
1845 | info = get_alpha_reloc_tag (insn->sequence); |
1846 | if (++info->n_slaves > 1) | |
1847 | as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence); | |
1848 | if (info->segment != now_seg) | |
1849 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1850 | insn->sequence); | |
1851 | fixP->tc_fix_data.info = info; | |
1852 | info->slaves = fixP; | |
1853 | break; | |
1854 | ||
1855 | case BFD_RELOC_ALPHA_LITERAL: | |
1856 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
1857 | fixP->fx_no_overflow = 1; | |
1858 | ||
1859 | if (insn->sequence == 0) | |
1860 | break; | |
1861 | info = get_alpha_reloc_tag (insn->sequence); | |
1862 | info->master = fixP; | |
1863 | info->n_master++; | |
1864 | if (info->segment != now_seg) | |
1865 | info->multi_section_p = 1; | |
1866 | fixP->tc_fix_data.info = info; | |
1867 | break; | |
43b4c25e | 1868 | |
19f78583 | 1869 | #ifdef RELOC_OP_P |
ea1562b3 NC |
1870 | case DUMMY_RELOC_LITUSE_ADDR: |
1871 | fixP->fx_offset = LITUSE_ALPHA_ADDR; | |
1872 | goto do_lituse; | |
1873 | case DUMMY_RELOC_LITUSE_BASE: | |
1874 | fixP->fx_offset = LITUSE_ALPHA_BASE; | |
1875 | goto do_lituse; | |
1876 | case DUMMY_RELOC_LITUSE_BYTOFF: | |
1877 | fixP->fx_offset = LITUSE_ALPHA_BYTOFF; | |
1878 | goto do_lituse; | |
1879 | case DUMMY_RELOC_LITUSE_JSR: | |
1880 | fixP->fx_offset = LITUSE_ALPHA_JSR; | |
1881 | goto do_lituse; | |
1882 | case DUMMY_RELOC_LITUSE_TLSGD: | |
1883 | fixP->fx_offset = LITUSE_ALPHA_TLSGD; | |
1884 | goto do_lituse; | |
1885 | case DUMMY_RELOC_LITUSE_TLSLDM: | |
1886 | fixP->fx_offset = LITUSE_ALPHA_TLSLDM; | |
1887 | goto do_lituse; | |
04fe8f58 RH |
1888 | case DUMMY_RELOC_LITUSE_JSRDIRECT: |
1889 | fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT; | |
1890 | goto do_lituse; | |
ea1562b3 NC |
1891 | do_lituse: |
1892 | fixP->fx_addsy = section_symbol (now_seg); | |
1893 | fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE; | |
1894 | ||
1895 | info = get_alpha_reloc_tag (insn->sequence); | |
1896 | if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD) | |
1897 | info->saw_lu_tlsgd = 1; | |
1898 | else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM) | |
1899 | info->saw_lu_tlsldm = 1; | |
1900 | if (++info->n_slaves > 1) | |
1901 | { | |
1902 | if (info->saw_lu_tlsgd) | |
1903 | as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"), | |
1904 | insn->sequence); | |
1905 | else if (info->saw_lu_tlsldm) | |
1906 | as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"), | |
1907 | insn->sequence); | |
1908 | } | |
1909 | fixP->tc_fix_data.info = info; | |
1910 | fixP->tc_fix_data.next_reloc = info->slaves; | |
1911 | info->slaves = fixP; | |
1912 | if (info->segment != now_seg) | |
1913 | info->multi_section_p = 1; | |
1914 | break; | |
1915 | ||
1916 | case BFD_RELOC_ALPHA_TLSGD: | |
1917 | fixP->fx_no_overflow = 1; | |
1918 | ||
1919 | if (insn->sequence == 0) | |
1920 | break; | |
1921 | info = get_alpha_reloc_tag (insn->sequence); | |
1922 | if (info->saw_tlsgd) | |
1923 | as_bad (_("duplicate !tlsgd!%ld"), insn->sequence); | |
1924 | else if (info->saw_tlsldm) | |
1925 | as_bad (_("sequence number in use for !tlsldm!%ld"), | |
1926 | insn->sequence); | |
1927 | else | |
1928 | info->saw_tlsgd = 1; | |
1929 | fixP->tc_fix_data.info = info; | |
1930 | break; | |
1931 | ||
1932 | case BFD_RELOC_ALPHA_TLSLDM: | |
1933 | fixP->fx_no_overflow = 1; | |
1934 | ||
1935 | if (insn->sequence == 0) | |
1936 | break; | |
1937 | info = get_alpha_reloc_tag (insn->sequence); | |
1938 | if (info->saw_tlsldm) | |
1939 | as_bad (_("duplicate !tlsldm!%ld"), insn->sequence); | |
1940 | else if (info->saw_tlsgd) | |
1941 | as_bad (_("sequence number in use for !tlsgd!%ld"), | |
1942 | insn->sequence); | |
1943 | else | |
1944 | info->saw_tlsldm = 1; | |
1945 | fixP->tc_fix_data.info = info; | |
1946 | break; | |
19f78583 | 1947 | #endif |
198f1251 TG |
1948 | #ifdef OBJ_EVAX |
1949 | case BFD_RELOC_ALPHA_NOP: | |
1950 | case BFD_RELOC_ALPHA_LDA: | |
1951 | case BFD_RELOC_ALPHA_BSR: | |
1952 | case BFD_RELOC_ALPHA_BOH: | |
1953 | info = get_alpha_reloc_tag (next_sequence_num--); | |
1954 | fixP->tc_fix_data.info = info; | |
1955 | fixP->tc_fix_data.info->sym = fixup->xtrasym; | |
1956 | fixP->tc_fix_data.info->psym = fixup->procsym; | |
1957 | break; | |
1958 | #endif | |
1959 | ||
ea1562b3 NC |
1960 | default: |
1961 | if ((int) fixup->reloc < 0) | |
1962 | { | |
1963 | if (operand->flags & AXP_OPERAND_NOOVERFLOW) | |
1964 | fixP->fx_no_overflow = 1; | |
1965 | } | |
1966 | break; | |
1967 | } | |
1968 | } | |
252b5132 RH |
1969 | } |
1970 | ||
ea1562b3 | 1971 | /* Insert an operand value into an instruction. */ |
252b5132 | 1972 | |
ea1562b3 NC |
1973 | static unsigned |
1974 | insert_operand (unsigned insn, | |
1975 | const struct alpha_operand *operand, | |
1976 | offsetT val, | |
3b4dbbbf | 1977 | const char *file, |
ea1562b3 | 1978 | unsigned line) |
252b5132 | 1979 | { |
ea1562b3 | 1980 | if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW)) |
252b5132 | 1981 | { |
ea1562b3 | 1982 | offsetT min, max; |
252b5132 | 1983 | |
ea1562b3 | 1984 | if (operand->flags & AXP_OPERAND_SIGNED) |
252b5132 | 1985 | { |
ea1562b3 NC |
1986 | max = (1 << (operand->bits - 1)) - 1; |
1987 | min = -(1 << (operand->bits - 1)); | |
1988 | } | |
1989 | else | |
1990 | { | |
1991 | max = (1 << operand->bits) - 1; | |
1992 | min = 0; | |
1993 | } | |
252b5132 | 1994 | |
ea1562b3 | 1995 | if (val < min || val > max) |
a06413e3 | 1996 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); |
ea1562b3 | 1997 | } |
252b5132 | 1998 | |
ea1562b3 NC |
1999 | if (operand->insert) |
2000 | { | |
2001 | const char *errmsg = NULL; | |
252b5132 RH |
2002 | |
2003 | insn = (*operand->insert) (insn, val, &errmsg); | |
2004 | if (errmsg) | |
20203fb9 | 2005 | as_warn ("%s", errmsg); |
252b5132 RH |
2006 | } |
2007 | else | |
2008 | insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift); | |
2009 | ||
2010 | return insn; | |
2011 | } | |
2012 | ||
11f45fb5 NC |
2013 | /* Turn an opcode description and a set of arguments into |
2014 | an instruction and a fixup. */ | |
252b5132 RH |
2015 | |
2016 | static void | |
ea1562b3 NC |
2017 | assemble_insn (const struct alpha_opcode *opcode, |
2018 | const expressionS *tok, | |
2019 | int ntok, | |
2020 | struct alpha_insn *insn, | |
21d799b5 | 2021 | extended_bfd_reloc_code_real_type reloc) |
252b5132 | 2022 | { |
19f78583 RH |
2023 | const struct alpha_operand *reloc_operand = NULL; |
2024 | const expressionS *reloc_exp = NULL; | |
252b5132 RH |
2025 | const unsigned char *argidx; |
2026 | unsigned image; | |
2027 | int tokidx = 0; | |
2028 | ||
2029 | memset (insn, 0, sizeof (*insn)); | |
2030 | image = opcode->opcode; | |
2031 | ||
2032 | for (argidx = opcode->operands; *argidx; ++argidx) | |
2033 | { | |
2034 | const struct alpha_operand *operand = &alpha_operands[*argidx]; | |
32ff5c2e | 2035 | const expressionS *t = (const expressionS *) 0; |
252b5132 RH |
2036 | |
2037 | if (operand->flags & AXP_OPERAND_FAKE) | |
2038 | { | |
ea1562b3 | 2039 | /* Fake operands take no value and generate no fixup. */ |
32ff5c2e | 2040 | image = insert_operand (image, operand, 0, NULL, 0); |
252b5132 RH |
2041 | continue; |
2042 | } | |
2043 | ||
2044 | if (tokidx >= ntok) | |
2045 | { | |
2046 | switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK) | |
2047 | { | |
2048 | case AXP_OPERAND_DEFAULT_FIRST: | |
2049 | t = &tok[0]; | |
2050 | break; | |
2051 | case AXP_OPERAND_DEFAULT_SECOND: | |
2052 | t = &tok[1]; | |
2053 | break; | |
2054 | case AXP_OPERAND_DEFAULT_ZERO: | |
2055 | { | |
446a06c9 | 2056 | static expressionS zero_exp; |
252b5132 | 2057 | t = &zero_exp; |
446a06c9 MM |
2058 | zero_exp.X_op = O_constant; |
2059 | zero_exp.X_unsigned = 1; | |
252b5132 RH |
2060 | } |
2061 | break; | |
2062 | default: | |
bc805888 | 2063 | abort (); |
252b5132 RH |
2064 | } |
2065 | } | |
2066 | else | |
2067 | t = &tok[tokidx++]; | |
2068 | ||
2069 | switch (t->X_op) | |
2070 | { | |
2071 | case O_register: | |
2072 | case O_pregister: | |
2073 | case O_cpregister: | |
32ff5c2e KH |
2074 | image = insert_operand (image, operand, regno (t->X_add_number), |
2075 | NULL, 0); | |
252b5132 RH |
2076 | break; |
2077 | ||
2078 | case O_constant: | |
32ff5c2e | 2079 | image = insert_operand (image, operand, t->X_add_number, NULL, 0); |
9c2799c2 | 2080 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2081 | reloc_operand = operand; |
2082 | reloc_exp = t; | |
252b5132 RH |
2083 | break; |
2084 | ||
2085 | default: | |
19f78583 RH |
2086 | /* This is only 0 for fields that should contain registers, |
2087 | which means this pattern shouldn't have matched. */ | |
2088 | if (operand->default_reloc == 0) | |
2089 | abort (); | |
252b5132 | 2090 | |
19f78583 | 2091 | /* There is one special case for which an insn receives two |
cc8a6dd0 | 2092 | relocations, and thus the user-supplied reloc does not |
19f78583 RH |
2093 | override the operand reloc. */ |
2094 | if (operand->default_reloc == BFD_RELOC_ALPHA_HINT) | |
2095 | { | |
2096 | struct alpha_fixup *fixup; | |
252b5132 | 2097 | |
19f78583 RH |
2098 | if (insn->nfixups >= MAX_INSN_FIXUPS) |
2099 | as_fatal (_("too many fixups")); | |
252b5132 | 2100 | |
19f78583 RH |
2101 | fixup = &insn->fixups[insn->nfixups++]; |
2102 | fixup->exp = *t; | |
2103 | fixup->reloc = BFD_RELOC_ALPHA_HINT; | |
2104 | } | |
2105 | else | |
2106 | { | |
2107 | if (reloc == BFD_RELOC_UNUSED) | |
2108 | reloc = operand->default_reloc; | |
2109 | ||
9c2799c2 | 2110 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2111 | reloc_operand = operand; |
2112 | reloc_exp = t; | |
2113 | } | |
252b5132 RH |
2114 | break; |
2115 | } | |
2116 | } | |
2117 | ||
19f78583 RH |
2118 | if (reloc != BFD_RELOC_UNUSED) |
2119 | { | |
2120 | struct alpha_fixup *fixup; | |
2121 | ||
2122 | if (insn->nfixups >= MAX_INSN_FIXUPS) | |
2123 | as_fatal (_("too many fixups")); | |
2124 | ||
2125 | /* ??? My but this is hacky. But the OSF/1 assembler uses the same | |
2126 | relocation tag for both ldah and lda with gpdisp. Choose the | |
2127 | correct internal relocation based on the opcode. */ | |
2128 | if (reloc == BFD_RELOC_ALPHA_GPDISP) | |
2129 | { | |
2130 | if (strcmp (opcode->name, "ldah") == 0) | |
2131 | reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2132 | else if (strcmp (opcode->name, "lda") == 0) | |
2133 | reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
2134 | else | |
2135 | as_bad (_("invalid relocation for instruction")); | |
2136 | } | |
2137 | ||
2138 | /* If this is a real relocation (as opposed to a lituse hint), then | |
198f1251 | 2139 | the relocation width should match the operand width. |
3739860c | 2140 | Take care of -MDISP in operand table. */ |
198f1251 | 2141 | else if (reloc < BFD_RELOC_UNUSED && reloc > 0) |
19f78583 RH |
2142 | { |
2143 | reloc_howto_type *reloc_howto | |
21d799b5 NC |
2144 | = bfd_reloc_type_lookup (stdoutput, |
2145 | (bfd_reloc_code_real_type) reloc); | |
ee21dcab AM |
2146 | if (reloc_operand == NULL |
2147 | || reloc_howto->bitsize != reloc_operand->bits) | |
19f78583 RH |
2148 | { |
2149 | as_bad (_("invalid relocation for field")); | |
2150 | return; | |
2151 | } | |
2152 | } | |
2153 | ||
2154 | fixup = &insn->fixups[insn->nfixups++]; | |
2155 | if (reloc_exp) | |
2156 | fixup->exp = *reloc_exp; | |
2157 | else | |
2158 | fixup->exp.X_op = O_absent; | |
2159 | fixup->reloc = reloc; | |
2160 | } | |
2161 | ||
252b5132 RH |
2162 | insn->insn = image; |
2163 | } | |
2164 | ||
ea1562b3 NC |
2165 | /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u, |
2166 | etc. They differ from the real instructions in that they do simple | |
2167 | expressions like the lda macro. */ | |
252b5132 RH |
2168 | |
2169 | static void | |
ea1562b3 NC |
2170 | emit_ir_load (const expressionS *tok, |
2171 | int ntok, | |
2172 | const void * opname) | |
252b5132 | 2173 | { |
ea1562b3 NC |
2174 | int basereg; |
2175 | long lituse; | |
2176 | expressionS newtok[3]; | |
2177 | struct alpha_insn insn; | |
198f1251 TG |
2178 | const char *symname |
2179 | = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): ""; | |
2180 | int symlen = strlen (symname); | |
252b5132 | 2181 | |
ea1562b3 NC |
2182 | if (ntok == 2) |
2183 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2184 | else | |
2185 | basereg = tok[2].X_add_number; | |
252b5132 | 2186 | |
198f1251 | 2187 | lituse = load_expression (tok[0].X_add_number, &tok[1], |
21d799b5 | 2188 | &basereg, &newtok[1], (const char *) opname); |
252b5132 | 2189 | |
198f1251 TG |
2190 | if (basereg == alpha_gp_register && |
2191 | (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0)) | |
2192 | return; | |
3739860c | 2193 | |
ea1562b3 NC |
2194 | newtok[0] = tok[0]; |
2195 | set_tok_preg (newtok[2], basereg); | |
4dc7ead9 | 2196 | |
ea1562b3 NC |
2197 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
2198 | ||
2199 | if (lituse) | |
252b5132 | 2200 | { |
9c2799c2 | 2201 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2202 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2203 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2204 | insn.nfixups++; | |
2205 | insn.sequence = lituse; | |
2206 | } | |
252b5132 | 2207 | |
ea1562b3 NC |
2208 | emit_insn (&insn); |
2209 | } | |
252b5132 | 2210 | |
ea1562b3 NC |
2211 | /* Handle fp register loads, and both integer and fp register stores. |
2212 | Again, we handle simple expressions. */ | |
43b4c25e | 2213 | |
ea1562b3 NC |
2214 | static void |
2215 | emit_loadstore (const expressionS *tok, | |
2216 | int ntok, | |
2217 | const void * opname) | |
2218 | { | |
2219 | int basereg; | |
2220 | long lituse; | |
2221 | expressionS newtok[3]; | |
2222 | struct alpha_insn insn; | |
252b5132 | 2223 | |
ea1562b3 NC |
2224 | if (ntok == 2) |
2225 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2226 | else | |
2227 | basereg = tok[2].X_add_number; | |
252b5132 | 2228 | |
ea1562b3 NC |
2229 | if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number)) |
2230 | { | |
2231 | if (alpha_noat_on) | |
2232 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2233 | |
3739860c | 2234 | lituse = load_expression (AXP_REG_AT, &tok[1], |
21d799b5 | 2235 | &basereg, &newtok[1], (const char *) opname); |
ea1562b3 NC |
2236 | } |
2237 | else | |
2238 | { | |
2239 | newtok[1] = tok[1]; | |
2240 | lituse = 0; | |
2241 | } | |
43b4c25e | 2242 | |
ea1562b3 NC |
2243 | newtok[0] = tok[0]; |
2244 | set_tok_preg (newtok[2], basereg); | |
43b4c25e | 2245 | |
ea1562b3 | 2246 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
43b4c25e | 2247 | |
ea1562b3 NC |
2248 | if (lituse) |
2249 | { | |
9c2799c2 | 2250 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2251 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2252 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2253 | insn.nfixups++; | |
2254 | insn.sequence = lituse; | |
2255 | } | |
43b4c25e | 2256 | |
ea1562b3 NC |
2257 | emit_insn (&insn); |
2258 | } | |
43b4c25e | 2259 | |
ea1562b3 | 2260 | /* Load a half-word or byte as an unsigned value. */ |
43b4c25e | 2261 | |
ea1562b3 NC |
2262 | static void |
2263 | emit_ldXu (const expressionS *tok, | |
2264 | int ntok, | |
2265 | const void * vlgsize) | |
2266 | { | |
2267 | if (alpha_target & AXP_OPCODE_BWX) | |
2268 | emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]); | |
2269 | else | |
2270 | { | |
2271 | expressionS newtok[3]; | |
2272 | struct alpha_insn insn; | |
2273 | int basereg; | |
2274 | long lituse; | |
19f78583 | 2275 | |
ea1562b3 NC |
2276 | if (alpha_noat_on) |
2277 | as_bad (_("macro requires $at register while noat in effect")); | |
43b4c25e | 2278 | |
ea1562b3 NC |
2279 | if (ntok == 2) |
2280 | basereg = (tok[1].X_op == O_constant | |
2281 | ? AXP_REG_ZERO : alpha_gp_register); | |
2282 | else | |
2283 | basereg = tok[2].X_add_number; | |
3765b1be | 2284 | |
ea1562b3 | 2285 | /* Emit "lda $at, exp". */ |
198f1251 | 2286 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
3765b1be | 2287 | |
ea1562b3 NC |
2288 | /* Emit "ldq_u targ, 0($at)". */ |
2289 | newtok[0] = tok[0]; | |
2290 | set_tok_const (newtok[1], 0); | |
2291 | set_tok_preg (newtok[2], basereg); | |
2292 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
3765b1be | 2293 | |
ea1562b3 NC |
2294 | if (lituse) |
2295 | { | |
9c2799c2 | 2296 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2297 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2298 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2299 | insn.nfixups++; | |
2300 | insn.sequence = lituse; | |
252b5132 | 2301 | } |
252b5132 | 2302 | |
ea1562b3 | 2303 | emit_insn (&insn); |
252b5132 | 2304 | |
ea1562b3 NC |
2305 | /* Emit "extXl targ, $at, targ". */ |
2306 | set_tok_reg (newtok[1], basereg); | |
2307 | newtok[2] = newtok[0]; | |
2308 | assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn); | |
252b5132 | 2309 | |
ea1562b3 | 2310 | if (lituse) |
252b5132 | 2311 | { |
9c2799c2 | 2312 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2313 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2314 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2315 | insn.nfixups++; | |
2316 | insn.sequence = lituse; | |
252b5132 | 2317 | } |
ea1562b3 NC |
2318 | |
2319 | emit_insn (&insn); | |
252b5132 | 2320 | } |
252b5132 RH |
2321 | } |
2322 | ||
ea1562b3 | 2323 | /* Load a half-word or byte as a signed value. */ |
252b5132 RH |
2324 | |
2325 | static void | |
ea1562b3 NC |
2326 | emit_ldX (const expressionS *tok, |
2327 | int ntok, | |
2328 | const void * vlgsize) | |
252b5132 | 2329 | { |
ea1562b3 NC |
2330 | emit_ldXu (tok, ntok, vlgsize); |
2331 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2332 | } | |
252b5132 | 2333 | |
ea1562b3 NC |
2334 | /* Load an integral value from an unaligned address as an unsigned |
2335 | value. */ | |
252b5132 RH |
2336 | |
2337 | static void | |
ea1562b3 NC |
2338 | emit_uldXu (const expressionS *tok, |
2339 | int ntok, | |
2340 | const void * vlgsize) | |
252b5132 | 2341 | { |
ea1562b3 | 2342 | long lgsize = (long) vlgsize; |
252b5132 | 2343 | expressionS newtok[3]; |
252b5132 | 2344 | |
ea1562b3 NC |
2345 | if (alpha_noat_on) |
2346 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2347 | |
ea1562b3 NC |
2348 | /* Emit "lda $at, exp". */ |
2349 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2350 | newtok[0].X_add_number = AXP_REG_AT; | |
2351 | assemble_tokens ("lda", newtok, ntok, 1); | |
2352 | ||
2353 | /* Emit "ldq_u $t9, 0($at)". */ | |
2354 | set_tok_reg (newtok[0], AXP_REG_T9); | |
252b5132 | 2355 | set_tok_const (newtok[1], 0); |
ea1562b3 NC |
2356 | set_tok_preg (newtok[2], AXP_REG_AT); |
2357 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2358 | |
ea1562b3 NC |
2359 | /* Emit "ldq_u $t10, size-1($at)". */ |
2360 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2361 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2362 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2363 | |
ea1562b3 NC |
2364 | /* Emit "extXl $t9, $at, $t9". */ |
2365 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2366 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2367 | set_tok_reg (newtok[2], AXP_REG_T9); | |
2368 | assemble_tokens (extXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2369 | |
ea1562b3 NC |
2370 | /* Emit "extXh $t10, $at, $t10". */ |
2371 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2372 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2373 | assemble_tokens (extXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2374 | |
ea1562b3 NC |
2375 | /* Emit "or $t9, $t10, targ". */ |
2376 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2377 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2378 | newtok[2] = tok[0]; | |
2379 | assemble_tokens ("or", newtok, 3, 1); | |
2380 | } | |
252b5132 | 2381 | |
ea1562b3 NC |
2382 | /* Load an integral value from an unaligned address as a signed value. |
2383 | Note that quads should get funneled to the unsigned load since we | |
2384 | don't have to do the sign extension. */ | |
252b5132 | 2385 | |
ea1562b3 NC |
2386 | static void |
2387 | emit_uldX (const expressionS *tok, | |
2388 | int ntok, | |
2389 | const void * vlgsize) | |
2390 | { | |
2391 | emit_uldXu (tok, ntok, vlgsize); | |
2392 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2393 | } | |
252b5132 | 2394 | |
ea1562b3 | 2395 | /* Implement the ldil macro. */ |
252b5132 | 2396 | |
ea1562b3 NC |
2397 | static void |
2398 | emit_ldil (const expressionS *tok, | |
2399 | int ntok, | |
2400 | const void * unused ATTRIBUTE_UNUSED) | |
2401 | { | |
2402 | expressionS newtok[2]; | |
252b5132 | 2403 | |
ea1562b3 NC |
2404 | memcpy (newtok, tok, sizeof (newtok)); |
2405 | newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); | |
252b5132 | 2406 | |
ea1562b3 | 2407 | assemble_tokens ("lda", newtok, ntok, 1); |
252b5132 RH |
2408 | } |
2409 | ||
ea1562b3 | 2410 | /* Store a half-word or byte. */ |
252b5132 | 2411 | |
ea1562b3 NC |
2412 | static void |
2413 | emit_stX (const expressionS *tok, | |
2414 | int ntok, | |
2415 | const void * vlgsize) | |
252b5132 | 2416 | { |
ea1562b3 | 2417 | int lgsize = (int) (long) vlgsize; |
252b5132 | 2418 | |
ea1562b3 NC |
2419 | if (alpha_target & AXP_OPCODE_BWX) |
2420 | emit_loadstore (tok, ntok, stX_op[lgsize]); | |
2421 | else | |
2422 | { | |
2423 | expressionS newtok[3]; | |
2424 | struct alpha_insn insn; | |
2425 | int basereg; | |
2426 | long lituse; | |
252b5132 | 2427 | |
ea1562b3 NC |
2428 | if (alpha_noat_on) |
2429 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2430 | |
ea1562b3 NC |
2431 | if (ntok == 2) |
2432 | basereg = (tok[1].X_op == O_constant | |
2433 | ? AXP_REG_ZERO : alpha_gp_register); | |
2434 | else | |
2435 | basereg = tok[2].X_add_number; | |
252b5132 | 2436 | |
ea1562b3 | 2437 | /* Emit "lda $at, exp". */ |
198f1251 | 2438 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
252b5132 | 2439 | |
ea1562b3 NC |
2440 | /* Emit "ldq_u $t9, 0($at)". */ |
2441 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2442 | set_tok_const (newtok[1], 0); | |
2443 | set_tok_preg (newtok[2], basereg); | |
2444 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
252b5132 | 2445 | |
ea1562b3 NC |
2446 | if (lituse) |
2447 | { | |
9c2799c2 | 2448 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2449 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2450 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2451 | insn.nfixups++; | |
2452 | insn.sequence = lituse; | |
2453 | } | |
252b5132 | 2454 | |
ea1562b3 | 2455 | emit_insn (&insn); |
252b5132 | 2456 | |
ea1562b3 NC |
2457 | /* Emit "insXl src, $at, $t10". */ |
2458 | newtok[0] = tok[0]; | |
2459 | set_tok_reg (newtok[1], basereg); | |
2460 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2461 | assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn); | |
252b5132 | 2462 | |
ea1562b3 NC |
2463 | if (lituse) |
2464 | { | |
9c2799c2 | 2465 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2466 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2467 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2468 | insn.nfixups++; | |
2469 | insn.sequence = lituse; | |
2470 | } | |
252b5132 | 2471 | |
ea1562b3 | 2472 | emit_insn (&insn); |
252b5132 | 2473 | |
ea1562b3 NC |
2474 | /* Emit "mskXl $t9, $at, $t9". */ |
2475 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2476 | newtok[2] = newtok[0]; | |
2477 | assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn); | |
43b4c25e | 2478 | |
ea1562b3 NC |
2479 | if (lituse) |
2480 | { | |
9c2799c2 | 2481 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2482 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2483 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2484 | insn.nfixups++; | |
2485 | insn.sequence = lituse; | |
2486 | } | |
252b5132 | 2487 | |
ea1562b3 | 2488 | emit_insn (&insn); |
252b5132 | 2489 | |
ea1562b3 NC |
2490 | /* Emit "or $t9, $t10, $t9". */ |
2491 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2492 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2493 | |
ea1562b3 NC |
2494 | /* Emit "stq_u $t9, 0($at). */ |
2495 | set_tok_const(newtok[1], 0); | |
2496 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2497 | assemble_tokens_to_insn ("stq_u", newtok, 3, &insn); | |
252b5132 | 2498 | |
ea1562b3 NC |
2499 | if (lituse) |
2500 | { | |
9c2799c2 | 2501 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2502 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2503 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2504 | insn.nfixups++; | |
2505 | insn.sequence = lituse; | |
2506 | } | |
252b5132 | 2507 | |
ea1562b3 NC |
2508 | emit_insn (&insn); |
2509 | } | |
2510 | } | |
252b5132 | 2511 | |
ea1562b3 | 2512 | /* Store an integer to an unaligned address. */ |
252b5132 | 2513 | |
ea1562b3 NC |
2514 | static void |
2515 | emit_ustX (const expressionS *tok, | |
2516 | int ntok, | |
2517 | const void * vlgsize) | |
2518 | { | |
2519 | int lgsize = (int) (long) vlgsize; | |
2520 | expressionS newtok[3]; | |
252b5132 | 2521 | |
ea1562b3 NC |
2522 | /* Emit "lda $at, exp". */ |
2523 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2524 | newtok[0].X_add_number = AXP_REG_AT; | |
2525 | assemble_tokens ("lda", newtok, ntok, 1); | |
252b5132 | 2526 | |
ea1562b3 NC |
2527 | /* Emit "ldq_u $9, 0($at)". */ |
2528 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2529 | set_tok_const (newtok[1], 0); | |
2530 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2531 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2532 | |
ea1562b3 NC |
2533 | /* Emit "ldq_u $10, size-1($at)". */ |
2534 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2535 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2536 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2537 | |
ea1562b3 NC |
2538 | /* Emit "insXl src, $at, $t11". */ |
2539 | newtok[0] = tok[0]; | |
2540 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2541 | set_tok_reg (newtok[2], AXP_REG_T11); | |
2542 | assemble_tokens (insXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2543 | |
ea1562b3 NC |
2544 | /* Emit "insXh src, $at, $t12". */ |
2545 | set_tok_reg (newtok[2], AXP_REG_T12); | |
2546 | assemble_tokens (insXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2547 | |
ea1562b3 NC |
2548 | /* Emit "mskXl $t9, $at, $t9". */ |
2549 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2550 | newtok[2] = newtok[0]; | |
2551 | assemble_tokens (mskXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2552 | |
ea1562b3 NC |
2553 | /* Emit "mskXh $t10, $at, $t10". */ |
2554 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2555 | newtok[2] = newtok[0]; | |
2556 | assemble_tokens (mskXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2557 | |
ea1562b3 NC |
2558 | /* Emit "or $t9, $t11, $t9". */ |
2559 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2560 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2561 | newtok[2] = newtok[0]; | |
2562 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2563 | |
ea1562b3 NC |
2564 | /* Emit "or $t10, $t12, $t10". */ |
2565 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2566 | set_tok_reg (newtok[1], AXP_REG_T12); | |
2567 | newtok[2] = newtok[0]; | |
2568 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2569 | |
ea1562b3 NC |
2570 | /* Emit "stq_u $t10, size-1($at)". */ |
2571 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2572 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
af1c1010 NC |
2573 | set_tok_preg (newtok[2], AXP_REG_AT); |
2574 | assemble_tokens ("stq_u", newtok, 3, 1); | |
2575 | ||
2576 | /* Emit "stq_u $t9, 0($at)". */ | |
2577 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2578 | set_tok_const (newtok[1], 0); | |
ea1562b3 NC |
2579 | assemble_tokens ("stq_u", newtok, 3, 1); |
2580 | } | |
252b5132 | 2581 | |
ea1562b3 NC |
2582 | /* Sign extend a half-word or byte. The 32-bit sign extend is |
2583 | implemented as "addl $31, $r, $t" in the opcode table. */ | |
252b5132 | 2584 | |
ea1562b3 NC |
2585 | static void |
2586 | emit_sextX (const expressionS *tok, | |
2587 | int ntok, | |
2588 | const void * vlgsize) | |
2589 | { | |
2590 | long lgsize = (long) vlgsize; | |
252b5132 | 2591 | |
ea1562b3 NC |
2592 | if (alpha_target & AXP_OPCODE_BWX) |
2593 | assemble_tokens (sextX_op[lgsize], tok, ntok, 0); | |
2594 | else | |
2595 | { | |
2596 | int bitshift = 64 - 8 * (1 << lgsize); | |
2597 | expressionS newtok[3]; | |
252b5132 | 2598 | |
ea1562b3 NC |
2599 | /* Emit "sll src,bits,dst". */ |
2600 | newtok[0] = tok[0]; | |
2601 | set_tok_const (newtok[1], bitshift); | |
2602 | newtok[2] = tok[ntok - 1]; | |
2603 | assemble_tokens ("sll", newtok, 3, 1); | |
252b5132 | 2604 | |
ea1562b3 NC |
2605 | /* Emit "sra dst,bits,dst". */ |
2606 | newtok[0] = newtok[2]; | |
2607 | assemble_tokens ("sra", newtok, 3, 1); | |
252b5132 | 2608 | } |
ea1562b3 | 2609 | } |
252b5132 | 2610 | |
ea1562b3 | 2611 | /* Implement the division and modulus macros. */ |
252b5132 RH |
2612 | |
2613 | #ifdef OBJ_EVAX | |
252b5132 | 2614 | |
ea1562b3 NC |
2615 | /* Make register usage like in normal procedure call. |
2616 | Don't clobber PV and RA. */ | |
252b5132 | 2617 | |
ea1562b3 NC |
2618 | static void |
2619 | emit_division (const expressionS *tok, | |
2620 | int ntok, | |
2621 | const void * symname) | |
2622 | { | |
2623 | /* DIVISION and MODULUS. Yech. | |
252b5132 | 2624 | |
ea1562b3 NC |
2625 | Convert |
2626 | OP x,y,result | |
2627 | to | |
2628 | mov x,R16 # if x != R16 | |
2629 | mov y,R17 # if y != R17 | |
2630 | lda AT,__OP | |
2631 | jsr AT,(AT),0 | |
2632 | mov R0,result | |
252b5132 | 2633 | |
ea1562b3 NC |
2634 | with appropriate optimizations if R0,R16,R17 are the registers |
2635 | specified by the compiler. */ | |
252b5132 | 2636 | |
ea1562b3 NC |
2637 | int xr, yr, rr; |
2638 | symbolS *sym; | |
2639 | expressionS newtok[3]; | |
252b5132 | 2640 | |
ea1562b3 NC |
2641 | xr = regno (tok[0].X_add_number); |
2642 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2643 | |
ea1562b3 NC |
2644 | if (ntok < 3) |
2645 | rr = xr; | |
2646 | else | |
2647 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2648 | |
ea1562b3 NC |
2649 | /* Move the operands into the right place. */ |
2650 | if (yr == AXP_REG_R16 && xr == AXP_REG_R17) | |
2651 | { | |
2652 | /* They are in exactly the wrong order -- swap through AT. */ | |
2653 | if (alpha_noat_on) | |
2654 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2655 | |
ea1562b3 NC |
2656 | set_tok_reg (newtok[0], AXP_REG_R16); |
2657 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2658 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2659 | |
ea1562b3 NC |
2660 | set_tok_reg (newtok[0], AXP_REG_R17); |
2661 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2662 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2663 | |
ea1562b3 NC |
2664 | set_tok_reg (newtok[0], AXP_REG_AT); |
2665 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2666 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2667 | } |
2668 | else | |
2669 | { | |
ea1562b3 | 2670 | if (yr == AXP_REG_R16) |
252b5132 | 2671 | { |
ea1562b3 NC |
2672 | set_tok_reg (newtok[0], AXP_REG_R16); |
2673 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2674 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2675 | } |
2676 | ||
ea1562b3 | 2677 | if (xr != AXP_REG_R16) |
252b5132 | 2678 | { |
ea1562b3 NC |
2679 | set_tok_reg (newtok[0], xr); |
2680 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2681 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2682 | } |
2683 | ||
ea1562b3 | 2684 | if (yr != AXP_REG_R16 && yr != AXP_REG_R17) |
252b5132 | 2685 | { |
ea1562b3 NC |
2686 | set_tok_reg (newtok[0], yr); |
2687 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2688 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2689 | } |
252b5132 RH |
2690 | } |
2691 | ||
ea1562b3 | 2692 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2693 | |
ea1562b3 NC |
2694 | set_tok_reg (newtok[0], AXP_REG_AT); |
2695 | set_tok_sym (newtok[1], sym, 0); | |
2696 | assemble_tokens ("lda", newtok, 2, 1); | |
252b5132 | 2697 | |
ea1562b3 NC |
2698 | /* Call the division routine. */ |
2699 | set_tok_reg (newtok[0], AXP_REG_AT); | |
2700 | set_tok_cpreg (newtok[1], AXP_REG_AT); | |
2701 | set_tok_const (newtok[2], 0); | |
2702 | assemble_tokens ("jsr", newtok, 3, 1); | |
252b5132 | 2703 | |
ea1562b3 NC |
2704 | /* Move the result to the right place. */ |
2705 | if (rr != AXP_REG_R0) | |
2706 | { | |
2707 | set_tok_reg (newtok[0], AXP_REG_R0); | |
2708 | set_tok_reg (newtok[1], rr); | |
2709 | assemble_tokens ("mov", newtok, 2, 1); | |
2710 | } | |
252b5132 RH |
2711 | } |
2712 | ||
ea1562b3 | 2713 | #else /* !OBJ_EVAX */ |
252b5132 RH |
2714 | |
2715 | static void | |
ea1562b3 NC |
2716 | emit_division (const expressionS *tok, |
2717 | int ntok, | |
2718 | const void * symname) | |
252b5132 | 2719 | { |
ea1562b3 NC |
2720 | /* DIVISION and MODULUS. Yech. |
2721 | Convert | |
2722 | OP x,y,result | |
2723 | to | |
2724 | lda pv,__OP | |
2725 | mov x,t10 | |
2726 | mov y,t11 | |
2727 | jsr t9,(pv),__OP | |
2728 | mov t12,result | |
252b5132 | 2729 | |
ea1562b3 NC |
2730 | with appropriate optimizations if t10,t11,t12 are the registers |
2731 | specified by the compiler. */ | |
252b5132 | 2732 | |
ea1562b3 NC |
2733 | int xr, yr, rr; |
2734 | symbolS *sym; | |
252b5132 | 2735 | expressionS newtok[3]; |
252b5132 | 2736 | |
ea1562b3 NC |
2737 | xr = regno (tok[0].X_add_number); |
2738 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2739 | |
ea1562b3 NC |
2740 | if (ntok < 3) |
2741 | rr = xr; | |
2742 | else | |
2743 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2744 | |
ea1562b3 | 2745 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2746 | |
ea1562b3 NC |
2747 | /* Move the operands into the right place. */ |
2748 | if (yr == AXP_REG_T10 && xr == AXP_REG_T11) | |
252b5132 | 2749 | { |
ea1562b3 NC |
2750 | /* They are in exactly the wrong order -- swap through AT. */ |
2751 | if (alpha_noat_on) | |
2752 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2753 | |
ea1562b3 NC |
2754 | set_tok_reg (newtok[0], AXP_REG_T10); |
2755 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2756 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2757 | |
ea1562b3 NC |
2758 | set_tok_reg (newtok[0], AXP_REG_T11); |
2759 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2760 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2761 | |
ea1562b3 NC |
2762 | set_tok_reg (newtok[0], AXP_REG_AT); |
2763 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2764 | assemble_tokens ("mov", newtok, 2, 1); | |
2765 | } | |
2766 | else | |
2767 | { | |
2768 | if (yr == AXP_REG_T10) | |
2769 | { | |
2770 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2771 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2772 | assemble_tokens ("mov", newtok, 2, 1); | |
2773 | } | |
2774 | ||
2775 | if (xr != AXP_REG_T10) | |
2776 | { | |
2777 | set_tok_reg (newtok[0], xr); | |
2778 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2779 | assemble_tokens ("mov", newtok, 2, 1); | |
2780 | } | |
2781 | ||
2782 | if (yr != AXP_REG_T10 && yr != AXP_REG_T11) | |
2783 | { | |
2784 | set_tok_reg (newtok[0], yr); | |
2785 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2786 | assemble_tokens ("mov", newtok, 2, 1); | |
2787 | } | |
2788 | } | |
2789 | ||
2790 | /* Call the division routine. */ | |
2791 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2792 | set_tok_sym (newtok[1], sym, 0); | |
2793 | assemble_tokens ("jsr", newtok, 2, 1); | |
2794 | ||
2795 | /* Reload the GP register. */ | |
2796 | #ifdef OBJ_AOUT | |
2797 | FIXME | |
2798 | #endif | |
2799 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2800 | set_tok_reg (newtok[0], alpha_gp_register); | |
2801 | set_tok_const (newtok[1], 0); | |
2802 | set_tok_preg (newtok[2], AXP_REG_T9); | |
2803 | assemble_tokens ("ldgp", newtok, 3, 1); | |
2804 | #endif | |
2805 | ||
2806 | /* Move the result to the right place. */ | |
2807 | if (rr != AXP_REG_T12) | |
2808 | { | |
2809 | set_tok_reg (newtok[0], AXP_REG_T12); | |
2810 | set_tok_reg (newtok[1], rr); | |
2811 | assemble_tokens ("mov", newtok, 2, 1); | |
2812 | } | |
2813 | } | |
2814 | ||
2815 | #endif /* !OBJ_EVAX */ | |
2816 | ||
2817 | /* The jsr and jmp macros differ from their instruction counterparts | |
2818 | in that they can load the target address and default most | |
2819 | everything. */ | |
2820 | ||
2821 | static void | |
2822 | emit_jsrjmp (const expressionS *tok, | |
2823 | int ntok, | |
2824 | const void * vopname) | |
252b5132 | 2825 | { |
ea1562b3 | 2826 | const char *opname = (const char *) vopname; |
252b5132 | 2827 | struct alpha_insn insn; |
ea1562b3 NC |
2828 | expressionS newtok[3]; |
2829 | int r, tokidx = 0; | |
2830 | long lituse = 0; | |
252b5132 | 2831 | |
ea1562b3 NC |
2832 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2833 | r = regno (tok[tokidx++].X_add_number); | |
252b5132 | 2834 | else |
ea1562b3 | 2835 | r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA; |
252b5132 | 2836 | |
ea1562b3 | 2837 | set_tok_reg (newtok[0], r); |
252b5132 | 2838 | |
ea1562b3 NC |
2839 | if (tokidx < ntok && |
2840 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2841 | r = regno (tok[tokidx++].X_add_number); | |
2842 | #ifdef OBJ_EVAX | |
2843 | /* Keep register if jsr $n.<sym>. */ | |
2844 | #else | |
252b5132 RH |
2845 | else |
2846 | { | |
ea1562b3 | 2847 | int basereg = alpha_gp_register; |
198f1251 TG |
2848 | lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], |
2849 | &basereg, NULL, opname); | |
252b5132 | 2850 | } |
ea1562b3 | 2851 | #endif |
252b5132 | 2852 | |
ea1562b3 | 2853 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2854 | |
198f1251 | 2855 | #ifndef OBJ_EVAX |
ea1562b3 NC |
2856 | if (tokidx < ntok) |
2857 | newtok[2] = tok[tokidx]; | |
2858 | else | |
2859 | #endif | |
2860 | set_tok_const (newtok[2], 0); | |
2861 | ||
2862 | assemble_tokens_to_insn (opname, newtok, 3, &insn); | |
252b5132 RH |
2863 | |
2864 | if (lituse) | |
2865 | { | |
9c2799c2 | 2866 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 | 2867 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR; |
19f78583 | 2868 | insn.fixups[insn.nfixups].exp.X_op = O_absent; |
252b5132 | 2869 | insn.nfixups++; |
19f78583 | 2870 | insn.sequence = lituse; |
252b5132 RH |
2871 | } |
2872 | ||
198f1251 TG |
2873 | #ifdef OBJ_EVAX |
2874 | if (alpha_flag_replace | |
2875 | && r == AXP_REG_RA | |
2876 | && tok[tokidx].X_add_symbol | |
2877 | && alpha_linkage_symbol) | |
2878 | { | |
51794af8 | 2879 | /* Create a BOH reloc for 'jsr $27,NAME'. */ |
198f1251 TG |
2880 | const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol); |
2881 | int symlen = strlen (symname); | |
2882 | char *ensymname; | |
2883 | ||
51794af8 | 2884 | /* Build the entry name as 'NAME..en'. */ |
add39d23 | 2885 | ensymname = XNEWVEC (char, symlen + 5); |
198f1251 TG |
2886 | memcpy (ensymname, symname, symlen); |
2887 | memcpy (ensymname + symlen, "..en", 5); | |
2888 | ||
9c2799c2 | 2889 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
198f1251 TG |
2890 | if (insn.nfixups > 0) |
2891 | { | |
2892 | memmove (&insn.fixups[1], &insn.fixups[0], | |
2893 | sizeof(struct alpha_fixup) * insn.nfixups); | |
2894 | } | |
2895 | ||
2896 | /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP | |
2897 | case in load_expression. See B.4.5.2 of the OpenVMS | |
2898 | Linker Utility Manual. */ | |
2899 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH; | |
2900 | insn.fixups[0].exp.X_op = O_symbol; | |
2901 | insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname); | |
2902 | insn.fixups[0].exp.X_add_number = 0; | |
2903 | insn.fixups[0].xtrasym = alpha_linkage_symbol; | |
2904 | insn.fixups[0].procsym = alpha_evax_proc->symbol; | |
2905 | insn.nfixups++; | |
2906 | alpha_linkage_symbol = 0; | |
39a0d071 | 2907 | free (ensymname); |
198f1251 TG |
2908 | } |
2909 | #endif | |
2910 | ||
252b5132 RH |
2911 | emit_insn (&insn); |
2912 | } | |
2913 | ||
ea1562b3 NC |
2914 | /* The ret and jcr instructions differ from their instruction |
2915 | counterparts in that everything can be defaulted. */ | |
252b5132 RH |
2916 | |
2917 | static void | |
ea1562b3 NC |
2918 | emit_retjcr (const expressionS *tok, |
2919 | int ntok, | |
2920 | const void * vopname) | |
252b5132 | 2921 | { |
ea1562b3 NC |
2922 | const char *opname = (const char *) vopname; |
2923 | expressionS newtok[3]; | |
2924 | int r, tokidx = 0; | |
252b5132 | 2925 | |
ea1562b3 NC |
2926 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2927 | r = regno (tok[tokidx++].X_add_number); | |
2928 | else | |
2929 | r = AXP_REG_ZERO; | |
252b5132 | 2930 | |
ea1562b3 | 2931 | set_tok_reg (newtok[0], r); |
19f78583 | 2932 | |
ea1562b3 NC |
2933 | if (tokidx < ntok && |
2934 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2935 | r = regno (tok[tokidx++].X_add_number); | |
2936 | else | |
2937 | r = AXP_REG_RA; | |
19f78583 | 2938 | |
ea1562b3 | 2939 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2940 | |
ea1562b3 NC |
2941 | if (tokidx < ntok) |
2942 | newtok[2] = tok[tokidx]; | |
2943 | else | |
2944 | set_tok_const (newtok[2], strcmp (opname, "ret") == 0); | |
252b5132 | 2945 | |
ea1562b3 | 2946 | assemble_tokens (opname, newtok, 3, 0); |
252b5132 RH |
2947 | } |
2948 | ||
ea1562b3 | 2949 | /* Implement the ldgp macro. */ |
252b5132 RH |
2950 | |
2951 | static void | |
87975d2a | 2952 | emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED, |
ea1562b3 NC |
2953 | int ntok ATTRIBUTE_UNUSED, |
2954 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 2955 | { |
ea1562b3 NC |
2956 | #ifdef OBJ_AOUT |
2957 | FIXME | |
2958 | #endif | |
2959 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2960 | /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)" | |
2961 | with appropriate constants and relocations. */ | |
2962 | struct alpha_insn insn; | |
252b5132 | 2963 | expressionS newtok[3]; |
ea1562b3 | 2964 | expressionS addend; |
252b5132 | 2965 | |
ea1562b3 NC |
2966 | #ifdef OBJ_ECOFF |
2967 | if (regno (tok[2].X_add_number) == AXP_REG_PV) | |
2968 | ecoff_set_gp_prolog_size (0); | |
2969 | #endif | |
252b5132 | 2970 | |
ea1562b3 NC |
2971 | newtok[0] = tok[0]; |
2972 | set_tok_const (newtok[1], 0); | |
2973 | newtok[2] = tok[2]; | |
252b5132 | 2974 | |
ea1562b3 | 2975 | assemble_tokens_to_insn ("ldah", newtok, 3, &insn); |
252b5132 | 2976 | |
ea1562b3 | 2977 | addend = tok[1]; |
252b5132 | 2978 | |
ea1562b3 NC |
2979 | #ifdef OBJ_ECOFF |
2980 | if (addend.X_op != O_constant) | |
2981 | as_bad (_("can not resolve expression")); | |
2982 | addend.X_op = O_symbol; | |
2983 | addend.X_add_symbol = alpha_gp_symbol; | |
2984 | #endif | |
252b5132 | 2985 | |
ea1562b3 NC |
2986 | insn.nfixups = 1; |
2987 | insn.fixups[0].exp = addend; | |
2988 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2989 | insn.sequence = next_sequence_num; | |
252b5132 | 2990 | |
ea1562b3 | 2991 | emit_insn (&insn); |
252b5132 | 2992 | |
ea1562b3 | 2993 | set_tok_preg (newtok[2], tok[0].X_add_number); |
252b5132 | 2994 | |
ea1562b3 | 2995 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); |
252b5132 | 2996 | |
ea1562b3 NC |
2997 | #ifdef OBJ_ECOFF |
2998 | addend.X_add_number += 4; | |
2999 | #endif | |
252b5132 | 3000 | |
ea1562b3 NC |
3001 | insn.nfixups = 1; |
3002 | insn.fixups[0].exp = addend; | |
3003 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
3004 | insn.sequence = next_sequence_num--; | |
252b5132 | 3005 | |
ea1562b3 | 3006 | emit_insn (&insn); |
87975d2a | 3007 | #endif /* OBJ_ECOFF || OBJ_ELF */ |
252b5132 RH |
3008 | } |
3009 | ||
ea1562b3 | 3010 | /* The macro table. */ |
252b5132 | 3011 | |
ea1562b3 | 3012 | static const struct alpha_macro alpha_macros[] = |
252b5132 | 3013 | { |
ea1562b3 NC |
3014 | /* Load/Store macros. */ |
3015 | { "lda", emit_lda, NULL, | |
3016 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3017 | { "ldah", emit_ldah, NULL, | |
3018 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3019 | |
ea1562b3 NC |
3020 | { "ldl", emit_ir_load, "ldl", |
3021 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3022 | { "ldl_l", emit_ir_load, "ldl_l", | |
3023 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3024 | { "ldq", emit_ir_load, "ldq", | |
3025 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3026 | { "ldq_l", emit_ir_load, "ldq_l", | |
3027 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3028 | { "ldq_u", emit_ir_load, "ldq_u", | |
3029 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3030 | { "ldf", emit_loadstore, "ldf", | |
3031 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3032 | { "ldg", emit_loadstore, "ldg", | |
3033 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3034 | { "lds", emit_loadstore, "lds", | |
3035 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3036 | { "ldt", emit_loadstore, "ldt", | |
3037 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3038 | |
ea1562b3 NC |
3039 | { "ldb", emit_ldX, (void *) 0, |
3040 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3041 | { "ldbu", emit_ldXu, (void *) 0, | |
3042 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3043 | { "ldw", emit_ldX, (void *) 1, | |
3044 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3045 | { "ldwu", emit_ldXu, (void *) 1, | |
3046 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3047 | |
ea1562b3 NC |
3048 | { "uldw", emit_uldX, (void *) 1, |
3049 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3050 | { "uldwu", emit_uldXu, (void *) 1, | |
3051 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3052 | { "uldl", emit_uldX, (void *) 2, | |
3053 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3054 | { "uldlu", emit_uldXu, (void *) 2, | |
3055 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3056 | { "uldq", emit_uldXu, (void *) 3, | |
3057 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3058 | |
ea1562b3 NC |
3059 | { "ldgp", emit_ldgp, NULL, |
3060 | { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } }, | |
252b5132 | 3061 | |
ea1562b3 NC |
3062 | { "ldi", emit_lda, NULL, |
3063 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3064 | { "ldil", emit_ldil, NULL, | |
3065 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3066 | { "ldiq", emit_lda, NULL, | |
3067 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3068 | |
ea1562b3 NC |
3069 | { "stl", emit_loadstore, "stl", |
3070 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3071 | { "stl_c", emit_loadstore, "stl_c", | |
3072 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3073 | { "stq", emit_loadstore, "stq", | |
3074 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3075 | { "stq_c", emit_loadstore, "stq_c", | |
3076 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3077 | { "stq_u", emit_loadstore, "stq_u", | |
3078 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3079 | { "stf", emit_loadstore, "stf", | |
3080 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3081 | { "stg", emit_loadstore, "stg", | |
3082 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3083 | { "sts", emit_loadstore, "sts", | |
3084 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3085 | { "stt", emit_loadstore, "stt", | |
3086 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3087 | |
ea1562b3 NC |
3088 | { "stb", emit_stX, (void *) 0, |
3089 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3090 | { "stw", emit_stX, (void *) 1, | |
3091 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3092 | { "ustw", emit_ustX, (void *) 1, | |
3093 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3094 | { "ustl", emit_ustX, (void *) 2, | |
3095 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3096 | { "ustq", emit_ustX, (void *) 3, | |
3097 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3098 | |
ea1562b3 | 3099 | /* Arithmetic macros. */ |
19f78583 | 3100 | |
ea1562b3 NC |
3101 | { "sextb", emit_sextX, (void *) 0, |
3102 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3103 | MACRO_IR, MACRO_EOA, | |
3104 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
3105 | { "sextw", emit_sextX, (void *) 1, | |
3106 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3107 | MACRO_IR, MACRO_EOA, | |
3108 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
252b5132 | 3109 | |
ea1562b3 NC |
3110 | { "divl", emit_division, "__divl", |
3111 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3112 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3113 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3114 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3115 | { "divlu", emit_division, "__divlu", | |
3116 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3117 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3118 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3119 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3120 | { "divq", emit_division, "__divq", | |
3121 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3122 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3123 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3124 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3125 | { "divqu", emit_division, "__divqu", | |
3126 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3127 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3128 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3129 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3130 | { "reml", emit_division, "__reml", | |
3131 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3132 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3133 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3134 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3135 | { "remlu", emit_division, "__remlu", | |
3136 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3137 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3138 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3139 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3140 | { "remq", emit_division, "__remq", | |
3141 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3142 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3143 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3144 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3145 | { "remqu", emit_division, "__remqu", | |
3146 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3147 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3148 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3149 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
252b5132 | 3150 | |
ea1562b3 NC |
3151 | { "jsr", emit_jsrjmp, "jsr", |
3152 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3153 | MACRO_PIR, MACRO_EOA, | |
3154 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3155 | MACRO_EXP, MACRO_EOA } }, | |
3156 | { "jmp", emit_jsrjmp, "jmp", | |
3157 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3158 | MACRO_PIR, MACRO_EOA, | |
3159 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3160 | MACRO_EXP, MACRO_EOA } }, | |
3161 | { "ret", emit_retjcr, "ret", | |
3162 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3163 | MACRO_IR, MACRO_EOA, | |
3164 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3165 | MACRO_PIR, MACRO_EOA, | |
3166 | MACRO_EXP, MACRO_EOA, | |
3167 | MACRO_EOA } }, | |
3168 | { "jcr", emit_retjcr, "jcr", | |
3169 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3170 | MACRO_IR, MACRO_EOA, | |
3171 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3172 | MACRO_PIR, MACRO_EOA, | |
3173 | MACRO_EXP, MACRO_EOA, | |
3174 | MACRO_EOA } }, | |
3175 | { "jsr_coroutine", emit_retjcr, "jcr", | |
3176 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3177 | MACRO_IR, MACRO_EOA, | |
3178 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3179 | MACRO_PIR, MACRO_EOA, | |
3180 | MACRO_EXP, MACRO_EOA, | |
3181 | MACRO_EOA } }, | |
3182 | }; | |
252b5132 | 3183 | |
ea1562b3 NC |
3184 | static const unsigned int alpha_num_macros |
3185 | = sizeof (alpha_macros) / sizeof (*alpha_macros); | |
19f78583 | 3186 | |
ea1562b3 NC |
3187 | /* Search forward through all variants of a macro looking for a syntax |
3188 | match. */ | |
19f78583 | 3189 | |
ea1562b3 NC |
3190 | static const struct alpha_macro * |
3191 | find_macro_match (const struct alpha_macro *first_macro, | |
3192 | const expressionS *tok, | |
3193 | int *pntok) | |
252b5132 | 3194 | |
ea1562b3 NC |
3195 | { |
3196 | const struct alpha_macro *macro = first_macro; | |
3197 | int ntok = *pntok; | |
252b5132 | 3198 | |
ea1562b3 NC |
3199 | do |
3200 | { | |
3201 | const enum alpha_macro_arg *arg = macro->argsets; | |
3202 | int tokidx = 0; | |
19f78583 | 3203 | |
ea1562b3 | 3204 | while (*arg) |
19f78583 | 3205 | { |
ea1562b3 NC |
3206 | switch (*arg) |
3207 | { | |
3208 | case MACRO_EOA: | |
3209 | if (tokidx == ntok) | |
3210 | return macro; | |
3211 | else | |
3212 | tokidx = 0; | |
3213 | break; | |
252b5132 | 3214 | |
ea1562b3 NC |
3215 | /* Index register. */ |
3216 | case MACRO_IR: | |
3217 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3218 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3219 | goto match_failed; | |
3220 | ++tokidx; | |
3221 | break; | |
19f78583 | 3222 | |
ea1562b3 NC |
3223 | /* Parenthesized index register. */ |
3224 | case MACRO_PIR: | |
3225 | if (tokidx >= ntok || tok[tokidx].X_op != O_pregister | |
3226 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3227 | goto match_failed; | |
3228 | ++tokidx; | |
3229 | break; | |
19f78583 | 3230 | |
ea1562b3 NC |
3231 | /* Optional parenthesized index register. */ |
3232 | case MACRO_OPIR: | |
3233 | if (tokidx < ntok && tok[tokidx].X_op == O_pregister | |
3234 | && is_ir_num (tok[tokidx].X_add_number)) | |
3235 | ++tokidx; | |
3236 | break; | |
252b5132 | 3237 | |
ea1562b3 NC |
3238 | /* Leading comma with a parenthesized index register. */ |
3239 | case MACRO_CPIR: | |
3240 | if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister | |
3241 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3242 | goto match_failed; | |
3243 | ++tokidx; | |
3244 | break; | |
252b5132 | 3245 | |
ea1562b3 NC |
3246 | /* Floating point register. */ |
3247 | case MACRO_FPR: | |
3248 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3249 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
3250 | goto match_failed; | |
3251 | ++tokidx; | |
3252 | break; | |
252b5132 | 3253 | |
ea1562b3 NC |
3254 | /* Normal expression. */ |
3255 | case MACRO_EXP: | |
3256 | if (tokidx >= ntok) | |
3257 | goto match_failed; | |
3258 | switch (tok[tokidx].X_op) | |
3259 | { | |
3260 | case O_illegal: | |
3261 | case O_absent: | |
3262 | case O_register: | |
3263 | case O_pregister: | |
3264 | case O_cpregister: | |
3265 | case O_literal: | |
3266 | case O_lituse_base: | |
3267 | case O_lituse_bytoff: | |
3268 | case O_lituse_jsr: | |
3269 | case O_gpdisp: | |
3270 | case O_gprelhigh: | |
3271 | case O_gprellow: | |
3272 | case O_gprel: | |
3273 | case O_samegp: | |
3274 | goto match_failed; | |
252b5132 | 3275 | |
ea1562b3 NC |
3276 | default: |
3277 | break; | |
3278 | } | |
3279 | ++tokidx; | |
3280 | break; | |
19f78583 | 3281 | |
ea1562b3 NC |
3282 | match_failed: |
3283 | while (*arg != MACRO_EOA) | |
3284 | ++arg; | |
3285 | tokidx = 0; | |
3286 | break; | |
3287 | } | |
3288 | ++arg; | |
19f78583 | 3289 | } |
252b5132 | 3290 | } |
ea1562b3 NC |
3291 | while (++macro - alpha_macros < (int) alpha_num_macros |
3292 | && !strcmp (macro->name, first_macro->name)); | |
3293 | ||
3294 | return NULL; | |
252b5132 RH |
3295 | } |
3296 | ||
ea1562b3 NC |
3297 | /* Given an opcode name and a pre-tokenized set of arguments, take the |
3298 | opcode all the way through emission. */ | |
252b5132 RH |
3299 | |
3300 | static void | |
ea1562b3 NC |
3301 | assemble_tokens (const char *opname, |
3302 | const expressionS *tok, | |
3303 | int ntok, | |
3304 | int local_macros_on) | |
252b5132 | 3305 | { |
ea1562b3 NC |
3306 | int found_something = 0; |
3307 | const struct alpha_opcode *opcode; | |
3308 | const struct alpha_macro *macro; | |
3309 | int cpumatch = 1; | |
21d799b5 | 3310 | extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; |
252b5132 | 3311 | |
ea1562b3 NC |
3312 | #ifdef RELOC_OP_P |
3313 | /* If a user-specified relocation is present, this is not a macro. */ | |
3314 | if (ntok && USER_RELOC_P (tok[ntok - 1].X_op)) | |
3315 | { | |
3316 | reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc; | |
3317 | ntok--; | |
3318 | } | |
3319 | else | |
3320 | #endif | |
3321 | if (local_macros_on) | |
3322 | { | |
3323 | macro = ((const struct alpha_macro *) | |
3324 | hash_find (alpha_macro_hash, opname)); | |
3325 | if (macro) | |
3326 | { | |
3327 | found_something = 1; | |
3328 | macro = find_macro_match (macro, tok, &ntok); | |
3329 | if (macro) | |
3330 | { | |
3331 | (*macro->emit) (tok, ntok, macro->arg); | |
3332 | return; | |
3333 | } | |
3334 | } | |
3335 | } | |
252b5132 | 3336 | |
ea1562b3 NC |
3337 | /* Search opcodes. */ |
3338 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
3339 | if (opcode) | |
3340 | { | |
3341 | found_something = 1; | |
3342 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
3343 | if (opcode) | |
3344 | { | |
3345 | struct alpha_insn insn; | |
3346 | assemble_insn (opcode, tok, ntok, &insn, reloc); | |
252b5132 | 3347 | |
ea1562b3 NC |
3348 | /* Copy the sequence number for the reloc from the reloc token. */ |
3349 | if (reloc != BFD_RELOC_UNUSED) | |
3350 | insn.sequence = tok[ntok].X_add_number; | |
252b5132 | 3351 | |
ea1562b3 NC |
3352 | emit_insn (&insn); |
3353 | return; | |
3354 | } | |
3355 | } | |
252b5132 | 3356 | |
ea1562b3 NC |
3357 | if (found_something) |
3358 | { | |
3359 | if (cpumatch) | |
3360 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
3361 | else | |
3362 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
3363 | alpha_target_name); | |
3364 | } | |
3365 | else | |
3366 | as_bad (_("unknown opcode `%s'"), opname); | |
3367 | } | |
3368 | \f | |
3369 | #ifdef OBJ_EVAX | |
252b5132 | 3370 | |
576d3307 | 3371 | /* Add sym+addend to link pool. |
33eaf5de | 3372 | Return offset from current procedure value (pv) to entry in link pool. |
252b5132 | 3373 | |
ea1562b3 | 3374 | Add new fixup only if offset isn't 16bit. */ |
252b5132 | 3375 | |
198f1251 | 3376 | static symbolS * |
8aacb050 | 3377 | add_to_link_pool (symbolS *sym, offsetT addend) |
ea1562b3 | 3378 | { |
8aacb050 | 3379 | symbolS *basesym; |
ea1562b3 NC |
3380 | segT current_section = now_seg; |
3381 | int current_subsec = now_subseg; | |
ea1562b3 NC |
3382 | char *p; |
3383 | segment_info_type *seginfo = seg_info (alpha_link_section); | |
3384 | fixS *fixp; | |
198f1251 TG |
3385 | symbolS *linksym, *expsym; |
3386 | expressionS e; | |
3739860c | 3387 | |
8aacb050 TG |
3388 | basesym = alpha_evax_proc->symbol; |
3389 | ||
ea1562b3 NC |
3390 | /* @@ This assumes all entries in a given section will be of the same |
3391 | size... Probably correct, but unwise to rely on. */ | |
3392 | /* This must always be called with the same subsegment. */ | |
252b5132 | 3393 | |
ea1562b3 NC |
3394 | if (seginfo->frchainP) |
3395 | for (fixp = seginfo->frchainP->fix_root; | |
3396 | fixp != (fixS *) NULL; | |
198f1251 | 3397 | fixp = fixp->fx_next) |
ea1562b3 | 3398 | { |
198f1251 TG |
3399 | if (fixp->fx_addsy == sym |
3400 | && fixp->fx_offset == (valueT)addend | |
3401 | && fixp->tc_fix_data.info | |
3402 | && fixp->tc_fix_data.info->sym | |
3403 | && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym) | |
3404 | return fixp->tc_fix_data.info->sym; | |
ea1562b3 | 3405 | } |
252b5132 | 3406 | |
8aacb050 | 3407 | /* Not found, add a new entry. */ |
ea1562b3 | 3408 | subseg_set (alpha_link_section, 0); |
198f1251 TG |
3409 | linksym = symbol_new |
3410 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
ea1562b3 NC |
3411 | p = frag_more (8); |
3412 | memset (p, 0, 8); | |
252b5132 | 3413 | |
0189c2eb | 3414 | /* Create a symbol for 'basesym - linksym' (offset of the added entry). */ |
198f1251 TG |
3415 | e.X_op = O_subtract; |
3416 | e.X_add_symbol = linksym; | |
3417 | e.X_op_symbol = basesym; | |
3418 | e.X_add_number = 0; | |
3419 | expsym = make_expr_symbol (&e); | |
3420 | ||
0189c2eb | 3421 | /* Create a fixup for the entry. */ |
198f1251 | 3422 | fixp = fix_new |
576d3307 | 3423 | (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64); |
198f1251 TG |
3424 | fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--); |
3425 | fixp->tc_fix_data.info->sym = expsym; | |
252b5132 | 3426 | |
ea1562b3 | 3427 | subseg_set (current_section, current_subsec); |
0189c2eb TG |
3428 | |
3429 | /* Return the symbol. */ | |
198f1251 | 3430 | return expsym; |
ea1562b3 | 3431 | } |
ea1562b3 NC |
3432 | #endif /* OBJ_EVAX */ |
3433 | \f | |
3434 | /* Assembler directives. */ | |
252b5132 | 3435 | |
ea1562b3 NC |
3436 | /* Handle the .text pseudo-op. This is like the usual one, but it |
3437 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3438 | |
ea1562b3 NC |
3439 | static void |
3440 | s_alpha_text (int i) | |
ea1562b3 NC |
3441 | { |
3442 | #ifdef OBJ_ELF | |
3443 | obj_elf_text (i); | |
3444 | #else | |
3445 | s_text (i); | |
198f1251 TG |
3446 | #endif |
3447 | #ifdef OBJ_EVAX | |
3448 | { | |
3449 | symbolS * symbolP; | |
3450 | ||
3451 | symbolP = symbol_find (".text"); | |
3452 | if (symbolP == NULL) | |
3453 | { | |
3454 | symbolP = symbol_make (".text"); | |
3455 | S_SET_SEGMENT (symbolP, text_section); | |
3456 | symbol_table_insert (symbolP); | |
3457 | } | |
3458 | } | |
ea1562b3 NC |
3459 | #endif |
3460 | alpha_insn_label = NULL; | |
3461 | alpha_auto_align_on = 1; | |
3462 | alpha_current_align = 0; | |
252b5132 RH |
3463 | } |
3464 | ||
ea1562b3 NC |
3465 | /* Handle the .data pseudo-op. This is like the usual one, but it |
3466 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3467 | |
3468 | static void | |
ea1562b3 | 3469 | s_alpha_data (int i) |
252b5132 | 3470 | { |
ea1562b3 NC |
3471 | #ifdef OBJ_ELF |
3472 | obj_elf_data (i); | |
3473 | #else | |
3474 | s_data (i); | |
3475 | #endif | |
3476 | alpha_insn_label = NULL; | |
3477 | alpha_auto_align_on = 1; | |
3478 | alpha_current_align = 0; | |
252b5132 RH |
3479 | } |
3480 | ||
ea1562b3 | 3481 | #if defined (OBJ_ECOFF) || defined (OBJ_EVAX) |
252b5132 | 3482 | |
198f1251 | 3483 | /* Handle the OSF/1 and openVMS .comm pseudo quirks. */ |
252b5132 RH |
3484 | |
3485 | static void | |
ea1562b3 | 3486 | s_alpha_comm (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3487 | { |
ea1562b3 NC |
3488 | char *name; |
3489 | char c; | |
3490 | char *p; | |
d9319cec | 3491 | offsetT size; |
ea1562b3 | 3492 | symbolS *symbolP; |
d9319cec NC |
3493 | #ifdef OBJ_EVAX |
3494 | offsetT temp; | |
198f1251 | 3495 | int log_align = 0; |
d9319cec | 3496 | #endif |
252b5132 | 3497 | |
d02603dc | 3498 | c = get_symbol_name (&name); |
252b5132 | 3499 | |
ea1562b3 NC |
3500 | /* Just after name is now '\0'. */ |
3501 | p = input_line_pointer; | |
3502 | *p = c; | |
252b5132 | 3503 | |
d02603dc | 3504 | SKIP_WHITESPACE_AFTER_NAME (); |
252b5132 | 3505 | |
ea1562b3 NC |
3506 | /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */ |
3507 | if (*input_line_pointer == ',') | |
252b5132 | 3508 | { |
ea1562b3 NC |
3509 | input_line_pointer++; |
3510 | SKIP_WHITESPACE (); | |
3511 | } | |
198f1251 | 3512 | if ((size = get_absolute_expression ()) < 0) |
ea1562b3 | 3513 | { |
198f1251 | 3514 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); |
ea1562b3 NC |
3515 | ignore_rest_of_line (); |
3516 | return; | |
3517 | } | |
252b5132 | 3518 | |
ea1562b3 NC |
3519 | *p = 0; |
3520 | symbolP = symbol_find_or_make (name); | |
ea1562b3 | 3521 | *p = c; |
252b5132 | 3522 | |
ea1562b3 NC |
3523 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) |
3524 | { | |
3525 | as_bad (_("Ignoring attempt to re-define symbol")); | |
3526 | ignore_rest_of_line (); | |
3527 | return; | |
3528 | } | |
3529 | ||
3530 | #ifdef OBJ_EVAX | |
198f1251 TG |
3531 | if (*input_line_pointer != ',') |
3532 | temp = 8; /* Default alignment. */ | |
3533 | else | |
ea1562b3 | 3534 | { |
198f1251 TG |
3535 | input_line_pointer++; |
3536 | SKIP_WHITESPACE (); | |
3537 | temp = get_absolute_expression (); | |
ea1562b3 | 3538 | } |
198f1251 TG |
3539 | |
3540 | /* ??? Unlike on OSF/1, the alignment factor is not in log units. */ | |
3541 | while ((temp >>= 1) != 0) | |
3542 | ++log_align; | |
3543 | ||
3544 | if (*input_line_pointer == ',') | |
ea1562b3 | 3545 | { |
198f1251 TG |
3546 | /* Extended form of the directive |
3547 | ||
3548 | .comm symbol, size, alignment, section | |
3549 | ||
3550 | where the "common" semantics is transferred to the section. | |
3551 | The symbol is effectively an alias for the section name. */ | |
3552 | ||
3553 | segT sec; | |
6d4af3c2 | 3554 | const char *sec_name; |
198f1251 TG |
3555 | symbolS *sec_symbol; |
3556 | segT current_seg = now_seg; | |
3557 | subsegT current_subseg = now_subseg; | |
3558 | int cur_size; | |
3739860c | 3559 | |
198f1251 TG |
3560 | input_line_pointer++; |
3561 | SKIP_WHITESPACE (); | |
3562 | sec_name = s_alpha_section_name (); | |
3563 | sec_symbol = symbol_find_or_make (sec_name); | |
3564 | sec = subseg_new (sec_name, 0); | |
3565 | S_SET_SEGMENT (sec_symbol, sec); | |
3566 | symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
3567 | bfd_vms_set_section_flags (stdoutput, sec, 0, |
3568 | EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD); | |
198f1251 TG |
3569 | record_alignment (sec, log_align); |
3570 | ||
3571 | /* Reuse stab_string_size to store the size of the section. */ | |
3572 | cur_size = seg_info (sec)->stabu.stab_string_size; | |
3573 | if ((int) size > cur_size) | |
3574 | { | |
3575 | char *pfrag | |
3576 | = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, | |
3577 | (valueT)size - (valueT)cur_size, NULL); | |
3578 | *pfrag = 0; | |
3579 | seg_info (sec)->stabu.stab_string_size = (int)size; | |
3580 | } | |
3581 | ||
3582 | S_SET_SEGMENT (symbolP, sec); | |
3583 | ||
3584 | subseg_set (current_seg, current_subseg); | |
3585 | } | |
3586 | else | |
3587 | { | |
3588 | /* Regular form of the directive | |
3589 | ||
3590 | .comm symbol, size, alignment | |
3591 | ||
3592 | where the "common" semantics in on the symbol. | |
3593 | These symbols are assembled in the .bss section. */ | |
3594 | ||
3595 | char *pfrag; | |
3596 | segT current_seg = now_seg; | |
3597 | subsegT current_subseg = now_subseg; | |
3598 | ||
3599 | subseg_set (bss_section, 1); | |
3600 | frag_align (log_align, 0, 0); | |
3601 | record_alignment (bss_section, log_align); | |
3602 | ||
f8e24652 | 3603 | symbol_set_frag (symbolP, frag_now); |
198f1251 TG |
3604 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
3605 | size, NULL); | |
3606 | *pfrag = 0; | |
3607 | ||
3608 | S_SET_SEGMENT (symbolP, bss_section); | |
3609 | ||
3610 | subseg_set (current_seg, current_subseg); | |
252b5132 | 3611 | } |
ea1562b3 | 3612 | #endif |
3739860c | 3613 | |
198f1251 TG |
3614 | if (S_GET_VALUE (symbolP)) |
3615 | { | |
3616 | if (S_GET_VALUE (symbolP) != (valueT) size) | |
20203fb9 | 3617 | as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), |
198f1251 TG |
3618 | S_GET_NAME (symbolP), |
3619 | (long) S_GET_VALUE (symbolP), | |
3620 | (long) size); | |
3621 | } | |
252b5132 RH |
3622 | else |
3623 | { | |
198f1251 TG |
3624 | #ifndef OBJ_EVAX |
3625 | S_SET_VALUE (symbolP, (valueT) size); | |
ea1562b3 NC |
3626 | #endif |
3627 | S_SET_EXTERNAL (symbolP); | |
3628 | } | |
3739860c | 3629 | |
198f1251 TG |
3630 | #ifndef OBJ_EVAX |
3631 | know (symbolP->sy_frag == &zero_address_frag); | |
ea1562b3 | 3632 | #endif |
ea1562b3 NC |
3633 | demand_empty_rest_of_line (); |
3634 | } | |
252b5132 | 3635 | |
ea1562b3 | 3636 | #endif /* ! OBJ_ELF */ |
252b5132 | 3637 | |
ea1562b3 | 3638 | #ifdef OBJ_ECOFF |
252b5132 | 3639 | |
ea1562b3 NC |
3640 | /* Handle the .rdata pseudo-op. This is like the usual one, but it |
3641 | clears alpha_insn_label and restores auto alignment. */ | |
3642 | ||
3643 | static void | |
3644 | s_alpha_rdata (int ignore ATTRIBUTE_UNUSED) | |
3645 | { | |
87975d2a | 3646 | get_absolute_expression (); |
ea1562b3 NC |
3647 | subseg_new (".rdata", 0); |
3648 | demand_empty_rest_of_line (); | |
3649 | alpha_insn_label = NULL; | |
3650 | alpha_auto_align_on = 1; | |
3651 | alpha_current_align = 0; | |
252b5132 RH |
3652 | } |
3653 | ||
ea1562b3 NC |
3654 | #endif |
3655 | ||
3656 | #ifdef OBJ_ECOFF | |
3657 | ||
3658 | /* Handle the .sdata pseudo-op. This is like the usual one, but it | |
3659 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3660 | |
3661 | static void | |
ea1562b3 | 3662 | s_alpha_sdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3663 | { |
87975d2a | 3664 | get_absolute_expression (); |
ea1562b3 NC |
3665 | subseg_new (".sdata", 0); |
3666 | demand_empty_rest_of_line (); | |
3667 | alpha_insn_label = NULL; | |
3668 | alpha_auto_align_on = 1; | |
3669 | alpha_current_align = 0; | |
3670 | } | |
3671 | #endif | |
252b5132 | 3672 | |
ea1562b3 NC |
3673 | #ifdef OBJ_ELF |
3674 | struct alpha_elf_frame_data | |
3675 | { | |
3676 | symbolS *func_sym; | |
3677 | symbolS *func_end_sym; | |
3678 | symbolS *prologue_sym; | |
3679 | unsigned int mask; | |
3680 | unsigned int fmask; | |
3681 | int fp_regno; | |
3682 | int ra_regno; | |
3683 | offsetT frame_size; | |
3684 | offsetT mask_offset; | |
3685 | offsetT fmask_offset; | |
252b5132 | 3686 | |
ea1562b3 NC |
3687 | struct alpha_elf_frame_data *next; |
3688 | }; | |
252b5132 | 3689 | |
ea1562b3 NC |
3690 | static struct alpha_elf_frame_data *all_frame_data; |
3691 | static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data; | |
3692 | static struct alpha_elf_frame_data *cur_frame_data; | |
252b5132 | 3693 | |
2f0c68f2 CM |
3694 | extern int all_cfi_sections; |
3695 | ||
ea1562b3 NC |
3696 | /* Handle the .section pseudo-op. This is like the usual one, but it |
3697 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3698 | |
ea1562b3 NC |
3699 | static void |
3700 | s_alpha_section (int ignore ATTRIBUTE_UNUSED) | |
3701 | { | |
3702 | obj_elf_section (ignore); | |
252b5132 | 3703 | |
ea1562b3 NC |
3704 | alpha_insn_label = NULL; |
3705 | alpha_auto_align_on = 1; | |
3706 | alpha_current_align = 0; | |
3707 | } | |
252b5132 | 3708 | |
ea1562b3 NC |
3709 | static void |
3710 | s_alpha_ent (int dummy ATTRIBUTE_UNUSED) | |
3711 | { | |
3712 | if (ECOFF_DEBUGGING) | |
3713 | ecoff_directive_ent (0); | |
252b5132 RH |
3714 | else |
3715 | { | |
ea1562b3 | 3716 | char *name, name_end; |
d02603dc NC |
3717 | |
3718 | name_end = get_symbol_name (&name); | |
2f0c68f2 CM |
3719 | /* CFI_EMIT_eh_frame is the default. */ |
3720 | all_cfi_sections = CFI_EMIT_eh_frame; | |
252b5132 | 3721 | |
ea1562b3 | 3722 | if (! is_name_beginner (*name)) |
252b5132 | 3723 | { |
ea1562b3 | 3724 | as_warn (_(".ent directive has no name")); |
d02603dc | 3725 | (void) restore_line_pointer (name_end); |
252b5132 | 3726 | } |
ea1562b3 | 3727 | else |
252b5132 | 3728 | { |
ea1562b3 | 3729 | symbolS *sym; |
252b5132 | 3730 | |
ea1562b3 NC |
3731 | if (cur_frame_data) |
3732 | as_warn (_("nested .ent directives")); | |
252b5132 | 3733 | |
ea1562b3 NC |
3734 | sym = symbol_find_or_make (name); |
3735 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
252b5132 | 3736 | |
add39d23 | 3737 | cur_frame_data = XCNEW (struct alpha_elf_frame_data); |
ea1562b3 | 3738 | cur_frame_data->func_sym = sym; |
252b5132 | 3739 | |
ea1562b3 NC |
3740 | /* Provide sensible defaults. */ |
3741 | cur_frame_data->fp_regno = 30; /* sp */ | |
3742 | cur_frame_data->ra_regno = 26; /* ra */ | |
252b5132 | 3743 | |
ea1562b3 NC |
3744 | *plast_frame_data = cur_frame_data; |
3745 | plast_frame_data = &cur_frame_data->next; | |
3746 | ||
3747 | /* The .ent directive is sometimes followed by a number. Not sure | |
3748 | what it really means, but ignore it. */ | |
3749 | *input_line_pointer = name_end; | |
d02603dc | 3750 | SKIP_WHITESPACE_AFTER_NAME (); |
ea1562b3 NC |
3751 | if (*input_line_pointer == ',') |
3752 | { | |
3753 | input_line_pointer++; | |
3754 | SKIP_WHITESPACE (); | |
3755 | } | |
3756 | if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') | |
3757 | (void) get_absolute_expression (); | |
3758 | } | |
3759 | demand_empty_rest_of_line (); | |
3760 | } | |
3761 | } | |
252b5132 RH |
3762 | |
3763 | static void | |
ea1562b3 | 3764 | s_alpha_end (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3765 | { |
ea1562b3 NC |
3766 | if (ECOFF_DEBUGGING) |
3767 | ecoff_directive_end (0); | |
252b5132 | 3768 | else |
ea1562b3 NC |
3769 | { |
3770 | char *name, name_end; | |
d02603dc NC |
3771 | |
3772 | name_end = get_symbol_name (&name); | |
252b5132 | 3773 | |
ea1562b3 NC |
3774 | if (! is_name_beginner (*name)) |
3775 | { | |
3776 | as_warn (_(".end directive has no name")); | |
ea1562b3 NC |
3777 | } |
3778 | else | |
3779 | { | |
3780 | symbolS *sym; | |
252b5132 | 3781 | |
ea1562b3 NC |
3782 | sym = symbol_find (name); |
3783 | if (!cur_frame_data) | |
3784 | as_warn (_(".end directive without matching .ent")); | |
3785 | else if (sym != cur_frame_data->func_sym) | |
3786 | as_warn (_(".end directive names different symbol than .ent")); | |
252b5132 | 3787 | |
ea1562b3 NC |
3788 | /* Create an expression to calculate the size of the function. */ |
3789 | if (sym && cur_frame_data) | |
3790 | { | |
3791 | OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym); | |
add39d23 | 3792 | expressionS *exp = XNEW (expressionS); |
252b5132 | 3793 | |
ea1562b3 NC |
3794 | obj->size = exp; |
3795 | exp->X_op = O_subtract; | |
3796 | exp->X_add_symbol = symbol_temp_new_now (); | |
3797 | exp->X_op_symbol = sym; | |
3798 | exp->X_add_number = 0; | |
252b5132 | 3799 | |
ea1562b3 NC |
3800 | cur_frame_data->func_end_sym = exp->X_add_symbol; |
3801 | } | |
252b5132 | 3802 | |
ea1562b3 | 3803 | cur_frame_data = NULL; |
ea1562b3 | 3804 | } |
d02603dc NC |
3805 | |
3806 | (void) restore_line_pointer (name_end); | |
ea1562b3 NC |
3807 | demand_empty_rest_of_line (); |
3808 | } | |
252b5132 RH |
3809 | } |
3810 | ||
252b5132 | 3811 | static void |
ea1562b3 | 3812 | s_alpha_mask (int fp) |
252b5132 | 3813 | { |
ea1562b3 NC |
3814 | if (ECOFF_DEBUGGING) |
3815 | { | |
3816 | if (fp) | |
3817 | ecoff_directive_fmask (0); | |
3818 | else | |
3819 | ecoff_directive_mask (0); | |
3820 | } | |
252b5132 | 3821 | else |
ea1562b3 NC |
3822 | { |
3823 | long val; | |
3824 | offsetT offset; | |
252b5132 | 3825 | |
ea1562b3 NC |
3826 | if (!cur_frame_data) |
3827 | { | |
3828 | if (fp) | |
3829 | as_warn (_(".fmask outside of .ent")); | |
3830 | else | |
3831 | as_warn (_(".mask outside of .ent")); | |
3832 | discard_rest_of_line (); | |
3833 | return; | |
3834 | } | |
252b5132 | 3835 | |
ea1562b3 NC |
3836 | if (get_absolute_expression_and_terminator (&val) != ',') |
3837 | { | |
3838 | if (fp) | |
3839 | as_warn (_("bad .fmask directive")); | |
3840 | else | |
3841 | as_warn (_("bad .mask directive")); | |
3842 | --input_line_pointer; | |
3843 | discard_rest_of_line (); | |
3844 | return; | |
3845 | } | |
252b5132 | 3846 | |
ea1562b3 NC |
3847 | offset = get_absolute_expression (); |
3848 | demand_empty_rest_of_line (); | |
252b5132 | 3849 | |
ea1562b3 NC |
3850 | if (fp) |
3851 | { | |
3852 | cur_frame_data->fmask = val; | |
3853 | cur_frame_data->fmask_offset = offset; | |
3854 | } | |
3855 | else | |
3856 | { | |
3857 | cur_frame_data->mask = val; | |
3858 | cur_frame_data->mask_offset = offset; | |
3859 | } | |
3860 | } | |
252b5132 | 3861 | } |
252b5132 RH |
3862 | |
3863 | static void | |
ea1562b3 | 3864 | s_alpha_frame (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3865 | { |
ea1562b3 NC |
3866 | if (ECOFF_DEBUGGING) |
3867 | ecoff_directive_frame (0); | |
3868 | else | |
3869 | { | |
3870 | long val; | |
252b5132 | 3871 | |
ea1562b3 NC |
3872 | if (!cur_frame_data) |
3873 | { | |
3874 | as_warn (_(".frame outside of .ent")); | |
3875 | discard_rest_of_line (); | |
3876 | return; | |
3877 | } | |
252b5132 | 3878 | |
ea1562b3 | 3879 | cur_frame_data->fp_regno = tc_get_register (1); |
252b5132 | 3880 | |
ea1562b3 NC |
3881 | SKIP_WHITESPACE (); |
3882 | if (*input_line_pointer++ != ',' | |
3883 | || get_absolute_expression_and_terminator (&val) != ',') | |
3884 | { | |
3885 | as_warn (_("bad .frame directive")); | |
3886 | --input_line_pointer; | |
3887 | discard_rest_of_line (); | |
3888 | return; | |
3889 | } | |
3890 | cur_frame_data->frame_size = val; | |
252b5132 | 3891 | |
ea1562b3 NC |
3892 | cur_frame_data->ra_regno = tc_get_register (0); |
3893 | ||
3894 | /* Next comes the "offset of saved $a0 from $sp". In gcc terms | |
3895 | this is current_function_pretend_args_size. There's no place | |
3896 | to put this value, so ignore it. */ | |
3897 | s_ignore (42); | |
3898 | } | |
3899 | } | |
252b5132 RH |
3900 | |
3901 | static void | |
ea1562b3 | 3902 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3903 | { |
ea1562b3 NC |
3904 | symbolS *sym; |
3905 | int arg; | |
252b5132 | 3906 | |
ea1562b3 NC |
3907 | arg = get_absolute_expression (); |
3908 | demand_empty_rest_of_line (); | |
198f1251 TG |
3909 | alpha_prologue_label = symbol_new |
3910 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
252b5132 | 3911 | |
ea1562b3 NC |
3912 | if (ECOFF_DEBUGGING) |
3913 | sym = ecoff_get_cur_proc_sym (); | |
3914 | else | |
3915 | sym = cur_frame_data ? cur_frame_data->func_sym : NULL; | |
252b5132 | 3916 | |
ea1562b3 | 3917 | if (sym == NULL) |
252b5132 | 3918 | { |
ea1562b3 | 3919 | as_bad (_(".prologue directive without a preceding .ent directive")); |
252b5132 RH |
3920 | return; |
3921 | } | |
3922 | ||
ea1562b3 | 3923 | switch (arg) |
252b5132 | 3924 | { |
ea1562b3 NC |
3925 | case 0: /* No PV required. */ |
3926 | S_SET_OTHER (sym, STO_ALPHA_NOPV | |
3927 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3928 | break; | |
3929 | case 1: /* Std GP load. */ | |
3930 | S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD | |
3931 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3932 | break; | |
3933 | case 2: /* Non-std use of PV. */ | |
3934 | break; | |
252b5132 | 3935 | |
ea1562b3 NC |
3936 | default: |
3937 | as_bad (_("Invalid argument %d to .prologue."), arg); | |
3938 | break; | |
252b5132 RH |
3939 | } |
3940 | ||
ea1562b3 NC |
3941 | if (cur_frame_data) |
3942 | cur_frame_data->prologue_sym = symbol_temp_new_now (); | |
252b5132 RH |
3943 | } |
3944 | ||
ea1562b3 | 3945 | static char *first_file_directive; |
252b5132 RH |
3946 | |
3947 | static void | |
ea1562b3 | 3948 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3949 | { |
ea1562b3 NC |
3950 | /* Save the first .file directive we see, so that we can change our |
3951 | minds about whether ecoff debugging should or shouldn't be enabled. */ | |
3952 | if (alpha_flag_mdebug < 0 && ! first_file_directive) | |
3953 | { | |
3954 | char *start = input_line_pointer; | |
3955 | size_t len; | |
252b5132 | 3956 | |
ea1562b3 | 3957 | discard_rest_of_line (); |
252b5132 | 3958 | |
ea1562b3 | 3959 | len = input_line_pointer - start; |
29a2809e | 3960 | first_file_directive = xmemdup0 (start, len); |
252b5132 | 3961 | |
ea1562b3 NC |
3962 | input_line_pointer = start; |
3963 | } | |
252b5132 | 3964 | |
ea1562b3 NC |
3965 | if (ECOFF_DEBUGGING) |
3966 | ecoff_directive_file (0); | |
3967 | else | |
3968 | dwarf2_directive_file (0); | |
3969 | } | |
252b5132 RH |
3970 | |
3971 | static void | |
ea1562b3 | 3972 | s_alpha_loc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3973 | { |
ea1562b3 NC |
3974 | if (ECOFF_DEBUGGING) |
3975 | ecoff_directive_loc (0); | |
3976 | else | |
3977 | dwarf2_directive_loc (0); | |
252b5132 | 3978 | } |
252b5132 | 3979 | |
ea1562b3 NC |
3980 | static void |
3981 | s_alpha_stab (int n) | |
f37f01cf | 3982 | { |
ea1562b3 NC |
3983 | /* If we've been undecided about mdebug, make up our minds in favour. */ |
3984 | if (alpha_flag_mdebug < 0) | |
3985 | { | |
3986 | segT sec = subseg_new (".mdebug", 0); | |
3987 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
3988 | bfd_set_section_alignment (stdoutput, sec, 3); | |
f37f01cf | 3989 | |
ea1562b3 | 3990 | ecoff_read_begin_hook (); |
f37f01cf | 3991 | |
ea1562b3 NC |
3992 | if (first_file_directive) |
3993 | { | |
3994 | char *save_ilp = input_line_pointer; | |
3995 | input_line_pointer = first_file_directive; | |
3996 | ecoff_directive_file (0); | |
3997 | input_line_pointer = save_ilp; | |
3998 | free (first_file_directive); | |
3999 | } | |
252b5132 | 4000 | |
ea1562b3 NC |
4001 | alpha_flag_mdebug = 1; |
4002 | } | |
4003 | s_stab (n); | |
4004 | } | |
252b5132 RH |
4005 | |
4006 | static void | |
ea1562b3 | 4007 | s_alpha_coff_wrapper (int which) |
252b5132 | 4008 | { |
5a49b8ac | 4009 | static void (* const fns[]) (int) = { |
ea1562b3 NC |
4010 | ecoff_directive_begin, |
4011 | ecoff_directive_bend, | |
4012 | ecoff_directive_def, | |
4013 | ecoff_directive_dim, | |
4014 | ecoff_directive_endef, | |
4015 | ecoff_directive_scl, | |
4016 | ecoff_directive_tag, | |
4017 | ecoff_directive_val, | |
4018 | }; | |
252b5132 | 4019 | |
9c2799c2 | 4020 | gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); |
252b5132 | 4021 | |
252b5132 | 4022 | if (ECOFF_DEBUGGING) |
ea1562b3 | 4023 | (*fns[which]) (0); |
252b5132 RH |
4024 | else |
4025 | { | |
ea1562b3 NC |
4026 | as_bad (_("ECOFF debugging is disabled.")); |
4027 | ignore_rest_of_line (); | |
4028 | } | |
4029 | } | |
252b5132 | 4030 | |
ea1562b3 NC |
4031 | /* Called at the end of assembly. Here we emit unwind info for frames |
4032 | unless the compiler has done it for us. */ | |
252b5132 | 4033 | |
ea1562b3 NC |
4034 | void |
4035 | alpha_elf_md_end (void) | |
4036 | { | |
4037 | struct alpha_elf_frame_data *p; | |
f37f01cf | 4038 | |
ea1562b3 NC |
4039 | if (cur_frame_data) |
4040 | as_warn (_(".ent directive without matching .end")); | |
f37f01cf | 4041 | |
ea1562b3 NC |
4042 | /* If someone has generated the unwind info themselves, great. */ |
4043 | if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL) | |
4044 | return; | |
f37f01cf | 4045 | |
af385746 RH |
4046 | /* ??? In theory we could look for functions for which we have |
4047 | generated unwind info via CFI directives, and those we have not. | |
4048 | Those we have not could still get their unwind info from here. | |
4049 | For now, do nothing if we've seen any CFI directives. Note that | |
4050 | the above test will not trigger, as we've not emitted data yet. */ | |
4051 | if (all_fde_data != NULL) | |
4052 | return; | |
4053 | ||
ea1562b3 NC |
4054 | /* Generate .eh_frame data for the unwind directives specified. */ |
4055 | for (p = all_frame_data; p ; p = p->next) | |
4056 | if (p->prologue_sym) | |
4057 | { | |
4058 | /* Create a temporary symbol at the same location as our | |
4059 | function symbol. This prevents problems with globals. */ | |
4060 | cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym), | |
4061 | S_GET_VALUE (p->func_sym), | |
4062 | symbol_get_frag (p->func_sym))); | |
252b5132 | 4063 | |
2f0c68f2 | 4064 | cfi_set_sections (); |
ea1562b3 NC |
4065 | cfi_set_return_column (p->ra_regno); |
4066 | cfi_add_CFA_def_cfa_register (30); | |
4067 | if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size) | |
4068 | { | |
4069 | unsigned int mask; | |
4070 | offsetT offset; | |
252b5132 | 4071 | |
ea1562b3 | 4072 | cfi_add_advance_loc (p->prologue_sym); |
252b5132 | 4073 | |
ea1562b3 NC |
4074 | if (p->fp_regno != 30) |
4075 | if (p->frame_size != 0) | |
4076 | cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size); | |
4077 | else | |
4078 | cfi_add_CFA_def_cfa_register (p->fp_regno); | |
4079 | else if (p->frame_size != 0) | |
4080 | cfi_add_CFA_def_cfa_offset (p->frame_size); | |
252b5132 | 4081 | |
ea1562b3 NC |
4082 | mask = p->mask; |
4083 | offset = p->mask_offset; | |
252b5132 | 4084 | |
ea1562b3 NC |
4085 | /* Recall that $26 is special-cased and stored first. */ |
4086 | if ((mask >> 26) & 1) | |
4087 | { | |
4088 | cfi_add_CFA_offset (26, offset); | |
4089 | offset += 8; | |
4090 | mask &= ~(1 << 26); | |
4091 | } | |
4092 | while (mask) | |
4093 | { | |
4094 | unsigned int i; | |
4095 | i = mask & -mask; | |
4096 | mask ^= i; | |
4097 | i = ffs (i) - 1; | |
f37f01cf | 4098 | |
ea1562b3 NC |
4099 | cfi_add_CFA_offset (i, offset); |
4100 | offset += 8; | |
4101 | } | |
f37f01cf | 4102 | |
ea1562b3 NC |
4103 | mask = p->fmask; |
4104 | offset = p->fmask_offset; | |
4105 | while (mask) | |
4106 | { | |
4107 | unsigned int i; | |
4108 | i = mask & -mask; | |
4109 | mask ^= i; | |
4110 | i = ffs (i) - 1; | |
252b5132 | 4111 | |
ea1562b3 NC |
4112 | cfi_add_CFA_offset (i + 32, offset); |
4113 | offset += 8; | |
4114 | } | |
4115 | } | |
252b5132 | 4116 | |
ea1562b3 NC |
4117 | cfi_end_fde (p->func_end_sym); |
4118 | } | |
252b5132 RH |
4119 | } |
4120 | ||
4121 | static void | |
ea1562b3 | 4122 | s_alpha_usepv (int unused ATTRIBUTE_UNUSED) |
252b5132 | 4123 | { |
ea1562b3 NC |
4124 | char *name, name_end; |
4125 | char *which, which_end; | |
4126 | symbolS *sym; | |
4127 | int other; | |
f37f01cf | 4128 | |
d02603dc | 4129 | name_end = get_symbol_name (&name); |
f37f01cf | 4130 | |
ea1562b3 NC |
4131 | if (! is_name_beginner (*name)) |
4132 | { | |
4133 | as_bad (_(".usepv directive has no name")); | |
d02603dc | 4134 | (void) restore_line_pointer (name_end); |
ea1562b3 NC |
4135 | ignore_rest_of_line (); |
4136 | return; | |
4137 | } | |
f37f01cf | 4138 | |
ea1562b3 | 4139 | sym = symbol_find_or_make (name); |
d02603dc NC |
4140 | name_end = restore_line_pointer (name_end); |
4141 | if (! is_end_of_line[(unsigned char) name_end]) | |
4142 | input_line_pointer++; | |
f37f01cf | 4143 | |
ea1562b3 NC |
4144 | if (name_end != ',') |
4145 | { | |
4146 | as_bad (_(".usepv directive has no type")); | |
4147 | ignore_rest_of_line (); | |
4148 | return; | |
f37f01cf | 4149 | } |
252b5132 | 4150 | |
ea1562b3 | 4151 | SKIP_WHITESPACE (); |
d02603dc NC |
4152 | |
4153 | which_end = get_symbol_name (&which); | |
ea1562b3 NC |
4154 | |
4155 | if (strcmp (which, "no") == 0) | |
4156 | other = STO_ALPHA_NOPV; | |
4157 | else if (strcmp (which, "std") == 0) | |
4158 | other = STO_ALPHA_STD_GPLOAD; | |
252b5132 | 4159 | else |
f37f01cf | 4160 | { |
ea1562b3 NC |
4161 | as_bad (_("unknown argument for .usepv")); |
4162 | other = 0; | |
4163 | } | |
f37f01cf | 4164 | |
d02603dc | 4165 | (void) restore_line_pointer (which_end); |
ea1562b3 | 4166 | demand_empty_rest_of_line (); |
f37f01cf | 4167 | |
ea1562b3 NC |
4168 | S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); |
4169 | } | |
4170 | #endif /* OBJ_ELF */ | |
f37f01cf | 4171 | |
ea1562b3 | 4172 | /* Standard calling conventions leaves the CFA at $30 on entry. */ |
f37f01cf | 4173 | |
ea1562b3 NC |
4174 | void |
4175 | alpha_cfi_frame_initial_instructions (void) | |
4176 | { | |
4177 | cfi_add_CFA_def_cfa_register (30); | |
252b5132 RH |
4178 | } |
4179 | ||
ea1562b3 NC |
4180 | #ifdef OBJ_EVAX |
4181 | ||
198f1251 | 4182 | /* Get name of section. */ |
6d4af3c2 | 4183 | static const char * |
198f1251 TG |
4184 | s_alpha_section_name (void) |
4185 | { | |
4186 | char *name; | |
4187 | ||
4188 | SKIP_WHITESPACE (); | |
4189 | if (*input_line_pointer == '"') | |
4190 | { | |
4191 | int dummy; | |
4192 | ||
4193 | name = demand_copy_C_string (&dummy); | |
4194 | if (name == NULL) | |
4195 | { | |
4196 | ignore_rest_of_line (); | |
4197 | return NULL; | |
4198 | } | |
4199 | } | |
4200 | else | |
4201 | { | |
4202 | char *end = input_line_pointer; | |
4203 | ||
4204 | while (0 == strchr ("\n\t,; ", *end)) | |
4205 | end++; | |
4206 | if (end == input_line_pointer) | |
4207 | { | |
4208 | as_warn (_("missing name")); | |
4209 | ignore_rest_of_line (); | |
4210 | return NULL; | |
4211 | } | |
4212 | ||
29a2809e | 4213 | name = xmemdup0 (input_line_pointer, end - input_line_pointer); |
198f1251 TG |
4214 | input_line_pointer = end; |
4215 | } | |
4216 | SKIP_WHITESPACE (); | |
4217 | return name; | |
4218 | } | |
4219 | ||
d8703844 TG |
4220 | /* Put clear/set flags in one flagword. The LSBs are flags to be set, |
4221 | the MSBs are the flags to be cleared. */ | |
4222 | ||
4223 | #define EGPS__V_NO_SHIFT 16 | |
4224 | #define EGPS__V_MASK 0xffff | |
4225 | ||
4226 | /* Parse one VMS section flag. */ | |
4227 | ||
198f1251 TG |
4228 | static flagword |
4229 | s_alpha_section_word (char *str, size_t len) | |
4230 | { | |
4231 | int no = 0; | |
4232 | flagword flag = 0; | |
4233 | ||
4234 | if (len == 5 && strncmp (str, "NO", 2) == 0) | |
4235 | { | |
4236 | no = 1; | |
4237 | str += 2; | |
3739860c | 4238 | len -= 2; |
198f1251 TG |
4239 | } |
4240 | ||
4241 | if (len == 3) | |
4242 | { | |
4243 | if (strncmp (str, "PIC", 3) == 0) | |
d8703844 | 4244 | flag = EGPS__V_PIC; |
198f1251 | 4245 | else if (strncmp (str, "LIB", 3) == 0) |
d8703844 | 4246 | flag = EGPS__V_LIB; |
198f1251 | 4247 | else if (strncmp (str, "OVR", 3) == 0) |
d8703844 | 4248 | flag = EGPS__V_OVR; |
198f1251 | 4249 | else if (strncmp (str, "REL", 3) == 0) |
d8703844 | 4250 | flag = EGPS__V_REL; |
198f1251 | 4251 | else if (strncmp (str, "GBL", 3) == 0) |
d8703844 | 4252 | flag = EGPS__V_GBL; |
198f1251 | 4253 | else if (strncmp (str, "SHR", 3) == 0) |
d8703844 | 4254 | flag = EGPS__V_SHR; |
198f1251 | 4255 | else if (strncmp (str, "EXE", 3) == 0) |
d8703844 | 4256 | flag = EGPS__V_EXE; |
198f1251 | 4257 | else if (strncmp (str, "WRT", 3) == 0) |
d8703844 | 4258 | flag = EGPS__V_WRT; |
198f1251 | 4259 | else if (strncmp (str, "VEC", 3) == 0) |
d8703844 | 4260 | flag = EGPS__V_VEC; |
198f1251 TG |
4261 | else if (strncmp (str, "MOD", 3) == 0) |
4262 | { | |
d8703844 | 4263 | flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT; |
198f1251 TG |
4264 | no = 0; |
4265 | } | |
4266 | else if (strncmp (str, "COM", 3) == 0) | |
d8703844 | 4267 | flag = EGPS__V_COM; |
198f1251 TG |
4268 | } |
4269 | ||
4270 | if (flag == 0) | |
4271 | { | |
4272 | char c = str[len]; | |
4273 | str[len] = 0; | |
4274 | as_warn (_("unknown section attribute %s"), str); | |
4275 | str[len] = c; | |
4276 | return 0; | |
4277 | } | |
4278 | ||
4279 | if (no) | |
d8703844 | 4280 | return flag << EGPS__V_NO_SHIFT; |
198f1251 TG |
4281 | else |
4282 | return flag; | |
4283 | } | |
4284 | ||
ea1562b3 NC |
4285 | /* Handle the section specific pseudo-op. */ |
4286 | ||
198f1251 TG |
4287 | #define EVAX_SECTION_COUNT 5 |
4288 | ||
6d4af3c2 | 4289 | static const char *section_name[EVAX_SECTION_COUNT + 1] = |
198f1251 TG |
4290 | { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" }; |
4291 | ||
252b5132 | 4292 | static void |
ea1562b3 | 4293 | s_alpha_section (int secid) |
252b5132 | 4294 | { |
6d4af3c2 AM |
4295 | const char *name; |
4296 | char *beg; | |
198f1251 TG |
4297 | segT sec; |
4298 | flagword vms_flags = 0; | |
4299 | symbolS *symbol; | |
252b5132 | 4300 | |
198f1251 | 4301 | if (secid == 0) |
81283cde | 4302 | { |
198f1251 TG |
4303 | name = s_alpha_section_name (); |
4304 | if (name == NULL) | |
4305 | return; | |
4306 | sec = subseg_new (name, 0); | |
4307 | if (*input_line_pointer == ',') | |
4308 | { | |
4309 | /* Skip the comma. */ | |
4310 | ++input_line_pointer; | |
4311 | SKIP_WHITESPACE (); | |
4312 | ||
4313 | do | |
4314 | { | |
4315 | char c; | |
4316 | ||
4317 | SKIP_WHITESPACE (); | |
d02603dc | 4318 | c = get_symbol_name (&beg); |
198f1251 TG |
4319 | *input_line_pointer = c; |
4320 | ||
4321 | vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg); | |
4322 | ||
d02603dc | 4323 | SKIP_WHITESPACE_AFTER_NAME (); |
198f1251 TG |
4324 | } |
4325 | while (*input_line_pointer++ == ','); | |
d02603dc | 4326 | |
198f1251 TG |
4327 | --input_line_pointer; |
4328 | } | |
4329 | ||
4330 | symbol = symbol_find_or_make (name); | |
4331 | S_SET_SEGMENT (symbol, sec); | |
4332 | symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
4333 | bfd_vms_set_section_flags |
4334 | (stdoutput, sec, | |
4335 | (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK, | |
4336 | vms_flags & EGPS__V_MASK); | |
81283cde | 4337 | } |
198f1251 TG |
4338 | else |
4339 | { | |
87975d2a | 4340 | get_absolute_expression (); |
198f1251 TG |
4341 | subseg_new (section_name[secid], 0); |
4342 | } | |
4343 | ||
4344 | demand_empty_rest_of_line (); | |
4345 | alpha_insn_label = NULL; | |
4346 | alpha_auto_align_on = 1; | |
4347 | alpha_current_align = 0; | |
4348 | } | |
4349 | ||
4350 | static void | |
4351 | s_alpha_literals (int ignore ATTRIBUTE_UNUSED) | |
4352 | { | |
4353 | subseg_new (".literals", 0); | |
ea1562b3 NC |
4354 | demand_empty_rest_of_line (); |
4355 | alpha_insn_label = NULL; | |
4356 | alpha_auto_align_on = 1; | |
4357 | alpha_current_align = 0; | |
252b5132 RH |
4358 | } |
4359 | ||
ea1562b3 | 4360 | /* Parse .ent directives. */ |
a8316fe2 | 4361 | |
4dc7ead9 | 4362 | static void |
ea1562b3 | 4363 | s_alpha_ent (int ignore ATTRIBUTE_UNUSED) |
4dc7ead9 | 4364 | { |
ea1562b3 NC |
4365 | symbolS *symbol; |
4366 | expressionS symexpr; | |
a8316fe2 | 4367 | |
4b1c4d2b TG |
4368 | if (alpha_evax_proc != NULL) |
4369 | as_bad (_("previous .ent not closed by a .end")); | |
4370 | ||
4371 | alpha_evax_proc = &alpha_evax_proc_data; | |
198f1251 TG |
4372 | |
4373 | alpha_evax_proc->pdsckind = 0; | |
4374 | alpha_evax_proc->framereg = -1; | |
4375 | alpha_evax_proc->framesize = 0; | |
4376 | alpha_evax_proc->rsa_offset = 0; | |
4377 | alpha_evax_proc->ra_save = AXP_REG_RA; | |
4378 | alpha_evax_proc->fp_save = -1; | |
4379 | alpha_evax_proc->imask = 0; | |
4380 | alpha_evax_proc->fmask = 0; | |
4381 | alpha_evax_proc->prologue = 0; | |
4382 | alpha_evax_proc->type = 0; | |
4383 | alpha_evax_proc->handler = 0; | |
4384 | alpha_evax_proc->handler_data = 0; | |
a8316fe2 | 4385 | |
ea1562b3 | 4386 | expression (&symexpr); |
a8316fe2 | 4387 | |
ea1562b3 NC |
4388 | if (symexpr.X_op != O_symbol) |
4389 | { | |
4390 | as_fatal (_(".ent directive has no symbol")); | |
4391 | demand_empty_rest_of_line (); | |
4392 | return; | |
a8316fe2 RH |
4393 | } |
4394 | ||
ea1562b3 NC |
4395 | symbol = make_expr_symbol (&symexpr); |
4396 | symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION; | |
198f1251 TG |
4397 | alpha_evax_proc->symbol = symbol; |
4398 | ||
ea1562b3 | 4399 | demand_empty_rest_of_line (); |
4dc7ead9 RH |
4400 | } |
4401 | ||
198f1251 TG |
4402 | static void |
4403 | s_alpha_handler (int is_data) | |
4404 | { | |
4405 | if (is_data) | |
4406 | alpha_evax_proc->handler_data = get_absolute_expression (); | |
4407 | else | |
4408 | { | |
4409 | char *name, name_end; | |
d02603dc NC |
4410 | |
4411 | name_end = get_symbol_name (&name); | |
198f1251 TG |
4412 | |
4413 | if (! is_name_beginner (*name)) | |
4414 | { | |
4415 | as_warn (_(".handler directive has no name")); | |
198f1251 TG |
4416 | } |
4417 | else | |
4418 | { | |
4419 | symbolS *sym; | |
4420 | ||
4421 | sym = symbol_find_or_make (name); | |
4422 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
4423 | alpha_evax_proc->handler = sym; | |
198f1251 | 4424 | } |
d02603dc NC |
4425 | |
4426 | (void) restore_line_pointer (name_end); | |
4427 | } | |
4428 | ||
198f1251 TG |
4429 | demand_empty_rest_of_line (); |
4430 | } | |
4431 | ||
ea1562b3 NC |
4432 | /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */ |
4433 | ||
a8316fe2 | 4434 | static void |
ea1562b3 | 4435 | s_alpha_frame (int ignore ATTRIBUTE_UNUSED) |
a8316fe2 | 4436 | { |
ea1562b3 | 4437 | long val; |
467b607e | 4438 | int ra; |
a8316fe2 | 4439 | |
198f1251 | 4440 | alpha_evax_proc->framereg = tc_get_register (1); |
a8316fe2 | 4441 | |
ea1562b3 NC |
4442 | SKIP_WHITESPACE (); |
4443 | if (*input_line_pointer++ != ',' | |
4444 | || get_absolute_expression_and_terminator (&val) != ',') | |
4445 | { | |
4446 | as_warn (_("Bad .frame directive 1./2. param")); | |
4447 | --input_line_pointer; | |
4448 | demand_empty_rest_of_line (); | |
4449 | return; | |
4450 | } | |
a8316fe2 | 4451 | |
198f1251 | 4452 | alpha_evax_proc->framesize = val; |
ea1562b3 | 4453 | |
467b607e TG |
4454 | ra = tc_get_register (1); |
4455 | if (ra != AXP_REG_RA) | |
4456 | as_warn (_("Bad RA (%d) register for .frame"), ra); | |
4457 | ||
ea1562b3 NC |
4458 | SKIP_WHITESPACE (); |
4459 | if (*input_line_pointer++ != ',') | |
4460 | { | |
4461 | as_warn (_("Bad .frame directive 3./4. param")); | |
4462 | --input_line_pointer; | |
4463 | demand_empty_rest_of_line (); | |
4464 | return; | |
a8316fe2 | 4465 | } |
198f1251 TG |
4466 | alpha_evax_proc->rsa_offset = get_absolute_expression (); |
4467 | } | |
4468 | ||
51794af8 TG |
4469 | /* Parse .prologue. */ |
4470 | ||
198f1251 TG |
4471 | static void |
4472 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) | |
4473 | { | |
198f1251 TG |
4474 | demand_empty_rest_of_line (); |
4475 | alpha_prologue_label = symbol_new | |
4476 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
a8316fe2 RH |
4477 | } |
4478 | ||
467b607e | 4479 | /* Parse .pdesc <entry_name>,{null|stack|reg} |
51794af8 TG |
4480 | Insert a procedure descriptor. */ |
4481 | ||
252b5132 | 4482 | static void |
ea1562b3 | 4483 | s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4484 | { |
ea1562b3 NC |
4485 | char *name; |
4486 | char name_end; | |
ed9e98c2 | 4487 | char *p; |
ea1562b3 NC |
4488 | expressionS exp; |
4489 | symbolS *entry_sym; | |
198f1251 | 4490 | const char *entry_sym_name; |
4b1c4d2b TG |
4491 | const char *pdesc_sym_name; |
4492 | fixS *fixp; | |
4493 | size_t len; | |
252b5132 | 4494 | |
ea1562b3 NC |
4495 | if (now_seg != alpha_link_section) |
4496 | { | |
4497 | as_bad (_(".pdesc directive not in link (.link) section")); | |
ea1562b3 NC |
4498 | return; |
4499 | } | |
252b5132 | 4500 | |
198f1251 TG |
4501 | expression (&exp); |
4502 | if (exp.X_op != O_symbol) | |
252b5132 | 4503 | { |
4b1c4d2b | 4504 | as_bad (_(".pdesc directive has no entry symbol")); |
ea1562b3 | 4505 | return; |
252b5132 | 4506 | } |
3739860c | 4507 | |
198f1251 | 4508 | entry_sym = make_expr_symbol (&exp); |
4b1c4d2b | 4509 | entry_sym_name = S_GET_NAME (entry_sym); |
3739860c | 4510 | |
8aacb050 | 4511 | /* Strip "..en". */ |
198f1251 | 4512 | len = strlen (entry_sym_name); |
4b1c4d2b | 4513 | if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0) |
ea1562b3 | 4514 | { |
4b1c4d2b TG |
4515 | as_bad (_(".pdesc has a bad entry symbol")); |
4516 | return; | |
4517 | } | |
4518 | len -= 4; | |
4519 | pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol); | |
4520 | ||
4521 | if (!alpha_evax_proc | |
4522 | || !S_IS_DEFINED (alpha_evax_proc->symbol) | |
4523 | || strlen (pdesc_sym_name) != len | |
4524 | || memcmp (entry_sym_name, pdesc_sym_name, len) != 0) | |
4525 | { | |
4526 | as_fatal (_(".pdesc doesn't match with last .ent")); | |
ea1562b3 NC |
4527 | return; |
4528 | } | |
f37f01cf | 4529 | |
8aacb050 | 4530 | /* Define pdesc symbol. */ |
4b1c4d2b | 4531 | symbol_set_value_now (alpha_evax_proc->symbol); |
3739860c | 4532 | |
198f1251 TG |
4533 | /* Save bfd symbol of proc entry in function symbol. */ |
4534 | ((struct evax_private_udata_struct *) | |
4535 | symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym | |
4536 | = symbol_get_bfdsym (entry_sym); | |
3739860c | 4537 | |
ea1562b3 NC |
4538 | SKIP_WHITESPACE (); |
4539 | if (*input_line_pointer++ != ',') | |
4540 | { | |
4541 | as_warn (_("No comma after .pdesc <entryname>")); | |
4542 | demand_empty_rest_of_line (); | |
4543 | return; | |
4544 | } | |
f37f01cf | 4545 | |
ea1562b3 | 4546 | SKIP_WHITESPACE (); |
d02603dc | 4547 | name_end = get_symbol_name (&name); |
f37f01cf | 4548 | |
ea1562b3 | 4549 | if (strncmp (name, "stack", 5) == 0) |
198f1251 | 4550 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK; |
f37f01cf | 4551 | |
ea1562b3 | 4552 | else if (strncmp (name, "reg", 3) == 0) |
198f1251 | 4553 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER; |
f37f01cf | 4554 | |
ea1562b3 | 4555 | else if (strncmp (name, "null", 4) == 0) |
198f1251 | 4556 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL; |
f37f01cf | 4557 | |
ea1562b3 NC |
4558 | else |
4559 | { | |
d02603dc | 4560 | (void) restore_line_pointer (name_end); |
ea1562b3 NC |
4561 | as_fatal (_("unknown procedure kind")); |
4562 | demand_empty_rest_of_line (); | |
4563 | return; | |
4564 | } | |
f37f01cf | 4565 | |
d02603dc | 4566 | (void) restore_line_pointer (name_end); |
ea1562b3 | 4567 | demand_empty_rest_of_line (); |
f37f01cf | 4568 | |
ea1562b3 NC |
4569 | #ifdef md_flush_pending_output |
4570 | md_flush_pending_output (); | |
4571 | #endif | |
252b5132 RH |
4572 | |
4573 | frag_align (3, 0, 0); | |
4574 | p = frag_more (16); | |
4575 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0); | |
4576 | fixp->fx_done = 1; | |
252b5132 | 4577 | |
198f1251 TG |
4578 | *p = alpha_evax_proc->pdsckind |
4579 | | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0) | |
4580 | | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0) | |
4581 | | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0); | |
66498417 | 4582 | *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET; |
252b5132 | 4583 | |
198f1251 | 4584 | switch (alpha_evax_proc->pdsckind) |
252b5132 | 4585 | { |
1aad8cf8 | 4586 | case PDSC_S_K_KIND_NULL: |
66498417 KH |
4587 | *(p + 2) = 0; |
4588 | *(p + 3) = 0; | |
1aad8cf8 KH |
4589 | break; |
4590 | case PDSC_S_K_KIND_FP_REGISTER: | |
198f1251 TG |
4591 | *(p + 2) = alpha_evax_proc->fp_save; |
4592 | *(p + 3) = alpha_evax_proc->ra_save; | |
1aad8cf8 KH |
4593 | break; |
4594 | case PDSC_S_K_KIND_FP_STACK: | |
198f1251 | 4595 | md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2); |
1aad8cf8 KH |
4596 | break; |
4597 | default: /* impossible */ | |
4598 | break; | |
252b5132 RH |
4599 | } |
4600 | ||
66498417 | 4601 | *(p + 4) = 0; |
198f1251 | 4602 | *(p + 5) = alpha_evax_proc->type & 0x0f; |
252b5132 RH |
4603 | |
4604 | /* Signature offset. */ | |
66498417 | 4605 | md_number_to_chars (p + 6, (valueT) 0, 2); |
252b5132 | 4606 | |
af24f60c TG |
4607 | fix_new_exp (frag_now, p - frag_now->fr_literal + 8, |
4608 | 8, &exp, 0, BFD_RELOC_64); | |
252b5132 | 4609 | |
198f1251 | 4610 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL) |
252b5132 RH |
4611 | return; |
4612 | ||
252b5132 | 4613 | /* pdesc+16: Size. */ |
af24f60c | 4614 | p = frag_more (6); |
198f1251 | 4615 | md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4); |
66498417 | 4616 | md_number_to_chars (p + 4, (valueT) 0, 2); |
252b5132 RH |
4617 | |
4618 | /* Entry length. */ | |
198f1251 TG |
4619 | exp.X_op = O_subtract; |
4620 | exp.X_add_symbol = alpha_prologue_label; | |
4621 | exp.X_op_symbol = entry_sym; | |
4622 | emit_expr (&exp, 2); | |
252b5132 | 4623 | |
198f1251 | 4624 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER) |
252b5132 RH |
4625 | return; |
4626 | ||
252b5132 | 4627 | /* pdesc+24: register masks. */ |
af24f60c | 4628 | p = frag_more (8); |
198f1251 TG |
4629 | md_number_to_chars (p, alpha_evax_proc->imask, 4); |
4630 | md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4); | |
4631 | ||
4632 | if (alpha_evax_proc->handler) | |
4633 | { | |
4634 | p = frag_more (8); | |
4635 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, | |
4636 | alpha_evax_proc->handler, 0, 0, BFD_RELOC_64); | |
4637 | } | |
4638 | ||
4639 | if (alpha_evax_proc->handler_data) | |
4640 | { | |
198f1251 | 4641 | p = frag_more (8); |
198f1251 TG |
4642 | md_number_to_chars (p, alpha_evax_proc->handler_data, 8); |
4643 | } | |
252b5132 RH |
4644 | } |
4645 | ||
252b5132 RH |
4646 | /* Support for crash debug on vms. */ |
4647 | ||
4648 | static void | |
ea1562b3 | 4649 | s_alpha_name (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4650 | { |
ea1562b3 | 4651 | char *p; |
252b5132 | 4652 | expressionS exp; |
252b5132 RH |
4653 | |
4654 | if (now_seg != alpha_link_section) | |
4655 | { | |
4656 | as_bad (_(".name directive not in link (.link) section")); | |
4657 | demand_empty_rest_of_line (); | |
4658 | return; | |
4659 | } | |
4660 | ||
4661 | expression (&exp); | |
4662 | if (exp.X_op != O_symbol) | |
4663 | { | |
4664 | as_warn (_(".name directive has no symbol")); | |
4665 | demand_empty_rest_of_line (); | |
4666 | return; | |
4667 | } | |
4668 | ||
4669 | demand_empty_rest_of_line (); | |
4670 | ||
4671 | #ifdef md_flush_pending_output | |
4672 | md_flush_pending_output (); | |
4673 | #endif | |
4674 | ||
4675 | frag_align (3, 0, 0); | |
4676 | p = frag_more (8); | |
252b5132 | 4677 | |
66498417 | 4678 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64); |
252b5132 RH |
4679 | } |
4680 | ||
51794af8 TG |
4681 | /* Parse .linkage <symbol>. |
4682 | Create a linkage pair relocation. */ | |
4683 | ||
252b5132 | 4684 | static void |
ea1562b3 | 4685 | s_alpha_linkage (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4686 | { |
4687 | expressionS exp; | |
4688 | char *p; | |
198f1251 | 4689 | fixS *fixp; |
252b5132 RH |
4690 | |
4691 | #ifdef md_flush_pending_output | |
4692 | md_flush_pending_output (); | |
4693 | #endif | |
4694 | ||
4695 | expression (&exp); | |
4696 | if (exp.X_op != O_symbol) | |
4697 | { | |
4698 | as_fatal (_("No symbol after .linkage")); | |
4699 | } | |
4700 | else | |
4701 | { | |
198f1251 | 4702 | struct alpha_linkage_fixups *linkage_fixup; |
3739860c | 4703 | |
252b5132 RH |
4704 | p = frag_more (LKP_S_K_SIZE); |
4705 | memset (p, 0, LKP_S_K_SIZE); | |
198f1251 | 4706 | fixp = fix_new_exp |
0ac5db19 | 4707 | (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0, |
198f1251 TG |
4708 | BFD_RELOC_ALPHA_LINKAGE); |
4709 | ||
0ac5db19 TG |
4710 | if (alpha_insn_label == NULL) |
4711 | alpha_insn_label = symbol_new | |
4712 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
4713 | ||
4714 | /* Create a linkage element. */ | |
add39d23 | 4715 | linkage_fixup = XNEW (struct alpha_linkage_fixups); |
198f1251 | 4716 | linkage_fixup->fixp = fixp; |
0ac5db19 | 4717 | linkage_fixup->next = NULL; |
198f1251 TG |
4718 | linkage_fixup->label = alpha_insn_label; |
4719 | ||
0ac5db19 TG |
4720 | /* Append it to the list. */ |
4721 | if (alpha_linkage_fixup_root == NULL) | |
4722 | alpha_linkage_fixup_root = linkage_fixup; | |
198f1251 | 4723 | else |
0ac5db19 TG |
4724 | alpha_linkage_fixup_tail->next = linkage_fixup; |
4725 | alpha_linkage_fixup_tail = linkage_fixup; | |
252b5132 RH |
4726 | } |
4727 | demand_empty_rest_of_line (); | |
252b5132 RH |
4728 | } |
4729 | ||
51794af8 TG |
4730 | /* Parse .code_address <symbol>. |
4731 | Create a code address relocation. */ | |
4732 | ||
252b5132 | 4733 | static void |
ea1562b3 | 4734 | s_alpha_code_address (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4735 | { |
4736 | expressionS exp; | |
4737 | char *p; | |
4738 | ||
4739 | #ifdef md_flush_pending_output | |
4740 | md_flush_pending_output (); | |
4741 | #endif | |
4742 | ||
4743 | expression (&exp); | |
4744 | if (exp.X_op != O_symbol) | |
ea1562b3 | 4745 | as_fatal (_("No symbol after .code_address")); |
252b5132 RH |
4746 | else |
4747 | { | |
4748 | p = frag_more (8); | |
4749 | memset (p, 0, 8); | |
4750 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\ | |
4751 | BFD_RELOC_ALPHA_CODEADDR); | |
4752 | } | |
4753 | demand_empty_rest_of_line (); | |
252b5132 RH |
4754 | } |
4755 | ||
252b5132 | 4756 | static void |
ea1562b3 | 4757 | s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4758 | { |
198f1251 | 4759 | alpha_evax_proc->fp_save = tc_get_register (1); |
252b5132 RH |
4760 | |
4761 | demand_empty_rest_of_line (); | |
252b5132 RH |
4762 | } |
4763 | ||
252b5132 | 4764 | static void |
ea1562b3 | 4765 | s_alpha_mask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4766 | { |
4767 | long val; | |
4768 | ||
4769 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4770 | { | |
4771 | as_warn (_("Bad .mask directive")); | |
4772 | --input_line_pointer; | |
4773 | } | |
4774 | else | |
4775 | { | |
198f1251 | 4776 | alpha_evax_proc->imask = val; |
32ff5c2e | 4777 | (void) get_absolute_expression (); |
252b5132 RH |
4778 | } |
4779 | demand_empty_rest_of_line (); | |
252b5132 RH |
4780 | } |
4781 | ||
252b5132 | 4782 | static void |
ea1562b3 | 4783 | s_alpha_fmask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4784 | { |
4785 | long val; | |
4786 | ||
4787 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4788 | { | |
4789 | as_warn (_("Bad .fmask directive")); | |
4790 | --input_line_pointer; | |
4791 | } | |
4792 | else | |
4793 | { | |
198f1251 | 4794 | alpha_evax_proc->fmask = val; |
252b5132 RH |
4795 | (void) get_absolute_expression (); |
4796 | } | |
4797 | demand_empty_rest_of_line (); | |
252b5132 RH |
4798 | } |
4799 | ||
4800 | static void | |
ea1562b3 | 4801 | s_alpha_end (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4802 | { |
d02603dc | 4803 | char *name; |
252b5132 RH |
4804 | char c; |
4805 | ||
d02603dc NC |
4806 | c = get_symbol_name (&name); |
4807 | (void) restore_line_pointer (c); | |
252b5132 | 4808 | demand_empty_rest_of_line (); |
8aacb050 | 4809 | alpha_evax_proc = NULL; |
252b5132 RH |
4810 | } |
4811 | ||
252b5132 | 4812 | static void |
ea1562b3 | 4813 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4814 | { |
4815 | symbolS *s; | |
4816 | int length; | |
4817 | static char case_hack[32]; | |
4818 | ||
252b5132 | 4819 | sprintf (case_hack, "<CASE:%01d%01d>", |
9de8d8f1 | 4820 | alpha_flag_hash_long_names, alpha_flag_show_after_trunc); |
252b5132 RH |
4821 | |
4822 | s = symbol_find_or_make (case_hack); | |
9de8d8f1 | 4823 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 RH |
4824 | |
4825 | get_absolute_expression (); | |
4826 | s = symbol_find_or_make (demand_copy_string (&length)); | |
9de8d8f1 | 4827 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 | 4828 | demand_empty_rest_of_line (); |
252b5132 RH |
4829 | } |
4830 | #endif /* OBJ_EVAX */ | |
4831 | ||
4832 | /* Handle the .gprel32 pseudo op. */ | |
4833 | ||
4834 | static void | |
ea1562b3 | 4835 | s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4836 | { |
4837 | expressionS e; | |
4838 | char *p; | |
4839 | ||
4840 | SKIP_WHITESPACE (); | |
4841 | expression (&e); | |
4842 | ||
4843 | #ifdef OBJ_ELF | |
4844 | switch (e.X_op) | |
4845 | { | |
4846 | case O_constant: | |
32ff5c2e | 4847 | e.X_add_symbol = section_symbol (absolute_section); |
252b5132 RH |
4848 | e.X_op = O_symbol; |
4849 | /* FALLTHRU */ | |
4850 | case O_symbol: | |
4851 | break; | |
4852 | default: | |
bc805888 | 4853 | abort (); |
252b5132 RH |
4854 | } |
4855 | #else | |
4856 | #ifdef OBJ_ECOFF | |
4857 | switch (e.X_op) | |
4858 | { | |
4859 | case O_constant: | |
4860 | e.X_add_symbol = section_symbol (absolute_section); | |
4861 | /* fall through */ | |
4862 | case O_symbol: | |
4863 | e.X_op = O_subtract; | |
4864 | e.X_op_symbol = alpha_gp_symbol; | |
4865 | break; | |
4866 | default: | |
4867 | abort (); | |
4868 | } | |
4869 | #endif | |
4870 | #endif | |
4871 | ||
4872 | if (alpha_auto_align_on && alpha_current_align < 2) | |
4873 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
4874 | if (alpha_current_align > 2) | |
4875 | alpha_current_align = 2; | |
4876 | alpha_insn_label = NULL; | |
4877 | ||
4878 | p = frag_more (4); | |
4879 | memset (p, 0, 4); | |
66498417 | 4880 | fix_new_exp (frag_now, p - frag_now->fr_literal, 4, |
252b5132 RH |
4881 | &e, 0, BFD_RELOC_GPREL32); |
4882 | } | |
4883 | ||
4884 | /* Handle floating point allocation pseudo-ops. This is like the | |
33eaf5de | 4885 | generic version, but it makes sure the current label, if any, is |
252b5132 RH |
4886 | correctly aligned. */ |
4887 | ||
4888 | static void | |
ea1562b3 | 4889 | s_alpha_float_cons (int type) |
252b5132 RH |
4890 | { |
4891 | int log_size; | |
4892 | ||
4893 | switch (type) | |
4894 | { | |
4895 | default: | |
4896 | case 'f': | |
4897 | case 'F': | |
4898 | log_size = 2; | |
4899 | break; | |
4900 | ||
4901 | case 'd': | |
4902 | case 'D': | |
4903 | case 'G': | |
4904 | log_size = 3; | |
4905 | break; | |
4906 | ||
4907 | case 'x': | |
4908 | case 'X': | |
4909 | case 'p': | |
4910 | case 'P': | |
4911 | log_size = 4; | |
4912 | break; | |
4913 | } | |
4914 | ||
4915 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
4916 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
4917 | if (alpha_current_align > log_size) | |
4918 | alpha_current_align = log_size; | |
4919 | alpha_insn_label = NULL; | |
4920 | ||
4921 | float_cons (type); | |
4922 | } | |
4923 | ||
4924 | /* Handle the .proc pseudo op. We don't really do much with it except | |
4925 | parse it. */ | |
4926 | ||
4927 | static void | |
ea1562b3 | 4928 | s_alpha_proc (int is_static ATTRIBUTE_UNUSED) |
252b5132 RH |
4929 | { |
4930 | char *name; | |
4931 | char c; | |
4932 | char *p; | |
4933 | symbolS *symbolP; | |
4934 | int temp; | |
4935 | ||
ea1562b3 | 4936 | /* Takes ".proc name,nargs". */ |
252b5132 | 4937 | SKIP_WHITESPACE (); |
d02603dc | 4938 | c = get_symbol_name (&name); |
252b5132 RH |
4939 | p = input_line_pointer; |
4940 | symbolP = symbol_find_or_make (name); | |
4941 | *p = c; | |
d02603dc | 4942 | SKIP_WHITESPACE_AFTER_NAME (); |
252b5132 RH |
4943 | if (*input_line_pointer != ',') |
4944 | { | |
4945 | *p = 0; | |
4946 | as_warn (_("Expected comma after name \"%s\""), name); | |
4947 | *p = c; | |
4948 | temp = 0; | |
4949 | ignore_rest_of_line (); | |
4950 | } | |
4951 | else | |
4952 | { | |
4953 | input_line_pointer++; | |
4954 | temp = get_absolute_expression (); | |
4955 | } | |
7dcc9865 | 4956 | /* *symbol_get_obj (symbolP) = (signed char) temp; */ |
87975d2a | 4957 | (void) symbolP; |
252b5132 RH |
4958 | as_warn (_("unhandled: .proc %s,%d"), name, temp); |
4959 | demand_empty_rest_of_line (); | |
4960 | } | |
4961 | ||
4962 | /* Handle the .set pseudo op. This is used to turn on and off most of | |
4963 | the assembler features. */ | |
4964 | ||
4965 | static void | |
ea1562b3 | 4966 | s_alpha_set (int x ATTRIBUTE_UNUSED) |
252b5132 RH |
4967 | { |
4968 | char *name, ch, *s; | |
4969 | int yesno = 1; | |
4970 | ||
4971 | SKIP_WHITESPACE (); | |
252b5132 | 4972 | |
d02603dc | 4973 | ch = get_symbol_name (&name); |
252b5132 RH |
4974 | s = name; |
4975 | if (s[0] == 'n' && s[1] == 'o') | |
4976 | { | |
4977 | yesno = 0; | |
4978 | s += 2; | |
4979 | } | |
4980 | if (!strcmp ("reorder", s)) | |
4981 | /* ignore */ ; | |
4982 | else if (!strcmp ("at", s)) | |
4983 | alpha_noat_on = !yesno; | |
4984 | else if (!strcmp ("macro", s)) | |
4985 | alpha_macros_on = yesno; | |
4986 | else if (!strcmp ("move", s)) | |
4987 | /* ignore */ ; | |
4988 | else if (!strcmp ("volatile", s)) | |
4989 | /* ignore */ ; | |
4990 | else | |
4991 | as_warn (_("Tried to .set unrecognized mode `%s'"), name); | |
4992 | ||
d02603dc | 4993 | (void) restore_line_pointer (ch); |
252b5132 RH |
4994 | demand_empty_rest_of_line (); |
4995 | } | |
4996 | ||
4997 | /* Handle the .base pseudo op. This changes the assembler's notion of | |
4998 | the $gp register. */ | |
4999 | ||
5000 | static void | |
ea1562b3 | 5001 | s_alpha_base (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5002 | { |
252b5132 | 5003 | SKIP_WHITESPACE (); |
ea1562b3 | 5004 | |
252b5132 | 5005 | if (*input_line_pointer == '$') |
ea1562b3 NC |
5006 | { |
5007 | /* $rNN form. */ | |
252b5132 RH |
5008 | input_line_pointer++; |
5009 | if (*input_line_pointer == 'r') | |
5010 | input_line_pointer++; | |
5011 | } | |
5012 | ||
5013 | alpha_gp_register = get_absolute_expression (); | |
5014 | if (alpha_gp_register < 0 || alpha_gp_register > 31) | |
5015 | { | |
5016 | alpha_gp_register = AXP_REG_GP; | |
5017 | as_warn (_("Bad base register, using $%d."), alpha_gp_register); | |
5018 | } | |
5019 | ||
5020 | demand_empty_rest_of_line (); | |
5021 | } | |
5022 | ||
5023 | /* Handle the .align pseudo-op. This aligns to a power of two. It | |
5024 | also adjusts any current instruction label. We treat this the same | |
5025 | way the MIPS port does: .align 0 turns off auto alignment. */ | |
5026 | ||
5027 | static void | |
ea1562b3 | 5028 | s_alpha_align (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5029 | { |
5030 | int align; | |
5031 | char fill, *pfill; | |
198f1251 | 5032 | long max_alignment = 16; |
252b5132 RH |
5033 | |
5034 | align = get_absolute_expression (); | |
5035 | if (align > max_alignment) | |
5036 | { | |
5037 | align = max_alignment; | |
5038 | as_bad (_("Alignment too large: %d. assumed"), align); | |
5039 | } | |
5040 | else if (align < 0) | |
5041 | { | |
5042 | as_warn (_("Alignment negative: 0 assumed")); | |
5043 | align = 0; | |
5044 | } | |
5045 | ||
5046 | if (*input_line_pointer == ',') | |
5047 | { | |
5048 | input_line_pointer++; | |
5049 | fill = get_absolute_expression (); | |
5050 | pfill = &fill; | |
5051 | } | |
5052 | else | |
5053 | pfill = NULL; | |
5054 | ||
5055 | if (align != 0) | |
5056 | { | |
5057 | alpha_auto_align_on = 1; | |
af3ecb4a | 5058 | alpha_align (align, pfill, NULL, 1); |
252b5132 RH |
5059 | } |
5060 | else | |
5061 | { | |
5062 | alpha_auto_align_on = 0; | |
5063 | } | |
af3ecb4a | 5064 | alpha_insn_label = NULL; |
252b5132 RH |
5065 | |
5066 | demand_empty_rest_of_line (); | |
5067 | } | |
5068 | ||
5069 | /* Hook the normal string processor to reset known alignment. */ | |
5070 | ||
5071 | static void | |
ea1562b3 | 5072 | s_alpha_stringer (int terminate) |
252b5132 RH |
5073 | { |
5074 | alpha_current_align = 0; | |
5075 | alpha_insn_label = NULL; | |
38a57ae7 | 5076 | stringer (8 + terminate); |
252b5132 RH |
5077 | } |
5078 | ||
5079 | /* Hook the normal space processing to reset known alignment. */ | |
5080 | ||
5081 | static void | |
ea1562b3 | 5082 | s_alpha_space (int ignore) |
252b5132 RH |
5083 | { |
5084 | alpha_current_align = 0; | |
5085 | alpha_insn_label = NULL; | |
5086 | s_space (ignore); | |
5087 | } | |
5088 | ||
5089 | /* Hook into cons for auto-alignment. */ | |
5090 | ||
5091 | void | |
ea1562b3 | 5092 | alpha_cons_align (int size) |
252b5132 RH |
5093 | { |
5094 | int log_size; | |
5095 | ||
5096 | log_size = 0; | |
5097 | while ((size >>= 1) != 0) | |
5098 | ++log_size; | |
5099 | ||
5100 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
5101 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
5102 | if (alpha_current_align > log_size) | |
5103 | alpha_current_align = log_size; | |
5104 | alpha_insn_label = NULL; | |
5105 | } | |
5106 | ||
5107 | /* Here come the .uword, .ulong, and .uquad explicitly unaligned | |
5108 | pseudos. We just turn off auto-alignment and call down to cons. */ | |
5109 | ||
5110 | static void | |
ea1562b3 | 5111 | s_alpha_ucons (int bytes) |
252b5132 RH |
5112 | { |
5113 | int hold = alpha_auto_align_on; | |
5114 | alpha_auto_align_on = 0; | |
5115 | cons (bytes); | |
5116 | alpha_auto_align_on = hold; | |
5117 | } | |
5118 | ||
5119 | /* Switch the working cpu type. */ | |
5120 | ||
5121 | static void | |
ea1562b3 | 5122 | s_alpha_arch (int ignored ATTRIBUTE_UNUSED) |
252b5132 RH |
5123 | { |
5124 | char *name, ch; | |
5125 | const struct cpu_type *p; | |
5126 | ||
5127 | SKIP_WHITESPACE (); | |
d02603dc NC |
5128 | |
5129 | ch = get_symbol_name (&name); | |
252b5132 RH |
5130 | |
5131 | for (p = cpu_types; p->name; ++p) | |
32ff5c2e | 5132 | if (strcmp (name, p->name) == 0) |
252b5132 | 5133 | { |
1aad8cf8 | 5134 | alpha_target_name = p->name, alpha_target = p->flags; |
252b5132 RH |
5135 | goto found; |
5136 | } | |
20203fb9 | 5137 | as_warn (_("Unknown CPU identifier `%s'"), name); |
252b5132 RH |
5138 | |
5139 | found: | |
d02603dc | 5140 | (void) restore_line_pointer (ch); |
252b5132 RH |
5141 | demand_empty_rest_of_line (); |
5142 | } | |
252b5132 | 5143 | \f |
252b5132 RH |
5144 | #ifdef DEBUG1 |
5145 | /* print token expression with alpha specific extension. */ | |
5146 | ||
5147 | static void | |
ea1562b3 | 5148 | alpha_print_token (FILE *f, const expressionS *exp) |
252b5132 RH |
5149 | { |
5150 | switch (exp->X_op) | |
5151 | { | |
1aad8cf8 KH |
5152 | case O_cpregister: |
5153 | putc (',', f); | |
5154 | /* FALLTHRU */ | |
5155 | case O_pregister: | |
5156 | putc ('(', f); | |
5157 | { | |
5158 | expressionS nexp = *exp; | |
5159 | nexp.X_op = O_register; | |
198f1251 | 5160 | print_expr_1 (f, &nexp); |
1aad8cf8 KH |
5161 | } |
5162 | putc (')', f); | |
5163 | break; | |
5164 | default: | |
198f1251 | 5165 | print_expr_1 (f, exp); |
1aad8cf8 | 5166 | break; |
252b5132 | 5167 | } |
252b5132 RH |
5168 | } |
5169 | #endif | |
5170 | \f | |
5171 | /* The target specific pseudo-ops which we support. */ | |
5172 | ||
ea1562b3 NC |
5173 | const pseudo_typeS md_pseudo_table[] = |
5174 | { | |
252b5132 | 5175 | #ifdef OBJ_ECOFF |
ea1562b3 | 5176 | {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */ |
252b5132 RH |
5177 | {"rdata", s_alpha_rdata, 0}, |
5178 | #endif | |
5179 | {"text", s_alpha_text, 0}, | |
5180 | {"data", s_alpha_data, 0}, | |
5181 | #ifdef OBJ_ECOFF | |
5182 | {"sdata", s_alpha_sdata, 0}, | |
5183 | #endif | |
5184 | #ifdef OBJ_ELF | |
5185 | {"section", s_alpha_section, 0}, | |
5186 | {"section.s", s_alpha_section, 0}, | |
5187 | {"sect", s_alpha_section, 0}, | |
5188 | {"sect.s", s_alpha_section, 0}, | |
5189 | #endif | |
5190 | #ifdef OBJ_EVAX | |
198f1251 TG |
5191 | {"section", s_alpha_section, 0}, |
5192 | {"literals", s_alpha_literals, 0}, | |
5193 | {"pdesc", s_alpha_pdesc, 0}, | |
5194 | {"name", s_alpha_name, 0}, | |
5195 | {"linkage", s_alpha_linkage, 0}, | |
5196 | {"code_address", s_alpha_code_address, 0}, | |
5197 | {"ent", s_alpha_ent, 0}, | |
5198 | {"frame", s_alpha_frame, 0}, | |
5199 | {"fp_save", s_alpha_fp_save, 0}, | |
5200 | {"mask", s_alpha_mask, 0}, | |
5201 | {"fmask", s_alpha_fmask, 0}, | |
5202 | {"end", s_alpha_end, 0}, | |
5203 | {"file", s_alpha_file, 0}, | |
5204 | {"rdata", s_alpha_section, 1}, | |
5205 | {"comm", s_alpha_comm, 0}, | |
5206 | {"link", s_alpha_section, 3}, | |
5207 | {"ctors", s_alpha_section, 4}, | |
5208 | {"dtors", s_alpha_section, 5}, | |
5209 | {"handler", s_alpha_handler, 0}, | |
5210 | {"handler_data", s_alpha_handler, 1}, | |
252b5132 RH |
5211 | #endif |
5212 | #ifdef OBJ_ELF | |
5213 | /* Frame related pseudos. */ | |
5214 | {"ent", s_alpha_ent, 0}, | |
5215 | {"end", s_alpha_end, 0}, | |
5216 | {"mask", s_alpha_mask, 0}, | |
5217 | {"fmask", s_alpha_mask, 1}, | |
5218 | {"frame", s_alpha_frame, 0}, | |
5219 | {"prologue", s_alpha_prologue, 0}, | |
4dc7ead9 RH |
5220 | {"file", s_alpha_file, 5}, |
5221 | {"loc", s_alpha_loc, 9}, | |
a8316fe2 RH |
5222 | {"stabs", s_alpha_stab, 's'}, |
5223 | {"stabn", s_alpha_stab, 'n'}, | |
f4b97536 | 5224 | {"usepv", s_alpha_usepv, 0}, |
252b5132 RH |
5225 | /* COFF debugging related pseudos. */ |
5226 | {"begin", s_alpha_coff_wrapper, 0}, | |
5227 | {"bend", s_alpha_coff_wrapper, 1}, | |
5228 | {"def", s_alpha_coff_wrapper, 2}, | |
5229 | {"dim", s_alpha_coff_wrapper, 3}, | |
5230 | {"endef", s_alpha_coff_wrapper, 4}, | |
4dc7ead9 RH |
5231 | {"scl", s_alpha_coff_wrapper, 5}, |
5232 | {"tag", s_alpha_coff_wrapper, 6}, | |
5233 | {"val", s_alpha_coff_wrapper, 7}, | |
198f1251 TG |
5234 | #else |
5235 | #ifdef OBJ_EVAX | |
5236 | {"prologue", s_alpha_prologue, 0}, | |
252b5132 RH |
5237 | #else |
5238 | {"prologue", s_ignore, 0}, | |
198f1251 | 5239 | #endif |
252b5132 RH |
5240 | #endif |
5241 | {"gprel32", s_alpha_gprel32, 0}, | |
5242 | {"t_floating", s_alpha_float_cons, 'd'}, | |
5243 | {"s_floating", s_alpha_float_cons, 'f'}, | |
5244 | {"f_floating", s_alpha_float_cons, 'F'}, | |
5245 | {"g_floating", s_alpha_float_cons, 'G'}, | |
5246 | {"d_floating", s_alpha_float_cons, 'D'}, | |
5247 | ||
5248 | {"proc", s_alpha_proc, 0}, | |
5249 | {"aproc", s_alpha_proc, 1}, | |
5250 | {"set", s_alpha_set, 0}, | |
5251 | {"reguse", s_ignore, 0}, | |
5252 | {"livereg", s_ignore, 0}, | |
5253 | {"base", s_alpha_base, 0}, /*??*/ | |
5254 | {"option", s_ignore, 0}, | |
5255 | {"aent", s_ignore, 0}, | |
5256 | {"ugen", s_ignore, 0}, | |
5257 | {"eflag", s_ignore, 0}, | |
5258 | ||
5259 | {"align", s_alpha_align, 0}, | |
5260 | {"double", s_alpha_float_cons, 'd'}, | |
5261 | {"float", s_alpha_float_cons, 'f'}, | |
5262 | {"single", s_alpha_float_cons, 'f'}, | |
5263 | {"ascii", s_alpha_stringer, 0}, | |
5264 | {"asciz", s_alpha_stringer, 1}, | |
5265 | {"string", s_alpha_stringer, 1}, | |
5266 | {"space", s_alpha_space, 0}, | |
5267 | {"skip", s_alpha_space, 0}, | |
5268 | {"zero", s_alpha_space, 0}, | |
5269 | ||
5270 | /* Unaligned data pseudos. */ | |
5271 | {"uword", s_alpha_ucons, 2}, | |
5272 | {"ulong", s_alpha_ucons, 4}, | |
5273 | {"uquad", s_alpha_ucons, 8}, | |
5274 | ||
5275 | #ifdef OBJ_ELF | |
5276 | /* Dwarf wants these versions of unaligned. */ | |
5277 | {"2byte", s_alpha_ucons, 2}, | |
5278 | {"4byte", s_alpha_ucons, 4}, | |
5279 | {"8byte", s_alpha_ucons, 8}, | |
5280 | #endif | |
5281 | ||
5282 | /* We don't do any optimizing, so we can safely ignore these. */ | |
5283 | {"noalias", s_ignore, 0}, | |
5284 | {"alias", s_ignore, 0}, | |
5285 | ||
5286 | {"arch", s_alpha_arch, 0}, | |
5287 | ||
5288 | {NULL, 0, 0}, | |
5289 | }; | |
252b5132 | 5290 | \f |
ea1562b3 | 5291 | #ifdef OBJ_ECOFF |
252b5132 | 5292 | |
ea1562b3 NC |
5293 | /* @@@ GP selection voodoo. All of this seems overly complicated and |
5294 | unnecessary; which is the primary reason it's for ECOFF only. */ | |
ea1562b3 NC |
5295 | |
5296 | static inline void | |
5297 | maybe_set_gp (asection *sec) | |
252b5132 | 5298 | { |
ea1562b3 NC |
5299 | bfd_vma vma; |
5300 | ||
5301 | if (!sec) | |
5302 | return; | |
a0f49396 | 5303 | vma = bfd_get_section_vma (sec->owner, sec); |
ea1562b3 NC |
5304 | if (vma && vma < alpha_gp_value) |
5305 | alpha_gp_value = vma; | |
5306 | } | |
5307 | ||
5308 | static void | |
5309 | select_gp_value (void) | |
5310 | { | |
9c2799c2 | 5311 | gas_assert (alpha_gp_value == 0); |
ea1562b3 NC |
5312 | |
5313 | /* Get minus-one in whatever width... */ | |
5314 | alpha_gp_value = 0; | |
5315 | alpha_gp_value--; | |
5316 | ||
5317 | /* Select the smallest VMA of these existing sections. */ | |
5318 | maybe_set_gp (alpha_lita_section); | |
5319 | ||
5320 | /* @@ Will a simple 0x8000 work here? If not, why not? */ | |
5321 | #define GP_ADJUSTMENT (0x8000 - 0x10) | |
5322 | ||
5323 | alpha_gp_value += GP_ADJUSTMENT; | |
5324 | ||
5325 | S_SET_VALUE (alpha_gp_symbol, alpha_gp_value); | |
5326 | ||
5327 | #ifdef DEBUG1 | |
5328 | printf (_("Chose GP value of %lx\n"), alpha_gp_value); | |
5329 | #endif | |
5330 | } | |
5331 | #endif /* OBJ_ECOFF */ | |
5332 | ||
5333 | #ifdef OBJ_ELF | |
5334 | /* Map 's' to SHF_ALPHA_GPREL. */ | |
5335 | ||
01e1a5bc | 5336 | bfd_vma |
6d4af3c2 | 5337 | alpha_elf_section_letter (int letter, const char **ptr_msg) |
ea1562b3 NC |
5338 | { |
5339 | if (letter == 's') | |
5340 | return SHF_ALPHA_GPREL; | |
5341 | ||
8f3bae45 | 5342 | *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string"); |
ea1562b3 NC |
5343 | return -1; |
5344 | } | |
5345 | ||
5346 | /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ | |
5347 | ||
5348 | flagword | |
01e1a5bc | 5349 | alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED) |
ea1562b3 NC |
5350 | { |
5351 | if (attr & SHF_ALPHA_GPREL) | |
5352 | flags |= SEC_SMALL_DATA; | |
5353 | return flags; | |
5354 | } | |
5355 | #endif /* OBJ_ELF */ | |
5356 | ||
5357 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents | |
5358 | of an rs_align_code fragment. */ | |
5359 | ||
5360 | void | |
5361 | alpha_handle_align (fragS *fragp) | |
5362 | { | |
d9235011 TS |
5363 | static unsigned char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f }; |
5364 | static unsigned char const nopunop[8] = | |
ea1562b3 NC |
5365 | { |
5366 | 0x1f, 0x04, 0xff, 0x47, | |
5367 | 0x00, 0x00, 0xfe, 0x2f | |
5368 | }; | |
5369 | ||
5370 | int bytes, fix; | |
5371 | char *p; | |
5372 | ||
5373 | if (fragp->fr_type != rs_align_code) | |
5374 | return; | |
5375 | ||
5376 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
5377 | p = fragp->fr_literal + fragp->fr_fix; | |
5378 | fix = 0; | |
5379 | ||
5380 | if (bytes & 3) | |
5381 | { | |
5382 | fix = bytes & 3; | |
5383 | memset (p, 0, fix); | |
5384 | p += fix; | |
5385 | bytes -= fix; | |
5386 | } | |
5387 | ||
5388 | if (bytes & 4) | |
5389 | { | |
5390 | memcpy (p, unop, 4); | |
5391 | p += 4; | |
5392 | bytes -= 4; | |
5393 | fix += 4; | |
5394 | } | |
5395 | ||
5396 | memcpy (p, nopunop, 8); | |
5397 | ||
5398 | fragp->fr_fix += fix; | |
5399 | fragp->fr_var = 8; | |
5400 | } | |
5401 | \f | |
5402 | /* Public interface functions. */ | |
5403 | ||
5404 | /* This function is called once, at assembler startup time. It sets | |
5405 | up all the tables, etc. that the MD part of the assembler will | |
5406 | need, that can be determined before arguments are parsed. */ | |
5407 | ||
5408 | void | |
5409 | md_begin (void) | |
5410 | { | |
5411 | unsigned int i; | |
5412 | ||
5413 | /* Verify that X_op field is wide enough. */ | |
5414 | { | |
5415 | expressionS e; | |
5416 | ||
5417 | e.X_op = O_max; | |
9c2799c2 | 5418 | gas_assert (e.X_op == O_max); |
ea1562b3 NC |
5419 | } |
5420 | ||
5421 | /* Create the opcode hash table. */ | |
5422 | alpha_opcode_hash = hash_new (); | |
5423 | ||
5424 | for (i = 0; i < alpha_num_opcodes;) | |
5425 | { | |
5426 | const char *name, *retval, *slash; | |
5427 | ||
5428 | name = alpha_opcodes[i].name; | |
5429 | retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]); | |
5430 | if (retval) | |
5431 | as_fatal (_("internal error: can't hash opcode `%s': %s"), | |
5432 | name, retval); | |
5433 | ||
5434 | /* Some opcodes include modifiers of various sorts with a "/mod" | |
5435 | syntax, like the architecture manual suggests. However, for | |
5436 | use with gcc at least, we also need access to those same opcodes | |
5437 | without the "/". */ | |
5438 | ||
5439 | if ((slash = strchr (name, '/')) != NULL) | |
5440 | { | |
add39d23 | 5441 | char *p = XNEWVEC (char, strlen (name)); |
ea1562b3 NC |
5442 | |
5443 | memcpy (p, name, slash - name); | |
5444 | strcpy (p + (slash - name), slash + 1); | |
5445 | ||
5446 | (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]); | |
5447 | /* Ignore failures -- the opcode table does duplicate some | |
5448 | variants in different forms, like "hw_stq" and "hw_st/q". */ | |
5449 | } | |
5450 | ||
5451 | while (++i < alpha_num_opcodes | |
5452 | && (alpha_opcodes[i].name == name | |
5453 | || !strcmp (alpha_opcodes[i].name, name))) | |
5454 | continue; | |
5455 | } | |
5456 | ||
5457 | /* Create the macro hash table. */ | |
5458 | alpha_macro_hash = hash_new (); | |
5459 | ||
5460 | for (i = 0; i < alpha_num_macros;) | |
5461 | { | |
5462 | const char *name, *retval; | |
5463 | ||
5464 | name = alpha_macros[i].name; | |
5465 | retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]); | |
5466 | if (retval) | |
5467 | as_fatal (_("internal error: can't hash macro `%s': %s"), | |
5468 | name, retval); | |
5469 | ||
5470 | while (++i < alpha_num_macros | |
5471 | && (alpha_macros[i].name == name | |
5472 | || !strcmp (alpha_macros[i].name, name))) | |
5473 | continue; | |
5474 | } | |
5475 | ||
5476 | /* Construct symbols for each of the registers. */ | |
5477 | for (i = 0; i < 32; ++i) | |
5478 | { | |
5479 | char name[4]; | |
5480 | ||
5481 | sprintf (name, "$%d", i); | |
5482 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5483 | &zero_address_frag); | |
5484 | } | |
5485 | ||
5486 | for (; i < 64; ++i) | |
5487 | { | |
5488 | char name[5]; | |
5489 | ||
5490 | sprintf (name, "$f%d", i - 32); | |
5491 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5492 | &zero_address_frag); | |
5493 | } | |
5494 | ||
5495 | /* Create the special symbols and sections we'll be using. */ | |
5496 | ||
5497 | /* So .sbss will get used for tiny objects. */ | |
5498 | bfd_set_gp_size (stdoutput, g_switch_value); | |
5499 | ||
5500 | #ifdef OBJ_ECOFF | |
5501 | create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol); | |
5502 | ||
5503 | /* For handling the GP, create a symbol that won't be output in the | |
5504 | symbol table. We'll edit it out of relocs later. */ | |
5505 | alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000, | |
5506 | &zero_address_frag); | |
5507 | #endif | |
5508 | ||
5509 | #ifdef OBJ_EVAX | |
5510 | create_literal_section (".link", &alpha_link_section, &alpha_link_symbol); | |
5511 | #endif | |
5512 | ||
5513 | #ifdef OBJ_ELF | |
5514 | if (ECOFF_DEBUGGING) | |
5515 | { | |
5516 | segT sec = subseg_new (".mdebug", (subsegT) 0); | |
5517 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
5518 | bfd_set_section_alignment (stdoutput, sec, 3); | |
5519 | } | |
5520 | #endif | |
5521 | ||
5522 | /* Create literal lookup hash table. */ | |
5523 | alpha_literal_hash = hash_new (); | |
5524 | ||
5525 | subseg_set (text_section, 0); | |
5526 | } | |
5527 | ||
5528 | /* The public interface to the instruction assembler. */ | |
5529 | ||
5530 | void | |
5531 | md_assemble (char *str) | |
5532 | { | |
5533 | /* Current maximum is 13. */ | |
5534 | char opname[32]; | |
5535 | expressionS tok[MAX_INSN_ARGS]; | |
5536 | int ntok, trunclen; | |
5537 | size_t opnamelen; | |
5538 | ||
5539 | /* Split off the opcode. */ | |
5540 | opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819"); | |
5541 | trunclen = (opnamelen < sizeof (opname) - 1 | |
5542 | ? opnamelen | |
5543 | : sizeof (opname) - 1); | |
5544 | memcpy (opname, str, trunclen); | |
5545 | opname[trunclen] = '\0'; | |
5546 | ||
5547 | /* Tokenize the rest of the line. */ | |
5548 | if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0) | |
5549 | { | |
5550 | if (ntok != TOKENIZE_ERROR_REPORT) | |
5551 | as_bad (_("syntax error")); | |
5552 | ||
5553 | return; | |
5554 | } | |
5555 | ||
5556 | /* Finish it off. */ | |
5557 | assemble_tokens (opname, tok, ntok, alpha_macros_on); | |
5558 | } | |
5559 | ||
5560 | /* Round up a section's size to the appropriate boundary. */ | |
5561 | ||
5562 | valueT | |
5563 | md_section_align (segT seg, valueT size) | |
5564 | { | |
5565 | int align = bfd_get_section_alignment (stdoutput, seg); | |
5566 | valueT mask = ((valueT) 1 << align) - 1; | |
5567 | ||
5568 | return (size + mask) & ~mask; | |
5569 | } | |
5570 | ||
5571 | /* Turn a string in input_line_pointer into a floating point constant | |
5572 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
5573 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
5574 | returned, or NULL on OK. */ | |
5575 | ||
6d4af3c2 | 5576 | const char * |
ea1562b3 NC |
5577 | md_atof (int type, char *litP, int *sizeP) |
5578 | { | |
6d4af3c2 | 5579 | extern const char *vax_md_atof (int, char *, int *); |
ea1562b3 NC |
5580 | |
5581 | switch (type) | |
5582 | { | |
5583 | /* VAX floats. */ | |
5584 | case 'G': | |
499ac353 | 5585 | /* vax_md_atof() doesn't like "G" for some reason. */ |
ea1562b3 | 5586 | type = 'g'; |
1a0670f3 | 5587 | /* Fall through. */ |
ea1562b3 NC |
5588 | case 'F': |
5589 | case 'D': | |
5590 | return vax_md_atof (type, litP, sizeP); | |
5591 | ||
ea1562b3 | 5592 | default: |
499ac353 | 5593 | return ieee_md_atof (type, litP, sizeP, FALSE); |
ea1562b3 | 5594 | } |
ea1562b3 NC |
5595 | } |
5596 | ||
5597 | /* Take care of the target-specific command-line options. */ | |
5598 | ||
5599 | int | |
17b9d67d | 5600 | md_parse_option (int c, const char *arg) |
ea1562b3 NC |
5601 | { |
5602 | switch (c) | |
5603 | { | |
5604 | case 'F': | |
5605 | alpha_nofloats_on = 1; | |
5606 | break; | |
5607 | ||
5608 | case OPTION_32ADDR: | |
5609 | alpha_addr32_on = 1; | |
5610 | break; | |
5611 | ||
5612 | case 'g': | |
5613 | alpha_debug = 1; | |
5614 | break; | |
5615 | ||
5616 | case 'G': | |
5617 | g_switch_value = atoi (arg); | |
5618 | break; | |
5619 | ||
5620 | case 'm': | |
5621 | { | |
5622 | const struct cpu_type *p; | |
5623 | ||
5624 | for (p = cpu_types; p->name; ++p) | |
5625 | if (strcmp (arg, p->name) == 0) | |
5626 | { | |
5627 | alpha_target_name = p->name, alpha_target = p->flags; | |
5628 | goto found; | |
5629 | } | |
5630 | as_warn (_("Unknown CPU identifier `%s'"), arg); | |
5631 | found:; | |
5632 | } | |
5633 | break; | |
5634 | ||
5635 | #ifdef OBJ_EVAX | |
5636 | case '+': /* For g++. Hash any name > 63 chars long. */ | |
5637 | alpha_flag_hash_long_names = 1; | |
5638 | break; | |
5639 | ||
5640 | case 'H': /* Show new symbol after hash truncation. */ | |
5641 | alpha_flag_show_after_trunc = 1; | |
5642 | break; | |
5643 | ||
5644 | case 'h': /* For gnu-c/vax compatibility. */ | |
5645 | break; | |
198f1251 TG |
5646 | |
5647 | case OPTION_REPLACE: | |
5648 | alpha_flag_replace = 1; | |
5649 | break; | |
5650 | ||
5651 | case OPTION_NOREPLACE: | |
5652 | alpha_flag_replace = 0; | |
5653 | break; | |
ea1562b3 NC |
5654 | #endif |
5655 | ||
5656 | case OPTION_RELAX: | |
5657 | alpha_flag_relax = 1; | |
5658 | break; | |
5659 | ||
5660 | #ifdef OBJ_ELF | |
5661 | case OPTION_MDEBUG: | |
5662 | alpha_flag_mdebug = 1; | |
5663 | break; | |
5664 | case OPTION_NO_MDEBUG: | |
5665 | alpha_flag_mdebug = 0; | |
5666 | break; | |
5667 | #endif | |
5668 | ||
5669 | default: | |
5670 | return 0; | |
5671 | } | |
5672 | ||
5673 | return 1; | |
5674 | } | |
5675 | ||
5676 | /* Print a description of the command-line options that we accept. */ | |
5677 | ||
5678 | void | |
5679 | md_show_usage (FILE *stream) | |
5680 | { | |
5681 | fputs (_("\ | |
5682 | Alpha options:\n\ | |
5683 | -32addr treat addresses as 32-bit values\n\ | |
5684 | -F lack floating point instructions support\n\ | |
5685 | -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ | |
5686 | specify variant of Alpha architecture\n\ | |
5687 | -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ | |
5688 | these variants include PALcode opcodes\n"), | |
5689 | stream); | |
5690 | #ifdef OBJ_EVAX | |
5691 | fputs (_("\ | |
5692 | VMS options:\n\ | |
198f1251 TG |
5693 | -+ encode (don't truncate) names longer than 64 characters\n\ |
5694 | -H show new symbol after hash truncation\n\ | |
5695 | -replace/-noreplace enable or disable the optimization of procedure calls\n"), | |
ea1562b3 NC |
5696 | stream); |
5697 | #endif | |
5698 | } | |
5699 | ||
5700 | /* Decide from what point a pc-relative relocation is relative to, | |
5701 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
5702 | ||
5703 | long | |
5704 | md_pcrel_from (fixS *fixP) | |
5705 | { | |
5706 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; | |
5707 | ||
5708 | switch (fixP->fx_r_type) | |
5709 | { | |
5710 | case BFD_RELOC_23_PCREL_S2: | |
5711 | case BFD_RELOC_ALPHA_HINT: | |
5712 | case BFD_RELOC_ALPHA_BRSGP: | |
5713 | return addr + 4; | |
5714 | default: | |
5715 | return addr; | |
5716 | } | |
5717 | } | |
5718 | ||
5719 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
5720 | ignored; perhaps it was once meaningful, but now it is historical. | |
5721 | To indicate that a fixup has been eliminated, set fixP->fx_done. | |
5722 | ||
5723 | For ELF, here it is that we transform the GPDISP_HI16 reloc we used | |
5724 | internally into the GPDISP reloc used externally. We had to do | |
5725 | this so that we'd have the GPDISP_LO16 reloc as a tag to compute | |
5726 | the distance to the "lda" instruction for setting the addend to | |
5727 | GPDISP. */ | |
5728 | ||
5729 | void | |
55cf6793 | 5730 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
ea1562b3 NC |
5731 | { |
5732 | char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; | |
5733 | valueT value = * valP; | |
5734 | unsigned image, size; | |
5735 | ||
5736 | switch (fixP->fx_r_type) | |
5737 | { | |
5738 | /* The GPDISP relocations are processed internally with a symbol | |
5739 | referring to the current function's section; we need to drop | |
5740 | in a value which, when added to the address of the start of | |
5741 | the function, gives the desired GP. */ | |
5742 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
5743 | { | |
5744 | fixS *next = fixP->fx_next; | |
5745 | ||
5746 | /* With user-specified !gpdisp relocations, we can be missing | |
5747 | the matching LO16 reloc. We will have already issued an | |
5748 | error message. */ | |
5749 | if (next) | |
5750 | fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where | |
5751 | - fixP->fx_frag->fr_address - fixP->fx_where); | |
5752 | ||
5753 | value = (value - sign_extend_16 (value)) >> 16; | |
5754 | } | |
5755 | #ifdef OBJ_ELF | |
5756 | fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP; | |
5757 | #endif | |
5758 | goto do_reloc_gp; | |
5759 | ||
5760 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
5761 | value = sign_extend_16 (value); | |
5762 | fixP->fx_offset = 0; | |
5763 | #ifdef OBJ_ELF | |
5764 | fixP->fx_done = 1; | |
5765 | #endif | |
5766 | ||
5767 | do_reloc_gp: | |
5768 | fixP->fx_addsy = section_symbol (seg); | |
5769 | md_number_to_chars (fixpos, value, 2); | |
5770 | break; | |
5771 | ||
5772 | case BFD_RELOC_16: | |
5773 | if (fixP->fx_pcrel) | |
5774 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
5775 | size = 2; | |
5776 | goto do_reloc_xx; | |
5777 | ||
5778 | case BFD_RELOC_32: | |
5779 | if (fixP->fx_pcrel) | |
5780 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
5781 | size = 4; | |
5782 | goto do_reloc_xx; | |
5783 | ||
5784 | case BFD_RELOC_64: | |
5785 | if (fixP->fx_pcrel) | |
5786 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
5787 | size = 8; | |
5788 | ||
5789 | do_reloc_xx: | |
5790 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5791 | { | |
5792 | md_number_to_chars (fixpos, value, size); | |
5793 | goto done; | |
5794 | } | |
5795 | return; | |
5796 | ||
5797 | #ifdef OBJ_ECOFF | |
5798 | case BFD_RELOC_GPREL32: | |
9c2799c2 | 5799 | gas_assert (fixP->fx_subsy == alpha_gp_symbol); |
ea1562b3 NC |
5800 | fixP->fx_subsy = 0; |
5801 | /* FIXME: inherited this obliviousness of `value' -- why? */ | |
5802 | md_number_to_chars (fixpos, -alpha_gp_value, 4); | |
5803 | break; | |
5804 | #else | |
5805 | case BFD_RELOC_GPREL32: | |
5806 | #endif | |
5807 | case BFD_RELOC_GPREL16: | |
5808 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
5809 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
5810 | return; | |
5811 | ||
5812 | case BFD_RELOC_23_PCREL_S2: | |
5813 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5814 | { | |
5815 | image = bfd_getl32 (fixpos); | |
5816 | image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF); | |
5817 | goto write_done; | |
5818 | } | |
5819 | return; | |
5820 | ||
5821 | case BFD_RELOC_ALPHA_HINT: | |
5822 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5823 | { | |
5824 | image = bfd_getl32 (fixpos); | |
5825 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5826 | goto write_done; | |
5827 | } | |
5828 | return; | |
5829 | ||
5830 | #ifdef OBJ_ELF | |
5831 | case BFD_RELOC_ALPHA_BRSGP: | |
5832 | return; | |
5833 | ||
5834 | case BFD_RELOC_ALPHA_TLSGD: | |
5835 | case BFD_RELOC_ALPHA_TLSLDM: | |
5836 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
5837 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
5838 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
5839 | case BFD_RELOC_ALPHA_DTPREL16: | |
5840 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
5841 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
5842 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
5843 | case BFD_RELOC_ALPHA_TPREL16: | |
5844 | if (fixP->fx_addsy) | |
5845 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
5846 | return; | |
5847 | #endif | |
5848 | ||
5849 | #ifdef OBJ_ECOFF | |
5850 | case BFD_RELOC_ALPHA_LITERAL: | |
5851 | md_number_to_chars (fixpos, value, 2); | |
5852 | return; | |
5853 | #endif | |
5854 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
5855 | case BFD_RELOC_ALPHA_LITUSE: | |
5856 | case BFD_RELOC_ALPHA_LINKAGE: | |
5857 | case BFD_RELOC_ALPHA_CODEADDR: | |
5858 | return; | |
5859 | ||
198f1251 TG |
5860 | #ifdef OBJ_EVAX |
5861 | case BFD_RELOC_ALPHA_NOP: | |
5862 | value -= (8 + 4); /* PC-relative, base is jsr+4. */ | |
5863 | ||
5864 | /* From B.4.5.2 of the OpenVMS Linker Utility Manual: | |
5865 | "Finally, the ETIR$C_STC_BSR command passes the same address | |
5866 | as ETIR$C_STC_NOP (so that they will fail or succeed together), | |
5867 | and the same test is done again." */ | |
5868 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5869 | { | |
5870 | fixP->fx_addnumber = -value; | |
5871 | return; | |
5872 | } | |
5873 | ||
5874 | if ((abs (value) >> 2) & ~0xfffff) | |
5875 | goto done; | |
5876 | else | |
5877 | { | |
5878 | /* Change to a nop. */ | |
5879 | image = 0x47FF041F; | |
5880 | goto write_done; | |
5881 | } | |
5882 | ||
5883 | case BFD_RELOC_ALPHA_LDA: | |
5884 | /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute | |
5885 | the value for an O_subtract. */ | |
5886 | if (fixP->fx_addsy | |
5887 | && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5888 | { | |
5889 | fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value; | |
5890 | return; | |
5891 | } | |
5892 | ||
5893 | if ((abs (value)) & ~0x7fff) | |
5894 | goto done; | |
5895 | else | |
5896 | { | |
5897 | /* Change to an lda. */ | |
5898 | image = 0x237B0000 | (value & 0xFFFF); | |
5899 | goto write_done; | |
5900 | } | |
5901 | ||
5902 | case BFD_RELOC_ALPHA_BSR: | |
5903 | case BFD_RELOC_ALPHA_BOH: | |
5904 | value -= 4; /* PC-relative, base is jsr+4. */ | |
5905 | ||
5906 | /* See comment in the BFD_RELOC_ALPHA_NOP case above. */ | |
5907 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5908 | { | |
5909 | fixP->fx_addnumber = -value; | |
5910 | return; | |
5911 | } | |
5912 | ||
5913 | if ((abs (value) >> 2) & ~0xfffff) | |
5914 | { | |
5915 | /* Out of range. */ | |
5916 | if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH) | |
5917 | { | |
5918 | /* Add a hint. */ | |
5919 | image = bfd_getl32(fixpos); | |
5920 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5921 | goto write_done; | |
5922 | } | |
5923 | goto done; | |
5924 | } | |
5925 | else | |
5926 | { | |
5927 | /* Change to a branch. */ | |
5928 | image = 0xD3400000 | ((value >> 2) & 0x1FFFFF); | |
5929 | goto write_done; | |
5930 | } | |
5931 | #endif | |
5932 | ||
ea1562b3 NC |
5933 | case BFD_RELOC_VTABLE_INHERIT: |
5934 | case BFD_RELOC_VTABLE_ENTRY: | |
5935 | return; | |
5936 | ||
5937 | default: | |
5938 | { | |
5939 | const struct alpha_operand *operand; | |
5940 | ||
5941 | if ((int) fixP->fx_r_type >= 0) | |
5942 | as_fatal (_("unhandled relocation type %s"), | |
5943 | bfd_get_reloc_code_name (fixP->fx_r_type)); | |
5944 | ||
9c2799c2 | 5945 | gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands); |
ea1562b3 NC |
5946 | operand = &alpha_operands[-(int) fixP->fx_r_type]; |
5947 | ||
5948 | /* The rest of these fixups only exist internally during symbol | |
5949 | resolution and have no representation in the object file. | |
5950 | Therefore they must be completely resolved as constants. */ | |
5951 | ||
5952 | if (fixP->fx_addsy != 0 | |
5953 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section) | |
5954 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
5955 | _("non-absolute expression in constant field")); | |
5956 | ||
5957 | image = bfd_getl32 (fixpos); | |
5958 | image = insert_operand (image, operand, (offsetT) value, | |
5959 | fixP->fx_file, fixP->fx_line); | |
5960 | } | |
5961 | goto write_done; | |
5962 | } | |
5963 | ||
5964 | if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0) | |
5965 | return; | |
5966 | else | |
5967 | { | |
5968 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
5969 | _("type %d reloc done?\n"), (int) fixP->fx_r_type); | |
5970 | goto done; | |
5971 | } | |
5972 | ||
5973 | write_done: | |
5974 | md_number_to_chars (fixpos, image, 4); | |
5975 | ||
5976 | done: | |
5977 | fixP->fx_done = 1; | |
5978 | } | |
5979 | ||
5980 | /* Look for a register name in the given symbol. */ | |
5981 | ||
5982 | symbolS * | |
5983 | md_undefined_symbol (char *name) | |
5984 | { | |
5985 | if (*name == '$') | |
5986 | { | |
5987 | int is_float = 0, num; | |
5988 | ||
5989 | switch (*++name) | |
5990 | { | |
5991 | case 'f': | |
5992 | if (name[1] == 'p' && name[2] == '\0') | |
5993 | return alpha_register_table[AXP_REG_FP]; | |
5994 | is_float = 32; | |
5995 | /* Fall through. */ | |
5996 | ||
5997 | case 'r': | |
5998 | if (!ISDIGIT (*++name)) | |
5999 | break; | |
6000 | /* Fall through. */ | |
6001 | ||
6002 | case '0': case '1': case '2': case '3': case '4': | |
6003 | case '5': case '6': case '7': case '8': case '9': | |
6004 | if (name[1] == '\0') | |
6005 | num = name[0] - '0'; | |
6006 | else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0') | |
6007 | { | |
6008 | num = (name[0] - '0') * 10 + name[1] - '0'; | |
6009 | if (num >= 32) | |
6010 | break; | |
6011 | } | |
6012 | else | |
6013 | break; | |
6014 | ||
6015 | if (!alpha_noat_on && (num + is_float) == AXP_REG_AT) | |
6016 | as_warn (_("Used $at without \".set noat\"")); | |
6017 | return alpha_register_table[num + is_float]; | |
6018 | ||
6019 | case 'a': | |
6020 | if (name[1] == 't' && name[2] == '\0') | |
6021 | { | |
6022 | if (!alpha_noat_on) | |
6023 | as_warn (_("Used $at without \".set noat\"")); | |
6024 | return alpha_register_table[AXP_REG_AT]; | |
6025 | } | |
6026 | break; | |
6027 | ||
6028 | case 'g': | |
6029 | if (name[1] == 'p' && name[2] == '\0') | |
6030 | return alpha_register_table[alpha_gp_register]; | |
6031 | break; | |
6032 | ||
6033 | case 's': | |
6034 | if (name[1] == 'p' && name[2] == '\0') | |
6035 | return alpha_register_table[AXP_REG_SP]; | |
6036 | break; | |
6037 | } | |
6038 | } | |
6039 | return NULL; | |
6040 | } | |
6041 | ||
6042 | #ifdef OBJ_ECOFF | |
6043 | /* @@@ Magic ECOFF bits. */ | |
6044 | ||
6045 | void | |
6046 | alpha_frob_ecoff_data (void) | |
6047 | { | |
6048 | select_gp_value (); | |
6049 | /* $zero and $f31 are read-only. */ | |
6050 | alpha_gprmask &= ~1; | |
6051 | alpha_fprmask &= ~1; | |
6052 | } | |
6053 | #endif | |
6054 | ||
6055 | /* Hook to remember a recently defined label so that the auto-align | |
6056 | code can adjust the symbol after we know what alignment will be | |
6057 | required. */ | |
6058 | ||
6059 | void | |
6060 | alpha_define_label (symbolS *sym) | |
6061 | { | |
6062 | alpha_insn_label = sym; | |
07a53e5c RH |
6063 | #ifdef OBJ_ELF |
6064 | dwarf2_emit_label (sym); | |
6065 | #endif | |
ea1562b3 NC |
6066 | } |
6067 | ||
6068 | /* Return true if we must always emit a reloc for a type and false if | |
6069 | there is some hope of resolving it at assembly time. */ | |
6070 | ||
6071 | int | |
6072 | alpha_force_relocation (fixS *f) | |
6073 | { | |
6074 | if (alpha_flag_relax) | |
6075 | return 1; | |
6076 | ||
6077 | switch (f->fx_r_type) | |
6078 | { | |
6079 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6080 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6081 | case BFD_RELOC_ALPHA_GPDISP: | |
6082 | case BFD_RELOC_ALPHA_LITERAL: | |
6083 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6084 | case BFD_RELOC_ALPHA_LITUSE: | |
6085 | case BFD_RELOC_GPREL16: | |
6086 | case BFD_RELOC_GPREL32: | |
6087 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6088 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6089 | case BFD_RELOC_ALPHA_LINKAGE: | |
6090 | case BFD_RELOC_ALPHA_CODEADDR: | |
6091 | case BFD_RELOC_ALPHA_BRSGP: | |
6092 | case BFD_RELOC_ALPHA_TLSGD: | |
6093 | case BFD_RELOC_ALPHA_TLSLDM: | |
6094 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6095 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6096 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6097 | case BFD_RELOC_ALPHA_DTPREL16: | |
6098 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6099 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6100 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6101 | case BFD_RELOC_ALPHA_TPREL16: | |
198f1251 TG |
6102 | #ifdef OBJ_EVAX |
6103 | case BFD_RELOC_ALPHA_NOP: | |
6104 | case BFD_RELOC_ALPHA_BSR: | |
6105 | case BFD_RELOC_ALPHA_LDA: | |
6106 | case BFD_RELOC_ALPHA_BOH: | |
6107 | #endif | |
ea1562b3 | 6108 | return 1; |
252b5132 | 6109 | |
ea1562b3 NC |
6110 | default: |
6111 | break; | |
6112 | } | |
252b5132 | 6113 | |
ea1562b3 | 6114 | return generic_force_reloc (f); |
252b5132 RH |
6115 | } |
6116 | ||
ea1562b3 | 6117 | /* Return true if we can partially resolve a relocation now. */ |
252b5132 | 6118 | |
ea1562b3 NC |
6119 | int |
6120 | alpha_fix_adjustable (fixS *f) | |
252b5132 | 6121 | { |
ea1562b3 NC |
6122 | /* Are there any relocation types for which we must generate a |
6123 | reloc but we can adjust the values contained within it? */ | |
6124 | switch (f->fx_r_type) | |
6125 | { | |
6126 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6127 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6128 | case BFD_RELOC_ALPHA_GPDISP: | |
6129 | return 0; | |
252b5132 | 6130 | |
ea1562b3 NC |
6131 | case BFD_RELOC_ALPHA_LITERAL: |
6132 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6133 | case BFD_RELOC_ALPHA_LITUSE: | |
6134 | case BFD_RELOC_ALPHA_LINKAGE: | |
6135 | case BFD_RELOC_ALPHA_CODEADDR: | |
6136 | return 1; | |
252b5132 | 6137 | |
ea1562b3 NC |
6138 | case BFD_RELOC_VTABLE_ENTRY: |
6139 | case BFD_RELOC_VTABLE_INHERIT: | |
6140 | return 0; | |
252b5132 | 6141 | |
ea1562b3 NC |
6142 | case BFD_RELOC_GPREL16: |
6143 | case BFD_RELOC_GPREL32: | |
6144 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6145 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6146 | case BFD_RELOC_23_PCREL_S2: | |
198f1251 | 6147 | case BFD_RELOC_16: |
ea1562b3 NC |
6148 | case BFD_RELOC_32: |
6149 | case BFD_RELOC_64: | |
6150 | case BFD_RELOC_ALPHA_HINT: | |
6151 | return 1; | |
252b5132 | 6152 | |
ea1562b3 NC |
6153 | case BFD_RELOC_ALPHA_TLSGD: |
6154 | case BFD_RELOC_ALPHA_TLSLDM: | |
6155 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6156 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6157 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6158 | case BFD_RELOC_ALPHA_DTPREL16: | |
6159 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6160 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6161 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6162 | case BFD_RELOC_ALPHA_TPREL16: | |
6163 | /* ??? No idea why we can't return a reference to .tbss+10, but | |
6164 | we're preventing this in the other assemblers. Follow for now. */ | |
6165 | return 0; | |
252b5132 | 6166 | |
ea1562b3 NC |
6167 | #ifdef OBJ_ELF |
6168 | case BFD_RELOC_ALPHA_BRSGP: | |
6169 | /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and | |
6170 | let it get resolved at assembly time. */ | |
6171 | { | |
6172 | symbolS *sym = f->fx_addsy; | |
6173 | const char *name; | |
6174 | int offset = 0; | |
252b5132 | 6175 | |
ea1562b3 NC |
6176 | if (generic_force_reloc (f)) |
6177 | return 0; | |
252b5132 | 6178 | |
ea1562b3 NC |
6179 | switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD) |
6180 | { | |
6181 | case STO_ALPHA_NOPV: | |
6182 | break; | |
6183 | case STO_ALPHA_STD_GPLOAD: | |
6184 | offset = 8; | |
6185 | break; | |
6186 | default: | |
6187 | if (S_IS_LOCAL (sym)) | |
6188 | name = "<local>"; | |
6189 | else | |
6190 | name = S_GET_NAME (sym); | |
6191 | as_bad_where (f->fx_file, f->fx_line, | |
6192 | _("!samegp reloc against symbol without .prologue: %s"), | |
6193 | name); | |
6194 | break; | |
6195 | } | |
6196 | f->fx_r_type = BFD_RELOC_23_PCREL_S2; | |
6197 | f->fx_offset += offset; | |
6198 | return 1; | |
6199 | } | |
252b5132 | 6200 | #endif |
198f1251 TG |
6201 | #ifdef OBJ_EVAX |
6202 | case BFD_RELOC_ALPHA_NOP: | |
6203 | case BFD_RELOC_ALPHA_BSR: | |
6204 | case BFD_RELOC_ALPHA_LDA: | |
6205 | case BFD_RELOC_ALPHA_BOH: | |
6206 | return 1; | |
6207 | #endif | |
d61a78a7 | 6208 | |
ea1562b3 NC |
6209 | default: |
6210 | return 1; | |
6211 | } | |
d61a78a7 RH |
6212 | } |
6213 | ||
ea1562b3 NC |
6214 | /* Generate the BFD reloc to be stuck in the object file from the |
6215 | fixup used internally in the assembler. */ | |
d61a78a7 | 6216 | |
ea1562b3 NC |
6217 | arelent * |
6218 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, | |
6219 | fixS *fixp) | |
d61a78a7 | 6220 | { |
ea1562b3 | 6221 | arelent *reloc; |
d61a78a7 | 6222 | |
add39d23 TS |
6223 | reloc = XNEW (arelent); |
6224 | reloc->sym_ptr_ptr = XNEW (asymbol *); | |
ea1562b3 NC |
6225 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
6226 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
252b5132 | 6227 | |
ea1562b3 NC |
6228 | /* Make sure none of our internal relocations make it this far. |
6229 | They'd better have been fully resolved by this point. */ | |
9c2799c2 | 6230 | gas_assert ((int) fixp->fx_r_type > 0); |
252b5132 | 6231 | |
ea1562b3 NC |
6232 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
6233 | if (reloc->howto == NULL) | |
252b5132 | 6234 | { |
ea1562b3 NC |
6235 | as_bad_where (fixp->fx_file, fixp->fx_line, |
6236 | _("cannot represent `%s' relocation in object file"), | |
6237 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
6238 | return NULL; | |
252b5132 | 6239 | } |
252b5132 | 6240 | |
ea1562b3 NC |
6241 | if (!fixp->fx_pcrel != !reloc->howto->pc_relative) |
6242 | as_fatal (_("internal error? cannot generate `%s' relocation"), | |
6243 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
252b5132 | 6244 | |
9c2799c2 | 6245 | gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); |
ea1562b3 | 6246 | |
bc1bc43f RH |
6247 | reloc->addend = fixp->fx_offset; |
6248 | ||
ea1562b3 | 6249 | #ifdef OBJ_ECOFF |
bc1bc43f RH |
6250 | /* Fake out bfd_perform_relocation. sigh. */ |
6251 | /* ??? Better would be to use the special_function hook. */ | |
ea1562b3 | 6252 | if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL) |
ea1562b3 | 6253 | reloc->addend = -alpha_gp_value; |
ea1562b3 | 6254 | #endif |
252b5132 | 6255 | |
198f1251 TG |
6256 | #ifdef OBJ_EVAX |
6257 | switch (fixp->fx_r_type) | |
6258 | { | |
6259 | struct evax_private_udata_struct *udata; | |
6260 | const char *pname; | |
6261 | int pname_len; | |
6262 | ||
6263 | case BFD_RELOC_ALPHA_LINKAGE: | |
51794af8 | 6264 | /* Copy the linkage index. */ |
198f1251 TG |
6265 | reloc->addend = fixp->fx_addnumber; |
6266 | break; | |
6267 | ||
6268 | case BFD_RELOC_ALPHA_NOP: | |
6269 | case BFD_RELOC_ALPHA_BSR: | |
6270 | case BFD_RELOC_ALPHA_LDA: | |
6271 | case BFD_RELOC_ALPHA_BOH: | |
6272 | pname = symbol_get_bfdsym (fixp->fx_addsy)->name; | |
6273 | ||
6274 | /* We need the non-suffixed name of the procedure. Beware that | |
6275 | the main symbol might be equated so look it up and take its name. */ | |
6276 | pname_len = strlen (pname); | |
6277 | if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0) | |
6278 | { | |
6279 | symbolS *sym; | |
29a2809e | 6280 | char *my_pname = xmemdup0 (pname, pname_len - 4); |
198f1251 | 6281 | sym = symbol_find (my_pname); |
39a0d071 | 6282 | free (my_pname); |
198f1251 TG |
6283 | if (sym == NULL) |
6284 | abort (); | |
e1f4d6bd | 6285 | |
198f1251 TG |
6286 | while (symbol_equated_reloc_p (sym)) |
6287 | { | |
6288 | symbolS *n = symbol_get_value_expression (sym)->X_add_symbol; | |
6289 | ||
6290 | /* We must avoid looping, as that can occur with a badly | |
6291 | written program. */ | |
6292 | if (n == sym) | |
6293 | break; | |
6294 | sym = n; | |
6295 | } | |
6296 | pname = symbol_get_bfdsym (sym)->name; | |
6297 | } | |
6298 | ||
add39d23 | 6299 | udata = XNEW (struct evax_private_udata_struct); |
198f1251 TG |
6300 | udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy); |
6301 | udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym); | |
6302 | udata->origname = (char *)pname; | |
6303 | udata->lkindex = ((struct evax_private_udata_struct *) | |
6304 | symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex; | |
6305 | reloc->sym_ptr_ptr = (void *)udata; | |
6306 | reloc->addend = fixp->fx_addnumber; | |
6307 | ||
6308 | default: | |
6309 | break; | |
6310 | } | |
6311 | #endif | |
6312 | ||
ea1562b3 | 6313 | return reloc; |
252b5132 RH |
6314 | } |
6315 | ||
ea1562b3 NC |
6316 | /* Parse a register name off of the input_line and return a register |
6317 | number. Gets md_undefined_symbol above to do the register name | |
6318 | matching for us. | |
0a9ef439 | 6319 | |
ea1562b3 | 6320 | Only called as a part of processing the ECOFF .frame directive. */ |
0a9ef439 | 6321 | |
ea1562b3 NC |
6322 | int |
6323 | tc_get_register (int frame ATTRIBUTE_UNUSED) | |
6324 | { | |
6325 | int framereg = AXP_REG_SP; | |
0a9ef439 | 6326 | |
ea1562b3 NC |
6327 | SKIP_WHITESPACE (); |
6328 | if (*input_line_pointer == '$') | |
0a9ef439 | 6329 | { |
d02603dc NC |
6330 | char *s; |
6331 | char c = get_symbol_name (&s); | |
ea1562b3 | 6332 | symbolS *sym = md_undefined_symbol (s); |
0a9ef439 | 6333 | |
ea1562b3 NC |
6334 | *strchr (s, '\0') = c; |
6335 | if (sym && (framereg = S_GET_VALUE (sym)) <= 31) | |
6336 | goto found; | |
0a9ef439 | 6337 | } |
ea1562b3 | 6338 | as_warn (_("frame reg expected, using $%d."), framereg); |
0a9ef439 | 6339 | |
ea1562b3 NC |
6340 | found: |
6341 | note_gpreg (framereg); | |
6342 | return framereg; | |
6343 | } | |
0a9ef439 | 6344 | |
ea1562b3 NC |
6345 | /* This is called before the symbol table is processed. In order to |
6346 | work with gcc when using mips-tfile, we must keep all local labels. | |
6347 | However, in other cases, we want to discard them. If we were | |
6348 | called with -g, but we didn't see any debugging information, it may | |
6349 | mean that gcc is smuggling debugging information through to | |
6350 | mips-tfile, in which case we must generate all local labels. */ | |
6351 | ||
6352 | #ifdef OBJ_ECOFF | |
6353 | ||
6354 | void | |
6355 | alpha_frob_file_before_adjust (void) | |
6356 | { | |
6357 | if (alpha_debug != 0 | |
6358 | && ! ecoff_debugging_seen) | |
6359 | flag_keep_locals = 1; | |
0a9ef439 RH |
6360 | } |
6361 | ||
ea1562b3 NC |
6362 | #endif /* OBJ_ECOFF */ |
6363 | ||
252b5132 RH |
6364 | /* The Alpha has support for some VAX floating point types, as well as for |
6365 | IEEE floating point. We consider IEEE to be the primary floating point | |
6366 | format, and sneak in the VAX floating point support here. */ | |
252b5132 | 6367 | #include "config/atof-vax.c" |