Commit | Line | Data |
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252b5132 | 1 | /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU. |
cc8a6dd0 | 2 | Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, |
87975d2a | 3 | 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 |
20203fb9 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Contributed by Carnegie Mellon University, 1993. |
6 | Written by Alessandro Forin, based on earlier gas-1.38 target CPU files. | |
7 | Modified by Ken Raeburn for gas-2.x and ECOFF support. | |
8 | Modified by Richard Henderson for ELF support. | |
9de8d8f1 | 9 | Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support. |
252b5132 RH |
10 | |
11 | This file is part of GAS, the GNU Assembler. | |
12 | ||
13 | GAS is free software; you can redistribute it and/or modify | |
14 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 15 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
16 | any later version. |
17 | ||
18 | GAS is distributed in the hope that it will be useful, | |
19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | GNU General Public License for more details. | |
22 | ||
23 | You should have received a copy of the GNU General Public License | |
24 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
25 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
26 | 02110-1301, USA. */ | |
252b5132 | 27 | |
ea1562b3 NC |
28 | /* Mach Operating System |
29 | Copyright (c) 1993 Carnegie Mellon University | |
30 | All Rights Reserved. | |
31 | ||
32 | Permission to use, copy, modify and distribute this software and its | |
33 | documentation is hereby granted, provided that both the copyright | |
34 | notice and this permission notice appear in all copies of the | |
35 | software, derivative works or modified versions, and any portions | |
36 | thereof, and that both notices appear in supporting documentation. | |
37 | ||
38 | CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS | |
39 | CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
40 | ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
41 | ||
42 | Carnegie Mellon requests users of this software to return to | |
43 | ||
44 | Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
45 | School of Computer Science | |
46 | Carnegie Mellon University | |
47 | Pittsburgh PA 15213-3890 | |
48 | ||
49 | any improvements or extensions that they make and grant Carnegie the | |
50 | rights to redistribute these changes. */ | |
252b5132 RH |
51 | |
52 | #include "as.h" | |
53 | #include "subsegs.h" | |
43b4c25e | 54 | #include "struc-symbol.h" |
252b5132 RH |
55 | #include "ecoff.h" |
56 | ||
57 | #include "opcode/alpha.h" | |
58 | ||
59 | #ifdef OBJ_ELF | |
60 | #include "elf/alpha.h" | |
61 | #endif | |
62 | ||
198f1251 TG |
63 | #ifdef OBJ_EVAX |
64 | #include "vms.h" | |
d8703844 | 65 | #include "vms/egps.h" |
198f1251 TG |
66 | #endif |
67 | ||
68 | #include "dwarf2dbg.h" | |
ea1562b3 | 69 | #include "dw2gencfi.h" |
3882b010 | 70 | #include "safe-ctype.h" |
252b5132 | 71 | \f |
11f45fb5 | 72 | /* Local types. */ |
252b5132 | 73 | |
ea1562b3 NC |
74 | #define TOKENIZE_ERROR -1 |
75 | #define TOKENIZE_ERROR_REPORT -2 | |
76 | #define MAX_INSN_FIXUPS 2 | |
77 | #define MAX_INSN_ARGS 5 | |
252b5132 | 78 | |
21d799b5 NC |
79 | /* Used since new relocation types are introduced in this |
80 | file (DUMMY_RELOC_LITUSE_*) */ | |
81 | typedef int extended_bfd_reloc_code_real_type; | |
82 | ||
11f45fb5 NC |
83 | struct alpha_fixup |
84 | { | |
252b5132 | 85 | expressionS exp; |
21d799b5 NC |
86 | /* bfd_reloc_code_real_type reloc; */ |
87 | extended_bfd_reloc_code_real_type reloc; | |
198f1251 | 88 | #ifdef OBJ_EVAX |
51794af8 TG |
89 | /* The symbol of the item in the linkage section. */ |
90 | symbolS *xtrasym; | |
91 | ||
92 | /* The symbol of the procedure descriptor. */ | |
93 | symbolS *procsym; | |
198f1251 | 94 | #endif |
252b5132 RH |
95 | }; |
96 | ||
11f45fb5 NC |
97 | struct alpha_insn |
98 | { | |
252b5132 RH |
99 | unsigned insn; |
100 | int nfixups; | |
101 | struct alpha_fixup fixups[MAX_INSN_FIXUPS]; | |
19f78583 | 102 | long sequence; |
252b5132 RH |
103 | }; |
104 | ||
11f45fb5 NC |
105 | enum alpha_macro_arg |
106 | { | |
107 | MACRO_EOA = 1, | |
108 | MACRO_IR, | |
109 | MACRO_PIR, | |
110 | MACRO_OPIR, | |
111 | MACRO_CPIR, | |
112 | MACRO_FPR, | |
198f1251 | 113 | MACRO_EXP |
11f45fb5 | 114 | }; |
252b5132 | 115 | |
11f45fb5 NC |
116 | struct alpha_macro |
117 | { | |
252b5132 | 118 | const char *name; |
ea1562b3 NC |
119 | void (*emit) (const expressionS *, int, const void *); |
120 | const void * arg; | |
252b5132 RH |
121 | enum alpha_macro_arg argsets[16]; |
122 | }; | |
123 | ||
1dab94dd | 124 | /* Extra expression types. */ |
252b5132 | 125 | |
ea1562b3 NC |
126 | #define O_pregister O_md1 /* O_register, in parentheses. */ |
127 | #define O_cpregister O_md2 /* + a leading comma. */ | |
252b5132 | 128 | |
3765b1be | 129 | /* The alpha_reloc_op table below depends on the ordering of these. */ |
04fe8f58 RH |
130 | #define O_literal O_md3 /* !literal relocation. */ |
131 | #define O_lituse_addr O_md4 /* !lituse_addr relocation. */ | |
132 | #define O_lituse_base O_md5 /* !lituse_base relocation. */ | |
133 | #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */ | |
134 | #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */ | |
135 | #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */ | |
136 | #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */ | |
137 | #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */ | |
138 | #define O_gpdisp O_md11 /* !gpdisp relocation. */ | |
139 | #define O_gprelhigh O_md12 /* !gprelhigh relocation. */ | |
140 | #define O_gprellow O_md13 /* !gprellow relocation. */ | |
141 | #define O_gprel O_md14 /* !gprel relocation. */ | |
142 | #define O_samegp O_md15 /* !samegp relocation. */ | |
143 | #define O_tlsgd O_md16 /* !tlsgd relocation. */ | |
144 | #define O_tlsldm O_md17 /* !tlsldm relocation. */ | |
145 | #define O_gotdtprel O_md18 /* !gotdtprel relocation. */ | |
146 | #define O_dtprelhi O_md19 /* !dtprelhi relocation. */ | |
147 | #define O_dtprello O_md20 /* !dtprello relocation. */ | |
148 | #define O_dtprel O_md21 /* !dtprel relocation. */ | |
149 | #define O_gottprel O_md22 /* !gottprel relocation. */ | |
150 | #define O_tprelhi O_md23 /* !tprelhi relocation. */ | |
151 | #define O_tprello O_md24 /* !tprello relocation. */ | |
152 | #define O_tprel O_md25 /* !tprel relocation. */ | |
19f78583 RH |
153 | |
154 | #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1) | |
155 | #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2) | |
156 | #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3) | |
157 | #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4) | |
3765b1be RH |
158 | #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5) |
159 | #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6) | |
04fe8f58 | 160 | #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7) |
19f78583 | 161 | |
3765b1be | 162 | #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel) |
43b4c25e | 163 | |
11f45fb5 | 164 | /* Macros for extracting the type and number of encoded register tokens. */ |
252b5132 RH |
165 | |
166 | #define is_ir_num(x) (((x) & 32) == 0) | |
167 | #define is_fpr_num(x) (((x) & 32) != 0) | |
168 | #define regno(x) ((x) & 31) | |
169 | ||
11f45fb5 | 170 | /* Something odd inherited from the old assembler. */ |
252b5132 RH |
171 | |
172 | #define note_gpreg(R) (alpha_gprmask |= (1 << (R))) | |
173 | #define note_fpreg(R) (alpha_fprmask |= (1 << (R))) | |
174 | ||
175 | /* Predicates for 16- and 32-bit ranges */ | |
176 | /* XXX: The non-shift version appears to trigger a compiler bug when | |
177 | cross-assembling from x86 w/ gcc 2.7.2. */ | |
178 | ||
179 | #if 1 | |
180 | #define range_signed_16(x) \ | |
bc805888 | 181 | (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) |
252b5132 | 182 | #define range_signed_32(x) \ |
bc805888 | 183 | (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) |
252b5132 | 184 | #else |
32ff5c2e KH |
185 | #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \ |
186 | (offsetT) (x) <= (offsetT) 0x7FFF) | |
187 | #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \ | |
188 | (offsetT) (x) <= (offsetT) 0x7FFFFFFF) | |
252b5132 RH |
189 | #endif |
190 | ||
191 | /* Macros for sign extending from 16- and 32-bits. */ | |
192 | /* XXX: The cast macros will work on all the systems that I care about, | |
193 | but really a predicate should be found to use the non-cast forms. */ | |
194 | ||
195 | #if 1 | |
bc805888 KH |
196 | #define sign_extend_16(x) ((short) (x)) |
197 | #define sign_extend_32(x) ((int) (x)) | |
252b5132 | 198 | #else |
bc805888 KH |
199 | #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) |
200 | #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ | |
252b5132 RH |
201 | ^ 0x80000000) - 0x80000000) |
202 | #endif | |
203 | ||
11f45fb5 | 204 | /* Macros to build tokens. */ |
252b5132 | 205 | |
32ff5c2e | 206 | #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
207 | (t).X_op = O_register, \ |
208 | (t).X_add_number = (r)) | |
32ff5c2e | 209 | #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
210 | (t).X_op = O_pregister, \ |
211 | (t).X_add_number = (r)) | |
32ff5c2e | 212 | #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
213 | (t).X_op = O_cpregister, \ |
214 | (t).X_add_number = (r)) | |
32ff5c2e | 215 | #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \ |
252b5132 | 216 | (t).X_op = O_register, \ |
66498417 | 217 | (t).X_add_number = (r) + 32) |
32ff5c2e | 218 | #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
219 | (t).X_op = O_symbol, \ |
220 | (t).X_add_symbol = (s), \ | |
221 | (t).X_add_number = (a)) | |
32ff5c2e | 222 | #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \ |
252b5132 RH |
223 | (t).X_op = O_constant, \ |
224 | (t).X_add_number = (n)) | |
252b5132 | 225 | \f |
252b5132 RH |
226 | /* Generic assembler global variables which must be defined by all |
227 | targets. */ | |
228 | ||
229 | /* Characters which always start a comment. */ | |
230 | const char comment_chars[] = "#"; | |
231 | ||
232 | /* Characters which start a comment at the beginning of a line. */ | |
233 | const char line_comment_chars[] = "#"; | |
234 | ||
235 | /* Characters which may be used to separate multiple commands on a | |
236 | single line. */ | |
237 | const char line_separator_chars[] = ";"; | |
238 | ||
239 | /* Characters which are used to indicate an exponent in a floating | |
240 | point number. */ | |
241 | const char EXP_CHARS[] = "eE"; | |
242 | ||
243 | /* Characters which mean that a number is a floating point constant, | |
244 | as in 0d1.0. */ | |
252b5132 RH |
245 | /* XXX: Do all of these really get used on the alpha?? */ |
246 | char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
252b5132 RH |
247 | |
248 | #ifdef OBJ_EVAX | |
249 | const char *md_shortopts = "Fm:g+1h:HG:"; | |
250 | #else | |
251 | const char *md_shortopts = "Fm:gG:"; | |
252 | #endif | |
253 | ||
11f45fb5 NC |
254 | struct option md_longopts[] = |
255 | { | |
252b5132 | 256 | #define OPTION_32ADDR (OPTION_MD_BASE) |
11f45fb5 | 257 | { "32addr", no_argument, NULL, OPTION_32ADDR }, |
66498417 | 258 | #define OPTION_RELAX (OPTION_32ADDR + 1) |
11f45fb5 | 259 | { "relax", no_argument, NULL, OPTION_RELAX }, |
252b5132 | 260 | #ifdef OBJ_ELF |
66498417 KH |
261 | #define OPTION_MDEBUG (OPTION_RELAX + 1) |
262 | #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1) | |
11f45fb5 NC |
263 | { "mdebug", no_argument, NULL, OPTION_MDEBUG }, |
264 | { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG }, | |
198f1251 TG |
265 | #endif |
266 | #ifdef OBJ_EVAX | |
267 | #define OPTION_REPLACE (OPTION_RELAX + 1) | |
268 | #define OPTION_NOREPLACE (OPTION_REPLACE+1) | |
269 | { "replace", no_argument, NULL, OPTION_REPLACE }, | |
270 | { "noreplace", no_argument, NULL, OPTION_NOREPLACE }, | |
252b5132 | 271 | #endif |
11f45fb5 NC |
272 | { NULL, no_argument, NULL, 0 } |
273 | }; | |
252b5132 | 274 | |
bc805888 | 275 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
276 | \f |
277 | #ifdef OBJ_EVAX | |
278 | #define AXP_REG_R0 0 | |
279 | #define AXP_REG_R16 16 | |
280 | #define AXP_REG_R17 17 | |
281 | #undef AXP_REG_T9 | |
282 | #define AXP_REG_T9 22 | |
283 | #undef AXP_REG_T10 | |
284 | #define AXP_REG_T10 23 | |
285 | #undef AXP_REG_T11 | |
286 | #define AXP_REG_T11 24 | |
287 | #undef AXP_REG_T12 | |
288 | #define AXP_REG_T12 25 | |
289 | #define AXP_REG_AI 25 | |
290 | #undef AXP_REG_FP | |
291 | #define AXP_REG_FP 29 | |
292 | ||
293 | #undef AXP_REG_GP | |
294 | #define AXP_REG_GP AXP_REG_PV | |
198f1251 | 295 | |
252b5132 RH |
296 | #endif /* OBJ_EVAX */ |
297 | ||
11f45fb5 | 298 | /* The cpu for which we are generating code. */ |
252b5132 RH |
299 | static unsigned alpha_target = AXP_OPCODE_BASE; |
300 | static const char *alpha_target_name = "<all>"; | |
301 | ||
11f45fb5 | 302 | /* The hash table of instruction opcodes. */ |
252b5132 RH |
303 | static struct hash_control *alpha_opcode_hash; |
304 | ||
11f45fb5 | 305 | /* The hash table of macro opcodes. */ |
252b5132 RH |
306 | static struct hash_control *alpha_macro_hash; |
307 | ||
308 | #ifdef OBJ_ECOFF | |
11f45fb5 | 309 | /* The $gp relocation symbol. */ |
252b5132 RH |
310 | static symbolS *alpha_gp_symbol; |
311 | ||
312 | /* XXX: what is this, and why is it exported? */ | |
313 | valueT alpha_gp_value; | |
314 | #endif | |
315 | ||
11f45fb5 | 316 | /* The current $gp register. */ |
252b5132 RH |
317 | static int alpha_gp_register = AXP_REG_GP; |
318 | ||
11f45fb5 | 319 | /* A table of the register symbols. */ |
252b5132 RH |
320 | static symbolS *alpha_register_table[64]; |
321 | ||
11f45fb5 | 322 | /* Constant sections, or sections of constants. */ |
252b5132 RH |
323 | #ifdef OBJ_ECOFF |
324 | static segT alpha_lita_section; | |
252b5132 RH |
325 | #endif |
326 | #ifdef OBJ_EVAX | |
198f1251 | 327 | segT alpha_link_section; |
252b5132 | 328 | #endif |
198f1251 | 329 | #ifndef OBJ_EVAX |
252b5132 | 330 | static segT alpha_lit8_section; |
198f1251 | 331 | #endif |
252b5132 | 332 | |
1dab94dd | 333 | /* Symbols referring to said sections. */ |
252b5132 RH |
334 | #ifdef OBJ_ECOFF |
335 | static symbolS *alpha_lita_symbol; | |
252b5132 RH |
336 | #endif |
337 | #ifdef OBJ_EVAX | |
338 | static symbolS *alpha_link_symbol; | |
252b5132 | 339 | #endif |
198f1251 | 340 | #ifndef OBJ_EVAX |
252b5132 | 341 | static symbolS *alpha_lit8_symbol; |
198f1251 | 342 | #endif |
252b5132 | 343 | |
11f45fb5 | 344 | /* Literal for .litX+0x8000 within .lita. */ |
252b5132 | 345 | #ifdef OBJ_ECOFF |
252b5132 RH |
346 | static offsetT alpha_lit8_literal; |
347 | #endif | |
348 | ||
11f45fb5 | 349 | /* Is the assembler not allowed to use $at? */ |
252b5132 RH |
350 | static int alpha_noat_on = 0; |
351 | ||
11f45fb5 | 352 | /* Are macros enabled? */ |
252b5132 RH |
353 | static int alpha_macros_on = 1; |
354 | ||
11f45fb5 | 355 | /* Are floats disabled? */ |
252b5132 RH |
356 | static int alpha_nofloats_on = 0; |
357 | ||
11f45fb5 | 358 | /* Are addresses 32 bit? */ |
252b5132 RH |
359 | static int alpha_addr32_on = 0; |
360 | ||
361 | /* Symbol labelling the current insn. When the Alpha gas sees | |
362 | foo: | |
363 | .quad 0 | |
364 | and the section happens to not be on an eight byte boundary, it | |
365 | will align both the symbol and the .quad to an eight byte boundary. */ | |
366 | static symbolS *alpha_insn_label; | |
eb979bfb | 367 | #if defined(OBJ_ELF) || defined (OBJ_EVAX) |
198f1251 | 368 | static symbolS *alpha_prologue_label; |
d9319cec | 369 | #endif |
198f1251 TG |
370 | |
371 | #ifdef OBJ_EVAX | |
372 | /* Symbol associate with the current jsr instruction. */ | |
373 | static symbolS *alpha_linkage_symbol; | |
374 | #endif | |
252b5132 RH |
375 | |
376 | /* Whether we should automatically align data generation pseudo-ops. | |
377 | .align 0 will turn this off. */ | |
378 | static int alpha_auto_align_on = 1; | |
379 | ||
380 | /* The known current alignment of the current section. */ | |
381 | static int alpha_current_align; | |
382 | ||
383 | /* These are exported to ECOFF code. */ | |
384 | unsigned long alpha_gprmask, alpha_fprmask; | |
385 | ||
386 | /* Whether the debugging option was seen. */ | |
387 | static int alpha_debug; | |
388 | ||
389 | #ifdef OBJ_ELF | |
390 | /* Whether we are emitting an mdebug section. */ | |
a8316fe2 | 391 | int alpha_flag_mdebug = -1; |
252b5132 RH |
392 | #endif |
393 | ||
198f1251 TG |
394 | #ifdef OBJ_EVAX |
395 | /* Whether to perform the VMS procedure call optimization. */ | |
396 | int alpha_flag_replace = 1; | |
397 | #endif | |
398 | ||
252b5132 RH |
399 | /* Don't fully resolve relocations, allowing code movement in the linker. */ |
400 | static int alpha_flag_relax; | |
401 | ||
402 | /* What value to give to bfd_set_gp_size. */ | |
403 | static int g_switch_value = 8; | |
404 | ||
405 | #ifdef OBJ_EVAX | |
406 | /* Collect information about current procedure here. */ | |
198f1251 | 407 | struct alpha_evax_procs |
ea1562b3 NC |
408 | { |
409 | symbolS *symbol; /* Proc pdesc symbol. */ | |
252b5132 | 410 | int pdsckind; |
ea1562b3 NC |
411 | int framereg; /* Register for frame pointer. */ |
412 | int framesize; /* Size of frame. */ | |
252b5132 RH |
413 | int rsa_offset; |
414 | int ra_save; | |
415 | int fp_save; | |
416 | long imask; | |
417 | long fmask; | |
418 | int type; | |
419 | int prologue; | |
198f1251 TG |
420 | symbolS *handler; |
421 | int handler_data; | |
422 | }; | |
423 | ||
51794af8 | 424 | /* Linked list of .linkage fixups. */ |
198f1251 TG |
425 | struct alpha_linkage_fixups *alpha_linkage_fixup_root; |
426 | static struct alpha_linkage_fixups *alpha_linkage_fixup_tail; | |
427 | ||
51794af8 | 428 | /* Current procedure descriptor. */ |
198f1251 | 429 | static struct alpha_evax_procs *alpha_evax_proc; |
4b1c4d2b | 430 | static struct alpha_evax_procs alpha_evax_proc_data; |
252b5132 RH |
431 | |
432 | static int alpha_flag_hash_long_names = 0; /* -+ */ | |
433 | static int alpha_flag_show_after_trunc = 0; /* -H */ | |
434 | ||
435 | /* If the -+ switch is given, then a hash is appended to any name that is | |
11f45fb5 | 436 | longer than 64 characters, else longer symbol names are truncated. */ |
252b5132 | 437 | |
43b4c25e MM |
438 | #endif |
439 | \f | |
440 | #ifdef RELOC_OP_P | |
441 | /* A table to map the spelling of a relocation operand into an appropriate | |
442 | bfd_reloc_code_real_type type. The table is assumed to be ordered such | |
443 | that op-O_literal indexes into it. */ | |
444 | ||
445 | #define ALPHA_RELOC_TABLE(op) \ | |
19f78583 | 446 | (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \ |
43b4c25e | 447 | ? (abort (), 0) \ |
19f78583 | 448 | : (int) (op) - (int) O_literal) ]) |
43b4c25e | 449 | |
ec8fcf4a RH |
450 | #define DEF(NAME, RELOC, REQ, ALLOW) \ |
451 | { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW} | |
43b4c25e | 452 | |
11f45fb5 NC |
453 | static const struct alpha_reloc_op_tag |
454 | { | |
ea1562b3 NC |
455 | const char *name; /* String to lookup. */ |
456 | size_t length; /* Size of the string. */ | |
457 | operatorT op; /* Which operator to use. */ | |
21d799b5 | 458 | extended_bfd_reloc_code_real_type reloc; |
ea1562b3 NC |
459 | unsigned int require_seq : 1; /* Require a sequence number. */ |
460 | unsigned int allow_seq : 1; /* Allow a sequence number. */ | |
11f45fb5 NC |
461 | } |
462 | alpha_reloc_op[] = | |
463 | { | |
ea1562b3 NC |
464 | DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1), |
465 | DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1), | |
466 | DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1), | |
467 | DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1), | |
468 | DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1), | |
469 | DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1), | |
470 | DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1), | |
04fe8f58 | 471 | DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1), |
ea1562b3 NC |
472 | DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1), |
473 | DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0), | |
474 | DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0), | |
475 | DEF (gprel, BFD_RELOC_GPREL16, 0, 0), | |
476 | DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0), | |
477 | DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1), | |
478 | DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1), | |
479 | DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0), | |
480 | DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0), | |
481 | DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0), | |
482 | DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0), | |
483 | DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0), | |
484 | DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0), | |
485 | DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0), | |
486 | DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0), | |
43b4c25e MM |
487 | }; |
488 | ||
19f78583 RH |
489 | #undef DEF |
490 | ||
43b4c25e | 491 | static const int alpha_num_reloc_op |
bc805888 | 492 | = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); |
19f78583 | 493 | #endif /* RELOC_OP_P */ |
43b4c25e | 494 | |
ea1562b3 | 495 | /* Maximum # digits needed to hold the largest sequence #. */ |
43b4c25e MM |
496 | #define ALPHA_RELOC_DIGITS 25 |
497 | ||
2d2255b5 | 498 | /* Structure to hold explicit sequence information. */ |
19f78583 | 499 | struct alpha_reloc_tag |
43b4c25e | 500 | { |
ea1562b3 | 501 | fixS *master; /* The literal reloc. */ |
198f1251 | 502 | #ifdef OBJ_EVAX |
51794af8 TG |
503 | struct symbol *sym; /* Linkage section item symbol. */ |
504 | struct symbol *psym; /* Pdesc symbol. */ | |
198f1251 | 505 | #endif |
ea1562b3 NC |
506 | fixS *slaves; /* Head of linked list of lituses. */ |
507 | segT segment; /* Segment relocs are in or undefined_section. */ | |
508 | long sequence; /* Sequence #. */ | |
509 | unsigned n_master; /* # of literals. */ | |
510 | unsigned n_slaves; /* # of lituses. */ | |
511 | unsigned saw_tlsgd : 1; /* True if ... */ | |
3765b1be RH |
512 | unsigned saw_tlsldm : 1; |
513 | unsigned saw_lu_tlsgd : 1; | |
514 | unsigned saw_lu_tlsldm : 1; | |
ea1562b3 NC |
515 | unsigned multi_section_p : 1; /* True if more than one section was used. */ |
516 | char string[1]; /* Printable form of sequence to hash with. */ | |
43b4c25e MM |
517 | }; |
518 | ||
ea1562b3 | 519 | /* Hash table to link up literals with the appropriate lituse. */ |
43b4c25e | 520 | static struct hash_control *alpha_literal_hash; |
19f78583 RH |
521 | |
522 | /* Sequence numbers for internal use by macros. */ | |
523 | static long next_sequence_num = -1; | |
252b5132 RH |
524 | \f |
525 | /* A table of CPU names and opcode sets. */ | |
526 | ||
11f45fb5 NC |
527 | static const struct cpu_type |
528 | { | |
252b5132 RH |
529 | const char *name; |
530 | unsigned flags; | |
11f45fb5 NC |
531 | } |
532 | cpu_types[] = | |
533 | { | |
252b5132 | 534 | /* Ad hoc convention: cpu number gets palcode, process code doesn't. |
1dab94dd | 535 | This supports usage under DU 4.0b that does ".arch ev4", and |
252b5132 RH |
536 | usage in MILO that does -m21064. Probably something more |
537 | specific like -m21064-pal should be used, but oh well. */ | |
538 | ||
539 | { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
540 | { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
541 | { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
542 | { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, | |
543 | { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 }, | |
544 | { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX }, | |
545 | { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX | |
546 | |AXP_OPCODE_MAX) }, | |
547 | { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
548 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
dbac4f5b RH |
549 | { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX |
550 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
551 | { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX | |
552 | |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, | |
252b5132 RH |
553 | |
554 | { "ev4", AXP_OPCODE_BASE }, | |
555 | { "ev45", AXP_OPCODE_BASE }, | |
556 | { "lca45", AXP_OPCODE_BASE }, | |
557 | { "ev5", AXP_OPCODE_BASE }, | |
558 | { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, | |
559 | { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, | |
560 | { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
dbac4f5b RH |
561 | { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, |
562 | { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, | |
252b5132 RH |
563 | |
564 | { "all", AXP_OPCODE_BASE }, | |
446a06c9 | 565 | { 0, 0 } |
252b5132 RH |
566 | }; |
567 | ||
ea1562b3 NC |
568 | /* Some instruction sets indexed by lg(size). */ |
569 | static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL }; | |
570 | static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" }; | |
571 | static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" }; | |
572 | static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" }; | |
573 | static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" }; | |
574 | static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" }; | |
575 | static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" }; | |
576 | static const char * const stX_op[] = { "stb", "stw", "stl", "stq" }; | |
577 | static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL }; | |
252b5132 | 578 | |
21d799b5 | 579 | static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type); |
ea1562b3 NC |
580 | static void emit_insn (struct alpha_insn *); |
581 | static void assemble_tokens (const char *, const expressionS *, int, int); | |
198f1251 TG |
582 | #ifdef OBJ_EVAX |
583 | static char *s_alpha_section_name (void); | |
8aacb050 | 584 | static symbolS *add_to_link_pool (symbolS *, offsetT); |
198f1251 | 585 | #endif |
ea1562b3 NC |
586 | \f |
587 | static struct alpha_reloc_tag * | |
588 | get_alpha_reloc_tag (long sequence) | |
11f45fb5 | 589 | { |
ea1562b3 NC |
590 | char buffer[ALPHA_RELOC_DIGITS]; |
591 | struct alpha_reloc_tag *info; | |
252b5132 | 592 | |
ea1562b3 | 593 | sprintf (buffer, "!%ld", sequence); |
252b5132 | 594 | |
ea1562b3 NC |
595 | info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer); |
596 | if (! info) | |
597 | { | |
598 | size_t len = strlen (buffer); | |
599 | const char *errmsg; | |
252b5132 | 600 | |
21d799b5 NC |
601 | info = (struct alpha_reloc_tag *) |
602 | xcalloc (sizeof (struct alpha_reloc_tag) + len, 1); | |
252b5132 | 603 | |
ea1562b3 NC |
604 | info->segment = now_seg; |
605 | info->sequence = sequence; | |
606 | strcpy (info->string, buffer); | |
607 | errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info); | |
608 | if (errmsg) | |
20203fb9 | 609 | as_fatal ("%s", errmsg); |
198f1251 TG |
610 | #ifdef OBJ_EVAX |
611 | info->sym = 0; | |
612 | info->psym = 0; | |
613 | #endif | |
ea1562b3 | 614 | } |
252b5132 | 615 | |
ea1562b3 NC |
616 | return info; |
617 | } | |
252b5132 | 618 | |
198f1251 TG |
619 | #ifndef OBJ_EVAX |
620 | ||
ea1562b3 NC |
621 | static void |
622 | alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED, | |
623 | asection *sec, | |
624 | void * ptr ATTRIBUTE_UNUSED) | |
625 | { | |
626 | segment_info_type *seginfo = seg_info (sec); | |
627 | fixS **prevP; | |
628 | fixS *fixp; | |
629 | fixS *next; | |
630 | fixS *slave; | |
252b5132 | 631 | |
ea1562b3 NC |
632 | /* If seginfo is NULL, we did not create this section; don't do |
633 | anything with it. By using a pointer to a pointer, we can update | |
634 | the links in place. */ | |
635 | if (seginfo == NULL) | |
636 | return; | |
252b5132 | 637 | |
ea1562b3 NC |
638 | /* If there are no relocations, skip the section. */ |
639 | if (! seginfo->fix_root) | |
640 | return; | |
252b5132 | 641 | |
ea1562b3 NC |
642 | /* First rebuild the fixup chain without the explicit lituse and |
643 | gpdisp_lo16 relocs. */ | |
644 | prevP = &seginfo->fix_root; | |
645 | for (fixp = seginfo->fix_root; fixp; fixp = next) | |
646 | { | |
647 | next = fixp->fx_next; | |
648 | fixp->fx_next = (fixS *) 0; | |
252b5132 | 649 | |
ea1562b3 NC |
650 | switch (fixp->fx_r_type) |
651 | { | |
652 | case BFD_RELOC_ALPHA_LITUSE: | |
653 | if (fixp->tc_fix_data.info->n_master == 0) | |
654 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
655 | _("No !literal!%ld was found"), | |
656 | fixp->tc_fix_data.info->sequence); | |
657 | #ifdef RELOC_OP_P | |
658 | if (fixp->fx_offset == LITUSE_ALPHA_TLSGD) | |
659 | { | |
660 | if (! fixp->tc_fix_data.info->saw_tlsgd) | |
661 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
662 | _("No !tlsgd!%ld was found"), | |
663 | fixp->tc_fix_data.info->sequence); | |
664 | } | |
665 | else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM) | |
666 | { | |
667 | if (! fixp->tc_fix_data.info->saw_tlsldm) | |
668 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
669 | _("No !tlsldm!%ld was found"), | |
670 | fixp->tc_fix_data.info->sequence); | |
671 | } | |
672 | #endif | |
673 | break; | |
252b5132 | 674 | |
ea1562b3 NC |
675 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
676 | if (fixp->tc_fix_data.info->n_master == 0) | |
677 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
678 | _("No ldah !gpdisp!%ld was found"), | |
679 | fixp->tc_fix_data.info->sequence); | |
680 | break; | |
252b5132 | 681 | |
ea1562b3 NC |
682 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
683 | if (fixp->tc_fix_data.info | |
684 | && (fixp->tc_fix_data.info->saw_tlsgd | |
685 | || fixp->tc_fix_data.info->saw_tlsldm)) | |
686 | break; | |
687 | /* FALLTHRU */ | |
252b5132 | 688 | |
ea1562b3 NC |
689 | default: |
690 | *prevP = fixp; | |
691 | prevP = &fixp->fx_next; | |
692 | break; | |
252b5132 | 693 | } |
252b5132 RH |
694 | } |
695 | ||
ea1562b3 NC |
696 | /* Go back and re-chain dependent relocations. They are currently |
697 | linked through the next_reloc field in reverse order, so as we | |
698 | go through the next_reloc chain, we effectively reverse the chain | |
699 | once again. | |
252b5132 | 700 | |
ea1562b3 NC |
701 | Except if there is more than one !literal for a given sequence |
702 | number. In that case, the programmer and/or compiler is not sure | |
703 | how control flows from literal to lituse, and we can't be sure to | |
704 | get the relaxation correct. | |
252b5132 | 705 | |
ea1562b3 NC |
706 | ??? Well, actually we could, if there are enough lituses such that |
707 | we can make each literal have at least one of each lituse type | |
708 | present. Not implemented. | |
252b5132 | 709 | |
ea1562b3 NC |
710 | Also suppress the optimization if the !literals/!lituses are spread |
711 | in different segments. This can happen with "intersting" uses of | |
712 | inline assembly; examples are present in the Linux kernel semaphores. */ | |
11f45fb5 | 713 | |
ea1562b3 | 714 | for (fixp = seginfo->fix_root; fixp; fixp = next) |
252b5132 | 715 | { |
ea1562b3 NC |
716 | next = fixp->fx_next; |
717 | switch (fixp->fx_r_type) | |
718 | { | |
719 | case BFD_RELOC_ALPHA_TLSGD: | |
720 | case BFD_RELOC_ALPHA_TLSLDM: | |
721 | if (!fixp->tc_fix_data.info) | |
722 | break; | |
723 | if (fixp->tc_fix_data.info->n_master == 0) | |
724 | break; | |
725 | else if (fixp->tc_fix_data.info->n_master > 1) | |
726 | { | |
727 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
728 | _("too many !literal!%ld for %s"), | |
729 | fixp->tc_fix_data.info->sequence, | |
730 | (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD | |
731 | ? "!tlsgd" : "!tlsldm")); | |
732 | break; | |
733 | } | |
252b5132 | 734 | |
ea1562b3 NC |
735 | fixp->tc_fix_data.info->master->fx_next = fixp->fx_next; |
736 | fixp->fx_next = fixp->tc_fix_data.info->master; | |
737 | fixp = fixp->fx_next; | |
738 | /* Fall through. */ | |
252b5132 | 739 | |
ea1562b3 NC |
740 | case BFD_RELOC_ALPHA_ELF_LITERAL: |
741 | if (fixp->tc_fix_data.info | |
742 | && fixp->tc_fix_data.info->n_master == 1 | |
743 | && ! fixp->tc_fix_data.info->multi_section_p) | |
744 | { | |
745 | for (slave = fixp->tc_fix_data.info->slaves; | |
746 | slave != (fixS *) 0; | |
747 | slave = slave->tc_fix_data.next_reloc) | |
748 | { | |
749 | slave->fx_next = fixp->fx_next; | |
750 | fixp->fx_next = slave; | |
751 | } | |
752 | } | |
753 | break; | |
252b5132 | 754 | |
ea1562b3 NC |
755 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
756 | if (fixp->tc_fix_data.info->n_slaves == 0) | |
757 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
758 | _("No lda !gpdisp!%ld was found"), | |
759 | fixp->tc_fix_data.info->sequence); | |
760 | else | |
761 | { | |
762 | slave = fixp->tc_fix_data.info->slaves; | |
763 | slave->fx_next = next; | |
764 | fixp->fx_next = slave; | |
765 | } | |
766 | break; | |
252b5132 | 767 | |
ea1562b3 NC |
768 | default: |
769 | break; | |
770 | } | |
252b5132 | 771 | } |
252b5132 RH |
772 | } |
773 | ||
ea1562b3 NC |
774 | /* Before the relocations are written, reorder them, so that user |
775 | supplied !lituse relocations follow the appropriate !literal | |
776 | relocations, and similarly for !gpdisp relocations. */ | |
252b5132 RH |
777 | |
778 | void | |
ea1562b3 | 779 | alpha_before_fix (void) |
252b5132 | 780 | { |
ea1562b3 NC |
781 | if (alpha_literal_hash) |
782 | bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL); | |
252b5132 | 783 | } |
198f1251 TG |
784 | |
785 | #endif | |
ea1562b3 NC |
786 | \f |
787 | #ifdef DEBUG_ALPHA | |
788 | static void | |
789 | debug_exp (expressionS tok[], int ntok) | |
252b5132 | 790 | { |
ea1562b3 | 791 | int i; |
252b5132 | 792 | |
ea1562b3 NC |
793 | fprintf (stderr, "debug_exp: %d tokens", ntok); |
794 | for (i = 0; i < ntok; i++) | |
252b5132 | 795 | { |
ea1562b3 NC |
796 | expressionS *t = &tok[i]; |
797 | const char *name; | |
252b5132 | 798 | |
ea1562b3 NC |
799 | switch (t->X_op) |
800 | { | |
801 | default: name = "unknown"; break; | |
802 | case O_illegal: name = "O_illegal"; break; | |
803 | case O_absent: name = "O_absent"; break; | |
804 | case O_constant: name = "O_constant"; break; | |
805 | case O_symbol: name = "O_symbol"; break; | |
806 | case O_symbol_rva: name = "O_symbol_rva"; break; | |
807 | case O_register: name = "O_register"; break; | |
808 | case O_big: name = "O_big"; break; | |
809 | case O_uminus: name = "O_uminus"; break; | |
810 | case O_bit_not: name = "O_bit_not"; break; | |
811 | case O_logical_not: name = "O_logical_not"; break; | |
812 | case O_multiply: name = "O_multiply"; break; | |
813 | case O_divide: name = "O_divide"; break; | |
814 | case O_modulus: name = "O_modulus"; break; | |
815 | case O_left_shift: name = "O_left_shift"; break; | |
816 | case O_right_shift: name = "O_right_shift"; break; | |
817 | case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break; | |
818 | case O_bit_or_not: name = "O_bit_or_not"; break; | |
819 | case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break; | |
820 | case O_bit_and: name = "O_bit_and"; break; | |
821 | case O_add: name = "O_add"; break; | |
822 | case O_subtract: name = "O_subtract"; break; | |
823 | case O_eq: name = "O_eq"; break; | |
824 | case O_ne: name = "O_ne"; break; | |
825 | case O_lt: name = "O_lt"; break; | |
826 | case O_le: name = "O_le"; break; | |
827 | case O_ge: name = "O_ge"; break; | |
828 | case O_gt: name = "O_gt"; break; | |
829 | case O_logical_and: name = "O_logical_and"; break; | |
830 | case O_logical_or: name = "O_logical_or"; break; | |
831 | case O_index: name = "O_index"; break; | |
832 | case O_pregister: name = "O_pregister"; break; | |
833 | case O_cpregister: name = "O_cpregister"; break; | |
834 | case O_literal: name = "O_literal"; break; | |
835 | case O_lituse_addr: name = "O_lituse_addr"; break; | |
836 | case O_lituse_base: name = "O_lituse_base"; break; | |
837 | case O_lituse_bytoff: name = "O_lituse_bytoff"; break; | |
838 | case O_lituse_jsr: name = "O_lituse_jsr"; break; | |
839 | case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break; | |
840 | case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break; | |
04fe8f58 | 841 | case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break; |
ea1562b3 NC |
842 | case O_gpdisp: name = "O_gpdisp"; break; |
843 | case O_gprelhigh: name = "O_gprelhigh"; break; | |
844 | case O_gprellow: name = "O_gprellow"; break; | |
845 | case O_gprel: name = "O_gprel"; break; | |
846 | case O_samegp: name = "O_samegp"; break; | |
847 | case O_tlsgd: name = "O_tlsgd"; break; | |
848 | case O_tlsldm: name = "O_tlsldm"; break; | |
849 | case O_gotdtprel: name = "O_gotdtprel"; break; | |
850 | case O_dtprelhi: name = "O_dtprelhi"; break; | |
851 | case O_dtprello: name = "O_dtprello"; break; | |
852 | case O_dtprel: name = "O_dtprel"; break; | |
853 | case O_gottprel: name = "O_gottprel"; break; | |
854 | case O_tprelhi: name = "O_tprelhi"; break; | |
855 | case O_tprello: name = "O_tprello"; break; | |
856 | case O_tprel: name = "O_tprel"; break; | |
857 | } | |
252b5132 | 858 | |
ea1562b3 NC |
859 | fprintf (stderr, ", %s(%s, %s, %d)", name, |
860 | (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--", | |
861 | (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--", | |
862 | (int) t->X_add_number); | |
252b5132 | 863 | } |
ea1562b3 NC |
864 | fprintf (stderr, "\n"); |
865 | fflush (stderr); | |
252b5132 | 866 | } |
ea1562b3 | 867 | #endif |
252b5132 | 868 | |
ea1562b3 | 869 | /* Parse the arguments to an opcode. */ |
252b5132 | 870 | |
ea1562b3 NC |
871 | static int |
872 | tokenize_arguments (char *str, | |
873 | expressionS tok[], | |
874 | int ntok) | |
252b5132 | 875 | { |
ea1562b3 NC |
876 | expressionS *end_tok = tok + ntok; |
877 | char *old_input_line_pointer; | |
878 | int saw_comma = 0, saw_arg = 0; | |
879 | #ifdef DEBUG_ALPHA | |
880 | expressionS *orig_tok = tok; | |
881 | #endif | |
882 | #ifdef RELOC_OP_P | |
883 | char *p; | |
884 | const struct alpha_reloc_op_tag *r; | |
885 | int c, i; | |
886 | size_t len; | |
887 | int reloc_found_p = 0; | |
888 | #endif | |
252b5132 | 889 | |
ea1562b3 | 890 | memset (tok, 0, sizeof (*tok) * ntok); |
252b5132 | 891 | |
ea1562b3 NC |
892 | /* Save and restore input_line_pointer around this function. */ |
893 | old_input_line_pointer = input_line_pointer; | |
894 | input_line_pointer = str; | |
252b5132 | 895 | |
ea1562b3 NC |
896 | #ifdef RELOC_OP_P |
897 | /* ??? Wrest control of ! away from the regular expression parser. */ | |
898 | is_end_of_line[(unsigned char) '!'] = 1; | |
899 | #endif | |
252b5132 | 900 | |
ea1562b3 NC |
901 | while (tok < end_tok && *input_line_pointer) |
902 | { | |
903 | SKIP_WHITESPACE (); | |
904 | switch (*input_line_pointer) | |
905 | { | |
906 | case '\0': | |
907 | goto fini; | |
908 | ||
909 | #ifdef RELOC_OP_P | |
910 | case '!': | |
911 | /* A relocation operand can be placed after the normal operand on an | |
912 | assembly language statement, and has the following form: | |
913 | !relocation_type!sequence_number. */ | |
914 | if (reloc_found_p) | |
252b5132 | 915 | { |
ea1562b3 NC |
916 | /* Only support one relocation op per insn. */ |
917 | as_bad (_("More than one relocation op per insn")); | |
918 | goto err_report; | |
252b5132 | 919 | } |
252b5132 | 920 | |
ea1562b3 NC |
921 | if (!saw_arg) |
922 | goto err; | |
252b5132 | 923 | |
ea1562b3 NC |
924 | ++input_line_pointer; |
925 | SKIP_WHITESPACE (); | |
926 | p = input_line_pointer; | |
927 | c = get_symbol_end (); | |
252b5132 | 928 | |
ea1562b3 NC |
929 | /* Parse !relocation_type. */ |
930 | len = input_line_pointer - p; | |
931 | if (len == 0) | |
932 | { | |
933 | as_bad (_("No relocation operand")); | |
934 | goto err_report; | |
935 | } | |
252b5132 | 936 | |
ea1562b3 NC |
937 | r = &alpha_reloc_op[0]; |
938 | for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++) | |
939 | if (len == r->length && memcmp (p, r->name, len) == 0) | |
940 | break; | |
941 | if (i < 0) | |
942 | { | |
943 | as_bad (_("Unknown relocation operand: !%s"), p); | |
944 | goto err_report; | |
945 | } | |
252b5132 | 946 | |
ea1562b3 NC |
947 | *input_line_pointer = c; |
948 | SKIP_WHITESPACE (); | |
949 | if (*input_line_pointer != '!') | |
950 | { | |
951 | if (r->require_seq) | |
952 | { | |
953 | as_bad (_("no sequence number after !%s"), p); | |
954 | goto err_report; | |
955 | } | |
252b5132 | 956 | |
ea1562b3 NC |
957 | tok->X_add_number = 0; |
958 | } | |
959 | else | |
960 | { | |
961 | if (! r->allow_seq) | |
962 | { | |
963 | as_bad (_("!%s does not use a sequence number"), p); | |
964 | goto err_report; | |
965 | } | |
252b5132 | 966 | |
ea1562b3 | 967 | input_line_pointer++; |
252b5132 | 968 | |
ea1562b3 NC |
969 | /* Parse !sequence_number. */ |
970 | expression (tok); | |
971 | if (tok->X_op != O_constant || tok->X_add_number <= 0) | |
972 | { | |
973 | as_bad (_("Bad sequence number: !%s!%s"), | |
974 | r->name, input_line_pointer); | |
975 | goto err_report; | |
976 | } | |
977 | } | |
252b5132 | 978 | |
ea1562b3 NC |
979 | tok->X_op = r->op; |
980 | reloc_found_p = 1; | |
981 | ++tok; | |
982 | break; | |
983 | #endif /* RELOC_OP_P */ | |
252b5132 | 984 | |
ea1562b3 NC |
985 | case ',': |
986 | ++input_line_pointer; | |
987 | if (saw_comma || !saw_arg) | |
988 | goto err; | |
989 | saw_comma = 1; | |
990 | break; | |
252b5132 | 991 | |
ea1562b3 NC |
992 | case '(': |
993 | { | |
994 | char *hold = input_line_pointer++; | |
252b5132 | 995 | |
ea1562b3 NC |
996 | /* First try for parenthesized register ... */ |
997 | expression (tok); | |
998 | if (*input_line_pointer == ')' && tok->X_op == O_register) | |
999 | { | |
1000 | tok->X_op = (saw_comma ? O_cpregister : O_pregister); | |
1001 | saw_comma = 0; | |
1002 | saw_arg = 1; | |
1003 | ++input_line_pointer; | |
1004 | ++tok; | |
1005 | break; | |
1006 | } | |
252b5132 | 1007 | |
ea1562b3 NC |
1008 | /* ... then fall through to plain expression. */ |
1009 | input_line_pointer = hold; | |
1010 | } | |
252b5132 | 1011 | |
ea1562b3 NC |
1012 | default: |
1013 | if (saw_arg && !saw_comma) | |
1014 | goto err; | |
252b5132 | 1015 | |
ea1562b3 NC |
1016 | expression (tok); |
1017 | if (tok->X_op == O_illegal || tok->X_op == O_absent) | |
1018 | goto err; | |
252b5132 | 1019 | |
ea1562b3 NC |
1020 | saw_comma = 0; |
1021 | saw_arg = 1; | |
1022 | ++tok; | |
1023 | break; | |
1024 | } | |
1025 | } | |
252b5132 | 1026 | |
ea1562b3 NC |
1027 | fini: |
1028 | if (saw_comma) | |
1029 | goto err; | |
1030 | input_line_pointer = old_input_line_pointer; | |
252b5132 | 1031 | |
ea1562b3 NC |
1032 | #ifdef DEBUG_ALPHA |
1033 | debug_exp (orig_tok, ntok - (end_tok - tok)); | |
252b5132 | 1034 | #endif |
ea1562b3 NC |
1035 | #ifdef RELOC_OP_P |
1036 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1037 | #endif |
252b5132 | 1038 | |
ea1562b3 | 1039 | return ntok - (end_tok - tok); |
00f7efb6 | 1040 | |
ea1562b3 NC |
1041 | err: |
1042 | #ifdef RELOC_OP_P | |
1043 | is_end_of_line[(unsigned char) '!'] = 0; | |
543833df | 1044 | #endif |
ea1562b3 NC |
1045 | input_line_pointer = old_input_line_pointer; |
1046 | return TOKENIZE_ERROR; | |
543833df | 1047 | |
ea1562b3 NC |
1048 | #ifdef RELOC_OP_P |
1049 | err_report: | |
1050 | is_end_of_line[(unsigned char) '!'] = 0; | |
252b5132 | 1051 | #endif |
ea1562b3 NC |
1052 | input_line_pointer = old_input_line_pointer; |
1053 | return TOKENIZE_ERROR_REPORT; | |
1054 | } | |
252b5132 | 1055 | |
ea1562b3 NC |
1056 | /* Search forward through all variants of an opcode looking for a |
1057 | syntax match. */ | |
252b5132 | 1058 | |
ea1562b3 NC |
1059 | static const struct alpha_opcode * |
1060 | find_opcode_match (const struct alpha_opcode *first_opcode, | |
1061 | const expressionS *tok, | |
1062 | int *pntok, | |
1063 | int *pcpumatch) | |
1064 | { | |
1065 | const struct alpha_opcode *opcode = first_opcode; | |
1066 | int ntok = *pntok; | |
1067 | int got_cpu_match = 0; | |
252b5132 | 1068 | |
ea1562b3 | 1069 | do |
252b5132 | 1070 | { |
ea1562b3 NC |
1071 | const unsigned char *opidx; |
1072 | int tokidx = 0; | |
252b5132 | 1073 | |
ea1562b3 NC |
1074 | /* Don't match opcodes that don't exist on this architecture. */ |
1075 | if (!(opcode->flags & alpha_target)) | |
1076 | goto match_failed; | |
252b5132 | 1077 | |
ea1562b3 | 1078 | got_cpu_match = 1; |
252b5132 | 1079 | |
ea1562b3 | 1080 | for (opidx = opcode->operands; *opidx; ++opidx) |
252b5132 | 1081 | { |
ea1562b3 | 1082 | const struct alpha_operand *operand = &alpha_operands[*opidx]; |
252b5132 | 1083 | |
ea1562b3 NC |
1084 | /* Only take input from real operands. */ |
1085 | if (operand->flags & AXP_OPERAND_FAKE) | |
1086 | continue; | |
252b5132 | 1087 | |
ea1562b3 NC |
1088 | /* When we expect input, make sure we have it. */ |
1089 | if (tokidx >= ntok) | |
252b5132 | 1090 | { |
ea1562b3 NC |
1091 | if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0) |
1092 | goto match_failed; | |
1093 | continue; | |
252b5132 | 1094 | } |
252b5132 | 1095 | |
ea1562b3 NC |
1096 | /* Match operand type with expression type. */ |
1097 | switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK) | |
252b5132 | 1098 | { |
ea1562b3 NC |
1099 | case AXP_OPERAND_IR: |
1100 | if (tok[tokidx].X_op != O_register | |
1101 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1102 | goto match_failed; | |
1103 | break; | |
1104 | case AXP_OPERAND_FPR: | |
1105 | if (tok[tokidx].X_op != O_register | |
1106 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
1107 | goto match_failed; | |
1108 | break; | |
1109 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS: | |
1110 | if (tok[tokidx].X_op != O_pregister | |
1111 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1112 | goto match_failed; | |
1113 | break; | |
1114 | case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA: | |
1115 | if (tok[tokidx].X_op != O_cpregister | |
1116 | || !is_ir_num (tok[tokidx].X_add_number)) | |
1117 | goto match_failed; | |
1118 | break; | |
252b5132 | 1119 | |
ea1562b3 NC |
1120 | case AXP_OPERAND_RELATIVE: |
1121 | case AXP_OPERAND_SIGNED: | |
1122 | case AXP_OPERAND_UNSIGNED: | |
1123 | switch (tok[tokidx].X_op) | |
1124 | { | |
1125 | case O_illegal: | |
1126 | case O_absent: | |
1127 | case O_register: | |
1128 | case O_pregister: | |
1129 | case O_cpregister: | |
1130 | goto match_failed; | |
252b5132 | 1131 | |
ea1562b3 NC |
1132 | default: |
1133 | break; | |
1134 | } | |
1135 | break; | |
1136 | ||
1137 | default: | |
1138 | /* Everything else should have been fake. */ | |
1139 | abort (); | |
1140 | } | |
1141 | ++tokidx; | |
252b5132 | 1142 | } |
ea1562b3 NC |
1143 | |
1144 | /* Possible match -- did we use all of our input? */ | |
1145 | if (tokidx == ntok) | |
1146 | { | |
1147 | *pntok = ntok; | |
1148 | return opcode; | |
1149 | } | |
1150 | ||
1151 | match_failed:; | |
252b5132 | 1152 | } |
ea1562b3 NC |
1153 | while (++opcode - alpha_opcodes < (int) alpha_num_opcodes |
1154 | && !strcmp (opcode->name, first_opcode->name)); | |
252b5132 | 1155 | |
ea1562b3 NC |
1156 | if (*pcpumatch) |
1157 | *pcpumatch = got_cpu_match; | |
252b5132 | 1158 | |
ea1562b3 | 1159 | return NULL; |
252b5132 | 1160 | } |
252b5132 | 1161 | |
ea1562b3 NC |
1162 | /* Given an opcode name and a pre-tokenized set of arguments, assemble |
1163 | the insn, but do not emit it. | |
252b5132 | 1164 | |
ea1562b3 NC |
1165 | Note that this implies no macros allowed, since we can't store more |
1166 | than one insn in an insn structure. */ | |
1167 | ||
1168 | static void | |
1169 | assemble_tokens_to_insn (const char *opname, | |
1170 | const expressionS *tok, | |
1171 | int ntok, | |
1172 | struct alpha_insn *insn) | |
252b5132 | 1173 | { |
ea1562b3 NC |
1174 | const struct alpha_opcode *opcode; |
1175 | ||
1176 | /* Search opcodes. */ | |
1177 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
1178 | if (opcode) | |
1179 | { | |
1180 | int cpumatch; | |
1181 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
1182 | if (opcode) | |
1183 | { | |
1184 | assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED); | |
1185 | return; | |
1186 | } | |
1187 | else if (cpumatch) | |
1188 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
1189 | else | |
1190 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
1191 | alpha_target_name); | |
1192 | } | |
1193 | else | |
1194 | as_bad (_("unknown opcode `%s'"), opname); | |
252b5132 RH |
1195 | } |
1196 | ||
ea1562b3 NC |
1197 | /* Build a BFD section with its flags set appropriately for the .lita, |
1198 | .lit8, or .lit4 sections. */ | |
252b5132 | 1199 | |
ea1562b3 NC |
1200 | static void |
1201 | create_literal_section (const char *name, | |
1202 | segT *secp, | |
1203 | symbolS **symp) | |
252b5132 | 1204 | { |
ea1562b3 NC |
1205 | segT current_section = now_seg; |
1206 | int current_subsec = now_subseg; | |
1207 | segT new_sec; | |
252b5132 | 1208 | |
ea1562b3 NC |
1209 | *secp = new_sec = subseg_new (name, 0); |
1210 | subseg_set (current_section, current_subsec); | |
1211 | bfd_set_section_alignment (stdoutput, new_sec, 4); | |
1212 | bfd_set_section_flags (stdoutput, new_sec, | |
1213 | SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY | |
1214 | | SEC_DATA); | |
a161fe53 | 1215 | |
ea1562b3 | 1216 | S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec)); |
252b5132 RH |
1217 | } |
1218 | ||
ea1562b3 | 1219 | /* Load a (partial) expression into a target register. |
252b5132 | 1220 | |
ea1562b3 NC |
1221 | If poffset is not null, after the call it will either contain |
1222 | O_constant 0, or a 16-bit offset appropriate for any MEM format | |
1223 | instruction. In addition, pbasereg will be modified to point to | |
1224 | the base register to use in that MEM format instruction. | |
252b5132 | 1225 | |
ea1562b3 NC |
1226 | In any case, *pbasereg should contain a base register to add to the |
1227 | expression. This will normally be either AXP_REG_ZERO or | |
1228 | alpha_gp_register. Symbol addresses will always be loaded via $gp, | |
1229 | so "foo($0)" is interpreted as adding the address of foo to $0; | |
1230 | i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps, | |
1231 | but this is what OSF/1 does. | |
252b5132 | 1232 | |
ea1562b3 NC |
1233 | If explicit relocations of the form !literal!<number> are allowed, |
1234 | and used, then explicit_reloc with be an expression pointer. | |
252b5132 | 1235 | |
ea1562b3 NC |
1236 | Finally, the return value is nonzero if the calling macro may emit |
1237 | a LITUSE reloc if otherwise appropriate; the return value is the | |
1238 | sequence number to use. */ | |
252b5132 | 1239 | |
ea1562b3 NC |
1240 | static long |
1241 | load_expression (int targreg, | |
1242 | const expressionS *exp, | |
1243 | int *pbasereg, | |
198f1251 TG |
1244 | expressionS *poffset, |
1245 | const char *opname) | |
ea1562b3 NC |
1246 | { |
1247 | long emit_lituse = 0; | |
1248 | offsetT addend = exp->X_add_number; | |
1249 | int basereg = *pbasereg; | |
1250 | struct alpha_insn insn; | |
1251 | expressionS newtok[3]; | |
3765b1be | 1252 | |
ea1562b3 NC |
1253 | switch (exp->X_op) |
1254 | { | |
1255 | case O_symbol: | |
66ba4c77 | 1256 | { |
ea1562b3 NC |
1257 | #ifdef OBJ_ECOFF |
1258 | offsetT lit; | |
66ba4c77 | 1259 | |
ea1562b3 NC |
1260 | /* Attempt to reduce .lit load by splitting the offset from |
1261 | its symbol when possible, but don't create a situation in | |
1262 | which we'd fail. */ | |
1263 | if (!range_signed_32 (addend) && | |
1264 | (alpha_noat_on || targreg == AXP_REG_AT)) | |
66ba4c77 | 1265 | { |
ea1562b3 NC |
1266 | lit = add_to_literal_pool (exp->X_add_symbol, addend, |
1267 | alpha_lita_section, 8); | |
1268 | addend = 0; | |
66ba4c77 | 1269 | } |
ea1562b3 NC |
1270 | else |
1271 | lit = add_to_literal_pool (exp->X_add_symbol, 0, | |
1272 | alpha_lita_section, 8); | |
252b5132 | 1273 | |
ea1562b3 NC |
1274 | if (lit >= 0x8000) |
1275 | as_fatal (_("overflow in literal (.lita) table")); | |
252b5132 | 1276 | |
ea1562b3 | 1277 | /* Emit "ldq r, lit(gp)". */ |
252b5132 | 1278 | |
ea1562b3 NC |
1279 | if (basereg != alpha_gp_register && targreg == basereg) |
1280 | { | |
1281 | if (alpha_noat_on) | |
1282 | as_bad (_("macro requires $at register while noat in effect")); | |
1283 | if (targreg == AXP_REG_AT) | |
1284 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1285 | |
ea1562b3 NC |
1286 | set_tok_reg (newtok[0], AXP_REG_AT); |
1287 | } | |
1288 | else | |
1289 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1290 | |
ea1562b3 NC |
1291 | set_tok_sym (newtok[1], alpha_lita_symbol, lit); |
1292 | set_tok_preg (newtok[2], alpha_gp_register); | |
252b5132 | 1293 | |
ea1562b3 | 1294 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1295 | |
9c2799c2 | 1296 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1297 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; |
1298 | insn.sequence = emit_lituse = next_sequence_num--; | |
1299 | #endif /* OBJ_ECOFF */ | |
252b5132 | 1300 | #ifdef OBJ_ELF |
ea1562b3 | 1301 | /* Emit "ldq r, gotoff(gp)". */ |
252b5132 | 1302 | |
ea1562b3 NC |
1303 | if (basereg != alpha_gp_register && targreg == basereg) |
1304 | { | |
1305 | if (alpha_noat_on) | |
1306 | as_bad (_("macro requires $at register while noat in effect")); | |
1307 | if (targreg == AXP_REG_AT) | |
1308 | as_bad (_("macro requires $at while $at in use")); | |
252b5132 | 1309 | |
ea1562b3 NC |
1310 | set_tok_reg (newtok[0], AXP_REG_AT); |
1311 | } | |
1312 | else | |
1313 | set_tok_reg (newtok[0], targreg); | |
252b5132 | 1314 | |
ea1562b3 NC |
1315 | /* XXX: Disable this .got minimizing optimization so that we can get |
1316 | better instruction offset knowledge in the compiler. This happens | |
1317 | very infrequently anyway. */ | |
1318 | if (1 | |
1319 | || (!range_signed_32 (addend) | |
1320 | && (alpha_noat_on || targreg == AXP_REG_AT))) | |
1321 | { | |
1322 | newtok[1] = *exp; | |
1323 | addend = 0; | |
1324 | } | |
1325 | else | |
1326 | set_tok_sym (newtok[1], exp->X_add_symbol, 0); | |
252b5132 | 1327 | |
ea1562b3 | 1328 | set_tok_preg (newtok[2], alpha_gp_register); |
252b5132 | 1329 | |
ea1562b3 | 1330 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
252b5132 | 1331 | |
9c2799c2 | 1332 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1333 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; |
1334 | insn.sequence = emit_lituse = next_sequence_num--; | |
1335 | #endif /* OBJ_ELF */ | |
1336 | #ifdef OBJ_EVAX | |
ea1562b3 | 1337 | /* Find symbol or symbol pointer in link section. */ |
252b5132 | 1338 | |
198f1251 | 1339 | if (exp->X_add_symbol == alpha_evax_proc->symbol) |
ea1562b3 | 1340 | { |
51794af8 TG |
1341 | /* Linkage-relative expression. */ |
1342 | set_tok_reg (newtok[0], targreg); | |
1343 | ||
ea1562b3 NC |
1344 | if (range_signed_16 (addend)) |
1345 | { | |
ea1562b3 | 1346 | set_tok_const (newtok[1], addend); |
ea1562b3 NC |
1347 | addend = 0; |
1348 | } | |
1349 | else | |
1350 | { | |
ea1562b3 | 1351 | set_tok_const (newtok[1], 0); |
ea1562b3 | 1352 | } |
51794af8 TG |
1353 | set_tok_preg (newtok[2], basereg); |
1354 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); | |
ea1562b3 NC |
1355 | } |
1356 | else | |
1357 | { | |
198f1251 TG |
1358 | const char *symname = S_GET_NAME (exp->X_add_symbol); |
1359 | const char *ptr1, *ptr2; | |
1360 | int symlen = strlen (symname); | |
1361 | ||
1362 | if ((symlen > 4 && | |
1363 | strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0)) | |
ea1562b3 | 1364 | { |
51794af8 TG |
1365 | /* Access to an item whose address is stored in the linkage |
1366 | section. Just read the address. */ | |
198f1251 TG |
1367 | set_tok_reg (newtok[0], targreg); |
1368 | ||
1369 | newtok[1] = *exp; | |
1370 | newtok[1].X_op = O_subtract; | |
1371 | newtok[1].X_op_symbol = alpha_evax_proc->symbol; | |
1372 | ||
1373 | set_tok_preg (newtok[2], basereg); | |
1374 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1375 | alpha_linkage_symbol = exp->X_add_symbol; | |
1376 | ||
1377 | if (poffset) | |
1378 | set_tok_const (*poffset, 0); | |
1379 | ||
1380 | if (alpha_flag_replace && targreg == 26) | |
1381 | { | |
51794af8 | 1382 | /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */ |
198f1251 TG |
1383 | char *ensymname; |
1384 | symbolS *ensym; | |
198f1251 | 1385 | |
51794af8 | 1386 | /* Build the entry name as 'NAME..en'. */ |
198f1251 TG |
1387 | ptr1 = strstr (symname, "..") + 2; |
1388 | if (ptr1 > ptr2) | |
1389 | ptr1 = symname; | |
e1f4d6bd | 1390 | ensymname = (char *) alloca (ptr2 - ptr1 + 5); |
198f1251 TG |
1391 | memcpy (ensymname, ptr1, ptr2 - ptr1); |
1392 | memcpy (ensymname + (ptr2 - ptr1), "..en", 5); | |
1393 | ||
9c2799c2 | 1394 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1395 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP; |
1396 | ensym = symbol_find_or_make (ensymname); | |
1397 | ensym->sy_used = 1; | |
1398 | /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH | |
1399 | case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker | |
1400 | Utility Manual. */ | |
1401 | insn.fixups[insn.nfixups].exp.X_op = O_symbol; | |
1402 | insn.fixups[insn.nfixups].exp.X_add_symbol = ensym; | |
1403 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1404 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1405 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1406 | insn.nfixups++; | |
1407 | ||
1408 | /* ??? Force bsym to be instantiated now, as it will be | |
1409 | too late to do so in tc_gen_reloc. */ | |
87975d2a | 1410 | symbol_get_bfdsym (exp->X_add_symbol); |
198f1251 TG |
1411 | } |
1412 | else if (alpha_flag_replace && targreg == 27) | |
1413 | { | |
51794af8 | 1414 | /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */ |
198f1251 TG |
1415 | char *psymname; |
1416 | symbolS *psym; | |
1417 | ||
51794af8 | 1418 | /* Extract NAME. */ |
198f1251 TG |
1419 | ptr1 = strstr (symname, "..") + 2; |
1420 | if (ptr1 > ptr2) | |
1421 | ptr1 = symname; | |
e1f4d6bd | 1422 | psymname = (char *) alloca (ptr2 - ptr1 + 1); |
198f1251 TG |
1423 | memcpy (psymname, ptr1, ptr2 - ptr1); |
1424 | psymname [ptr2 - ptr1] = 0; | |
51794af8 | 1425 | |
9c2799c2 | 1426 | gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); |
198f1251 TG |
1427 | insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA; |
1428 | psym = symbol_find_or_make (psymname); | |
1429 | psym->sy_used = 1; | |
1430 | insn.fixups[insn.nfixups].exp.X_op = O_subtract; | |
1431 | insn.fixups[insn.nfixups].exp.X_add_symbol = psym; | |
1432 | insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol; | |
1433 | insn.fixups[insn.nfixups].exp.X_add_number = 0; | |
1434 | insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; | |
1435 | insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; | |
1436 | insn.nfixups++; | |
1437 | } | |
1438 | ||
51794af8 | 1439 | emit_insn (&insn); |
198f1251 | 1440 | return 0; |
ea1562b3 NC |
1441 | } |
1442 | else | |
198f1251 | 1443 | { |
51794af8 TG |
1444 | /* Not in the linkage section. Put the value into the linkage |
1445 | section. */ | |
198f1251 | 1446 | symbolS *linkexp; |
252b5132 | 1447 | |
198f1251 TG |
1448 | if (!range_signed_32 (addend)) |
1449 | addend = sign_extend_32 (addend); | |
8aacb050 | 1450 | linkexp = add_to_link_pool (exp->X_add_symbol, 0); |
198f1251 TG |
1451 | set_tok_reg (newtok[0], targreg); |
1452 | set_tok_sym (newtok[1], linkexp, 0); | |
1453 | set_tok_preg (newtok[2], basereg); | |
1454 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1455 | } | |
ea1562b3 NC |
1456 | } |
1457 | #endif /* OBJ_EVAX */ | |
252b5132 | 1458 | |
ea1562b3 | 1459 | emit_insn (&insn); |
19f78583 | 1460 | |
ea1562b3 NC |
1461 | #ifndef OBJ_EVAX |
1462 | if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO) | |
1463 | { | |
1464 | /* Emit "addq r, base, r". */ | |
19f78583 | 1465 | |
ea1562b3 NC |
1466 | set_tok_reg (newtok[1], basereg); |
1467 | set_tok_reg (newtok[2], targreg); | |
1468 | assemble_tokens ("addq", newtok, 3, 0); | |
1469 | } | |
1470 | #endif | |
1471 | basereg = targreg; | |
1472 | } | |
1473 | break; | |
19f78583 | 1474 | |
ea1562b3 NC |
1475 | case O_constant: |
1476 | break; | |
19f78583 | 1477 | |
ea1562b3 NC |
1478 | case O_subtract: |
1479 | /* Assume that this difference expression will be resolved to an | |
1480 | absolute value and that that value will fit in 16 bits. */ | |
19f78583 | 1481 | |
ea1562b3 NC |
1482 | set_tok_reg (newtok[0], targreg); |
1483 | newtok[1] = *exp; | |
1484 | set_tok_preg (newtok[2], basereg); | |
198f1251 | 1485 | assemble_tokens (opname, newtok, 3, 0); |
43b4c25e | 1486 | |
ea1562b3 NC |
1487 | if (poffset) |
1488 | set_tok_const (*poffset, 0); | |
1489 | return 0; | |
43b4c25e | 1490 | |
ea1562b3 NC |
1491 | case O_big: |
1492 | if (exp->X_add_number > 0) | |
1493 | as_bad (_("bignum invalid; zero assumed")); | |
1494 | else | |
1495 | as_bad (_("floating point number invalid; zero assumed")); | |
1496 | addend = 0; | |
1497 | break; | |
43b4c25e | 1498 | |
ea1562b3 NC |
1499 | default: |
1500 | as_bad (_("can't handle expression")); | |
1501 | addend = 0; | |
1502 | break; | |
1503 | } | |
43b4c25e | 1504 | |
ea1562b3 | 1505 | if (!range_signed_32 (addend)) |
43b4c25e | 1506 | { |
198f1251 TG |
1507 | #ifdef OBJ_EVAX |
1508 | symbolS *litexp; | |
1509 | #else | |
ea1562b3 NC |
1510 | offsetT lit; |
1511 | long seq_num = next_sequence_num--; | |
198f1251 | 1512 | #endif |
43b4c25e | 1513 | |
ea1562b3 NC |
1514 | /* For 64-bit addends, just put it in the literal pool. */ |
1515 | #ifdef OBJ_EVAX | |
1516 | /* Emit "ldq targreg, lit(basereg)". */ | |
8aacb050 | 1517 | litexp = add_to_link_pool (section_symbol (absolute_section), addend); |
ea1562b3 | 1518 | set_tok_reg (newtok[0], targreg); |
198f1251 | 1519 | set_tok_sym (newtok[1], litexp, 0); |
ea1562b3 NC |
1520 | set_tok_preg (newtok[2], alpha_gp_register); |
1521 | assemble_tokens ("ldq", newtok, 3, 0); | |
1522 | #else | |
1523 | ||
1524 | if (alpha_lit8_section == NULL) | |
43b4c25e | 1525 | { |
ea1562b3 NC |
1526 | create_literal_section (".lit8", |
1527 | &alpha_lit8_section, | |
1528 | &alpha_lit8_symbol); | |
1529 | ||
1530 | #ifdef OBJ_ECOFF | |
1531 | alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000, | |
1532 | alpha_lita_section, 8); | |
1533 | if (alpha_lit8_literal >= 0x8000) | |
1534 | as_fatal (_("overflow in literal (.lita) table")); | |
11f45fb5 | 1535 | #endif |
ea1562b3 | 1536 | } |
43b4c25e | 1537 | |
ea1562b3 NC |
1538 | lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000; |
1539 | if (lit >= 0x8000) | |
1540 | as_fatal (_("overflow in literal (.lit8) table")); | |
19f78583 | 1541 | |
ea1562b3 | 1542 | /* Emit "lda litreg, .lit8+0x8000". */ |
3765b1be | 1543 | |
ea1562b3 NC |
1544 | if (targreg == basereg) |
1545 | { | |
1546 | if (alpha_noat_on) | |
1547 | as_bad (_("macro requires $at register while noat in effect")); | |
1548 | if (targreg == AXP_REG_AT) | |
1549 | as_bad (_("macro requires $at while $at in use")); | |
1550 | ||
1551 | set_tok_reg (newtok[0], AXP_REG_AT); | |
43b4c25e | 1552 | } |
ea1562b3 NC |
1553 | else |
1554 | set_tok_reg (newtok[0], targreg); | |
1555 | #ifdef OBJ_ECOFF | |
1556 | set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal); | |
1557 | #endif | |
1558 | #ifdef OBJ_ELF | |
1559 | set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000); | |
1560 | #endif | |
1561 | set_tok_preg (newtok[2], alpha_gp_register); | |
43b4c25e | 1562 | |
ea1562b3 | 1563 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); |
19f78583 | 1564 | |
9c2799c2 | 1565 | gas_assert (insn.nfixups == 1); |
ea1562b3 NC |
1566 | #ifdef OBJ_ECOFF |
1567 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; | |
1568 | #endif | |
1569 | #ifdef OBJ_ELF | |
1570 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; | |
1571 | #endif | |
1572 | insn.sequence = seq_num; | |
19f78583 | 1573 | |
ea1562b3 | 1574 | emit_insn (&insn); |
19f78583 | 1575 | |
ea1562b3 | 1576 | /* Emit "ldq litreg, lit(litreg)". */ |
19f78583 | 1577 | |
ea1562b3 NC |
1578 | set_tok_const (newtok[1], lit); |
1579 | set_tok_preg (newtok[2], newtok[0].X_add_number); | |
1580 | ||
1581 | assemble_tokens_to_insn ("ldq", newtok, 3, &insn); | |
1582 | ||
9c2799c2 | 1583 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
1584 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
1585 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
1586 | insn.nfixups++; | |
1587 | insn.sequence = seq_num; | |
1588 | emit_lituse = 0; | |
1589 | ||
1590 | emit_insn (&insn); | |
1591 | ||
1592 | /* Emit "addq litreg, base, target". */ | |
1593 | ||
1594 | if (basereg != AXP_REG_ZERO) | |
1595 | { | |
1596 | set_tok_reg (newtok[1], basereg); | |
1597 | set_tok_reg (newtok[2], targreg); | |
1598 | assemble_tokens ("addq", newtok, 3, 0); | |
1599 | } | |
1600 | #endif /* !OBJ_EVAX */ | |
1601 | ||
1602 | if (poffset) | |
1603 | set_tok_const (*poffset, 0); | |
1604 | *pbasereg = targreg; | |
1605 | } | |
1606 | else | |
43b4c25e | 1607 | { |
ea1562b3 NC |
1608 | offsetT low, high, extra, tmp; |
1609 | ||
1610 | /* For 32-bit operands, break up the addend. */ | |
1611 | ||
1612 | low = sign_extend_16 (addend); | |
1613 | tmp = addend - low; | |
1614 | high = sign_extend_16 (tmp >> 16); | |
1615 | ||
1616 | if (tmp - (high << 16)) | |
43b4c25e | 1617 | { |
ea1562b3 NC |
1618 | extra = 0x4000; |
1619 | tmp -= 0x40000000; | |
1620 | high = sign_extend_16 (tmp >> 16); | |
1621 | } | |
1622 | else | |
1623 | extra = 0; | |
3765b1be | 1624 | |
ea1562b3 NC |
1625 | set_tok_reg (newtok[0], targreg); |
1626 | set_tok_preg (newtok[2], basereg); | |
3765b1be | 1627 | |
ea1562b3 NC |
1628 | if (extra) |
1629 | { | |
1630 | /* Emit "ldah r, extra(r). */ | |
1631 | set_tok_const (newtok[1], extra); | |
1632 | assemble_tokens ("ldah", newtok, 3, 0); | |
1633 | set_tok_preg (newtok[2], basereg = targreg); | |
1634 | } | |
43b4c25e | 1635 | |
ea1562b3 NC |
1636 | if (high) |
1637 | { | |
1638 | /* Emit "ldah r, high(r). */ | |
1639 | set_tok_const (newtok[1], high); | |
1640 | assemble_tokens ("ldah", newtok, 3, 0); | |
1641 | basereg = targreg; | |
1642 | set_tok_preg (newtok[2], basereg); | |
1643 | } | |
19f78583 | 1644 | |
ea1562b3 NC |
1645 | if ((low && !poffset) || (!poffset && basereg != targreg)) |
1646 | { | |
1647 | /* Emit "lda r, low(base)". */ | |
1648 | set_tok_const (newtok[1], low); | |
1649 | assemble_tokens ("lda", newtok, 3, 0); | |
1650 | basereg = targreg; | |
1651 | low = 0; | |
43b4c25e | 1652 | } |
ea1562b3 NC |
1653 | |
1654 | if (poffset) | |
1655 | set_tok_const (*poffset, low); | |
1656 | *pbasereg = basereg; | |
43b4c25e | 1657 | } |
ea1562b3 NC |
1658 | |
1659 | return emit_lituse; | |
43b4c25e | 1660 | } |
43b4c25e | 1661 | |
ea1562b3 NC |
1662 | /* The lda macro differs from the lda instruction in that it handles |
1663 | most simple expressions, particularly symbol address loads and | |
1664 | large constants. */ | |
11f45fb5 | 1665 | |
ea1562b3 NC |
1666 | static void |
1667 | emit_lda (const expressionS *tok, | |
1668 | int ntok, | |
1669 | const void * unused ATTRIBUTE_UNUSED) | |
1670 | { | |
1671 | int basereg; | |
43b4c25e | 1672 | |
ea1562b3 NC |
1673 | if (ntok == 2) |
1674 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
1675 | else | |
1676 | basereg = tok[2].X_add_number; | |
1677 | ||
198f1251 | 1678 | (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda"); |
43b4c25e | 1679 | } |
43b4c25e | 1680 | |
ea1562b3 NC |
1681 | /* The ldah macro differs from the ldah instruction in that it has $31 |
1682 | as an implied base register. */ | |
252b5132 | 1683 | |
ea1562b3 NC |
1684 | static void |
1685 | emit_ldah (const expressionS *tok, | |
1686 | int ntok ATTRIBUTE_UNUSED, | |
1687 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 1688 | { |
ea1562b3 | 1689 | expressionS newtok[3]; |
252b5132 | 1690 | |
ea1562b3 NC |
1691 | newtok[0] = tok[0]; |
1692 | newtok[1] = tok[1]; | |
1693 | set_tok_preg (newtok[2], AXP_REG_ZERO); | |
252b5132 | 1694 | |
ea1562b3 NC |
1695 | assemble_tokens ("ldah", newtok, 3, 0); |
1696 | } | |
19f78583 | 1697 | |
ea1562b3 NC |
1698 | /* Called internally to handle all alignment needs. This takes care |
1699 | of eliding calls to frag_align if'n the cached current alignment | |
1700 | says we've already got it, as well as taking care of the auto-align | |
1701 | feature wrt labels. */ | |
252b5132 | 1702 | |
ea1562b3 NC |
1703 | static void |
1704 | alpha_align (int n, | |
1705 | char *pfill, | |
1706 | symbolS *label, | |
1707 | int force ATTRIBUTE_UNUSED) | |
1708 | { | |
1709 | if (alpha_current_align >= n) | |
1710 | return; | |
43b4c25e | 1711 | |
ea1562b3 NC |
1712 | if (pfill == NULL) |
1713 | { | |
1714 | if (subseg_text_p (now_seg)) | |
1715 | frag_align_code (n, 0); | |
1716 | else | |
1717 | frag_align (n, 0, 0); | |
1718 | } | |
1719 | else | |
1720 | frag_align (n, *pfill, 0); | |
43b4c25e | 1721 | |
ea1562b3 | 1722 | alpha_current_align = n; |
43b4c25e | 1723 | |
ea1562b3 NC |
1724 | if (label != NULL && S_GET_SEGMENT (label) == now_seg) |
1725 | { | |
1726 | symbol_set_frag (label, frag_now); | |
1727 | S_SET_VALUE (label, (valueT) frag_now_fix ()); | |
1728 | } | |
43b4c25e | 1729 | |
ea1562b3 | 1730 | record_alignment (now_seg, n); |
43b4c25e | 1731 | |
ea1562b3 NC |
1732 | /* ??? If alpha_flag_relax && force && elf, record the requested alignment |
1733 | in a reloc for the linker to see. */ | |
1734 | } | |
19f78583 | 1735 | |
ea1562b3 | 1736 | /* Actually output an instruction with its fixup. */ |
19f78583 | 1737 | |
ea1562b3 NC |
1738 | static void |
1739 | emit_insn (struct alpha_insn *insn) | |
1740 | { | |
1741 | char *f; | |
1742 | int i; | |
43b4c25e | 1743 | |
ea1562b3 NC |
1744 | /* Take care of alignment duties. */ |
1745 | if (alpha_auto_align_on && alpha_current_align < 2) | |
1746 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
1747 | if (alpha_current_align > 2) | |
1748 | alpha_current_align = 2; | |
1749 | alpha_insn_label = NULL; | |
43b4c25e | 1750 | |
ea1562b3 NC |
1751 | /* Write out the instruction. */ |
1752 | f = frag_more (4); | |
1753 | md_number_to_chars (f, insn->insn, 4); | |
43b4c25e | 1754 | |
ea1562b3 NC |
1755 | #ifdef OBJ_ELF |
1756 | dwarf2_emit_insn (4); | |
1757 | #endif | |
252b5132 | 1758 | |
ea1562b3 NC |
1759 | /* Apply the fixups in order. */ |
1760 | for (i = 0; i < insn->nfixups; ++i) | |
1761 | { | |
1762 | const struct alpha_operand *operand = (const struct alpha_operand *) 0; | |
1763 | struct alpha_fixup *fixup = &insn->fixups[i]; | |
1764 | struct alpha_reloc_tag *info = NULL; | |
1765 | int size, pcrel; | |
1766 | fixS *fixP; | |
252b5132 | 1767 | |
ea1562b3 NC |
1768 | /* Some fixups are only used internally and so have no howto. */ |
1769 | if ((int) fixup->reloc < 0) | |
1770 | { | |
1771 | operand = &alpha_operands[-(int) fixup->reloc]; | |
1772 | size = 4; | |
1773 | pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0); | |
1774 | } | |
1775 | else if (fixup->reloc > BFD_RELOC_UNUSED | |
1776 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16 | |
1777 | || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16) | |
1778 | { | |
1779 | size = 2; | |
1780 | pcrel = 0; | |
1781 | } | |
1782 | else | |
1783 | { | |
21d799b5 NC |
1784 | reloc_howto_type *reloc_howto = |
1785 | bfd_reloc_type_lookup (stdoutput, | |
1786 | (bfd_reloc_code_real_type) fixup->reloc); | |
9c2799c2 | 1787 | gas_assert (reloc_howto); |
252b5132 | 1788 | |
ea1562b3 | 1789 | size = bfd_get_reloc_size (reloc_howto); |
252b5132 | 1790 | |
198f1251 TG |
1791 | switch (fixup->reloc) |
1792 | { | |
1793 | #ifdef OBJ_EVAX | |
1794 | case BFD_RELOC_ALPHA_NOP: | |
1795 | case BFD_RELOC_ALPHA_BSR: | |
1796 | case BFD_RELOC_ALPHA_LDA: | |
1797 | case BFD_RELOC_ALPHA_BOH: | |
1798 | break; | |
1799 | #endif | |
1800 | default: | |
9c2799c2 | 1801 | gas_assert (size >= 1 && size <= 4); |
198f1251 TG |
1802 | } |
1803 | ||
ea1562b3 NC |
1804 | pcrel = reloc_howto->pc_relative; |
1805 | } | |
43b4c25e | 1806 | |
ea1562b3 | 1807 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, |
21d799b5 | 1808 | &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc); |
252b5132 | 1809 | |
ea1562b3 NC |
1810 | /* Turn off complaints that the addend is too large for some fixups, |
1811 | and copy in the sequence number for the explicit relocations. */ | |
1812 | switch (fixup->reloc) | |
1813 | { | |
1814 | case BFD_RELOC_ALPHA_HINT: | |
1815 | case BFD_RELOC_GPREL32: | |
1816 | case BFD_RELOC_GPREL16: | |
1817 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
1818 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
1819 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
1820 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
1821 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
1822 | case BFD_RELOC_ALPHA_DTPREL16: | |
1823 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
1824 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
1825 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
1826 | case BFD_RELOC_ALPHA_TPREL16: | |
1827 | fixP->fx_no_overflow = 1; | |
252b5132 | 1828 | break; |
252b5132 | 1829 | |
ea1562b3 NC |
1830 | case BFD_RELOC_ALPHA_GPDISP_HI16: |
1831 | fixP->fx_no_overflow = 1; | |
1832 | fixP->fx_addsy = section_symbol (now_seg); | |
1833 | fixP->fx_offset = 0; | |
43b4c25e | 1834 | |
ea1562b3 NC |
1835 | info = get_alpha_reloc_tag (insn->sequence); |
1836 | if (++info->n_master > 1) | |
1837 | as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence); | |
1838 | if (info->segment != now_seg) | |
1839 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1840 | insn->sequence); | |
1841 | fixP->tc_fix_data.info = info; | |
1842 | break; | |
43b4c25e | 1843 | |
ea1562b3 NC |
1844 | case BFD_RELOC_ALPHA_GPDISP_LO16: |
1845 | fixP->fx_no_overflow = 1; | |
252b5132 | 1846 | |
ea1562b3 NC |
1847 | info = get_alpha_reloc_tag (insn->sequence); |
1848 | if (++info->n_slaves > 1) | |
1849 | as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence); | |
1850 | if (info->segment != now_seg) | |
1851 | as_bad (_("both insns for !gpdisp!%ld must be in the same section"), | |
1852 | insn->sequence); | |
1853 | fixP->tc_fix_data.info = info; | |
1854 | info->slaves = fixP; | |
1855 | break; | |
1856 | ||
1857 | case BFD_RELOC_ALPHA_LITERAL: | |
1858 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
1859 | fixP->fx_no_overflow = 1; | |
1860 | ||
1861 | if (insn->sequence == 0) | |
1862 | break; | |
1863 | info = get_alpha_reloc_tag (insn->sequence); | |
1864 | info->master = fixP; | |
1865 | info->n_master++; | |
1866 | if (info->segment != now_seg) | |
1867 | info->multi_section_p = 1; | |
1868 | fixP->tc_fix_data.info = info; | |
1869 | break; | |
43b4c25e | 1870 | |
19f78583 | 1871 | #ifdef RELOC_OP_P |
ea1562b3 NC |
1872 | case DUMMY_RELOC_LITUSE_ADDR: |
1873 | fixP->fx_offset = LITUSE_ALPHA_ADDR; | |
1874 | goto do_lituse; | |
1875 | case DUMMY_RELOC_LITUSE_BASE: | |
1876 | fixP->fx_offset = LITUSE_ALPHA_BASE; | |
1877 | goto do_lituse; | |
1878 | case DUMMY_RELOC_LITUSE_BYTOFF: | |
1879 | fixP->fx_offset = LITUSE_ALPHA_BYTOFF; | |
1880 | goto do_lituse; | |
1881 | case DUMMY_RELOC_LITUSE_JSR: | |
1882 | fixP->fx_offset = LITUSE_ALPHA_JSR; | |
1883 | goto do_lituse; | |
1884 | case DUMMY_RELOC_LITUSE_TLSGD: | |
1885 | fixP->fx_offset = LITUSE_ALPHA_TLSGD; | |
1886 | goto do_lituse; | |
1887 | case DUMMY_RELOC_LITUSE_TLSLDM: | |
1888 | fixP->fx_offset = LITUSE_ALPHA_TLSLDM; | |
1889 | goto do_lituse; | |
04fe8f58 RH |
1890 | case DUMMY_RELOC_LITUSE_JSRDIRECT: |
1891 | fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT; | |
1892 | goto do_lituse; | |
ea1562b3 NC |
1893 | do_lituse: |
1894 | fixP->fx_addsy = section_symbol (now_seg); | |
1895 | fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE; | |
1896 | ||
1897 | info = get_alpha_reloc_tag (insn->sequence); | |
1898 | if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD) | |
1899 | info->saw_lu_tlsgd = 1; | |
1900 | else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM) | |
1901 | info->saw_lu_tlsldm = 1; | |
1902 | if (++info->n_slaves > 1) | |
1903 | { | |
1904 | if (info->saw_lu_tlsgd) | |
1905 | as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"), | |
1906 | insn->sequence); | |
1907 | else if (info->saw_lu_tlsldm) | |
1908 | as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"), | |
1909 | insn->sequence); | |
1910 | } | |
1911 | fixP->tc_fix_data.info = info; | |
1912 | fixP->tc_fix_data.next_reloc = info->slaves; | |
1913 | info->slaves = fixP; | |
1914 | if (info->segment != now_seg) | |
1915 | info->multi_section_p = 1; | |
1916 | break; | |
1917 | ||
1918 | case BFD_RELOC_ALPHA_TLSGD: | |
1919 | fixP->fx_no_overflow = 1; | |
1920 | ||
1921 | if (insn->sequence == 0) | |
1922 | break; | |
1923 | info = get_alpha_reloc_tag (insn->sequence); | |
1924 | if (info->saw_tlsgd) | |
1925 | as_bad (_("duplicate !tlsgd!%ld"), insn->sequence); | |
1926 | else if (info->saw_tlsldm) | |
1927 | as_bad (_("sequence number in use for !tlsldm!%ld"), | |
1928 | insn->sequence); | |
1929 | else | |
1930 | info->saw_tlsgd = 1; | |
1931 | fixP->tc_fix_data.info = info; | |
1932 | break; | |
1933 | ||
1934 | case BFD_RELOC_ALPHA_TLSLDM: | |
1935 | fixP->fx_no_overflow = 1; | |
1936 | ||
1937 | if (insn->sequence == 0) | |
1938 | break; | |
1939 | info = get_alpha_reloc_tag (insn->sequence); | |
1940 | if (info->saw_tlsldm) | |
1941 | as_bad (_("duplicate !tlsldm!%ld"), insn->sequence); | |
1942 | else if (info->saw_tlsgd) | |
1943 | as_bad (_("sequence number in use for !tlsgd!%ld"), | |
1944 | insn->sequence); | |
1945 | else | |
1946 | info->saw_tlsldm = 1; | |
1947 | fixP->tc_fix_data.info = info; | |
1948 | break; | |
19f78583 | 1949 | #endif |
198f1251 TG |
1950 | #ifdef OBJ_EVAX |
1951 | case BFD_RELOC_ALPHA_NOP: | |
1952 | case BFD_RELOC_ALPHA_LDA: | |
1953 | case BFD_RELOC_ALPHA_BSR: | |
1954 | case BFD_RELOC_ALPHA_BOH: | |
1955 | info = get_alpha_reloc_tag (next_sequence_num--); | |
1956 | fixP->tc_fix_data.info = info; | |
1957 | fixP->tc_fix_data.info->sym = fixup->xtrasym; | |
1958 | fixP->tc_fix_data.info->psym = fixup->procsym; | |
1959 | break; | |
1960 | #endif | |
1961 | ||
ea1562b3 NC |
1962 | default: |
1963 | if ((int) fixup->reloc < 0) | |
1964 | { | |
1965 | if (operand->flags & AXP_OPERAND_NOOVERFLOW) | |
1966 | fixP->fx_no_overflow = 1; | |
1967 | } | |
1968 | break; | |
1969 | } | |
1970 | } | |
252b5132 RH |
1971 | } |
1972 | ||
ea1562b3 | 1973 | /* Insert an operand value into an instruction. */ |
252b5132 | 1974 | |
ea1562b3 NC |
1975 | static unsigned |
1976 | insert_operand (unsigned insn, | |
1977 | const struct alpha_operand *operand, | |
1978 | offsetT val, | |
1979 | char *file, | |
1980 | unsigned line) | |
252b5132 | 1981 | { |
ea1562b3 | 1982 | if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW)) |
252b5132 | 1983 | { |
ea1562b3 | 1984 | offsetT min, max; |
252b5132 | 1985 | |
ea1562b3 | 1986 | if (operand->flags & AXP_OPERAND_SIGNED) |
252b5132 | 1987 | { |
ea1562b3 NC |
1988 | max = (1 << (operand->bits - 1)) - 1; |
1989 | min = -(1 << (operand->bits - 1)); | |
1990 | } | |
1991 | else | |
1992 | { | |
1993 | max = (1 << operand->bits) - 1; | |
1994 | min = 0; | |
1995 | } | |
252b5132 | 1996 | |
ea1562b3 NC |
1997 | if (val < min || val > max) |
1998 | as_warn_value_out_of_range (_("operand"), val, min, max, file, line); | |
1999 | } | |
252b5132 | 2000 | |
ea1562b3 NC |
2001 | if (operand->insert) |
2002 | { | |
2003 | const char *errmsg = NULL; | |
252b5132 RH |
2004 | |
2005 | insn = (*operand->insert) (insn, val, &errmsg); | |
2006 | if (errmsg) | |
20203fb9 | 2007 | as_warn ("%s", errmsg); |
252b5132 RH |
2008 | } |
2009 | else | |
2010 | insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift); | |
2011 | ||
2012 | return insn; | |
2013 | } | |
2014 | ||
11f45fb5 NC |
2015 | /* Turn an opcode description and a set of arguments into |
2016 | an instruction and a fixup. */ | |
252b5132 RH |
2017 | |
2018 | static void | |
ea1562b3 NC |
2019 | assemble_insn (const struct alpha_opcode *opcode, |
2020 | const expressionS *tok, | |
2021 | int ntok, | |
2022 | struct alpha_insn *insn, | |
21d799b5 | 2023 | extended_bfd_reloc_code_real_type reloc) |
252b5132 | 2024 | { |
19f78583 RH |
2025 | const struct alpha_operand *reloc_operand = NULL; |
2026 | const expressionS *reloc_exp = NULL; | |
252b5132 RH |
2027 | const unsigned char *argidx; |
2028 | unsigned image; | |
2029 | int tokidx = 0; | |
2030 | ||
2031 | memset (insn, 0, sizeof (*insn)); | |
2032 | image = opcode->opcode; | |
2033 | ||
2034 | for (argidx = opcode->operands; *argidx; ++argidx) | |
2035 | { | |
2036 | const struct alpha_operand *operand = &alpha_operands[*argidx]; | |
32ff5c2e | 2037 | const expressionS *t = (const expressionS *) 0; |
252b5132 RH |
2038 | |
2039 | if (operand->flags & AXP_OPERAND_FAKE) | |
2040 | { | |
ea1562b3 | 2041 | /* Fake operands take no value and generate no fixup. */ |
32ff5c2e | 2042 | image = insert_operand (image, operand, 0, NULL, 0); |
252b5132 RH |
2043 | continue; |
2044 | } | |
2045 | ||
2046 | if (tokidx >= ntok) | |
2047 | { | |
2048 | switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK) | |
2049 | { | |
2050 | case AXP_OPERAND_DEFAULT_FIRST: | |
2051 | t = &tok[0]; | |
2052 | break; | |
2053 | case AXP_OPERAND_DEFAULT_SECOND: | |
2054 | t = &tok[1]; | |
2055 | break; | |
2056 | case AXP_OPERAND_DEFAULT_ZERO: | |
2057 | { | |
446a06c9 | 2058 | static expressionS zero_exp; |
252b5132 | 2059 | t = &zero_exp; |
446a06c9 MM |
2060 | zero_exp.X_op = O_constant; |
2061 | zero_exp.X_unsigned = 1; | |
252b5132 RH |
2062 | } |
2063 | break; | |
2064 | default: | |
bc805888 | 2065 | abort (); |
252b5132 RH |
2066 | } |
2067 | } | |
2068 | else | |
2069 | t = &tok[tokidx++]; | |
2070 | ||
2071 | switch (t->X_op) | |
2072 | { | |
2073 | case O_register: | |
2074 | case O_pregister: | |
2075 | case O_cpregister: | |
32ff5c2e KH |
2076 | image = insert_operand (image, operand, regno (t->X_add_number), |
2077 | NULL, 0); | |
252b5132 RH |
2078 | break; |
2079 | ||
2080 | case O_constant: | |
32ff5c2e | 2081 | image = insert_operand (image, operand, t->X_add_number, NULL, 0); |
9c2799c2 | 2082 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2083 | reloc_operand = operand; |
2084 | reloc_exp = t; | |
252b5132 RH |
2085 | break; |
2086 | ||
2087 | default: | |
19f78583 RH |
2088 | /* This is only 0 for fields that should contain registers, |
2089 | which means this pattern shouldn't have matched. */ | |
2090 | if (operand->default_reloc == 0) | |
2091 | abort (); | |
252b5132 | 2092 | |
19f78583 | 2093 | /* There is one special case for which an insn receives two |
cc8a6dd0 | 2094 | relocations, and thus the user-supplied reloc does not |
19f78583 RH |
2095 | override the operand reloc. */ |
2096 | if (operand->default_reloc == BFD_RELOC_ALPHA_HINT) | |
2097 | { | |
2098 | struct alpha_fixup *fixup; | |
252b5132 | 2099 | |
19f78583 RH |
2100 | if (insn->nfixups >= MAX_INSN_FIXUPS) |
2101 | as_fatal (_("too many fixups")); | |
252b5132 | 2102 | |
19f78583 RH |
2103 | fixup = &insn->fixups[insn->nfixups++]; |
2104 | fixup->exp = *t; | |
2105 | fixup->reloc = BFD_RELOC_ALPHA_HINT; | |
2106 | } | |
2107 | else | |
2108 | { | |
2109 | if (reloc == BFD_RELOC_UNUSED) | |
2110 | reloc = operand->default_reloc; | |
2111 | ||
9c2799c2 | 2112 | gas_assert (reloc_operand == NULL); |
19f78583 RH |
2113 | reloc_operand = operand; |
2114 | reloc_exp = t; | |
2115 | } | |
252b5132 RH |
2116 | break; |
2117 | } | |
2118 | } | |
2119 | ||
19f78583 RH |
2120 | if (reloc != BFD_RELOC_UNUSED) |
2121 | { | |
2122 | struct alpha_fixup *fixup; | |
2123 | ||
2124 | if (insn->nfixups >= MAX_INSN_FIXUPS) | |
2125 | as_fatal (_("too many fixups")); | |
2126 | ||
2127 | /* ??? My but this is hacky. But the OSF/1 assembler uses the same | |
2128 | relocation tag for both ldah and lda with gpdisp. Choose the | |
2129 | correct internal relocation based on the opcode. */ | |
2130 | if (reloc == BFD_RELOC_ALPHA_GPDISP) | |
2131 | { | |
2132 | if (strcmp (opcode->name, "ldah") == 0) | |
2133 | reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2134 | else if (strcmp (opcode->name, "lda") == 0) | |
2135 | reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
2136 | else | |
2137 | as_bad (_("invalid relocation for instruction")); | |
2138 | } | |
2139 | ||
2140 | /* If this is a real relocation (as opposed to a lituse hint), then | |
198f1251 TG |
2141 | the relocation width should match the operand width. |
2142 | Take care of -MDISP in operand table. */ | |
2143 | else if (reloc < BFD_RELOC_UNUSED && reloc > 0) | |
19f78583 RH |
2144 | { |
2145 | reloc_howto_type *reloc_howto | |
21d799b5 NC |
2146 | = bfd_reloc_type_lookup (stdoutput, |
2147 | (bfd_reloc_code_real_type) reloc); | |
ee21dcab AM |
2148 | if (reloc_operand == NULL |
2149 | || reloc_howto->bitsize != reloc_operand->bits) | |
19f78583 RH |
2150 | { |
2151 | as_bad (_("invalid relocation for field")); | |
2152 | return; | |
2153 | } | |
2154 | } | |
2155 | ||
2156 | fixup = &insn->fixups[insn->nfixups++]; | |
2157 | if (reloc_exp) | |
2158 | fixup->exp = *reloc_exp; | |
2159 | else | |
2160 | fixup->exp.X_op = O_absent; | |
2161 | fixup->reloc = reloc; | |
2162 | } | |
2163 | ||
252b5132 RH |
2164 | insn->insn = image; |
2165 | } | |
2166 | ||
ea1562b3 NC |
2167 | /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u, |
2168 | etc. They differ from the real instructions in that they do simple | |
2169 | expressions like the lda macro. */ | |
252b5132 RH |
2170 | |
2171 | static void | |
ea1562b3 NC |
2172 | emit_ir_load (const expressionS *tok, |
2173 | int ntok, | |
2174 | const void * opname) | |
252b5132 | 2175 | { |
ea1562b3 NC |
2176 | int basereg; |
2177 | long lituse; | |
2178 | expressionS newtok[3]; | |
2179 | struct alpha_insn insn; | |
198f1251 TG |
2180 | const char *symname |
2181 | = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): ""; | |
2182 | int symlen = strlen (symname); | |
252b5132 | 2183 | |
ea1562b3 NC |
2184 | if (ntok == 2) |
2185 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2186 | else | |
2187 | basereg = tok[2].X_add_number; | |
252b5132 | 2188 | |
198f1251 | 2189 | lituse = load_expression (tok[0].X_add_number, &tok[1], |
21d799b5 | 2190 | &basereg, &newtok[1], (const char *) opname); |
252b5132 | 2191 | |
198f1251 TG |
2192 | if (basereg == alpha_gp_register && |
2193 | (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0)) | |
2194 | return; | |
2195 | ||
ea1562b3 NC |
2196 | newtok[0] = tok[0]; |
2197 | set_tok_preg (newtok[2], basereg); | |
4dc7ead9 | 2198 | |
ea1562b3 NC |
2199 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
2200 | ||
2201 | if (lituse) | |
252b5132 | 2202 | { |
9c2799c2 | 2203 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2204 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2205 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2206 | insn.nfixups++; | |
2207 | insn.sequence = lituse; | |
2208 | } | |
252b5132 | 2209 | |
ea1562b3 NC |
2210 | emit_insn (&insn); |
2211 | } | |
252b5132 | 2212 | |
ea1562b3 NC |
2213 | /* Handle fp register loads, and both integer and fp register stores. |
2214 | Again, we handle simple expressions. */ | |
43b4c25e | 2215 | |
ea1562b3 NC |
2216 | static void |
2217 | emit_loadstore (const expressionS *tok, | |
2218 | int ntok, | |
2219 | const void * opname) | |
2220 | { | |
2221 | int basereg; | |
2222 | long lituse; | |
2223 | expressionS newtok[3]; | |
2224 | struct alpha_insn insn; | |
252b5132 | 2225 | |
ea1562b3 NC |
2226 | if (ntok == 2) |
2227 | basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); | |
2228 | else | |
2229 | basereg = tok[2].X_add_number; | |
252b5132 | 2230 | |
ea1562b3 NC |
2231 | if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number)) |
2232 | { | |
2233 | if (alpha_noat_on) | |
2234 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2235 | |
198f1251 | 2236 | lituse = load_expression (AXP_REG_AT, &tok[1], |
21d799b5 | 2237 | &basereg, &newtok[1], (const char *) opname); |
ea1562b3 NC |
2238 | } |
2239 | else | |
2240 | { | |
2241 | newtok[1] = tok[1]; | |
2242 | lituse = 0; | |
2243 | } | |
43b4c25e | 2244 | |
ea1562b3 NC |
2245 | newtok[0] = tok[0]; |
2246 | set_tok_preg (newtok[2], basereg); | |
43b4c25e | 2247 | |
ea1562b3 | 2248 | assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); |
43b4c25e | 2249 | |
ea1562b3 NC |
2250 | if (lituse) |
2251 | { | |
9c2799c2 | 2252 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2253 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2254 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2255 | insn.nfixups++; | |
2256 | insn.sequence = lituse; | |
2257 | } | |
43b4c25e | 2258 | |
ea1562b3 NC |
2259 | emit_insn (&insn); |
2260 | } | |
43b4c25e | 2261 | |
ea1562b3 | 2262 | /* Load a half-word or byte as an unsigned value. */ |
43b4c25e | 2263 | |
ea1562b3 NC |
2264 | static void |
2265 | emit_ldXu (const expressionS *tok, | |
2266 | int ntok, | |
2267 | const void * vlgsize) | |
2268 | { | |
2269 | if (alpha_target & AXP_OPCODE_BWX) | |
2270 | emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]); | |
2271 | else | |
2272 | { | |
2273 | expressionS newtok[3]; | |
2274 | struct alpha_insn insn; | |
2275 | int basereg; | |
2276 | long lituse; | |
19f78583 | 2277 | |
ea1562b3 NC |
2278 | if (alpha_noat_on) |
2279 | as_bad (_("macro requires $at register while noat in effect")); | |
43b4c25e | 2280 | |
ea1562b3 NC |
2281 | if (ntok == 2) |
2282 | basereg = (tok[1].X_op == O_constant | |
2283 | ? AXP_REG_ZERO : alpha_gp_register); | |
2284 | else | |
2285 | basereg = tok[2].X_add_number; | |
3765b1be | 2286 | |
ea1562b3 | 2287 | /* Emit "lda $at, exp". */ |
198f1251 | 2288 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
3765b1be | 2289 | |
ea1562b3 NC |
2290 | /* Emit "ldq_u targ, 0($at)". */ |
2291 | newtok[0] = tok[0]; | |
2292 | set_tok_const (newtok[1], 0); | |
2293 | set_tok_preg (newtok[2], basereg); | |
2294 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
3765b1be | 2295 | |
ea1562b3 NC |
2296 | if (lituse) |
2297 | { | |
9c2799c2 | 2298 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2299 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2300 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2301 | insn.nfixups++; | |
2302 | insn.sequence = lituse; | |
252b5132 | 2303 | } |
252b5132 | 2304 | |
ea1562b3 | 2305 | emit_insn (&insn); |
252b5132 | 2306 | |
ea1562b3 NC |
2307 | /* Emit "extXl targ, $at, targ". */ |
2308 | set_tok_reg (newtok[1], basereg); | |
2309 | newtok[2] = newtok[0]; | |
2310 | assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn); | |
252b5132 | 2311 | |
ea1562b3 | 2312 | if (lituse) |
252b5132 | 2313 | { |
9c2799c2 | 2314 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2315 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2316 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2317 | insn.nfixups++; | |
2318 | insn.sequence = lituse; | |
252b5132 | 2319 | } |
ea1562b3 NC |
2320 | |
2321 | emit_insn (&insn); | |
252b5132 | 2322 | } |
252b5132 RH |
2323 | } |
2324 | ||
ea1562b3 | 2325 | /* Load a half-word or byte as a signed value. */ |
252b5132 RH |
2326 | |
2327 | static void | |
ea1562b3 NC |
2328 | emit_ldX (const expressionS *tok, |
2329 | int ntok, | |
2330 | const void * vlgsize) | |
252b5132 | 2331 | { |
ea1562b3 NC |
2332 | emit_ldXu (tok, ntok, vlgsize); |
2333 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2334 | } | |
252b5132 | 2335 | |
ea1562b3 NC |
2336 | /* Load an integral value from an unaligned address as an unsigned |
2337 | value. */ | |
252b5132 RH |
2338 | |
2339 | static void | |
ea1562b3 NC |
2340 | emit_uldXu (const expressionS *tok, |
2341 | int ntok, | |
2342 | const void * vlgsize) | |
252b5132 | 2343 | { |
ea1562b3 | 2344 | long lgsize = (long) vlgsize; |
252b5132 | 2345 | expressionS newtok[3]; |
252b5132 | 2346 | |
ea1562b3 NC |
2347 | if (alpha_noat_on) |
2348 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2349 | |
ea1562b3 NC |
2350 | /* Emit "lda $at, exp". */ |
2351 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2352 | newtok[0].X_add_number = AXP_REG_AT; | |
2353 | assemble_tokens ("lda", newtok, ntok, 1); | |
2354 | ||
2355 | /* Emit "ldq_u $t9, 0($at)". */ | |
2356 | set_tok_reg (newtok[0], AXP_REG_T9); | |
252b5132 | 2357 | set_tok_const (newtok[1], 0); |
ea1562b3 NC |
2358 | set_tok_preg (newtok[2], AXP_REG_AT); |
2359 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2360 | |
ea1562b3 NC |
2361 | /* Emit "ldq_u $t10, size-1($at)". */ |
2362 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2363 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2364 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2365 | |
ea1562b3 NC |
2366 | /* Emit "extXl $t9, $at, $t9". */ |
2367 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2368 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2369 | set_tok_reg (newtok[2], AXP_REG_T9); | |
2370 | assemble_tokens (extXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2371 | |
ea1562b3 NC |
2372 | /* Emit "extXh $t10, $at, $t10". */ |
2373 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2374 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2375 | assemble_tokens (extXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2376 | |
ea1562b3 NC |
2377 | /* Emit "or $t9, $t10, targ". */ |
2378 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2379 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2380 | newtok[2] = tok[0]; | |
2381 | assemble_tokens ("or", newtok, 3, 1); | |
2382 | } | |
252b5132 | 2383 | |
ea1562b3 NC |
2384 | /* Load an integral value from an unaligned address as a signed value. |
2385 | Note that quads should get funneled to the unsigned load since we | |
2386 | don't have to do the sign extension. */ | |
252b5132 | 2387 | |
ea1562b3 NC |
2388 | static void |
2389 | emit_uldX (const expressionS *tok, | |
2390 | int ntok, | |
2391 | const void * vlgsize) | |
2392 | { | |
2393 | emit_uldXu (tok, ntok, vlgsize); | |
2394 | assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); | |
2395 | } | |
252b5132 | 2396 | |
ea1562b3 | 2397 | /* Implement the ldil macro. */ |
252b5132 | 2398 | |
ea1562b3 NC |
2399 | static void |
2400 | emit_ldil (const expressionS *tok, | |
2401 | int ntok, | |
2402 | const void * unused ATTRIBUTE_UNUSED) | |
2403 | { | |
2404 | expressionS newtok[2]; | |
252b5132 | 2405 | |
ea1562b3 NC |
2406 | memcpy (newtok, tok, sizeof (newtok)); |
2407 | newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); | |
252b5132 | 2408 | |
ea1562b3 | 2409 | assemble_tokens ("lda", newtok, ntok, 1); |
252b5132 RH |
2410 | } |
2411 | ||
ea1562b3 | 2412 | /* Store a half-word or byte. */ |
252b5132 | 2413 | |
ea1562b3 NC |
2414 | static void |
2415 | emit_stX (const expressionS *tok, | |
2416 | int ntok, | |
2417 | const void * vlgsize) | |
252b5132 | 2418 | { |
ea1562b3 | 2419 | int lgsize = (int) (long) vlgsize; |
252b5132 | 2420 | |
ea1562b3 NC |
2421 | if (alpha_target & AXP_OPCODE_BWX) |
2422 | emit_loadstore (tok, ntok, stX_op[lgsize]); | |
2423 | else | |
2424 | { | |
2425 | expressionS newtok[3]; | |
2426 | struct alpha_insn insn; | |
2427 | int basereg; | |
2428 | long lituse; | |
252b5132 | 2429 | |
ea1562b3 NC |
2430 | if (alpha_noat_on) |
2431 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2432 | |
ea1562b3 NC |
2433 | if (ntok == 2) |
2434 | basereg = (tok[1].X_op == O_constant | |
2435 | ? AXP_REG_ZERO : alpha_gp_register); | |
2436 | else | |
2437 | basereg = tok[2].X_add_number; | |
252b5132 | 2438 | |
ea1562b3 | 2439 | /* Emit "lda $at, exp". */ |
198f1251 | 2440 | lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); |
252b5132 | 2441 | |
ea1562b3 NC |
2442 | /* Emit "ldq_u $t9, 0($at)". */ |
2443 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2444 | set_tok_const (newtok[1], 0); | |
2445 | set_tok_preg (newtok[2], basereg); | |
2446 | assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); | |
252b5132 | 2447 | |
ea1562b3 NC |
2448 | if (lituse) |
2449 | { | |
9c2799c2 | 2450 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2451 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2452 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2453 | insn.nfixups++; | |
2454 | insn.sequence = lituse; | |
2455 | } | |
252b5132 | 2456 | |
ea1562b3 | 2457 | emit_insn (&insn); |
252b5132 | 2458 | |
ea1562b3 NC |
2459 | /* Emit "insXl src, $at, $t10". */ |
2460 | newtok[0] = tok[0]; | |
2461 | set_tok_reg (newtok[1], basereg); | |
2462 | set_tok_reg (newtok[2], AXP_REG_T10); | |
2463 | assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn); | |
252b5132 | 2464 | |
ea1562b3 NC |
2465 | if (lituse) |
2466 | { | |
9c2799c2 | 2467 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2468 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2469 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2470 | insn.nfixups++; | |
2471 | insn.sequence = lituse; | |
2472 | } | |
252b5132 | 2473 | |
ea1562b3 | 2474 | emit_insn (&insn); |
252b5132 | 2475 | |
ea1562b3 NC |
2476 | /* Emit "mskXl $t9, $at, $t9". */ |
2477 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2478 | newtok[2] = newtok[0]; | |
2479 | assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn); | |
43b4c25e | 2480 | |
ea1562b3 NC |
2481 | if (lituse) |
2482 | { | |
9c2799c2 | 2483 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2484 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; |
2485 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2486 | insn.nfixups++; | |
2487 | insn.sequence = lituse; | |
2488 | } | |
252b5132 | 2489 | |
ea1562b3 | 2490 | emit_insn (&insn); |
252b5132 | 2491 | |
ea1562b3 NC |
2492 | /* Emit "or $t9, $t10, $t9". */ |
2493 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2494 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2495 | |
ea1562b3 NC |
2496 | /* Emit "stq_u $t9, 0($at). */ |
2497 | set_tok_const(newtok[1], 0); | |
2498 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2499 | assemble_tokens_to_insn ("stq_u", newtok, 3, &insn); | |
252b5132 | 2500 | |
ea1562b3 NC |
2501 | if (lituse) |
2502 | { | |
9c2799c2 | 2503 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 NC |
2504 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; |
2505 | insn.fixups[insn.nfixups].exp.X_op = O_absent; | |
2506 | insn.nfixups++; | |
2507 | insn.sequence = lituse; | |
2508 | } | |
252b5132 | 2509 | |
ea1562b3 NC |
2510 | emit_insn (&insn); |
2511 | } | |
2512 | } | |
252b5132 | 2513 | |
ea1562b3 | 2514 | /* Store an integer to an unaligned address. */ |
252b5132 | 2515 | |
ea1562b3 NC |
2516 | static void |
2517 | emit_ustX (const expressionS *tok, | |
2518 | int ntok, | |
2519 | const void * vlgsize) | |
2520 | { | |
2521 | int lgsize = (int) (long) vlgsize; | |
2522 | expressionS newtok[3]; | |
252b5132 | 2523 | |
ea1562b3 NC |
2524 | /* Emit "lda $at, exp". */ |
2525 | memcpy (newtok, tok, sizeof (expressionS) * ntok); | |
2526 | newtok[0].X_add_number = AXP_REG_AT; | |
2527 | assemble_tokens ("lda", newtok, ntok, 1); | |
252b5132 | 2528 | |
ea1562b3 NC |
2529 | /* Emit "ldq_u $9, 0($at)". */ |
2530 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2531 | set_tok_const (newtok[1], 0); | |
2532 | set_tok_preg (newtok[2], AXP_REG_AT); | |
2533 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2534 | |
ea1562b3 NC |
2535 | /* Emit "ldq_u $10, size-1($at)". */ |
2536 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2537 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
2538 | assemble_tokens ("ldq_u", newtok, 3, 1); | |
252b5132 | 2539 | |
ea1562b3 NC |
2540 | /* Emit "insXl src, $at, $t11". */ |
2541 | newtok[0] = tok[0]; | |
2542 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2543 | set_tok_reg (newtok[2], AXP_REG_T11); | |
2544 | assemble_tokens (insXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2545 | |
ea1562b3 NC |
2546 | /* Emit "insXh src, $at, $t12". */ |
2547 | set_tok_reg (newtok[2], AXP_REG_T12); | |
2548 | assemble_tokens (insXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2549 | |
ea1562b3 NC |
2550 | /* Emit "mskXl $t9, $at, $t9". */ |
2551 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2552 | newtok[2] = newtok[0]; | |
2553 | assemble_tokens (mskXl_op[lgsize], newtok, 3, 1); | |
252b5132 | 2554 | |
ea1562b3 NC |
2555 | /* Emit "mskXh $t10, $at, $t10". */ |
2556 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2557 | newtok[2] = newtok[0]; | |
2558 | assemble_tokens (mskXh_op[lgsize], newtok, 3, 1); | |
252b5132 | 2559 | |
ea1562b3 NC |
2560 | /* Emit "or $t9, $t11, $t9". */ |
2561 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2562 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2563 | newtok[2] = newtok[0]; | |
2564 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2565 | |
ea1562b3 NC |
2566 | /* Emit "or $t10, $t12, $t10". */ |
2567 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2568 | set_tok_reg (newtok[1], AXP_REG_T12); | |
2569 | newtok[2] = newtok[0]; | |
2570 | assemble_tokens ("or", newtok, 3, 1); | |
252b5132 | 2571 | |
ea1562b3 NC |
2572 | /* Emit "stq_u $t10, size-1($at)". */ |
2573 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2574 | set_tok_const (newtok[1], (1 << lgsize) - 1); | |
af1c1010 NC |
2575 | set_tok_preg (newtok[2], AXP_REG_AT); |
2576 | assemble_tokens ("stq_u", newtok, 3, 1); | |
2577 | ||
2578 | /* Emit "stq_u $t9, 0($at)". */ | |
2579 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2580 | set_tok_const (newtok[1], 0); | |
ea1562b3 NC |
2581 | assemble_tokens ("stq_u", newtok, 3, 1); |
2582 | } | |
252b5132 | 2583 | |
ea1562b3 NC |
2584 | /* Sign extend a half-word or byte. The 32-bit sign extend is |
2585 | implemented as "addl $31, $r, $t" in the opcode table. */ | |
252b5132 | 2586 | |
ea1562b3 NC |
2587 | static void |
2588 | emit_sextX (const expressionS *tok, | |
2589 | int ntok, | |
2590 | const void * vlgsize) | |
2591 | { | |
2592 | long lgsize = (long) vlgsize; | |
252b5132 | 2593 | |
ea1562b3 NC |
2594 | if (alpha_target & AXP_OPCODE_BWX) |
2595 | assemble_tokens (sextX_op[lgsize], tok, ntok, 0); | |
2596 | else | |
2597 | { | |
2598 | int bitshift = 64 - 8 * (1 << lgsize); | |
2599 | expressionS newtok[3]; | |
252b5132 | 2600 | |
ea1562b3 NC |
2601 | /* Emit "sll src,bits,dst". */ |
2602 | newtok[0] = tok[0]; | |
2603 | set_tok_const (newtok[1], bitshift); | |
2604 | newtok[2] = tok[ntok - 1]; | |
2605 | assemble_tokens ("sll", newtok, 3, 1); | |
252b5132 | 2606 | |
ea1562b3 NC |
2607 | /* Emit "sra dst,bits,dst". */ |
2608 | newtok[0] = newtok[2]; | |
2609 | assemble_tokens ("sra", newtok, 3, 1); | |
252b5132 | 2610 | } |
ea1562b3 | 2611 | } |
252b5132 | 2612 | |
ea1562b3 | 2613 | /* Implement the division and modulus macros. */ |
252b5132 RH |
2614 | |
2615 | #ifdef OBJ_EVAX | |
252b5132 | 2616 | |
ea1562b3 NC |
2617 | /* Make register usage like in normal procedure call. |
2618 | Don't clobber PV and RA. */ | |
252b5132 | 2619 | |
ea1562b3 NC |
2620 | static void |
2621 | emit_division (const expressionS *tok, | |
2622 | int ntok, | |
2623 | const void * symname) | |
2624 | { | |
2625 | /* DIVISION and MODULUS. Yech. | |
252b5132 | 2626 | |
ea1562b3 NC |
2627 | Convert |
2628 | OP x,y,result | |
2629 | to | |
2630 | mov x,R16 # if x != R16 | |
2631 | mov y,R17 # if y != R17 | |
2632 | lda AT,__OP | |
2633 | jsr AT,(AT),0 | |
2634 | mov R0,result | |
252b5132 | 2635 | |
ea1562b3 NC |
2636 | with appropriate optimizations if R0,R16,R17 are the registers |
2637 | specified by the compiler. */ | |
252b5132 | 2638 | |
ea1562b3 NC |
2639 | int xr, yr, rr; |
2640 | symbolS *sym; | |
2641 | expressionS newtok[3]; | |
252b5132 | 2642 | |
ea1562b3 NC |
2643 | xr = regno (tok[0].X_add_number); |
2644 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2645 | |
ea1562b3 NC |
2646 | if (ntok < 3) |
2647 | rr = xr; | |
2648 | else | |
2649 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2650 | |
ea1562b3 NC |
2651 | /* Move the operands into the right place. */ |
2652 | if (yr == AXP_REG_R16 && xr == AXP_REG_R17) | |
2653 | { | |
2654 | /* They are in exactly the wrong order -- swap through AT. */ | |
2655 | if (alpha_noat_on) | |
2656 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2657 | |
ea1562b3 NC |
2658 | set_tok_reg (newtok[0], AXP_REG_R16); |
2659 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2660 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2661 | |
ea1562b3 NC |
2662 | set_tok_reg (newtok[0], AXP_REG_R17); |
2663 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2664 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2665 | |
ea1562b3 NC |
2666 | set_tok_reg (newtok[0], AXP_REG_AT); |
2667 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2668 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2669 | } |
2670 | else | |
2671 | { | |
ea1562b3 | 2672 | if (yr == AXP_REG_R16) |
252b5132 | 2673 | { |
ea1562b3 NC |
2674 | set_tok_reg (newtok[0], AXP_REG_R16); |
2675 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2676 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2677 | } |
2678 | ||
ea1562b3 | 2679 | if (xr != AXP_REG_R16) |
252b5132 | 2680 | { |
ea1562b3 NC |
2681 | set_tok_reg (newtok[0], xr); |
2682 | set_tok_reg (newtok[1], AXP_REG_R16); | |
2683 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 RH |
2684 | } |
2685 | ||
ea1562b3 | 2686 | if (yr != AXP_REG_R16 && yr != AXP_REG_R17) |
252b5132 | 2687 | { |
ea1562b3 NC |
2688 | set_tok_reg (newtok[0], yr); |
2689 | set_tok_reg (newtok[1], AXP_REG_R17); | |
2690 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2691 | } |
252b5132 RH |
2692 | } |
2693 | ||
ea1562b3 | 2694 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2695 | |
ea1562b3 NC |
2696 | set_tok_reg (newtok[0], AXP_REG_AT); |
2697 | set_tok_sym (newtok[1], sym, 0); | |
2698 | assemble_tokens ("lda", newtok, 2, 1); | |
252b5132 | 2699 | |
ea1562b3 NC |
2700 | /* Call the division routine. */ |
2701 | set_tok_reg (newtok[0], AXP_REG_AT); | |
2702 | set_tok_cpreg (newtok[1], AXP_REG_AT); | |
2703 | set_tok_const (newtok[2], 0); | |
2704 | assemble_tokens ("jsr", newtok, 3, 1); | |
252b5132 | 2705 | |
ea1562b3 NC |
2706 | /* Move the result to the right place. */ |
2707 | if (rr != AXP_REG_R0) | |
2708 | { | |
2709 | set_tok_reg (newtok[0], AXP_REG_R0); | |
2710 | set_tok_reg (newtok[1], rr); | |
2711 | assemble_tokens ("mov", newtok, 2, 1); | |
2712 | } | |
252b5132 RH |
2713 | } |
2714 | ||
ea1562b3 | 2715 | #else /* !OBJ_EVAX */ |
252b5132 RH |
2716 | |
2717 | static void | |
ea1562b3 NC |
2718 | emit_division (const expressionS *tok, |
2719 | int ntok, | |
2720 | const void * symname) | |
252b5132 | 2721 | { |
ea1562b3 NC |
2722 | /* DIVISION and MODULUS. Yech. |
2723 | Convert | |
2724 | OP x,y,result | |
2725 | to | |
2726 | lda pv,__OP | |
2727 | mov x,t10 | |
2728 | mov y,t11 | |
2729 | jsr t9,(pv),__OP | |
2730 | mov t12,result | |
252b5132 | 2731 | |
ea1562b3 NC |
2732 | with appropriate optimizations if t10,t11,t12 are the registers |
2733 | specified by the compiler. */ | |
252b5132 | 2734 | |
ea1562b3 NC |
2735 | int xr, yr, rr; |
2736 | symbolS *sym; | |
252b5132 | 2737 | expressionS newtok[3]; |
252b5132 | 2738 | |
ea1562b3 NC |
2739 | xr = regno (tok[0].X_add_number); |
2740 | yr = regno (tok[1].X_add_number); | |
252b5132 | 2741 | |
ea1562b3 NC |
2742 | if (ntok < 3) |
2743 | rr = xr; | |
2744 | else | |
2745 | rr = regno (tok[2].X_add_number); | |
252b5132 | 2746 | |
ea1562b3 | 2747 | sym = symbol_find_or_make ((const char *) symname); |
252b5132 | 2748 | |
ea1562b3 NC |
2749 | /* Move the operands into the right place. */ |
2750 | if (yr == AXP_REG_T10 && xr == AXP_REG_T11) | |
252b5132 | 2751 | { |
ea1562b3 NC |
2752 | /* They are in exactly the wrong order -- swap through AT. */ |
2753 | if (alpha_noat_on) | |
2754 | as_bad (_("macro requires $at register while noat in effect")); | |
252b5132 | 2755 | |
ea1562b3 NC |
2756 | set_tok_reg (newtok[0], AXP_REG_T10); |
2757 | set_tok_reg (newtok[1], AXP_REG_AT); | |
2758 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2759 | |
ea1562b3 NC |
2760 | set_tok_reg (newtok[0], AXP_REG_T11); |
2761 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2762 | assemble_tokens ("mov", newtok, 2, 1); | |
252b5132 | 2763 | |
ea1562b3 NC |
2764 | set_tok_reg (newtok[0], AXP_REG_AT); |
2765 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2766 | assemble_tokens ("mov", newtok, 2, 1); | |
2767 | } | |
2768 | else | |
2769 | { | |
2770 | if (yr == AXP_REG_T10) | |
2771 | { | |
2772 | set_tok_reg (newtok[0], AXP_REG_T10); | |
2773 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2774 | assemble_tokens ("mov", newtok, 2, 1); | |
2775 | } | |
2776 | ||
2777 | if (xr != AXP_REG_T10) | |
2778 | { | |
2779 | set_tok_reg (newtok[0], xr); | |
2780 | set_tok_reg (newtok[1], AXP_REG_T10); | |
2781 | assemble_tokens ("mov", newtok, 2, 1); | |
2782 | } | |
2783 | ||
2784 | if (yr != AXP_REG_T10 && yr != AXP_REG_T11) | |
2785 | { | |
2786 | set_tok_reg (newtok[0], yr); | |
2787 | set_tok_reg (newtok[1], AXP_REG_T11); | |
2788 | assemble_tokens ("mov", newtok, 2, 1); | |
2789 | } | |
2790 | } | |
2791 | ||
2792 | /* Call the division routine. */ | |
2793 | set_tok_reg (newtok[0], AXP_REG_T9); | |
2794 | set_tok_sym (newtok[1], sym, 0); | |
2795 | assemble_tokens ("jsr", newtok, 2, 1); | |
2796 | ||
2797 | /* Reload the GP register. */ | |
2798 | #ifdef OBJ_AOUT | |
2799 | FIXME | |
2800 | #endif | |
2801 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2802 | set_tok_reg (newtok[0], alpha_gp_register); | |
2803 | set_tok_const (newtok[1], 0); | |
2804 | set_tok_preg (newtok[2], AXP_REG_T9); | |
2805 | assemble_tokens ("ldgp", newtok, 3, 1); | |
2806 | #endif | |
2807 | ||
2808 | /* Move the result to the right place. */ | |
2809 | if (rr != AXP_REG_T12) | |
2810 | { | |
2811 | set_tok_reg (newtok[0], AXP_REG_T12); | |
2812 | set_tok_reg (newtok[1], rr); | |
2813 | assemble_tokens ("mov", newtok, 2, 1); | |
2814 | } | |
2815 | } | |
2816 | ||
2817 | #endif /* !OBJ_EVAX */ | |
2818 | ||
2819 | /* The jsr and jmp macros differ from their instruction counterparts | |
2820 | in that they can load the target address and default most | |
2821 | everything. */ | |
2822 | ||
2823 | static void | |
2824 | emit_jsrjmp (const expressionS *tok, | |
2825 | int ntok, | |
2826 | const void * vopname) | |
252b5132 | 2827 | { |
ea1562b3 | 2828 | const char *opname = (const char *) vopname; |
252b5132 | 2829 | struct alpha_insn insn; |
ea1562b3 NC |
2830 | expressionS newtok[3]; |
2831 | int r, tokidx = 0; | |
2832 | long lituse = 0; | |
252b5132 | 2833 | |
ea1562b3 NC |
2834 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2835 | r = regno (tok[tokidx++].X_add_number); | |
252b5132 | 2836 | else |
ea1562b3 | 2837 | r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA; |
252b5132 | 2838 | |
ea1562b3 | 2839 | set_tok_reg (newtok[0], r); |
252b5132 | 2840 | |
ea1562b3 NC |
2841 | if (tokidx < ntok && |
2842 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2843 | r = regno (tok[tokidx++].X_add_number); | |
2844 | #ifdef OBJ_EVAX | |
2845 | /* Keep register if jsr $n.<sym>. */ | |
2846 | #else | |
252b5132 RH |
2847 | else |
2848 | { | |
ea1562b3 | 2849 | int basereg = alpha_gp_register; |
198f1251 TG |
2850 | lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], |
2851 | &basereg, NULL, opname); | |
252b5132 | 2852 | } |
ea1562b3 | 2853 | #endif |
252b5132 | 2854 | |
ea1562b3 | 2855 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2856 | |
198f1251 | 2857 | #ifndef OBJ_EVAX |
ea1562b3 NC |
2858 | if (tokidx < ntok) |
2859 | newtok[2] = tok[tokidx]; | |
2860 | else | |
2861 | #endif | |
2862 | set_tok_const (newtok[2], 0); | |
2863 | ||
2864 | assemble_tokens_to_insn (opname, newtok, 3, &insn); | |
252b5132 RH |
2865 | |
2866 | if (lituse) | |
2867 | { | |
9c2799c2 | 2868 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
ea1562b3 | 2869 | insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR; |
19f78583 | 2870 | insn.fixups[insn.nfixups].exp.X_op = O_absent; |
252b5132 | 2871 | insn.nfixups++; |
19f78583 | 2872 | insn.sequence = lituse; |
252b5132 RH |
2873 | } |
2874 | ||
198f1251 TG |
2875 | #ifdef OBJ_EVAX |
2876 | if (alpha_flag_replace | |
2877 | && r == AXP_REG_RA | |
2878 | && tok[tokidx].X_add_symbol | |
2879 | && alpha_linkage_symbol) | |
2880 | { | |
51794af8 | 2881 | /* Create a BOH reloc for 'jsr $27,NAME'. */ |
198f1251 TG |
2882 | const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol); |
2883 | int symlen = strlen (symname); | |
2884 | char *ensymname; | |
2885 | ||
51794af8 | 2886 | /* Build the entry name as 'NAME..en'. */ |
e1f4d6bd | 2887 | ensymname = (char *) alloca (symlen + 5); |
198f1251 TG |
2888 | memcpy (ensymname, symname, symlen); |
2889 | memcpy (ensymname + symlen, "..en", 5); | |
2890 | ||
9c2799c2 | 2891 | gas_assert (insn.nfixups < MAX_INSN_FIXUPS); |
198f1251 TG |
2892 | if (insn.nfixups > 0) |
2893 | { | |
2894 | memmove (&insn.fixups[1], &insn.fixups[0], | |
2895 | sizeof(struct alpha_fixup) * insn.nfixups); | |
2896 | } | |
2897 | ||
2898 | /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP | |
2899 | case in load_expression. See B.4.5.2 of the OpenVMS | |
2900 | Linker Utility Manual. */ | |
2901 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH; | |
2902 | insn.fixups[0].exp.X_op = O_symbol; | |
2903 | insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname); | |
2904 | insn.fixups[0].exp.X_add_number = 0; | |
2905 | insn.fixups[0].xtrasym = alpha_linkage_symbol; | |
2906 | insn.fixups[0].procsym = alpha_evax_proc->symbol; | |
2907 | insn.nfixups++; | |
2908 | alpha_linkage_symbol = 0; | |
2909 | } | |
2910 | #endif | |
2911 | ||
252b5132 RH |
2912 | emit_insn (&insn); |
2913 | } | |
2914 | ||
ea1562b3 NC |
2915 | /* The ret and jcr instructions differ from their instruction |
2916 | counterparts in that everything can be defaulted. */ | |
252b5132 RH |
2917 | |
2918 | static void | |
ea1562b3 NC |
2919 | emit_retjcr (const expressionS *tok, |
2920 | int ntok, | |
2921 | const void * vopname) | |
252b5132 | 2922 | { |
ea1562b3 NC |
2923 | const char *opname = (const char *) vopname; |
2924 | expressionS newtok[3]; | |
2925 | int r, tokidx = 0; | |
252b5132 | 2926 | |
ea1562b3 NC |
2927 | if (tokidx < ntok && tok[tokidx].X_op == O_register) |
2928 | r = regno (tok[tokidx++].X_add_number); | |
2929 | else | |
2930 | r = AXP_REG_ZERO; | |
252b5132 | 2931 | |
ea1562b3 | 2932 | set_tok_reg (newtok[0], r); |
19f78583 | 2933 | |
ea1562b3 NC |
2934 | if (tokidx < ntok && |
2935 | (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) | |
2936 | r = regno (tok[tokidx++].X_add_number); | |
2937 | else | |
2938 | r = AXP_REG_RA; | |
19f78583 | 2939 | |
ea1562b3 | 2940 | set_tok_cpreg (newtok[1], r); |
252b5132 | 2941 | |
ea1562b3 NC |
2942 | if (tokidx < ntok) |
2943 | newtok[2] = tok[tokidx]; | |
2944 | else | |
2945 | set_tok_const (newtok[2], strcmp (opname, "ret") == 0); | |
252b5132 | 2946 | |
ea1562b3 | 2947 | assemble_tokens (opname, newtok, 3, 0); |
252b5132 RH |
2948 | } |
2949 | ||
ea1562b3 | 2950 | /* Implement the ldgp macro. */ |
252b5132 RH |
2951 | |
2952 | static void | |
87975d2a | 2953 | emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED, |
ea1562b3 NC |
2954 | int ntok ATTRIBUTE_UNUSED, |
2955 | const void * unused ATTRIBUTE_UNUSED) | |
252b5132 | 2956 | { |
ea1562b3 NC |
2957 | #ifdef OBJ_AOUT |
2958 | FIXME | |
2959 | #endif | |
2960 | #if defined(OBJ_ECOFF) || defined(OBJ_ELF) | |
2961 | /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)" | |
2962 | with appropriate constants and relocations. */ | |
2963 | struct alpha_insn insn; | |
252b5132 | 2964 | expressionS newtok[3]; |
ea1562b3 | 2965 | expressionS addend; |
252b5132 | 2966 | |
ea1562b3 NC |
2967 | #ifdef OBJ_ECOFF |
2968 | if (regno (tok[2].X_add_number) == AXP_REG_PV) | |
2969 | ecoff_set_gp_prolog_size (0); | |
2970 | #endif | |
252b5132 | 2971 | |
ea1562b3 NC |
2972 | newtok[0] = tok[0]; |
2973 | set_tok_const (newtok[1], 0); | |
2974 | newtok[2] = tok[2]; | |
252b5132 | 2975 | |
ea1562b3 | 2976 | assemble_tokens_to_insn ("ldah", newtok, 3, &insn); |
252b5132 | 2977 | |
ea1562b3 | 2978 | addend = tok[1]; |
252b5132 | 2979 | |
ea1562b3 NC |
2980 | #ifdef OBJ_ECOFF |
2981 | if (addend.X_op != O_constant) | |
2982 | as_bad (_("can not resolve expression")); | |
2983 | addend.X_op = O_symbol; | |
2984 | addend.X_add_symbol = alpha_gp_symbol; | |
2985 | #endif | |
252b5132 | 2986 | |
ea1562b3 NC |
2987 | insn.nfixups = 1; |
2988 | insn.fixups[0].exp = addend; | |
2989 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16; | |
2990 | insn.sequence = next_sequence_num; | |
252b5132 | 2991 | |
ea1562b3 | 2992 | emit_insn (&insn); |
252b5132 | 2993 | |
ea1562b3 | 2994 | set_tok_preg (newtok[2], tok[0].X_add_number); |
252b5132 | 2995 | |
ea1562b3 | 2996 | assemble_tokens_to_insn ("lda", newtok, 3, &insn); |
252b5132 | 2997 | |
ea1562b3 NC |
2998 | #ifdef OBJ_ECOFF |
2999 | addend.X_add_number += 4; | |
3000 | #endif | |
252b5132 | 3001 | |
ea1562b3 NC |
3002 | insn.nfixups = 1; |
3003 | insn.fixups[0].exp = addend; | |
3004 | insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16; | |
3005 | insn.sequence = next_sequence_num--; | |
252b5132 | 3006 | |
ea1562b3 | 3007 | emit_insn (&insn); |
87975d2a | 3008 | #endif /* OBJ_ECOFF || OBJ_ELF */ |
252b5132 RH |
3009 | } |
3010 | ||
ea1562b3 | 3011 | /* The macro table. */ |
252b5132 | 3012 | |
ea1562b3 | 3013 | static const struct alpha_macro alpha_macros[] = |
252b5132 | 3014 | { |
ea1562b3 NC |
3015 | /* Load/Store macros. */ |
3016 | { "lda", emit_lda, NULL, | |
3017 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3018 | { "ldah", emit_ldah, NULL, | |
3019 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3020 | |
ea1562b3 NC |
3021 | { "ldl", emit_ir_load, "ldl", |
3022 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3023 | { "ldl_l", emit_ir_load, "ldl_l", | |
3024 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3025 | { "ldq", emit_ir_load, "ldq", | |
3026 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3027 | { "ldq_l", emit_ir_load, "ldq_l", | |
3028 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3029 | { "ldq_u", emit_ir_load, "ldq_u", | |
3030 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3031 | { "ldf", emit_loadstore, "ldf", | |
3032 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3033 | { "ldg", emit_loadstore, "ldg", | |
3034 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3035 | { "lds", emit_loadstore, "lds", | |
3036 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3037 | { "ldt", emit_loadstore, "ldt", | |
3038 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3039 | |
ea1562b3 NC |
3040 | { "ldb", emit_ldX, (void *) 0, |
3041 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3042 | { "ldbu", emit_ldXu, (void *) 0, | |
3043 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3044 | { "ldw", emit_ldX, (void *) 1, | |
3045 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3046 | { "ldwu", emit_ldXu, (void *) 1, | |
3047 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3048 | |
ea1562b3 NC |
3049 | { "uldw", emit_uldX, (void *) 1, |
3050 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3051 | { "uldwu", emit_uldXu, (void *) 1, | |
3052 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3053 | { "uldl", emit_uldX, (void *) 2, | |
3054 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3055 | { "uldlu", emit_uldXu, (void *) 2, | |
3056 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3057 | { "uldq", emit_uldXu, (void *) 3, | |
3058 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3059 | |
ea1562b3 NC |
3060 | { "ldgp", emit_ldgp, NULL, |
3061 | { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } }, | |
252b5132 | 3062 | |
ea1562b3 NC |
3063 | { "ldi", emit_lda, NULL, |
3064 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3065 | { "ldil", emit_ldil, NULL, | |
3066 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
3067 | { "ldiq", emit_lda, NULL, | |
3068 | { MACRO_IR, MACRO_EXP, MACRO_EOA } }, | |
252b5132 | 3069 | |
ea1562b3 NC |
3070 | { "stl", emit_loadstore, "stl", |
3071 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3072 | { "stl_c", emit_loadstore, "stl_c", | |
3073 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3074 | { "stq", emit_loadstore, "stq", | |
3075 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3076 | { "stq_c", emit_loadstore, "stq_c", | |
3077 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3078 | { "stq_u", emit_loadstore, "stq_u", | |
3079 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3080 | { "stf", emit_loadstore, "stf", | |
3081 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3082 | { "stg", emit_loadstore, "stg", | |
3083 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3084 | { "sts", emit_loadstore, "sts", | |
3085 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3086 | { "stt", emit_loadstore, "stt", | |
3087 | { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3088 | |
ea1562b3 NC |
3089 | { "stb", emit_stX, (void *) 0, |
3090 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3091 | { "stw", emit_stX, (void *) 1, | |
3092 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3093 | { "ustw", emit_ustX, (void *) 1, | |
3094 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3095 | { "ustl", emit_ustX, (void *) 2, | |
3096 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
3097 | { "ustq", emit_ustX, (void *) 3, | |
3098 | { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, | |
252b5132 | 3099 | |
ea1562b3 | 3100 | /* Arithmetic macros. */ |
19f78583 | 3101 | |
ea1562b3 NC |
3102 | { "sextb", emit_sextX, (void *) 0, |
3103 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3104 | MACRO_IR, MACRO_EOA, | |
3105 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
3106 | { "sextw", emit_sextX, (void *) 1, | |
3107 | { MACRO_IR, MACRO_IR, MACRO_EOA, | |
3108 | MACRO_IR, MACRO_EOA, | |
3109 | /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, | |
252b5132 | 3110 | |
ea1562b3 NC |
3111 | { "divl", emit_division, "__divl", |
3112 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3113 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3114 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3115 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3116 | { "divlu", emit_division, "__divlu", | |
3117 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3118 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3119 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3120 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3121 | { "divq", emit_division, "__divq", | |
3122 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3123 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3124 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3125 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3126 | { "divqu", emit_division, "__divqu", | |
3127 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3128 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3129 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3130 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3131 | { "reml", emit_division, "__reml", | |
3132 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3133 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3134 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3135 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3136 | { "remlu", emit_division, "__remlu", | |
3137 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3138 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3139 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3140 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3141 | { "remq", emit_division, "__remq", | |
3142 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3143 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3144 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3145 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
3146 | { "remqu", emit_division, "__remqu", | |
3147 | { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, | |
3148 | MACRO_IR, MACRO_IR, MACRO_EOA, | |
3149 | /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, | |
3150 | MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, | |
252b5132 | 3151 | |
ea1562b3 NC |
3152 | { "jsr", emit_jsrjmp, "jsr", |
3153 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3154 | MACRO_PIR, MACRO_EOA, | |
3155 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3156 | MACRO_EXP, MACRO_EOA } }, | |
3157 | { "jmp", emit_jsrjmp, "jmp", | |
3158 | { MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3159 | MACRO_PIR, MACRO_EOA, | |
3160 | MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3161 | MACRO_EXP, MACRO_EOA } }, | |
3162 | { "ret", emit_retjcr, "ret", | |
3163 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3164 | MACRO_IR, MACRO_EOA, | |
3165 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3166 | MACRO_PIR, MACRO_EOA, | |
3167 | MACRO_EXP, MACRO_EOA, | |
3168 | MACRO_EOA } }, | |
3169 | { "jcr", emit_retjcr, "jcr", | |
3170 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3171 | MACRO_IR, MACRO_EOA, | |
3172 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3173 | MACRO_PIR, MACRO_EOA, | |
3174 | MACRO_EXP, MACRO_EOA, | |
3175 | MACRO_EOA } }, | |
3176 | { "jsr_coroutine", emit_retjcr, "jcr", | |
3177 | { MACRO_IR, MACRO_EXP, MACRO_EOA, | |
3178 | MACRO_IR, MACRO_EOA, | |
3179 | MACRO_PIR, MACRO_EXP, MACRO_EOA, | |
3180 | MACRO_PIR, MACRO_EOA, | |
3181 | MACRO_EXP, MACRO_EOA, | |
3182 | MACRO_EOA } }, | |
3183 | }; | |
252b5132 | 3184 | |
ea1562b3 NC |
3185 | static const unsigned int alpha_num_macros |
3186 | = sizeof (alpha_macros) / sizeof (*alpha_macros); | |
19f78583 | 3187 | |
ea1562b3 NC |
3188 | /* Search forward through all variants of a macro looking for a syntax |
3189 | match. */ | |
19f78583 | 3190 | |
ea1562b3 NC |
3191 | static const struct alpha_macro * |
3192 | find_macro_match (const struct alpha_macro *first_macro, | |
3193 | const expressionS *tok, | |
3194 | int *pntok) | |
252b5132 | 3195 | |
ea1562b3 NC |
3196 | { |
3197 | const struct alpha_macro *macro = first_macro; | |
3198 | int ntok = *pntok; | |
252b5132 | 3199 | |
ea1562b3 NC |
3200 | do |
3201 | { | |
3202 | const enum alpha_macro_arg *arg = macro->argsets; | |
3203 | int tokidx = 0; | |
19f78583 | 3204 | |
ea1562b3 | 3205 | while (*arg) |
19f78583 | 3206 | { |
ea1562b3 NC |
3207 | switch (*arg) |
3208 | { | |
3209 | case MACRO_EOA: | |
3210 | if (tokidx == ntok) | |
3211 | return macro; | |
3212 | else | |
3213 | tokidx = 0; | |
3214 | break; | |
252b5132 | 3215 | |
ea1562b3 NC |
3216 | /* Index register. */ |
3217 | case MACRO_IR: | |
3218 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3219 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3220 | goto match_failed; | |
3221 | ++tokidx; | |
3222 | break; | |
19f78583 | 3223 | |
ea1562b3 NC |
3224 | /* Parenthesized index register. */ |
3225 | case MACRO_PIR: | |
3226 | if (tokidx >= ntok || tok[tokidx].X_op != O_pregister | |
3227 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3228 | goto match_failed; | |
3229 | ++tokidx; | |
3230 | break; | |
19f78583 | 3231 | |
ea1562b3 NC |
3232 | /* Optional parenthesized index register. */ |
3233 | case MACRO_OPIR: | |
3234 | if (tokidx < ntok && tok[tokidx].X_op == O_pregister | |
3235 | && is_ir_num (tok[tokidx].X_add_number)) | |
3236 | ++tokidx; | |
3237 | break; | |
252b5132 | 3238 | |
ea1562b3 NC |
3239 | /* Leading comma with a parenthesized index register. */ |
3240 | case MACRO_CPIR: | |
3241 | if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister | |
3242 | || !is_ir_num (tok[tokidx].X_add_number)) | |
3243 | goto match_failed; | |
3244 | ++tokidx; | |
3245 | break; | |
252b5132 | 3246 | |
ea1562b3 NC |
3247 | /* Floating point register. */ |
3248 | case MACRO_FPR: | |
3249 | if (tokidx >= ntok || tok[tokidx].X_op != O_register | |
3250 | || !is_fpr_num (tok[tokidx].X_add_number)) | |
3251 | goto match_failed; | |
3252 | ++tokidx; | |
3253 | break; | |
252b5132 | 3254 | |
ea1562b3 NC |
3255 | /* Normal expression. */ |
3256 | case MACRO_EXP: | |
3257 | if (tokidx >= ntok) | |
3258 | goto match_failed; | |
3259 | switch (tok[tokidx].X_op) | |
3260 | { | |
3261 | case O_illegal: | |
3262 | case O_absent: | |
3263 | case O_register: | |
3264 | case O_pregister: | |
3265 | case O_cpregister: | |
3266 | case O_literal: | |
3267 | case O_lituse_base: | |
3268 | case O_lituse_bytoff: | |
3269 | case O_lituse_jsr: | |
3270 | case O_gpdisp: | |
3271 | case O_gprelhigh: | |
3272 | case O_gprellow: | |
3273 | case O_gprel: | |
3274 | case O_samegp: | |
3275 | goto match_failed; | |
252b5132 | 3276 | |
ea1562b3 NC |
3277 | default: |
3278 | break; | |
3279 | } | |
3280 | ++tokidx; | |
3281 | break; | |
19f78583 | 3282 | |
ea1562b3 NC |
3283 | match_failed: |
3284 | while (*arg != MACRO_EOA) | |
3285 | ++arg; | |
3286 | tokidx = 0; | |
3287 | break; | |
3288 | } | |
3289 | ++arg; | |
19f78583 | 3290 | } |
252b5132 | 3291 | } |
ea1562b3 NC |
3292 | while (++macro - alpha_macros < (int) alpha_num_macros |
3293 | && !strcmp (macro->name, first_macro->name)); | |
3294 | ||
3295 | return NULL; | |
252b5132 RH |
3296 | } |
3297 | ||
ea1562b3 NC |
3298 | /* Given an opcode name and a pre-tokenized set of arguments, take the |
3299 | opcode all the way through emission. */ | |
252b5132 RH |
3300 | |
3301 | static void | |
ea1562b3 NC |
3302 | assemble_tokens (const char *opname, |
3303 | const expressionS *tok, | |
3304 | int ntok, | |
3305 | int local_macros_on) | |
252b5132 | 3306 | { |
ea1562b3 NC |
3307 | int found_something = 0; |
3308 | const struct alpha_opcode *opcode; | |
3309 | const struct alpha_macro *macro; | |
3310 | int cpumatch = 1; | |
21d799b5 | 3311 | extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; |
252b5132 | 3312 | |
ea1562b3 NC |
3313 | #ifdef RELOC_OP_P |
3314 | /* If a user-specified relocation is present, this is not a macro. */ | |
3315 | if (ntok && USER_RELOC_P (tok[ntok - 1].X_op)) | |
3316 | { | |
3317 | reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc; | |
3318 | ntok--; | |
3319 | } | |
3320 | else | |
3321 | #endif | |
3322 | if (local_macros_on) | |
3323 | { | |
3324 | macro = ((const struct alpha_macro *) | |
3325 | hash_find (alpha_macro_hash, opname)); | |
3326 | if (macro) | |
3327 | { | |
3328 | found_something = 1; | |
3329 | macro = find_macro_match (macro, tok, &ntok); | |
3330 | if (macro) | |
3331 | { | |
3332 | (*macro->emit) (tok, ntok, macro->arg); | |
3333 | return; | |
3334 | } | |
3335 | } | |
3336 | } | |
252b5132 | 3337 | |
ea1562b3 NC |
3338 | /* Search opcodes. */ |
3339 | opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); | |
3340 | if (opcode) | |
3341 | { | |
3342 | found_something = 1; | |
3343 | opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); | |
3344 | if (opcode) | |
3345 | { | |
3346 | struct alpha_insn insn; | |
3347 | assemble_insn (opcode, tok, ntok, &insn, reloc); | |
252b5132 | 3348 | |
ea1562b3 NC |
3349 | /* Copy the sequence number for the reloc from the reloc token. */ |
3350 | if (reloc != BFD_RELOC_UNUSED) | |
3351 | insn.sequence = tok[ntok].X_add_number; | |
252b5132 | 3352 | |
ea1562b3 NC |
3353 | emit_insn (&insn); |
3354 | return; | |
3355 | } | |
3356 | } | |
252b5132 | 3357 | |
ea1562b3 NC |
3358 | if (found_something) |
3359 | { | |
3360 | if (cpumatch) | |
3361 | as_bad (_("inappropriate arguments for opcode `%s'"), opname); | |
3362 | else | |
3363 | as_bad (_("opcode `%s' not supported for target %s"), opname, | |
3364 | alpha_target_name); | |
3365 | } | |
3366 | else | |
3367 | as_bad (_("unknown opcode `%s'"), opname); | |
3368 | } | |
3369 | \f | |
3370 | #ifdef OBJ_EVAX | |
252b5132 | 3371 | |
576d3307 | 3372 | /* Add sym+addend to link pool. |
8aacb050 | 3373 | Return offset from curent procedure value (pv) to entry in link pool. |
252b5132 | 3374 | |
ea1562b3 | 3375 | Add new fixup only if offset isn't 16bit. */ |
252b5132 | 3376 | |
198f1251 | 3377 | static symbolS * |
8aacb050 | 3378 | add_to_link_pool (symbolS *sym, offsetT addend) |
ea1562b3 | 3379 | { |
8aacb050 | 3380 | symbolS *basesym; |
ea1562b3 NC |
3381 | segT current_section = now_seg; |
3382 | int current_subsec = now_subseg; | |
ea1562b3 NC |
3383 | char *p; |
3384 | segment_info_type *seginfo = seg_info (alpha_link_section); | |
3385 | fixS *fixp; | |
198f1251 TG |
3386 | symbolS *linksym, *expsym; |
3387 | expressionS e; | |
3388 | ||
8aacb050 TG |
3389 | basesym = alpha_evax_proc->symbol; |
3390 | ||
ea1562b3 NC |
3391 | /* @@ This assumes all entries in a given section will be of the same |
3392 | size... Probably correct, but unwise to rely on. */ | |
3393 | /* This must always be called with the same subsegment. */ | |
252b5132 | 3394 | |
ea1562b3 NC |
3395 | if (seginfo->frchainP) |
3396 | for (fixp = seginfo->frchainP->fix_root; | |
3397 | fixp != (fixS *) NULL; | |
198f1251 | 3398 | fixp = fixp->fx_next) |
ea1562b3 | 3399 | { |
198f1251 TG |
3400 | if (fixp->fx_addsy == sym |
3401 | && fixp->fx_offset == (valueT)addend | |
3402 | && fixp->tc_fix_data.info | |
3403 | && fixp->tc_fix_data.info->sym | |
3404 | && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym) | |
3405 | return fixp->tc_fix_data.info->sym; | |
ea1562b3 | 3406 | } |
252b5132 | 3407 | |
8aacb050 | 3408 | /* Not found, add a new entry. */ |
ea1562b3 | 3409 | subseg_set (alpha_link_section, 0); |
198f1251 TG |
3410 | linksym = symbol_new |
3411 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
ea1562b3 NC |
3412 | p = frag_more (8); |
3413 | memset (p, 0, 8); | |
252b5132 | 3414 | |
8aacb050 | 3415 | /* Create the basesym - linksym expression (offset of the added entry). */ |
198f1251 TG |
3416 | e.X_op = O_subtract; |
3417 | e.X_add_symbol = linksym; | |
3418 | e.X_op_symbol = basesym; | |
3419 | e.X_add_number = 0; | |
3420 | expsym = make_expr_symbol (&e); | |
3421 | ||
3422 | fixp = fix_new | |
576d3307 | 3423 | (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64); |
198f1251 TG |
3424 | fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--); |
3425 | fixp->tc_fix_data.info->sym = expsym; | |
252b5132 | 3426 | |
ea1562b3 | 3427 | subseg_set (current_section, current_subsec); |
198f1251 | 3428 | return expsym; |
ea1562b3 | 3429 | } |
ea1562b3 NC |
3430 | #endif /* OBJ_EVAX */ |
3431 | \f | |
3432 | /* Assembler directives. */ | |
252b5132 | 3433 | |
ea1562b3 NC |
3434 | /* Handle the .text pseudo-op. This is like the usual one, but it |
3435 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3436 | |
ea1562b3 NC |
3437 | static void |
3438 | s_alpha_text (int i) | |
ea1562b3 NC |
3439 | { |
3440 | #ifdef OBJ_ELF | |
3441 | obj_elf_text (i); | |
3442 | #else | |
3443 | s_text (i); | |
198f1251 TG |
3444 | #endif |
3445 | #ifdef OBJ_EVAX | |
3446 | { | |
3447 | symbolS * symbolP; | |
3448 | ||
3449 | symbolP = symbol_find (".text"); | |
3450 | if (symbolP == NULL) | |
3451 | { | |
3452 | symbolP = symbol_make (".text"); | |
3453 | S_SET_SEGMENT (symbolP, text_section); | |
3454 | symbol_table_insert (symbolP); | |
3455 | } | |
3456 | } | |
ea1562b3 NC |
3457 | #endif |
3458 | alpha_insn_label = NULL; | |
3459 | alpha_auto_align_on = 1; | |
3460 | alpha_current_align = 0; | |
252b5132 RH |
3461 | } |
3462 | ||
ea1562b3 NC |
3463 | /* Handle the .data pseudo-op. This is like the usual one, but it |
3464 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3465 | |
3466 | static void | |
ea1562b3 | 3467 | s_alpha_data (int i) |
252b5132 | 3468 | { |
ea1562b3 NC |
3469 | #ifdef OBJ_ELF |
3470 | obj_elf_data (i); | |
3471 | #else | |
3472 | s_data (i); | |
3473 | #endif | |
3474 | alpha_insn_label = NULL; | |
3475 | alpha_auto_align_on = 1; | |
3476 | alpha_current_align = 0; | |
252b5132 RH |
3477 | } |
3478 | ||
ea1562b3 | 3479 | #if defined (OBJ_ECOFF) || defined (OBJ_EVAX) |
252b5132 | 3480 | |
198f1251 | 3481 | /* Handle the OSF/1 and openVMS .comm pseudo quirks. */ |
252b5132 RH |
3482 | |
3483 | static void | |
ea1562b3 | 3484 | s_alpha_comm (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3485 | { |
ea1562b3 NC |
3486 | char *name; |
3487 | char c; | |
3488 | char *p; | |
d9319cec | 3489 | offsetT size; |
ea1562b3 | 3490 | symbolS *symbolP; |
d9319cec NC |
3491 | #ifdef OBJ_EVAX |
3492 | offsetT temp; | |
198f1251 | 3493 | int log_align = 0; |
d9319cec | 3494 | #endif |
252b5132 | 3495 | |
ea1562b3 NC |
3496 | name = input_line_pointer; |
3497 | c = get_symbol_end (); | |
252b5132 | 3498 | |
ea1562b3 NC |
3499 | /* Just after name is now '\0'. */ |
3500 | p = input_line_pointer; | |
3501 | *p = c; | |
252b5132 | 3502 | |
ea1562b3 | 3503 | SKIP_WHITESPACE (); |
252b5132 | 3504 | |
ea1562b3 NC |
3505 | /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */ |
3506 | if (*input_line_pointer == ',') | |
252b5132 | 3507 | { |
ea1562b3 NC |
3508 | input_line_pointer++; |
3509 | SKIP_WHITESPACE (); | |
3510 | } | |
198f1251 | 3511 | if ((size = get_absolute_expression ()) < 0) |
ea1562b3 | 3512 | { |
198f1251 | 3513 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); |
ea1562b3 NC |
3514 | ignore_rest_of_line (); |
3515 | return; | |
3516 | } | |
252b5132 | 3517 | |
ea1562b3 NC |
3518 | *p = 0; |
3519 | symbolP = symbol_find_or_make (name); | |
ea1562b3 | 3520 | *p = c; |
252b5132 | 3521 | |
ea1562b3 NC |
3522 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) |
3523 | { | |
3524 | as_bad (_("Ignoring attempt to re-define symbol")); | |
3525 | ignore_rest_of_line (); | |
3526 | return; | |
3527 | } | |
3528 | ||
3529 | #ifdef OBJ_EVAX | |
198f1251 TG |
3530 | if (*input_line_pointer != ',') |
3531 | temp = 8; /* Default alignment. */ | |
3532 | else | |
ea1562b3 | 3533 | { |
198f1251 TG |
3534 | input_line_pointer++; |
3535 | SKIP_WHITESPACE (); | |
3536 | temp = get_absolute_expression (); | |
ea1562b3 | 3537 | } |
198f1251 TG |
3538 | |
3539 | /* ??? Unlike on OSF/1, the alignment factor is not in log units. */ | |
3540 | while ((temp >>= 1) != 0) | |
3541 | ++log_align; | |
3542 | ||
3543 | if (*input_line_pointer == ',') | |
ea1562b3 | 3544 | { |
198f1251 TG |
3545 | /* Extended form of the directive |
3546 | ||
3547 | .comm symbol, size, alignment, section | |
3548 | ||
3549 | where the "common" semantics is transferred to the section. | |
3550 | The symbol is effectively an alias for the section name. */ | |
3551 | ||
3552 | segT sec; | |
3553 | char *sec_name; | |
3554 | symbolS *sec_symbol; | |
3555 | segT current_seg = now_seg; | |
3556 | subsegT current_subseg = now_subseg; | |
3557 | int cur_size; | |
3558 | ||
3559 | input_line_pointer++; | |
3560 | SKIP_WHITESPACE (); | |
3561 | sec_name = s_alpha_section_name (); | |
3562 | sec_symbol = symbol_find_or_make (sec_name); | |
3563 | sec = subseg_new (sec_name, 0); | |
3564 | S_SET_SEGMENT (sec_symbol, sec); | |
3565 | symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
3566 | bfd_vms_set_section_flags (stdoutput, sec, 0, |
3567 | EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD); | |
198f1251 TG |
3568 | record_alignment (sec, log_align); |
3569 | ||
3570 | /* Reuse stab_string_size to store the size of the section. */ | |
3571 | cur_size = seg_info (sec)->stabu.stab_string_size; | |
3572 | if ((int) size > cur_size) | |
3573 | { | |
3574 | char *pfrag | |
3575 | = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, | |
3576 | (valueT)size - (valueT)cur_size, NULL); | |
3577 | *pfrag = 0; | |
3578 | seg_info (sec)->stabu.stab_string_size = (int)size; | |
3579 | } | |
3580 | ||
3581 | S_SET_SEGMENT (symbolP, sec); | |
3582 | ||
3583 | subseg_set (current_seg, current_subseg); | |
3584 | } | |
3585 | else | |
3586 | { | |
3587 | /* Regular form of the directive | |
3588 | ||
3589 | .comm symbol, size, alignment | |
3590 | ||
3591 | where the "common" semantics in on the symbol. | |
3592 | These symbols are assembled in the .bss section. */ | |
3593 | ||
3594 | char *pfrag; | |
3595 | segT current_seg = now_seg; | |
3596 | subsegT current_subseg = now_subseg; | |
3597 | ||
3598 | subseg_set (bss_section, 1); | |
3599 | frag_align (log_align, 0, 0); | |
3600 | record_alignment (bss_section, log_align); | |
3601 | ||
3602 | symbolP->sy_frag = frag_now; | |
3603 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, | |
3604 | size, NULL); | |
3605 | *pfrag = 0; | |
3606 | ||
3607 | S_SET_SEGMENT (symbolP, bss_section); | |
3608 | ||
3609 | subseg_set (current_seg, current_subseg); | |
252b5132 | 3610 | } |
ea1562b3 | 3611 | #endif |
198f1251 TG |
3612 | |
3613 | if (S_GET_VALUE (symbolP)) | |
3614 | { | |
3615 | if (S_GET_VALUE (symbolP) != (valueT) size) | |
20203fb9 | 3616 | as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), |
198f1251 TG |
3617 | S_GET_NAME (symbolP), |
3618 | (long) S_GET_VALUE (symbolP), | |
3619 | (long) size); | |
3620 | } | |
252b5132 RH |
3621 | else |
3622 | { | |
198f1251 TG |
3623 | #ifndef OBJ_EVAX |
3624 | S_SET_VALUE (symbolP, (valueT) size); | |
ea1562b3 NC |
3625 | #endif |
3626 | S_SET_EXTERNAL (symbolP); | |
3627 | } | |
198f1251 TG |
3628 | |
3629 | #ifndef OBJ_EVAX | |
3630 | know (symbolP->sy_frag == &zero_address_frag); | |
ea1562b3 | 3631 | #endif |
ea1562b3 NC |
3632 | demand_empty_rest_of_line (); |
3633 | } | |
252b5132 | 3634 | |
ea1562b3 | 3635 | #endif /* ! OBJ_ELF */ |
252b5132 | 3636 | |
ea1562b3 | 3637 | #ifdef OBJ_ECOFF |
252b5132 | 3638 | |
ea1562b3 NC |
3639 | /* Handle the .rdata pseudo-op. This is like the usual one, but it |
3640 | clears alpha_insn_label and restores auto alignment. */ | |
3641 | ||
3642 | static void | |
3643 | s_alpha_rdata (int ignore ATTRIBUTE_UNUSED) | |
3644 | { | |
87975d2a | 3645 | get_absolute_expression (); |
ea1562b3 NC |
3646 | subseg_new (".rdata", 0); |
3647 | demand_empty_rest_of_line (); | |
3648 | alpha_insn_label = NULL; | |
3649 | alpha_auto_align_on = 1; | |
3650 | alpha_current_align = 0; | |
252b5132 RH |
3651 | } |
3652 | ||
ea1562b3 NC |
3653 | #endif |
3654 | ||
3655 | #ifdef OBJ_ECOFF | |
3656 | ||
3657 | /* Handle the .sdata pseudo-op. This is like the usual one, but it | |
3658 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 RH |
3659 | |
3660 | static void | |
ea1562b3 | 3661 | s_alpha_sdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3662 | { |
87975d2a | 3663 | get_absolute_expression (); |
ea1562b3 NC |
3664 | subseg_new (".sdata", 0); |
3665 | demand_empty_rest_of_line (); | |
3666 | alpha_insn_label = NULL; | |
3667 | alpha_auto_align_on = 1; | |
3668 | alpha_current_align = 0; | |
3669 | } | |
3670 | #endif | |
252b5132 | 3671 | |
ea1562b3 NC |
3672 | #ifdef OBJ_ELF |
3673 | struct alpha_elf_frame_data | |
3674 | { | |
3675 | symbolS *func_sym; | |
3676 | symbolS *func_end_sym; | |
3677 | symbolS *prologue_sym; | |
3678 | unsigned int mask; | |
3679 | unsigned int fmask; | |
3680 | int fp_regno; | |
3681 | int ra_regno; | |
3682 | offsetT frame_size; | |
3683 | offsetT mask_offset; | |
3684 | offsetT fmask_offset; | |
252b5132 | 3685 | |
ea1562b3 NC |
3686 | struct alpha_elf_frame_data *next; |
3687 | }; | |
252b5132 | 3688 | |
ea1562b3 NC |
3689 | static struct alpha_elf_frame_data *all_frame_data; |
3690 | static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data; | |
3691 | static struct alpha_elf_frame_data *cur_frame_data; | |
252b5132 | 3692 | |
ea1562b3 NC |
3693 | /* Handle the .section pseudo-op. This is like the usual one, but it |
3694 | clears alpha_insn_label and restores auto alignment. */ | |
252b5132 | 3695 | |
ea1562b3 NC |
3696 | static void |
3697 | s_alpha_section (int ignore ATTRIBUTE_UNUSED) | |
3698 | { | |
3699 | obj_elf_section (ignore); | |
252b5132 | 3700 | |
ea1562b3 NC |
3701 | alpha_insn_label = NULL; |
3702 | alpha_auto_align_on = 1; | |
3703 | alpha_current_align = 0; | |
3704 | } | |
252b5132 | 3705 | |
ea1562b3 NC |
3706 | static void |
3707 | s_alpha_ent (int dummy ATTRIBUTE_UNUSED) | |
3708 | { | |
3709 | if (ECOFF_DEBUGGING) | |
3710 | ecoff_directive_ent (0); | |
252b5132 RH |
3711 | else |
3712 | { | |
ea1562b3 NC |
3713 | char *name, name_end; |
3714 | name = input_line_pointer; | |
3715 | name_end = get_symbol_end (); | |
252b5132 | 3716 | |
ea1562b3 | 3717 | if (! is_name_beginner (*name)) |
252b5132 | 3718 | { |
ea1562b3 NC |
3719 | as_warn (_(".ent directive has no name")); |
3720 | *input_line_pointer = name_end; | |
252b5132 | 3721 | } |
ea1562b3 | 3722 | else |
252b5132 | 3723 | { |
ea1562b3 | 3724 | symbolS *sym; |
252b5132 | 3725 | |
ea1562b3 NC |
3726 | if (cur_frame_data) |
3727 | as_warn (_("nested .ent directives")); | |
252b5132 | 3728 | |
ea1562b3 NC |
3729 | sym = symbol_find_or_make (name); |
3730 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
252b5132 | 3731 | |
21d799b5 NC |
3732 | cur_frame_data = (struct alpha_elf_frame_data *) |
3733 | calloc (1, sizeof (*cur_frame_data)); | |
ea1562b3 | 3734 | cur_frame_data->func_sym = sym; |
252b5132 | 3735 | |
ea1562b3 NC |
3736 | /* Provide sensible defaults. */ |
3737 | cur_frame_data->fp_regno = 30; /* sp */ | |
3738 | cur_frame_data->ra_regno = 26; /* ra */ | |
252b5132 | 3739 | |
ea1562b3 NC |
3740 | *plast_frame_data = cur_frame_data; |
3741 | plast_frame_data = &cur_frame_data->next; | |
3742 | ||
3743 | /* The .ent directive is sometimes followed by a number. Not sure | |
3744 | what it really means, but ignore it. */ | |
3745 | *input_line_pointer = name_end; | |
3746 | SKIP_WHITESPACE (); | |
3747 | if (*input_line_pointer == ',') | |
3748 | { | |
3749 | input_line_pointer++; | |
3750 | SKIP_WHITESPACE (); | |
3751 | } | |
3752 | if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') | |
3753 | (void) get_absolute_expression (); | |
3754 | } | |
3755 | demand_empty_rest_of_line (); | |
3756 | } | |
3757 | } | |
252b5132 RH |
3758 | |
3759 | static void | |
ea1562b3 | 3760 | s_alpha_end (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3761 | { |
ea1562b3 NC |
3762 | if (ECOFF_DEBUGGING) |
3763 | ecoff_directive_end (0); | |
252b5132 | 3764 | else |
ea1562b3 NC |
3765 | { |
3766 | char *name, name_end; | |
3767 | name = input_line_pointer; | |
3768 | name_end = get_symbol_end (); | |
252b5132 | 3769 | |
ea1562b3 NC |
3770 | if (! is_name_beginner (*name)) |
3771 | { | |
3772 | as_warn (_(".end directive has no name")); | |
3773 | *input_line_pointer = name_end; | |
3774 | } | |
3775 | else | |
3776 | { | |
3777 | symbolS *sym; | |
252b5132 | 3778 | |
ea1562b3 NC |
3779 | sym = symbol_find (name); |
3780 | if (!cur_frame_data) | |
3781 | as_warn (_(".end directive without matching .ent")); | |
3782 | else if (sym != cur_frame_data->func_sym) | |
3783 | as_warn (_(".end directive names different symbol than .ent")); | |
252b5132 | 3784 | |
ea1562b3 NC |
3785 | /* Create an expression to calculate the size of the function. */ |
3786 | if (sym && cur_frame_data) | |
3787 | { | |
3788 | OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym); | |
21d799b5 | 3789 | expressionS *exp = (expressionS *) xmalloc (sizeof (expressionS)); |
252b5132 | 3790 | |
ea1562b3 NC |
3791 | obj->size = exp; |
3792 | exp->X_op = O_subtract; | |
3793 | exp->X_add_symbol = symbol_temp_new_now (); | |
3794 | exp->X_op_symbol = sym; | |
3795 | exp->X_add_number = 0; | |
252b5132 | 3796 | |
ea1562b3 NC |
3797 | cur_frame_data->func_end_sym = exp->X_add_symbol; |
3798 | } | |
252b5132 | 3799 | |
ea1562b3 | 3800 | cur_frame_data = NULL; |
252b5132 | 3801 | |
ea1562b3 NC |
3802 | *input_line_pointer = name_end; |
3803 | } | |
3804 | demand_empty_rest_of_line (); | |
3805 | } | |
252b5132 RH |
3806 | } |
3807 | ||
252b5132 | 3808 | static void |
ea1562b3 | 3809 | s_alpha_mask (int fp) |
252b5132 | 3810 | { |
ea1562b3 NC |
3811 | if (ECOFF_DEBUGGING) |
3812 | { | |
3813 | if (fp) | |
3814 | ecoff_directive_fmask (0); | |
3815 | else | |
3816 | ecoff_directive_mask (0); | |
3817 | } | |
252b5132 | 3818 | else |
ea1562b3 NC |
3819 | { |
3820 | long val; | |
3821 | offsetT offset; | |
252b5132 | 3822 | |
ea1562b3 NC |
3823 | if (!cur_frame_data) |
3824 | { | |
3825 | if (fp) | |
3826 | as_warn (_(".fmask outside of .ent")); | |
3827 | else | |
3828 | as_warn (_(".mask outside of .ent")); | |
3829 | discard_rest_of_line (); | |
3830 | return; | |
3831 | } | |
252b5132 | 3832 | |
ea1562b3 NC |
3833 | if (get_absolute_expression_and_terminator (&val) != ',') |
3834 | { | |
3835 | if (fp) | |
3836 | as_warn (_("bad .fmask directive")); | |
3837 | else | |
3838 | as_warn (_("bad .mask directive")); | |
3839 | --input_line_pointer; | |
3840 | discard_rest_of_line (); | |
3841 | return; | |
3842 | } | |
252b5132 | 3843 | |
ea1562b3 NC |
3844 | offset = get_absolute_expression (); |
3845 | demand_empty_rest_of_line (); | |
252b5132 | 3846 | |
ea1562b3 NC |
3847 | if (fp) |
3848 | { | |
3849 | cur_frame_data->fmask = val; | |
3850 | cur_frame_data->fmask_offset = offset; | |
3851 | } | |
3852 | else | |
3853 | { | |
3854 | cur_frame_data->mask = val; | |
3855 | cur_frame_data->mask_offset = offset; | |
3856 | } | |
3857 | } | |
252b5132 | 3858 | } |
252b5132 RH |
3859 | |
3860 | static void | |
ea1562b3 | 3861 | s_alpha_frame (int dummy ATTRIBUTE_UNUSED) |
252b5132 | 3862 | { |
ea1562b3 NC |
3863 | if (ECOFF_DEBUGGING) |
3864 | ecoff_directive_frame (0); | |
3865 | else | |
3866 | { | |
3867 | long val; | |
252b5132 | 3868 | |
ea1562b3 NC |
3869 | if (!cur_frame_data) |
3870 | { | |
3871 | as_warn (_(".frame outside of .ent")); | |
3872 | discard_rest_of_line (); | |
3873 | return; | |
3874 | } | |
252b5132 | 3875 | |
ea1562b3 | 3876 | cur_frame_data->fp_regno = tc_get_register (1); |
252b5132 | 3877 | |
ea1562b3 NC |
3878 | SKIP_WHITESPACE (); |
3879 | if (*input_line_pointer++ != ',' | |
3880 | || get_absolute_expression_and_terminator (&val) != ',') | |
3881 | { | |
3882 | as_warn (_("bad .frame directive")); | |
3883 | --input_line_pointer; | |
3884 | discard_rest_of_line (); | |
3885 | return; | |
3886 | } | |
3887 | cur_frame_data->frame_size = val; | |
252b5132 | 3888 | |
ea1562b3 NC |
3889 | cur_frame_data->ra_regno = tc_get_register (0); |
3890 | ||
3891 | /* Next comes the "offset of saved $a0 from $sp". In gcc terms | |
3892 | this is current_function_pretend_args_size. There's no place | |
3893 | to put this value, so ignore it. */ | |
3894 | s_ignore (42); | |
3895 | } | |
3896 | } | |
252b5132 RH |
3897 | |
3898 | static void | |
ea1562b3 | 3899 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3900 | { |
ea1562b3 NC |
3901 | symbolS *sym; |
3902 | int arg; | |
252b5132 | 3903 | |
ea1562b3 NC |
3904 | arg = get_absolute_expression (); |
3905 | demand_empty_rest_of_line (); | |
198f1251 TG |
3906 | alpha_prologue_label = symbol_new |
3907 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
252b5132 | 3908 | |
ea1562b3 NC |
3909 | if (ECOFF_DEBUGGING) |
3910 | sym = ecoff_get_cur_proc_sym (); | |
3911 | else | |
3912 | sym = cur_frame_data ? cur_frame_data->func_sym : NULL; | |
252b5132 | 3913 | |
ea1562b3 | 3914 | if (sym == NULL) |
252b5132 | 3915 | { |
ea1562b3 | 3916 | as_bad (_(".prologue directive without a preceding .ent directive")); |
252b5132 RH |
3917 | return; |
3918 | } | |
3919 | ||
ea1562b3 | 3920 | switch (arg) |
252b5132 | 3921 | { |
ea1562b3 NC |
3922 | case 0: /* No PV required. */ |
3923 | S_SET_OTHER (sym, STO_ALPHA_NOPV | |
3924 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3925 | break; | |
3926 | case 1: /* Std GP load. */ | |
3927 | S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD | |
3928 | | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); | |
3929 | break; | |
3930 | case 2: /* Non-std use of PV. */ | |
3931 | break; | |
252b5132 | 3932 | |
ea1562b3 NC |
3933 | default: |
3934 | as_bad (_("Invalid argument %d to .prologue."), arg); | |
3935 | break; | |
252b5132 RH |
3936 | } |
3937 | ||
ea1562b3 NC |
3938 | if (cur_frame_data) |
3939 | cur_frame_data->prologue_sym = symbol_temp_new_now (); | |
252b5132 RH |
3940 | } |
3941 | ||
ea1562b3 | 3942 | static char *first_file_directive; |
252b5132 RH |
3943 | |
3944 | static void | |
ea1562b3 | 3945 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3946 | { |
ea1562b3 NC |
3947 | /* Save the first .file directive we see, so that we can change our |
3948 | minds about whether ecoff debugging should or shouldn't be enabled. */ | |
3949 | if (alpha_flag_mdebug < 0 && ! first_file_directive) | |
3950 | { | |
3951 | char *start = input_line_pointer; | |
3952 | size_t len; | |
252b5132 | 3953 | |
ea1562b3 | 3954 | discard_rest_of_line (); |
252b5132 | 3955 | |
ea1562b3 | 3956 | len = input_line_pointer - start; |
21d799b5 | 3957 | first_file_directive = (char *) xmalloc (len + 1); |
ea1562b3 NC |
3958 | memcpy (first_file_directive, start, len); |
3959 | first_file_directive[len] = '\0'; | |
252b5132 | 3960 | |
ea1562b3 NC |
3961 | input_line_pointer = start; |
3962 | } | |
252b5132 | 3963 | |
ea1562b3 NC |
3964 | if (ECOFF_DEBUGGING) |
3965 | ecoff_directive_file (0); | |
3966 | else | |
3967 | dwarf2_directive_file (0); | |
3968 | } | |
252b5132 RH |
3969 | |
3970 | static void | |
ea1562b3 | 3971 | s_alpha_loc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 3972 | { |
ea1562b3 NC |
3973 | if (ECOFF_DEBUGGING) |
3974 | ecoff_directive_loc (0); | |
3975 | else | |
3976 | dwarf2_directive_loc (0); | |
252b5132 | 3977 | } |
252b5132 | 3978 | |
ea1562b3 NC |
3979 | static void |
3980 | s_alpha_stab (int n) | |
f37f01cf | 3981 | { |
ea1562b3 NC |
3982 | /* If we've been undecided about mdebug, make up our minds in favour. */ |
3983 | if (alpha_flag_mdebug < 0) | |
3984 | { | |
3985 | segT sec = subseg_new (".mdebug", 0); | |
3986 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
3987 | bfd_set_section_alignment (stdoutput, sec, 3); | |
f37f01cf | 3988 | |
ea1562b3 | 3989 | ecoff_read_begin_hook (); |
f37f01cf | 3990 | |
ea1562b3 NC |
3991 | if (first_file_directive) |
3992 | { | |
3993 | char *save_ilp = input_line_pointer; | |
3994 | input_line_pointer = first_file_directive; | |
3995 | ecoff_directive_file (0); | |
3996 | input_line_pointer = save_ilp; | |
3997 | free (first_file_directive); | |
3998 | } | |
252b5132 | 3999 | |
ea1562b3 NC |
4000 | alpha_flag_mdebug = 1; |
4001 | } | |
4002 | s_stab (n); | |
4003 | } | |
252b5132 RH |
4004 | |
4005 | static void | |
ea1562b3 | 4006 | s_alpha_coff_wrapper (int which) |
252b5132 | 4007 | { |
5a49b8ac | 4008 | static void (* const fns[]) (int) = { |
ea1562b3 NC |
4009 | ecoff_directive_begin, |
4010 | ecoff_directive_bend, | |
4011 | ecoff_directive_def, | |
4012 | ecoff_directive_dim, | |
4013 | ecoff_directive_endef, | |
4014 | ecoff_directive_scl, | |
4015 | ecoff_directive_tag, | |
4016 | ecoff_directive_val, | |
4017 | }; | |
252b5132 | 4018 | |
9c2799c2 | 4019 | gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); |
252b5132 | 4020 | |
252b5132 | 4021 | if (ECOFF_DEBUGGING) |
ea1562b3 | 4022 | (*fns[which]) (0); |
252b5132 RH |
4023 | else |
4024 | { | |
ea1562b3 NC |
4025 | as_bad (_("ECOFF debugging is disabled.")); |
4026 | ignore_rest_of_line (); | |
4027 | } | |
4028 | } | |
252b5132 | 4029 | |
ea1562b3 NC |
4030 | /* Called at the end of assembly. Here we emit unwind info for frames |
4031 | unless the compiler has done it for us. */ | |
252b5132 | 4032 | |
ea1562b3 NC |
4033 | void |
4034 | alpha_elf_md_end (void) | |
4035 | { | |
4036 | struct alpha_elf_frame_data *p; | |
f37f01cf | 4037 | |
ea1562b3 NC |
4038 | if (cur_frame_data) |
4039 | as_warn (_(".ent directive without matching .end")); | |
f37f01cf | 4040 | |
ea1562b3 NC |
4041 | /* If someone has generated the unwind info themselves, great. */ |
4042 | if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL) | |
4043 | return; | |
f37f01cf | 4044 | |
ea1562b3 NC |
4045 | /* Generate .eh_frame data for the unwind directives specified. */ |
4046 | for (p = all_frame_data; p ; p = p->next) | |
4047 | if (p->prologue_sym) | |
4048 | { | |
4049 | /* Create a temporary symbol at the same location as our | |
4050 | function symbol. This prevents problems with globals. */ | |
4051 | cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym), | |
4052 | S_GET_VALUE (p->func_sym), | |
4053 | symbol_get_frag (p->func_sym))); | |
252b5132 | 4054 | |
ea1562b3 NC |
4055 | cfi_set_return_column (p->ra_regno); |
4056 | cfi_add_CFA_def_cfa_register (30); | |
4057 | if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size) | |
4058 | { | |
4059 | unsigned int mask; | |
4060 | offsetT offset; | |
252b5132 | 4061 | |
ea1562b3 | 4062 | cfi_add_advance_loc (p->prologue_sym); |
252b5132 | 4063 | |
ea1562b3 NC |
4064 | if (p->fp_regno != 30) |
4065 | if (p->frame_size != 0) | |
4066 | cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size); | |
4067 | else | |
4068 | cfi_add_CFA_def_cfa_register (p->fp_regno); | |
4069 | else if (p->frame_size != 0) | |
4070 | cfi_add_CFA_def_cfa_offset (p->frame_size); | |
252b5132 | 4071 | |
ea1562b3 NC |
4072 | mask = p->mask; |
4073 | offset = p->mask_offset; | |
252b5132 | 4074 | |
ea1562b3 NC |
4075 | /* Recall that $26 is special-cased and stored first. */ |
4076 | if ((mask >> 26) & 1) | |
4077 | { | |
4078 | cfi_add_CFA_offset (26, offset); | |
4079 | offset += 8; | |
4080 | mask &= ~(1 << 26); | |
4081 | } | |
4082 | while (mask) | |
4083 | { | |
4084 | unsigned int i; | |
4085 | i = mask & -mask; | |
4086 | mask ^= i; | |
4087 | i = ffs (i) - 1; | |
f37f01cf | 4088 | |
ea1562b3 NC |
4089 | cfi_add_CFA_offset (i, offset); |
4090 | offset += 8; | |
4091 | } | |
f37f01cf | 4092 | |
ea1562b3 NC |
4093 | mask = p->fmask; |
4094 | offset = p->fmask_offset; | |
4095 | while (mask) | |
4096 | { | |
4097 | unsigned int i; | |
4098 | i = mask & -mask; | |
4099 | mask ^= i; | |
4100 | i = ffs (i) - 1; | |
252b5132 | 4101 | |
ea1562b3 NC |
4102 | cfi_add_CFA_offset (i + 32, offset); |
4103 | offset += 8; | |
4104 | } | |
4105 | } | |
252b5132 | 4106 | |
ea1562b3 NC |
4107 | cfi_end_fde (p->func_end_sym); |
4108 | } | |
252b5132 RH |
4109 | } |
4110 | ||
4111 | static void | |
ea1562b3 | 4112 | s_alpha_usepv (int unused ATTRIBUTE_UNUSED) |
252b5132 | 4113 | { |
ea1562b3 NC |
4114 | char *name, name_end; |
4115 | char *which, which_end; | |
4116 | symbolS *sym; | |
4117 | int other; | |
f37f01cf | 4118 | |
ea1562b3 NC |
4119 | name = input_line_pointer; |
4120 | name_end = get_symbol_end (); | |
f37f01cf | 4121 | |
ea1562b3 NC |
4122 | if (! is_name_beginner (*name)) |
4123 | { | |
4124 | as_bad (_(".usepv directive has no name")); | |
4125 | *input_line_pointer = name_end; | |
4126 | ignore_rest_of_line (); | |
4127 | return; | |
4128 | } | |
f37f01cf | 4129 | |
ea1562b3 NC |
4130 | sym = symbol_find_or_make (name); |
4131 | *input_line_pointer++ = name_end; | |
f37f01cf | 4132 | |
ea1562b3 NC |
4133 | if (name_end != ',') |
4134 | { | |
4135 | as_bad (_(".usepv directive has no type")); | |
4136 | ignore_rest_of_line (); | |
4137 | return; | |
f37f01cf | 4138 | } |
252b5132 | 4139 | |
ea1562b3 NC |
4140 | SKIP_WHITESPACE (); |
4141 | which = input_line_pointer; | |
4142 | which_end = get_symbol_end (); | |
4143 | ||
4144 | if (strcmp (which, "no") == 0) | |
4145 | other = STO_ALPHA_NOPV; | |
4146 | else if (strcmp (which, "std") == 0) | |
4147 | other = STO_ALPHA_STD_GPLOAD; | |
252b5132 | 4148 | else |
f37f01cf | 4149 | { |
ea1562b3 NC |
4150 | as_bad (_("unknown argument for .usepv")); |
4151 | other = 0; | |
4152 | } | |
f37f01cf | 4153 | |
ea1562b3 NC |
4154 | *input_line_pointer = which_end; |
4155 | demand_empty_rest_of_line (); | |
f37f01cf | 4156 | |
ea1562b3 NC |
4157 | S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); |
4158 | } | |
4159 | #endif /* OBJ_ELF */ | |
f37f01cf | 4160 | |
ea1562b3 | 4161 | /* Standard calling conventions leaves the CFA at $30 on entry. */ |
f37f01cf | 4162 | |
ea1562b3 NC |
4163 | void |
4164 | alpha_cfi_frame_initial_instructions (void) | |
4165 | { | |
4166 | cfi_add_CFA_def_cfa_register (30); | |
252b5132 RH |
4167 | } |
4168 | ||
ea1562b3 NC |
4169 | #ifdef OBJ_EVAX |
4170 | ||
198f1251 TG |
4171 | /* Get name of section. */ |
4172 | static char * | |
4173 | s_alpha_section_name (void) | |
4174 | { | |
4175 | char *name; | |
4176 | ||
4177 | SKIP_WHITESPACE (); | |
4178 | if (*input_line_pointer == '"') | |
4179 | { | |
4180 | int dummy; | |
4181 | ||
4182 | name = demand_copy_C_string (&dummy); | |
4183 | if (name == NULL) | |
4184 | { | |
4185 | ignore_rest_of_line (); | |
4186 | return NULL; | |
4187 | } | |
4188 | } | |
4189 | else | |
4190 | { | |
4191 | char *end = input_line_pointer; | |
4192 | ||
4193 | while (0 == strchr ("\n\t,; ", *end)) | |
4194 | end++; | |
4195 | if (end == input_line_pointer) | |
4196 | { | |
4197 | as_warn (_("missing name")); | |
4198 | ignore_rest_of_line (); | |
4199 | return NULL; | |
4200 | } | |
4201 | ||
4202 | name = xmalloc (end - input_line_pointer + 1); | |
4203 | memcpy (name, input_line_pointer, end - input_line_pointer); | |
4204 | name[end - input_line_pointer] = '\0'; | |
4205 | input_line_pointer = end; | |
4206 | } | |
4207 | SKIP_WHITESPACE (); | |
4208 | return name; | |
4209 | } | |
4210 | ||
d8703844 TG |
4211 | /* Put clear/set flags in one flagword. The LSBs are flags to be set, |
4212 | the MSBs are the flags to be cleared. */ | |
4213 | ||
4214 | #define EGPS__V_NO_SHIFT 16 | |
4215 | #define EGPS__V_MASK 0xffff | |
4216 | ||
4217 | /* Parse one VMS section flag. */ | |
4218 | ||
198f1251 TG |
4219 | static flagword |
4220 | s_alpha_section_word (char *str, size_t len) | |
4221 | { | |
4222 | int no = 0; | |
4223 | flagword flag = 0; | |
4224 | ||
4225 | if (len == 5 && strncmp (str, "NO", 2) == 0) | |
4226 | { | |
4227 | no = 1; | |
4228 | str += 2; | |
4229 | len -= 2; | |
4230 | } | |
4231 | ||
4232 | if (len == 3) | |
4233 | { | |
4234 | if (strncmp (str, "PIC", 3) == 0) | |
d8703844 | 4235 | flag = EGPS__V_PIC; |
198f1251 | 4236 | else if (strncmp (str, "LIB", 3) == 0) |
d8703844 | 4237 | flag = EGPS__V_LIB; |
198f1251 | 4238 | else if (strncmp (str, "OVR", 3) == 0) |
d8703844 | 4239 | flag = EGPS__V_OVR; |
198f1251 | 4240 | else if (strncmp (str, "REL", 3) == 0) |
d8703844 | 4241 | flag = EGPS__V_REL; |
198f1251 | 4242 | else if (strncmp (str, "GBL", 3) == 0) |
d8703844 | 4243 | flag = EGPS__V_GBL; |
198f1251 | 4244 | else if (strncmp (str, "SHR", 3) == 0) |
d8703844 | 4245 | flag = EGPS__V_SHR; |
198f1251 | 4246 | else if (strncmp (str, "EXE", 3) == 0) |
d8703844 | 4247 | flag = EGPS__V_EXE; |
198f1251 | 4248 | else if (strncmp (str, "WRT", 3) == 0) |
d8703844 | 4249 | flag = EGPS__V_WRT; |
198f1251 | 4250 | else if (strncmp (str, "VEC", 3) == 0) |
d8703844 | 4251 | flag = EGPS__V_VEC; |
198f1251 TG |
4252 | else if (strncmp (str, "MOD", 3) == 0) |
4253 | { | |
d8703844 | 4254 | flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT; |
198f1251 TG |
4255 | no = 0; |
4256 | } | |
4257 | else if (strncmp (str, "COM", 3) == 0) | |
d8703844 | 4258 | flag = EGPS__V_COM; |
198f1251 TG |
4259 | } |
4260 | ||
4261 | if (flag == 0) | |
4262 | { | |
4263 | char c = str[len]; | |
4264 | str[len] = 0; | |
4265 | as_warn (_("unknown section attribute %s"), str); | |
4266 | str[len] = c; | |
4267 | return 0; | |
4268 | } | |
4269 | ||
4270 | if (no) | |
d8703844 | 4271 | return flag << EGPS__V_NO_SHIFT; |
198f1251 TG |
4272 | else |
4273 | return flag; | |
4274 | } | |
4275 | ||
ea1562b3 NC |
4276 | /* Handle the section specific pseudo-op. */ |
4277 | ||
198f1251 TG |
4278 | #define EVAX_SECTION_COUNT 5 |
4279 | ||
4280 | static char *section_name[EVAX_SECTION_COUNT + 1] = | |
4281 | { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" }; | |
4282 | ||
252b5132 | 4283 | static void |
ea1562b3 | 4284 | s_alpha_section (int secid) |
252b5132 | 4285 | { |
198f1251 TG |
4286 | char *name, *beg; |
4287 | segT sec; | |
4288 | flagword vms_flags = 0; | |
4289 | symbolS *symbol; | |
252b5132 | 4290 | |
198f1251 | 4291 | if (secid == 0) |
81283cde | 4292 | { |
198f1251 TG |
4293 | name = s_alpha_section_name (); |
4294 | if (name == NULL) | |
4295 | return; | |
4296 | sec = subseg_new (name, 0); | |
4297 | if (*input_line_pointer == ',') | |
4298 | { | |
4299 | /* Skip the comma. */ | |
4300 | ++input_line_pointer; | |
4301 | SKIP_WHITESPACE (); | |
4302 | ||
4303 | do | |
4304 | { | |
4305 | char c; | |
4306 | ||
4307 | SKIP_WHITESPACE (); | |
4308 | beg = input_line_pointer; | |
4309 | c = get_symbol_end (); | |
4310 | *input_line_pointer = c; | |
4311 | ||
4312 | vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg); | |
4313 | ||
4314 | SKIP_WHITESPACE (); | |
4315 | } | |
4316 | while (*input_line_pointer++ == ','); | |
4317 | --input_line_pointer; | |
4318 | } | |
4319 | ||
4320 | symbol = symbol_find_or_make (name); | |
4321 | S_SET_SEGMENT (symbol, sec); | |
4322 | symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM; | |
d8703844 TG |
4323 | bfd_vms_set_section_flags |
4324 | (stdoutput, sec, | |
4325 | (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK, | |
4326 | vms_flags & EGPS__V_MASK); | |
81283cde | 4327 | } |
198f1251 TG |
4328 | else |
4329 | { | |
87975d2a | 4330 | get_absolute_expression (); |
198f1251 TG |
4331 | subseg_new (section_name[secid], 0); |
4332 | } | |
4333 | ||
4334 | demand_empty_rest_of_line (); | |
4335 | alpha_insn_label = NULL; | |
4336 | alpha_auto_align_on = 1; | |
4337 | alpha_current_align = 0; | |
4338 | } | |
4339 | ||
4340 | static void | |
4341 | s_alpha_literals (int ignore ATTRIBUTE_UNUSED) | |
4342 | { | |
4343 | subseg_new (".literals", 0); | |
ea1562b3 NC |
4344 | demand_empty_rest_of_line (); |
4345 | alpha_insn_label = NULL; | |
4346 | alpha_auto_align_on = 1; | |
4347 | alpha_current_align = 0; | |
252b5132 RH |
4348 | } |
4349 | ||
ea1562b3 | 4350 | /* Parse .ent directives. */ |
a8316fe2 | 4351 | |
4dc7ead9 | 4352 | static void |
ea1562b3 | 4353 | s_alpha_ent (int ignore ATTRIBUTE_UNUSED) |
4dc7ead9 | 4354 | { |
ea1562b3 NC |
4355 | symbolS *symbol; |
4356 | expressionS symexpr; | |
a8316fe2 | 4357 | |
4b1c4d2b TG |
4358 | if (alpha_evax_proc != NULL) |
4359 | as_bad (_("previous .ent not closed by a .end")); | |
4360 | ||
4361 | alpha_evax_proc = &alpha_evax_proc_data; | |
198f1251 TG |
4362 | |
4363 | alpha_evax_proc->pdsckind = 0; | |
4364 | alpha_evax_proc->framereg = -1; | |
4365 | alpha_evax_proc->framesize = 0; | |
4366 | alpha_evax_proc->rsa_offset = 0; | |
4367 | alpha_evax_proc->ra_save = AXP_REG_RA; | |
4368 | alpha_evax_proc->fp_save = -1; | |
4369 | alpha_evax_proc->imask = 0; | |
4370 | alpha_evax_proc->fmask = 0; | |
4371 | alpha_evax_proc->prologue = 0; | |
4372 | alpha_evax_proc->type = 0; | |
4373 | alpha_evax_proc->handler = 0; | |
4374 | alpha_evax_proc->handler_data = 0; | |
a8316fe2 | 4375 | |
ea1562b3 | 4376 | expression (&symexpr); |
a8316fe2 | 4377 | |
ea1562b3 NC |
4378 | if (symexpr.X_op != O_symbol) |
4379 | { | |
4380 | as_fatal (_(".ent directive has no symbol")); | |
4381 | demand_empty_rest_of_line (); | |
4382 | return; | |
a8316fe2 RH |
4383 | } |
4384 | ||
ea1562b3 NC |
4385 | symbol = make_expr_symbol (&symexpr); |
4386 | symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION; | |
198f1251 TG |
4387 | alpha_evax_proc->symbol = symbol; |
4388 | ||
ea1562b3 | 4389 | demand_empty_rest_of_line (); |
4dc7ead9 RH |
4390 | } |
4391 | ||
198f1251 TG |
4392 | static void |
4393 | s_alpha_handler (int is_data) | |
4394 | { | |
4395 | if (is_data) | |
4396 | alpha_evax_proc->handler_data = get_absolute_expression (); | |
4397 | else | |
4398 | { | |
4399 | char *name, name_end; | |
4400 | name = input_line_pointer; | |
4401 | name_end = get_symbol_end (); | |
4402 | ||
4403 | if (! is_name_beginner (*name)) | |
4404 | { | |
4405 | as_warn (_(".handler directive has no name")); | |
4406 | *input_line_pointer = name_end; | |
4407 | } | |
4408 | else | |
4409 | { | |
4410 | symbolS *sym; | |
4411 | ||
4412 | sym = symbol_find_or_make (name); | |
4413 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
4414 | alpha_evax_proc->handler = sym; | |
4415 | *input_line_pointer = name_end; | |
4416 | } | |
4417 | } | |
4418 | demand_empty_rest_of_line (); | |
4419 | } | |
4420 | ||
ea1562b3 NC |
4421 | /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */ |
4422 | ||
a8316fe2 | 4423 | static void |
ea1562b3 | 4424 | s_alpha_frame (int ignore ATTRIBUTE_UNUSED) |
a8316fe2 | 4425 | { |
ea1562b3 | 4426 | long val; |
a8316fe2 | 4427 | |
198f1251 | 4428 | alpha_evax_proc->framereg = tc_get_register (1); |
a8316fe2 | 4429 | |
ea1562b3 NC |
4430 | SKIP_WHITESPACE (); |
4431 | if (*input_line_pointer++ != ',' | |
4432 | || get_absolute_expression_and_terminator (&val) != ',') | |
4433 | { | |
4434 | as_warn (_("Bad .frame directive 1./2. param")); | |
4435 | --input_line_pointer; | |
4436 | demand_empty_rest_of_line (); | |
4437 | return; | |
4438 | } | |
a8316fe2 | 4439 | |
198f1251 | 4440 | alpha_evax_proc->framesize = val; |
ea1562b3 NC |
4441 | |
4442 | (void) tc_get_register (1); | |
4443 | SKIP_WHITESPACE (); | |
4444 | if (*input_line_pointer++ != ',') | |
4445 | { | |
4446 | as_warn (_("Bad .frame directive 3./4. param")); | |
4447 | --input_line_pointer; | |
4448 | demand_empty_rest_of_line (); | |
4449 | return; | |
a8316fe2 | 4450 | } |
198f1251 TG |
4451 | alpha_evax_proc->rsa_offset = get_absolute_expression (); |
4452 | } | |
4453 | ||
51794af8 TG |
4454 | /* Parse .prologue. */ |
4455 | ||
198f1251 TG |
4456 | static void |
4457 | s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) | |
4458 | { | |
87975d2a | 4459 | get_absolute_expression (); |
198f1251 TG |
4460 | demand_empty_rest_of_line (); |
4461 | alpha_prologue_label = symbol_new | |
4462 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
a8316fe2 RH |
4463 | } |
4464 | ||
51794af8 TG |
4465 | /* Parse .pdesc <entry_name>. |
4466 | Insert a procedure descriptor. */ | |
4467 | ||
252b5132 | 4468 | static void |
ea1562b3 | 4469 | s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4470 | { |
ea1562b3 NC |
4471 | char *name; |
4472 | char name_end; | |
ea1562b3 NC |
4473 | register char *p; |
4474 | expressionS exp; | |
4475 | symbolS *entry_sym; | |
198f1251 | 4476 | const char *entry_sym_name; |
4b1c4d2b TG |
4477 | const char *pdesc_sym_name; |
4478 | fixS *fixp; | |
4479 | size_t len; | |
252b5132 | 4480 | |
ea1562b3 NC |
4481 | if (now_seg != alpha_link_section) |
4482 | { | |
4483 | as_bad (_(".pdesc directive not in link (.link) section")); | |
ea1562b3 NC |
4484 | return; |
4485 | } | |
252b5132 | 4486 | |
198f1251 TG |
4487 | expression (&exp); |
4488 | if (exp.X_op != O_symbol) | |
252b5132 | 4489 | { |
4b1c4d2b | 4490 | as_bad (_(".pdesc directive has no entry symbol")); |
ea1562b3 | 4491 | return; |
252b5132 | 4492 | } |
198f1251 TG |
4493 | |
4494 | entry_sym = make_expr_symbol (&exp); | |
4b1c4d2b | 4495 | entry_sym_name = S_GET_NAME (entry_sym); |
198f1251 | 4496 | |
8aacb050 | 4497 | /* Strip "..en". */ |
198f1251 | 4498 | len = strlen (entry_sym_name); |
4b1c4d2b | 4499 | if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0) |
ea1562b3 | 4500 | { |
4b1c4d2b TG |
4501 | as_bad (_(".pdesc has a bad entry symbol")); |
4502 | return; | |
4503 | } | |
4504 | len -= 4; | |
4505 | pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol); | |
4506 | ||
4507 | if (!alpha_evax_proc | |
4508 | || !S_IS_DEFINED (alpha_evax_proc->symbol) | |
4509 | || strlen (pdesc_sym_name) != len | |
4510 | || memcmp (entry_sym_name, pdesc_sym_name, len) != 0) | |
4511 | { | |
4512 | as_fatal (_(".pdesc doesn't match with last .ent")); | |
ea1562b3 NC |
4513 | return; |
4514 | } | |
f37f01cf | 4515 | |
8aacb050 | 4516 | /* Define pdesc symbol. */ |
4b1c4d2b | 4517 | symbol_set_value_now (alpha_evax_proc->symbol); |
198f1251 TG |
4518 | |
4519 | /* Save bfd symbol of proc entry in function symbol. */ | |
4520 | ((struct evax_private_udata_struct *) | |
4521 | symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym | |
4522 | = symbol_get_bfdsym (entry_sym); | |
4523 | ||
ea1562b3 NC |
4524 | SKIP_WHITESPACE (); |
4525 | if (*input_line_pointer++ != ',') | |
4526 | { | |
4527 | as_warn (_("No comma after .pdesc <entryname>")); | |
4528 | demand_empty_rest_of_line (); | |
4529 | return; | |
4530 | } | |
f37f01cf | 4531 | |
ea1562b3 NC |
4532 | SKIP_WHITESPACE (); |
4533 | name = input_line_pointer; | |
4534 | name_end = get_symbol_end (); | |
f37f01cf | 4535 | |
ea1562b3 | 4536 | if (strncmp (name, "stack", 5) == 0) |
198f1251 | 4537 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK; |
f37f01cf | 4538 | |
ea1562b3 | 4539 | else if (strncmp (name, "reg", 3) == 0) |
198f1251 | 4540 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER; |
f37f01cf | 4541 | |
ea1562b3 | 4542 | else if (strncmp (name, "null", 4) == 0) |
198f1251 | 4543 | alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL; |
f37f01cf | 4544 | |
ea1562b3 NC |
4545 | else |
4546 | { | |
4547 | as_fatal (_("unknown procedure kind")); | |
4548 | demand_empty_rest_of_line (); | |
4549 | return; | |
4550 | } | |
f37f01cf | 4551 | |
ea1562b3 NC |
4552 | *input_line_pointer = name_end; |
4553 | demand_empty_rest_of_line (); | |
f37f01cf | 4554 | |
ea1562b3 NC |
4555 | #ifdef md_flush_pending_output |
4556 | md_flush_pending_output (); | |
4557 | #endif | |
252b5132 RH |
4558 | |
4559 | frag_align (3, 0, 0); | |
4560 | p = frag_more (16); | |
4561 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0); | |
4562 | fixp->fx_done = 1; | |
252b5132 | 4563 | |
198f1251 TG |
4564 | *p = alpha_evax_proc->pdsckind |
4565 | | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0) | |
4566 | | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0) | |
4567 | | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0); | |
66498417 | 4568 | *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET; |
252b5132 | 4569 | |
198f1251 | 4570 | switch (alpha_evax_proc->pdsckind) |
252b5132 | 4571 | { |
1aad8cf8 | 4572 | case PDSC_S_K_KIND_NULL: |
66498417 KH |
4573 | *(p + 2) = 0; |
4574 | *(p + 3) = 0; | |
1aad8cf8 KH |
4575 | break; |
4576 | case PDSC_S_K_KIND_FP_REGISTER: | |
198f1251 TG |
4577 | *(p + 2) = alpha_evax_proc->fp_save; |
4578 | *(p + 3) = alpha_evax_proc->ra_save; | |
1aad8cf8 KH |
4579 | break; |
4580 | case PDSC_S_K_KIND_FP_STACK: | |
198f1251 | 4581 | md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2); |
1aad8cf8 KH |
4582 | break; |
4583 | default: /* impossible */ | |
4584 | break; | |
252b5132 RH |
4585 | } |
4586 | ||
66498417 | 4587 | *(p + 4) = 0; |
198f1251 | 4588 | *(p + 5) = alpha_evax_proc->type & 0x0f; |
252b5132 RH |
4589 | |
4590 | /* Signature offset. */ | |
66498417 | 4591 | md_number_to_chars (p + 6, (valueT) 0, 2); |
252b5132 | 4592 | |
af24f60c TG |
4593 | fix_new_exp (frag_now, p - frag_now->fr_literal + 8, |
4594 | 8, &exp, 0, BFD_RELOC_64); | |
252b5132 | 4595 | |
198f1251 | 4596 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL) |
252b5132 RH |
4597 | return; |
4598 | ||
252b5132 | 4599 | /* pdesc+16: Size. */ |
af24f60c | 4600 | p = frag_more (6); |
198f1251 | 4601 | md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4); |
66498417 | 4602 | md_number_to_chars (p + 4, (valueT) 0, 2); |
252b5132 RH |
4603 | |
4604 | /* Entry length. */ | |
198f1251 TG |
4605 | exp.X_op = O_subtract; |
4606 | exp.X_add_symbol = alpha_prologue_label; | |
4607 | exp.X_op_symbol = entry_sym; | |
4608 | emit_expr (&exp, 2); | |
252b5132 | 4609 | |
198f1251 | 4610 | if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER) |
252b5132 RH |
4611 | return; |
4612 | ||
252b5132 | 4613 | /* pdesc+24: register masks. */ |
af24f60c | 4614 | p = frag_more (8); |
198f1251 TG |
4615 | md_number_to_chars (p, alpha_evax_proc->imask, 4); |
4616 | md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4); | |
4617 | ||
4618 | if (alpha_evax_proc->handler) | |
4619 | { | |
4620 | p = frag_more (8); | |
4621 | fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, | |
4622 | alpha_evax_proc->handler, 0, 0, BFD_RELOC_64); | |
4623 | } | |
4624 | ||
4625 | if (alpha_evax_proc->handler_data) | |
4626 | { | |
198f1251 | 4627 | p = frag_more (8); |
198f1251 TG |
4628 | md_number_to_chars (p, alpha_evax_proc->handler_data, 8); |
4629 | } | |
252b5132 RH |
4630 | } |
4631 | ||
252b5132 RH |
4632 | /* Support for crash debug on vms. */ |
4633 | ||
4634 | static void | |
ea1562b3 | 4635 | s_alpha_name (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4636 | { |
ea1562b3 | 4637 | char *p; |
252b5132 | 4638 | expressionS exp; |
252b5132 RH |
4639 | |
4640 | if (now_seg != alpha_link_section) | |
4641 | { | |
4642 | as_bad (_(".name directive not in link (.link) section")); | |
4643 | demand_empty_rest_of_line (); | |
4644 | return; | |
4645 | } | |
4646 | ||
4647 | expression (&exp); | |
4648 | if (exp.X_op != O_symbol) | |
4649 | { | |
4650 | as_warn (_(".name directive has no symbol")); | |
4651 | demand_empty_rest_of_line (); | |
4652 | return; | |
4653 | } | |
4654 | ||
4655 | demand_empty_rest_of_line (); | |
4656 | ||
4657 | #ifdef md_flush_pending_output | |
4658 | md_flush_pending_output (); | |
4659 | #endif | |
4660 | ||
4661 | frag_align (3, 0, 0); | |
4662 | p = frag_more (8); | |
252b5132 | 4663 | |
66498417 | 4664 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64); |
252b5132 RH |
4665 | } |
4666 | ||
51794af8 TG |
4667 | /* Parse .linkage <symbol>. |
4668 | Create a linkage pair relocation. */ | |
4669 | ||
252b5132 | 4670 | static void |
ea1562b3 | 4671 | s_alpha_linkage (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4672 | { |
4673 | expressionS exp; | |
4674 | char *p; | |
198f1251 | 4675 | fixS *fixp; |
252b5132 RH |
4676 | |
4677 | #ifdef md_flush_pending_output | |
4678 | md_flush_pending_output (); | |
4679 | #endif | |
4680 | ||
4681 | expression (&exp); | |
4682 | if (exp.X_op != O_symbol) | |
4683 | { | |
4684 | as_fatal (_("No symbol after .linkage")); | |
4685 | } | |
4686 | else | |
4687 | { | |
198f1251 TG |
4688 | struct alpha_linkage_fixups *linkage_fixup; |
4689 | ||
252b5132 RH |
4690 | p = frag_more (LKP_S_K_SIZE); |
4691 | memset (p, 0, LKP_S_K_SIZE); | |
198f1251 TG |
4692 | fixp = fix_new_exp |
4693 | (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\ | |
4694 | BFD_RELOC_ALPHA_LINKAGE); | |
4695 | ||
4696 | linkage_fixup = (struct alpha_linkage_fixups *) | |
4697 | xmalloc (sizeof (struct alpha_linkage_fixups)); | |
4698 | ||
4699 | linkage_fixup->fixp = fixp; | |
4700 | linkage_fixup->next = 0; | |
4701 | ||
4702 | if (alpha_insn_label == 0) | |
4703 | alpha_insn_label = symbol_new | |
4704 | (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); | |
4705 | linkage_fixup->label = alpha_insn_label; | |
4706 | ||
4707 | if (alpha_linkage_fixup_root == 0) | |
4708 | { | |
4709 | alpha_linkage_fixup_root = alpha_linkage_fixup_tail = linkage_fixup; | |
4710 | alpha_linkage_fixup_tail->next = 0; | |
4711 | } | |
4712 | else | |
4713 | { | |
4714 | alpha_linkage_fixup_tail->next = linkage_fixup; | |
4715 | alpha_linkage_fixup_tail = linkage_fixup; | |
4716 | alpha_linkage_fixup_tail->next = 0; | |
4717 | } | |
252b5132 RH |
4718 | } |
4719 | demand_empty_rest_of_line (); | |
252b5132 RH |
4720 | } |
4721 | ||
51794af8 TG |
4722 | /* Parse .code_address <symbol>. |
4723 | Create a code address relocation. */ | |
4724 | ||
252b5132 | 4725 | static void |
ea1562b3 | 4726 | s_alpha_code_address (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4727 | { |
4728 | expressionS exp; | |
4729 | char *p; | |
4730 | ||
4731 | #ifdef md_flush_pending_output | |
4732 | md_flush_pending_output (); | |
4733 | #endif | |
4734 | ||
4735 | expression (&exp); | |
4736 | if (exp.X_op != O_symbol) | |
ea1562b3 | 4737 | as_fatal (_("No symbol after .code_address")); |
252b5132 RH |
4738 | else |
4739 | { | |
4740 | p = frag_more (8); | |
4741 | memset (p, 0, 8); | |
4742 | fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\ | |
4743 | BFD_RELOC_ALPHA_CODEADDR); | |
4744 | } | |
4745 | demand_empty_rest_of_line (); | |
252b5132 RH |
4746 | } |
4747 | ||
252b5132 | 4748 | static void |
ea1562b3 | 4749 | s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4750 | { |
4751 | ||
198f1251 | 4752 | alpha_evax_proc->fp_save = tc_get_register (1); |
252b5132 RH |
4753 | |
4754 | demand_empty_rest_of_line (); | |
252b5132 RH |
4755 | } |
4756 | ||
252b5132 | 4757 | static void |
ea1562b3 | 4758 | s_alpha_mask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4759 | { |
4760 | long val; | |
4761 | ||
4762 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4763 | { | |
4764 | as_warn (_("Bad .mask directive")); | |
4765 | --input_line_pointer; | |
4766 | } | |
4767 | else | |
4768 | { | |
198f1251 | 4769 | alpha_evax_proc->imask = val; |
32ff5c2e | 4770 | (void) get_absolute_expression (); |
252b5132 RH |
4771 | } |
4772 | demand_empty_rest_of_line (); | |
252b5132 RH |
4773 | } |
4774 | ||
252b5132 | 4775 | static void |
ea1562b3 | 4776 | s_alpha_fmask (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4777 | { |
4778 | long val; | |
4779 | ||
4780 | if (get_absolute_expression_and_terminator (&val) != ',') | |
4781 | { | |
4782 | as_warn (_("Bad .fmask directive")); | |
4783 | --input_line_pointer; | |
4784 | } | |
4785 | else | |
4786 | { | |
198f1251 | 4787 | alpha_evax_proc->fmask = val; |
252b5132 RH |
4788 | (void) get_absolute_expression (); |
4789 | } | |
4790 | demand_empty_rest_of_line (); | |
252b5132 RH |
4791 | } |
4792 | ||
4793 | static void | |
ea1562b3 | 4794 | s_alpha_end (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4795 | { |
4796 | char c; | |
4797 | ||
4798 | c = get_symbol_end (); | |
4799 | *input_line_pointer = c; | |
4800 | demand_empty_rest_of_line (); | |
8aacb050 | 4801 | alpha_evax_proc = NULL; |
252b5132 RH |
4802 | } |
4803 | ||
252b5132 | 4804 | static void |
ea1562b3 | 4805 | s_alpha_file (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4806 | { |
4807 | symbolS *s; | |
4808 | int length; | |
4809 | static char case_hack[32]; | |
4810 | ||
252b5132 | 4811 | sprintf (case_hack, "<CASE:%01d%01d>", |
9de8d8f1 | 4812 | alpha_flag_hash_long_names, alpha_flag_show_after_trunc); |
252b5132 RH |
4813 | |
4814 | s = symbol_find_or_make (case_hack); | |
9de8d8f1 | 4815 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 RH |
4816 | |
4817 | get_absolute_expression (); | |
4818 | s = symbol_find_or_make (demand_copy_string (&length)); | |
9de8d8f1 | 4819 | symbol_get_bfdsym (s)->flags |= BSF_FILE; |
252b5132 | 4820 | demand_empty_rest_of_line (); |
252b5132 RH |
4821 | } |
4822 | #endif /* OBJ_EVAX */ | |
4823 | ||
4824 | /* Handle the .gprel32 pseudo op. */ | |
4825 | ||
4826 | static void | |
ea1562b3 | 4827 | s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4828 | { |
4829 | expressionS e; | |
4830 | char *p; | |
4831 | ||
4832 | SKIP_WHITESPACE (); | |
4833 | expression (&e); | |
4834 | ||
4835 | #ifdef OBJ_ELF | |
4836 | switch (e.X_op) | |
4837 | { | |
4838 | case O_constant: | |
32ff5c2e | 4839 | e.X_add_symbol = section_symbol (absolute_section); |
252b5132 RH |
4840 | e.X_op = O_symbol; |
4841 | /* FALLTHRU */ | |
4842 | case O_symbol: | |
4843 | break; | |
4844 | default: | |
bc805888 | 4845 | abort (); |
252b5132 RH |
4846 | } |
4847 | #else | |
4848 | #ifdef OBJ_ECOFF | |
4849 | switch (e.X_op) | |
4850 | { | |
4851 | case O_constant: | |
4852 | e.X_add_symbol = section_symbol (absolute_section); | |
4853 | /* fall through */ | |
4854 | case O_symbol: | |
4855 | e.X_op = O_subtract; | |
4856 | e.X_op_symbol = alpha_gp_symbol; | |
4857 | break; | |
4858 | default: | |
4859 | abort (); | |
4860 | } | |
4861 | #endif | |
4862 | #endif | |
4863 | ||
4864 | if (alpha_auto_align_on && alpha_current_align < 2) | |
4865 | alpha_align (2, (char *) NULL, alpha_insn_label, 0); | |
4866 | if (alpha_current_align > 2) | |
4867 | alpha_current_align = 2; | |
4868 | alpha_insn_label = NULL; | |
4869 | ||
4870 | p = frag_more (4); | |
4871 | memset (p, 0, 4); | |
66498417 | 4872 | fix_new_exp (frag_now, p - frag_now->fr_literal, 4, |
252b5132 RH |
4873 | &e, 0, BFD_RELOC_GPREL32); |
4874 | } | |
4875 | ||
4876 | /* Handle floating point allocation pseudo-ops. This is like the | |
4877 | generic vresion, but it makes sure the current label, if any, is | |
4878 | correctly aligned. */ | |
4879 | ||
4880 | static void | |
ea1562b3 | 4881 | s_alpha_float_cons (int type) |
252b5132 RH |
4882 | { |
4883 | int log_size; | |
4884 | ||
4885 | switch (type) | |
4886 | { | |
4887 | default: | |
4888 | case 'f': | |
4889 | case 'F': | |
4890 | log_size = 2; | |
4891 | break; | |
4892 | ||
4893 | case 'd': | |
4894 | case 'D': | |
4895 | case 'G': | |
4896 | log_size = 3; | |
4897 | break; | |
4898 | ||
4899 | case 'x': | |
4900 | case 'X': | |
4901 | case 'p': | |
4902 | case 'P': | |
4903 | log_size = 4; | |
4904 | break; | |
4905 | } | |
4906 | ||
4907 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
4908 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
4909 | if (alpha_current_align > log_size) | |
4910 | alpha_current_align = log_size; | |
4911 | alpha_insn_label = NULL; | |
4912 | ||
4913 | float_cons (type); | |
4914 | } | |
4915 | ||
4916 | /* Handle the .proc pseudo op. We don't really do much with it except | |
4917 | parse it. */ | |
4918 | ||
4919 | static void | |
ea1562b3 | 4920 | s_alpha_proc (int is_static ATTRIBUTE_UNUSED) |
252b5132 RH |
4921 | { |
4922 | char *name; | |
4923 | char c; | |
4924 | char *p; | |
4925 | symbolS *symbolP; | |
4926 | int temp; | |
4927 | ||
ea1562b3 | 4928 | /* Takes ".proc name,nargs". */ |
252b5132 RH |
4929 | SKIP_WHITESPACE (); |
4930 | name = input_line_pointer; | |
4931 | c = get_symbol_end (); | |
4932 | p = input_line_pointer; | |
4933 | symbolP = symbol_find_or_make (name); | |
4934 | *p = c; | |
4935 | SKIP_WHITESPACE (); | |
4936 | if (*input_line_pointer != ',') | |
4937 | { | |
4938 | *p = 0; | |
4939 | as_warn (_("Expected comma after name \"%s\""), name); | |
4940 | *p = c; | |
4941 | temp = 0; | |
4942 | ignore_rest_of_line (); | |
4943 | } | |
4944 | else | |
4945 | { | |
4946 | input_line_pointer++; | |
4947 | temp = get_absolute_expression (); | |
4948 | } | |
7dcc9865 | 4949 | /* *symbol_get_obj (symbolP) = (signed char) temp; */ |
87975d2a | 4950 | (void) symbolP; |
252b5132 RH |
4951 | as_warn (_("unhandled: .proc %s,%d"), name, temp); |
4952 | demand_empty_rest_of_line (); | |
4953 | } | |
4954 | ||
4955 | /* Handle the .set pseudo op. This is used to turn on and off most of | |
4956 | the assembler features. */ | |
4957 | ||
4958 | static void | |
ea1562b3 | 4959 | s_alpha_set (int x ATTRIBUTE_UNUSED) |
252b5132 RH |
4960 | { |
4961 | char *name, ch, *s; | |
4962 | int yesno = 1; | |
4963 | ||
4964 | SKIP_WHITESPACE (); | |
4965 | name = input_line_pointer; | |
4966 | ch = get_symbol_end (); | |
4967 | ||
4968 | s = name; | |
4969 | if (s[0] == 'n' && s[1] == 'o') | |
4970 | { | |
4971 | yesno = 0; | |
4972 | s += 2; | |
4973 | } | |
4974 | if (!strcmp ("reorder", s)) | |
4975 | /* ignore */ ; | |
4976 | else if (!strcmp ("at", s)) | |
4977 | alpha_noat_on = !yesno; | |
4978 | else if (!strcmp ("macro", s)) | |
4979 | alpha_macros_on = yesno; | |
4980 | else if (!strcmp ("move", s)) | |
4981 | /* ignore */ ; | |
4982 | else if (!strcmp ("volatile", s)) | |
4983 | /* ignore */ ; | |
4984 | else | |
4985 | as_warn (_("Tried to .set unrecognized mode `%s'"), name); | |
4986 | ||
4987 | *input_line_pointer = ch; | |
4988 | demand_empty_rest_of_line (); | |
4989 | } | |
4990 | ||
4991 | /* Handle the .base pseudo op. This changes the assembler's notion of | |
4992 | the $gp register. */ | |
4993 | ||
4994 | static void | |
ea1562b3 | 4995 | s_alpha_base (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4996 | { |
252b5132 | 4997 | SKIP_WHITESPACE (); |
ea1562b3 | 4998 | |
252b5132 | 4999 | if (*input_line_pointer == '$') |
ea1562b3 NC |
5000 | { |
5001 | /* $rNN form. */ | |
252b5132 RH |
5002 | input_line_pointer++; |
5003 | if (*input_line_pointer == 'r') | |
5004 | input_line_pointer++; | |
5005 | } | |
5006 | ||
5007 | alpha_gp_register = get_absolute_expression (); | |
5008 | if (alpha_gp_register < 0 || alpha_gp_register > 31) | |
5009 | { | |
5010 | alpha_gp_register = AXP_REG_GP; | |
5011 | as_warn (_("Bad base register, using $%d."), alpha_gp_register); | |
5012 | } | |
5013 | ||
5014 | demand_empty_rest_of_line (); | |
5015 | } | |
5016 | ||
5017 | /* Handle the .align pseudo-op. This aligns to a power of two. It | |
5018 | also adjusts any current instruction label. We treat this the same | |
5019 | way the MIPS port does: .align 0 turns off auto alignment. */ | |
5020 | ||
5021 | static void | |
ea1562b3 | 5022 | s_alpha_align (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5023 | { |
5024 | int align; | |
5025 | char fill, *pfill; | |
198f1251 | 5026 | long max_alignment = 16; |
252b5132 RH |
5027 | |
5028 | align = get_absolute_expression (); | |
5029 | if (align > max_alignment) | |
5030 | { | |
5031 | align = max_alignment; | |
5032 | as_bad (_("Alignment too large: %d. assumed"), align); | |
5033 | } | |
5034 | else if (align < 0) | |
5035 | { | |
5036 | as_warn (_("Alignment negative: 0 assumed")); | |
5037 | align = 0; | |
5038 | } | |
5039 | ||
5040 | if (*input_line_pointer == ',') | |
5041 | { | |
5042 | input_line_pointer++; | |
5043 | fill = get_absolute_expression (); | |
5044 | pfill = &fill; | |
5045 | } | |
5046 | else | |
5047 | pfill = NULL; | |
5048 | ||
5049 | if (align != 0) | |
5050 | { | |
5051 | alpha_auto_align_on = 1; | |
af3ecb4a | 5052 | alpha_align (align, pfill, NULL, 1); |
252b5132 RH |
5053 | } |
5054 | else | |
5055 | { | |
5056 | alpha_auto_align_on = 0; | |
5057 | } | |
af3ecb4a | 5058 | alpha_insn_label = NULL; |
252b5132 RH |
5059 | |
5060 | demand_empty_rest_of_line (); | |
5061 | } | |
5062 | ||
5063 | /* Hook the normal string processor to reset known alignment. */ | |
5064 | ||
5065 | static void | |
ea1562b3 | 5066 | s_alpha_stringer (int terminate) |
252b5132 RH |
5067 | { |
5068 | alpha_current_align = 0; | |
5069 | alpha_insn_label = NULL; | |
38a57ae7 | 5070 | stringer (8 + terminate); |
252b5132 RH |
5071 | } |
5072 | ||
5073 | /* Hook the normal space processing to reset known alignment. */ | |
5074 | ||
5075 | static void | |
ea1562b3 | 5076 | s_alpha_space (int ignore) |
252b5132 RH |
5077 | { |
5078 | alpha_current_align = 0; | |
5079 | alpha_insn_label = NULL; | |
5080 | s_space (ignore); | |
5081 | } | |
5082 | ||
5083 | /* Hook into cons for auto-alignment. */ | |
5084 | ||
5085 | void | |
ea1562b3 | 5086 | alpha_cons_align (int size) |
252b5132 RH |
5087 | { |
5088 | int log_size; | |
5089 | ||
5090 | log_size = 0; | |
5091 | while ((size >>= 1) != 0) | |
5092 | ++log_size; | |
5093 | ||
5094 | if (alpha_auto_align_on && alpha_current_align < log_size) | |
5095 | alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); | |
5096 | if (alpha_current_align > log_size) | |
5097 | alpha_current_align = log_size; | |
5098 | alpha_insn_label = NULL; | |
5099 | } | |
5100 | ||
5101 | /* Here come the .uword, .ulong, and .uquad explicitly unaligned | |
5102 | pseudos. We just turn off auto-alignment and call down to cons. */ | |
5103 | ||
5104 | static void | |
ea1562b3 | 5105 | s_alpha_ucons (int bytes) |
252b5132 RH |
5106 | { |
5107 | int hold = alpha_auto_align_on; | |
5108 | alpha_auto_align_on = 0; | |
5109 | cons (bytes); | |
5110 | alpha_auto_align_on = hold; | |
5111 | } | |
5112 | ||
5113 | /* Switch the working cpu type. */ | |
5114 | ||
5115 | static void | |
ea1562b3 | 5116 | s_alpha_arch (int ignored ATTRIBUTE_UNUSED) |
252b5132 RH |
5117 | { |
5118 | char *name, ch; | |
5119 | const struct cpu_type *p; | |
5120 | ||
5121 | SKIP_WHITESPACE (); | |
5122 | name = input_line_pointer; | |
5123 | ch = get_symbol_end (); | |
5124 | ||
5125 | for (p = cpu_types; p->name; ++p) | |
32ff5c2e | 5126 | if (strcmp (name, p->name) == 0) |
252b5132 | 5127 | { |
1aad8cf8 | 5128 | alpha_target_name = p->name, alpha_target = p->flags; |
252b5132 RH |
5129 | goto found; |
5130 | } | |
20203fb9 | 5131 | as_warn (_("Unknown CPU identifier `%s'"), name); |
252b5132 RH |
5132 | |
5133 | found: | |
5134 | *input_line_pointer = ch; | |
5135 | demand_empty_rest_of_line (); | |
5136 | } | |
252b5132 | 5137 | \f |
252b5132 RH |
5138 | #ifdef DEBUG1 |
5139 | /* print token expression with alpha specific extension. */ | |
5140 | ||
5141 | static void | |
ea1562b3 | 5142 | alpha_print_token (FILE *f, const expressionS *exp) |
252b5132 RH |
5143 | { |
5144 | switch (exp->X_op) | |
5145 | { | |
1aad8cf8 KH |
5146 | case O_cpregister: |
5147 | putc (',', f); | |
5148 | /* FALLTHRU */ | |
5149 | case O_pregister: | |
5150 | putc ('(', f); | |
5151 | { | |
5152 | expressionS nexp = *exp; | |
5153 | nexp.X_op = O_register; | |
198f1251 | 5154 | print_expr_1 (f, &nexp); |
1aad8cf8 KH |
5155 | } |
5156 | putc (')', f); | |
5157 | break; | |
5158 | default: | |
198f1251 | 5159 | print_expr_1 (f, exp); |
1aad8cf8 | 5160 | break; |
252b5132 | 5161 | } |
252b5132 RH |
5162 | } |
5163 | #endif | |
5164 | \f | |
5165 | /* The target specific pseudo-ops which we support. */ | |
5166 | ||
ea1562b3 NC |
5167 | const pseudo_typeS md_pseudo_table[] = |
5168 | { | |
252b5132 | 5169 | #ifdef OBJ_ECOFF |
ea1562b3 | 5170 | {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */ |
252b5132 RH |
5171 | {"rdata", s_alpha_rdata, 0}, |
5172 | #endif | |
5173 | {"text", s_alpha_text, 0}, | |
5174 | {"data", s_alpha_data, 0}, | |
5175 | #ifdef OBJ_ECOFF | |
5176 | {"sdata", s_alpha_sdata, 0}, | |
5177 | #endif | |
5178 | #ifdef OBJ_ELF | |
5179 | {"section", s_alpha_section, 0}, | |
5180 | {"section.s", s_alpha_section, 0}, | |
5181 | {"sect", s_alpha_section, 0}, | |
5182 | {"sect.s", s_alpha_section, 0}, | |
5183 | #endif | |
5184 | #ifdef OBJ_EVAX | |
198f1251 TG |
5185 | {"section", s_alpha_section, 0}, |
5186 | {"literals", s_alpha_literals, 0}, | |
5187 | {"pdesc", s_alpha_pdesc, 0}, | |
5188 | {"name", s_alpha_name, 0}, | |
5189 | {"linkage", s_alpha_linkage, 0}, | |
5190 | {"code_address", s_alpha_code_address, 0}, | |
5191 | {"ent", s_alpha_ent, 0}, | |
5192 | {"frame", s_alpha_frame, 0}, | |
5193 | {"fp_save", s_alpha_fp_save, 0}, | |
5194 | {"mask", s_alpha_mask, 0}, | |
5195 | {"fmask", s_alpha_fmask, 0}, | |
5196 | {"end", s_alpha_end, 0}, | |
5197 | {"file", s_alpha_file, 0}, | |
5198 | {"rdata", s_alpha_section, 1}, | |
5199 | {"comm", s_alpha_comm, 0}, | |
5200 | {"link", s_alpha_section, 3}, | |
5201 | {"ctors", s_alpha_section, 4}, | |
5202 | {"dtors", s_alpha_section, 5}, | |
5203 | {"handler", s_alpha_handler, 0}, | |
5204 | {"handler_data", s_alpha_handler, 1}, | |
252b5132 RH |
5205 | #endif |
5206 | #ifdef OBJ_ELF | |
5207 | /* Frame related pseudos. */ | |
5208 | {"ent", s_alpha_ent, 0}, | |
5209 | {"end", s_alpha_end, 0}, | |
5210 | {"mask", s_alpha_mask, 0}, | |
5211 | {"fmask", s_alpha_mask, 1}, | |
5212 | {"frame", s_alpha_frame, 0}, | |
5213 | {"prologue", s_alpha_prologue, 0}, | |
4dc7ead9 RH |
5214 | {"file", s_alpha_file, 5}, |
5215 | {"loc", s_alpha_loc, 9}, | |
a8316fe2 RH |
5216 | {"stabs", s_alpha_stab, 's'}, |
5217 | {"stabn", s_alpha_stab, 'n'}, | |
f4b97536 | 5218 | {"usepv", s_alpha_usepv, 0}, |
252b5132 RH |
5219 | /* COFF debugging related pseudos. */ |
5220 | {"begin", s_alpha_coff_wrapper, 0}, | |
5221 | {"bend", s_alpha_coff_wrapper, 1}, | |
5222 | {"def", s_alpha_coff_wrapper, 2}, | |
5223 | {"dim", s_alpha_coff_wrapper, 3}, | |
5224 | {"endef", s_alpha_coff_wrapper, 4}, | |
4dc7ead9 RH |
5225 | {"scl", s_alpha_coff_wrapper, 5}, |
5226 | {"tag", s_alpha_coff_wrapper, 6}, | |
5227 | {"val", s_alpha_coff_wrapper, 7}, | |
198f1251 TG |
5228 | #else |
5229 | #ifdef OBJ_EVAX | |
5230 | {"prologue", s_alpha_prologue, 0}, | |
252b5132 RH |
5231 | #else |
5232 | {"prologue", s_ignore, 0}, | |
198f1251 | 5233 | #endif |
252b5132 RH |
5234 | #endif |
5235 | {"gprel32", s_alpha_gprel32, 0}, | |
5236 | {"t_floating", s_alpha_float_cons, 'd'}, | |
5237 | {"s_floating", s_alpha_float_cons, 'f'}, | |
5238 | {"f_floating", s_alpha_float_cons, 'F'}, | |
5239 | {"g_floating", s_alpha_float_cons, 'G'}, | |
5240 | {"d_floating", s_alpha_float_cons, 'D'}, | |
5241 | ||
5242 | {"proc", s_alpha_proc, 0}, | |
5243 | {"aproc", s_alpha_proc, 1}, | |
5244 | {"set", s_alpha_set, 0}, | |
5245 | {"reguse", s_ignore, 0}, | |
5246 | {"livereg", s_ignore, 0}, | |
5247 | {"base", s_alpha_base, 0}, /*??*/ | |
5248 | {"option", s_ignore, 0}, | |
5249 | {"aent", s_ignore, 0}, | |
5250 | {"ugen", s_ignore, 0}, | |
5251 | {"eflag", s_ignore, 0}, | |
5252 | ||
5253 | {"align", s_alpha_align, 0}, | |
5254 | {"double", s_alpha_float_cons, 'd'}, | |
5255 | {"float", s_alpha_float_cons, 'f'}, | |
5256 | {"single", s_alpha_float_cons, 'f'}, | |
5257 | {"ascii", s_alpha_stringer, 0}, | |
5258 | {"asciz", s_alpha_stringer, 1}, | |
5259 | {"string", s_alpha_stringer, 1}, | |
5260 | {"space", s_alpha_space, 0}, | |
5261 | {"skip", s_alpha_space, 0}, | |
5262 | {"zero", s_alpha_space, 0}, | |
5263 | ||
5264 | /* Unaligned data pseudos. */ | |
5265 | {"uword", s_alpha_ucons, 2}, | |
5266 | {"ulong", s_alpha_ucons, 4}, | |
5267 | {"uquad", s_alpha_ucons, 8}, | |
5268 | ||
5269 | #ifdef OBJ_ELF | |
5270 | /* Dwarf wants these versions of unaligned. */ | |
5271 | {"2byte", s_alpha_ucons, 2}, | |
5272 | {"4byte", s_alpha_ucons, 4}, | |
5273 | {"8byte", s_alpha_ucons, 8}, | |
5274 | #endif | |
5275 | ||
5276 | /* We don't do any optimizing, so we can safely ignore these. */ | |
5277 | {"noalias", s_ignore, 0}, | |
5278 | {"alias", s_ignore, 0}, | |
5279 | ||
5280 | {"arch", s_alpha_arch, 0}, | |
5281 | ||
5282 | {NULL, 0, 0}, | |
5283 | }; | |
252b5132 | 5284 | \f |
ea1562b3 | 5285 | #ifdef OBJ_ECOFF |
252b5132 | 5286 | |
ea1562b3 NC |
5287 | /* @@@ GP selection voodoo. All of this seems overly complicated and |
5288 | unnecessary; which is the primary reason it's for ECOFF only. */ | |
ea1562b3 NC |
5289 | |
5290 | static inline void | |
5291 | maybe_set_gp (asection *sec) | |
252b5132 | 5292 | { |
ea1562b3 NC |
5293 | bfd_vma vma; |
5294 | ||
5295 | if (!sec) | |
5296 | return; | |
5297 | vma = bfd_get_section_vma (foo, sec); | |
5298 | if (vma && vma < alpha_gp_value) | |
5299 | alpha_gp_value = vma; | |
5300 | } | |
5301 | ||
5302 | static void | |
5303 | select_gp_value (void) | |
5304 | { | |
9c2799c2 | 5305 | gas_assert (alpha_gp_value == 0); |
ea1562b3 NC |
5306 | |
5307 | /* Get minus-one in whatever width... */ | |
5308 | alpha_gp_value = 0; | |
5309 | alpha_gp_value--; | |
5310 | ||
5311 | /* Select the smallest VMA of these existing sections. */ | |
5312 | maybe_set_gp (alpha_lita_section); | |
5313 | ||
5314 | /* @@ Will a simple 0x8000 work here? If not, why not? */ | |
5315 | #define GP_ADJUSTMENT (0x8000 - 0x10) | |
5316 | ||
5317 | alpha_gp_value += GP_ADJUSTMENT; | |
5318 | ||
5319 | S_SET_VALUE (alpha_gp_symbol, alpha_gp_value); | |
5320 | ||
5321 | #ifdef DEBUG1 | |
5322 | printf (_("Chose GP value of %lx\n"), alpha_gp_value); | |
5323 | #endif | |
5324 | } | |
5325 | #endif /* OBJ_ECOFF */ | |
5326 | ||
5327 | #ifdef OBJ_ELF | |
5328 | /* Map 's' to SHF_ALPHA_GPREL. */ | |
5329 | ||
01e1a5bc | 5330 | bfd_vma |
ea1562b3 NC |
5331 | alpha_elf_section_letter (int letter, char **ptr_msg) |
5332 | { | |
5333 | if (letter == 's') | |
5334 | return SHF_ALPHA_GPREL; | |
5335 | ||
8f3bae45 | 5336 | *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string"); |
ea1562b3 NC |
5337 | return -1; |
5338 | } | |
5339 | ||
5340 | /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ | |
5341 | ||
5342 | flagword | |
01e1a5bc | 5343 | alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED) |
ea1562b3 NC |
5344 | { |
5345 | if (attr & SHF_ALPHA_GPREL) | |
5346 | flags |= SEC_SMALL_DATA; | |
5347 | return flags; | |
5348 | } | |
5349 | #endif /* OBJ_ELF */ | |
5350 | ||
5351 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents | |
5352 | of an rs_align_code fragment. */ | |
5353 | ||
5354 | void | |
5355 | alpha_handle_align (fragS *fragp) | |
5356 | { | |
5357 | static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f }; | |
5358 | static char const nopunop[8] = | |
5359 | { | |
5360 | 0x1f, 0x04, 0xff, 0x47, | |
5361 | 0x00, 0x00, 0xfe, 0x2f | |
5362 | }; | |
5363 | ||
5364 | int bytes, fix; | |
5365 | char *p; | |
5366 | ||
5367 | if (fragp->fr_type != rs_align_code) | |
5368 | return; | |
5369 | ||
5370 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
5371 | p = fragp->fr_literal + fragp->fr_fix; | |
5372 | fix = 0; | |
5373 | ||
5374 | if (bytes & 3) | |
5375 | { | |
5376 | fix = bytes & 3; | |
5377 | memset (p, 0, fix); | |
5378 | p += fix; | |
5379 | bytes -= fix; | |
5380 | } | |
5381 | ||
5382 | if (bytes & 4) | |
5383 | { | |
5384 | memcpy (p, unop, 4); | |
5385 | p += 4; | |
5386 | bytes -= 4; | |
5387 | fix += 4; | |
5388 | } | |
5389 | ||
5390 | memcpy (p, nopunop, 8); | |
5391 | ||
5392 | fragp->fr_fix += fix; | |
5393 | fragp->fr_var = 8; | |
5394 | } | |
5395 | \f | |
5396 | /* Public interface functions. */ | |
5397 | ||
5398 | /* This function is called once, at assembler startup time. It sets | |
5399 | up all the tables, etc. that the MD part of the assembler will | |
5400 | need, that can be determined before arguments are parsed. */ | |
5401 | ||
5402 | void | |
5403 | md_begin (void) | |
5404 | { | |
5405 | unsigned int i; | |
5406 | ||
5407 | /* Verify that X_op field is wide enough. */ | |
5408 | { | |
5409 | expressionS e; | |
5410 | ||
5411 | e.X_op = O_max; | |
9c2799c2 | 5412 | gas_assert (e.X_op == O_max); |
ea1562b3 NC |
5413 | } |
5414 | ||
5415 | /* Create the opcode hash table. */ | |
5416 | alpha_opcode_hash = hash_new (); | |
5417 | ||
5418 | for (i = 0; i < alpha_num_opcodes;) | |
5419 | { | |
5420 | const char *name, *retval, *slash; | |
5421 | ||
5422 | name = alpha_opcodes[i].name; | |
5423 | retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]); | |
5424 | if (retval) | |
5425 | as_fatal (_("internal error: can't hash opcode `%s': %s"), | |
5426 | name, retval); | |
5427 | ||
5428 | /* Some opcodes include modifiers of various sorts with a "/mod" | |
5429 | syntax, like the architecture manual suggests. However, for | |
5430 | use with gcc at least, we also need access to those same opcodes | |
5431 | without the "/". */ | |
5432 | ||
5433 | if ((slash = strchr (name, '/')) != NULL) | |
5434 | { | |
21d799b5 | 5435 | char *p = (char *) xmalloc (strlen (name)); |
ea1562b3 NC |
5436 | |
5437 | memcpy (p, name, slash - name); | |
5438 | strcpy (p + (slash - name), slash + 1); | |
5439 | ||
5440 | (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]); | |
5441 | /* Ignore failures -- the opcode table does duplicate some | |
5442 | variants in different forms, like "hw_stq" and "hw_st/q". */ | |
5443 | } | |
5444 | ||
5445 | while (++i < alpha_num_opcodes | |
5446 | && (alpha_opcodes[i].name == name | |
5447 | || !strcmp (alpha_opcodes[i].name, name))) | |
5448 | continue; | |
5449 | } | |
5450 | ||
5451 | /* Create the macro hash table. */ | |
5452 | alpha_macro_hash = hash_new (); | |
5453 | ||
5454 | for (i = 0; i < alpha_num_macros;) | |
5455 | { | |
5456 | const char *name, *retval; | |
5457 | ||
5458 | name = alpha_macros[i].name; | |
5459 | retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]); | |
5460 | if (retval) | |
5461 | as_fatal (_("internal error: can't hash macro `%s': %s"), | |
5462 | name, retval); | |
5463 | ||
5464 | while (++i < alpha_num_macros | |
5465 | && (alpha_macros[i].name == name | |
5466 | || !strcmp (alpha_macros[i].name, name))) | |
5467 | continue; | |
5468 | } | |
5469 | ||
5470 | /* Construct symbols for each of the registers. */ | |
5471 | for (i = 0; i < 32; ++i) | |
5472 | { | |
5473 | char name[4]; | |
5474 | ||
5475 | sprintf (name, "$%d", i); | |
5476 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5477 | &zero_address_frag); | |
5478 | } | |
5479 | ||
5480 | for (; i < 64; ++i) | |
5481 | { | |
5482 | char name[5]; | |
5483 | ||
5484 | sprintf (name, "$f%d", i - 32); | |
5485 | alpha_register_table[i] = symbol_create (name, reg_section, i, | |
5486 | &zero_address_frag); | |
5487 | } | |
5488 | ||
5489 | /* Create the special symbols and sections we'll be using. */ | |
5490 | ||
5491 | /* So .sbss will get used for tiny objects. */ | |
5492 | bfd_set_gp_size (stdoutput, g_switch_value); | |
5493 | ||
5494 | #ifdef OBJ_ECOFF | |
5495 | create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol); | |
5496 | ||
5497 | /* For handling the GP, create a symbol that won't be output in the | |
5498 | symbol table. We'll edit it out of relocs later. */ | |
5499 | alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000, | |
5500 | &zero_address_frag); | |
5501 | #endif | |
5502 | ||
5503 | #ifdef OBJ_EVAX | |
5504 | create_literal_section (".link", &alpha_link_section, &alpha_link_symbol); | |
5505 | #endif | |
5506 | ||
5507 | #ifdef OBJ_ELF | |
5508 | if (ECOFF_DEBUGGING) | |
5509 | { | |
5510 | segT sec = subseg_new (".mdebug", (subsegT) 0); | |
5511 | bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); | |
5512 | bfd_set_section_alignment (stdoutput, sec, 3); | |
5513 | } | |
5514 | #endif | |
5515 | ||
5516 | /* Create literal lookup hash table. */ | |
5517 | alpha_literal_hash = hash_new (); | |
5518 | ||
5519 | subseg_set (text_section, 0); | |
5520 | } | |
5521 | ||
5522 | /* The public interface to the instruction assembler. */ | |
5523 | ||
5524 | void | |
5525 | md_assemble (char *str) | |
5526 | { | |
5527 | /* Current maximum is 13. */ | |
5528 | char opname[32]; | |
5529 | expressionS tok[MAX_INSN_ARGS]; | |
5530 | int ntok, trunclen; | |
5531 | size_t opnamelen; | |
5532 | ||
5533 | /* Split off the opcode. */ | |
5534 | opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819"); | |
5535 | trunclen = (opnamelen < sizeof (opname) - 1 | |
5536 | ? opnamelen | |
5537 | : sizeof (opname) - 1); | |
5538 | memcpy (opname, str, trunclen); | |
5539 | opname[trunclen] = '\0'; | |
5540 | ||
5541 | /* Tokenize the rest of the line. */ | |
5542 | if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0) | |
5543 | { | |
5544 | if (ntok != TOKENIZE_ERROR_REPORT) | |
5545 | as_bad (_("syntax error")); | |
5546 | ||
5547 | return; | |
5548 | } | |
5549 | ||
5550 | /* Finish it off. */ | |
5551 | assemble_tokens (opname, tok, ntok, alpha_macros_on); | |
5552 | } | |
5553 | ||
5554 | /* Round up a section's size to the appropriate boundary. */ | |
5555 | ||
5556 | valueT | |
5557 | md_section_align (segT seg, valueT size) | |
5558 | { | |
5559 | int align = bfd_get_section_alignment (stdoutput, seg); | |
5560 | valueT mask = ((valueT) 1 << align) - 1; | |
5561 | ||
5562 | return (size + mask) & ~mask; | |
5563 | } | |
5564 | ||
5565 | /* Turn a string in input_line_pointer into a floating point constant | |
5566 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
5567 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
5568 | returned, or NULL on OK. */ | |
5569 | ||
ea1562b3 NC |
5570 | char * |
5571 | md_atof (int type, char *litP, int *sizeP) | |
5572 | { | |
499ac353 | 5573 | extern char *vax_md_atof (int, char *, int *); |
ea1562b3 NC |
5574 | |
5575 | switch (type) | |
5576 | { | |
5577 | /* VAX floats. */ | |
5578 | case 'G': | |
499ac353 | 5579 | /* vax_md_atof() doesn't like "G" for some reason. */ |
ea1562b3 NC |
5580 | type = 'g'; |
5581 | case 'F': | |
5582 | case 'D': | |
5583 | return vax_md_atof (type, litP, sizeP); | |
5584 | ||
ea1562b3 | 5585 | default: |
499ac353 | 5586 | return ieee_md_atof (type, litP, sizeP, FALSE); |
ea1562b3 | 5587 | } |
ea1562b3 NC |
5588 | } |
5589 | ||
5590 | /* Take care of the target-specific command-line options. */ | |
5591 | ||
5592 | int | |
5593 | md_parse_option (int c, char *arg) | |
5594 | { | |
5595 | switch (c) | |
5596 | { | |
5597 | case 'F': | |
5598 | alpha_nofloats_on = 1; | |
5599 | break; | |
5600 | ||
5601 | case OPTION_32ADDR: | |
5602 | alpha_addr32_on = 1; | |
5603 | break; | |
5604 | ||
5605 | case 'g': | |
5606 | alpha_debug = 1; | |
5607 | break; | |
5608 | ||
5609 | case 'G': | |
5610 | g_switch_value = atoi (arg); | |
5611 | break; | |
5612 | ||
5613 | case 'm': | |
5614 | { | |
5615 | const struct cpu_type *p; | |
5616 | ||
5617 | for (p = cpu_types; p->name; ++p) | |
5618 | if (strcmp (arg, p->name) == 0) | |
5619 | { | |
5620 | alpha_target_name = p->name, alpha_target = p->flags; | |
5621 | goto found; | |
5622 | } | |
5623 | as_warn (_("Unknown CPU identifier `%s'"), arg); | |
5624 | found:; | |
5625 | } | |
5626 | break; | |
5627 | ||
5628 | #ifdef OBJ_EVAX | |
5629 | case '+': /* For g++. Hash any name > 63 chars long. */ | |
5630 | alpha_flag_hash_long_names = 1; | |
5631 | break; | |
5632 | ||
5633 | case 'H': /* Show new symbol after hash truncation. */ | |
5634 | alpha_flag_show_after_trunc = 1; | |
5635 | break; | |
5636 | ||
5637 | case 'h': /* For gnu-c/vax compatibility. */ | |
5638 | break; | |
198f1251 TG |
5639 | |
5640 | case OPTION_REPLACE: | |
5641 | alpha_flag_replace = 1; | |
5642 | break; | |
5643 | ||
5644 | case OPTION_NOREPLACE: | |
5645 | alpha_flag_replace = 0; | |
5646 | break; | |
ea1562b3 NC |
5647 | #endif |
5648 | ||
5649 | case OPTION_RELAX: | |
5650 | alpha_flag_relax = 1; | |
5651 | break; | |
5652 | ||
5653 | #ifdef OBJ_ELF | |
5654 | case OPTION_MDEBUG: | |
5655 | alpha_flag_mdebug = 1; | |
5656 | break; | |
5657 | case OPTION_NO_MDEBUG: | |
5658 | alpha_flag_mdebug = 0; | |
5659 | break; | |
5660 | #endif | |
5661 | ||
5662 | default: | |
5663 | return 0; | |
5664 | } | |
5665 | ||
5666 | return 1; | |
5667 | } | |
5668 | ||
5669 | /* Print a description of the command-line options that we accept. */ | |
5670 | ||
5671 | void | |
5672 | md_show_usage (FILE *stream) | |
5673 | { | |
5674 | fputs (_("\ | |
5675 | Alpha options:\n\ | |
5676 | -32addr treat addresses as 32-bit values\n\ | |
5677 | -F lack floating point instructions support\n\ | |
5678 | -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ | |
5679 | specify variant of Alpha architecture\n\ | |
5680 | -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ | |
5681 | these variants include PALcode opcodes\n"), | |
5682 | stream); | |
5683 | #ifdef OBJ_EVAX | |
5684 | fputs (_("\ | |
5685 | VMS options:\n\ | |
198f1251 TG |
5686 | -+ encode (don't truncate) names longer than 64 characters\n\ |
5687 | -H show new symbol after hash truncation\n\ | |
5688 | -replace/-noreplace enable or disable the optimization of procedure calls\n"), | |
ea1562b3 NC |
5689 | stream); |
5690 | #endif | |
5691 | } | |
5692 | ||
5693 | /* Decide from what point a pc-relative relocation is relative to, | |
5694 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
5695 | ||
5696 | long | |
5697 | md_pcrel_from (fixS *fixP) | |
5698 | { | |
5699 | valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; | |
5700 | ||
5701 | switch (fixP->fx_r_type) | |
5702 | { | |
5703 | case BFD_RELOC_23_PCREL_S2: | |
5704 | case BFD_RELOC_ALPHA_HINT: | |
5705 | case BFD_RELOC_ALPHA_BRSGP: | |
5706 | return addr + 4; | |
5707 | default: | |
5708 | return addr; | |
5709 | } | |
5710 | } | |
5711 | ||
5712 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
5713 | ignored; perhaps it was once meaningful, but now it is historical. | |
5714 | To indicate that a fixup has been eliminated, set fixP->fx_done. | |
5715 | ||
5716 | For ELF, here it is that we transform the GPDISP_HI16 reloc we used | |
5717 | internally into the GPDISP reloc used externally. We had to do | |
5718 | this so that we'd have the GPDISP_LO16 reloc as a tag to compute | |
5719 | the distance to the "lda" instruction for setting the addend to | |
5720 | GPDISP. */ | |
5721 | ||
5722 | void | |
55cf6793 | 5723 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
ea1562b3 NC |
5724 | { |
5725 | char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; | |
5726 | valueT value = * valP; | |
5727 | unsigned image, size; | |
5728 | ||
5729 | switch (fixP->fx_r_type) | |
5730 | { | |
5731 | /* The GPDISP relocations are processed internally with a symbol | |
5732 | referring to the current function's section; we need to drop | |
5733 | in a value which, when added to the address of the start of | |
5734 | the function, gives the desired GP. */ | |
5735 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
5736 | { | |
5737 | fixS *next = fixP->fx_next; | |
5738 | ||
5739 | /* With user-specified !gpdisp relocations, we can be missing | |
5740 | the matching LO16 reloc. We will have already issued an | |
5741 | error message. */ | |
5742 | if (next) | |
5743 | fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where | |
5744 | - fixP->fx_frag->fr_address - fixP->fx_where); | |
5745 | ||
5746 | value = (value - sign_extend_16 (value)) >> 16; | |
5747 | } | |
5748 | #ifdef OBJ_ELF | |
5749 | fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP; | |
5750 | #endif | |
5751 | goto do_reloc_gp; | |
5752 | ||
5753 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
5754 | value = sign_extend_16 (value); | |
5755 | fixP->fx_offset = 0; | |
5756 | #ifdef OBJ_ELF | |
5757 | fixP->fx_done = 1; | |
5758 | #endif | |
5759 | ||
5760 | do_reloc_gp: | |
5761 | fixP->fx_addsy = section_symbol (seg); | |
5762 | md_number_to_chars (fixpos, value, 2); | |
5763 | break; | |
5764 | ||
5765 | case BFD_RELOC_16: | |
5766 | if (fixP->fx_pcrel) | |
5767 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
5768 | size = 2; | |
5769 | goto do_reloc_xx; | |
5770 | ||
5771 | case BFD_RELOC_32: | |
5772 | if (fixP->fx_pcrel) | |
5773 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
5774 | size = 4; | |
5775 | goto do_reloc_xx; | |
5776 | ||
5777 | case BFD_RELOC_64: | |
5778 | if (fixP->fx_pcrel) | |
5779 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
5780 | size = 8; | |
5781 | ||
5782 | do_reloc_xx: | |
5783 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5784 | { | |
5785 | md_number_to_chars (fixpos, value, size); | |
5786 | goto done; | |
5787 | } | |
5788 | return; | |
5789 | ||
5790 | #ifdef OBJ_ECOFF | |
5791 | case BFD_RELOC_GPREL32: | |
9c2799c2 | 5792 | gas_assert (fixP->fx_subsy == alpha_gp_symbol); |
ea1562b3 NC |
5793 | fixP->fx_subsy = 0; |
5794 | /* FIXME: inherited this obliviousness of `value' -- why? */ | |
5795 | md_number_to_chars (fixpos, -alpha_gp_value, 4); | |
5796 | break; | |
5797 | #else | |
5798 | case BFD_RELOC_GPREL32: | |
5799 | #endif | |
5800 | case BFD_RELOC_GPREL16: | |
5801 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
5802 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
5803 | return; | |
5804 | ||
5805 | case BFD_RELOC_23_PCREL_S2: | |
5806 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5807 | { | |
5808 | image = bfd_getl32 (fixpos); | |
5809 | image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF); | |
5810 | goto write_done; | |
5811 | } | |
5812 | return; | |
5813 | ||
5814 | case BFD_RELOC_ALPHA_HINT: | |
5815 | if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) | |
5816 | { | |
5817 | image = bfd_getl32 (fixpos); | |
5818 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5819 | goto write_done; | |
5820 | } | |
5821 | return; | |
5822 | ||
5823 | #ifdef OBJ_ELF | |
5824 | case BFD_RELOC_ALPHA_BRSGP: | |
5825 | return; | |
5826 | ||
5827 | case BFD_RELOC_ALPHA_TLSGD: | |
5828 | case BFD_RELOC_ALPHA_TLSLDM: | |
5829 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
5830 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
5831 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
5832 | case BFD_RELOC_ALPHA_DTPREL16: | |
5833 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
5834 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
5835 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
5836 | case BFD_RELOC_ALPHA_TPREL16: | |
5837 | if (fixP->fx_addsy) | |
5838 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
5839 | return; | |
5840 | #endif | |
5841 | ||
5842 | #ifdef OBJ_ECOFF | |
5843 | case BFD_RELOC_ALPHA_LITERAL: | |
5844 | md_number_to_chars (fixpos, value, 2); | |
5845 | return; | |
5846 | #endif | |
5847 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
5848 | case BFD_RELOC_ALPHA_LITUSE: | |
5849 | case BFD_RELOC_ALPHA_LINKAGE: | |
5850 | case BFD_RELOC_ALPHA_CODEADDR: | |
5851 | return; | |
5852 | ||
198f1251 TG |
5853 | #ifdef OBJ_EVAX |
5854 | case BFD_RELOC_ALPHA_NOP: | |
5855 | value -= (8 + 4); /* PC-relative, base is jsr+4. */ | |
5856 | ||
5857 | /* From B.4.5.2 of the OpenVMS Linker Utility Manual: | |
5858 | "Finally, the ETIR$C_STC_BSR command passes the same address | |
5859 | as ETIR$C_STC_NOP (so that they will fail or succeed together), | |
5860 | and the same test is done again." */ | |
5861 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5862 | { | |
5863 | fixP->fx_addnumber = -value; | |
5864 | return; | |
5865 | } | |
5866 | ||
5867 | if ((abs (value) >> 2) & ~0xfffff) | |
5868 | goto done; | |
5869 | else | |
5870 | { | |
5871 | /* Change to a nop. */ | |
5872 | image = 0x47FF041F; | |
5873 | goto write_done; | |
5874 | } | |
5875 | ||
5876 | case BFD_RELOC_ALPHA_LDA: | |
5877 | /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute | |
5878 | the value for an O_subtract. */ | |
5879 | if (fixP->fx_addsy | |
5880 | && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5881 | { | |
5882 | fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value; | |
5883 | return; | |
5884 | } | |
5885 | ||
5886 | if ((abs (value)) & ~0x7fff) | |
5887 | goto done; | |
5888 | else | |
5889 | { | |
5890 | /* Change to an lda. */ | |
5891 | image = 0x237B0000 | (value & 0xFFFF); | |
5892 | goto write_done; | |
5893 | } | |
5894 | ||
5895 | case BFD_RELOC_ALPHA_BSR: | |
5896 | case BFD_RELOC_ALPHA_BOH: | |
5897 | value -= 4; /* PC-relative, base is jsr+4. */ | |
5898 | ||
5899 | /* See comment in the BFD_RELOC_ALPHA_NOP case above. */ | |
5900 | if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) | |
5901 | { | |
5902 | fixP->fx_addnumber = -value; | |
5903 | return; | |
5904 | } | |
5905 | ||
5906 | if ((abs (value) >> 2) & ~0xfffff) | |
5907 | { | |
5908 | /* Out of range. */ | |
5909 | if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH) | |
5910 | { | |
5911 | /* Add a hint. */ | |
5912 | image = bfd_getl32(fixpos); | |
5913 | image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); | |
5914 | goto write_done; | |
5915 | } | |
5916 | goto done; | |
5917 | } | |
5918 | else | |
5919 | { | |
5920 | /* Change to a branch. */ | |
5921 | image = 0xD3400000 | ((value >> 2) & 0x1FFFFF); | |
5922 | goto write_done; | |
5923 | } | |
5924 | #endif | |
5925 | ||
ea1562b3 NC |
5926 | case BFD_RELOC_VTABLE_INHERIT: |
5927 | case BFD_RELOC_VTABLE_ENTRY: | |
5928 | return; | |
5929 | ||
5930 | default: | |
5931 | { | |
5932 | const struct alpha_operand *operand; | |
5933 | ||
5934 | if ((int) fixP->fx_r_type >= 0) | |
5935 | as_fatal (_("unhandled relocation type %s"), | |
5936 | bfd_get_reloc_code_name (fixP->fx_r_type)); | |
5937 | ||
9c2799c2 | 5938 | gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands); |
ea1562b3 NC |
5939 | operand = &alpha_operands[-(int) fixP->fx_r_type]; |
5940 | ||
5941 | /* The rest of these fixups only exist internally during symbol | |
5942 | resolution and have no representation in the object file. | |
5943 | Therefore they must be completely resolved as constants. */ | |
5944 | ||
5945 | if (fixP->fx_addsy != 0 | |
5946 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section) | |
5947 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
5948 | _("non-absolute expression in constant field")); | |
5949 | ||
5950 | image = bfd_getl32 (fixpos); | |
5951 | image = insert_operand (image, operand, (offsetT) value, | |
5952 | fixP->fx_file, fixP->fx_line); | |
5953 | } | |
5954 | goto write_done; | |
5955 | } | |
5956 | ||
5957 | if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0) | |
5958 | return; | |
5959 | else | |
5960 | { | |
5961 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
5962 | _("type %d reloc done?\n"), (int) fixP->fx_r_type); | |
5963 | goto done; | |
5964 | } | |
5965 | ||
5966 | write_done: | |
5967 | md_number_to_chars (fixpos, image, 4); | |
5968 | ||
5969 | done: | |
5970 | fixP->fx_done = 1; | |
5971 | } | |
5972 | ||
5973 | /* Look for a register name in the given symbol. */ | |
5974 | ||
5975 | symbolS * | |
5976 | md_undefined_symbol (char *name) | |
5977 | { | |
5978 | if (*name == '$') | |
5979 | { | |
5980 | int is_float = 0, num; | |
5981 | ||
5982 | switch (*++name) | |
5983 | { | |
5984 | case 'f': | |
5985 | if (name[1] == 'p' && name[2] == '\0') | |
5986 | return alpha_register_table[AXP_REG_FP]; | |
5987 | is_float = 32; | |
5988 | /* Fall through. */ | |
5989 | ||
5990 | case 'r': | |
5991 | if (!ISDIGIT (*++name)) | |
5992 | break; | |
5993 | /* Fall through. */ | |
5994 | ||
5995 | case '0': case '1': case '2': case '3': case '4': | |
5996 | case '5': case '6': case '7': case '8': case '9': | |
5997 | if (name[1] == '\0') | |
5998 | num = name[0] - '0'; | |
5999 | else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0') | |
6000 | { | |
6001 | num = (name[0] - '0') * 10 + name[1] - '0'; | |
6002 | if (num >= 32) | |
6003 | break; | |
6004 | } | |
6005 | else | |
6006 | break; | |
6007 | ||
6008 | if (!alpha_noat_on && (num + is_float) == AXP_REG_AT) | |
6009 | as_warn (_("Used $at without \".set noat\"")); | |
6010 | return alpha_register_table[num + is_float]; | |
6011 | ||
6012 | case 'a': | |
6013 | if (name[1] == 't' && name[2] == '\0') | |
6014 | { | |
6015 | if (!alpha_noat_on) | |
6016 | as_warn (_("Used $at without \".set noat\"")); | |
6017 | return alpha_register_table[AXP_REG_AT]; | |
6018 | } | |
6019 | break; | |
6020 | ||
6021 | case 'g': | |
6022 | if (name[1] == 'p' && name[2] == '\0') | |
6023 | return alpha_register_table[alpha_gp_register]; | |
6024 | break; | |
6025 | ||
6026 | case 's': | |
6027 | if (name[1] == 'p' && name[2] == '\0') | |
6028 | return alpha_register_table[AXP_REG_SP]; | |
6029 | break; | |
6030 | } | |
6031 | } | |
6032 | return NULL; | |
6033 | } | |
6034 | ||
6035 | #ifdef OBJ_ECOFF | |
6036 | /* @@@ Magic ECOFF bits. */ | |
6037 | ||
6038 | void | |
6039 | alpha_frob_ecoff_data (void) | |
6040 | { | |
6041 | select_gp_value (); | |
6042 | /* $zero and $f31 are read-only. */ | |
6043 | alpha_gprmask &= ~1; | |
6044 | alpha_fprmask &= ~1; | |
6045 | } | |
6046 | #endif | |
6047 | ||
6048 | /* Hook to remember a recently defined label so that the auto-align | |
6049 | code can adjust the symbol after we know what alignment will be | |
6050 | required. */ | |
6051 | ||
6052 | void | |
6053 | alpha_define_label (symbolS *sym) | |
6054 | { | |
6055 | alpha_insn_label = sym; | |
07a53e5c RH |
6056 | #ifdef OBJ_ELF |
6057 | dwarf2_emit_label (sym); | |
6058 | #endif | |
ea1562b3 NC |
6059 | } |
6060 | ||
6061 | /* Return true if we must always emit a reloc for a type and false if | |
6062 | there is some hope of resolving it at assembly time. */ | |
6063 | ||
6064 | int | |
6065 | alpha_force_relocation (fixS *f) | |
6066 | { | |
6067 | if (alpha_flag_relax) | |
6068 | return 1; | |
6069 | ||
6070 | switch (f->fx_r_type) | |
6071 | { | |
6072 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6073 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6074 | case BFD_RELOC_ALPHA_GPDISP: | |
6075 | case BFD_RELOC_ALPHA_LITERAL: | |
6076 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6077 | case BFD_RELOC_ALPHA_LITUSE: | |
6078 | case BFD_RELOC_GPREL16: | |
6079 | case BFD_RELOC_GPREL32: | |
6080 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6081 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6082 | case BFD_RELOC_ALPHA_LINKAGE: | |
6083 | case BFD_RELOC_ALPHA_CODEADDR: | |
6084 | case BFD_RELOC_ALPHA_BRSGP: | |
6085 | case BFD_RELOC_ALPHA_TLSGD: | |
6086 | case BFD_RELOC_ALPHA_TLSLDM: | |
6087 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6088 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6089 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6090 | case BFD_RELOC_ALPHA_DTPREL16: | |
6091 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6092 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6093 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6094 | case BFD_RELOC_ALPHA_TPREL16: | |
198f1251 TG |
6095 | #ifdef OBJ_EVAX |
6096 | case BFD_RELOC_ALPHA_NOP: | |
6097 | case BFD_RELOC_ALPHA_BSR: | |
6098 | case BFD_RELOC_ALPHA_LDA: | |
6099 | case BFD_RELOC_ALPHA_BOH: | |
6100 | #endif | |
ea1562b3 | 6101 | return 1; |
252b5132 | 6102 | |
ea1562b3 NC |
6103 | default: |
6104 | break; | |
6105 | } | |
252b5132 | 6106 | |
ea1562b3 | 6107 | return generic_force_reloc (f); |
252b5132 RH |
6108 | } |
6109 | ||
ea1562b3 | 6110 | /* Return true if we can partially resolve a relocation now. */ |
252b5132 | 6111 | |
ea1562b3 NC |
6112 | int |
6113 | alpha_fix_adjustable (fixS *f) | |
252b5132 | 6114 | { |
ea1562b3 NC |
6115 | /* Are there any relocation types for which we must generate a |
6116 | reloc but we can adjust the values contained within it? */ | |
6117 | switch (f->fx_r_type) | |
6118 | { | |
6119 | case BFD_RELOC_ALPHA_GPDISP_HI16: | |
6120 | case BFD_RELOC_ALPHA_GPDISP_LO16: | |
6121 | case BFD_RELOC_ALPHA_GPDISP: | |
6122 | return 0; | |
252b5132 | 6123 | |
ea1562b3 NC |
6124 | case BFD_RELOC_ALPHA_LITERAL: |
6125 | case BFD_RELOC_ALPHA_ELF_LITERAL: | |
6126 | case BFD_RELOC_ALPHA_LITUSE: | |
6127 | case BFD_RELOC_ALPHA_LINKAGE: | |
6128 | case BFD_RELOC_ALPHA_CODEADDR: | |
6129 | return 1; | |
252b5132 | 6130 | |
ea1562b3 NC |
6131 | case BFD_RELOC_VTABLE_ENTRY: |
6132 | case BFD_RELOC_VTABLE_INHERIT: | |
6133 | return 0; | |
252b5132 | 6134 | |
ea1562b3 NC |
6135 | case BFD_RELOC_GPREL16: |
6136 | case BFD_RELOC_GPREL32: | |
6137 | case BFD_RELOC_ALPHA_GPREL_HI16: | |
6138 | case BFD_RELOC_ALPHA_GPREL_LO16: | |
6139 | case BFD_RELOC_23_PCREL_S2: | |
198f1251 | 6140 | case BFD_RELOC_16: |
ea1562b3 NC |
6141 | case BFD_RELOC_32: |
6142 | case BFD_RELOC_64: | |
6143 | case BFD_RELOC_ALPHA_HINT: | |
6144 | return 1; | |
252b5132 | 6145 | |
ea1562b3 NC |
6146 | case BFD_RELOC_ALPHA_TLSGD: |
6147 | case BFD_RELOC_ALPHA_TLSLDM: | |
6148 | case BFD_RELOC_ALPHA_GOTDTPREL16: | |
6149 | case BFD_RELOC_ALPHA_DTPREL_HI16: | |
6150 | case BFD_RELOC_ALPHA_DTPREL_LO16: | |
6151 | case BFD_RELOC_ALPHA_DTPREL16: | |
6152 | case BFD_RELOC_ALPHA_GOTTPREL16: | |
6153 | case BFD_RELOC_ALPHA_TPREL_HI16: | |
6154 | case BFD_RELOC_ALPHA_TPREL_LO16: | |
6155 | case BFD_RELOC_ALPHA_TPREL16: | |
6156 | /* ??? No idea why we can't return a reference to .tbss+10, but | |
6157 | we're preventing this in the other assemblers. Follow for now. */ | |
6158 | return 0; | |
252b5132 | 6159 | |
ea1562b3 NC |
6160 | #ifdef OBJ_ELF |
6161 | case BFD_RELOC_ALPHA_BRSGP: | |
6162 | /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and | |
6163 | let it get resolved at assembly time. */ | |
6164 | { | |
6165 | symbolS *sym = f->fx_addsy; | |
6166 | const char *name; | |
6167 | int offset = 0; | |
252b5132 | 6168 | |
ea1562b3 NC |
6169 | if (generic_force_reloc (f)) |
6170 | return 0; | |
252b5132 | 6171 | |
ea1562b3 NC |
6172 | switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD) |
6173 | { | |
6174 | case STO_ALPHA_NOPV: | |
6175 | break; | |
6176 | case STO_ALPHA_STD_GPLOAD: | |
6177 | offset = 8; | |
6178 | break; | |
6179 | default: | |
6180 | if (S_IS_LOCAL (sym)) | |
6181 | name = "<local>"; | |
6182 | else | |
6183 | name = S_GET_NAME (sym); | |
6184 | as_bad_where (f->fx_file, f->fx_line, | |
6185 | _("!samegp reloc against symbol without .prologue: %s"), | |
6186 | name); | |
6187 | break; | |
6188 | } | |
6189 | f->fx_r_type = BFD_RELOC_23_PCREL_S2; | |
6190 | f->fx_offset += offset; | |
6191 | return 1; | |
6192 | } | |
252b5132 | 6193 | #endif |
198f1251 TG |
6194 | #ifdef OBJ_EVAX |
6195 | case BFD_RELOC_ALPHA_NOP: | |
6196 | case BFD_RELOC_ALPHA_BSR: | |
6197 | case BFD_RELOC_ALPHA_LDA: | |
6198 | case BFD_RELOC_ALPHA_BOH: | |
6199 | return 1; | |
6200 | #endif | |
d61a78a7 | 6201 | |
ea1562b3 NC |
6202 | default: |
6203 | return 1; | |
6204 | } | |
d61a78a7 RH |
6205 | } |
6206 | ||
ea1562b3 NC |
6207 | /* Generate the BFD reloc to be stuck in the object file from the |
6208 | fixup used internally in the assembler. */ | |
d61a78a7 | 6209 | |
ea1562b3 NC |
6210 | arelent * |
6211 | tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, | |
6212 | fixS *fixp) | |
d61a78a7 | 6213 | { |
ea1562b3 | 6214 | arelent *reloc; |
d61a78a7 | 6215 | |
21d799b5 NC |
6216 | reloc = (arelent *) xmalloc (sizeof (* reloc)); |
6217 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
ea1562b3 NC |
6218 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
6219 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
252b5132 | 6220 | |
ea1562b3 NC |
6221 | /* Make sure none of our internal relocations make it this far. |
6222 | They'd better have been fully resolved by this point. */ | |
9c2799c2 | 6223 | gas_assert ((int) fixp->fx_r_type > 0); |
252b5132 | 6224 | |
ea1562b3 NC |
6225 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
6226 | if (reloc->howto == NULL) | |
252b5132 | 6227 | { |
ea1562b3 NC |
6228 | as_bad_where (fixp->fx_file, fixp->fx_line, |
6229 | _("cannot represent `%s' relocation in object file"), | |
6230 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
6231 | return NULL; | |
252b5132 | 6232 | } |
252b5132 | 6233 | |
ea1562b3 NC |
6234 | if (!fixp->fx_pcrel != !reloc->howto->pc_relative) |
6235 | as_fatal (_("internal error? cannot generate `%s' relocation"), | |
6236 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
252b5132 | 6237 | |
9c2799c2 | 6238 | gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); |
ea1562b3 | 6239 | |
bc1bc43f RH |
6240 | reloc->addend = fixp->fx_offset; |
6241 | ||
ea1562b3 | 6242 | #ifdef OBJ_ECOFF |
bc1bc43f RH |
6243 | /* Fake out bfd_perform_relocation. sigh. */ |
6244 | /* ??? Better would be to use the special_function hook. */ | |
ea1562b3 | 6245 | if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL) |
ea1562b3 | 6246 | reloc->addend = -alpha_gp_value; |
ea1562b3 | 6247 | #endif |
252b5132 | 6248 | |
198f1251 TG |
6249 | #ifdef OBJ_EVAX |
6250 | switch (fixp->fx_r_type) | |
6251 | { | |
6252 | struct evax_private_udata_struct *udata; | |
6253 | const char *pname; | |
6254 | int pname_len; | |
6255 | ||
6256 | case BFD_RELOC_ALPHA_LINKAGE: | |
51794af8 | 6257 | /* Copy the linkage index. */ |
198f1251 TG |
6258 | reloc->addend = fixp->fx_addnumber; |
6259 | break; | |
6260 | ||
6261 | case BFD_RELOC_ALPHA_NOP: | |
6262 | case BFD_RELOC_ALPHA_BSR: | |
6263 | case BFD_RELOC_ALPHA_LDA: | |
6264 | case BFD_RELOC_ALPHA_BOH: | |
6265 | pname = symbol_get_bfdsym (fixp->fx_addsy)->name; | |
6266 | ||
6267 | /* We need the non-suffixed name of the procedure. Beware that | |
6268 | the main symbol might be equated so look it up and take its name. */ | |
6269 | pname_len = strlen (pname); | |
6270 | if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0) | |
6271 | { | |
6272 | symbolS *sym; | |
e1f4d6bd TG |
6273 | char *my_pname = (char *) alloca (pname_len - 4 + 1); |
6274 | ||
6275 | memcpy (my_pname, pname, pname_len - 4); | |
198f1251 TG |
6276 | my_pname [pname_len - 4] = 0; |
6277 | sym = symbol_find (my_pname); | |
6278 | if (sym == NULL) | |
6279 | abort (); | |
e1f4d6bd | 6280 | |
198f1251 TG |
6281 | while (symbol_equated_reloc_p (sym)) |
6282 | { | |
6283 | symbolS *n = symbol_get_value_expression (sym)->X_add_symbol; | |
6284 | ||
6285 | /* We must avoid looping, as that can occur with a badly | |
6286 | written program. */ | |
6287 | if (n == sym) | |
6288 | break; | |
6289 | sym = n; | |
6290 | } | |
6291 | pname = symbol_get_bfdsym (sym)->name; | |
6292 | } | |
6293 | ||
6294 | udata = (struct evax_private_udata_struct *) | |
6295 | xmalloc (sizeof (struct evax_private_udata_struct)); | |
6296 | udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy); | |
6297 | udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym); | |
6298 | udata->origname = (char *)pname; | |
6299 | udata->lkindex = ((struct evax_private_udata_struct *) | |
6300 | symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex; | |
6301 | reloc->sym_ptr_ptr = (void *)udata; | |
6302 | reloc->addend = fixp->fx_addnumber; | |
6303 | ||
6304 | default: | |
6305 | break; | |
6306 | } | |
6307 | #endif | |
6308 | ||
ea1562b3 | 6309 | return reloc; |
252b5132 RH |
6310 | } |
6311 | ||
ea1562b3 NC |
6312 | /* Parse a register name off of the input_line and return a register |
6313 | number. Gets md_undefined_symbol above to do the register name | |
6314 | matching for us. | |
0a9ef439 | 6315 | |
ea1562b3 | 6316 | Only called as a part of processing the ECOFF .frame directive. */ |
0a9ef439 | 6317 | |
ea1562b3 NC |
6318 | int |
6319 | tc_get_register (int frame ATTRIBUTE_UNUSED) | |
6320 | { | |
6321 | int framereg = AXP_REG_SP; | |
0a9ef439 | 6322 | |
ea1562b3 NC |
6323 | SKIP_WHITESPACE (); |
6324 | if (*input_line_pointer == '$') | |
0a9ef439 | 6325 | { |
ea1562b3 NC |
6326 | char *s = input_line_pointer; |
6327 | char c = get_symbol_end (); | |
6328 | symbolS *sym = md_undefined_symbol (s); | |
0a9ef439 | 6329 | |
ea1562b3 NC |
6330 | *strchr (s, '\0') = c; |
6331 | if (sym && (framereg = S_GET_VALUE (sym)) <= 31) | |
6332 | goto found; | |
0a9ef439 | 6333 | } |
ea1562b3 | 6334 | as_warn (_("frame reg expected, using $%d."), framereg); |
0a9ef439 | 6335 | |
ea1562b3 NC |
6336 | found: |
6337 | note_gpreg (framereg); | |
6338 | return framereg; | |
6339 | } | |
0a9ef439 | 6340 | |
ea1562b3 NC |
6341 | /* This is called before the symbol table is processed. In order to |
6342 | work with gcc when using mips-tfile, we must keep all local labels. | |
6343 | However, in other cases, we want to discard them. If we were | |
6344 | called with -g, but we didn't see any debugging information, it may | |
6345 | mean that gcc is smuggling debugging information through to | |
6346 | mips-tfile, in which case we must generate all local labels. */ | |
6347 | ||
6348 | #ifdef OBJ_ECOFF | |
6349 | ||
6350 | void | |
6351 | alpha_frob_file_before_adjust (void) | |
6352 | { | |
6353 | if (alpha_debug != 0 | |
6354 | && ! ecoff_debugging_seen) | |
6355 | flag_keep_locals = 1; | |
0a9ef439 RH |
6356 | } |
6357 | ||
ea1562b3 NC |
6358 | #endif /* OBJ_ECOFF */ |
6359 | ||
252b5132 RH |
6360 | /* The Alpha has support for some VAX floating point types, as well as for |
6361 | IEEE floating point. We consider IEEE to be the primary floating point | |
6362 | format, and sneak in the VAX floating point support here. */ | |
252b5132 | 6363 | #include "config/atof-vax.c" |