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* app.c (input_buffer): New static variable.
[deliverable/binutils-gdb.git] / gas / config / tc-alpha.c
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252b5132
RH		 1/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
8
9 This file is part of GAS, the GNU Assembler.
10
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
24 02111-1307, USA. */
25
26/*
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
30 *
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
36 *
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 *
41 * Carnegie Mellon requests users of this software to return to
42 *
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
47 *
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
50 */
51
52#include "as.h"
53#include "subsegs.h"
54#include "ecoff.h"
55
56#include "opcode/alpha.h"
57
58#ifdef OBJ_ELF
59#include "elf/alpha.h"
60#endif
61
62#include <ctype.h>
63
64\f
65/* Local types */
66
67#define MAX_INSN_FIXUPS 2
68#define MAX_INSN_ARGS 5
69
70struct alpha_fixup
71{
72 expressionS exp;
73 bfd_reloc_code_real_type reloc;
74};
75
76struct alpha_insn
77{
78 unsigned insn;
79 int nfixups;
80 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
81};
82
83enum alpha_macro_arg
84{
85 MACRO_EOA = 1, MACRO_IR, MACRO_PIR, MACRO_CPIR, MACRO_FPR, MACRO_EXP
86};
87
88struct alpha_macro
89{
90 const char *name;
91 void (*emit) PARAMS ((const expressionS *, int, const PTR));
92 const PTR arg;
93 enum alpha_macro_arg argsets[16];
94};
95
96/* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
98
99#define O_pregister (O_max+1) /* O_register, but in parentheses */
100#define O_cpregister (O_pregister+1) /* + a leading comma */
101
102/* Macros for extracting the type and number of encoded register tokens */
103
104#define is_ir_num(x) (((x) & 32) == 0)
105#define is_fpr_num(x) (((x) & 32) != 0)
106#define regno(x) ((x) & 31)
107
108/* Something odd inherited from the old assembler */
109
110#define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111#define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
112
113/* Predicates for 16- and 32-bit ranges */
114/* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
116
117#if 1
118#define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120#define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
122#else
123#define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125#define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
127#endif
128
129/* Macros for sign extending from 16- and 32-bits. */
130/* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
132
133#if 1
134#define sign_extend_16(x) ((short)(x))
135#define sign_extend_32(x) ((int)(x))
136#else
137#define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138#define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
140#endif
141
142/* Macros to build tokens */
143
144#define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147#define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150#define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153#define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156#define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160#define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
163
164\f
165/* Prototypes for all local functions */
166
167static int tokenize_arguments PARAMS ((char *, expressionS *, int));
168static const struct alpha_opcode *find_opcode_match
169 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
170static const struct alpha_macro *find_macro_match
171 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
172static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
174static void assemble_insn
175 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
176 struct alpha_insn *));
177static void emit_insn PARAMS ((struct alpha_insn *));
178static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
180static void assemble_tokens
181 PARAMS ((const char *, const expressionS *, int, int));
182
183static int load_expression
184 PARAMS ((int, const expressionS *, int *, expressionS *));
185
186static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
187static void emit_division PARAMS ((const expressionS *, int, const PTR));
188static void emit_lda PARAMS ((const expressionS *, int, const PTR));
189static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
190static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
191static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
192static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
193static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
194static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
195static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
196static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
197static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
198static void emit_stX PARAMS ((const expressionS *, int, const PTR));
199static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
200static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
201static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
202
203static void s_alpha_text PARAMS ((int));
204static void s_alpha_data PARAMS ((int));
205#ifndef OBJ_ELF
206static void s_alpha_comm PARAMS ((int));
207static void s_alpha_rdata PARAMS ((int));
208#endif
209#ifdef OBJ_ECOFF
210static void s_alpha_sdata PARAMS ((int));
211#endif
212#ifdef OBJ_ELF
213static void s_alpha_section PARAMS ((int));
214static void s_alpha_ent PARAMS ((int));
215static void s_alpha_end PARAMS ((int));
216static void s_alpha_mask PARAMS ((int));
217static void s_alpha_frame PARAMS ((int));
218static void s_alpha_prologue PARAMS ((int));
219static void s_alpha_coff_wrapper PARAMS ((int));
220#endif
221#ifdef OBJ_EVAX
222static void s_alpha_section PARAMS ((int));
223#endif
224static void s_alpha_gprel32 PARAMS ((int));
225static void s_alpha_float_cons PARAMS ((int));
226static void s_alpha_proc PARAMS ((int));
227static void s_alpha_set PARAMS ((int));
228static void s_alpha_base PARAMS ((int));
229static void s_alpha_align PARAMS ((int));
230static void s_alpha_stringer PARAMS ((int));
231static void s_alpha_space PARAMS ((int));
232
233static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
234#ifndef OBJ_ELF
235static void select_gp_value PARAMS ((void));
236#endif
237static void alpha_align PARAMS ((int, char *, symbolS *, int));
238
239\f
240/* Generic assembler global variables which must be defined by all
241 targets. */
242
243/* Characters which always start a comment. */
244const char comment_chars[] = "#";
245
246/* Characters which start a comment at the beginning of a line. */
247const char line_comment_chars[] = "#";
248
249/* Characters which may be used to separate multiple commands on a
250 single line. */
251const char line_separator_chars[] = ";";
252
253/* Characters which are used to indicate an exponent in a floating
254 point number. */
255const char EXP_CHARS[] = "eE";
256
257/* Characters which mean that a number is a floating point constant,
258 as in 0d1.0. */
259#if 0
260const char FLT_CHARS[] = "dD";
261#else
262/* XXX: Do all of these really get used on the alpha?? */
263char FLT_CHARS[] = "rRsSfFdDxXpP";
264#endif
265
266#ifdef OBJ_EVAX
267const char *md_shortopts = "Fm:g+1h:HG:";
268#else
269const char *md_shortopts = "Fm:gG:";
270#endif
271
272struct option md_longopts[] = {
273#define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument, NULL, OPTION_32ADDR },
275#define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument, NULL, OPTION_RELAX },
277#ifdef OBJ_ELF
278#define OPTION_MDEBUG (OPTION_RELAX+1)
279#define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
281 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
282#endif
283 { NULL, no_argument, NULL, 0 }
284};
285
286size_t md_longopts_size = sizeof(md_longopts);
287
288\f
289#ifdef OBJ_EVAX
290#define AXP_REG_R0 0
291#define AXP_REG_R16 16
292#define AXP_REG_R17 17
293#undef AXP_REG_T9
294#define AXP_REG_T9 22
295#undef AXP_REG_T10
296#define AXP_REG_T10 23
297#undef AXP_REG_T11
298#define AXP_REG_T11 24
299#undef AXP_REG_T12
300#define AXP_REG_T12 25
301#define AXP_REG_AI 25
302#undef AXP_REG_FP
303#define AXP_REG_FP 29
304
305#undef AXP_REG_GP
306#define AXP_REG_GP AXP_REG_PV
307#endif /* OBJ_EVAX */
308
309/* The cpu for which we are generating code */
310static unsigned alpha_target = AXP_OPCODE_BASE;
311static const char *alpha_target_name = "<all>";
312
313/* The hash table of instruction opcodes */
314static struct hash_control *alpha_opcode_hash;
315
316/* The hash table of macro opcodes */
317static struct hash_control *alpha_macro_hash;
318
319#ifdef OBJ_ECOFF
320/* The $gp relocation symbol */
321static symbolS *alpha_gp_symbol;
322
323/* XXX: what is this, and why is it exported? */
324valueT alpha_gp_value;
325#endif
326
327/* The current $gp register */
328static int alpha_gp_register = AXP_REG_GP;
329
330/* A table of the register symbols */
331static symbolS *alpha_register_table[64];
332
333/* Constant sections, or sections of constants */
334#ifdef OBJ_ECOFF
335static segT alpha_lita_section;
336static segT alpha_lit4_section;
337#endif
338#ifdef OBJ_EVAX
339static segT alpha_link_section;
340static segT alpha_ctors_section;
341static segT alpha_dtors_section;
342#endif
343static segT alpha_lit8_section;
344
345/* Symbols referring to said sections. */
346#ifdef OBJ_ECOFF
347static symbolS *alpha_lita_symbol;
348static symbolS *alpha_lit4_symbol;
349#endif
350#ifdef OBJ_EVAX
351static symbolS *alpha_link_symbol;
352static symbolS *alpha_ctors_symbol;
353static symbolS *alpha_dtors_symbol;
354#endif
355static symbolS *alpha_lit8_symbol;
356
357/* Literal for .litX+0x8000 within .lita */
358#ifdef OBJ_ECOFF
359static offsetT alpha_lit4_literal;
360static offsetT alpha_lit8_literal;
361#endif
362
363/* The active .ent symbol. */
364#ifdef OBJ_ELF
365static symbolS *alpha_cur_ent_sym;
366#endif
367
368/* Is the assembler not allowed to use $at? */
369static int alpha_noat_on = 0;
370
371/* Are macros enabled? */
372static int alpha_macros_on = 1;
373
374/* Are floats disabled? */
375static int alpha_nofloats_on = 0;
376
377/* Are addresses 32 bit? */
378static int alpha_addr32_on = 0;
379
380/* Symbol labelling the current insn. When the Alpha gas sees
381 foo:
382 .quad 0
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385static symbolS *alpha_insn_label;
386
387/* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389static int alpha_auto_align_on = 1;
390
391/* The known current alignment of the current section. */
392static int alpha_current_align;
393
394/* These are exported to ECOFF code. */
395unsigned long alpha_gprmask, alpha_fprmask;
396
397/* Whether the debugging option was seen. */
398static int alpha_debug;
399
400#ifdef OBJ_ELF
401/* Whether we are emitting an mdebug section. */
402int alpha_flag_mdebug = 1;
403#endif
404
405/* Don't fully resolve relocations, allowing code movement in the linker. */
406static int alpha_flag_relax;
407
408/* What value to give to bfd_set_gp_size. */
409static int g_switch_value = 8;
410
411#ifdef OBJ_EVAX
412/* Collect information about current procedure here. */
413static struct {
414 symbolS *symbol; /* proc pdesc symbol */
415 int pdsckind;
416 int framereg; /* register for frame pointer */
417 int framesize; /* size of frame */
418 int rsa_offset;
419 int ra_save;
420 int fp_save;
421 long imask;
422 long fmask;
423 int type;
424 int prologue;
425} alpha_evax_proc;
426
427static int alpha_flag_hash_long_names = 0; /* -+ */
428static int alpha_flag_show_after_trunc = 0; /* -H */
429
430/* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
432 */
433
434#endif
435\f
436/* A table of CPU names and opcode sets. */
437
438static const struct cpu_type
439{
440 const char *name;
441 unsigned flags;
442} cpu_types[] =
443{
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
448
449 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
450 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
451 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
452 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
453 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
454 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
455 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
456 |AXP_OPCODE_MAX) },
457 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
458 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
459
460 { "ev4", AXP_OPCODE_BASE },
461 { "ev45", AXP_OPCODE_BASE },
462 { "lca45", AXP_OPCODE_BASE },
463 { "ev5", AXP_OPCODE_BASE },
464 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
465 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
466 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
467
468 { "all", AXP_OPCODE_BASE },
469 { 0 }
470};
471
472/* The macro table */
473
474static const struct alpha_macro alpha_macros[] = {
475/* Load/Store macros */
476 { "lda", emit_lda, NULL,
477 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
478 MACRO_IR, MACRO_EXP, MACRO_EOA } },
479 { "ldah", emit_ldah, NULL,
480 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
481
482 { "ldl", emit_ir_load, "ldl",
483 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
484 MACRO_IR, MACRO_EXP, MACRO_EOA } },
485 { "ldl_l", emit_ir_load, "ldl_l",
486 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
487 MACRO_IR, MACRO_EXP, MACRO_EOA } },
488 { "ldq", emit_ir_load, "ldq",
489 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
490 MACRO_IR, MACRO_EXP, MACRO_EOA } },
491 { "ldq_l", emit_ir_load, "ldq_l",
492 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
493 MACRO_IR, MACRO_EXP, MACRO_EOA } },
494 { "ldq_u", emit_ir_load, "ldq_u",
495 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
496 MACRO_IR, MACRO_EXP, MACRO_EOA } },
497 { "ldf", emit_loadstore, "ldf",
498 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
499 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
500 { "ldg", emit_loadstore, "ldg",
501 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
502 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
503 { "lds", emit_loadstore, "lds",
504 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
505 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
506 { "ldt", emit_loadstore, "ldt",
507 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
508 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
509
510 { "ldb", emit_ldX, (PTR)0,
511 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
512 MACRO_IR, MACRO_EXP, MACRO_EOA } },
513 { "ldbu", emit_ldXu, (PTR)0,
514 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
515 MACRO_IR, MACRO_EXP, MACRO_EOA } },
516 { "ldw", emit_ldX, (PTR)1,
517 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
518 MACRO_IR, MACRO_EXP, MACRO_EOA } },
519 { "ldwu", emit_ldXu, (PTR)1,
520 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
521 MACRO_IR, MACRO_EXP, MACRO_EOA } },
522
523 { "uldw", emit_uldX, (PTR)1,
524 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
525 MACRO_IR, MACRO_EXP, MACRO_EOA } },
526 { "uldwu", emit_uldXu, (PTR)1,
527 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
528 MACRO_IR, MACRO_EXP, MACRO_EOA } },
529 { "uldl", emit_uldX, (PTR)2,
530 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
531 MACRO_IR, MACRO_EXP, MACRO_EOA } },
532 { "uldlu", emit_uldXu, (PTR)2,
533 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
534 MACRO_IR, MACRO_EXP, MACRO_EOA } },
535 { "uldq", emit_uldXu, (PTR)3,
536 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
537 MACRO_IR, MACRO_EXP, MACRO_EOA } },
538
539 { "ldgp", emit_ldgp, NULL,
540 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
541
542 { "ldi", emit_lda, NULL,
543 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
544 { "ldil", emit_ldil, NULL,
545 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
546 { "ldiq", emit_lda, NULL,
547 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
548#if 0
549 { "ldif" emit_ldiq, NULL,
550 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
551 { "ldid" emit_ldiq, NULL,
552 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
553 { "ldig" emit_ldiq, NULL,
554 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
555 { "ldis" emit_ldiq, NULL,
556 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
557 { "ldit" emit_ldiq, NULL,
558 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
559#endif
560
561 { "stl", emit_loadstore, "stl",
562 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
563 MACRO_IR, MACRO_EXP, MACRO_EOA } },
564 { "stl_c", emit_loadstore, "stl_c",
565 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
566 MACRO_IR, MACRO_EXP, MACRO_EOA } },
567 { "stq", emit_loadstore, "stq",
568 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
569 MACRO_IR, MACRO_EXP, MACRO_EOA } },
570 { "stq_c", emit_loadstore, "stq_c",
571 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
572 MACRO_IR, MACRO_EXP, MACRO_EOA } },
573 { "stq_u", emit_loadstore, "stq_u",
574 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
575 MACRO_IR, MACRO_EXP, MACRO_EOA } },
576 { "stf", emit_loadstore, "stf",
577 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
578 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
579 { "stg", emit_loadstore, "stg",
580 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
581 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
582 { "sts", emit_loadstore, "sts",
583 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
584 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
585 { "stt", emit_loadstore, "stt",
586 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
587 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
588
589 { "stb", emit_stX, (PTR)0,
590 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
591 MACRO_IR, MACRO_EXP, MACRO_EOA } },
592 { "stw", emit_stX, (PTR)1,
593 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
594 MACRO_IR, MACRO_EXP, MACRO_EOA } },
595 { "ustw", emit_ustX, (PTR)1,
596 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
597 MACRO_IR, MACRO_EXP, MACRO_EOA } },
598 { "ustl", emit_ustX, (PTR)2,
599 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
600 MACRO_IR, MACRO_EXP, MACRO_EOA } },
601 { "ustq", emit_ustX, (PTR)3,
602 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
603 MACRO_IR, MACRO_EXP, MACRO_EOA } },
604
605/* Arithmetic macros */
606#if 0
607 { "absl" emit_absl, 1, { IR } },
608 { "absl" emit_absl, 2, { IR, IR } },
609 { "absl" emit_absl, 2, { EXP, IR } },
610 { "absq" emit_absq, 1, { IR } },
611 { "absq" emit_absq, 2, { IR, IR } },
612 { "absq" emit_absq, 2, { EXP, IR } },
613#endif
614
615 { "sextb", emit_sextX, (PTR)0,
616 { MACRO_IR, MACRO_IR, MACRO_EOA,
617 MACRO_IR, MACRO_EOA,
618 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
619 { "sextw", emit_sextX, (PTR)1,
620 { MACRO_IR, MACRO_IR, MACRO_EOA,
621 MACRO_IR, MACRO_EOA,
622 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
623
624 { "divl", emit_division, "__divl",
625 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
626 MACRO_IR, MACRO_IR, MACRO_EOA,
627 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
628 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
629 { "divlu", emit_division, "__divlu",
630 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
631 MACRO_IR, MACRO_IR, MACRO_EOA,
632 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
633 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
634 { "divq", emit_division, "__divq",
635 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
636 MACRO_IR, MACRO_IR, MACRO_EOA,
637 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
638 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
639 { "divqu", emit_division, "__divqu",
640 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
641 MACRO_IR, MACRO_IR, MACRO_EOA,
642 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
643 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
644 { "reml", emit_division, "__reml",
645 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
646 MACRO_IR, MACRO_IR, MACRO_EOA,
647 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
648 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
649 { "remlu", emit_division, "__remlu",
650 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
651 MACRO_IR, MACRO_IR, MACRO_EOA,
652 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
653 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
654 { "remq", emit_division, "__remq",
655 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
656 MACRO_IR, MACRO_IR, MACRO_EOA,
657 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
658 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
659 { "remqu", emit_division, "__remqu",
660 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
661 MACRO_IR, MACRO_IR, MACRO_EOA,
662 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
663 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
664
665 { "jsr", emit_jsrjmp, "jsr",
666 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
667 MACRO_PIR, MACRO_EOA,
668 MACRO_IR, MACRO_EXP, MACRO_EOA,
669 MACRO_EXP, MACRO_EOA } },
670 { "jmp", emit_jsrjmp, "jmp",
671 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
672 MACRO_PIR, MACRO_EOA,
673 MACRO_IR, MACRO_EXP, MACRO_EOA,
674 MACRO_EXP, MACRO_EOA } },
675 { "ret", emit_retjcr, "ret",
676 { MACRO_IR, MACRO_EXP, MACRO_EOA,
677 MACRO_IR, MACRO_EOA,
678 MACRO_PIR, MACRO_EXP, MACRO_EOA,
679 MACRO_PIR, MACRO_EOA,
680 MACRO_EXP, MACRO_EOA,
681 MACRO_EOA } },
682 { "jcr", emit_retjcr, "jcr",
683 { MACRO_IR, MACRO_EXP, MACRO_EOA,
684 MACRO_IR, MACRO_EOA,
685 MACRO_PIR, MACRO_EXP, MACRO_EOA,
686 MACRO_PIR, MACRO_EOA,
687 MACRO_EXP, MACRO_EOA,
688 MACRO_EOA } },
689 { "jsr_coroutine", emit_retjcr, "jcr",
690 { MACRO_IR, MACRO_EXP, MACRO_EOA,
691 MACRO_IR, MACRO_EOA,
692 MACRO_PIR, MACRO_EXP, MACRO_EOA,
693 MACRO_PIR, MACRO_EOA,
694 MACRO_EXP, MACRO_EOA,
695 MACRO_EOA } },
696};
697
698static const int alpha_num_macros
699 = sizeof(alpha_macros) / sizeof(*alpha_macros);
700\f
701/* Public interface functions */
702
703/* This function is called once, at assembler startup time. It sets
704 up all the tables, etc. that the MD part of the assembler will
705 need, that can be determined before arguments are parsed. */
706
707void
708md_begin ()
709{
710 unsigned int i;
711
712 /* Create the opcode hash table */
713
714 alpha_opcode_hash = hash_new ();
715 for (i = 0; i < alpha_num_opcodes; )
716 {
717 const char *name, *retval, *slash;
718
719 name = alpha_opcodes[i].name;
720 retval = hash_insert (alpha_opcode_hash, name, (PTR)&alpha_opcodes[i]);
721 if (retval)
722 as_fatal (_("internal error: can't hash opcode `%s': %s"), name, retval);
723
724 /* Some opcodes include modifiers of various sorts with a "/mod"
725 syntax, like the architecture manual suggests. However, for
726 use with gcc at least, we also need access to those same opcodes
727 without the "/". */
728
729 if ((slash = strchr (name, '/')) != NULL)
730 {
731 char *p = xmalloc (strlen (name));
732 memcpy (p, name, slash - name);
733 strcpy (p + (slash - name), slash + 1);
734
735 (void)hash_insert(alpha_opcode_hash, p, (PTR)&alpha_opcodes[i]);
736 /* Ignore failures -- the opcode table does duplicate some
737 variants in different forms, like "hw_stq" and "hw_st/q". */
738 }
739
740 while (++i < alpha_num_opcodes
741 && (alpha_opcodes[i].name == name
742 || !strcmp (alpha_opcodes[i].name, name)))
743 continue;
744 }
745
746 /* Create the macro hash table */
747
748 alpha_macro_hash = hash_new ();
749 for (i = 0; i < alpha_num_macros; )
750 {
751 const char *name, *retval;
752
753 name = alpha_macros[i].name;
754 retval = hash_insert (alpha_macro_hash, name, (PTR)&alpha_macros[i]);
755 if (retval)
756 as_fatal (_("internal error: can't hash macro `%s': %s"), name, retval);
757
758 while (++i < alpha_num_macros
759 && (alpha_macros[i].name == name
760 || !strcmp (alpha_macros[i].name, name)))
761 continue;
762 }
763
764 /* Construct symbols for each of the registers */
765
766 for (i = 0; i < 32; ++i)
767 {
768 char name[4];
769 sprintf(name, "$%d", i);
770 alpha_register_table[i] = symbol_create(name, reg_section, i,
771 &zero_address_frag);
772 }
773 for (; i < 64; ++i)
774 {
775 char name[5];
776 sprintf(name, "$f%d", i-32);
777 alpha_register_table[i] = symbol_create(name, reg_section, i,
778 &zero_address_frag);
779 }
780
781 /* Create the special symbols and sections we'll be using */
782
783 /* So .sbss will get used for tiny objects. */
784 bfd_set_gp_size (stdoutput, g_switch_value);
785
786#ifdef OBJ_ECOFF
787 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
788
789 /* For handling the GP, create a symbol that won't be output in the
790 symbol table. We'll edit it out of relocs later. */
791 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
792 &zero_address_frag);
793#endif
794
795#ifdef OBJ_EVAX
796 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
797#endif
798
799#ifdef OBJ_ELF
800 if (ECOFF_DEBUGGING)
801 {
802 segT sec = subseg_new(".mdebug", (subsegT)0);
803 bfd_set_section_flags(stdoutput, sec, SEC_HAS_CONTENTS|SEC_READONLY);
804 bfd_set_section_alignment(stdoutput, sec, 3);
805 }
806#endif /* OBJ_ELF */
807
808 subseg_set(text_section, 0);
809}
810
811/* The public interface to the instruction assembler. */
812
813void
814md_assemble (str)
815 char *str;
816{
817 char opname[32]; /* current maximum is 13 */
818 expressionS tok[MAX_INSN_ARGS];
819 int ntok, opnamelen, trunclen;
820
821 /* split off the opcode */
822 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/468");
823 trunclen = (opnamelen < sizeof (opname) - 1
824 ? opnamelen
825 : sizeof (opname) - 1);
826 memcpy (opname, str, trunclen);
827 opname[trunclen] = '\0';
828
829 /* tokenize the rest of the line */
830 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
831 {
832 as_bad (_("syntax error"));
833 return;
834 }
835
836 /* finish it off */
837 assemble_tokens (opname, tok, ntok, alpha_macros_on);
838}
839
840/* Round up a section's size to the appropriate boundary. */
841
842valueT
843md_section_align (seg, size)
844 segT seg;
845 valueT size;
846{
847 int align = bfd_get_section_alignment(stdoutput, seg);
848 valueT mask = ((valueT)1 << align) - 1;
849
850 return (size + mask) & ~mask;
851}
852
853/* Turn a string in input_line_pointer into a floating point constant
854 of type type, and store the appropriate bytes in *litP. The number
855 of LITTLENUMS emitted is stored in *sizeP. An error message is
856 returned, or NULL on OK. */
857
858/* Equal to MAX_PRECISION in atof-ieee.c */
859#define MAX_LITTLENUMS 6
860
861extern char *vax_md_atof PARAMS ((int, char *, int *));
862
863char *
864md_atof (type, litP, sizeP)
865 char type;
866 char *litP;
867 int *sizeP;
868{
869 int prec;
870 LITTLENUM_TYPE words[MAX_LITTLENUMS];
871 LITTLENUM_TYPE *wordP;
872 char *t;
873
874 switch (type)
875 {
876 /* VAX floats */
877 case 'G':
878 /* VAX md_atof doesn't like "G" for some reason. */
879 type = 'g';
880 case 'F':
881 case 'D':
882 return vax_md_atof (type, litP, sizeP);
883
884 /* IEEE floats */
885 case 'f':
886 prec = 2;
887 break;
888
889 case 'd':
890 prec = 4;
891 break;
892
893 case 'x':
894 case 'X':
895 prec = 6;
896 break;
897
898 case 'p':
899 case 'P':
900 prec = 6;
901 break;
902
903 default:
904 *sizeP = 0;
905 return _("Bad call to MD_ATOF()");
906 }
907 t = atof_ieee (input_line_pointer, type, words);
908 if (t)
909 input_line_pointer = t;
910 *sizeP = prec * sizeof (LITTLENUM_TYPE);
911
912 for (wordP = words + prec - 1; prec--;)
913 {
914 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
915 litP += sizeof (LITTLENUM_TYPE);
916 }
917
918 return 0;
919}
920
921/* Take care of the target-specific command-line options. */
922
923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'F':
931 alpha_nofloats_on = 1;
932 break;
933
934 case OPTION_32ADDR:
935 alpha_addr32_on = 1;
936 break;
937
938 case 'g':
939 alpha_debug = 1;
940 break;
941
942 case 'G':
943 g_switch_value = atoi(arg);
944 break;
945
946 case 'm':
947 {
948 const struct cpu_type *p;
949 for (p = cpu_types; p->name; ++p)
950 if (strcmp(arg, p->name) == 0)
951 {
952 alpha_target_name = p->name, alpha_target = p->flags;
953 goto found;
954 }
955 as_warn(_("Unknown CPU identifier `%s'"), arg);
956 found:;
957 }
958 break;
959
960#ifdef OBJ_EVAX
961 case '+': /* For g++. Hash any name > 63 chars long. */
962 alpha_flag_hash_long_names = 1;
963 break;
964
965 case 'H': /* Show new symbol after hash truncation */
966 alpha_flag_show_after_trunc = 1;
967 break;
968
969 case 'h': /* for gnu-c/vax compatibility. */
970 break;
971#endif
972
973 case OPTION_RELAX:
974 alpha_flag_relax = 1;
975 break;
976
977#ifdef OBJ_ELF
978 case OPTION_MDEBUG:
979 alpha_flag_mdebug = 1;
980 break;
981 case OPTION_NO_MDEBUG:
982 alpha_flag_mdebug = 0;
983 break;
984#endif
985
986 default:
987 return 0;
988 }
989
990 return 1;
991}
992
993/* Print a description of the command-line options that we accept. */
994
995void
996md_show_usage (stream)
997 FILE *stream;
998{
999 fputs(_("\
1000Alpha options:\n\
1001-32addr treat addresses as 32-bit values\n\
1002-F lack floating point instructions support\n\
1003-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1004 specify variant of Alpha architecture\n\
1005-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1006 these variants include PALcode opcodes\n"),
1007 stream);
1008#ifdef OBJ_EVAX
1009 fputs (_("\
1010VMS options:\n\
1011-+ hash encode (don't truncate) names longer than 64 characters\n\
1012-H show new symbol after hash truncation\n"),
1013 stream);
1014#endif
1015}
1016
1017/* Decide from what point a pc-relative relocation is relative to,
1018 relative to the pc-relative fixup. Er, relatively speaking. */
1019
1020long
1021md_pcrel_from (fixP)
1022 fixS *fixP;
1023{
1024 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1025 switch (fixP->fx_r_type)
1026 {
1027 case BFD_RELOC_ALPHA_GPDISP:
1028 case BFD_RELOC_ALPHA_GPDISP_HI16:
1029 case BFD_RELOC_ALPHA_GPDISP_LO16:
1030 return addr;
1031 default:
1032 return fixP->fx_size + addr;
1033 }
1034}
1035
1036/* Attempt to simplify or even eliminate a fixup. The return value is
1037 ignored; perhaps it was once meaningful, but now it is historical.
1038 To indicate that a fixup has been eliminated, set fixP->fx_done.
1039
1040 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1041 internally into the GPDISP reloc used externally. We had to do
1042 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1043 the distance to the "lda" instruction for setting the addend to
1044 GPDISP. */
1045
1046int
1047md_apply_fix (fixP, valueP)
1048 fixS *fixP;
1049 valueT *valueP;
1050{
1051 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1052 valueT value = *valueP;
1053 unsigned image, size;
1054
1055 switch (fixP->fx_r_type)
1056 {
1057 /* The GPDISP relocations are processed internally with a symbol
1058 referring to the current function; we need to drop in a value
1059 which, when added to the address of the start of the function,
1060 gives the desired GP. */
1061 case BFD_RELOC_ALPHA_GPDISP_HI16:
1062 {
1063 fixS *next = fixP->fx_next;
1064 assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
1065
1066 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1067 - fixP->fx_frag->fr_address - fixP->fx_where);
1068
1069 value = (value - sign_extend_16 (value)) >> 16;
1070 }
1071#ifdef OBJ_ELF
1072 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1073#endif
1074 goto do_reloc_gp;
1075
1076 case BFD_RELOC_ALPHA_GPDISP_LO16:
1077 value = sign_extend_16 (value);
1078 fixP->fx_offset = 0;
1079#ifdef OBJ_ELF
1080 fixP->fx_done = 1;
1081#endif
1082
1083 do_reloc_gp:
1084 fixP->fx_addsy = section_symbol (absolute_section);
1085 md_number_to_chars (fixpos, value, 2);
1086 break;
1087
1088 case BFD_RELOC_16:
1089 if (fixP->fx_pcrel)
1090 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1091 size = 2;
1092 goto do_reloc_xx;
1093 case BFD_RELOC_32:
1094 if (fixP->fx_pcrel)
1095 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1096 size = 4;
1097 goto do_reloc_xx;
1098 case BFD_RELOC_64:
1099 if (fixP->fx_pcrel)
1100 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1101 size = 8;
1102 do_reloc_xx:
1103 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1104 {
1105 md_number_to_chars (fixpos, value, size);
1106 goto done;
1107 }
1108 return 1;
1109
1110#ifdef OBJ_ECOFF
1111 case BFD_RELOC_GPREL32:
1112 assert (fixP->fx_subsy == alpha_gp_symbol);
1113 fixP->fx_subsy = 0;
1114 /* FIXME: inherited this obliviousness of `value' -- why? */
1115 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1116 break;
1117#endif
1118#ifdef OBJ_ELF
1119 case BFD_RELOC_GPREL32:
1120 return 1;
1121#endif
1122
1123 case BFD_RELOC_23_PCREL_S2:
1124 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1125 {
1126 image = bfd_getl32(fixpos);
1127 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1128 goto write_done;
1129 }
1130 return 1;
1131
1132 case BFD_RELOC_ALPHA_HINT:
1133 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1134 {
1135 image = bfd_getl32(fixpos);
1136 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1137 goto write_done;
1138 }
1139 return 1;
1140
1141#ifdef OBJ_ECOFF
1142 case BFD_RELOC_ALPHA_LITERAL:
1143 md_number_to_chars (fixpos, value, 2);
1144 return 1;
1145
1146 case BFD_RELOC_ALPHA_LITUSE:
1147 return 1;
1148#endif
1149#ifdef OBJ_ELF
1150 case BFD_RELOC_ALPHA_ELF_LITERAL:
1151 case BFD_RELOC_ALPHA_LITUSE:
1152 return 1;
1153#endif
1154#ifdef OBJ_EVAX
1155 case BFD_RELOC_ALPHA_LINKAGE:
1156 case BFD_RELOC_ALPHA_CODEADDR:
1157 return 1;
1158#endif
1159
1160 default:
1161 {
1162 const struct alpha_operand *operand;
1163
1164 if ((int)fixP->fx_r_type >= 0)
1165 as_fatal (_("unhandled relocation type %s"),
1166 bfd_get_reloc_code_name (fixP->fx_r_type));
1167
1168 assert (-(int)fixP->fx_r_type < alpha_num_operands);
1169 operand = &alpha_operands[-(int)fixP->fx_r_type];
1170
1171 /* The rest of these fixups only exist internally during symbol
1172 resolution and have no representation in the object file.
1173 Therefore they must be completely resolved as constants. */
1174
1175 if (fixP->fx_addsy != 0
1176 && fixP->fx_addsy->bsym->section != absolute_section)
1177 as_bad_where (fixP->fx_file, fixP->fx_line,
1178 _("non-absolute expression in constant field"));
1179
1180 image = bfd_getl32(fixpos);
1181 image = insert_operand(image, operand, (offsetT)value,
1182 fixP->fx_file, fixP->fx_line);
1183 }
1184 goto write_done;
1185 }
1186
1187 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1188 return 1;
1189 else
1190 {
1191 as_warn_where(fixP->fx_file, fixP->fx_line,
1192 _("type %d reloc done?\n"), (int)fixP->fx_r_type);
1193 goto done;
1194 }
1195
1196write_done:
1197 md_number_to_chars(fixpos, image, 4);
1198
1199done:
1200 fixP->fx_done = 1;
1201 return 0;
1202}
1203
1204/*
1205 * Look for a register name in the given symbol.
1206 */
1207
1208symbolS *
1209md_undefined_symbol(name)
1210 char *name;
1211{
1212 if (*name == '$')
1213 {
1214 int is_float = 0, num;
1215
1216 switch (*++name)
1217 {
1218 case 'f':
1219 if (name[1] == 'p' && name[2] == '\0')
1220 return alpha_register_table[AXP_REG_FP];
1221 is_float = 32;
1222 /* FALLTHRU */
1223
1224 case 'r':
1225 if (!isdigit(*++name))
1226 break;
1227 /* FALLTHRU */
1228
1229 case '0': case '1': case '2': case '3': case '4':
1230 case '5': case '6': case '7': case '8': case '9':
1231 if (name[1] == '\0')
1232 num = name[0] - '0';
1233 else if (name[0] != '0' && isdigit(name[1]) && name[2] == '\0')
1234 {
1235 num = (name[0] - '0') * 10 + name[1] - '0';
1236 if (num >= 32)
1237 break;
1238 }
1239 else
1240 break;
1241
1242 if (!alpha_noat_on && num == AXP_REG_AT)
1243 as_warn(_("Used $at without \".set noat\""));
1244 return alpha_register_table[num + is_float];
1245
1246 case 'a':
1247 if (name[1] == 't' && name[2] == '\0')
1248 {
1249 if (!alpha_noat_on)
1250 as_warn(_("Used $at without \".set noat\""));
1251 return alpha_register_table[AXP_REG_AT];
1252 }
1253 break;
1254
1255 case 'g':
1256 if (name[1] == 'p' && name[2] == '\0')
1257 return alpha_register_table[alpha_gp_register];
1258 break;
1259
1260 case 's':
1261 if (name[1] == 'p' && name[2] == '\0')
1262 return alpha_register_table[AXP_REG_SP];
1263 break;
1264 }
1265 }
1266 return NULL;
1267}
1268
1269#ifdef OBJ_ECOFF
1270/* @@@ Magic ECOFF bits. */
1271
1272void
1273alpha_frob_ecoff_data ()
1274{
1275 select_gp_value ();
1276 /* $zero and $f31 are read-only */
1277 alpha_gprmask &= ~1;
1278 alpha_fprmask &= ~1;
1279}
1280#endif
1281
1282/* Hook to remember a recently defined label so that the auto-align
1283 code can adjust the symbol after we know what alignment will be
1284 required. */
1285
1286void
1287alpha_define_label (sym)
1288 symbolS *sym;
1289{
1290 alpha_insn_label = sym;
1291}
1292
1293/* Return true if we must always emit a reloc for a type and false if
1294 there is some hope of resolving it a assembly time. */
1295
1296int
1297alpha_force_relocation (f)
1298 fixS *f;
1299{
1300 if (alpha_flag_relax)
1301 return 1;
1302
1303 switch (f->fx_r_type)
1304 {
1305 case BFD_RELOC_ALPHA_GPDISP_HI16:
1306 case BFD_RELOC_ALPHA_GPDISP_LO16:
1307 case BFD_RELOC_ALPHA_GPDISP:
1308#ifdef OBJ_ECOFF
1309 case BFD_RELOC_ALPHA_LITERAL:
1310#endif
1311#ifdef OBJ_ELF
1312 case BFD_RELOC_ALPHA_ELF_LITERAL:
1313#endif
1314 case BFD_RELOC_ALPHA_LITUSE:
1315 case BFD_RELOC_GPREL32:
1316#ifdef OBJ_EVAX
1317 case BFD_RELOC_ALPHA_LINKAGE:
1318 case BFD_RELOC_ALPHA_CODEADDR:
1319#endif
1320 return 1;
1321
1322 case BFD_RELOC_23_PCREL_S2:
1323 case BFD_RELOC_32:
1324 case BFD_RELOC_64:
1325 case BFD_RELOC_ALPHA_HINT:
1326 return 0;
1327
1328 default:
1329 assert((int)f->fx_r_type < 0 && -(int)f->fx_r_type < alpha_num_operands);
1330 return 0;
1331 }
1332}
1333
1334/* Return true if we can partially resolve a relocation now. */
1335
1336int
1337alpha_fix_adjustable (f)
1338 fixS *f;
1339{
1340#ifdef OBJ_ELF
1341 /* Prevent all adjustments to global symbols */
1342 if (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy))
1343 return 0;
1344#endif
1345
1346 /* Are there any relocation types for which we must generate a reloc
1347 but we can adjust the values contained within it? */
1348 switch (f->fx_r_type)
1349 {
1350 case BFD_RELOC_ALPHA_GPDISP_HI16:
1351 case BFD_RELOC_ALPHA_GPDISP_LO16:
1352 case BFD_RELOC_ALPHA_GPDISP:
1353 return 0;
1354
1355#ifdef OBJ_ECOFF
1356 case BFD_RELOC_ALPHA_LITERAL:
1357#endif
1358#ifdef OBJ_ELF
1359 case BFD_RELOC_ALPHA_ELF_LITERAL:
1360#endif
1361#ifdef OBJ_EVAX
1362 case BFD_RELOC_ALPHA_LINKAGE:
1363 case BFD_RELOC_ALPHA_CODEADDR:
1364#endif
1365 return 1;
1366
1367 case BFD_RELOC_ALPHA_LITUSE:
1368 return 0;
1369
1370 case BFD_RELOC_GPREL32:
1371 case BFD_RELOC_23_PCREL_S2:
1372 case BFD_RELOC_32:
1373 case BFD_RELOC_64:
1374 case BFD_RELOC_ALPHA_HINT:
1375 return 1;
1376
1377 default:
1378 assert ((int)f->fx_r_type < 0
1379 && - (int)f->fx_r_type < alpha_num_operands);
1380 return 1;
1381 }
1382 /*NOTREACHED*/
1383}
1384
1385/* Generate the BFD reloc to be stuck in the object file from the
1386 fixup used internally in the assembler. */
1387
1388arelent *
1389tc_gen_reloc (sec, fixp)
1390 asection *sec;
1391 fixS *fixp;
1392{
1393 arelent *reloc;
1394
1395 reloc = (arelent *) xmalloc (sizeof (arelent));
1396 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
1397 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1398
1399 /* Make sure none of our internal relocations make it this far.
1400 They'd better have been fully resolved by this point. */
1401 assert ((int)fixp->fx_r_type > 0);
1402
1403 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1404 if (reloc->howto == NULL)
1405 {
1406 as_bad_where (fixp->fx_file, fixp->fx_line,
1407 _("cannot represent `%s' relocation in object file"),
1408 bfd_get_reloc_code_name (fixp->fx_r_type));
1409 return NULL;
1410 }
1411
1412 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1413 {
1414 as_fatal (_("internal error? cannot generate `%s' relocation"),
1415 bfd_get_reloc_code_name (fixp->fx_r_type));
1416 }
1417 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1418
1419#ifdef OBJ_ECOFF
1420 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1421 {
1422 /* fake out bfd_perform_relocation. sigh */
1423 reloc->addend = -alpha_gp_value;
1424 }
1425 else
1426#endif
1427 {
1428 reloc->addend = fixp->fx_offset;
1429#ifdef OBJ_ELF
1430 /*
1431 * Ohhh, this is ugly. The problem is that if this is a local global
1432 * symbol, the relocation will entirely be performed at link time, not
1433 * at assembly time. bfd_perform_reloc doesn't know about this sort
1434 * of thing, and as a result we need to fake it out here.
1435 */
1436 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
1437 && !S_IS_COMMON(fixp->fx_addsy))
1438 reloc->addend -= fixp->fx_addsy->bsym->value;
1439#endif
1440 }
1441
1442 return reloc;
1443}
1444
1445/* Parse a register name off of the input_line and return a register
1446 number. Gets md_undefined_symbol above to do the register name
1447 matching for us.
1448
1449 Only called as a part of processing the ECOFF .frame directive. */
1450
1451int
1452tc_get_register (frame)
1453 int frame;
1454{
1455 int framereg = AXP_REG_SP;
1456
1457 SKIP_WHITESPACE ();
1458 if (*input_line_pointer == '$')
1459 {
1460 char *s = input_line_pointer;
1461 char c = get_symbol_end ();
1462 symbolS *sym = md_undefined_symbol (s);
1463
1464 *strchr(s, '\0') = c;
1465 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1466 goto found;
1467 }
1468 as_warn (_("frame reg expected, using $%d."), framereg);
1469
1470found:
1471 note_gpreg (framereg);
1472 return framereg;
1473}
1474
1475/* This is called before the symbol table is processed. In order to
1476 work with gcc when using mips-tfile, we must keep all local labels.
1477 However, in other cases, we want to discard them. If we were
1478 called with -g, but we didn't see any debugging information, it may
1479 mean that gcc is smuggling debugging information through to
1480 mips-tfile, in which case we must generate all local labels. */
1481
1482#ifdef OBJ_ECOFF
1483
1484void
1485alpha_frob_file_before_adjust ()
1486{
1487 if (alpha_debug != 0
1488 && ! ecoff_debugging_seen)
1489 flag_keep_locals = 1;
1490}
1491
1492#endif /* OBJ_ECOFF */
1493\f
1494/* Parse the arguments to an opcode. */
1495
1496static int
1497tokenize_arguments (str, tok, ntok)
1498 char *str;
1499 expressionS tok[];
1500 int ntok;
1501{
1502 expressionS *end_tok = tok + ntok;
1503 char *old_input_line_pointer;
1504 int saw_comma = 0, saw_arg = 0;
1505
1506 memset (tok, 0, sizeof (*tok) * ntok);
1507
1508 /* Save and restore input_line_pointer around this function */
1509 old_input_line_pointer = input_line_pointer;
1510 input_line_pointer = str;
1511
1512 while (tok < end_tok && *input_line_pointer)
1513 {
1514 SKIP_WHITESPACE ();
1515 switch (*input_line_pointer)
1516 {
1517 case '\0':
1518 goto fini;
1519
1520 case ',':
1521 ++input_line_pointer;
1522 if (saw_comma || !saw_arg)
1523 goto err;
1524 saw_comma = 1;
1525 break;
1526
1527 case '(':
1528 {
1529 char *hold = input_line_pointer++;
1530
1531 /* First try for parenthesized register ... */
1532 expression (tok);
1533 if (*input_line_pointer == ')' && tok->X_op == O_register)
1534 {
1535 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
1536 saw_comma = 0;
1537 saw_arg = 1;
1538 ++input_line_pointer;
1539 ++tok;
1540 break;
1541 }
1542
1543 /* ... then fall through to plain expression */
1544 input_line_pointer = hold;
1545 }
1546
1547 default:
1548 if (saw_arg && !saw_comma)
1549 goto err;
1550 expression (tok);
1551 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1552 goto err;
1553
1554 saw_comma = 0;
1555 saw_arg = 1;
1556 ++tok;
1557 break;
1558 }
1559 }
1560
1561fini:
1562 if (saw_comma)
1563 goto err;
1564 input_line_pointer = old_input_line_pointer;
1565 return ntok - (end_tok - tok);
1566
1567err:
1568 input_line_pointer = old_input_line_pointer;
1569 return -1;
1570}
1571
1572/* Search forward through all variants of an opcode looking for a
1573 syntax match. */
1574
1575static const struct alpha_opcode *
1576find_opcode_match(first_opcode, tok, pntok, pcpumatch)
1577 const struct alpha_opcode *first_opcode;
1578 const expressionS *tok;
1579 int *pntok;
1580 int *pcpumatch;
1581{
1582 const struct alpha_opcode *opcode = first_opcode;
1583 int ntok = *pntok;
1584 int got_cpu_match = 0;
1585
1586 do
1587 {
1588 const unsigned char *opidx;
1589 int tokidx = 0;
1590
1591 /* Don't match opcodes that don't exist on this architecture */
1592 if (!(opcode->flags & alpha_target))
1593 goto match_failed;
1594
1595 got_cpu_match = 1;
1596
1597 for (opidx = opcode->operands; *opidx; ++opidx)
1598 {
1599 const struct alpha_operand *operand = &alpha_operands[*opidx];
1600
1601 /* only take input from real operands */
1602 if (operand->flags & AXP_OPERAND_FAKE)
1603 continue;
1604
1605 /* when we expect input, make sure we have it */
1606 if (tokidx >= ntok)
1607 {
1608 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
1609 goto match_failed;
1610 continue;
1611 }
1612
1613 /* match operand type with expression type */
1614 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
1615 {
1616 case AXP_OPERAND_IR:
1617 if (tok[tokidx].X_op != O_register
1618 || !is_ir_num(tok[tokidx].X_add_number))
1619 goto match_failed;
1620 break;
1621 case AXP_OPERAND_FPR:
1622 if (tok[tokidx].X_op != O_register
1623 || !is_fpr_num(tok[tokidx].X_add_number))
1624 goto match_failed;
1625 break;
1626 case AXP_OPERAND_IR|AXP_OPERAND_PARENS:
1627 if (tok[tokidx].X_op != O_pregister
1628 || !is_ir_num(tok[tokidx].X_add_number))
1629 goto match_failed;
1630 break;
1631 case AXP_OPERAND_IR|AXP_OPERAND_PARENS|AXP_OPERAND_COMMA:
1632 if (tok[tokidx].X_op != O_cpregister
1633 || !is_ir_num(tok[tokidx].X_add_number))
1634 goto match_failed;
1635 break;
1636
1637 case AXP_OPERAND_RELATIVE:
1638 case AXP_OPERAND_SIGNED:
1639 case AXP_OPERAND_UNSIGNED:
1640 switch (tok[tokidx].X_op)
1641 {
1642 case O_illegal:
1643 case O_absent:
1644 case O_register:
1645 case O_pregister:
1646 case O_cpregister:
1647 goto match_failed;
1648
1649 default:
1650 break;
1651 }
1652 break;
1653
1654 default:
1655 /* everything else should have been fake */
1656 abort();
1657 }
1658 ++tokidx;
1659 }
1660
1661 /* possible match -- did we use all of our input? */
1662 if (tokidx == ntok)
1663 {
1664 *pntok = ntok;
1665 return opcode;
1666 }
1667
1668 match_failed:;
1669 }
1670 while (++opcode-alpha_opcodes < alpha_num_opcodes
1671 && !strcmp(opcode->name, first_opcode->name));
1672
1673 if (*pcpumatch)
1674 *pcpumatch = got_cpu_match;
1675
1676 return NULL;
1677}
1678
1679/* Search forward through all variants of a macro looking for a syntax
1680 match. */
1681
1682static const struct alpha_macro *
1683find_macro_match(first_macro, tok, pntok)
1684 const struct alpha_macro *first_macro;
1685 const expressionS *tok;
1686 int *pntok;
1687{
1688 const struct alpha_macro *macro = first_macro;
1689 int ntok = *pntok;
1690
1691 do
1692 {
1693 const enum alpha_macro_arg *arg = macro->argsets;
1694 int tokidx = 0;
1695
1696 while (*arg)
1697 {
1698 switch (*arg)
1699 {
1700 case MACRO_EOA:
1701 if (tokidx == ntok)
1702 return macro;
1703 else
1704 tokidx = 0;
1705 break;
1706
1707 case MACRO_IR:
1708 if (tokidx >= ntok || tok[tokidx].X_op != O_register
1709 || !is_ir_num(tok[tokidx].X_add_number))
1710 goto match_failed;
1711 ++tokidx;
1712 break;
1713 case MACRO_PIR:
1714 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
1715 || !is_ir_num(tok[tokidx].X_add_number))
1716 goto match_failed;
1717 ++tokidx;
1718 break;
1719 case MACRO_CPIR:
1720 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
1721 || !is_ir_num(tok[tokidx].X_add_number))
1722 goto match_failed;
1723 ++tokidx;
1724 break;
1725 case MACRO_FPR:
1726 if (tokidx >= ntok || tok[tokidx].X_op != O_register
1727 || !is_fpr_num(tok[tokidx].X_add_number))
1728 goto match_failed;
1729 ++tokidx;
1730 break;
1731
1732 case MACRO_EXP:
1733 if (tokidx >= ntok)
1734 goto match_failed;
1735 switch (tok[tokidx].X_op)
1736 {
1737 case O_illegal:
1738 case O_absent:
1739 case O_register:
1740 case O_pregister:
1741 case O_cpregister:
1742 goto match_failed;
1743
1744 default:
1745 break;
1746 }
1747 ++tokidx;
1748 break;
1749
1750 match_failed:
1751 while (*arg != MACRO_EOA)
1752 ++arg;
1753 tokidx = 0;
1754 break;
1755 }
1756 ++arg;
1757 }
1758 }
1759 while (++macro-alpha_macros < alpha_num_macros
1760 && !strcmp(macro->name, first_macro->name));
1761
1762 return NULL;
1763}
1764
1765/* Insert an operand value into an instruction. */
1766
1767static unsigned
1768insert_operand(insn, operand, val, file, line)
1769 unsigned insn;
1770 const struct alpha_operand *operand;
1771 offsetT val;
1772 char *file;
1773 unsigned line;
1774{
1775 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
1776 {
1777 offsetT min, max;
1778
1779 if (operand->flags & AXP_OPERAND_SIGNED)
1780 {
1781 max = (1 << (operand->bits - 1)) - 1;
1782 min = -(1 << (operand->bits - 1));
1783 }
1784 else
1785 {
1786 max = (1 << operand->bits) - 1;
1787 min = 0;
1788 }
1789
1790 if (val < min || val > max)
1791 {
1792 const char *err =
1793 _("operand out of range (%s not between %d and %d)");
1794 char buf[sizeof (val) * 3 + 2];
1795
1796 sprint_value(buf, val);
1797 if (file)
1798 as_warn_where(file, line, err, buf, min, max);
1799 else
1800 as_warn(err, buf, min, max);
1801 }
1802 }
1803
1804 if (operand->insert)
1805 {
1806 const char *errmsg = NULL;
1807
1808 insn = (*operand->insert) (insn, val, &errmsg);
1809 if (errmsg)
1810 as_warn (errmsg);
1811 }
1812 else
1813 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
1814
1815 return insn;
1816}
1817
1818/*
1819 * Turn an opcode description and a set of arguments into
1820 * an instruction and a fixup.
1821 */
1822
1823static void
1824assemble_insn(opcode, tok, ntok, insn)
1825 const struct alpha_opcode *opcode;
1826 const expressionS *tok;
1827 int ntok;
1828 struct alpha_insn *insn;
1829{
1830 const unsigned char *argidx;
1831 unsigned image;
1832 int tokidx = 0;
1833
1834 memset (insn, 0, sizeof (*insn));
1835 image = opcode->opcode;
1836
1837 for (argidx = opcode->operands; *argidx; ++argidx)
1838 {
1839 const struct alpha_operand *operand = &alpha_operands[*argidx];
1840 const expressionS *t;
1841
1842 if (operand->flags & AXP_OPERAND_FAKE)
1843 {
1844 /* fake operands take no value and generate no fixup */
1845 image = insert_operand(image, operand, 0, NULL, 0);
1846 continue;
1847 }
1848
1849 if (tokidx >= ntok)
1850 {
1851 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
1852 {
1853 case AXP_OPERAND_DEFAULT_FIRST:
1854 t = &tok[0];
1855 break;
1856 case AXP_OPERAND_DEFAULT_SECOND:
1857 t = &tok[1];
1858 break;
1859 case AXP_OPERAND_DEFAULT_ZERO:
1860 {
1861 static const expressionS zero_exp = { 0, 0, 0, O_constant, 1 };
1862 t = &zero_exp;
1863 }
1864 break;
1865 default:
1866 abort();
1867 }
1868 }
1869 else
1870 t = &tok[tokidx++];
1871
1872 switch (t->X_op)
1873 {
1874 case O_register:
1875 case O_pregister:
1876 case O_cpregister:
1877 image = insert_operand(image, operand, regno(t->X_add_number),
1878 NULL, 0);
1879 break;
1880
1881 case O_constant:
1882 image = insert_operand(image, operand, t->X_add_number, NULL, 0);
1883 break;
1884
1885 default:
1886 {
1887 struct alpha_fixup *fixup;
1888
1889 if (insn->nfixups >= MAX_INSN_FIXUPS)
1890 as_fatal(_("too many fixups"));
1891
1892 fixup = &insn->fixups[insn->nfixups++];
1893
1894 fixup->exp = *t;
1895 fixup->reloc = operand->default_reloc;
1896 }
1897 break;
1898 }
1899 }
1900
1901 insn->insn = image;
1902}
1903
1904/*
1905 * Actually output an instruction with its fixup.
1906 */
1907
1908static void
1909emit_insn (insn)
1910 struct alpha_insn *insn;
1911{
1912 char *f;
1913 int i;
1914
1915 /* Take care of alignment duties */
1916 if (alpha_auto_align_on && alpha_current_align < 2)
1917 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
1918 if (alpha_current_align > 2)
1919 alpha_current_align = 2;
1920 alpha_insn_label = NULL;
1921
1922 /* Write out the instruction. */
1923 f = frag_more (4);
1924 md_number_to_chars (f, insn->insn, 4);
1925
1926 /* Apply the fixups in order */
1927 for (i = 0; i < insn->nfixups; ++i)
1928 {
1929 const struct alpha_operand *operand;
1930 struct alpha_fixup *fixup = &insn->fixups[i];
1931 int size, pcrel;
1932 fixS *fixP;
1933
1934 /* Some fixups are only used internally and so have no howto */
1935 if ((int)fixup->reloc < 0)
1936 {
1937 operand = &alpha_operands[-(int)fixup->reloc];
1938 size = 4;
1939 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
1940 }
1941#ifdef OBJ_ELF
1942 /* These relocation types are only used internally. */
1943 else if (fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
1944 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
1945 {
1946 size = 2, pcrel = 0;
1947 }
1948#endif
1949 else
1950 {
1951 reloc_howto_type *reloc_howto
1952 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
1953 assert (reloc_howto);
1954
1955 size = bfd_get_reloc_size (reloc_howto);
1956 pcrel = reloc_howto->pc_relative;
1957 }
1958 assert (size >= 1 && size <= 4);
1959
1960 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
1961 &fixup->exp, pcrel, fixup->reloc);
1962
1963 /* Turn off complaints that the addend is too large for some fixups */
1964 switch (fixup->reloc)
1965 {
1966 case BFD_RELOC_ALPHA_GPDISP_LO16:
1967#ifdef OBJ_ECOFF
1968 case BFD_RELOC_ALPHA_LITERAL:
1969#endif
1970#ifdef OBJ_ELF
1971 case BFD_RELOC_ALPHA_ELF_LITERAL:
1972#endif
1973 case BFD_RELOC_GPREL32:
1974 fixP->fx_no_overflow = 1;
1975 break;
1976
1977 default:
1978 if ((int)fixup->reloc < 0)
1979 {
1980 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
1981 fixP->fx_no_overflow = 1;
1982 }
1983 break;
1984 }
1985 }
1986}
1987
1988/* Given an opcode name and a pre-tokenized set of arguments, assemble
1989 the insn, but do not emit it.
1990
1991 Note that this implies no macros allowed, since we can't store more
1992 than one insn in an insn structure. */
1993
1994static void
1995assemble_tokens_to_insn(opname, tok, ntok, insn)
1996 const char *opname;
1997 const expressionS *tok;
1998 int ntok;
1999 struct alpha_insn *insn;
2000{
2001 const struct alpha_opcode *opcode;
2002
2003 /* search opcodes */
2004 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2005 if (opcode)
2006 {
2007 int cpumatch;
2008 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2009 if (opcode)
2010 {
2011 assemble_insn (opcode, tok, ntok, insn);
2012 return;
2013 }
2014 else if (cpumatch)
2015 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2016 else
2017 as_bad (_("opcode `%s' not supported for target %s"), opname,
2018 alpha_target_name);
2019 }
2020 else
2021 as_bad (_("unknown opcode `%s'"), opname);
2022}
2023
2024/* Given an opcode name and a pre-tokenized set of arguments, take the
2025 opcode all the way through emission. */
2026
2027static void
2028assemble_tokens (opname, tok, ntok, local_macros_on)
2029 const char *opname;
2030 const expressionS *tok;
2031 int ntok;
2032 int local_macros_on;
2033{
2034 int found_something = 0;
2035 const struct alpha_opcode *opcode;
2036 const struct alpha_macro *macro;
2037 int cpumatch = 1;
2038
2039 /* search macros */
2040 if (local_macros_on)
2041 {
2042 macro = ((const struct alpha_macro *)
2043 hash_find (alpha_macro_hash, opname));
2044 if (macro)
2045 {
2046 found_something = 1;
2047 macro = find_macro_match (macro, tok, &ntok);
2048 if (macro)
2049 {
2050 (*macro->emit) (tok, ntok, macro->arg);
2051 return;
2052 }
2053 }
2054 }
2055
2056 /* search opcodes */
2057 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2058 if (opcode)
2059 {
2060 found_something = 1;
2061 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2062 if (opcode)
2063 {
2064 struct alpha_insn insn;
2065 assemble_insn (opcode, tok, ntok, &insn);
2066 emit_insn (&insn);
2067 return;
2068 }
2069 }
2070
2071 if (found_something)
2072 if (cpumatch)
2073 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2074 else
2075 as_bad (_("opcode `%s' not supported for target %s"), opname,
2076 alpha_target_name);
2077 else
2078 as_bad (_("unknown opcode `%s'"), opname);
2079}
2080
2081\f
2082/* Some instruction sets indexed by lg(size) */
2083static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2084static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2085static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2086static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2087static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2088static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2089static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2090static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2091static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
2092static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2093
2094/* Implement the ldgp macro. */
2095
2096static void
2097emit_ldgp (tok, ntok, unused)
2098 const expressionS *tok;
2099 int ntok;
2100 const PTR unused;
2101{
2102#ifdef OBJ_AOUT
2103FIXME
2104#endif
2105#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2106 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2107 with appropriate constants and relocations. */
2108 struct alpha_insn insn;
2109 expressionS newtok[3];
2110 expressionS addend;
2111
2112 /* We're going to need this symbol in md_apply_fix(). */
2113 (void) section_symbol (absolute_section);
2114
2115#ifdef OBJ_ECOFF
2116 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2117 ecoff_set_gp_prolog_size (0);
2118#endif
2119
2120 newtok[0] = tok[0];
2121 set_tok_const (newtok[1], 0);
2122 newtok[2] = tok[2];
2123
2124 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2125
2126 addend = tok[1];
2127
2128#ifdef OBJ_ECOFF
2129 if (addend.X_op != O_constant)
2130 as_bad (_("can not resolve expression"));
2131 addend.X_op = O_symbol;
2132 addend.X_add_symbol = alpha_gp_symbol;
2133#endif
2134
2135 insn.nfixups = 1;
2136 insn.fixups[0].exp = addend;
2137 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2138
2139 emit_insn (&insn);
2140
2141 set_tok_preg (newtok[2], tok[0].X_add_number);
2142
2143 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2144
2145#ifdef OBJ_ECOFF
2146 addend.X_add_number += 4;
2147#endif
2148
2149 insn.nfixups = 1;
2150 insn.fixups[0].exp = addend;
2151 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2152
2153 emit_insn (&insn);
2154#endif /* OBJ_ECOFF || OBJ_ELF */
2155}
2156
2157#ifdef OBJ_EVAX
2158
2159/* Add symbol+addend to link pool.
2160 Return offset from basesym to entry in link pool.
2161
2162 Add new fixup only if offset isn't 16bit. */
2163
2164valueT
2165add_to_link_pool (basesym, sym, addend)
2166 symbolS *basesym;
2167 symbolS *sym;
2168 offsetT addend;
2169{
2170 segT current_section = now_seg;
2171 int current_subsec = now_subseg;
2172 valueT offset;
2173 bfd_reloc_code_real_type reloc_type;
2174 char *p;
2175 segment_info_type *seginfo = seg_info (alpha_link_section);
2176 fixS *fixp;
2177
2178 offset = -basesym->sy_obj;
2179
2180 /* @@ This assumes all entries in a given section will be of the same
2181 size... Probably correct, but unwise to rely on. */
2182 /* This must always be called with the same subsegment. */
2183
2184 if (seginfo->frchainP)
2185 for (fixp = seginfo->frchainP->fix_root;
2186 fixp != (fixS *) NULL;
2187 fixp = fixp->fx_next, offset += 8)
2188 {
2189 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2190 {
2191 if (range_signed_16 (offset))
2192 {
2193 return offset;
2194 }
2195 }
2196 }
2197
2198 /* Not found in 16bit signed range. */
2199
2200 subseg_set (alpha_link_section, 0);
2201 p = frag_more (8);
2202 memset (p, 0, 8);
2203
2204 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
2205 BFD_RELOC_64);
2206
2207 subseg_set (current_section, current_subsec);
2208 seginfo->literal_pool_size += 8;
2209 return offset;
2210}
2211
2212#endif /* OBJ_EVAX */
2213
2214/* Load a (partial) expression into a target register.
2215
2216 If poffset is not null, after the call it will either contain
2217 O_constant 0, or a 16-bit offset appropriate for any MEM format
2218 instruction. In addition, pbasereg will be modified to point to
2219 the base register to use in that MEM format instruction.
2220
2221 In any case, *pbasereg should contain a base register to add to the
2222 expression. This will normally be either AXP_REG_ZERO or
2223 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2224 so "foo($0)" is interpreted as adding the address of foo to $0;
2225 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2226 but this is what OSF/1 does.
2227
2228 Finally, the return value is true if the calling macro may emit a
2229 LITUSE reloc if otherwise appropriate. */
2230
2231static int
2232load_expression (targreg, exp, pbasereg, poffset)
2233 int targreg;
2234 const expressionS *exp;
2235 int *pbasereg;
2236 expressionS *poffset;
2237{
2238 int emit_lituse = 0;
2239 offsetT addend = exp->X_add_number;
2240 int basereg = *pbasereg;
2241 struct alpha_insn insn;
2242 expressionS newtok[3];
2243
2244 switch (exp->X_op)
2245 {
2246 case O_symbol:
2247 {
2248#ifdef OBJ_ECOFF
2249 offsetT lit;
2250
2251 /* attempt to reduce .lit load by splitting the offset from
2252 its symbol when possible, but don't create a situation in
2253 which we'd fail. */
2254 if (!range_signed_32 (addend) &&
2255 (alpha_noat_on || targreg == AXP_REG_AT))
2256 {
2257 lit = add_to_literal_pool (exp->X_add_symbol, addend,
2258 alpha_lita_section, 8);
2259 addend = 0;
2260 }
2261 else
2262 {
2263 lit = add_to_literal_pool (exp->X_add_symbol, 0,
2264 alpha_lita_section, 8);
2265 }
2266
2267 if (lit >= 0x8000)
2268 as_fatal (_("overflow in literal (.lita) table"));
2269
2270 /* emit "ldq r, lit(gp)" */
2271
2272 if (basereg != alpha_gp_register && targreg == basereg)
2273 {
2274 if (alpha_noat_on)
2275 as_bad (_("macro requires $at register while noat in effect"));
2276 if (targreg == AXP_REG_AT)
2277 as_bad (_("macro requires $at while $at in use"));
2278
2279 set_tok_reg (newtok[0], AXP_REG_AT);
2280 }
2281 else
2282 set_tok_reg (newtok[0], targreg);
2283 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
2284 set_tok_preg (newtok[2], alpha_gp_register);
2285
2286 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2287
2288 assert (insn.nfixups == 1);
2289 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
2290#endif /* OBJ_ECOFF */
2291#ifdef OBJ_ELF
2292 /* emit "ldq r, gotoff(gp)" */
2293
2294 if (basereg != alpha_gp_register && targreg == basereg)
2295 {
2296 if (alpha_noat_on)
2297 as_bad (_("macro requires $at register while noat in effect"));
2298 if (targreg == AXP_REG_AT)
2299 as_bad (_("macro requires $at while $at in use"));
2300
2301 set_tok_reg (newtok[0], AXP_REG_AT);
2302 }
2303 else
2304 set_tok_reg (newtok[0], targreg);
2305
2306 /* XXX: Disable this .got minimizing optimization so that we can get
2307 better instruction offset knowledge in the compiler. This happens
2308 very infrequently anyway. */
2309 if (1 || (!range_signed_32 (addend)
2310 && (alpha_noat_on || targreg == AXP_REG_AT)))
2311 {
2312 newtok[1] = *exp;
2313 addend = 0;
2314 }
2315 else
2316 {
2317 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
2318 }
2319
2320 set_tok_preg (newtok[2], alpha_gp_register);
2321
2322 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2323
2324 assert (insn.nfixups == 1);
2325 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
2326#endif /* OBJ_ELF */
2327#ifdef OBJ_EVAX
2328 offsetT link;
2329
2330 /* Find symbol or symbol pointer in link section. */
2331
2332 if (exp->X_add_symbol == alpha_evax_proc.symbol)
2333 {
2334 if (range_signed_16 (addend))
2335 {
2336 set_tok_reg (newtok[0], targreg);
2337 set_tok_const (newtok[1], addend);
2338 set_tok_preg (newtok[2], basereg);
2339 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2340 addend = 0;
2341 }
2342 else
2343 {
2344 set_tok_reg (newtok[0], targreg);
2345 set_tok_const (newtok[1], 0);
2346 set_tok_preg (newtok[2], basereg);
2347 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2348 }
2349 }
2350 else
2351 {
2352 if (!range_signed_32 (addend))
2353 {
2354 link = add_to_link_pool (alpha_evax_proc.symbol,
2355 exp->X_add_symbol, addend);
2356 addend = 0;
2357 }
2358 else
2359 {
2360 link = add_to_link_pool (alpha_evax_proc.symbol,
2361 exp->X_add_symbol, 0);
2362 }
2363 set_tok_reg (newtok[0], targreg);
2364 set_tok_const (newtok[1], link);
2365 set_tok_preg (newtok[2], basereg);
2366 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2367 }
2368#endif /* OBJ_EVAX */
2369
2370 emit_insn(&insn);
2371
2372#ifndef OBJ_EVAX
2373 emit_lituse = 1;
2374
2375 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
2376 {
2377 /* emit "addq r, base, r" */
2378
2379 set_tok_reg (newtok[1], basereg);
2380 set_tok_reg (newtok[2], targreg);
2381 assemble_tokens ("addq", newtok, 3, 0);
2382 }
2383#endif
2384
2385 basereg = targreg;
2386 }
2387 break;
2388
2389 case O_constant:
2390 break;
2391
2392 case O_subtract:
2393 /* Assume that this difference expression will be resolved to an
2394 absolute value and that that value will fit in 16 bits. */
2395
2396 set_tok_reg (newtok[0], targreg);
2397 newtok[1] = *exp;
2398 set_tok_preg (newtok[2], basereg);
2399 assemble_tokens ("lda", newtok, 3, 0);
2400
2401 if (poffset)
2402 set_tok_const (*poffset, 0);
2403 return 0;
2404
2405 case O_big:
2406 if (exp->X_add_number > 0)
2407 as_bad (_("bignum invalid; zero assumed"));
2408 else
2409 as_bad (_("floating point number invalid; zero assumed"));
2410 addend = 0;
2411 break;
2412
2413 default:
2414 as_bad (_("can't handle expression"));
2415 addend = 0;
2416 break;
2417 }
2418
2419 if (!range_signed_32 (addend))
2420 {
2421 offsetT lit;
2422
2423 /* for 64-bit addends, just put it in the literal pool */
2424
2425#ifdef OBJ_EVAX
2426 /* emit "ldq targreg, lit(basereg)" */
2427 lit = add_to_link_pool (alpha_evax_proc.symbol,
2428 section_symbol (absolute_section), addend);
2429 set_tok_reg (newtok[0], targreg);
2430 set_tok_const (newtok[1], lit);
2431 set_tok_preg (newtok[2], alpha_gp_register);
2432 assemble_tokens ("ldq", newtok, 3, 0);
2433#else
2434
2435 if (alpha_lit8_section == NULL)
2436 {
2437 create_literal_section (".lit8",
2438 &alpha_lit8_section,
2439 &alpha_lit8_symbol);
2440
2441#ifdef OBJ_ECOFF
2442 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
2443 alpha_lita_section, 8);
2444 if (alpha_lit8_literal >= 0x8000)
2445 as_fatal (_("overflow in literal (.lita) table"));
2446#endif
2447 }
2448
2449 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
2450 if (lit >= 0x8000)
2451 as_fatal (_("overflow in literal (.lit8) table"));
2452
2453 /* emit "lda litreg, .lit8+0x8000" */
2454
2455 if (targreg == basereg)
2456 {
2457 if (alpha_noat_on)
2458 as_bad (_("macro requires $at register while noat in effect"));
2459 if (targreg == AXP_REG_AT)
2460 as_bad (_("macro requires $at while $at in use"));
2461
2462 set_tok_reg (newtok[0], AXP_REG_AT);
2463 }
2464 else
2465 set_tok_reg (newtok[0], targreg);
2466#ifdef OBJ_ECOFF
2467 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
2468#endif
2469#ifdef OBJ_ELF
2470 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
2471#endif
2472 set_tok_preg (newtok[2], alpha_gp_register);
2473
2474 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2475
2476 assert (insn.nfixups == 1);
2477#ifdef OBJ_ECOFF
2478 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
2479#endif
2480#ifdef OBJ_ELF
2481 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
2482#endif
2483
2484 emit_insn (&insn);
2485
2486 /* emit "ldq litreg, lit(litreg)" */
2487
2488 set_tok_const (newtok[1], lit);
2489 set_tok_preg (newtok[2], newtok[0].X_add_number);
2490
2491 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2492
2493 assert (insn.nfixups < MAX_INSN_FIXUPS);
2494 if (insn.nfixups > 0)
2495 {
2496 memmove (&insn.fixups[1], &insn.fixups[0],
2497 sizeof(struct alpha_fixup) * insn.nfixups);
2498 }
2499 insn.nfixups++;
2500 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2501 insn.fixups[0].exp.X_op = O_constant;
2502 insn.fixups[0].exp.X_add_number = 1;
2503 emit_lituse = 0;
2504
2505 emit_insn (&insn);
2506
2507 /* emit "addq litreg, base, target" */
2508
2509 if (basereg != AXP_REG_ZERO)
2510 {
2511 set_tok_reg (newtok[1], basereg);
2512 set_tok_reg (newtok[2], targreg);
2513 assemble_tokens ("addq", newtok, 3, 0);
2514 }
2515#endif /* !OBJ_EVAX */
2516
2517 if (poffset)
2518 set_tok_const (*poffset, 0);
2519 *pbasereg = targreg;
2520 }
2521 else
2522 {
2523 offsetT low, high, extra, tmp;
2524
2525 /* for 32-bit operands, break up the addend */
2526
2527 low = sign_extend_16 (addend);
2528 tmp = addend - low;
2529 high = sign_extend_16 (tmp >> 16);
2530
2531 if (tmp - (high << 16))
2532 {
2533 extra = 0x4000;
2534 tmp -= 0x40000000;
2535 high = sign_extend_16 (tmp >> 16);
2536 }
2537 else
2538 extra = 0;
2539
2540 set_tok_reg (newtok[0], targreg);
2541 set_tok_preg (newtok[2], basereg);
2542
2543 if (extra)
2544 {
2545 /* emit "ldah r, extra(r) */
2546 set_tok_const (newtok[1], extra);
2547 assemble_tokens ("ldah", newtok, 3, 0);
2548 set_tok_preg (newtok[2], basereg = targreg);
2549 }
2550
2551 if (high)
2552 {
2553 /* emit "ldah r, high(r) */
2554 set_tok_const (newtok[1], high);
2555 assemble_tokens ("ldah", newtok, 3, 0);
2556 basereg = targreg;
2557 set_tok_preg (newtok[2], basereg);
2558 }
2559
2560 if ((low && !poffset) || (!poffset && basereg != targreg))
2561 {
2562 /* emit "lda r, low(base)" */
2563 set_tok_const (newtok[1], low);
2564 assemble_tokens ("lda", newtok, 3, 0);
2565 basereg = targreg;
2566 low = 0;
2567 }
2568
2569 if (poffset)
2570 set_tok_const (*poffset, low);
2571 *pbasereg = basereg;
2572 }
2573
2574 return emit_lituse;
2575}
2576
2577/* The lda macro differs from the lda instruction in that it handles
2578 most simple expressions, particualrly symbol address loads and
2579 large constants. */
2580
2581static void
2582emit_lda (tok, ntok, unused)
2583 const expressionS *tok;
2584 int ntok;
2585 const PTR unused;
2586{
2587 int basereg;
2588
2589 if (ntok == 2)
2590 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2591 else
2592 basereg = tok[2].X_add_number;
2593
2594 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
2595}
2596
2597/* The ldah macro differs from the ldah instruction in that it has $31
2598 as an implied base register. */
2599
2600static void
2601emit_ldah (tok, ntok, unused)
2602 const expressionS *tok;
2603 int ntok;
2604 const PTR unused;
2605{
2606 expressionS newtok[3];
2607
2608 newtok[0] = tok[0];
2609 newtok[1] = tok[1];
2610 set_tok_preg (newtok[2], AXP_REG_ZERO);
2611
2612 assemble_tokens ("ldah", newtok, 3, 0);
2613}
2614
2615/* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2616 etc. They differ from the real instructions in that they do simple
2617 expressions like the lda macro. */
2618
2619static void
2620emit_ir_load (tok, ntok, opname)
2621 const expressionS *tok;
2622 int ntok;
2623 const PTR opname;
2624{
2625 int basereg, lituse;
2626 expressionS newtok[3];
2627 struct alpha_insn insn;
2628
2629 if (ntok == 2)
2630 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2631 else
2632 basereg = tok[2].X_add_number;
2633
2634 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
2635 &newtok[1]);
2636
2637 newtok[0] = tok[0];
2638 set_tok_preg (newtok[2], basereg);
2639
2640 assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
2641
2642 if (lituse)
2643 {
2644 assert (insn.nfixups < MAX_INSN_FIXUPS);
2645 if (insn.nfixups > 0)
2646 {
2647 memmove (&insn.fixups[1], &insn.fixups[0],
2648 sizeof(struct alpha_fixup) * insn.nfixups);
2649 }
2650 insn.nfixups++;
2651 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2652 insn.fixups[0].exp.X_op = O_constant;
2653 insn.fixups[0].exp.X_add_number = 1;
2654 }
2655
2656 emit_insn (&insn);
2657}
2658
2659/* Handle fp register loads, and both integer and fp register stores.
2660 Again, we handle simple expressions. */
2661
2662static void
2663emit_loadstore (tok, ntok, opname)
2664 const expressionS *tok;
2665 int ntok;
2666 const PTR opname;
2667{
2668 int basereg, lituse;
2669 expressionS newtok[3];
2670 struct alpha_insn insn;
2671
2672 if (ntok == 2)
2673 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2674 else
2675 basereg = tok[2].X_add_number;
2676
2677 if (tok[1].X_op != O_constant || !range_signed_16(tok[1].X_add_number))
2678 {
2679 if (alpha_noat_on)
2680 as_bad (_("macro requires $at register while noat in effect"));
2681
2682 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
2683 }
2684 else
2685 {
2686 newtok[1] = tok[1];
2687 lituse = 0;
2688 }
2689
2690 newtok[0] = tok[0];
2691 set_tok_preg (newtok[2], basereg);
2692
2693 assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
2694
2695 if (lituse)
2696 {
2697 assert (insn.nfixups < MAX_INSN_FIXUPS);
2698 if (insn.nfixups > 0)
2699 {
2700 memmove (&insn.fixups[1], &insn.fixups[0],
2701 sizeof(struct alpha_fixup) * insn.nfixups);
2702 }
2703 insn.nfixups++;
2704 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2705 insn.fixups[0].exp.X_op = O_constant;
2706 insn.fixups[0].exp.X_add_number = 1;
2707 }
2708
2709 emit_insn (&insn);
2710}
2711
2712/* Load a half-word or byte as an unsigned value. */
2713
2714static void
2715emit_ldXu (tok, ntok, vlgsize)
2716 const expressionS *tok;
2717 int ntok;
2718 const PTR vlgsize;
2719{
2720 if (alpha_target & AXP_OPCODE_BWX)
2721 emit_ir_load (tok, ntok, ldXu_op[(long)vlgsize]);
2722 else
2723 {
2724 expressionS newtok[3];
2725
2726 if (alpha_noat_on)
2727 as_bad (_("macro requires $at register while noat in effect"));
2728
2729 /* emit "lda $at, exp" */
2730
2731 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2732 newtok[0].X_add_number = AXP_REG_AT;
2733 assemble_tokens ("lda", newtok, ntok, 1);
2734
2735 /* emit "ldq_u targ, 0($at)" */
2736
2737 newtok[0] = tok[0];
2738 set_tok_const (newtok[1], 0);
2739 set_tok_preg (newtok[2], AXP_REG_AT);
2740 assemble_tokens ("ldq_u", newtok, 3, 1);
2741
2742 /* emit "extXl targ, $at, targ" */
2743
2744 set_tok_reg (newtok[1], AXP_REG_AT);
2745 newtok[2] = newtok[0];
2746 assemble_tokens (extXl_op[(long)vlgsize], newtok, 3, 1);
2747 }
2748}
2749
2750/* Load a half-word or byte as a signed value. */
2751
2752static void
2753emit_ldX (tok, ntok, vlgsize)
2754 const expressionS *tok;
2755 int ntok;
2756 const PTR vlgsize;
2757{
2758 emit_ldXu (tok, ntok, vlgsize);
2759 assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
2760}
2761
2762/* Load an integral value from an unaligned address as an unsigned
2763 value. */
2764
2765static void
2766emit_uldXu (tok, ntok, vlgsize)
2767 const expressionS *tok;
2768 int ntok;
2769 const PTR vlgsize;
2770{
2771 long lgsize = (long)vlgsize;
2772 expressionS newtok[3];
2773
2774 if (alpha_noat_on)
2775 as_bad (_("macro requires $at register while noat in effect"));
2776
2777 /* emit "lda $at, exp" */
2778
2779 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2780 newtok[0].X_add_number = AXP_REG_AT;
2781 assemble_tokens ("lda", newtok, ntok, 1);
2782
2783 /* emit "ldq_u $t9, 0($at)" */
2784
2785 set_tok_reg (newtok[0], AXP_REG_T9);
2786 set_tok_const (newtok[1], 0);
2787 set_tok_preg (newtok[2], AXP_REG_AT);
2788 assemble_tokens ("ldq_u", newtok, 3, 1);
2789
2790 /* emit "ldq_u $t10, size-1($at)" */
2791
2792 set_tok_reg (newtok[0], AXP_REG_T10);
2793 set_tok_const (newtok[1], (1<<lgsize)-1);
2794 assemble_tokens ("ldq_u", newtok, 3, 1);
2795
2796 /* emit "extXl $t9, $at, $t9" */
2797
2798 set_tok_reg (newtok[0], AXP_REG_T9);
2799 set_tok_reg (newtok[1], AXP_REG_AT);
2800 set_tok_reg (newtok[2], AXP_REG_T9);
2801 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
2802
2803 /* emit "extXh $t10, $at, $t10" */
2804
2805 set_tok_reg (newtok[0], AXP_REG_T10);
2806 set_tok_reg (newtok[2], AXP_REG_T10);
2807 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
2808
2809 /* emit "or $t9, $t10, targ" */
2810
2811 set_tok_reg (newtok[0], AXP_REG_T9);
2812 set_tok_reg (newtok[1], AXP_REG_T10);
2813 newtok[2] = tok[0];
2814 assemble_tokens ("or", newtok, 3, 1);
2815}
2816
2817/* Load an integral value from an unaligned address as a signed value.
2818 Note that quads should get funneled to the unsigned load since we
2819 don't have to do the sign extension. */
2820
2821static void
2822emit_uldX (tok, ntok, vlgsize)
2823 const expressionS *tok;
2824 int ntok;
2825 const PTR vlgsize;
2826{
2827 emit_uldXu (tok, ntok, vlgsize);
2828 assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
2829}
2830
2831/* Implement the ldil macro. */
2832
2833static void
2834emit_ldil (tok, ntok, unused)
2835 const expressionS *tok;
2836 int ntok;
2837 const PTR unused;
2838{
2839 expressionS newtok[2];
2840
2841 memcpy (newtok, tok, sizeof(newtok));
2842 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
2843
2844 assemble_tokens ("lda", newtok, ntok, 1);
2845}
2846
2847/* Store a half-word or byte. */
2848
2849static void
2850emit_stX (tok, ntok, vlgsize)
2851 const expressionS *tok;
2852 int ntok;
2853 const PTR vlgsize;
2854{
2855 int lgsize = (int)(long)vlgsize;
2856
2857 if (alpha_target & AXP_OPCODE_BWX)
2858 emit_loadstore (tok, ntok, stX_op[lgsize]);
2859 else
2860 {
2861 expressionS newtok[3];
2862
2863 if (alpha_noat_on)
2864 as_bad(_("macro requires $at register while noat in effect"));
2865
2866 /* emit "lda $at, exp" */
2867
2868 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2869 newtok[0].X_add_number = AXP_REG_AT;
2870 assemble_tokens ("lda", newtok, ntok, 1);
2871
2872 /* emit "ldq_u $t9, 0($at)" */
2873
2874 set_tok_reg (newtok[0], AXP_REG_T9);
2875 set_tok_const (newtok[1], 0);
2876 set_tok_preg (newtok[2], AXP_REG_AT);
2877 assemble_tokens ("ldq_u", newtok, 3, 1);
2878
2879 /* emit "insXl src, $at, $t10" */
2880
2881 newtok[0] = tok[0];
2882 set_tok_reg (newtok[1], AXP_REG_AT);
2883 set_tok_reg (newtok[2], AXP_REG_T10);
2884 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
2885
2886 /* emit "mskXl $t9, $at, $t9" */
2887
2888 set_tok_reg (newtok[0], AXP_REG_T9);
2889 newtok[2] = newtok[0];
2890 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
2891
2892 /* emit "or $t9, $t10, $t9" */
2893
2894 set_tok_reg (newtok[1], AXP_REG_T10);
2895 assemble_tokens ("or", newtok, 3, 1);
2896
2897 /* emit "stq_u $t9, 0($at) */
2898
2899 set_tok_const (newtok[1], 0);
2900 set_tok_preg (newtok[2], AXP_REG_AT);
2901 assemble_tokens ("stq_u", newtok, 3, 1);
2902 }
2903}
2904
2905/* Store an integer to an unaligned address. */
2906
2907static void
2908emit_ustX (tok, ntok, vlgsize)
2909 const expressionS *tok;
2910 int ntok;
2911 const PTR vlgsize;
2912{
2913 int lgsize = (int)(long)vlgsize;
2914 expressionS newtok[3];
2915
2916 /* emit "lda $at, exp" */
2917
2918 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2919 newtok[0].X_add_number = AXP_REG_AT;
2920 assemble_tokens ("lda", newtok, ntok, 1);
2921
2922 /* emit "ldq_u $9, 0($at)" */
2923
2924 set_tok_reg (newtok[0], AXP_REG_T9);
2925 set_tok_const (newtok[1], 0);
2926 set_tok_preg (newtok[2], AXP_REG_AT);
2927 assemble_tokens ("ldq_u", newtok, 3, 1);
2928
2929 /* emit "ldq_u $10, size-1($at)" */
2930
2931 set_tok_reg (newtok[0], AXP_REG_T10);
2932 set_tok_const (newtok[1], (1 << lgsize)-1);
2933 assemble_tokens ("ldq_u", newtok, 3, 1);
2934
2935 /* emit "insXl src, $at, $t11" */
2936
2937 newtok[0] = tok[0];
2938 set_tok_reg (newtok[1], AXP_REG_AT);
2939 set_tok_reg (newtok[2], AXP_REG_T11);
2940 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
2941
2942 /* emit "insXh src, $at, $t12" */
2943
2944 set_tok_reg (newtok[2], AXP_REG_T12);
2945 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
2946
2947 /* emit "mskXl $t9, $at, $t9" */
2948
2949 set_tok_reg (newtok[0], AXP_REG_T9);
2950 newtok[2] = newtok[0];
2951 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
2952
2953 /* emit "mskXh $t10, $at, $t10" */
2954
2955 set_tok_reg (newtok[0], AXP_REG_T10);
2956 newtok[2] = newtok[0];
2957 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
2958
2959 /* emit "or $t9, $t11, $t9" */
2960
2961 set_tok_reg (newtok[0], AXP_REG_T9);
2962 set_tok_reg (newtok[1], AXP_REG_T11);
2963 newtok[2] = newtok[0];
2964 assemble_tokens ("or", newtok, 3, 1);
2965
2966 /* emit "or $t10, $t12, $t10" */
2967
2968 set_tok_reg (newtok[0], AXP_REG_T10);
2969 set_tok_reg (newtok[1], AXP_REG_T12);
2970 newtok[2] = newtok[0];
2971 assemble_tokens ("or", newtok, 3, 1);
2972
2973 /* emit "stq_u $t9, 0($at)" */
2974
2975 set_tok_reg (newtok[0], AXP_REG_T9);
2976 set_tok_const (newtok[1], 0);
2977 set_tok_preg (newtok[2], AXP_REG_AT);
2978 assemble_tokens ("stq_u", newtok, 3, 1);
2979
2980 /* emit "stq_u $t10, size-1($at)" */
2981
2982 set_tok_reg (newtok[0], AXP_REG_T10);
2983 set_tok_const (newtok[1], (1 << lgsize)-1);
2984 assemble_tokens ("stq_u", newtok, 3, 1);
2985}
2986
2987/* Sign extend a half-word or byte. The 32-bit sign extend is
2988 implemented as "addl $31, $r, $t" in the opcode table. */
2989
2990static void
2991emit_sextX (tok, ntok, vlgsize)
2992 const expressionS *tok;
2993 int ntok;
2994 const PTR vlgsize;
2995{
2996 long lgsize = (long)vlgsize;
2997
2998 if (alpha_target & AXP_OPCODE_BWX)
2999 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3000 else
3001 {
3002 int bitshift = 64 - 8 * (1 << lgsize);
3003 expressionS newtok[3];
3004
3005 /* emit "sll src,bits,dst" */
3006
3007 newtok[0] = tok[0];
3008 set_tok_const (newtok[1], bitshift);
3009 newtok[2] = tok[ntok - 1];
3010 assemble_tokens ("sll", newtok, 3, 1);
3011
3012 /* emit "sra dst,bits,dst" */
3013
3014 newtok[0] = newtok[2];
3015 assemble_tokens ("sra", newtok, 3, 1);
3016 }
3017}
3018
3019/* Implement the division and modulus macros. */
3020
3021#ifdef OBJ_EVAX
3022
3023/* Make register usage like in normal procedure call.
3024 Don't clobber PV and RA. */
3025
3026static void
3027emit_division (tok, ntok, symname)
3028 const expressionS *tok;
3029 int ntok;
3030 const PTR symname;
3031{
3032 /* DIVISION and MODULUS. Yech.
3033 *
3034 * Convert
3035 * OP x,y,result
3036 * to
3037 * mov x,R16 # if x != R16
3038 * mov y,R17 # if y != R17
3039 * lda AT,__OP
3040 * jsr AT,(AT),0
3041 * mov R0,result
3042 *
3043 * with appropriate optimizations if R0,R16,R17 are the registers
3044 * specified by the compiler.
3045 */
3046
3047 int xr, yr, rr;
3048 symbolS *sym;
3049 expressionS newtok[3];
3050
3051 xr = regno (tok[0].X_add_number);
3052 yr = regno (tok[1].X_add_number);
3053
3054 if (ntok < 3)
3055 rr = xr;
3056 else
3057 rr = regno (tok[2].X_add_number);
3058
3059 /* Move the operands into the right place */
3060 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3061 {
3062 /* They are in exactly the wrong order -- swap through AT */
3063
3064 if (alpha_noat_on)
3065 as_bad (_("macro requires $at register while noat in effect"));
3066
3067 set_tok_reg (newtok[0], AXP_REG_R16);
3068 set_tok_reg (newtok[1], AXP_REG_AT);
3069 assemble_tokens ("mov", newtok, 2, 1);
3070
3071 set_tok_reg (newtok[0], AXP_REG_R17);
3072 set_tok_reg (newtok[1], AXP_REG_R16);
3073 assemble_tokens ("mov", newtok, 2, 1);
3074
3075 set_tok_reg (newtok[0], AXP_REG_AT);
3076 set_tok_reg (newtok[1], AXP_REG_R17);
3077 assemble_tokens ("mov", newtok, 2, 1);
3078 }
3079 else
3080 {
3081 if (yr == AXP_REG_R16)
3082 {
3083 set_tok_reg (newtok[0], AXP_REG_R16);
3084 set_tok_reg (newtok[1], AXP_REG_R17);
3085 assemble_tokens ("mov", newtok, 2, 1);
3086 }
3087
3088 if (xr != AXP_REG_R16)
3089 {
3090 set_tok_reg (newtok[0], xr);
3091 set_tok_reg (newtok[1], AXP_REG_R16);
3092 assemble_tokens ("mov", newtok, 2, 1);
3093 }
3094
3095 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3096 {
3097 set_tok_reg (newtok[0], yr);
3098 set_tok_reg (newtok[1], AXP_REG_R17);
3099 assemble_tokens ("mov", newtok, 2, 1);
3100 }
3101 }
3102
3103 sym = symbol_find_or_make ((const char *)symname);
3104
3105 set_tok_reg (newtok[0], AXP_REG_AT);
3106 set_tok_sym (newtok[1], sym, 0);
3107 assemble_tokens ("lda", newtok, 2, 1);
3108
3109 /* Call the division routine */
3110 set_tok_reg (newtok[0], AXP_REG_AT);
3111 set_tok_cpreg (newtok[1], AXP_REG_AT);
3112 set_tok_const (newtok[2], 0);
3113 assemble_tokens ("jsr", newtok, 3, 1);
3114
3115 /* Move the result to the right place */
3116 if (rr != AXP_REG_R0)
3117 {
3118 set_tok_reg (newtok[0], AXP_REG_R0);
3119 set_tok_reg (newtok[1], rr);
3120 assemble_tokens ("mov", newtok, 2, 1);
3121 }
3122}
3123
3124#else /* !OBJ_EVAX */
3125
3126static void
3127emit_division (tok, ntok, symname)
3128 const expressionS *tok;
3129 int ntok;
3130 const PTR symname;
3131{
3132 /* DIVISION and MODULUS. Yech.
3133 * Convert
3134 * OP x,y,result
3135 * to
3136 * lda pv,__OP
3137 * mov x,t10
3138 * mov y,t11
3139 * jsr t9,(pv),__OP
3140 * mov t12,result
3141 *
3142 * with appropriate optimizations if t10,t11,t12 are the registers
3143 * specified by the compiler.
3144 */
3145
3146 int xr, yr, rr;
3147 symbolS *sym;
3148 expressionS newtok[3];
3149
3150 xr = regno (tok[0].X_add_number);
3151 yr = regno (tok[1].X_add_number);
3152
3153 if (ntok < 3)
3154 rr = xr;
3155 else
3156 rr = regno (tok[2].X_add_number);
3157
3158 sym = symbol_find_or_make ((const char *)symname);
3159
3160 /* Move the operands into the right place */
3161 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
3162 {
3163 /* They are in exactly the wrong order -- swap through AT */
3164
3165 if (alpha_noat_on)
3166 as_bad (_("macro requires $at register while noat in effect"));
3167
3168 set_tok_reg (newtok[0], AXP_REG_T10);
3169 set_tok_reg (newtok[1], AXP_REG_AT);
3170 assemble_tokens ("mov", newtok, 2, 1);
3171
3172 set_tok_reg (newtok[0], AXP_REG_T11);
3173 set_tok_reg (newtok[1], AXP_REG_T10);
3174 assemble_tokens ("mov", newtok, 2, 1);
3175
3176 set_tok_reg (newtok[0], AXP_REG_AT);
3177 set_tok_reg (newtok[1], AXP_REG_T11);
3178 assemble_tokens ("mov", newtok, 2, 1);
3179 }
3180 else
3181 {
3182 if (yr == AXP_REG_T10)
3183 {
3184 set_tok_reg (newtok[0], AXP_REG_T10);
3185 set_tok_reg (newtok[1], AXP_REG_T11);
3186 assemble_tokens ("mov", newtok, 2, 1);
3187 }
3188
3189 if (xr != AXP_REG_T10)
3190 {
3191 set_tok_reg (newtok[0], xr);
3192 set_tok_reg (newtok[1], AXP_REG_T10);
3193 assemble_tokens ("mov", newtok, 2, 1);
3194 }
3195
3196 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
3197 {
3198 set_tok_reg (newtok[0], yr);
3199 set_tok_reg (newtok[1], AXP_REG_T11);
3200 assemble_tokens ("mov", newtok, 2, 1);
3201 }
3202 }
3203
3204 /* Call the division routine */
3205 set_tok_reg (newtok[0], AXP_REG_T9);
3206 set_tok_sym (newtok[1], sym, 0);
3207 assemble_tokens ("jsr", newtok, 2, 1);
3208
3209 /* Reload the GP register */
3210#ifdef OBJ_AOUT
3211FIXME
3212#endif
3213#if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3214 set_tok_reg (newtok[0], alpha_gp_register);
3215 set_tok_const (newtok[1], 0);
3216 set_tok_preg (newtok[2], AXP_REG_T9);
3217 assemble_tokens ("ldgp", newtok, 3, 1);
3218#endif
3219
3220 /* Move the result to the right place */
3221 if (rr != AXP_REG_T12)
3222 {
3223 set_tok_reg (newtok[0], AXP_REG_T12);
3224 set_tok_reg (newtok[1], rr);
3225 assemble_tokens ("mov", newtok, 2, 1);
3226 }
3227}
3228
3229#endif /* !OBJ_EVAX */
3230
3231/* The jsr and jmp macros differ from their instruction counterparts
3232 in that they can load the target address and default most
3233 everything. */
3234
3235static void
3236emit_jsrjmp (tok, ntok, vopname)
3237 const expressionS *tok;
3238 int ntok;
3239 const PTR vopname;
3240{
3241 const char *opname = (const char *) vopname;
3242 struct alpha_insn insn;
3243 expressionS newtok[3];
3244 int r, tokidx = 0, lituse = 0;
3245
3246 if (tokidx < ntok && tok[tokidx].X_op == O_register)
3247 r = regno (tok[tokidx++].X_add_number);
3248 else
3249 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
3250
3251 set_tok_reg (newtok[0], r);
3252
3253 if (tokidx < ntok &&
3254 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
3255 r = regno (tok[tokidx++].X_add_number);
3256#ifdef OBJ_EVAX
3257 /* keep register if jsr $n.<sym> */
3258#else
3259 else
3260 {
3261 int basereg = alpha_gp_register;
3262 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
3263 }
3264#endif
3265
3266 set_tok_cpreg (newtok[1], r);
3267
3268#ifdef OBJ_EVAX
3269 /* FIXME: Add hint relocs to BFD for evax. */
3270#else
3271 if (tokidx < ntok)
3272 newtok[2] = tok[tokidx];
3273 else
3274#endif
3275 set_tok_const (newtok[2], 0);
3276
3277 assemble_tokens_to_insn (opname, newtok, 3, &insn);
3278
3279 /* add the LITUSE fixup */
3280 if (lituse)
3281 {
3282 assert (insn.nfixups < MAX_INSN_FIXUPS);
3283 if (insn.nfixups > 0)
3284 {
3285 memmove (&insn.fixups[1], &insn.fixups[0],
3286 sizeof(struct alpha_fixup) * insn.nfixups);
3287 }
3288 insn.nfixups++;
3289 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
3290 insn.fixups[0].exp.X_op = O_constant;
3291 insn.fixups[0].exp.X_add_number = 3;
3292 }
3293
3294 emit_insn (&insn);
3295}
3296
3297/* The ret and jcr instructions differ from their instruction
3298 counterparts in that everything can be defaulted. */
3299
3300static void
3301emit_retjcr (tok, ntok, vopname)
3302 const expressionS *tok;
3303 int ntok;
3304 const PTR vopname;
3305{
3306 const char *opname = (const char *)vopname;
3307 expressionS newtok[3];
3308 int r, tokidx = 0;
3309
3310 if (tokidx < ntok && tok[tokidx].X_op == O_register)
3311 r = regno (tok[tokidx++].X_add_number);
3312 else
3313 r = AXP_REG_ZERO;
3314
3315 set_tok_reg (newtok[0], r);
3316
3317 if (tokidx < ntok &&
3318 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
3319 r = regno (tok[tokidx++].X_add_number);
3320 else
3321 r = AXP_REG_RA;
3322
3323 set_tok_cpreg (newtok[1], r);
3324
3325 if (tokidx < ntok)
3326 newtok[2] = tok[tokidx];
3327 else
3328 set_tok_const (newtok[2], strcmp(opname, "ret") == 0);
3329
3330 assemble_tokens (opname, newtok, 3, 0);
3331}
3332\f
3333/* Assembler directives */
3334
3335/* Handle the .text pseudo-op. This is like the usual one, but it
3336 clears alpha_insn_label and restores auto alignment. */
3337
3338static void
3339s_alpha_text (i)
3340 int i;
3341
3342{
3343 s_text (i);
3344 alpha_insn_label = NULL;
3345 alpha_auto_align_on = 1;
3346 alpha_current_align = 0;
3347}
3348
3349/* Handle the .data pseudo-op. This is like the usual one, but it
3350 clears alpha_insn_label and restores auto alignment. */
3351
3352static void
3353s_alpha_data (i)
3354 int i;
3355{
3356 s_data (i);
3357 alpha_insn_label = NULL;
3358 alpha_auto_align_on = 1;
3359 alpha_current_align = 0;
3360}
3361
3362#if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3363
3364/* Handle the OSF/1 and openVMS .comm pseudo quirks.
3365 openVMS constructs a section for every common symbol. */
3366
3367static void
3368s_alpha_comm (ignore)
3369 int ignore;
3370{
3371 register char *name;
3372 register char c;
3373 register char *p;
3374 offsetT temp;
3375 register symbolS *symbolP;
3376
3377#ifdef OBJ_EVAX
3378 segT current_section = now_seg;
3379 int current_subsec = now_subseg;
3380 segT new_seg;
3381#endif
3382
3383 name = input_line_pointer;
3384 c = get_symbol_end ();
3385
3386 /* just after name is now '\0' */
3387 p = input_line_pointer;
3388 *p = c;
3389
3390 SKIP_WHITESPACE ();
3391
3392 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3393 if (*input_line_pointer == ',')
3394 {
3395 input_line_pointer++;
3396 SKIP_WHITESPACE ();
3397 }
3398 if ((temp = get_absolute_expression ()) < 0)
3399 {
3400 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
3401 ignore_rest_of_line ();
3402 return;
3403 }
3404
3405 *p = 0;
3406 symbolP = symbol_find_or_make (name);
3407
3408#ifdef OBJ_EVAX
3409 /* Make a section for the common symbol. */
3410 new_seg = subseg_new (xstrdup (name), 0);
3411#endif
3412
3413 *p = c;
3414
3415#ifdef OBJ_EVAX
3416 /* alignment might follow */
3417 if (*input_line_pointer == ',')
3418 {
3419 offsetT align;
3420
3421 input_line_pointer++;
3422 align = get_absolute_expression ();
3423 bfd_set_section_alignment (stdoutput, new_seg, align);
3424 }
3425#endif
3426
3427 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
3428 {
3429 as_bad (_("Ignoring attempt to re-define symbol"));
3430 ignore_rest_of_line ();
3431 return;
3432 }
3433
3434#ifdef OBJ_EVAX
3435 if (bfd_section_size (stdoutput, new_seg) > 0)
3436 {
3437 if (bfd_section_size (stdoutput, new_seg) != temp)
3438 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3439 S_GET_NAME (symbolP),
3440 (long) bfd_section_size (stdoutput, new_seg),
3441 (long) temp);
3442 }
3443#else
3444 if (S_GET_VALUE (symbolP))
3445 {
3446 if (S_GET_VALUE (symbolP) != (valueT) temp)
3447 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3448 S_GET_NAME (symbolP),
3449 (long) S_GET_VALUE (symbolP),
3450 (long) temp);
3451 }
3452#endif
3453 else
3454 {
3455#ifdef OBJ_EVAX
3456 subseg_set (new_seg, 0);
3457 p = frag_more (temp);
3458 new_seg->flags |= SEC_IS_COMMON;
3459 if (! S_IS_DEFINED (symbolP))
3460 symbolP->bsym->section = new_seg;
3461#else
3462 S_SET_VALUE (symbolP, (valueT) temp);
3463#endif
3464 S_SET_EXTERNAL (symbolP);
3465 }
3466
3467#ifdef OBJ_EVAX
3468 subseg_set (current_section, current_subsec);
3469#endif
3470
3471 know (symbolP->sy_frag == &zero_address_frag);
3472
3473 demand_empty_rest_of_line ();
3474}
3475
3476#endif /* ! OBJ_ELF */
3477
3478#ifdef OBJ_ECOFF
3479
3480/* Handle the .rdata pseudo-op. This is like the usual one, but it
3481 clears alpha_insn_label and restores auto alignment. */
3482
3483static void
3484s_alpha_rdata (ignore)
3485 int ignore;
3486{
3487 int temp;
3488
3489 temp = get_absolute_expression ();
3490 subseg_new (".rdata", 0);
3491 demand_empty_rest_of_line ();
3492 alpha_insn_label = NULL;
3493 alpha_auto_align_on = 1;
3494 alpha_current_align = 0;
3495}
3496
3497#endif
3498
3499#ifdef OBJ_ECOFF
3500
3501/* Handle the .sdata pseudo-op. This is like the usual one, but it
3502 clears alpha_insn_label and restores auto alignment. */
3503
3504static void
3505s_alpha_sdata (ignore)
3506 int ignore;
3507{
3508 int temp;
3509
3510 temp = get_absolute_expression ();
3511 subseg_new (".sdata", 0);
3512 demand_empty_rest_of_line ();
3513 alpha_insn_label = NULL;
3514 alpha_auto_align_on = 1;
3515 alpha_current_align = 0;
3516}
3517#endif
3518
3519#ifdef OBJ_ELF
3520
3521/* Handle the .section pseudo-op. This is like the usual one, but it
3522 clears alpha_insn_label and restores auto alignment. */
3523
3524static void
3525s_alpha_section (ignore)
3526 int ignore;
3527{
3528 obj_elf_section (ignore);
3529
3530 alpha_insn_label = NULL;
3531 alpha_auto_align_on = 1;
3532 alpha_current_align = 0;
3533}
3534
3535static void
3536s_alpha_ent (dummy)
3537 int dummy;
3538{
3539 if (ECOFF_DEBUGGING)
3540 ecoff_directive_ent (0);
3541 else
3542 {
3543 char *name, name_end;
3544 name = input_line_pointer;
3545 name_end = get_symbol_end ();
3546
3547 if (! is_name_beginner (*name))
3548 {
3549 as_warn (_(".ent directive has no name"));
3550 *input_line_pointer = name_end;
3551 }
3552 else
3553 {
3554 symbolS *sym;
3555
3556 if (alpha_cur_ent_sym)
3557 as_warn (_("nested .ent directives"));
3558
3559 sym = symbol_find_or_make (name);
3560 sym->bsym->flags |= BSF_FUNCTION;
3561 alpha_cur_ent_sym = sym;
3562
3563 /* The .ent directive is sometimes followed by a number. Not sure
3564 what it really means, but ignore it. */
3565 *input_line_pointer = name_end;
3566 SKIP_WHITESPACE ();
3567 if (*input_line_pointer == ',')
3568 {
3569 input_line_pointer++;
3570 SKIP_WHITESPACE ();
3571 }
3572 if (isdigit (*input_line_pointer) || *input_line_pointer == '-')
3573 (void) get_absolute_expression ();
3574 }
3575 demand_empty_rest_of_line ();
3576 }
3577}
3578
3579static void
3580s_alpha_end (dummy)
3581 int dummy;
3582{
3583 if (ECOFF_DEBUGGING)
3584 ecoff_directive_end (0);
3585 else
3586 {
3587 char *name, name_end;
3588 name = input_line_pointer;
3589 name_end = get_symbol_end ();
3590
3591 if (! is_name_beginner (*name))
3592 {
3593 as_warn (_(".end directive has no name"));
3594 *input_line_pointer = name_end;
3595 }
3596 else
3597 {
3598 symbolS *sym;
3599
3600 sym = symbol_find (name);
3601 if (sym != alpha_cur_ent_sym)
3602 as_warn (_(".end directive names different symbol than .ent"));
3603
3604 /* Create an expression to calculate the size of the function. */
3605 if (sym)
3606 {
3607 sym->sy_obj.size = (expressionS *) xmalloc (sizeof (expressionS));
3608 sym->sy_obj.size->X_op = O_subtract;
3609 sym->sy_obj.size->X_add_symbol
3610 = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
3611 sym->sy_obj.size->X_op_symbol = sym;
3612 sym->sy_obj.size->X_add_number = 0;
3613 }
3614
3615 alpha_cur_ent_sym = NULL;
3616
3617 *input_line_pointer = name_end;
3618 }
3619 demand_empty_rest_of_line ();
3620 }
3621}
3622
3623static void
3624s_alpha_mask (fp)
3625 int fp;
3626{
3627 if (ECOFF_DEBUGGING)
3628 {
3629 if (fp)
3630 ecoff_directive_fmask (0);
3631 else
3632 ecoff_directive_mask (0);
3633 }
3634 else
3635 discard_rest_of_line ();
3636}
3637
3638static void
3639s_alpha_frame (dummy)
3640 int dummy;
3641{
3642 if (ECOFF_DEBUGGING)
3643 ecoff_directive_frame (0);
3644 else
3645 discard_rest_of_line ();
3646}
3647
3648static void
3649s_alpha_prologue (ignore)
3650 int ignore;
3651{
3652 symbolS *sym;
3653 int arg;
3654
3655 arg = get_absolute_expression ();
3656 demand_empty_rest_of_line ();
3657
3658 if (ECOFF_DEBUGGING)
3659 sym = ecoff_get_cur_proc_sym ();
3660 else
3661 sym = alpha_cur_ent_sym;
3662 know (sym != NULL);
3663
3664 switch (arg)
3665 {
3666 case 0: /* No PV required. */
3667 S_SET_OTHER (sym, STO_ALPHA_NOPV);
3668 break;
3669 case 1: /* Std GP load. */
3670 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD);
3671 break;
3672 case 2: /* Non-std use of PV. */
3673 break;
3674
3675 default:
3676 as_bad (_("Invalid argument %d to .prologue."), arg);
3677 break;
3678 }
3679}
3680
3681static void
3682s_alpha_coff_wrapper (which)
3683 int which;
3684{
3685 static void (* const fns[]) PARAMS ((int)) = {
3686 ecoff_directive_begin,
3687 ecoff_directive_bend,
3688 ecoff_directive_def,
3689 ecoff_directive_dim,
3690 ecoff_directive_endef,
3691 ecoff_directive_file,
3692 ecoff_directive_scl,
3693 ecoff_directive_tag,
3694 ecoff_directive_val,
3695 ecoff_directive_loc,
3696 };
3697
3698 assert (which >= 0 && which < sizeof(fns)/sizeof(*fns));
3699
3700 if (ECOFF_DEBUGGING)
3701 (*fns[which])(0);
3702 else
3703 {
3704 as_bad (_("ECOFF debugging is disabled."));
3705 ignore_rest_of_line ();
3706 }
3707}
3708#endif /* OBJ_ELF */
3709
3710#ifdef OBJ_EVAX
3711
3712/* Handle the section specific pseudo-op. */
3713
3714static void
3715s_alpha_section (secid)
3716 int secid;
3717{
3718 int temp;
3719#define EVAX_SECTION_COUNT 5
3720 static char *section_name[EVAX_SECTION_COUNT+1] =
3721 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3722
3723 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
3724 {
3725 as_fatal (_("Unknown section directive"));
3726 demand_empty_rest_of_line ();
3727 return;
3728 }
3729 temp = get_absolute_expression ();
3730 subseg_new (section_name[secid], 0);
3731 demand_empty_rest_of_line ();
3732 alpha_insn_label = NULL;
3733 alpha_auto_align_on = 1;
3734 alpha_current_align = 0;
3735}
3736
3737
3738/* Parse .ent directives. */
3739
3740static void
3741s_alpha_ent (ignore)
3742 int ignore;
3743{
3744 symbolS *symbol;
3745 expressionS symexpr;
3746
3747 alpha_evax_proc.pdsckind = 0;
3748 alpha_evax_proc.framereg = -1;
3749 alpha_evax_proc.framesize = 0;
3750 alpha_evax_proc.rsa_offset = 0;
3751 alpha_evax_proc.ra_save = AXP_REG_RA;
3752 alpha_evax_proc.fp_save = -1;
3753 alpha_evax_proc.imask = 0;
3754 alpha_evax_proc.fmask = 0;
3755 alpha_evax_proc.prologue = 0;
3756 alpha_evax_proc.type = 0;
3757
3758 expression (&symexpr);
3759
3760 if (symexpr.X_op != O_symbol)
3761 {
3762 as_fatal (_(".ent directive has no symbol"));
3763 demand_empty_rest_of_line ();
3764 return;
3765 }
3766
3767 symbol = make_expr_symbol (&symexpr);
3768 symbol->bsym->flags |= BSF_FUNCTION;
3769 alpha_evax_proc.symbol = symbol;
3770
3771 demand_empty_rest_of_line ();
3772 return;
3773}
3774
3775
3776/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3777
3778static void
3779s_alpha_frame (ignore)
3780 int ignore;
3781{
3782 long val;
3783
3784 alpha_evax_proc.framereg = tc_get_register (1);
3785
3786 SKIP_WHITESPACE ();
3787 if (*input_line_pointer++ != ','
3788 || get_absolute_expression_and_terminator (&val) != ',')
3789 {
3790 as_warn (_("Bad .frame directive 1./2. param"));
3791 --input_line_pointer;
3792 demand_empty_rest_of_line ();
3793 return;
3794 }
3795
3796 alpha_evax_proc.framesize = val;
3797
3798 (void) tc_get_register (1);
3799 SKIP_WHITESPACE ();
3800 if (*input_line_pointer++ != ',')
3801 {
3802 as_warn (_("Bad .frame directive 3./4. param"));
3803 --input_line_pointer;
3804 demand_empty_rest_of_line ();
3805 return;
3806 }
3807 alpha_evax_proc.rsa_offset = get_absolute_expression ();
3808
3809 return;
3810}
3811
3812static void
3813s_alpha_pdesc (ignore)
3814 int ignore;
3815{
3816 char *name;
3817 char name_end;
3818 long val;
3819 register char *p;
3820 expressionS exp;
3821 symbolS *entry_sym;
3822 fixS *fixp;
3823 segment_info_type *seginfo = seg_info (alpha_link_section);
3824
3825 if (now_seg != alpha_link_section)
3826 {
3827 as_bad (_(".pdesc directive not in link (.link) section"));
3828 demand_empty_rest_of_line ();
3829 return;
3830 }
3831
3832 if ((alpha_evax_proc.symbol == 0)
3833 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
3834 {
3835 as_fatal (_(".pdesc has no matching .ent"));
3836 demand_empty_rest_of_line ();
3837 return;
3838 }
3839
3840 alpha_evax_proc.symbol->sy_obj = (valueT)seginfo->literal_pool_size;
3841
3842 expression (&exp);
3843 if (exp.X_op != O_symbol)
3844 {
3845 as_warn (_(".pdesc directive has no entry symbol"));
3846 demand_empty_rest_of_line ();
3847 return;
3848 }
3849
3850 entry_sym = make_expr_symbol (&exp);
3851 /* Save bfd symbol of proc desc in function symbol. */
3852 alpha_evax_proc.symbol->bsym->udata.p = (PTR)entry_sym->bsym;
3853
3854 SKIP_WHITESPACE ();
3855 if (*input_line_pointer++ != ',')
3856 {
3857 as_warn (_("No comma after .pdesc <entryname>"));
3858 demand_empty_rest_of_line ();
3859 return;
3860 }
3861
3862 SKIP_WHITESPACE ();
3863 name = input_line_pointer;
3864 name_end = get_symbol_end ();
3865
3866 if (strncmp(name, "stack", 5) == 0)
3867 {
3868 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
3869 }
3870 else if (strncmp(name, "reg", 3) == 0)
3871 {
3872 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
3873 }
3874 else if (strncmp(name, "null", 4) == 0)
3875 {
3876 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
3877 }
3878 else
3879 {
3880 as_fatal (_("unknown procedure kind"));
3881 demand_empty_rest_of_line ();
3882 return;
3883 }
3884
3885 *input_line_pointer = name_end;
3886 demand_empty_rest_of_line ();
3887
3888#ifdef md_flush_pending_output
3889 md_flush_pending_output ();
3890#endif
3891
3892 frag_align (3, 0, 0);
3893 p = frag_more (16);
3894 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3895 fixp->fx_done = 1;
3896 seginfo->literal_pool_size += 16;
3897
3898 *p = alpha_evax_proc.pdsckind
3899 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
3900 *(p+1) = PDSC_S_M_NATIVE
3901 | PDSC_S_M_NO_JACKET;
3902
3903 switch (alpha_evax_proc.pdsckind)
3904 {
3905 case PDSC_S_K_KIND_NULL:
3906 *(p+2) = 0;
3907 *(p+3) = 0;
3908 break;
3909 case PDSC_S_K_KIND_FP_REGISTER:
3910 *(p+2) = alpha_evax_proc.fp_save;
3911 *(p+3) = alpha_evax_proc.ra_save;
3912 break;
3913 case PDSC_S_K_KIND_FP_STACK:
3914 md_number_to_chars (p+2, (valueT)alpha_evax_proc.rsa_offset, 2);
3915 break;
3916 default: /* impossible */
3917 break;
3918 }
3919
3920 *(p+4) = 0;
3921 *(p+5) = alpha_evax_proc.type & 0x0f;
3922
3923 /* Signature offset. */
3924 md_number_to_chars (p+6, (valueT)0, 2);
3925
3926 fix_new_exp (frag_now, p-frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
3927
3928 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
3929 return;
3930
3931 /* Add dummy fix to make add_to_link_pool work. */
3932 p = frag_more (8);
3933 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3934 fixp->fx_done = 1;
3935 seginfo->literal_pool_size += 8;
3936
3937 /* pdesc+16: Size. */
3938 md_number_to_chars (p, (valueT)alpha_evax_proc.framesize, 4);
3939
3940 md_number_to_chars (p+4, (valueT)0, 2);
3941
3942 /* Entry length. */
3943 md_number_to_chars (p+6, alpha_evax_proc.prologue, 2);
3944
3945 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
3946 return;
3947
3948 /* Add dummy fix to make add_to_link_pool work. */
3949 p = frag_more (8);
3950 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3951 fixp->fx_done = 1;
3952 seginfo->literal_pool_size += 8;
3953
3954 /* pdesc+24: register masks. */
3955
3956 md_number_to_chars (p, alpha_evax_proc.imask, 4);
3957 md_number_to_chars (p+4, alpha_evax_proc.fmask, 4);
3958
3959 return;
3960}
3961
3962
3963/* Support for crash debug on vms. */
3964
3965static void
3966s_alpha_name (ignore)
3967 int ignore;
3968{
3969 register char *p;
3970 expressionS exp;
3971 segment_info_type *seginfo = seg_info (alpha_link_section);
3972
3973 if (now_seg != alpha_link_section)
3974 {
3975 as_bad (_(".name directive not in link (.link) section"));
3976 demand_empty_rest_of_line ();
3977 return;
3978 }
3979
3980 expression (&exp);
3981 if (exp.X_op != O_symbol)
3982 {
3983 as_warn (_(".name directive has no symbol"));
3984 demand_empty_rest_of_line ();
3985 return;
3986 }
3987
3988 demand_empty_rest_of_line ();
3989
3990#ifdef md_flush_pending_output
3991 md_flush_pending_output ();
3992#endif
3993
3994 frag_align (3, 0, 0);
3995 p = frag_more (8);
3996 seginfo->literal_pool_size += 8;
3997
3998 fix_new_exp (frag_now, p-frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
3999
4000 return;
4001}
4002
4003
4004static void
4005s_alpha_linkage (ignore)
4006 int ignore;
4007{
4008 expressionS exp;
4009 char *p;
4010
4011#ifdef md_flush_pending_output
4012 md_flush_pending_output ();
4013#endif
4014
4015 expression (&exp);
4016 if (exp.X_op != O_symbol)
4017 {
4018 as_fatal (_("No symbol after .linkage"));
4019 }
4020 else
4021 {
4022 p = frag_more (LKP_S_K_SIZE);
4023 memset (p, 0, LKP_S_K_SIZE);
4024 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
4025 BFD_RELOC_ALPHA_LINKAGE);
4026 }
4027 demand_empty_rest_of_line ();
4028
4029 return;
4030}
4031
4032
4033static void
4034s_alpha_code_address (ignore)
4035 int ignore;
4036{
4037 expressionS exp;
4038 char *p;
4039
4040#ifdef md_flush_pending_output
4041 md_flush_pending_output ();
4042#endif
4043
4044 expression (&exp);
4045 if (exp.X_op != O_symbol)
4046 {
4047 as_fatal (_("No symbol after .code_address"));
4048 }
4049 else
4050 {
4051 p = frag_more (8);
4052 memset (p, 0, 8);
4053 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4054 BFD_RELOC_ALPHA_CODEADDR);
4055 }
4056 demand_empty_rest_of_line ();
4057
4058 return;
4059}
4060
4061
4062static void
4063s_alpha_fp_save (ignore)
4064 int ignore;
4065{
4066
4067 alpha_evax_proc.fp_save = tc_get_register (1);
4068
4069 demand_empty_rest_of_line ();
4070 return;
4071}
4072
4073
4074static void
4075s_alpha_mask (ignore)
4076 int ignore;
4077{
4078 long val;
4079
4080 if (get_absolute_expression_and_terminator (&val) != ',')
4081 {
4082 as_warn (_("Bad .mask directive"));
4083 --input_line_pointer;
4084 }
4085 else
4086 {
4087 alpha_evax_proc.imask = val;
4088 (void)get_absolute_expression ();
4089 }
4090 demand_empty_rest_of_line ();
4091
4092 return;
4093}
4094
4095
4096static void
4097s_alpha_fmask (ignore)
4098 int ignore;
4099{
4100 long val;
4101
4102 if (get_absolute_expression_and_terminator (&val) != ',')
4103 {
4104 as_warn (_("Bad .fmask directive"));
4105 --input_line_pointer;
4106 }
4107 else
4108 {
4109 alpha_evax_proc.fmask = val;
4110 (void) get_absolute_expression ();
4111 }
4112 demand_empty_rest_of_line ();
4113
4114 return;
4115}
4116
4117static void
4118s_alpha_end (ignore)
4119 int ignore;
4120{
4121 char c;
4122
4123 c = get_symbol_end ();
4124 *input_line_pointer = c;
4125 demand_empty_rest_of_line ();
4126 alpha_evax_proc.symbol = 0;
4127
4128 return;
4129}
4130
4131
4132static void
4133s_alpha_file (ignore)
4134 int ignore;
4135{
4136 symbolS *s;
4137 int length;
4138 static char case_hack[32];
4139
4140 extern char *demand_copy_string PARAMS ((int *lenP));
4141
4142 sprintf (case_hack, "<CASE:%01d%01d>",
4143 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
4144
4145 s = symbol_find_or_make (case_hack);
4146 s->bsym->flags |= BSF_FILE;
4147
4148 get_absolute_expression ();
4149 s = symbol_find_or_make (demand_copy_string (&length));
4150 s->bsym->flags |= BSF_FILE;
4151 demand_empty_rest_of_line ();
4152
4153 return;
4154}
4155#endif /* OBJ_EVAX */
4156
4157/* Handle the .gprel32 pseudo op. */
4158
4159static void
4160s_alpha_gprel32 (ignore)
4161 int ignore;
4162{
4163 expressionS e;
4164 char *p;
4165
4166 SKIP_WHITESPACE ();
4167 expression (&e);
4168
4169#ifdef OBJ_ELF
4170 switch (e.X_op)
4171 {
4172 case O_constant:
4173 e.X_add_symbol = section_symbol(absolute_section);
4174 e.X_op = O_symbol;
4175 /* FALLTHRU */
4176 case O_symbol:
4177 break;
4178 default:
4179 abort();
4180 }
4181#else
4182#ifdef OBJ_ECOFF
4183 switch (e.X_op)
4184 {
4185 case O_constant:
4186 e.X_add_symbol = section_symbol (absolute_section);
4187 /* fall through */
4188 case O_symbol:
4189 e.X_op = O_subtract;
4190 e.X_op_symbol = alpha_gp_symbol;
4191 break;
4192 default:
4193 abort ();
4194 }
4195#endif
4196#endif
4197
4198 if (alpha_auto_align_on && alpha_current_align < 2)
4199 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
4200 if (alpha_current_align > 2)
4201 alpha_current_align = 2;
4202 alpha_insn_label = NULL;
4203
4204 p = frag_more (4);
4205 memset (p, 0, 4);
4206 fix_new_exp (frag_now, p-frag_now->fr_literal, 4,
4207 &e, 0, BFD_RELOC_GPREL32);
4208}
4209
4210/* Handle floating point allocation pseudo-ops. This is like the
4211 generic vresion, but it makes sure the current label, if any, is
4212 correctly aligned. */
4213
4214static void
4215s_alpha_float_cons (type)
4216 int type;
4217{
4218 int log_size;
4219
4220 switch (type)
4221 {
4222 default:
4223 case 'f':
4224 case 'F':
4225 log_size = 2;
4226 break;
4227
4228 case 'd':
4229 case 'D':
4230 case 'G':
4231 log_size = 3;
4232 break;
4233
4234 case 'x':
4235 case 'X':
4236 case 'p':
4237 case 'P':
4238 log_size = 4;
4239 break;
4240 }
4241
4242 if (alpha_auto_align_on && alpha_current_align < log_size)
4243 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4244 if (alpha_current_align > log_size)
4245 alpha_current_align = log_size;
4246 alpha_insn_label = NULL;
4247
4248 float_cons (type);
4249}
4250
4251/* Handle the .proc pseudo op. We don't really do much with it except
4252 parse it. */
4253
4254static void
4255s_alpha_proc (is_static)
4256 int is_static;
4257{
4258 char *name;
4259 char c;
4260 char *p;
4261 symbolS *symbolP;
4262 int temp;
4263
4264 /* Takes ".proc name,nargs" */
4265 SKIP_WHITESPACE ();
4266 name = input_line_pointer;
4267 c = get_symbol_end ();
4268 p = input_line_pointer;
4269 symbolP = symbol_find_or_make (name);
4270 *p = c;
4271 SKIP_WHITESPACE ();
4272 if (*input_line_pointer != ',')
4273 {
4274 *p = 0;
4275 as_warn (_("Expected comma after name \"%s\""), name);
4276 *p = c;
4277 temp = 0;
4278 ignore_rest_of_line ();
4279 }
4280 else
4281 {
4282 input_line_pointer++;
4283 temp = get_absolute_expression ();
4284 }
4285 /* symbolP->sy_other = (signed char) temp; */
4286 as_warn (_("unhandled: .proc %s,%d"), name, temp);
4287 demand_empty_rest_of_line ();
4288}
4289
4290/* Handle the .set pseudo op. This is used to turn on and off most of
4291 the assembler features. */
4292
4293static void
4294s_alpha_set (x)
4295 int x;
4296{
4297 char *name, ch, *s;
4298 int yesno = 1;
4299
4300 SKIP_WHITESPACE ();
4301 name = input_line_pointer;
4302 ch = get_symbol_end ();
4303
4304 s = name;
4305 if (s[0] == 'n' && s[1] == 'o')
4306 {
4307 yesno = 0;
4308 s += 2;
4309 }
4310 if (!strcmp ("reorder", s))
4311 /* ignore */ ;
4312 else if (!strcmp ("at", s))
4313 alpha_noat_on = !yesno;
4314 else if (!strcmp ("macro", s))
4315 alpha_macros_on = yesno;
4316 else if (!strcmp ("move", s))
4317 /* ignore */ ;
4318 else if (!strcmp ("volatile", s))
4319 /* ignore */ ;
4320 else
4321 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
4322
4323 *input_line_pointer = ch;
4324 demand_empty_rest_of_line ();
4325}
4326
4327/* Handle the .base pseudo op. This changes the assembler's notion of
4328 the $gp register. */
4329
4330static void
4331s_alpha_base (ignore)
4332 int ignore;
4333{
4334#if 0
4335 if (first_32bit_quadrant)
4336 {
4337 /* not fatal, but it might not work in the end */
4338 as_warn (_("File overrides no-base-register option."));
4339 first_32bit_quadrant = 0;
4340 }
4341#endif
4342
4343 SKIP_WHITESPACE ();
4344 if (*input_line_pointer == '$')
4345 { /* $rNN form */
4346 input_line_pointer++;
4347 if (*input_line_pointer == 'r')
4348 input_line_pointer++;
4349 }
4350
4351 alpha_gp_register = get_absolute_expression ();
4352 if (alpha_gp_register < 0 || alpha_gp_register > 31)
4353 {
4354 alpha_gp_register = AXP_REG_GP;
4355 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
4356 }
4357
4358 demand_empty_rest_of_line ();
4359}
4360
4361/* Handle the .align pseudo-op. This aligns to a power of two. It
4362 also adjusts any current instruction label. We treat this the same
4363 way the MIPS port does: .align 0 turns off auto alignment. */
4364
4365static void
4366s_alpha_align (ignore)
4367 int ignore;
4368{
4369 int align;
4370 char fill, *pfill;
4371 long max_alignment = 15;
4372
4373 align = get_absolute_expression ();
4374 if (align > max_alignment)
4375 {
4376 align = max_alignment;
4377 as_bad (_("Alignment too large: %d. assumed"), align);
4378 }
4379 else if (align < 0)
4380 {
4381 as_warn (_("Alignment negative: 0 assumed"));
4382 align = 0;
4383 }
4384
4385 if (*input_line_pointer == ',')
4386 {
4387 input_line_pointer++;
4388 fill = get_absolute_expression ();
4389 pfill = &fill;
4390 }
4391 else
4392 pfill = NULL;
4393
4394 if (align != 0)
4395 {
4396 alpha_auto_align_on = 1;
4397 alpha_align (align, pfill, alpha_insn_label, 1);
4398 }
4399 else
4400 {
4401 alpha_auto_align_on = 0;
4402 }
4403
4404 demand_empty_rest_of_line ();
4405}
4406
4407/* Hook the normal string processor to reset known alignment. */
4408
4409static void
4410s_alpha_stringer (terminate)
4411 int terminate;
4412{
4413 alpha_current_align = 0;
4414 alpha_insn_label = NULL;
4415 stringer (terminate);
4416}
4417
4418/* Hook the normal space processing to reset known alignment. */
4419
4420static void
4421s_alpha_space (ignore)
4422 int ignore;
4423{
4424 alpha_current_align = 0;
4425 alpha_insn_label = NULL;
4426 s_space (ignore);
4427}
4428
4429/* Hook into cons for auto-alignment. */
4430
4431void
4432alpha_cons_align (size)
4433 int size;
4434{
4435 int log_size;
4436
4437 log_size = 0;
4438 while ((size >>= 1) != 0)
4439 ++log_size;
4440
4441 if (alpha_auto_align_on && alpha_current_align < log_size)
4442 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4443 if (alpha_current_align > log_size)
4444 alpha_current_align = log_size;
4445 alpha_insn_label = NULL;
4446}
4447
4448/* Here come the .uword, .ulong, and .uquad explicitly unaligned
4449 pseudos. We just turn off auto-alignment and call down to cons. */
4450
4451static void
4452s_alpha_ucons (bytes)
4453 int bytes;
4454{
4455 int hold = alpha_auto_align_on;
4456 alpha_auto_align_on = 0;
4457 cons (bytes);
4458 alpha_auto_align_on = hold;
4459}
4460
4461/* Switch the working cpu type. */
4462
4463static void
4464s_alpha_arch (ignored)
4465 int ignored;
4466{
4467 char *name, ch;
4468 const struct cpu_type *p;
4469
4470 SKIP_WHITESPACE ();
4471 name = input_line_pointer;
4472 ch = get_symbol_end ();
4473
4474 for (p = cpu_types; p->name; ++p)
4475 if (strcmp(name, p->name) == 0)
4476 {
4477 alpha_target_name = p->name, alpha_target = p->flags;
4478 goto found;
4479 }
4480 as_warn("Unknown CPU identifier `%s'", name);
4481
4482found:
4483 *input_line_pointer = ch;
4484 demand_empty_rest_of_line ();
4485}
4486
4487\f
4488
4489#ifdef DEBUG1
4490/* print token expression with alpha specific extension. */
4491
4492static void
4493alpha_print_token(f, exp)
4494 FILE *f;
4495 const expressionS *exp;
4496{
4497 switch (exp->X_op)
4498 {
4499 case O_cpregister:
4500 putc (',', f);
4501 /* FALLTHRU */
4502 case O_pregister:
4503 putc ('(', f);
4504 {
4505 expressionS nexp = *exp;
4506 nexp.X_op = O_register;
4507 print_expr (f, &nexp);
4508 }
4509 putc (')', f);
4510 break;
4511 default:
4512 print_expr (f, exp);
4513 break;
4514 }
4515 return;
4516}
4517#endif
4518\f
4519/* The target specific pseudo-ops which we support. */
4520
4521const pseudo_typeS md_pseudo_table[] =
4522{
4523#ifdef OBJ_ECOFF
4524 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
4525 {"rdata", s_alpha_rdata, 0},
4526#endif
4527 {"text", s_alpha_text, 0},
4528 {"data", s_alpha_data, 0},
4529#ifdef OBJ_ECOFF
4530 {"sdata", s_alpha_sdata, 0},
4531#endif
4532#ifdef OBJ_ELF
4533 {"section", s_alpha_section, 0},
4534 {"section.s", s_alpha_section, 0},
4535 {"sect", s_alpha_section, 0},
4536 {"sect.s", s_alpha_section, 0},
4537#endif
4538#ifdef OBJ_EVAX
4539 { "pdesc", s_alpha_pdesc, 0},
4540 { "name", s_alpha_name, 0},
4541 { "linkage", s_alpha_linkage, 0},
4542 { "code_address", s_alpha_code_address, 0},
4543 { "ent", s_alpha_ent, 0},
4544 { "frame", s_alpha_frame, 0},
4545 { "fp_save", s_alpha_fp_save, 0},
4546 { "mask", s_alpha_mask, 0},
4547 { "fmask", s_alpha_fmask, 0},
4548 { "end", s_alpha_end, 0},
4549 { "file", s_alpha_file, 0},
4550 { "rdata", s_alpha_section, 1},
4551 { "comm", s_alpha_comm, 0},
4552 { "link", s_alpha_section, 3},
4553 { "ctors", s_alpha_section, 4},
4554 { "dtors", s_alpha_section, 5},
4555#endif
4556#ifdef OBJ_ELF
4557 /* Frame related pseudos. */
4558 {"ent", s_alpha_ent, 0},
4559 {"end", s_alpha_end, 0},
4560 {"mask", s_alpha_mask, 0},
4561 {"fmask", s_alpha_mask, 1},
4562 {"frame", s_alpha_frame, 0},
4563 {"prologue", s_alpha_prologue, 0},
4564 /* COFF debugging related pseudos. */
4565 {"begin", s_alpha_coff_wrapper, 0},
4566 {"bend", s_alpha_coff_wrapper, 1},
4567 {"def", s_alpha_coff_wrapper, 2},
4568 {"dim", s_alpha_coff_wrapper, 3},
4569 {"endef", s_alpha_coff_wrapper, 4},
4570 {"file", s_alpha_coff_wrapper, 5},
4571 {"scl", s_alpha_coff_wrapper, 6},
4572 {"tag", s_alpha_coff_wrapper, 7},
4573 {"val", s_alpha_coff_wrapper, 8},
4574 {"loc", s_alpha_coff_wrapper, 9},
4575#else
4576 {"prologue", s_ignore, 0},
4577#endif
4578 {"gprel32", s_alpha_gprel32, 0},
4579 {"t_floating", s_alpha_float_cons, 'd'},
4580 {"s_floating", s_alpha_float_cons, 'f'},
4581 {"f_floating", s_alpha_float_cons, 'F'},
4582 {"g_floating", s_alpha_float_cons, 'G'},
4583 {"d_floating", s_alpha_float_cons, 'D'},
4584
4585 {"proc", s_alpha_proc, 0},
4586 {"aproc", s_alpha_proc, 1},
4587 {"set", s_alpha_set, 0},
4588 {"reguse", s_ignore, 0},
4589 {"livereg", s_ignore, 0},
4590 {"base", s_alpha_base, 0}, /*??*/
4591 {"option", s_ignore, 0},
4592 {"aent", s_ignore, 0},
4593 {"ugen", s_ignore, 0},
4594 {"eflag", s_ignore, 0},
4595
4596 {"align", s_alpha_align, 0},
4597 {"double", s_alpha_float_cons, 'd'},
4598 {"float", s_alpha_float_cons, 'f'},
4599 {"single", s_alpha_float_cons, 'f'},
4600 {"ascii", s_alpha_stringer, 0},
4601 {"asciz", s_alpha_stringer, 1},
4602 {"string", s_alpha_stringer, 1},
4603 {"space", s_alpha_space, 0},
4604 {"skip", s_alpha_space, 0},
4605 {"zero", s_alpha_space, 0},
4606
4607/* Unaligned data pseudos. */
4608 {"uword", s_alpha_ucons, 2},
4609 {"ulong", s_alpha_ucons, 4},
4610 {"uquad", s_alpha_ucons, 8},
4611
4612#ifdef OBJ_ELF
4613/* Dwarf wants these versions of unaligned. */
4614 {"2byte", s_alpha_ucons, 2},
4615 {"4byte", s_alpha_ucons, 4},
4616 {"8byte", s_alpha_ucons, 8},
4617#endif
4618
4619/* We don't do any optimizing, so we can safely ignore these. */
4620 {"noalias", s_ignore, 0},
4621 {"alias", s_ignore, 0},
4622
4623 {"arch", s_alpha_arch, 0},
4624
4625 {NULL, 0, 0},
4626};
4627
4628\f
4629/* Build a BFD section with its flags set appropriately for the .lita,
4630 .lit8, or .lit4 sections. */
4631
4632static void
4633create_literal_section (name, secp, symp)
4634 const char *name;
4635 segT *secp;
4636 symbolS **symp;
4637{
4638 segT current_section = now_seg;
4639 int current_subsec = now_subseg;
4640 segT new_sec;
4641
4642 *secp = new_sec = subseg_new (name, 0);
4643 subseg_set (current_section, current_subsec);
4644 bfd_set_section_alignment (stdoutput, new_sec, 4);
4645 bfd_set_section_flags (stdoutput, new_sec,
4646 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
4647 | SEC_DATA);
4648
4649 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
4650}
4651
4652#ifdef OBJ_ECOFF
4653
4654/* @@@ GP selection voodoo. All of this seems overly complicated and
4655 unnecessary; which is the primary reason it's for ECOFF only. */
4656
4657static inline void
4658maybe_set_gp (sec)
4659 asection *sec;
4660{
4661 bfd_vma vma;
4662 if (!sec)
4663 return;
4664 vma = bfd_get_section_vma (foo, sec);
4665 if (vma && vma < alpha_gp_value)
4666 alpha_gp_value = vma;
4667}
4668
4669static void
4670select_gp_value ()
4671{
4672 assert (alpha_gp_value == 0);
4673
4674 /* Get minus-one in whatever width... */
4675 alpha_gp_value = 0; alpha_gp_value--;
4676
4677 /* Select the smallest VMA of these existing sections. */
4678 maybe_set_gp (alpha_lita_section);
4679#if 0
4680 /* These were disabled before -- should we use them? */
4681 maybe_set_gp (sdata);
4682 maybe_set_gp (lit8_sec);
4683 maybe_set_gp (lit4_sec);
4684#endif
4685
4686/* @@ Will a simple 0x8000 work here? If not, why not? */
4687#define GP_ADJUSTMENT (0x8000 - 0x10)
4688
4689 alpha_gp_value += GP_ADJUSTMENT;
4690
4691 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
4692
4693#ifdef DEBUG1
4694 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
4695#endif
4696}
4697#endif /* OBJ_ECOFF */
4698
4699/* Called internally to handle all alignment needs. This takes care
4700 of eliding calls to frag_align if'n the cached current alignment
4701 says we've already got it, as well as taking care of the auto-align
4702 feature wrt labels. */
4703
4704static void
4705alpha_align (n, pfill, label, force)
4706 int n;
4707 char *pfill;
4708 symbolS *label;
4709 int force;
4710{
4711 if (alpha_current_align >= n)
4712 return;
4713
4714 if (pfill == NULL)
4715 {
4716 if (n > 2
4717 && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
4718 {
4719 static char const unop[4] = { 0x00, 0x00, 0xe0, 0x2f };
4720 static char const nopunop[8] = {
4721 0x1f, 0x04, 0xff, 0x47,
4722 0x00, 0x00, 0xe0, 0x2f
4723 };
4724
4725 /* First, make sure we're on a four-byte boundary, in case
4726 someone has been putting .byte values into the text
4727 section. The DEC assembler silently fills with unaligned
4728 no-op instructions. This will zero-fill, then nop-fill
4729 with proper alignment. */
4730 if (alpha_current_align < 2)
4731 frag_align (2, 0, 0);
4732 if (alpha_current_align < 3)
4733 frag_align_pattern (3, unop, sizeof unop, 0);
4734 if (n > 3)
4735 frag_align_pattern (n, nopunop, sizeof nopunop, 0);
4736 }
4737 else
4738 frag_align (n, 0, 0);
4739 }
4740 else
4741 frag_align (n, *pfill, 0);
4742
4743 alpha_current_align = n;
4744
4745 if (label != NULL)
4746 {
4747 assert (S_GET_SEGMENT (label) == now_seg);
4748 label->sy_frag = frag_now;
4749 S_SET_VALUE (label, (valueT) frag_now_fix ());
4750 }
4751
4752 record_alignment(now_seg, n);
4753
4754 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4755 in a reloc for the linker to see. */
4756}
4757
4758/* The Alpha has support for some VAX floating point types, as well as for
4759 IEEE floating point. We consider IEEE to be the primary floating point
4760 format, and sneak in the VAX floating point support here. */
4761#define md_atof vax_md_atof
4762#include "config/atof-vax.c"
GDB Binutils - Deliverables
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