Commit | Line | Data |
---|---|---|
adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
71863e73 | 3 | Copyright 1999-2013 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 22 | |
adde6300 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
adde6300 | 25 | #include "subsegs.h" |
fb5b7503 | 26 | #include "dwarf2dbg.h" |
af3ecb4a RH |
27 | #include "dw2gencfi.h" |
28 | ||
adde6300 | 29 | |
1188e082 DC |
30 | struct avr_opcodes_s |
31 | { | |
dc191a8f NC |
32 | char * name; |
33 | char * constraints; | |
8cc66334 | 34 | char * opcode; |
dc191a8f NC |
35 | int insn_size; /* In words. */ |
36 | int isa; | |
37 | unsigned int bin_opcode; | |
1188e082 DC |
38 | }; |
39 | ||
40 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
8cc66334 | 41 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
1188e082 DC |
42 | |
43 | struct avr_opcodes_s avr_opcodes[] = | |
44 | { | |
45 | #include "opcode/avr.h" | |
8cc66334 | 46 | {NULL, NULL, NULL, 0, 0, 0} |
1188e082 DC |
47 | }; |
48 | ||
adde6300 AM |
49 | const char comment_chars[] = ";"; |
50 | const char line_comment_chars[] = "#"; | |
51 | const char line_separator_chars[] = "$"; | |
52 | ||
adde6300 AM |
53 | const char *md_shortopts = "m:"; |
54 | struct mcu_type_s | |
55 | { | |
56 | char *name; | |
57 | int isa; | |
58 | int mach; | |
59 | }; | |
60 | ||
1f8ae5e6 | 61 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 62 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 63 | |
adde6300 AM |
64 | static struct mcu_type_s mcu_types[] = |
65 | { | |
7b21ac3f EW |
66 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
67 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
99700d6f NC |
68 | but set to AVR_ISA_AVR25 for some following version |
69 | of GCC (from 4.3) for backward compatibility. */ | |
7b21ac3f EW |
70 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, |
71 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
99700d6f NC |
72 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, |
73 | but set to AVR_ISA_AVR3_ALL for some following version | |
7b21ac3f EW |
74 | of GCC (from 4.3) for backward compatibility. */ |
75 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
76 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
77 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
78 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
99700d6f NC |
79 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, |
80 | but set to AVR_ISA_AVR51 for some following version | |
7b21ac3f EW |
81 | of GCC (from 4.3) for backward compatibility. */ |
82 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
83 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
84 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
85 | {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1}, |
86 | {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
87 | {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3}, | |
88 | {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
89 | {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
90 | {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
91 | {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
28c9d252 | 92 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
93 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
94 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
95 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
96 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
97 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
98 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
100 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
101 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 102 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
103 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
104 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
105 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
106 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
107 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
108 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
109 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, | |
110 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
111 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 112 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 113 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
114 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
115 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 116 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 117 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 118 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 119 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
120 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
121 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
122 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
123 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 124 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 125 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 126 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 127 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 128 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 129 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
130 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
131 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
132 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
133 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, | |
134 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, | |
135 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
136 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
137 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
138 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
139 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
140 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
11908008 EW |
141 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
142 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
143 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
28c9d252 | 144 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8be59acb | 145 | {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 146 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 147 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
148 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
149 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 150 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 151 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 152 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
153 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
154 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
155 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
156 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
157 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
158 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
159 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
160 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 161 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 162 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 163 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 164 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 165 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 166 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 167 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
168 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
169 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 170 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
171 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
172 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 173 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
174 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
175 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 176 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 177 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 178 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
179 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
180 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 181 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 182 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 183 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 184 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 185 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 186 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 187 | {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 188 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 189 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 190 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 191 | {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 192 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
193 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
194 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 195 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 196 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 197 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 198 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 199 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 200 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 201 | {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
202 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, |
203 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, | |
204 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, | |
205 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 206 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 207 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 208 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 209 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
210 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
211 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 212 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
213 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
214 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 215 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
216 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
217 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 218 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
219 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
220 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
4d13caa0 NC |
221 | {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, |
222 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 223 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 224 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 225 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 226 | {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
2b02f87c | 227 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 228 | {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
e760a81b | 229 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
230 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
231 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
b8c610a7 | 232 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
233 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, |
234 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
235 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
236 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
237 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 238 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
239 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
240 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 241 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 242 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
243 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
244 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 245 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 246 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 247 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
248 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
249 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, | |
250 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
251 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, | |
17f4880d | 252 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
4d13caa0 NC |
253 | {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, |
254 | {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
255 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
256 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
257 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
258 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
259 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
4d13caa0 NC |
260 | {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, |
261 | {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
262 | {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
263 | {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 264 | {"atxmega16x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 EW |
265 | {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
266 | {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 267 | {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 EW |
268 | {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
269 | {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
270 | {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
7bab7634 | 271 | {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5}, |
8cc66334 | 272 | {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
7bab7634 | 273 | {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
8cc66334 EW |
274 | {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
275 | {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
276 | {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
277 | {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
278 | {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
7bab7634 | 279 | {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
8cc66334 EW |
280 | {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
281 | {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
7bab7634 | 282 | {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
adde6300 AM |
283 | {NULL, 0, 0} |
284 | }; | |
285 | ||
adde6300 | 286 | /* Current MCU type. */ |
7b21ac3f | 287 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
dc191a8f | 288 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 289 | |
00d2865b NC |
290 | /* AVR target-specific switches. */ |
291 | struct avr_opt_s | |
292 | { | |
dc191a8f NC |
293 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
294 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
295 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
296 | }; |
297 | ||
298 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
299 | ||
adde6300 AM |
300 | const char EXP_CHARS[] = "eE"; |
301 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
302 | |
303 | static void avr_set_arch (int); | |
adde6300 AM |
304 | |
305 | /* The target specific pseudo-ops which we support. */ | |
306 | const pseudo_typeS md_pseudo_table[] = | |
307 | { | |
308 | {"arch", avr_set_arch, 0}, | |
309 | { NULL, NULL, 0} | |
310 | }; | |
311 | ||
312 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 313 | |
dc191a8f NC |
314 | #define EXP_MOD_NAME(i) exp_mod[i].name |
315 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
316 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
317 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
318 | |
319 | struct exp_mod_s | |
320 | { | |
dc191a8f NC |
321 | char * name; |
322 | bfd_reloc_code_real_type reloc; | |
323 | bfd_reloc_code_real_type neg_reloc; | |
324 | int have_pm; | |
adde6300 AM |
325 | }; |
326 | ||
c6a7ab1f NC |
327 | static struct exp_mod_s exp_mod[] = |
328 | { | |
adde6300 AM |
329 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
330 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
331 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
332 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
333 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
334 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 | 335 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
e4efb665 | 336 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, |
adde6300 AM |
337 | }; |
338 | ||
8ad7c533 NC |
339 | /* A union used to store indicies into the exp_mod[] array |
340 | in a hash table which expects void * data types. */ | |
341 | typedef union | |
342 | { | |
343 | void * ptr; | |
344 | int index; | |
345 | } mod_index; | |
346 | ||
adde6300 AM |
347 | /* Opcode hash table. */ |
348 | static struct hash_control *avr_hash; | |
349 | ||
350 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
351 | static struct hash_control *avr_mod_hash; | |
352 | ||
00d2865b | 353 | #define OPTION_MMCU 'm' |
dc191a8f NC |
354 | enum options |
355 | { | |
356 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
357 | OPTION_NO_SKIP_BUG, | |
358 | OPTION_NO_WRAP | |
359 | }; | |
adde6300 | 360 | |
c6a7ab1f NC |
361 | struct option md_longopts[] = |
362 | { | |
00d2865b NC |
363 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
364 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
365 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
366 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
367 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 368 | }; |
adde6300 | 369 | |
c6a7ab1f | 370 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
371 | |
372 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 373 | |
00d2865b | 374 | static void |
dc191a8f | 375 | show_mcu_list (FILE *stream) |
00d2865b NC |
376 | { |
377 | int i, x; | |
378 | ||
379 | fprintf (stream, _("Known MCU names:")); | |
380 | x = 1000; | |
1dab94dd | 381 | |
00d2865b NC |
382 | for (i = 0; mcu_types[i].name; i++) |
383 | { | |
384 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 385 | |
00d2865b | 386 | x += len + 1; |
1dab94dd | 387 | |
00d2865b | 388 | if (x < 75) |
c6a7ab1f | 389 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
390 | else |
391 | { | |
392 | fprintf (stream, "\n %s", mcu_types[i].name); | |
393 | x = len + 2; | |
394 | } | |
395 | } | |
1dab94dd | 396 | |
c6a7ab1f | 397 | fprintf (stream, "\n"); |
00d2865b NC |
398 | } |
399 | ||
adde6300 | 400 | static inline char * |
dc191a8f | 401 | skip_space (char *s) |
adde6300 AM |
402 | { |
403 | while (*s == ' ' || *s == '\t') | |
404 | ++s; | |
405 | return s; | |
406 | } | |
407 | ||
408 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 409 | |
adde6300 AM |
410 | static char * |
411 | extract_word (char *from, char *to, int limit) | |
412 | { | |
adde6300 AM |
413 | char *op_end; |
414 | int size = 0; | |
415 | ||
416 | /* Drop leading whitespace. */ | |
417 | from = skip_space (from); | |
418 | *to = 0; | |
c6a7ab1f | 419 | |
adde6300 | 420 | /* Find the op code end. */ |
87975d2a | 421 | for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
422 | { |
423 | to[size++] = *op_end++; | |
424 | if (size + 1 >= limit) | |
425 | break; | |
426 | } | |
1dab94dd | 427 | |
adde6300 AM |
428 | to[size] = 0; |
429 | return op_end; | |
430 | } | |
431 | ||
432 | int | |
dc191a8f NC |
433 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
434 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
435 | { |
436 | abort (); | |
437 | return 0; | |
438 | } | |
439 | ||
440 | void | |
dc191a8f | 441 | md_show_usage (FILE *stream) |
adde6300 | 442 | { |
00d2865b | 443 | fprintf (stream, |
4fb8d1c6 | 444 | _("AVR Assembler options:\n" |
adde6300 AM |
445 | " -mmcu=[avr-name] select microcontroller variant\n" |
446 | " [avr-name] can be:\n" | |
7b21ac3f EW |
447 | " avr1 - classic AVR core without data RAM\n" |
448 | " avr2 - classic AVR core with up to 8K program memory\n" | |
449 | " avr25 - classic AVR core with up to 8K program memory\n" | |
450 | " plus the MOVW instruction\n" | |
451 | " avr3 - classic AVR core with up to 64K program memory\n" | |
452 | " avr31 - classic AVR core with up to 128K program memory\n" | |
453 | " avr35 - classic AVR core with up to 64K program memory\n" | |
454 | " plus the MOVW instruction\n" | |
455 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
456 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
457 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
458 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
8c997c27 | 459 | " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n" |
8cc66334 EW |
460 | " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n" |
461 | " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n" | |
462 | " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n" | |
463 | " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n" | |
464 | " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n" | |
adde6300 | 465 | " or immediate microcontroller name.\n")); |
00d2865b NC |
466 | fprintf (stream, |
467 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
468 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
469 | " (default for avr4, avr5)\n" | |
470 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
471 | " (default for avr3, avr5)\n")); | |
472 | show_mcu_list (stream); | |
adde6300 AM |
473 | } |
474 | ||
475 | static void | |
dc191a8f | 476 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 477 | { |
dc191a8f | 478 | char str[20]; |
1dab94dd | 479 | |
adde6300 | 480 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 481 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
482 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
483 | } | |
484 | ||
485 | int | |
dc191a8f | 486 | md_parse_option (int c, char *arg) |
adde6300 | 487 | { |
00d2865b | 488 | switch (c) |
adde6300 | 489 | { |
00d2865b NC |
490 | case OPTION_MMCU: |
491 | { | |
492 | int i; | |
493 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 494 | |
00d2865b NC |
495 | { |
496 | char *t = s; | |
497 | char *arg1 = arg; | |
498 | ||
499 | do | |
3882b010 | 500 | *t = TOLOWER (*arg1++); |
00d2865b NC |
501 | while (*t++); |
502 | } | |
503 | ||
504 | for (i = 0; mcu_types[i].name; ++i) | |
505 | if (strcmp (mcu_types[i].name, s) == 0) | |
506 | break; | |
adde6300 | 507 | |
00d2865b NC |
508 | if (!mcu_types[i].name) |
509 | { | |
510 | show_mcu_list (stderr); | |
511 | as_fatal (_("unknown MCU: %s\n"), arg); | |
512 | } | |
65aa24b6 | 513 | |
00d2865b NC |
514 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
515 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
516 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
517 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
518 | avr_mcu = &mcu_types[i]; | |
519 | else | |
520 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
521 | avr_mcu->name, mcu_types[i].name); | |
522 | return 1; | |
523 | } | |
524 | case OPTION_ALL_OPCODES: | |
525 | avr_opt.all_opcodes = 1; | |
526 | return 1; | |
527 | case OPTION_NO_SKIP_BUG: | |
528 | avr_opt.no_skip_bug = 1; | |
529 | return 1; | |
530 | case OPTION_NO_WRAP: | |
531 | avr_opt.no_wrap = 1; | |
adde6300 AM |
532 | return 1; |
533 | } | |
1dab94dd | 534 | |
adde6300 AM |
535 | return 0; |
536 | } | |
537 | ||
538 | symbolS * | |
dc191a8f | 539 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 540 | { |
dc191a8f | 541 | return NULL; |
adde6300 AM |
542 | } |
543 | ||
adde6300 | 544 | char * |
dc191a8f | 545 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 546 | { |
499ac353 | 547 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
548 | } |
549 | ||
550 | void | |
dc191a8f NC |
551 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
552 | asection *sec ATTRIBUTE_UNUSED, | |
553 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
554 | { |
555 | abort (); | |
556 | } | |
557 | ||
adde6300 | 558 | void |
dc191a8f | 559 | md_begin (void) |
adde6300 | 560 | { |
df136245 | 561 | unsigned int i; |
adde6300 | 562 | struct avr_opcodes_s *opcode; |
dc191a8f | 563 | |
c6a7ab1f | 564 | avr_hash = hash_new (); |
adde6300 AM |
565 | |
566 | /* Insert unique names into hash table. This hash table then provides a | |
567 | quick index to the first opcode with a particular name in the opcode | |
568 | table. */ | |
adde6300 AM |
569 | for (opcode = avr_opcodes; opcode->name; opcode++) |
570 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
571 | ||
572 | avr_mod_hash = hash_new (); | |
573 | ||
dc191a8f | 574 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
575 | { |
576 | mod_index m; | |
577 | ||
578 | m.index = i + 10; | |
579 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
580 | } | |
c6a7ab1f | 581 | |
adde6300 AM |
582 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
583 | } | |
584 | ||
df136245 | 585 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 586 | If result greater than MAX then error. */ |
df136245 DC |
587 | |
588 | static unsigned int | |
dc191a8f | 589 | avr_get_constant (char *str, int max) |
df136245 DC |
590 | { |
591 | expressionS ex; | |
dc191a8f | 592 | |
df136245 DC |
593 | str = skip_space (str); |
594 | input_line_pointer = str; | |
dc191a8f | 595 | expression (& ex); |
df136245 DC |
596 | |
597 | if (ex.X_op != O_constant) | |
598 | as_bad (_("constant value required")); | |
599 | ||
600 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 601 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 602 | |
df136245 DC |
603 | return ex.X_add_number; |
604 | } | |
605 | ||
dc191a8f | 606 | /* Parse for ldd/std offset. */ |
df136245 | 607 | |
dc191a8f NC |
608 | static void |
609 | avr_offset_expression (expressionS *exp) | |
adde6300 | 610 | { |
dc191a8f NC |
611 | char *str = input_line_pointer; |
612 | char *tmp; | |
613 | char op[8]; | |
adde6300 | 614 | |
dc191a8f NC |
615 | tmp = str; |
616 | str = extract_word (str, op, sizeof (op)); | |
617 | ||
618 | input_line_pointer = tmp; | |
619 | expression (exp); | |
620 | ||
621 | /* Warn about expressions that fail to use lo8 (). */ | |
622 | if (exp->X_op == O_constant) | |
adde6300 | 623 | { |
dc191a8f | 624 | int x = exp->X_add_number; |
28c9d252 | 625 | |
dc191a8f NC |
626 | if (x < -255 || x > 255) |
627 | as_warn (_("constant out of 8-bit range: %d"), x); | |
628 | } | |
629 | } | |
adde6300 | 630 | |
dc191a8f | 631 | /* Parse ordinary expression. */ |
adde6300 | 632 | |
dc191a8f NC |
633 | static char * |
634 | parse_exp (char *s, expressionS *op) | |
635 | { | |
636 | input_line_pointer = s; | |
637 | expression (op); | |
638 | if (op->X_op == O_absent) | |
639 | as_bad (_("missing operand")); | |
640 | return input_line_pointer; | |
641 | } | |
1dab94dd | 642 | |
dc191a8f NC |
643 | /* Parse special expressions (needed for LDI command): |
644 | xx8 (address) | |
645 | xx8 (-address) | |
646 | pm_xx8 (address) | |
647 | pm_xx8 (-address) | |
648 | where xx is: hh, hi, lo. */ | |
adde6300 | 649 | |
dc191a8f NC |
650 | static bfd_reloc_code_real_type |
651 | avr_ldi_expression (expressionS *exp) | |
652 | { | |
653 | char *str = input_line_pointer; | |
654 | char *tmp; | |
655 | char op[8]; | |
656 | int mod; | |
28c9d252 NC |
657 | int linker_stubs_should_be_generated = 0; |
658 | ||
dc191a8f | 659 | tmp = str; |
adde6300 | 660 | |
dc191a8f | 661 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 662 | |
dc191a8f NC |
663 | if (op[0]) |
664 | { | |
8ad7c533 | 665 | mod_index m; |
28c9d252 | 666 | |
8ad7c533 NC |
667 | m.ptr = hash_find (avr_mod_hash, op); |
668 | mod = m.index; | |
1dab94dd | 669 | |
dc191a8f NC |
670 | if (mod) |
671 | { | |
672 | int closes = 0; | |
b170af93 | 673 | |
dc191a8f NC |
674 | mod -= 10; |
675 | str = skip_space (str); | |
00d2865b | 676 | |
dc191a8f NC |
677 | if (*str == '(') |
678 | { | |
28c9d252 | 679 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 680 | int neg_p = 0; |
00d2865b | 681 | |
dc191a8f | 682 | ++str; |
00d2865b | 683 | |
dc191a8f | 684 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
685 | || strncmp ("gs(",str,3) == 0 |
686 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
687 | || strncmp ("-(pm(", str, 5) == 0) |
688 | { | |
689 | if (HAVE_PM_P (mod)) | |
690 | { | |
691 | ++mod; | |
692 | ++closes; | |
693 | } | |
694 | else | |
695 | as_bad (_("illegal expression")); | |
b170af93 | 696 | |
28c9d252 NC |
697 | if (str[0] == 'g' || str[2] == 'g') |
698 | linker_stubs_should_be_generated = 1; | |
699 | ||
dc191a8f NC |
700 | if (*str == '-') |
701 | { | |
702 | neg_p = 1; | |
703 | ++closes; | |
704 | str += 5; | |
705 | } | |
706 | else | |
707 | str += 3; | |
708 | } | |
adde6300 | 709 | |
dc191a8f NC |
710 | if (*str == '-' && *(str + 1) == '(') |
711 | { | |
712 | neg_p ^= 1; | |
713 | ++closes; | |
714 | str += 2; | |
715 | } | |
750bce0e | 716 | |
dc191a8f NC |
717 | input_line_pointer = str; |
718 | expression (exp); | |
750bce0e | 719 | |
dc191a8f NC |
720 | do |
721 | { | |
722 | if (*input_line_pointer != ')') | |
723 | { | |
724 | as_bad (_("`)' required")); | |
725 | break; | |
726 | } | |
727 | input_line_pointer++; | |
728 | } | |
729 | while (closes--); | |
730 | ||
28c9d252 NC |
731 | reloc_to_return = |
732 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
733 | if (linker_stubs_should_be_generated) | |
734 | { | |
735 | switch (reloc_to_return) | |
736 | { | |
737 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
738 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
739 | break; | |
740 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
741 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
742 | break; | |
743 | ||
744 | default: | |
0a903bab NC |
745 | /* PR 5523: Do not generate a warning here, |
746 | legitimate code can trigger this case. */ | |
747 | break; | |
28c9d252 NC |
748 | } |
749 | } | |
750 | return reloc_to_return; | |
dc191a8f NC |
751 | } |
752 | } | |
753 | } | |
750bce0e NC |
754 | |
755 | input_line_pointer = tmp; | |
756 | expression (exp); | |
757 | ||
758 | /* Warn about expressions that fail to use lo8 (). */ | |
759 | if (exp->X_op == O_constant) | |
760 | { | |
761 | int x = exp->X_add_number; | |
dc191a8f | 762 | |
750bce0e NC |
763 | if (x < -255 || x > 255) |
764 | as_warn (_("constant out of 8-bit range: %d"), x); | |
765 | } | |
dc191a8f NC |
766 | |
767 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
768 | } |
769 | ||
df136245 | 770 | /* Parse one instruction operand. |
c6a7ab1f NC |
771 | Return operand bitmask. Also fixups can be generated. */ |
772 | ||
adde6300 | 773 | static unsigned int |
dc191a8f NC |
774 | avr_operand (struct avr_opcodes_s *opcode, |
775 | int where, | |
776 | char *op, | |
777 | char **line) | |
adde6300 | 778 | { |
adde6300 | 779 | expressionS op_expr; |
df136245 DC |
780 | unsigned int op_mask = 0; |
781 | char *str = skip_space (*line); | |
adde6300 | 782 | |
adde6300 AM |
783 | switch (*op) |
784 | { | |
785 | /* Any register operand. */ | |
786 | case 'w': | |
787 | case 'd': | |
788 | case 'r': | |
b170af93 DC |
789 | case 'a': |
790 | case 'v': | |
c6a7ab1f NC |
791 | if (*str == 'r' || *str == 'R') |
792 | { | |
793 | char r_name[20]; | |
1dab94dd | 794 | |
c6a7ab1f | 795 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 796 | op_mask = 0xff; |
3882b010 | 797 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
798 | { |
799 | if (r_name[2] == '\0') | |
800 | op_mask = r_name[1] - '0'; | |
801 | else if (r_name[1] != '0' | |
3882b010 | 802 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
803 | && r_name[3] == '\0') |
804 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
805 | } | |
806 | } | |
807 | else | |
808 | { | |
809 | op_mask = avr_get_constant (str, 31); | |
810 | str = input_line_pointer; | |
811 | } | |
1dab94dd | 812 | |
c6a7ab1f NC |
813 | if (op_mask <= 31) |
814 | { | |
815 | switch (*op) | |
816 | { | |
817 | case 'a': | |
818 | if (op_mask < 16 || op_mask > 23) | |
819 | as_bad (_("register r16-r23 required")); | |
820 | op_mask -= 16; | |
821 | break; | |
1dab94dd | 822 | |
c6a7ab1f NC |
823 | case 'd': |
824 | if (op_mask < 16) | |
825 | as_bad (_("register number above 15 required")); | |
826 | op_mask -= 16; | |
827 | break; | |
1dab94dd | 828 | |
c6a7ab1f NC |
829 | case 'v': |
830 | if (op_mask & 1) | |
831 | as_bad (_("even register number required")); | |
832 | op_mask >>= 1; | |
833 | break; | |
1dab94dd | 834 | |
c6a7ab1f | 835 | case 'w': |
65b1d096 | 836 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 837 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 838 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
839 | break; |
840 | } | |
841 | break; | |
842 | } | |
843 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
844 | break; |
845 | ||
846 | case 'e': | |
847 | { | |
848 | char c; | |
1dab94dd | 849 | |
adde6300 AM |
850 | if (*str == '-') |
851 | { | |
c6a7ab1f | 852 | str = skip_space (str + 1); |
adde6300 AM |
853 | op_mask = 0x1002; |
854 | } | |
3882b010 | 855 | c = TOLOWER (*str); |
adde6300 AM |
856 | if (c == 'x') |
857 | op_mask |= 0x100c; | |
858 | else if (c == 'y') | |
859 | op_mask |= 0x8; | |
860 | else if (c != 'z') | |
00d2865b | 861 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 862 | |
c6a7ab1f | 863 | str = skip_space (str + 1); |
adde6300 AM |
864 | if (*str == '+') |
865 | { | |
866 | ++str; | |
867 | if (op_mask & 2) | |
00d2865b | 868 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
869 | op_mask |= 0x1001; |
870 | } | |
e38c9cc2 | 871 | |
1188e082 | 872 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 873 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
874 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
875 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
876 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
877 | } |
878 | break; | |
879 | ||
b170af93 | 880 | case 'z': |
c6a7ab1f NC |
881 | if (*str == '-') |
882 | as_bad (_("can't predecrement")); | |
1dab94dd | 883 | |
c6a7ab1f NC |
884 | if (! (*str == 'z' || *str == 'Z')) |
885 | as_bad (_("pointer register Z required")); | |
1dab94dd | 886 | |
c6a7ab1f NC |
887 | str = skip_space (str + 1); |
888 | ||
889 | if (*str == '+') | |
890 | { | |
891 | ++str; | |
8cc66334 EW |
892 | char *s; |
893 | for (s = opcode->opcode; *s; ++s) | |
894 | { | |
895 | if (*s == '+') | |
896 | op_mask |= (1 << (15 - (s - opcode->opcode))); | |
897 | } | |
c6a7ab1f | 898 | } |
d669d37f NC |
899 | |
900 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
901 | if (!avr_opt.all_opcodes | |
902 | && (op_mask & 0x0001) | |
903 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
904 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
905 | break; |
906 | ||
adde6300 AM |
907 | case 'b': |
908 | { | |
3882b010 | 909 | char c = TOLOWER (*str++); |
1dab94dd | 910 | |
adde6300 AM |
911 | if (c == 'y') |
912 | op_mask |= 0x8; | |
913 | else if (c != 'z') | |
00d2865b | 914 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
915 | str = skip_space (str); |
916 | if (*str++ == '+') | |
917 | { | |
750bce0e NC |
918 | input_line_pointer = str; |
919 | avr_offset_expression (& op_expr); | |
adde6300 | 920 | str = input_line_pointer; |
750bce0e NC |
921 | fix_new_exp (frag_now, where, 3, |
922 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
923 | } |
924 | } | |
925 | break; | |
926 | ||
927 | case 'h': | |
c6a7ab1f NC |
928 | str = parse_exp (str, &op_expr); |
929 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 930 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
931 | break; |
932 | ||
933 | case 'L': | |
c6a7ab1f NC |
934 | str = parse_exp (str, &op_expr); |
935 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 936 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
937 | break; |
938 | ||
939 | case 'l': | |
c6a7ab1f NC |
940 | str = parse_exp (str, &op_expr); |
941 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 942 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
943 | break; |
944 | ||
945 | case 'i': | |
c6a7ab1f NC |
946 | str = parse_exp (str, &op_expr); |
947 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 948 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
949 | break; |
950 | ||
951 | case 'M': | |
952 | { | |
953 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 954 | |
c6a7ab1f NC |
955 | input_line_pointer = str; |
956 | r_type = avr_ldi_expression (&op_expr); | |
957 | str = input_line_pointer; | |
adde6300 | 958 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 959 | &op_expr, FALSE, r_type); |
adde6300 AM |
960 | } |
961 | break; | |
962 | ||
963 | case 'n': | |
964 | { | |
965 | unsigned int x; | |
1dab94dd | 966 | |
adde6300 AM |
967 | x = ~avr_get_constant (str, 255); |
968 | str = input_line_pointer; | |
969 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
970 | } | |
971 | break; | |
972 | ||
973 | case 'K': | |
750bce0e NC |
974 | input_line_pointer = str; |
975 | avr_offset_expression (& op_expr); | |
976 | str = input_line_pointer; | |
977 | fix_new_exp (frag_now, where, 3, | |
978 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
979 | break; |
980 | ||
981 | case 'S': | |
982 | case 's': | |
983 | { | |
984 | unsigned int x; | |
1dab94dd | 985 | |
adde6300 AM |
986 | x = avr_get_constant (str, 7); |
987 | str = input_line_pointer; | |
988 | if (*op == 'S') | |
989 | x <<= 4; | |
990 | op_mask |= x; | |
991 | } | |
992 | break; | |
993 | ||
994 | case 'P': | |
995 | { | |
996 | unsigned int x; | |
1dab94dd | 997 | |
adde6300 AM |
998 | x = avr_get_constant (str, 63); |
999 | str = input_line_pointer; | |
1000 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
1001 | } | |
1002 | break; | |
1003 | ||
1004 | case 'p': | |
1005 | { | |
1006 | unsigned int x; | |
1dab94dd | 1007 | |
adde6300 AM |
1008 | x = avr_get_constant (str, 31); |
1009 | str = input_line_pointer; | |
1010 | op_mask |= x << 3; | |
1011 | } | |
1012 | break; | |
1dab94dd | 1013 | |
8cc66334 EW |
1014 | case 'E': |
1015 | { | |
1016 | unsigned int x; | |
1017 | ||
1018 | x = avr_get_constant (str, 15); | |
1019 | str = input_line_pointer; | |
1020 | op_mask |= (x << 4); | |
1021 | } | |
1022 | break; | |
99700d6f | 1023 | |
1188e082 DC |
1024 | case '?': |
1025 | break; | |
1dab94dd | 1026 | |
adde6300 | 1027 | default: |
00d2865b | 1028 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 1029 | } |
1dab94dd | 1030 | |
adde6300 AM |
1031 | *line = str; |
1032 | return op_mask; | |
1033 | } | |
1034 | ||
dc191a8f NC |
1035 | /* Parse instruction operands. |
1036 | Return binary opcode. */ | |
1037 | ||
1038 | static unsigned int | |
1039 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
1040 | { | |
1041 | char *op = opcode->constraints; | |
1042 | unsigned int bin = opcode->bin_opcode; | |
1043 | char *frag = frag_more (opcode->insn_size * 2); | |
1044 | char *str = *line; | |
1045 | int where = frag - frag_now->fr_literal; | |
1046 | static unsigned int prev = 0; /* Previous opcode. */ | |
1047 | ||
1048 | /* Opcode have operands. */ | |
1049 | if (*op) | |
1050 | { | |
1051 | unsigned int reg1 = 0; | |
1052 | unsigned int reg2 = 0; | |
1053 | int reg1_present = 0; | |
1054 | int reg2_present = 0; | |
1055 | ||
1056 | /* Parse first operand. */ | |
1057 | if (REGISTER_P (*op)) | |
1058 | reg1_present = 1; | |
1059 | reg1 = avr_operand (opcode, where, op, &str); | |
1060 | ++op; | |
1061 | ||
1062 | /* Parse second operand. */ | |
1063 | if (*op) | |
1064 | { | |
1065 | if (*op == ',') | |
1066 | ++op; | |
1067 | ||
1068 | if (*op == '=') | |
1069 | { | |
1070 | reg2 = reg1; | |
1071 | reg2_present = 1; | |
1072 | } | |
1073 | else | |
1074 | { | |
1075 | if (REGISTER_P (*op)) | |
1076 | reg2_present = 1; | |
1077 | ||
1078 | str = skip_space (str); | |
1079 | if (*str++ != ',') | |
1080 | as_bad (_("`,' required")); | |
1081 | str = skip_space (str); | |
1082 | ||
1083 | reg2 = avr_operand (opcode, where, op, &str); | |
1084 | } | |
1085 | ||
1086 | if (reg1_present && reg2_present) | |
1087 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1088 | else if (reg2_present) | |
1089 | reg2 <<= 4; | |
1090 | } | |
1091 | if (reg1_present) | |
1092 | reg1 <<= 4; | |
1093 | bin |= reg1 | reg2; | |
1094 | } | |
1095 | ||
1096 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1097 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1098 | as_warn (_("undefined combination of operands")); | |
1099 | ||
1100 | if (opcode->insn_size == 2) | |
1101 | { | |
1102 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1103 | (AVR core bug, fixed in the newer devices). */ | |
1104 | if (!(avr_opt.no_skip_bug || | |
1105 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1106 | && AVR_SKIP_P (prev)) | |
1107 | as_warn (_("skipping two-word instruction")); | |
1108 | ||
1109 | bfd_putl32 ((bfd_vma) bin, frag); | |
1110 | } | |
1111 | else | |
1112 | bfd_putl16 ((bfd_vma) bin, frag); | |
1113 | ||
1114 | prev = bin; | |
1115 | *line = str; | |
1116 | return bin; | |
1117 | } | |
1118 | ||
adde6300 AM |
1119 | /* GAS will call this function for each section at the end of the assembly, |
1120 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1121 | |
adde6300 | 1122 | valueT |
dc191a8f | 1123 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1124 | { |
1125 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1126 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1127 | } | |
1128 | ||
1129 | /* If you define this macro, it should return the offset between the | |
1130 | address of a PC relative fixup and the position from which the PC | |
1131 | relative adjustment should be made. On many processors, the base | |
1132 | of a PC relative instruction is the next instruction, so this | |
1133 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1134 | |
adde6300 | 1135 | long |
dc191a8f | 1136 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1137 | { |
c6a7ab1f | 1138 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1139 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1140 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1141 | return 0; | |
1dab94dd | 1142 | |
adde6300 AM |
1143 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1144 | } | |
1145 | ||
1146 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1147 | value in the object file. */ |
1148 | ||
94f592af | 1149 | void |
dc191a8f | 1150 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1151 | { |
1152 | unsigned char *where; | |
1153 | unsigned long insn; | |
a161fe53 | 1154 | long value = *valP; |
adde6300 | 1155 | |
94f592af NC |
1156 | if (fixP->fx_addsy == (symbolS *) NULL) |
1157 | fixP->fx_done = 1; | |
1158 | ||
87733541 AM |
1159 | else if (fixP->fx_pcrel) |
1160 | { | |
1161 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1162 | ||
1163 | if (s == seg || s == absolute_section) | |
1164 | { | |
1165 | value += S_GET_VALUE (fixP->fx_addsy); | |
1166 | fixP->fx_done = 1; | |
1167 | } | |
1168 | } | |
1169 | ||
a161fe53 AM |
1170 | /* We don't actually support subtracting a symbol. */ |
1171 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1172 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1173 | |
94f592af | 1174 | switch (fixP->fx_r_type) |
adde6300 AM |
1175 | { |
1176 | default: | |
94f592af | 1177 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1178 | break; |
1179 | case BFD_RELOC_AVR_7_PCREL: | |
1180 | case BFD_RELOC_AVR_13_PCREL: | |
1181 | case BFD_RELOC_32: | |
1182 | case BFD_RELOC_16: | |
1183 | case BFD_RELOC_AVR_CALL: | |
1184 | break; | |
1185 | } | |
1186 | ||
94f592af | 1187 | if (fixP->fx_done) |
adde6300 AM |
1188 | { |
1189 | /* Fetch the instruction, insert the fully resolved operand | |
1190 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1191 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1192 | insn = bfd_getl16 (where); |
1193 | ||
94f592af | 1194 | switch (fixP->fx_r_type) |
adde6300 AM |
1195 | { |
1196 | case BFD_RELOC_AVR_7_PCREL: | |
1197 | if (value & 1) | |
94f592af | 1198 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1199 | _("odd address operand: %ld"), value); |
1dab94dd | 1200 | |
adde6300 AM |
1201 | /* Instruction addresses are always right-shifted by 1. */ |
1202 | value >>= 1; | |
1203 | --value; /* Correct PC. */ | |
1dab94dd | 1204 | |
adde6300 | 1205 | if (value < -64 || value > 63) |
94f592af | 1206 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1207 | _("operand out of range: %ld"), value); |
1208 | value = (value << 3) & 0x3f8; | |
1209 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1210 | break; | |
1211 | ||
1212 | case BFD_RELOC_AVR_13_PCREL: | |
1213 | if (value & 1) | |
94f592af | 1214 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1215 | _("odd address operand: %ld"), value); |
1dab94dd | 1216 | |
adde6300 AM |
1217 | /* Instruction addresses are always right-shifted by 1. */ |
1218 | value >>= 1; | |
1219 | --value; /* Correct PC. */ | |
adde6300 AM |
1220 | |
1221 | if (value < -2048 || value > 2047) | |
1222 | { | |
65aa24b6 | 1223 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1224 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1225 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1226 | _("operand out of range: %ld"), value); |
1227 | } | |
1228 | ||
1229 | value &= 0xfff; | |
1230 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1231 | break; | |
1232 | ||
1233 | case BFD_RELOC_32: | |
0b649256 | 1234 | bfd_putl32 ((bfd_vma) value, where); |
adde6300 AM |
1235 | break; |
1236 | ||
1237 | case BFD_RELOC_16: | |
1238 | bfd_putl16 ((bfd_vma) value, where); | |
1239 | break; | |
1240 | ||
17e57237 NC |
1241 | case BFD_RELOC_8: |
1242 | if (value > 255 || value < -128) | |
1243 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1244 | _("operand out of range: %ld"), value); | |
1245 | *where = value; | |
1246 | break; | |
1247 | ||
adde6300 | 1248 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1249 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1250 | break; |
1251 | ||
750bce0e NC |
1252 | case BFD_RELOC_AVR_LDI: |
1253 | if (value > 255) | |
1254 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1255 | _("operand out of range: %ld"), value); | |
1256 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1257 | break; | |
1258 | ||
1259 | case BFD_RELOC_AVR_6: | |
1260 | if ((value > 63) || (value < 0)) | |
1261 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1262 | _("operand out of range: %ld"), value); | |
1263 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1264 | break; | |
1265 | ||
1266 | case BFD_RELOC_AVR_6_ADIW: | |
1267 | if ((value > 63) || (value < 0)) | |
1268 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1269 | _("operand out of range: %ld"), value); | |
1270 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1271 | break; | |
1272 | ||
adde6300 AM |
1273 | case BFD_RELOC_AVR_LO8_LDI: |
1274 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1275 | break; | |
1276 | ||
adde6300 AM |
1277 | case BFD_RELOC_AVR_HI8_LDI: |
1278 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1279 | break; | |
1280 | ||
df406460 | 1281 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1282 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1283 | break; | |
1284 | ||
1285 | case BFD_RELOC_AVR_HH8_LDI: | |
1286 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1287 | break; | |
1288 | ||
1289 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1290 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1291 | break; | |
1292 | ||
adde6300 AM |
1293 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1294 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1295 | break; | |
1296 | ||
df406460 | 1297 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1298 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1299 | break; | |
1300 | ||
1301 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1302 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1303 | break; | |
1304 | ||
1305 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1306 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1307 | break; | |
1308 | ||
1309 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1310 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1311 | break; | |
1312 | ||
1313 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1314 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1315 | break; | |
1316 | ||
1317 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1318 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1319 | break; | |
1320 | ||
1321 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1322 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1323 | break; | |
1324 | ||
1325 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1326 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1327 | break; | |
1328 | ||
1329 | case BFD_RELOC_AVR_CALL: | |
1330 | { | |
1331 | unsigned long x; | |
1dab94dd | 1332 | |
adde6300 AM |
1333 | x = bfd_getl16 (where); |
1334 | if (value & 1) | |
94f592af | 1335 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1336 | _("odd address operand: %ld"), value); |
1337 | value >>= 1; | |
1338 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1339 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1340 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1341 | } |
1342 | break; | |
1343 | ||
99700d6f NC |
1344 | case BFD_RELOC_AVR_8_LO: |
1345 | *where = 0xff & value; | |
1346 | break; | |
1347 | ||
1348 | case BFD_RELOC_AVR_8_HI: | |
1349 | *where = 0xff & (value >> 8); | |
1350 | break; | |
1351 | ||
40551fb8 | 1352 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1353 | *where = 0xff & (value >> 16); |
1354 | break; | |
1355 | ||
1356 | default: | |
c6a7ab1f | 1357 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1358 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1359 | break; |
1360 | } | |
1361 | } | |
1362 | else | |
1363 | { | |
a61a9fbc | 1364 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1365 | { |
1366 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1367 | case -BFD_RELOC_AVR_HI8_LDI: | |
1368 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1369 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1370 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1371 | _("only constant expression allowed")); |
94f592af | 1372 | fixP->fx_done = 1; |
adde6300 AM |
1373 | break; |
1374 | default: | |
1375 | break; | |
1376 | } | |
adde6300 | 1377 | } |
adde6300 AM |
1378 | } |
1379 | ||
7be1c489 AM |
1380 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1381 | to `bfd_install_relocation'. This currently works poorly, as | |
1382 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1383 | `tc_gen_reloc' have been written to work around the problems, which | |
1384 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1385 | |
1386 | /* If while processing a fixup, a reloc really needs to be created | |
1387 | then it is done here. */ | |
1388 | ||
1389 | arelent * | |
dc191a8f NC |
1390 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1391 | fixS *fixp) | |
adde6300 AM |
1392 | { |
1393 | arelent *reloc; | |
1394 | ||
94d4433a | 1395 | if (fixp->fx_subsy != NULL) |
df406460 | 1396 | { |
94d4433a | 1397 | as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex")); |
df406460 NC |
1398 | return NULL; |
1399 | } | |
1400 | ||
dc191a8f | 1401 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1402 | |
dc191a8f | 1403 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1404 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1405 | ||
1406 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1407 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1408 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1409 | { | |
1410 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1411 | _("reloc %d not supported by object file format"), |
1412 | (int) fixp->fx_r_type); | |
adde6300 AM |
1413 | return NULL; |
1414 | } | |
1415 | ||
1416 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1417 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1418 | reloc->address = fixp->fx_offset; | |
1419 | ||
1420 | reloc->addend = fixp->fx_offset; | |
1421 | ||
1422 | return reloc; | |
1423 | } | |
1424 | ||
adde6300 | 1425 | void |
dc191a8f | 1426 | md_assemble (char *str) |
adde6300 | 1427 | { |
c6a7ab1f | 1428 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1429 | char op[11]; |
1430 | ||
c6a7ab1f | 1431 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1432 | |
1433 | if (!op[0]) | |
00d2865b | 1434 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1435 | |
1436 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1437 | ||
1438 | if (opcode == NULL) | |
1439 | { | |
00d2865b | 1440 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1441 | return; |
1442 | } | |
1443 | ||
b170af93 | 1444 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1445 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1446 | |
1188e082 DC |
1447 | if (*str && *opcode->constraints == '?') |
1448 | ++opcode; | |
b170af93 | 1449 | |
00d2865b NC |
1450 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1451 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 | 1452 | |
d4f4f3fb AM |
1453 | dwarf2_emit_insn (0); |
1454 | ||
adde6300 AM |
1455 | /* We used to set input_line_pointer to the result of get_operands, |
1456 | but that is wrong. Our caller assumes we don't change it. */ | |
1457 | { | |
1458 | char *t = input_line_pointer; | |
dc191a8f | 1459 | |
adde6300 | 1460 | avr_operands (opcode, &str); |
b170af93 | 1461 | if (*skip_space (str)) |
00d2865b | 1462 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1463 | input_line_pointer = t; |
1464 | } | |
1465 | } | |
1466 | ||
99700d6f NC |
1467 | typedef struct |
1468 | { | |
1469 | /* Name of the expression modifier allowed with .byte, .word, etc. */ | |
1470 | const char *name; | |
1471 | ||
1472 | /* Only allowed with n bytes of data. */ | |
1473 | int nbytes; | |
1474 | ||
1475 | /* Associated RELOC. */ | |
1476 | bfd_reloc_code_real_type reloc; | |
1477 | ||
1478 | /* Part of the error message. */ | |
1479 | const char *error; | |
1480 | } exp_mod_data_t; | |
1481 | ||
1482 | static const exp_mod_data_t exp_mod_data[] = | |
1483 | { | |
1484 | /* Default, must be first. */ | |
1485 | { "", 0, BFD_RELOC_16, "" }, | |
1486 | /* Divides by 2 to get word address. Generate Stub. */ | |
1487 | { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " }, | |
1488 | { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " }, | |
1489 | /* The following are used together with avr-gcc's __memx address space | |
1490 | in order to initialize a 24-bit pointer variable with a 24-bit address. | |
40551fb8 NC |
1491 | For address in flash, hlo8 will contain the flash segment if the |
1492 | symbol is located in flash. If the symbol is located in RAM; hlo8 | |
99700d6f NC |
1493 | will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash |
1494 | addresses linearize address space. */ | |
1495 | { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " }, | |
1496 | { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " }, | |
40551fb8 NC |
1497 | { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " }, |
1498 | { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " }, | |
99700d6f NC |
1499 | /* End of list. */ |
1500 | { NULL, 0, 0, NULL } | |
1501 | }; | |
1502 | ||
1503 | /* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */ | |
1504 | static const exp_mod_data_t *pexp_mod_data = &exp_mod_data[0]; | |
adde6300 | 1505 | |
99700d6f NC |
1506 | /* Parse special CONS expression: pm (expression) or alternatively |
1507 | gs (expression). These are used for addressing program memory. Moreover, | |
40551fb8 | 1508 | define lo8 (expression), hi8 (expression) and hlo8 (expression). */ |
c6a7ab1f | 1509 | |
adde6300 | 1510 | void |
dc191a8f | 1511 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1512 | { |
99700d6f | 1513 | const exp_mod_data_t *pexp = &exp_mod_data[0]; |
c6a7ab1f | 1514 | char *tmp; |
adde6300 | 1515 | |
99700d6f | 1516 | pexp_mod_data = pexp; |
adde6300 AM |
1517 | |
1518 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1519 | ||
99700d6f NC |
1520 | /* The first entry of exp_mod_data[] contains an entry if no |
1521 | expression modifier is present. Skip it. */ | |
1522 | ||
1523 | for (pexp++; pexp->name; pexp++) | |
adde6300 | 1524 | { |
99700d6f | 1525 | int len = strlen (pexp->name); |
1dab94dd | 1526 | |
99700d6f NC |
1527 | if (nbytes == pexp->nbytes |
1528 | && strncasecmp (input_line_pointer, pexp->name, len) == 0) | |
adde6300 AM |
1529 | { |
1530 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1531 | |
adde6300 AM |
1532 | if (*input_line_pointer == '(') |
1533 | { | |
1534 | input_line_pointer = skip_space (input_line_pointer + 1); | |
99700d6f | 1535 | pexp_mod_data = pexp; |
adde6300 | 1536 | expression (exp); |
1dab94dd | 1537 | |
adde6300 AM |
1538 | if (*input_line_pointer == ')') |
1539 | ++input_line_pointer; | |
1540 | else | |
1541 | { | |
00d2865b | 1542 | as_bad (_("`)' required")); |
99700d6f | 1543 | pexp_mod_data = &exp_mod_data[0]; |
adde6300 | 1544 | } |
1dab94dd | 1545 | |
adde6300 AM |
1546 | return; |
1547 | } | |
1dab94dd | 1548 | |
adde6300 | 1549 | input_line_pointer = tmp; |
99700d6f NC |
1550 | |
1551 | break; | |
adde6300 AM |
1552 | } |
1553 | } | |
1dab94dd | 1554 | |
adde6300 AM |
1555 | expression (exp); |
1556 | } | |
1557 | ||
1558 | void | |
dc191a8f NC |
1559 | avr_cons_fix_new (fragS *frag, |
1560 | int where, | |
1561 | int nbytes, | |
1562 | expressionS *exp) | |
adde6300 | 1563 | { |
99700d6f NC |
1564 | int bad = 0; |
1565 | ||
1566 | switch (pexp_mod_data->reloc) | |
adde6300 | 1567 | { |
99700d6f | 1568 | default: |
17e57237 NC |
1569 | if (nbytes == 1) |
1570 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1571 | else if (nbytes == 2) | |
b34976b6 | 1572 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1573 | else if (nbytes == 4) |
b34976b6 | 1574 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1575 | else |
99700d6f NC |
1576 | bad = 1; |
1577 | break; | |
1578 | ||
1579 | case BFD_RELOC_AVR_16_PM: | |
1580 | case BFD_RELOC_AVR_8_LO: | |
1581 | case BFD_RELOC_AVR_8_HI: | |
40551fb8 | 1582 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1583 | if (nbytes == pexp_mod_data->nbytes) |
1584 | fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc); | |
adde6300 | 1585 | else |
99700d6f NC |
1586 | bad = 1; |
1587 | break; | |
adde6300 | 1588 | } |
99700d6f NC |
1589 | |
1590 | if (bad) | |
1591 | as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); | |
1592 | ||
1593 | pexp_mod_data = &exp_mod_data[0]; | |
adde6300 | 1594 | } |
af3ecb4a | 1595 | |
71863e73 NC |
1596 | static bfd_boolean |
1597 | mcu_has_3_byte_pc (void) | |
1598 | { | |
1599 | int mach = avr_mcu->mach; | |
1600 | ||
1601 | return mach == bfd_mach_avr6 | |
1602 | || mach == bfd_mach_avrxmega6 | |
1603 | || mach == bfd_mach_avrxmega7; | |
1604 | } | |
1605 | ||
af3ecb4a RH |
1606 | void |
1607 | tc_cfi_frame_initial_instructions (void) | |
1608 | { | |
1609 | /* AVR6 pushes 3 bytes for calls. */ | |
71863e73 | 1610 | int return_size = (mcu_has_3_byte_pc () ? 3 : 2); |
af3ecb4a RH |
1611 | |
1612 | /* The CFA is the caller's stack location before the call insn. */ | |
1613 | /* Note that the stack pointer is dwarf register number 32. */ | |
1614 | cfi_add_CFA_def_cfa (32, return_size); | |
1615 | ||
1616 | /* Note that AVR consistently uses post-decrement, which means that things | |
1617 | do not line up the same way as for targers that use pre-decrement. */ | |
1618 | cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); | |
1619 | } |