Commit | Line | Data |
---|---|---|
adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
6f2750fe | 3 | Copyright (C) 1999-2016 Free Software Foundation, Inc. |
adde6300 AM |
4 | Contributed by Denis Chertykov <denisc@overta.ru> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 10 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
11 | any later version. |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
20 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
21 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 22 | |
adde6300 | 23 | #include "as.h" |
3882b010 | 24 | #include "safe-ctype.h" |
adde6300 | 25 | #include "subsegs.h" |
fb5b7503 | 26 | #include "dwarf2dbg.h" |
af3ecb4a | 27 | #include "dw2gencfi.h" |
eac7440d | 28 | #include "elf/avr.h" |
fdd410ac AB |
29 | #include "elf32-avr.h" |
30 | ||
31 | /* For building a linked list of AVR_PROPERTY_RECORD structures. */ | |
32 | struct avr_property_record_link | |
33 | { | |
34 | struct avr_property_record record; | |
35 | struct avr_property_record_link *next; | |
36 | }; | |
adde6300 | 37 | |
1188e082 DC |
38 | struct avr_opcodes_s |
39 | { | |
e0471c16 TS |
40 | const char * name; |
41 | const char * constraints; | |
42 | const char * opcode; | |
dc191a8f NC |
43 | int insn_size; /* In words. */ |
44 | int isa; | |
45 | unsigned int bin_opcode; | |
1188e082 DC |
46 | }; |
47 | ||
48 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
8cc66334 | 49 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
1188e082 DC |
50 | |
51 | struct avr_opcodes_s avr_opcodes[] = | |
52 | { | |
53 | #include "opcode/avr.h" | |
8cc66334 | 54 | {NULL, NULL, NULL, 0, 0, 0} |
1188e082 DC |
55 | }; |
56 | ||
adde6300 AM |
57 | const char comment_chars[] = ";"; |
58 | const char line_comment_chars[] = "#"; | |
59 | const char line_separator_chars[] = "$"; | |
60 | ||
adde6300 AM |
61 | const char *md_shortopts = "m:"; |
62 | struct mcu_type_s | |
63 | { | |
e0471c16 | 64 | const char *name; |
adde6300 AM |
65 | int isa; |
66 | int mach; | |
67 | }; | |
68 | ||
1f8ae5e6 | 69 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 70 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 71 | |
adde6300 AM |
72 | static struct mcu_type_s mcu_types[] = |
73 | { | |
7b21ac3f EW |
74 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
75 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
99700d6f NC |
76 | but set to AVR_ISA_AVR25 for some following version |
77 | of GCC (from 4.3) for backward compatibility. */ | |
7b21ac3f EW |
78 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, |
79 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
99700d6f NC |
80 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, |
81 | but set to AVR_ISA_AVR3_ALL for some following version | |
7b21ac3f EW |
82 | of GCC (from 4.3) for backward compatibility. */ |
83 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
84 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
85 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
86 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
99700d6f NC |
87 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, |
88 | but set to AVR_ISA_AVR51 for some following version | |
7b21ac3f EW |
89 | of GCC (from 4.3) for backward compatibility. */ |
90 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
91 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
92 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 EW |
93 | {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1}, |
94 | {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
95 | {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3}, | |
96 | {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, | |
97 | {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, | |
98 | {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
99 | {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, | |
f36e8886 | 100 | {"avrtiny", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, |
28c9d252 | 101 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
102 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
103 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
104 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
105 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
106 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
107 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
108 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
109 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
110 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 111 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
112 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
113 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
114 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
115 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
116 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
117 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
255d9eec | 118 | {"ata5272", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
119 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, |
120 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
121 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 122 | {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 123 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e EW |
124 | {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25}, |
125 | {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
7b21ac3f | 126 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 127 | {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 128 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 129 | {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
130 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, |
131 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
132 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
133 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
8453da2e | 134 | {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 135 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, |
e760a81b | 136 | {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f | 137 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, |
8453da2e | 138 | {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25}, |
2b02f87c | 139 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
140 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
141 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
142 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
255d9eec | 143 | {"attiny828", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
144 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, |
145 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, | |
146 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
147 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
148 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
149 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
150 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, | |
151 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 152 | {"ata5505", AVR_ISA_AVR35, bfd_mach_avr35}, |
11908008 EW |
153 | {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35}, |
154 | {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
155 | {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35}, | |
255d9eec | 156 | {"attiny1634", AVR_ISA_AVR35, bfd_mach_avr35}, |
28c9d252 | 157 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8be59acb | 158 | {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
159 | {"atmega8a", AVR_ISA_M8, bfd_mach_avr4}, |
160 | {"ata6285", AVR_ISA_AVR4, bfd_mach_avr4}, | |
161 | {"ata6286", AVR_ISA_AVR4, bfd_mach_avr4}, | |
7b21ac3f | 162 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 163 | {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec | 164 | {"atmega48pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f EW |
165 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, |
166 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
e760a81b | 167 | {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 168 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, |
e760a81b | 169 | {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4}, |
28c9d252 NC |
170 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
171 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f EW |
172 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
173 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, | |
174 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
175 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
176 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
177 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 178 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
255d9eec DC |
179 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
180 | {"ata5790", AVR_ISA_AVR5, bfd_mach_avr5}, | |
181 | {"ata5795", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 182 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 183 | {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 184 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 185 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 186 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
e760a81b | 187 | {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 188 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 189 | {"atmega164pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 190 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 191 | {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 192 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 193 | {"atmega165pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 194 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 195 | {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 196 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 197 | {"atmega168pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 198 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 199 | {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 200 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 201 | {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 202 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 203 | {"atmega32a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 204 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 205 | {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 206 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 207 | {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 208 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 209 | {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 210 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 211 | {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 212 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 213 | {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 214 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 215 | {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 216 | {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
217 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, |
218 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 219 | {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 220 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 221 | {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 222 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b | 223 | {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 224 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 225 | {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 226 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec DC |
227 | {"atmega64rfr2", AVR_ISA_AVR5, bfd_mach_avr5}, |
228 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 229 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 230 | {"atmega64a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
231 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, |
232 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
e760a81b | 233 | {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 234 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, |
8453da2e | 235 | {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 236 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
237 | {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5}, |
238 | {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 239 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
240 | {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5}, |
241 | {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 242 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
243 | {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5}, |
244 | {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 245 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, |
e760a81b EW |
246 | {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5}, |
247 | {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
4d13caa0 NC |
248 | {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, |
249 | {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 250 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, |
255d9eec | 251 | {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 252 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 253 | {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
2b02f87c | 254 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
b8c610a7 | 255 | {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5}, |
e760a81b | 256 | {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
257 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
258 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
b8c610a7 | 259 | {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
260 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, |
261 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
262 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
263 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
264 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 265 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
266 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
267 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 268 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 269 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
270 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
271 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 272 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 273 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
e760a81b | 274 | {"m3000", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f | 275 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
255d9eec | 276 | {"atmega128a", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
277 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, |
278 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
255d9eec | 279 | {"atmega1284", AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f | 280 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, |
17f4880d | 281 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
4d13caa0 NC |
282 | {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, |
283 | {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
284 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
285 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
286 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
287 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, | |
288 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
4d13caa0 NC |
289 | {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, |
290 | {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6}, | |
8cc66334 | 291 | {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
292 | {"atxmega16a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
293 | {"atxmega16c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 EW |
294 | {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
295 | {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
255d9eec DC |
296 | {"atxmega32a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, |
297 | {"atxmega32c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2}, | |
8cc66334 | 298 | {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
255d9eec DC |
299 | {"atxmega32e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
300 | {"atxmega16e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
301 | {"atxmega8e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, | |
6f8a4444 | 302 | {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2}, |
8cc66334 | 303 | {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec DC |
304 | {"atxmega64a3u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, |
305 | {"atxmega64a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
306 | {"atxmega64b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
307 | {"atxmega64b3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
308 | {"atxmega64c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4}, | |
8cc66334 | 309 | {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
255d9eec | 310 | {"atxmega64d4", AVR_ISA_XMEGA, bfd_mach_avrxmega4}, |
8cc66334 | 311 | {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5}, |
7bab7634 | 312 | {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5}, |
8cc66334 | 313 | {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 314 | {"atxmega128a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
7bab7634 | 315 | {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec DC |
316 | {"atxmega128b3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
317 | {"atxmega128c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, | |
8cc66334 | 318 | {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec | 319 | {"atxmega128d4", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
8cc66334 | 320 | {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
321 | {"atxmega192a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
322 | {"atxmega192c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, | |
8cc66334 EW |
323 | {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
324 | {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
255d9eec | 325 | {"atxmega256a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 326 | {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
7bab7634 | 327 | {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6}, |
255d9eec | 328 | {"atxmega256c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
8cc66334 | 329 | {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, |
255d9eec DC |
330 | {"atxmega384c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6}, |
331 | {"atxmega384d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6}, | |
8cc66334 | 332 | {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7}, |
7bab7634 | 333 | {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
255d9eec | 334 | {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7}, |
f36e8886 BS |
335 | {"attiny4", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, |
336 | {"attiny5", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
337 | {"attiny9", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
338 | {"attiny10", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
339 | {"attiny20", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
340 | {"attiny40", AVR_ISA_AVRTINY, bfd_mach_avrtiny}, | |
adde6300 AM |
341 | {NULL, 0, 0} |
342 | }; | |
343 | ||
af910977 | 344 | |
adde6300 | 345 | /* Current MCU type. */ |
7b21ac3f | 346 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
af910977 | 347 | static struct mcu_type_s specified_mcu; |
dc191a8f | 348 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 349 | |
00d2865b NC |
350 | /* AVR target-specific switches. */ |
351 | struct avr_opt_s | |
352 | { | |
dc191a8f NC |
353 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
354 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
355 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
edc9e9a6 AB |
356 | int no_link_relax; /* -mno-link-relax / -mlink-relax: generate (or not) |
357 | relocations for linker relaxation. */ | |
00d2865b NC |
358 | }; |
359 | ||
e4ef1b6c | 360 | static struct avr_opt_s avr_opt = { 0, 0, 0, 0 }; |
00d2865b | 361 | |
adde6300 AM |
362 | const char EXP_CHARS[] = "eE"; |
363 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
364 | |
365 | static void avr_set_arch (int); | |
adde6300 AM |
366 | |
367 | /* The target specific pseudo-ops which we support. */ | |
368 | const pseudo_typeS md_pseudo_table[] = | |
369 | { | |
370 | {"arch", avr_set_arch, 0}, | |
371 | { NULL, NULL, 0} | |
372 | }; | |
373 | ||
374 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 375 | |
dc191a8f NC |
376 | #define EXP_MOD_NAME(i) exp_mod[i].name |
377 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
378 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
379 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
380 | |
381 | struct exp_mod_s | |
382 | { | |
e0471c16 | 383 | const char * name; |
dc191a8f NC |
384 | bfd_reloc_code_real_type reloc; |
385 | bfd_reloc_code_real_type neg_reloc; | |
386 | int have_pm; | |
adde6300 AM |
387 | }; |
388 | ||
c6a7ab1f NC |
389 | static struct exp_mod_s exp_mod[] = |
390 | { | |
adde6300 AM |
391 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
392 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
393 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
394 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
395 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
396 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 | 397 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
e4efb665 | 398 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, |
adde6300 AM |
399 | }; |
400 | ||
2b0f3761 | 401 | /* A union used to store indices into the exp_mod[] array |
8ad7c533 NC |
402 | in a hash table which expects void * data types. */ |
403 | typedef union | |
404 | { | |
405 | void * ptr; | |
406 | int index; | |
407 | } mod_index; | |
408 | ||
adde6300 AM |
409 | /* Opcode hash table. */ |
410 | static struct hash_control *avr_hash; | |
411 | ||
412 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
413 | static struct hash_control *avr_mod_hash; | |
414 | ||
00d2865b | 415 | #define OPTION_MMCU 'm' |
dc191a8f NC |
416 | enum options |
417 | { | |
418 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
419 | OPTION_NO_SKIP_BUG, | |
af910977 | 420 | OPTION_NO_WRAP, |
e4ef1b6c | 421 | OPTION_ISA_RMW, |
edc9e9a6 AB |
422 | OPTION_LINK_RELAX, |
423 | OPTION_NO_LINK_RELAX | |
dc191a8f | 424 | }; |
adde6300 | 425 | |
c6a7ab1f NC |
426 | struct option md_longopts[] = |
427 | { | |
00d2865b NC |
428 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
429 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
430 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
431 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
af910977 | 432 | { "mrmw", no_argument, NULL, OPTION_ISA_RMW }, |
e4ef1b6c | 433 | { "mlink-relax", no_argument, NULL, OPTION_LINK_RELAX }, |
edc9e9a6 | 434 | { "mno-link-relax", no_argument, NULL, OPTION_NO_LINK_RELAX }, |
00d2865b | 435 | { NULL, no_argument, NULL, 0 } |
adde6300 | 436 | }; |
adde6300 | 437 | |
c6a7ab1f | 438 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
439 | |
440 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 441 | |
00d2865b | 442 | static void |
dc191a8f | 443 | show_mcu_list (FILE *stream) |
00d2865b NC |
444 | { |
445 | int i, x; | |
446 | ||
447 | fprintf (stream, _("Known MCU names:")); | |
448 | x = 1000; | |
1dab94dd | 449 | |
00d2865b NC |
450 | for (i = 0; mcu_types[i].name; i++) |
451 | { | |
452 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 453 | |
00d2865b | 454 | x += len + 1; |
1dab94dd | 455 | |
00d2865b | 456 | if (x < 75) |
c6a7ab1f | 457 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
458 | else |
459 | { | |
460 | fprintf (stream, "\n %s", mcu_types[i].name); | |
461 | x = len + 2; | |
462 | } | |
463 | } | |
1dab94dd | 464 | |
c6a7ab1f | 465 | fprintf (stream, "\n"); |
00d2865b NC |
466 | } |
467 | ||
adde6300 | 468 | static inline char * |
dc191a8f | 469 | skip_space (char *s) |
adde6300 AM |
470 | { |
471 | while (*s == ' ' || *s == '\t') | |
472 | ++s; | |
473 | return s; | |
474 | } | |
475 | ||
476 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 477 | |
adde6300 AM |
478 | static char * |
479 | extract_word (char *from, char *to, int limit) | |
480 | { | |
adde6300 AM |
481 | char *op_end; |
482 | int size = 0; | |
483 | ||
484 | /* Drop leading whitespace. */ | |
485 | from = skip_space (from); | |
486 | *to = 0; | |
c6a7ab1f | 487 | |
adde6300 | 488 | /* Find the op code end. */ |
87975d2a | 489 | for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
490 | { |
491 | to[size++] = *op_end++; | |
492 | if (size + 1 >= limit) | |
493 | break; | |
494 | } | |
1dab94dd | 495 | |
adde6300 AM |
496 | to[size] = 0; |
497 | return op_end; | |
498 | } | |
499 | ||
500 | int | |
dc191a8f NC |
501 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
502 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
503 | { |
504 | abort (); | |
505 | return 0; | |
506 | } | |
507 | ||
508 | void | |
dc191a8f | 509 | md_show_usage (FILE *stream) |
adde6300 | 510 | { |
00d2865b | 511 | fprintf (stream, |
4fb8d1c6 | 512 | _("AVR Assembler options:\n" |
adde6300 AM |
513 | " -mmcu=[avr-name] select microcontroller variant\n" |
514 | " [avr-name] can be:\n" | |
7b21ac3f EW |
515 | " avr1 - classic AVR core without data RAM\n" |
516 | " avr2 - classic AVR core with up to 8K program memory\n" | |
517 | " avr25 - classic AVR core with up to 8K program memory\n" | |
518 | " plus the MOVW instruction\n" | |
519 | " avr3 - classic AVR core with up to 64K program memory\n" | |
520 | " avr31 - classic AVR core with up to 128K program memory\n" | |
521 | " avr35 - classic AVR core with up to 64K program memory\n" | |
522 | " plus the MOVW instruction\n" | |
523 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
524 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
525 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
526 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
8c997c27 | 527 | " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n" |
8cc66334 EW |
528 | " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n" |
529 | " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n" | |
530 | " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n" | |
531 | " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n" | |
532 | " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n" | |
f36e8886 | 533 | " avrtiny - AVR Tiny core with 16 gp registers\n")); |
00d2865b NC |
534 | fprintf (stream, |
535 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
536 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
537 | " (default for avr4, avr5)\n" | |
538 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
af910977 DC |
539 | " (default for avr3, avr5)\n" |
540 | " -mrmw accept Read-Modify-Write instructions\n" | |
edc9e9a6 AB |
541 | " -mlink-relax generate relocations for linker relaxation (default)\n" |
542 | " -mno-link-relax don't generate relocations for linker relaxation.\n" | |
543 | )); | |
00d2865b | 544 | show_mcu_list (stream); |
adde6300 AM |
545 | } |
546 | ||
547 | static void | |
dc191a8f | 548 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 549 | { |
dc191a8f | 550 | char str[20]; |
1dab94dd | 551 | |
adde6300 | 552 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 553 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
554 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
555 | } | |
556 | ||
557 | int | |
17b9d67d | 558 | md_parse_option (int c, const char *arg) |
adde6300 | 559 | { |
00d2865b | 560 | switch (c) |
adde6300 | 561 | { |
00d2865b NC |
562 | case OPTION_MMCU: |
563 | { | |
564 | int i; | |
00d2865b NC |
565 | |
566 | for (i = 0; mcu_types[i].name; ++i) | |
f73e41ef | 567 | if (strcasecmp (mcu_types[i].name, arg) == 0) |
00d2865b | 568 | break; |
adde6300 | 569 | |
00d2865b NC |
570 | if (!mcu_types[i].name) |
571 | { | |
572 | show_mcu_list (stderr); | |
573 | as_fatal (_("unknown MCU: %s\n"), arg); | |
574 | } | |
65aa24b6 | 575 | |
00d2865b NC |
576 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
577 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
578 | as .arch ... in the asm output at the same time. */ | |
00d2865b | 579 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
e1fa0163 NC |
580 | { |
581 | specified_mcu.name = mcu_types[i].name; | |
582 | specified_mcu.isa |= mcu_types[i].isa; | |
583 | specified_mcu.mach = mcu_types[i].mach; | |
584 | avr_mcu = &specified_mcu; | |
585 | } | |
00d2865b NC |
586 | else |
587 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
588 | avr_mcu->name, mcu_types[i].name); | |
589 | return 1; | |
590 | } | |
591 | case OPTION_ALL_OPCODES: | |
592 | avr_opt.all_opcodes = 1; | |
593 | return 1; | |
594 | case OPTION_NO_SKIP_BUG: | |
595 | avr_opt.no_skip_bug = 1; | |
596 | return 1; | |
597 | case OPTION_NO_WRAP: | |
598 | avr_opt.no_wrap = 1; | |
adde6300 | 599 | return 1; |
af910977 DC |
600 | case OPTION_ISA_RMW: |
601 | specified_mcu.isa |= AVR_ISA_RMW; | |
602 | return 1; | |
e4ef1b6c | 603 | case OPTION_LINK_RELAX: |
edc9e9a6 AB |
604 | avr_opt.no_link_relax = 0; |
605 | return 1; | |
606 | case OPTION_NO_LINK_RELAX: | |
607 | avr_opt.no_link_relax = 1; | |
e4ef1b6c | 608 | return 1; |
adde6300 | 609 | } |
1dab94dd | 610 | |
adde6300 AM |
611 | return 0; |
612 | } | |
613 | ||
614 | symbolS * | |
dc191a8f | 615 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 616 | { |
dc191a8f | 617 | return NULL; |
adde6300 AM |
618 | } |
619 | ||
6d4af3c2 | 620 | const char * |
dc191a8f | 621 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 622 | { |
499ac353 | 623 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
624 | } |
625 | ||
626 | void | |
dc191a8f NC |
627 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
628 | asection *sec ATTRIBUTE_UNUSED, | |
629 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
630 | { |
631 | abort (); | |
632 | } | |
633 | ||
adde6300 | 634 | void |
dc191a8f | 635 | md_begin (void) |
adde6300 | 636 | { |
df136245 | 637 | unsigned int i; |
adde6300 | 638 | struct avr_opcodes_s *opcode; |
dc191a8f | 639 | |
c6a7ab1f | 640 | avr_hash = hash_new (); |
adde6300 AM |
641 | |
642 | /* Insert unique names into hash table. This hash table then provides a | |
643 | quick index to the first opcode with a particular name in the opcode | |
644 | table. */ | |
adde6300 AM |
645 | for (opcode = avr_opcodes; opcode->name; opcode++) |
646 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
647 | ||
648 | avr_mod_hash = hash_new (); | |
649 | ||
dc191a8f | 650 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
651 | { |
652 | mod_index m; | |
653 | ||
654 | m.index = i + 10; | |
655 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
656 | } | |
c6a7ab1f | 657 | |
adde6300 | 658 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
edc9e9a6 | 659 | linkrelax = !avr_opt.no_link_relax; |
adde6300 AM |
660 | } |
661 | ||
df136245 | 662 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 663 | If result greater than MAX then error. */ |
df136245 DC |
664 | |
665 | static unsigned int | |
dc191a8f | 666 | avr_get_constant (char *str, int max) |
df136245 DC |
667 | { |
668 | expressionS ex; | |
dc191a8f | 669 | |
df136245 DC |
670 | str = skip_space (str); |
671 | input_line_pointer = str; | |
dc191a8f | 672 | expression (& ex); |
df136245 DC |
673 | |
674 | if (ex.X_op != O_constant) | |
675 | as_bad (_("constant value required")); | |
676 | ||
677 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 678 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 679 | |
df136245 DC |
680 | return ex.X_add_number; |
681 | } | |
682 | ||
dc191a8f | 683 | /* Parse for ldd/std offset. */ |
df136245 | 684 | |
dc191a8f NC |
685 | static void |
686 | avr_offset_expression (expressionS *exp) | |
adde6300 | 687 | { |
dc191a8f NC |
688 | char *str = input_line_pointer; |
689 | char *tmp; | |
690 | char op[8]; | |
adde6300 | 691 | |
dc191a8f NC |
692 | tmp = str; |
693 | str = extract_word (str, op, sizeof (op)); | |
694 | ||
695 | input_line_pointer = tmp; | |
696 | expression (exp); | |
697 | ||
698 | /* Warn about expressions that fail to use lo8 (). */ | |
699 | if (exp->X_op == O_constant) | |
adde6300 | 700 | { |
dc191a8f | 701 | int x = exp->X_add_number; |
28c9d252 | 702 | |
dc191a8f NC |
703 | if (x < -255 || x > 255) |
704 | as_warn (_("constant out of 8-bit range: %d"), x); | |
705 | } | |
706 | } | |
adde6300 | 707 | |
dc191a8f | 708 | /* Parse ordinary expression. */ |
adde6300 | 709 | |
dc191a8f NC |
710 | static char * |
711 | parse_exp (char *s, expressionS *op) | |
712 | { | |
713 | input_line_pointer = s; | |
714 | expression (op); | |
715 | if (op->X_op == O_absent) | |
716 | as_bad (_("missing operand")); | |
717 | return input_line_pointer; | |
718 | } | |
1dab94dd | 719 | |
dc191a8f NC |
720 | /* Parse special expressions (needed for LDI command): |
721 | xx8 (address) | |
722 | xx8 (-address) | |
723 | pm_xx8 (address) | |
724 | pm_xx8 (-address) | |
725 | where xx is: hh, hi, lo. */ | |
adde6300 | 726 | |
dc191a8f NC |
727 | static bfd_reloc_code_real_type |
728 | avr_ldi_expression (expressionS *exp) | |
729 | { | |
730 | char *str = input_line_pointer; | |
731 | char *tmp; | |
732 | char op[8]; | |
733 | int mod; | |
28c9d252 NC |
734 | int linker_stubs_should_be_generated = 0; |
735 | ||
dc191a8f | 736 | tmp = str; |
adde6300 | 737 | |
dc191a8f | 738 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 739 | |
dc191a8f NC |
740 | if (op[0]) |
741 | { | |
8ad7c533 | 742 | mod_index m; |
28c9d252 | 743 | |
8ad7c533 NC |
744 | m.ptr = hash_find (avr_mod_hash, op); |
745 | mod = m.index; | |
1dab94dd | 746 | |
dc191a8f NC |
747 | if (mod) |
748 | { | |
749 | int closes = 0; | |
b170af93 | 750 | |
dc191a8f NC |
751 | mod -= 10; |
752 | str = skip_space (str); | |
00d2865b | 753 | |
dc191a8f NC |
754 | if (*str == '(') |
755 | { | |
28c9d252 | 756 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 757 | int neg_p = 0; |
00d2865b | 758 | |
dc191a8f | 759 | ++str; |
00d2865b | 760 | |
dc191a8f | 761 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
762 | || strncmp ("gs(",str,3) == 0 |
763 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
764 | || strncmp ("-(pm(", str, 5) == 0) |
765 | { | |
766 | if (HAVE_PM_P (mod)) | |
767 | { | |
768 | ++mod; | |
769 | ++closes; | |
770 | } | |
771 | else | |
772 | as_bad (_("illegal expression")); | |
b170af93 | 773 | |
28c9d252 NC |
774 | if (str[0] == 'g' || str[2] == 'g') |
775 | linker_stubs_should_be_generated = 1; | |
776 | ||
dc191a8f NC |
777 | if (*str == '-') |
778 | { | |
779 | neg_p = 1; | |
780 | ++closes; | |
781 | str += 5; | |
782 | } | |
783 | else | |
784 | str += 3; | |
785 | } | |
adde6300 | 786 | |
dc191a8f NC |
787 | if (*str == '-' && *(str + 1) == '(') |
788 | { | |
789 | neg_p ^= 1; | |
790 | ++closes; | |
791 | str += 2; | |
792 | } | |
750bce0e | 793 | |
dc191a8f NC |
794 | input_line_pointer = str; |
795 | expression (exp); | |
750bce0e | 796 | |
dc191a8f NC |
797 | do |
798 | { | |
799 | if (*input_line_pointer != ')') | |
800 | { | |
801 | as_bad (_("`)' required")); | |
802 | break; | |
803 | } | |
804 | input_line_pointer++; | |
805 | } | |
806 | while (closes--); | |
807 | ||
28c9d252 NC |
808 | reloc_to_return = |
809 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
810 | if (linker_stubs_should_be_generated) | |
811 | { | |
812 | switch (reloc_to_return) | |
813 | { | |
814 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
815 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
816 | break; | |
817 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
818 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
819 | break; | |
820 | ||
821 | default: | |
0a903bab NC |
822 | /* PR 5523: Do not generate a warning here, |
823 | legitimate code can trigger this case. */ | |
824 | break; | |
28c9d252 NC |
825 | } |
826 | } | |
827 | return reloc_to_return; | |
dc191a8f NC |
828 | } |
829 | } | |
830 | } | |
750bce0e NC |
831 | |
832 | input_line_pointer = tmp; | |
833 | expression (exp); | |
834 | ||
835 | /* Warn about expressions that fail to use lo8 (). */ | |
836 | if (exp->X_op == O_constant) | |
837 | { | |
838 | int x = exp->X_add_number; | |
dc191a8f | 839 | |
750bce0e NC |
840 | if (x < -255 || x > 255) |
841 | as_warn (_("constant out of 8-bit range: %d"), x); | |
842 | } | |
dc191a8f NC |
843 | |
844 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
845 | } |
846 | ||
df136245 | 847 | /* Parse one instruction operand. |
c6a7ab1f NC |
848 | Return operand bitmask. Also fixups can be generated. */ |
849 | ||
adde6300 | 850 | static unsigned int |
dc191a8f NC |
851 | avr_operand (struct avr_opcodes_s *opcode, |
852 | int where, | |
e0471c16 | 853 | const char *op, |
dc191a8f | 854 | char **line) |
adde6300 | 855 | { |
adde6300 | 856 | expressionS op_expr; |
df136245 DC |
857 | unsigned int op_mask = 0; |
858 | char *str = skip_space (*line); | |
adde6300 | 859 | |
adde6300 AM |
860 | switch (*op) |
861 | { | |
862 | /* Any register operand. */ | |
863 | case 'w': | |
864 | case 'd': | |
865 | case 'r': | |
b170af93 DC |
866 | case 'a': |
867 | case 'v': | |
75f58085 BS |
868 | { |
869 | char * old_str = str; | |
870 | char *lower; | |
871 | char r_name[20]; | |
1dab94dd | 872 | |
75f58085 BS |
873 | str = extract_word (str, r_name, sizeof (r_name)); |
874 | for (lower = r_name; *lower; ++lower) | |
875 | { | |
876 | if (*lower >= 'A' && *lower <= 'Z') | |
877 | *lower += 'a' - 'A'; | |
878 | } | |
879 | ||
880 | if (r_name[0] == 'r' && ISDIGIT (r_name[1]) && r_name[2] == 0) | |
881 | /* Single-digit register number, ie r0-r9. */ | |
882 | op_mask = r_name[1] - '0'; | |
883 | else if (r_name[0] == 'r' && ISDIGIT (r_name[1]) | |
884 | && ISDIGIT (r_name[2]) && r_name[3] == 0) | |
885 | /* Double-digit register number, ie r10 - r32. */ | |
886 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
887 | else if (r_name[0] >= 'x' && r_name[0] <= 'z' | |
888 | && (r_name[1] == 'l' || r_name[1] == 'h') && r_name[2] == 0) | |
889 | /* Registers r26-r31 referred to by name, ie xl, xh, yl, yh, zl, zh. */ | |
890 | op_mask = (r_name[0] - 'x') * 2 + (r_name[1] == 'h') + 26; | |
891 | else if ((*op == 'v' || *op == 'w') | |
892 | && r_name[0] >= 'x' && r_name[0] <= 'z' && r_name[1] == 0) | |
893 | /* For the movw and addiw instructions, refer to registers x, y and z by name. */ | |
894 | op_mask = (r_name[0] - 'x') * 2 + 26; | |
895 | else | |
896 | { | |
897 | /* Numeric or symbolic constant register number. */ | |
898 | op_mask = avr_get_constant (old_str, 31); | |
899 | str = input_line_pointer; | |
900 | } | |
901 | } | |
f36e8886 BS |
902 | |
903 | if (avr_mcu->mach == bfd_mach_avrtiny) | |
904 | { | |
905 | if (op_mask < 16 || op_mask > 31) | |
906 | { | |
907 | as_bad (_("register name or number from 16 to 31 required")); | |
908 | break; | |
909 | } | |
910 | } | |
911 | else if (op_mask > 31) | |
912 | { | |
913 | as_bad (_("register name or number from 0 to 31 required")); | |
914 | break; | |
915 | } | |
1dab94dd | 916 | |
c6a7ab1f NC |
917 | switch (*op) |
918 | { | |
919 | case 'a': | |
920 | if (op_mask < 16 || op_mask > 23) | |
921 | as_bad (_("register r16-r23 required")); | |
922 | op_mask -= 16; | |
923 | break; | |
1dab94dd | 924 | |
c6a7ab1f NC |
925 | case 'd': |
926 | if (op_mask < 16) | |
927 | as_bad (_("register number above 15 required")); | |
928 | op_mask -= 16; | |
929 | break; | |
1dab94dd | 930 | |
c6a7ab1f NC |
931 | case 'v': |
932 | if (op_mask & 1) | |
933 | as_bad (_("even register number required")); | |
934 | op_mask >>= 1; | |
935 | break; | |
1dab94dd | 936 | |
c6a7ab1f | 937 | case 'w': |
65b1d096 | 938 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 939 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 940 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
941 | break; |
942 | } | |
943 | break; | |
adde6300 AM |
944 | |
945 | case 'e': | |
946 | { | |
947 | char c; | |
1dab94dd | 948 | |
adde6300 AM |
949 | if (*str == '-') |
950 | { | |
c6a7ab1f | 951 | str = skip_space (str + 1); |
adde6300 AM |
952 | op_mask = 0x1002; |
953 | } | |
3882b010 | 954 | c = TOLOWER (*str); |
adde6300 AM |
955 | if (c == 'x') |
956 | op_mask |= 0x100c; | |
957 | else if (c == 'y') | |
958 | op_mask |= 0x8; | |
959 | else if (c != 'z') | |
00d2865b | 960 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 961 | |
c6a7ab1f | 962 | str = skip_space (str + 1); |
adde6300 AM |
963 | if (*str == '+') |
964 | { | |
965 | ++str; | |
966 | if (op_mask & 2) | |
00d2865b | 967 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
968 | op_mask |= 0x1001; |
969 | } | |
e38c9cc2 | 970 | |
1188e082 | 971 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 972 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
973 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
974 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
975 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
976 | } |
977 | break; | |
978 | ||
b170af93 | 979 | case 'z': |
c6a7ab1f NC |
980 | if (*str == '-') |
981 | as_bad (_("can't predecrement")); | |
1dab94dd | 982 | |
c6a7ab1f NC |
983 | if (! (*str == 'z' || *str == 'Z')) |
984 | as_bad (_("pointer register Z required")); | |
1dab94dd | 985 | |
c6a7ab1f NC |
986 | str = skip_space (str + 1); |
987 | ||
988 | if (*str == '+') | |
989 | { | |
990 | ++str; | |
e0471c16 | 991 | const char *s; |
8cc66334 EW |
992 | for (s = opcode->opcode; *s; ++s) |
993 | { | |
994 | if (*s == '+') | |
995 | op_mask |= (1 << (15 - (s - opcode->opcode))); | |
996 | } | |
c6a7ab1f | 997 | } |
d669d37f NC |
998 | |
999 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
1000 | if (!avr_opt.all_opcodes | |
1001 | && (op_mask & 0x0001) | |
1002 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
1003 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
1004 | break; |
1005 | ||
adde6300 AM |
1006 | case 'b': |
1007 | { | |
3882b010 | 1008 | char c = TOLOWER (*str++); |
1dab94dd | 1009 | |
adde6300 AM |
1010 | if (c == 'y') |
1011 | op_mask |= 0x8; | |
1012 | else if (c != 'z') | |
00d2865b | 1013 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
1014 | str = skip_space (str); |
1015 | if (*str++ == '+') | |
1016 | { | |
750bce0e NC |
1017 | input_line_pointer = str; |
1018 | avr_offset_expression (& op_expr); | |
adde6300 | 1019 | str = input_line_pointer; |
750bce0e NC |
1020 | fix_new_exp (frag_now, where, 3, |
1021 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
1022 | } |
1023 | } | |
1024 | break; | |
1025 | ||
1026 | case 'h': | |
c6a7ab1f NC |
1027 | str = parse_exp (str, &op_expr); |
1028 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1029 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
1030 | break; |
1031 | ||
1032 | case 'L': | |
c6a7ab1f NC |
1033 | str = parse_exp (str, &op_expr); |
1034 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1035 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
1036 | break; |
1037 | ||
1038 | case 'l': | |
c6a7ab1f NC |
1039 | str = parse_exp (str, &op_expr); |
1040 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 1041 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
1042 | break; |
1043 | ||
1044 | case 'i': | |
c6a7ab1f NC |
1045 | str = parse_exp (str, &op_expr); |
1046 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 1047 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
1048 | break; |
1049 | ||
f36e8886 BS |
1050 | case 'j': |
1051 | str = parse_exp (str, &op_expr); | |
1052 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1053 | &op_expr, FALSE, BFD_RELOC_AVR_LDS_STS_16); | |
1054 | break; | |
1055 | ||
adde6300 AM |
1056 | case 'M': |
1057 | { | |
1058 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 1059 | |
c6a7ab1f NC |
1060 | input_line_pointer = str; |
1061 | r_type = avr_ldi_expression (&op_expr); | |
1062 | str = input_line_pointer; | |
adde6300 | 1063 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 1064 | &op_expr, FALSE, r_type); |
adde6300 AM |
1065 | } |
1066 | break; | |
1067 | ||
1068 | case 'n': | |
1069 | { | |
1070 | unsigned int x; | |
1dab94dd | 1071 | |
adde6300 AM |
1072 | x = ~avr_get_constant (str, 255); |
1073 | str = input_line_pointer; | |
1074 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
1075 | } | |
1076 | break; | |
1077 | ||
1078 | case 'K': | |
750bce0e NC |
1079 | input_line_pointer = str; |
1080 | avr_offset_expression (& op_expr); | |
1081 | str = input_line_pointer; | |
1082 | fix_new_exp (frag_now, where, 3, | |
1083 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
1084 | break; |
1085 | ||
1086 | case 'S': | |
1087 | case 's': | |
1088 | { | |
1089 | unsigned int x; | |
1dab94dd | 1090 | |
adde6300 AM |
1091 | x = avr_get_constant (str, 7); |
1092 | str = input_line_pointer; | |
1093 | if (*op == 'S') | |
1094 | x <<= 4; | |
1095 | op_mask |= x; | |
1096 | } | |
1097 | break; | |
1098 | ||
1099 | case 'P': | |
75f58085 BS |
1100 | str = parse_exp (str, &op_expr); |
1101 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1102 | &op_expr, FALSE, BFD_RELOC_AVR_PORT6); | |
adde6300 AM |
1103 | break; |
1104 | ||
1105 | case 'p': | |
75f58085 BS |
1106 | str = parse_exp (str, &op_expr); |
1107 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
1108 | &op_expr, FALSE, BFD_RELOC_AVR_PORT5); | |
adde6300 | 1109 | break; |
1dab94dd | 1110 | |
8cc66334 EW |
1111 | case 'E': |
1112 | { | |
1113 | unsigned int x; | |
1114 | ||
1115 | x = avr_get_constant (str, 15); | |
1116 | str = input_line_pointer; | |
1117 | op_mask |= (x << 4); | |
1118 | } | |
1119 | break; | |
99700d6f | 1120 | |
1188e082 DC |
1121 | case '?': |
1122 | break; | |
1dab94dd | 1123 | |
adde6300 | 1124 | default: |
00d2865b | 1125 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 1126 | } |
1dab94dd | 1127 | |
adde6300 AM |
1128 | *line = str; |
1129 | return op_mask; | |
1130 | } | |
1131 | ||
dc191a8f NC |
1132 | /* Parse instruction operands. |
1133 | Return binary opcode. */ | |
1134 | ||
1135 | static unsigned int | |
1136 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
1137 | { | |
e0471c16 | 1138 | const char *op = opcode->constraints; |
dc191a8f NC |
1139 | unsigned int bin = opcode->bin_opcode; |
1140 | char *frag = frag_more (opcode->insn_size * 2); | |
1141 | char *str = *line; | |
1142 | int where = frag - frag_now->fr_literal; | |
1143 | static unsigned int prev = 0; /* Previous opcode. */ | |
1144 | ||
1145 | /* Opcode have operands. */ | |
1146 | if (*op) | |
1147 | { | |
1148 | unsigned int reg1 = 0; | |
1149 | unsigned int reg2 = 0; | |
1150 | int reg1_present = 0; | |
1151 | int reg2_present = 0; | |
1152 | ||
1153 | /* Parse first operand. */ | |
1154 | if (REGISTER_P (*op)) | |
1155 | reg1_present = 1; | |
1156 | reg1 = avr_operand (opcode, where, op, &str); | |
1157 | ++op; | |
1158 | ||
1159 | /* Parse second operand. */ | |
1160 | if (*op) | |
1161 | { | |
1162 | if (*op == ',') | |
1163 | ++op; | |
1164 | ||
1165 | if (*op == '=') | |
1166 | { | |
1167 | reg2 = reg1; | |
1168 | reg2_present = 1; | |
1169 | } | |
1170 | else | |
1171 | { | |
1172 | if (REGISTER_P (*op)) | |
1173 | reg2_present = 1; | |
1174 | ||
1175 | str = skip_space (str); | |
1176 | if (*str++ != ',') | |
1177 | as_bad (_("`,' required")); | |
1178 | str = skip_space (str); | |
1179 | ||
1180 | reg2 = avr_operand (opcode, where, op, &str); | |
1181 | } | |
1182 | ||
1183 | if (reg1_present && reg2_present) | |
1184 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
1185 | else if (reg2_present) | |
1186 | reg2 <<= 4; | |
1187 | } | |
1188 | if (reg1_present) | |
1189 | reg1 <<= 4; | |
1190 | bin |= reg1 | reg2; | |
1191 | } | |
1192 | ||
1193 | /* Detect undefined combinations (like ld r31,Z+). */ | |
1194 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
1195 | as_warn (_("undefined combination of operands")); | |
1196 | ||
1197 | if (opcode->insn_size == 2) | |
1198 | { | |
1199 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1200 | (AVR core bug, fixed in the newer devices). */ | |
1201 | if (!(avr_opt.no_skip_bug || | |
1202 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1203 | && AVR_SKIP_P (prev)) | |
1204 | as_warn (_("skipping two-word instruction")); | |
1205 | ||
1206 | bfd_putl32 ((bfd_vma) bin, frag); | |
1207 | } | |
1208 | else | |
1209 | bfd_putl16 ((bfd_vma) bin, frag); | |
1210 | ||
1211 | prev = bin; | |
1212 | *line = str; | |
1213 | return bin; | |
1214 | } | |
1215 | ||
adde6300 AM |
1216 | /* GAS will call this function for each section at the end of the assembly, |
1217 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1218 | |
adde6300 | 1219 | valueT |
dc191a8f | 1220 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1221 | { |
1222 | int align = bfd_get_section_alignment (stdoutput, seg); | |
dce55a03 | 1223 | return ((addr + (1 << align) - 1) & (-1UL << align)); |
adde6300 AM |
1224 | } |
1225 | ||
1226 | /* If you define this macro, it should return the offset between the | |
1227 | address of a PC relative fixup and the position from which the PC | |
1228 | relative adjustment should be made. On many processors, the base | |
1229 | of a PC relative instruction is the next instruction, so this | |
1230 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1231 | |
adde6300 | 1232 | long |
dc191a8f | 1233 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1234 | { |
c6a7ab1f | 1235 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1236 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1237 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1238 | return 0; | |
1dab94dd | 1239 | |
adde6300 AM |
1240 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1241 | } | |
1242 | ||
e4ef1b6c DC |
1243 | static bfd_boolean |
1244 | relaxable_section (asection *sec) | |
1245 | { | |
edc9e9a6 AB |
1246 | return ((sec->flags & SEC_DEBUGGING) == 0 |
1247 | && (sec->flags & SEC_CODE) != 0 | |
1248 | && (sec->flags & SEC_ALLOC) != 0); | |
e4ef1b6c DC |
1249 | } |
1250 | ||
75f58085 | 1251 | /* Does whatever the xtensa port does. */ |
e4ef1b6c DC |
1252 | int |
1253 | avr_validate_fix_sub (fixS *fix) | |
1254 | { | |
1255 | segT add_symbol_segment, sub_symbol_segment; | |
1256 | ||
1257 | /* The difference of two symbols should be resolved by the assembler when | |
1258 | linkrelax is not set. If the linker may relax the section containing | |
1259 | the symbols, then an Xtensa DIFF relocation must be generated so that | |
1260 | the linker knows to adjust the difference value. */ | |
1261 | if (!linkrelax || fix->fx_addsy == NULL) | |
1262 | return 0; | |
1263 | ||
1264 | /* Make sure both symbols are in the same segment, and that segment is | |
1265 | "normal" and relaxable. If the segment is not "normal", then the | |
1266 | fix is not valid. If the segment is not "relaxable", then the fix | |
1267 | should have been handled earlier. */ | |
1268 | add_symbol_segment = S_GET_SEGMENT (fix->fx_addsy); | |
1269 | if (! SEG_NORMAL (add_symbol_segment) || | |
1270 | ! relaxable_section (add_symbol_segment)) | |
1271 | return 0; | |
1272 | ||
1273 | sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy); | |
1274 | return (sub_symbol_segment == add_symbol_segment); | |
1275 | } | |
1276 | ||
1277 | /* TC_FORCE_RELOCATION hook */ | |
1278 | ||
1279 | /* If linkrelax is turned on, and the symbol to relocate | |
1280 | against is in a relaxable segment, don't compute the value - | |
75f58085 | 1281 | generate a relocation instead. */ |
e4ef1b6c DC |
1282 | int |
1283 | avr_force_relocation (fixS *fix) | |
1284 | { | |
1285 | if (linkrelax && fix->fx_addsy | |
1286 | && relaxable_section (S_GET_SEGMENT (fix->fx_addsy))) | |
1287 | return 1; | |
1288 | ||
1289 | return generic_force_reloc (fix); | |
1290 | } | |
1291 | ||
adde6300 | 1292 | /* GAS will call this for each fixup. It should store the correct |
c6a7ab1f NC |
1293 | value in the object file. */ |
1294 | ||
94f592af | 1295 | void |
dc191a8f | 1296 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1297 | { |
1298 | unsigned char *where; | |
1299 | unsigned long insn; | |
a161fe53 | 1300 | long value = *valP; |
adde6300 | 1301 | |
94f592af NC |
1302 | if (fixP->fx_addsy == (symbolS *) NULL) |
1303 | fixP->fx_done = 1; | |
1304 | ||
87733541 AM |
1305 | else if (fixP->fx_pcrel) |
1306 | { | |
1307 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1308 | ||
1309 | if (s == seg || s == absolute_section) | |
1310 | { | |
1311 | value += S_GET_VALUE (fixP->fx_addsy); | |
1312 | fixP->fx_done = 1; | |
1313 | } | |
1314 | } | |
e4ef1b6c DC |
1315 | else if (linkrelax && fixP->fx_subsy) |
1316 | { | |
1317 | /* For a subtraction relocation expression, generate one | |
1318 | of the DIFF relocs, with the value being the difference. | |
1319 | Note that a sym1 - sym2 expression is adjusted into a | |
1320 | section_start_sym + sym4_offset_from_section_start - sym1 | |
1321 | expression. fixP->fx_addsy holds the section start symbol, | |
1322 | fixP->fx_offset holds sym2's offset, and fixP->fx_subsy | |
1323 | holds sym1. Calculate the current difference and write value, | |
75f58085 BS |
1324 | but leave fx_offset as is - during relaxation, |
1325 | fx_offset - value gives sym1's value. */ | |
e4ef1b6c DC |
1326 | |
1327 | switch (fixP->fx_r_type) | |
1328 | { | |
1329 | case BFD_RELOC_8: | |
1330 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF8; | |
1331 | break; | |
1332 | case BFD_RELOC_16: | |
1333 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF16; | |
1334 | break; | |
1335 | case BFD_RELOC_32: | |
1336 | fixP->fx_r_type = BFD_RELOC_AVR_DIFF32; | |
1337 | break; | |
1338 | default: | |
1339 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1340 | break; | |
1341 | } | |
1342 | ||
1343 | value = S_GET_VALUE (fixP->fx_addsy) + | |
1344 | fixP->fx_offset - S_GET_VALUE (fixP->fx_subsy); | |
491793b5 | 1345 | *valP = value; |
e4ef1b6c DC |
1346 | |
1347 | fixP->fx_subsy = NULL; | |
1348 | } | |
a161fe53 AM |
1349 | /* We don't actually support subtracting a symbol. */ |
1350 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1351 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1352 | |
e4ef1b6c DC |
1353 | /* For the DIFF relocs, write the value into the object file while still |
1354 | keeping fx_done FALSE, as both the difference (recorded in the object file) | |
75f58085 | 1355 | and the sym offset (part of fixP) are needed at link relax time. */ |
e4ef1b6c | 1356 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
94f592af | 1357 | switch (fixP->fx_r_type) |
adde6300 AM |
1358 | { |
1359 | default: | |
94f592af | 1360 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1361 | break; |
1362 | case BFD_RELOC_AVR_7_PCREL: | |
1363 | case BFD_RELOC_AVR_13_PCREL: | |
1364 | case BFD_RELOC_32: | |
1365 | case BFD_RELOC_16: | |
e4ef1b6c DC |
1366 | break; |
1367 | case BFD_RELOC_AVR_DIFF8: | |
1368 | *where = value; | |
1369 | break; | |
1370 | case BFD_RELOC_AVR_DIFF16: | |
1371 | bfd_putl16 ((bfd_vma) value, where); | |
1372 | break; | |
1373 | case BFD_RELOC_AVR_DIFF32: | |
1374 | bfd_putl32 ((bfd_vma) value, where); | |
1375 | break; | |
adde6300 AM |
1376 | case BFD_RELOC_AVR_CALL: |
1377 | break; | |
1378 | } | |
1379 | ||
94f592af | 1380 | if (fixP->fx_done) |
adde6300 AM |
1381 | { |
1382 | /* Fetch the instruction, insert the fully resolved operand | |
1383 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1384 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1385 | insn = bfd_getl16 (where); |
1386 | ||
94f592af | 1387 | switch (fixP->fx_r_type) |
adde6300 AM |
1388 | { |
1389 | case BFD_RELOC_AVR_7_PCREL: | |
1390 | if (value & 1) | |
94f592af | 1391 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1392 | _("odd address operand: %ld"), value); |
1dab94dd | 1393 | |
adde6300 AM |
1394 | /* Instruction addresses are always right-shifted by 1. */ |
1395 | value >>= 1; | |
1396 | --value; /* Correct PC. */ | |
1dab94dd | 1397 | |
adde6300 | 1398 | if (value < -64 || value > 63) |
94f592af | 1399 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1400 | _("operand out of range: %ld"), value); |
1401 | value = (value << 3) & 0x3f8; | |
1402 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1403 | break; | |
1404 | ||
1405 | case BFD_RELOC_AVR_13_PCREL: | |
1406 | if (value & 1) | |
94f592af | 1407 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1408 | _("odd address operand: %ld"), value); |
1dab94dd | 1409 | |
adde6300 AM |
1410 | /* Instruction addresses are always right-shifted by 1. */ |
1411 | value >>= 1; | |
1412 | --value; /* Correct PC. */ | |
adde6300 AM |
1413 | |
1414 | if (value < -2048 || value > 2047) | |
1415 | { | |
65aa24b6 | 1416 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1417 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1418 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1419 | _("operand out of range: %ld"), value); |
1420 | } | |
1421 | ||
1422 | value &= 0xfff; | |
1423 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1424 | break; | |
1425 | ||
1426 | case BFD_RELOC_32: | |
0b649256 | 1427 | bfd_putl32 ((bfd_vma) value, where); |
adde6300 AM |
1428 | break; |
1429 | ||
1430 | case BFD_RELOC_16: | |
1431 | bfd_putl16 ((bfd_vma) value, where); | |
1432 | break; | |
1433 | ||
17e57237 NC |
1434 | case BFD_RELOC_8: |
1435 | if (value > 255 || value < -128) | |
1436 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1437 | _("operand out of range: %ld"), value); | |
1438 | *where = value; | |
1439 | break; | |
1440 | ||
adde6300 | 1441 | case BFD_RELOC_AVR_16_PM: |
c6a7ab1f | 1442 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1443 | break; |
1444 | ||
750bce0e NC |
1445 | case BFD_RELOC_AVR_LDI: |
1446 | if (value > 255) | |
1447 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1448 | _("operand out of range: %ld"), value); | |
1449 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1450 | break; | |
1451 | ||
f36e8886 BS |
1452 | case BFD_RELOC_AVR_LDS_STS_16: |
1453 | if ((value < 0x40) || (value > 0xBF)) | |
1454 | as_warn_where (fixP->fx_file, fixP->fx_line, | |
1455 | _("operand out of range: 0x%lx"), | |
1456 | (unsigned long)value); | |
1457 | insn |= ((value & 0xF) | ((value & 0x30) << 5) | ((value & 0x40) << 2)); | |
1458 | bfd_putl16 ((bfd_vma) insn, where); | |
1459 | break; | |
1460 | ||
750bce0e NC |
1461 | case BFD_RELOC_AVR_6: |
1462 | if ((value > 63) || (value < 0)) | |
1463 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1464 | _("operand out of range: %ld"), value); | |
f36e8886 BS |
1465 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) |
1466 | | ((value & (1 << 5)) << 8)), where); | |
750bce0e NC |
1467 | break; |
1468 | ||
1469 | case BFD_RELOC_AVR_6_ADIW: | |
1470 | if ((value > 63) || (value < 0)) | |
1471 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1472 | _("operand out of range: %ld"), value); | |
1473 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1474 | break; | |
1475 | ||
adde6300 AM |
1476 | case BFD_RELOC_AVR_LO8_LDI: |
1477 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1478 | break; | |
1479 | ||
adde6300 AM |
1480 | case BFD_RELOC_AVR_HI8_LDI: |
1481 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1482 | break; | |
1483 | ||
df406460 | 1484 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1485 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1486 | break; | |
1487 | ||
1488 | case BFD_RELOC_AVR_HH8_LDI: | |
1489 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1490 | break; | |
1491 | ||
1492 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1493 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1494 | break; | |
1495 | ||
adde6300 AM |
1496 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1497 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1498 | break; | |
1499 | ||
df406460 | 1500 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1501 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1502 | break; | |
1503 | ||
1504 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1505 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1506 | break; | |
1507 | ||
1508 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1509 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1510 | break; | |
1511 | ||
1512 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1513 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1514 | break; | |
1515 | ||
1516 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1517 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1518 | break; | |
1519 | ||
1520 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1521 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1522 | break; | |
1523 | ||
1524 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1525 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1526 | break; | |
1527 | ||
1528 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1529 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1530 | break; | |
1531 | ||
1532 | case BFD_RELOC_AVR_CALL: | |
1533 | { | |
1534 | unsigned long x; | |
1dab94dd | 1535 | |
adde6300 AM |
1536 | x = bfd_getl16 (where); |
1537 | if (value & 1) | |
94f592af | 1538 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1539 | _("odd address operand: %ld"), value); |
1540 | value >>= 1; | |
1541 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1542 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1543 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1544 | } |
1545 | break; | |
1546 | ||
99700d6f NC |
1547 | case BFD_RELOC_AVR_8_LO: |
1548 | *where = 0xff & value; | |
1549 | break; | |
1550 | ||
1551 | case BFD_RELOC_AVR_8_HI: | |
1552 | *where = 0xff & (value >> 8); | |
1553 | break; | |
1554 | ||
40551fb8 | 1555 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1556 | *where = 0xff & (value >> 16); |
1557 | break; | |
1558 | ||
1559 | default: | |
c6a7ab1f | 1560 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1561 | fixP->fx_line, fixP->fx_r_type); |
adde6300 | 1562 | break; |
75f58085 BS |
1563 | |
1564 | case BFD_RELOC_AVR_PORT6: | |
1565 | if (value > 63) | |
1566 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1567 | _("operand out of range: %ld"), value); | |
1568 | bfd_putl16 ((bfd_vma) insn | ((value & 0x30) << 5) | (value & 0x0f), where); | |
1569 | break; | |
1570 | ||
1571 | case BFD_RELOC_AVR_PORT5: | |
1572 | if (value > 31) | |
1573 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1574 | _("operand out of range: %ld"), value); | |
1575 | bfd_putl16 ((bfd_vma) insn | ((value & 0x1f) << 3), where); | |
1576 | break; | |
adde6300 AM |
1577 | } |
1578 | } | |
1579 | else | |
1580 | { | |
a61a9fbc | 1581 | switch ((int) fixP->fx_r_type) |
adde6300 AM |
1582 | { |
1583 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1584 | case -BFD_RELOC_AVR_HI8_LDI: | |
1585 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1586 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1587 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1588 | _("only constant expression allowed")); |
94f592af | 1589 | fixP->fx_done = 1; |
adde6300 AM |
1590 | break; |
1591 | default: | |
1592 | break; | |
1593 | } | |
adde6300 | 1594 | } |
adde6300 AM |
1595 | } |
1596 | ||
7be1c489 AM |
1597 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1598 | to `bfd_install_relocation'. This currently works poorly, as | |
1599 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1600 | `tc_gen_reloc' have been written to work around the problems, which | |
1601 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1602 | |
1603 | /* If while processing a fixup, a reloc really needs to be created | |
1604 | then it is done here. */ | |
1605 | ||
1606 | arelent * | |
dc191a8f NC |
1607 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1608 | fixS *fixp) | |
adde6300 AM |
1609 | { |
1610 | arelent *reloc; | |
328e7bfd | 1611 | bfd_reloc_code_real_type code = fixp->fx_r_type; |
adde6300 | 1612 | |
94d4433a | 1613 | if (fixp->fx_subsy != NULL) |
df406460 | 1614 | { |
94d4433a | 1615 | as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex")); |
df406460 NC |
1616 | return NULL; |
1617 | } | |
1618 | ||
325801bd | 1619 | reloc = XNEW (arelent); |
adde6300 | 1620 | |
325801bd | 1621 | reloc->sym_ptr_ptr = XNEW (asymbol *); |
adde6300 AM |
1622 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1623 | ||
1624 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
328e7bfd DC |
1625 | |
1626 | if ((fixp->fx_r_type == BFD_RELOC_32) && (fixp->fx_pcrel)) | |
1627 | { | |
1628 | if (seg->use_rela_p) | |
1629 | fixp->fx_offset -= md_pcrel_from_section (fixp, seg); | |
1630 | else | |
1631 | fixp->fx_offset = reloc->address; | |
1632 | ||
1633 | code = BFD_RELOC_32_PCREL; | |
1634 | } | |
1635 | ||
1636 | reloc->addend = fixp->fx_offset; | |
1637 | ||
1638 | reloc->howto = bfd_reloc_type_lookup (stdoutput, code); | |
1639 | ||
adde6300 AM |
1640 | if (reloc->howto == (reloc_howto_type *) NULL) |
1641 | { | |
1642 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1643 | _("reloc %d not supported by object file format"), |
1644 | (int) fixp->fx_r_type); | |
adde6300 AM |
1645 | return NULL; |
1646 | } | |
1647 | ||
1648 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1649 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1650 | reloc->address = fixp->fx_offset; | |
1651 | ||
adde6300 AM |
1652 | |
1653 | return reloc; | |
1654 | } | |
1655 | ||
adde6300 | 1656 | void |
dc191a8f | 1657 | md_assemble (char *str) |
adde6300 | 1658 | { |
c6a7ab1f | 1659 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1660 | char op[11]; |
1661 | ||
c6a7ab1f | 1662 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1663 | |
1664 | if (!op[0]) | |
00d2865b | 1665 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1666 | |
1667 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1668 | ||
f36e8886 BS |
1669 | if (opcode && !avr_opt.all_opcodes) |
1670 | { | |
75f58085 | 1671 | /* Check if the instruction's ISA bit is ON in the ISA bits of the part |
f36e8886 | 1672 | specified by the user. If not look for other instructions |
75f58085 | 1673 | specifications with same mnemonic who's ISA bits matches. |
f36e8886 BS |
1674 | |
1675 | This requires include/opcode/avr.h to have the instructions with | |
1676 | same mnenomic to be specified in sequence. */ | |
1677 | ||
1678 | while ((opcode->isa & avr_mcu->isa) != opcode->isa) | |
1679 | { | |
1680 | opcode++; | |
75f58085 | 1681 | |
f36e8886 BS |
1682 | if (opcode->name && strcmp(op, opcode->name)) |
1683 | { | |
75f58085 | 1684 | as_bad (_("illegal opcode %s for mcu %s"), |
f36e8886 BS |
1685 | opcode->name, avr_mcu->name); |
1686 | return; | |
1687 | } | |
1688 | } | |
75f58085 | 1689 | } |
f36e8886 | 1690 | |
adde6300 AM |
1691 | if (opcode == NULL) |
1692 | { | |
00d2865b | 1693 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1694 | return; |
1695 | } | |
1696 | ||
b170af93 | 1697 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1698 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1699 | |
1188e082 DC |
1700 | if (*str && *opcode->constraints == '?') |
1701 | ++opcode; | |
b170af93 | 1702 | |
d4f4f3fb AM |
1703 | dwarf2_emit_insn (0); |
1704 | ||
adde6300 AM |
1705 | /* We used to set input_line_pointer to the result of get_operands, |
1706 | but that is wrong. Our caller assumes we don't change it. */ | |
1707 | { | |
1708 | char *t = input_line_pointer; | |
dc191a8f | 1709 | |
adde6300 | 1710 | avr_operands (opcode, &str); |
b170af93 | 1711 | if (*skip_space (str)) |
00d2865b | 1712 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1713 | input_line_pointer = t; |
1714 | } | |
1715 | } | |
1716 | ||
62ebcb5c | 1717 | const exp_mod_data_t exp_mod_data[] = |
99700d6f NC |
1718 | { |
1719 | /* Default, must be first. */ | |
1720 | { "", 0, BFD_RELOC_16, "" }, | |
1721 | /* Divides by 2 to get word address. Generate Stub. */ | |
1722 | { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " }, | |
1723 | { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " }, | |
1724 | /* The following are used together with avr-gcc's __memx address space | |
1725 | in order to initialize a 24-bit pointer variable with a 24-bit address. | |
40551fb8 NC |
1726 | For address in flash, hlo8 will contain the flash segment if the |
1727 | symbol is located in flash. If the symbol is located in RAM; hlo8 | |
99700d6f NC |
1728 | will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash |
1729 | addresses linearize address space. */ | |
1730 | { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " }, | |
1731 | { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " }, | |
40551fb8 NC |
1732 | { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " }, |
1733 | { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " }, | |
99700d6f NC |
1734 | }; |
1735 | ||
99700d6f NC |
1736 | /* Parse special CONS expression: pm (expression) or alternatively |
1737 | gs (expression). These are used for addressing program memory. Moreover, | |
40551fb8 | 1738 | define lo8 (expression), hi8 (expression) and hlo8 (expression). */ |
c6a7ab1f | 1739 | |
62ebcb5c | 1740 | const exp_mod_data_t * |
dc191a8f | 1741 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1742 | { |
c6a7ab1f | 1743 | char *tmp; |
814f1489 | 1744 | unsigned int i; |
adde6300 | 1745 | |
adde6300 AM |
1746 | tmp = input_line_pointer = skip_space (input_line_pointer); |
1747 | ||
99700d6f NC |
1748 | /* The first entry of exp_mod_data[] contains an entry if no |
1749 | expression modifier is present. Skip it. */ | |
1750 | ||
814f1489 | 1751 | for (i = 0; i < ARRAY_SIZE (exp_mod_data); i++) |
adde6300 | 1752 | { |
814f1489 | 1753 | const exp_mod_data_t *pexp = &exp_mod_data[i]; |
99700d6f | 1754 | int len = strlen (pexp->name); |
1dab94dd | 1755 | |
99700d6f NC |
1756 | if (nbytes == pexp->nbytes |
1757 | && strncasecmp (input_line_pointer, pexp->name, len) == 0) | |
adde6300 AM |
1758 | { |
1759 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1760 | |
adde6300 AM |
1761 | if (*input_line_pointer == '(') |
1762 | { | |
1763 | input_line_pointer = skip_space (input_line_pointer + 1); | |
adde6300 | 1764 | expression (exp); |
1dab94dd | 1765 | |
adde6300 | 1766 | if (*input_line_pointer == ')') |
62ebcb5c AM |
1767 | { |
1768 | ++input_line_pointer; | |
1769 | return pexp; | |
1770 | } | |
adde6300 AM |
1771 | else |
1772 | { | |
00d2865b | 1773 | as_bad (_("`)' required")); |
62ebcb5c | 1774 | return &exp_mod_data[0]; |
adde6300 | 1775 | } |
adde6300 | 1776 | } |
1dab94dd | 1777 | |
adde6300 | 1778 | input_line_pointer = tmp; |
99700d6f NC |
1779 | |
1780 | break; | |
adde6300 AM |
1781 | } |
1782 | } | |
1dab94dd | 1783 | |
adde6300 | 1784 | expression (exp); |
62ebcb5c | 1785 | return &exp_mod_data[0]; |
adde6300 AM |
1786 | } |
1787 | ||
1788 | void | |
dc191a8f NC |
1789 | avr_cons_fix_new (fragS *frag, |
1790 | int where, | |
1791 | int nbytes, | |
62ebcb5c AM |
1792 | expressionS *exp, |
1793 | const exp_mod_data_t *pexp_mod_data) | |
adde6300 | 1794 | { |
99700d6f NC |
1795 | int bad = 0; |
1796 | ||
1797 | switch (pexp_mod_data->reloc) | |
adde6300 | 1798 | { |
99700d6f | 1799 | default: |
17e57237 NC |
1800 | if (nbytes == 1) |
1801 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8); | |
1802 | else if (nbytes == 2) | |
b34976b6 | 1803 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1804 | else if (nbytes == 4) |
b34976b6 | 1805 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1806 | else |
99700d6f NC |
1807 | bad = 1; |
1808 | break; | |
1809 | ||
1810 | case BFD_RELOC_AVR_16_PM: | |
1811 | case BFD_RELOC_AVR_8_LO: | |
1812 | case BFD_RELOC_AVR_8_HI: | |
40551fb8 | 1813 | case BFD_RELOC_AVR_8_HLO: |
99700d6f NC |
1814 | if (nbytes == pexp_mod_data->nbytes) |
1815 | fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc); | |
adde6300 | 1816 | else |
99700d6f NC |
1817 | bad = 1; |
1818 | break; | |
adde6300 | 1819 | } |
99700d6f NC |
1820 | |
1821 | if (bad) | |
1822 | as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); | |
adde6300 | 1823 | } |
af3ecb4a | 1824 | |
71863e73 NC |
1825 | static bfd_boolean |
1826 | mcu_has_3_byte_pc (void) | |
1827 | { | |
75f58085 | 1828 | int mach = avr_mcu->mach; |
71863e73 | 1829 | |
75f58085 BS |
1830 | return mach == bfd_mach_avr6 |
1831 | || mach == bfd_mach_avrxmega6 | |
71863e73 NC |
1832 | || mach == bfd_mach_avrxmega7; |
1833 | } | |
1834 | ||
af3ecb4a RH |
1835 | void |
1836 | tc_cfi_frame_initial_instructions (void) | |
1837 | { | |
1838 | /* AVR6 pushes 3 bytes for calls. */ | |
71863e73 | 1839 | int return_size = (mcu_has_3_byte_pc () ? 3 : 2); |
af3ecb4a RH |
1840 | |
1841 | /* The CFA is the caller's stack location before the call insn. */ | |
1842 | /* Note that the stack pointer is dwarf register number 32. */ | |
1843 | cfi_add_CFA_def_cfa (32, return_size); | |
1844 | ||
1845 | /* Note that AVR consistently uses post-decrement, which means that things | |
1846 | do not line up the same way as for targers that use pre-decrement. */ | |
1847 | cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); | |
1848 | } | |
e4ef1b6c DC |
1849 | |
1850 | bfd_boolean | |
1851 | avr_allow_local_subtract (expressionS * left, | |
1852 | expressionS * right, | |
1853 | segT section) | |
1854 | { | |
75f58085 | 1855 | /* If we are not in relaxation mode, subtraction is OK. */ |
e4ef1b6c DC |
1856 | if (!linkrelax) |
1857 | return TRUE; | |
1858 | ||
1859 | /* If the symbols are not in a code section then they are OK. */ | |
1860 | if ((section->flags & SEC_CODE) == 0) | |
1861 | return TRUE; | |
1862 | ||
1863 | if (left->X_add_symbol == right->X_add_symbol) | |
1864 | return TRUE; | |
1865 | ||
1866 | /* We have to assume that there may be instructions between the | |
1867 | two symbols and that relaxation may increase the distance between | |
1868 | them. */ | |
1869 | return FALSE; | |
1870 | } | |
eac7440d AB |
1871 | |
1872 | void | |
1873 | avr_elf_final_processing (void) | |
1874 | { | |
1875 | if (linkrelax) | |
1876 | elf_elfheader (stdoutput)->e_flags |= EF_AVR_LINKRELAX_PREPARED; | |
1877 | } | |
fdd410ac AB |
1878 | |
1879 | /* Write out the header of a .avr.prop section into the area pointed to by | |
1880 | DATA. The RECORD_COUNT will be placed in the header as the number of | |
1881 | records that are to follow. | |
1882 | The area DATA must be big enough the receive the header, which is | |
1883 | AVR_PROPERTY_SECTION_HEADER_SIZE bytes long. */ | |
1884 | ||
1885 | static char * | |
1886 | avr_output_property_section_header (char *data, | |
1887 | unsigned int record_count) | |
1888 | { | |
1889 | char *orig_data = data; | |
1890 | ||
1891 | md_number_to_chars (data, AVR_PROPERTY_RECORDS_VERSION, 1); | |
1892 | data++; | |
1893 | /* There's space for a single byte flags field, but right now there's | |
1894 | nothing to go in here, so just set the value to zero. */ | |
1895 | md_number_to_chars (data, 0, 1); | |
1896 | data++; | |
1897 | md_number_to_chars (data, record_count, 2); | |
1898 | data+=2; | |
1899 | ||
1900 | gas_assert (data - orig_data == AVR_PROPERTY_SECTION_HEADER_SIZE); | |
1901 | ||
1902 | return data; | |
1903 | } | |
1904 | ||
1905 | /* Return the number of bytes required to store RECORD into the .avr.prop | |
1906 | section. The size returned is the compressed size that corresponds to | |
1907 | how the record will be written out in AVR_OUTPUT_PROPERTY_RECORD. */ | |
1908 | ||
1909 | static int | |
1910 | avr_record_size (const struct avr_property_record *record) | |
1911 | { | |
1912 | /* The first 5 bytes are a 4-byte address, followed by a 1-byte type | |
1913 | identifier. */ | |
1914 | int size = 5; | |
1915 | ||
1916 | switch (record->type) | |
1917 | { | |
1918 | case RECORD_ORG: | |
1919 | size += 0; /* No extra information. */ | |
1920 | break; | |
1921 | ||
1922 | case RECORD_ORG_AND_FILL: | |
1923 | size += 4; /* A 4-byte fill value. */ | |
1924 | break; | |
1925 | ||
1926 | case RECORD_ALIGN: | |
1927 | size += 4; /* A 4-byte alignment value. */ | |
1928 | break; | |
1929 | ||
1930 | case RECORD_ALIGN_AND_FILL: | |
1931 | size += 8; /* A 4-byte alignment, and 4-byte fill value. */ | |
1932 | break; | |
1933 | ||
1934 | default: | |
1935 | as_fatal (_("unknown record type %d (in %s)"), | |
1936 | record->type, __PRETTY_FUNCTION__); | |
1937 | } | |
1938 | ||
1939 | return size; | |
1940 | } | |
1941 | ||
1942 | /* Write out RECORD. FRAG_BASE points to the start of the data area setup | |
1943 | to hold all of the .avr.prop content, FRAG_PTR points to the next | |
1944 | writable location. The data area must be big enough to hold all of the | |
1945 | records. The size of the data written out for this RECORD must match | |
1946 | the size from AVR_RECORD_SIZE. */ | |
1947 | ||
1948 | static char * | |
1949 | avr_output_property_record (char * const frag_base, char *frag_ptr, | |
1950 | const struct avr_property_record *record) | |
1951 | { | |
1952 | fixS *fix; | |
1953 | int where; | |
1954 | char *init_frag_ptr = frag_ptr; | |
1955 | ||
1956 | where = frag_ptr - frag_base; | |
1957 | fix = fix_new (frag_now, where, 4, | |
1958 | section_symbol (record->section), | |
1959 | record->offset, FALSE, BFD_RELOC_32); | |
1960 | fix->fx_file = "<internal>"; | |
1961 | fix->fx_line = 0; | |
1962 | frag_ptr += 4; | |
1963 | ||
1964 | md_number_to_chars (frag_ptr, (bfd_byte) record->type, 1); | |
1965 | frag_ptr += 1; | |
1966 | ||
1967 | /* Write out the rest of the data. */ | |
1968 | switch (record->type) | |
1969 | { | |
1970 | case RECORD_ORG: | |
1971 | break; | |
1972 | ||
1973 | case RECORD_ORG_AND_FILL: | |
1974 | md_number_to_chars (frag_ptr, record->data.org.fill, 4); | |
1975 | frag_ptr += 4; | |
1976 | break; | |
1977 | ||
1978 | case RECORD_ALIGN: | |
1979 | md_number_to_chars (frag_ptr, record->data.align.bytes, 4); | |
1980 | frag_ptr += 4; | |
1981 | break; | |
1982 | ||
1983 | case RECORD_ALIGN_AND_FILL: | |
1984 | md_number_to_chars (frag_ptr, record->data.align.bytes, 4); | |
431ff075 | 1985 | md_number_to_chars (frag_ptr + 4, record->data.align.fill, 4); |
fdd410ac AB |
1986 | frag_ptr += 8; |
1987 | break; | |
1988 | ||
1989 | default: | |
1990 | as_fatal (_("unknown record type %d (in %s)"), | |
1991 | record->type, __PRETTY_FUNCTION__); | |
1992 | } | |
1993 | ||
1994 | gas_assert (frag_ptr - init_frag_ptr == avr_record_size (record)); | |
1995 | ||
1996 | return frag_ptr; | |
1997 | } | |
1998 | ||
1999 | /* Create the section to hold the AVR property information. Return the | |
2000 | section. */ | |
2001 | ||
2002 | static asection * | |
2003 | avr_create_property_section (void) | |
2004 | { | |
2005 | asection *sec; | |
2006 | flagword flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY); | |
2007 | const char *section_name = AVR_PROPERTY_RECORD_SECTION_NAME; | |
2008 | ||
2009 | sec = bfd_make_section (stdoutput, section_name); | |
2010 | if (sec == NULL) | |
2011 | as_fatal (_("Failed to create property section `%s'\n"), section_name); | |
2012 | bfd_set_section_flags (stdoutput, sec, flags); | |
2013 | sec->output_section = sec; | |
2014 | return sec; | |
2015 | } | |
2016 | ||
2017 | /* This hook is called when alignment is performed, and allows us to | |
2018 | capture the details of both .org and .align directives. */ | |
2019 | ||
2020 | void | |
2021 | avr_handle_align (fragS *fragP) | |
2022 | { | |
2023 | if (linkrelax) | |
2024 | { | |
2025 | /* Ignore alignment requests at FR_ADDRESS 0, these are at the very | |
2026 | start of a section, and will be handled by the standard section | |
2027 | alignment mechanism. */ | |
2028 | if ((fragP->fr_type == rs_align | |
2029 | || fragP->fr_type == rs_align_code) | |
fdd410ac AB |
2030 | && fragP->fr_offset > 0) |
2031 | { | |
431ff075 AB |
2032 | char *p = fragP->fr_literal + fragP->fr_fix; |
2033 | ||
fdd410ac AB |
2034 | fragP->tc_frag_data.is_align = TRUE; |
2035 | fragP->tc_frag_data.alignment = fragP->fr_offset; | |
431ff075 AB |
2036 | fragP->tc_frag_data.fill = *p; |
2037 | fragP->tc_frag_data.has_fill = (fragP->tc_frag_data.fill != 0); | |
fdd410ac AB |
2038 | } |
2039 | ||
2040 | if (fragP->fr_type == rs_org && fragP->fr_offset > 0) | |
2041 | { | |
2042 | char *p = fragP->fr_literal + fragP->fr_fix; | |
2043 | ||
2044 | fragP->tc_frag_data.is_org = TRUE; | |
2045 | fragP->tc_frag_data.fill = *p; | |
2046 | fragP->tc_frag_data.has_fill = (fragP->tc_frag_data.fill != 0); | |
2047 | } | |
2048 | } | |
2049 | } | |
2050 | ||
2051 | /* Return TRUE if this section is not one for which we need to record | |
2052 | information in the avr property section. */ | |
2053 | ||
2054 | static bfd_boolean | |
2055 | exclude_section_from_property_tables (segT sec) | |
2056 | { | |
2057 | /* Only generate property information for sections on which linker | |
2058 | relaxation could be performed. */ | |
2059 | return !relaxable_section (sec); | |
2060 | } | |
2061 | ||
2062 | /* Create a property record for fragment FRAGP from section SEC and place | |
2063 | it into an AVR_PROPERTY_RECORD_LINK structure, which can then formed | |
2064 | into a linked list by the caller. */ | |
2065 | ||
2066 | static struct avr_property_record_link * | |
2067 | create_record_for_frag (segT sec, fragS *fragP) | |
2068 | { | |
ef7a9369 | 2069 | struct avr_property_record_link *prop_rec_link; |
fdd410ac | 2070 | |
325801bd | 2071 | prop_rec_link = XCNEW (struct avr_property_record_link); |
431ff075 | 2072 | gas_assert (fragP->fr_next != NULL); |
fdd410ac AB |
2073 | |
2074 | if (fragP->tc_frag_data.is_org) | |
2075 | { | |
ef7a9369 SKS |
2076 | prop_rec_link->record.offset = fragP->fr_next->fr_address; |
2077 | prop_rec_link->record.section = sec; | |
fdd410ac AB |
2078 | |
2079 | if (fragP->tc_frag_data.has_fill) | |
2080 | { | |
ef7a9369 SKS |
2081 | prop_rec_link->record.data.org.fill = fragP->tc_frag_data.fill; |
2082 | prop_rec_link->record.type = RECORD_ORG_AND_FILL; | |
fdd410ac AB |
2083 | } |
2084 | else | |
ef7a9369 | 2085 | prop_rec_link->record.type = RECORD_ORG; |
fdd410ac AB |
2086 | } |
2087 | else | |
2088 | { | |
431ff075 | 2089 | prop_rec_link->record.offset = fragP->fr_next->fr_address; |
ef7a9369 | 2090 | prop_rec_link->record.section = sec; |
fdd410ac AB |
2091 | |
2092 | gas_assert (fragP->tc_frag_data.is_align); | |
2093 | if (fragP->tc_frag_data.has_fill) | |
2094 | { | |
ef7a9369 SKS |
2095 | prop_rec_link->record.data.align.fill = fragP->tc_frag_data.fill; |
2096 | prop_rec_link->record.type = RECORD_ALIGN_AND_FILL; | |
fdd410ac AB |
2097 | } |
2098 | else | |
ef7a9369 SKS |
2099 | prop_rec_link->record.type = RECORD_ALIGN; |
2100 | prop_rec_link->record.data.align.bytes = fragP->tc_frag_data.alignment; | |
fdd410ac AB |
2101 | } |
2102 | ||
ef7a9369 | 2103 | return prop_rec_link; |
fdd410ac AB |
2104 | } |
2105 | ||
2106 | /* Build a list of AVR_PROPERTY_RECORD_LINK structures for section SEC, and | |
2107 | merged them onto the list pointed to by NEXT_PTR. Return a pointer to | |
2108 | the last list item created. */ | |
2109 | ||
2110 | static struct avr_property_record_link ** | |
2111 | append_records_for_section (segT sec, | |
2112 | struct avr_property_record_link **next_ptr) | |
2113 | { | |
2114 | segment_info_type *seginfo = seg_info (sec); | |
2115 | fragS *fragP; | |
2116 | ||
2117 | if (seginfo && seginfo->frchainP) | |
2118 | { | |
2119 | for (fragP = seginfo->frchainP->frch_root; | |
2120 | fragP; | |
2121 | fragP = fragP->fr_next) | |
2122 | { | |
2123 | if (fragP->tc_frag_data.is_align | |
2124 | || fragP->tc_frag_data.is_org) | |
2125 | { | |
2126 | /* Create a single new entry. */ | |
2127 | struct avr_property_record_link *new_link | |
2128 | = create_record_for_frag (sec, fragP); | |
2129 | ||
2130 | *next_ptr = new_link; | |
2131 | next_ptr = &new_link->next; | |
2132 | } | |
2133 | } | |
2134 | } | |
2135 | ||
2136 | return next_ptr; | |
2137 | } | |
2138 | ||
2139 | /* Create the AVR property section and fill it with records of .org and | |
2140 | .align directives that were used. The section is only created if it | |
2141 | will actually have any content. */ | |
2142 | ||
2143 | static void | |
2144 | avr_create_and_fill_property_section (void) | |
2145 | { | |
2146 | segT *seclist; | |
2147 | asection *prop_sec; | |
2148 | struct avr_property_record_link *r_list, **next_ptr; | |
2149 | char *frag_ptr, *frag_base; | |
2150 | bfd_size_type sec_size; | |
2151 | struct avr_property_record_link *rec; | |
2152 | unsigned int record_count; | |
2153 | ||
2154 | /* First walk over all sections. For sections on which linker | |
2155 | relaxation could be applied, extend the record list. The record list | |
2156 | holds information that the linker will need to know. */ | |
2157 | ||
2158 | prop_sec = NULL; | |
2159 | r_list = NULL; | |
2160 | next_ptr = &r_list; | |
2161 | for (seclist = &stdoutput->sections; | |
2162 | seclist && *seclist; | |
2163 | seclist = &(*seclist)->next) | |
2164 | { | |
2165 | segT sec = *seclist; | |
2166 | ||
2167 | if (exclude_section_from_property_tables (sec)) | |
2168 | continue; | |
2169 | ||
2170 | next_ptr = append_records_for_section (sec, next_ptr); | |
2171 | } | |
2172 | ||
2173 | /* Create property section and ensure the size is correct. We've already | |
2174 | passed the point where gas could size this for us. */ | |
2175 | sec_size = AVR_PROPERTY_SECTION_HEADER_SIZE; | |
2176 | record_count = 0; | |
2177 | for (rec = r_list; rec != NULL; rec = rec->next) | |
2178 | { | |
2179 | record_count++; | |
2180 | sec_size += avr_record_size (&rec->record); | |
2181 | } | |
2182 | ||
2183 | if (record_count == 0) | |
2184 | return; | |
2185 | ||
2186 | prop_sec = avr_create_property_section (); | |
2187 | bfd_set_section_size (stdoutput, prop_sec, sec_size); | |
2188 | ||
2189 | subseg_set (prop_sec, 0); | |
2190 | frag_base = frag_more (sec_size); | |
2191 | ||
2192 | frag_ptr = | |
2193 | avr_output_property_section_header (frag_base, record_count); | |
2194 | ||
2195 | for (rec = r_list; rec != NULL; rec = rec->next) | |
2196 | frag_ptr = avr_output_property_record (frag_base, frag_ptr, &rec->record); | |
2197 | ||
2198 | frag_wane (frag_now); | |
2199 | frag_new (0); | |
2200 | frag_wane (frag_now); | |
2201 | } | |
2202 | ||
2203 | /* We're using this hook to build up the AVR property section. It's called | |
2204 | late in the assembly process which suits our needs. */ | |
2205 | void | |
2206 | avr_post_relax_hook (void) | |
2207 | { | |
2208 | avr_create_and_fill_property_section (); | |
2209 | } |