* config/tc-mips.c (s_change_section): Fix parsing. Code cleanup.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
a161fe53 3 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
adde6300 24#include "as.h"
3882b010 25#include "safe-ctype.h"
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26#include "subsegs.h"
27
1188e082
DC
28struct avr_opcodes_s
29{
30 char *name;
31 char *constraints;
c6a7ab1f 32 int insn_size; /* In words. */
1188e082
DC
33 int isa;
34 unsigned int bin_opcode;
35};
36
37#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38{#NAME, CONSTR, SIZE, ISA, BIN},
39
40struct avr_opcodes_s avr_opcodes[] =
41{
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44};
45
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46const char comment_chars[] = ";";
47const char line_comment_chars[] = "#";
48const char line_separator_chars[] = "$";
49
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50const char *md_shortopts = "m:";
51struct mcu_type_s
52{
53 char *name;
54 int isa;
55 int mach;
56};
57
1f8ae5e6
DC
58/* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
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62static struct mcu_type_s mcu_types[] =
63{
b170af93 64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65aa24b6 65 {"avr2", AVR_ISA_2xxx, bfd_mach_avr2},
b170af93 66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
65aa24b6 68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
adde6300 69 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
1f8ae5e6 70 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
b170af93
DC
71 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
72 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
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75 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 77 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
adde6300 78 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
bdfdba87
MM
79 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
80 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
adde6300 81 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
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82 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
83 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
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84 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
85 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
8a6def3b 87 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
1f8ae5e6 88 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
b170af93 89 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
1f8ae5e6 90 {"at43usb320",AVR_ISA_M103, bfd_mach_avr3},
bdfdba87 91 {"at43usb355",AVR_ISA_M603, bfd_mach_avr3},
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DC
92 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
93 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 94 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
1f8ae5e6 95 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
bdfdba87 96 {"atmega8515",AVR_ISA_M8, bfd_mach_avr4},
8a6def3b 97 {"atmega8535",AVR_ISA_M8, bfd_mach_avr4},
1f8ae5e6 98 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 99 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
bdfdba87 100 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
65aa24b6 101 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
8a6def3b 102 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
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DC
103 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
104 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
105 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
106 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
65aa24b6 107 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
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108 {NULL, 0, 0}
109};
110
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111/* Current MCU type. */
112static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
113static struct mcu_type_s *avr_mcu = &default_mcu;
114
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115/* AVR target-specific switches. */
116struct avr_opt_s
117{
c6a7ab1f
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118 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */
119 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */
120 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */
00d2865b
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121};
122
123static struct avr_opt_s avr_opt = { 0, 0, 0 };
124
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125const char EXP_CHARS[] = "eE";
126const char FLT_CHARS[] = "dD";
127static void avr_set_arch (int dummy);
128
129/* The target specific pseudo-ops which we support. */
130const pseudo_typeS md_pseudo_table[] =
131{
132 {"arch", avr_set_arch, 0},
133 { NULL, NULL, 0}
134};
135
136#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 137
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138static void show_mcu_list PARAMS ((FILE *));
139static char *skip_space PARAMS ((char *));
140static char *extract_word PARAMS ((char *, char *, int));
141static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *,
142 int, char *, char **));
143static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **));
144static unsigned int avr_get_constant PARAMS ((char *, int));
145static char *parse_exp PARAMS ((char *, expressionS *));
146static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *));
adde6300 147
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148#define EXP_MOD_NAME(i) exp_mod[i].name
149#define EXP_MOD_RELOC(i) exp_mod[i].reloc
150#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
151#define HAVE_PM_P(i) exp_mod[i].have_pm
152
153struct exp_mod_s
154{
c6a7ab1f 155 char *name;
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156 bfd_reloc_code_real_type reloc;
157 bfd_reloc_code_real_type neg_reloc;
158 int have_pm;
159};
160
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161static struct exp_mod_s exp_mod[] =
162{
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163 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
164 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
165 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
166 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
167 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
168 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
169 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
170 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
171};
172
173/* Opcode hash table. */
174static struct hash_control *avr_hash;
175
176/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
177static struct hash_control *avr_mod_hash;
178
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179#define OPTION_MMCU 'm'
180#define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1)
181#define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2)
182#define OPTION_NO_WRAP (OPTION_MD_BASE + 3)
adde6300 183
c6a7ab1f
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184struct option md_longopts[] =
185{
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186 { "mmcu", required_argument, NULL, OPTION_MMCU },
187 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
188 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
189 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
190 { NULL, no_argument, NULL, 0 }
adde6300 191};
adde6300 192
c6a7ab1f 193size_t md_longopts_size = sizeof (md_longopts);
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194
195/* Display nicely formatted list of known MCU names. */
c6a7ab1f 196
00d2865b 197static void
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198show_mcu_list (stream)
199 FILE *stream;
00d2865b
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200{
201 int i, x;
202
203 fprintf (stream, _("Known MCU names:"));
204 x = 1000;
1dab94dd 205
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206 for (i = 0; mcu_types[i].name; i++)
207 {
208 int len = strlen (mcu_types[i].name);
1dab94dd 209
00d2865b 210 x += len + 1;
1dab94dd 211
00d2865b 212 if (x < 75)
c6a7ab1f 213 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
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214 else
215 {
216 fprintf (stream, "\n %s", mcu_types[i].name);
217 x = len + 2;
218 }
219 }
1dab94dd 220
c6a7ab1f 221 fprintf (stream, "\n");
00d2865b
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222}
223
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224static inline char *
225skip_space (s)
c6a7ab1f 226 char *s;
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227{
228 while (*s == ' ' || *s == '\t')
229 ++s;
230 return s;
231}
232
233/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 234
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235static char *
236extract_word (char *from, char *to, int limit)
237{
238 char *op_start;
239 char *op_end;
240 int size = 0;
241
242 /* Drop leading whitespace. */
243 from = skip_space (from);
244 *to = 0;
c6a7ab1f 245
adde6300 246 /* Find the op code end. */
c6a7ab1f 247 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
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248 {
249 to[size++] = *op_end++;
250 if (size + 1 >= limit)
251 break;
252 }
1dab94dd 253
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254 to[size] = 0;
255 return op_end;
256}
257
258int
259md_estimate_size_before_relax (fragp, seg)
df136245
DC
260 fragS *fragp ATTRIBUTE_UNUSED;
261 asection *seg ATTRIBUTE_UNUSED;
adde6300
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262{
263 abort ();
264 return 0;
265}
266
267void
268md_show_usage (stream)
c6a7ab1f 269 FILE *stream;
adde6300 270{
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271 fprintf (stream,
272 _("AVR options:\n"
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273 " -mmcu=[avr-name] select microcontroller variant\n"
274 " [avr-name] can be:\n"
65aa24b6
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275 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
276 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
277 " avr3 - ATmega103, ATmega603\n"
278 " avr4 - ATmega83, ATmega85\n"
279 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 280 " or immediate microcontroller name.\n"));
00d2865b
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281 fprintf (stream,
282 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
283 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
284 " (default for avr4, avr5)\n"
285 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
286 " (default for avr3, avr5)\n"));
287 show_mcu_list (stream);
adde6300
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288}
289
290static void
291avr_set_arch (dummy)
df136245 292 int dummy ATTRIBUTE_UNUSED;
adde6300 293{
c6a7ab1f 294 char *str;
1dab94dd 295
c6a7ab1f 296 str = (char *) alloca (20);
adde6300 297 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 298 md_parse_option (OPTION_MMCU, str);
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299 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
300}
301
302int
303md_parse_option (c, arg)
304 int c;
305 char *arg;
306{
00d2865b 307 switch (c)
adde6300 308 {
00d2865b
NC
309 case OPTION_MMCU:
310 {
311 int i;
312 char *s = alloca (strlen (arg) + 1);
adde6300 313
00d2865b
NC
314 {
315 char *t = s;
316 char *arg1 = arg;
317
318 do
3882b010 319 *t = TOLOWER (*arg1++);
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320 while (*t++);
321 }
322
323 for (i = 0; mcu_types[i].name; ++i)
324 if (strcmp (mcu_types[i].name, s) == 0)
325 break;
adde6300 326
00d2865b
NC
327 if (!mcu_types[i].name)
328 {
329 show_mcu_list (stderr);
330 as_fatal (_("unknown MCU: %s\n"), arg);
331 }
65aa24b6 332
00d2865b
NC
333 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
334 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
335 as .arch ... in the asm output at the same time. */
00d2865b
NC
336 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
337 avr_mcu = &mcu_types[i];
338 else
339 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
340 avr_mcu->name, mcu_types[i].name);
341 return 1;
342 }
343 case OPTION_ALL_OPCODES:
344 avr_opt.all_opcodes = 1;
345 return 1;
346 case OPTION_NO_SKIP_BUG:
347 avr_opt.no_skip_bug = 1;
348 return 1;
349 case OPTION_NO_WRAP:
350 avr_opt.no_wrap = 1;
adde6300
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351 return 1;
352 }
1dab94dd 353
adde6300
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354 return 0;
355}
356
357symbolS *
c6a7ab1f 358md_undefined_symbol (name)
df136245 359 char *name ATTRIBUTE_UNUSED;
adde6300
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360{
361 return 0;
362}
363
c6a7ab1f
NC
364/* Turn a string in input_line_pointer into a floating point constant
365 of type TYPE, and store the appropriate bytes in *LITP. The number
366 of LITTLENUMS emitted is stored in *SIZEP. An error message is
367 returned, or NULL on OK. */
368
adde6300
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369char *
370md_atof (type, litP, sizeP)
371 int type;
372 char *litP;
373 int *sizeP;
374{
375 int prec;
376 LITTLENUM_TYPE words[4];
377 LITTLENUM_TYPE *wordP;
378 char *t;
379
380 switch (type)
381 {
382 case 'f':
383 prec = 2;
384 break;
385 case 'd':
386 prec = 4;
387 break;
388 default:
389 *sizeP = 0;
390 return _("bad call to md_atof");
391 }
392
393 t = atof_ieee (input_line_pointer, type, words);
394 if (t)
395 input_line_pointer = t;
396
397 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 398
adde6300
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399 /* This loop outputs the LITTLENUMs in REVERSE order. */
400 for (wordP = words + prec - 1; prec--;)
401 {
402 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
403 litP += sizeof (LITTLENUM_TYPE);
404 }
1dab94dd 405
adde6300
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406 return NULL;
407}
408
409void
410md_convert_frag (abfd, sec, fragP)
c6a7ab1f
NC
411 bfd *abfd ATTRIBUTE_UNUSED;
412 asection *sec ATTRIBUTE_UNUSED;
413 fragS *fragP ATTRIBUTE_UNUSED;
adde6300
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414{
415 abort ();
416}
417
adde6300
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418void
419md_begin ()
420{
df136245 421 unsigned int i;
adde6300 422 struct avr_opcodes_s *opcode;
c6a7ab1f 423 avr_hash = hash_new ();
adde6300
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424
425 /* Insert unique names into hash table. This hash table then provides a
426 quick index to the first opcode with a particular name in the opcode
427 table. */
adde6300
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428 for (opcode = avr_opcodes; opcode->name; opcode++)
429 hash_insert (avr_hash, opcode->name, (char *) opcode);
430
431 avr_mod_hash = hash_new ();
432
433 for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
c6a7ab1f
NC
434 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
435
adde6300
AM
436 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
437}
438
df136245 439/* Resolve STR as a constant expression and return the result.
c6a7ab1f 440 If result greater than MAX then error. */
df136245
DC
441
442static unsigned int
443avr_get_constant (str, max)
c6a7ab1f 444 char *str;
df136245
DC
445 int max;
446{
447 expressionS ex;
448 str = skip_space (str);
449 input_line_pointer = str;
450 expression (&ex);
451
452 if (ex.X_op != O_constant)
453 as_bad (_("constant value required"));
454
455 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 456 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 457
df136245
DC
458 return ex.X_add_number;
459}
460
df136245 461/* Parse instruction operands.
c6a7ab1f 462 Return binary opcode. */
df136245 463
adde6300
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464static unsigned int
465avr_operands (opcode, line)
466 struct avr_opcodes_s *opcode;
467 char **line;
468{
469 char *op = opcode->constraints;
470 unsigned int bin = opcode->bin_opcode;
471 char *frag = frag_more (opcode->insn_size * 2);
472 char *str = *line;
473 int where = frag - frag_now->fr_literal;
c6a7ab1f 474 static unsigned int prev = 0; /* Previous opcode. */
adde6300
AM
475
476 /* Opcode have operands. */
477 if (*op)
478 {
479 unsigned int reg1 = 0;
480 unsigned int reg2 = 0;
481 int reg1_present = 0;
482 int reg2_present = 0;
483
484 /* Parse first operand. */
485 if (REGISTER_P (*op))
486 reg1_present = 1;
487 reg1 = avr_operand (opcode, where, op, &str);
488 ++op;
489
490 /* Parse second operand. */
491 if (*op)
492 {
493 if (*op == ',')
494 ++op;
1dab94dd 495
adde6300
AM
496 if (*op == '=')
497 {
498 reg2 = reg1;
499 reg2_present = 1;
500 }
501 else
502 {
503 if (REGISTER_P (*op))
504 reg2_present = 1;
505
506 str = skip_space (str);
507 if (*str++ != ',')
00d2865b 508 as_bad (_("`,' required"));
adde6300
AM
509 str = skip_space (str);
510
511 reg2 = avr_operand (opcode, where, op, &str);
512
513 }
1dab94dd 514
adde6300
AM
515 if (reg1_present && reg2_present)
516 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
517 else if (reg2_present)
518 reg2 <<= 4;
519 }
520 if (reg1_present)
521 reg1 <<= 4;
522 bin |= reg1 | reg2;
523 }
b170af93 524
65b1d096
DC
525 /* Detect undefined combinations (like ld r31,Z+). */
526 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
527 as_warn (_("undefined combination of operands"));
00d2865b 528
adde6300
AM
529 if (opcode->insn_size == 2)
530 {
00d2865b
NC
531 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
532 (AVR core bug, fixed in the newer devices). */
533
65b1d096
DC
534 if (!(avr_opt.no_skip_bug || (avr_mcu->isa & AVR_ISA_MUL))
535 && AVR_SKIP_P (prev))
536 as_warn (_("skipping two-word instruction"));
00d2865b 537
c6a7ab1f 538 bfd_putl32 ((bfd_vma) bin, frag);
adde6300
AM
539 }
540 else
c6a7ab1f 541 bfd_putl16 ((bfd_vma) bin, frag);
b170af93
DC
542
543 prev = bin;
adde6300
AM
544 *line = str;
545 return bin;
546}
547
df136245 548/* Parse one instruction operand.
c6a7ab1f
NC
549 Return operand bitmask. Also fixups can be generated. */
550
adde6300
AM
551static unsigned int
552avr_operand (opcode, where, op, line)
553 struct avr_opcodes_s *opcode;
554 int where;
555 char *op;
556 char **line;
557{
adde6300 558 expressionS op_expr;
df136245
DC
559 unsigned int op_mask = 0;
560 char *str = skip_space (*line);
adde6300 561
adde6300
AM
562 switch (*op)
563 {
564 /* Any register operand. */
565 case 'w':
566 case 'd':
567 case 'r':
b170af93
DC
568 case 'a':
569 case 'v':
c6a7ab1f
NC
570 if (*str == 'r' || *str == 'R')
571 {
572 char r_name[20];
1dab94dd 573
c6a7ab1f 574 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 575 op_mask = 0xff;
3882b010 576 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
577 {
578 if (r_name[2] == '\0')
579 op_mask = r_name[1] - '0';
580 else if (r_name[1] != '0'
3882b010 581 && ISDIGIT (r_name[2])
c6a7ab1f
NC
582 && r_name[3] == '\0')
583 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
584 }
585 }
586 else
587 {
588 op_mask = avr_get_constant (str, 31);
589 str = input_line_pointer;
590 }
1dab94dd 591
c6a7ab1f
NC
592 if (op_mask <= 31)
593 {
594 switch (*op)
595 {
596 case 'a':
597 if (op_mask < 16 || op_mask > 23)
598 as_bad (_("register r16-r23 required"));
599 op_mask -= 16;
600 break;
1dab94dd 601
c6a7ab1f
NC
602 case 'd':
603 if (op_mask < 16)
604 as_bad (_("register number above 15 required"));
605 op_mask -= 16;
606 break;
1dab94dd 607
c6a7ab1f
NC
608 case 'v':
609 if (op_mask & 1)
610 as_bad (_("even register number required"));
611 op_mask >>= 1;
612 break;
1dab94dd 613
c6a7ab1f 614 case 'w':
65b1d096 615 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 616 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 617 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
618 break;
619 }
620 break;
621 }
622 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
623 break;
624
625 case 'e':
626 {
627 char c;
1dab94dd 628
adde6300
AM
629 if (*str == '-')
630 {
c6a7ab1f 631 str = skip_space (str + 1);
adde6300
AM
632 op_mask = 0x1002;
633 }
3882b010 634 c = TOLOWER (*str);
adde6300
AM
635 if (c == 'x')
636 op_mask |= 0x100c;
637 else if (c == 'y')
638 op_mask |= 0x8;
639 else if (c != 'z')
00d2865b 640 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 641
c6a7ab1f 642 str = skip_space (str + 1);
adde6300
AM
643 if (*str == '+')
644 {
645 ++str;
646 if (op_mask & 2)
00d2865b 647 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
648 op_mask |= 0x1001;
649 }
e38c9cc2 650
1188e082 651 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 652 registers, no predecrement, no postincrement. */
00d2865b
NC
653 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
654 && !(avr_mcu->isa & AVR_ISA_SRAM))
655 as_bad (_("addressing mode not supported"));
adde6300
AM
656 }
657 break;
658
b170af93 659 case 'z':
c6a7ab1f
NC
660 if (*str == '-')
661 as_bad (_("can't predecrement"));
1dab94dd 662
c6a7ab1f
NC
663 if (! (*str == 'z' || *str == 'Z'))
664 as_bad (_("pointer register Z required"));
1dab94dd 665
c6a7ab1f
NC
666 str = skip_space (str + 1);
667
668 if (*str == '+')
669 {
670 ++str;
671 op_mask |= 1;
672 }
b170af93
DC
673 break;
674
adde6300
AM
675 case 'b':
676 {
3882b010 677 char c = TOLOWER (*str++);
1dab94dd 678
adde6300
AM
679 if (c == 'y')
680 op_mask |= 0x8;
681 else if (c != 'z')
00d2865b 682 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
683 str = skip_space (str);
684 if (*str++ == '+')
685 {
686 unsigned int x;
687 x = avr_get_constant (str, 63);
688 str = input_line_pointer;
689 op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8);
690 }
691 }
692 break;
693
694 case 'h':
c6a7ab1f
NC
695 str = parse_exp (str, &op_expr);
696 fix_new_exp (frag_now, where, opcode->insn_size * 2,
697 &op_expr, false, BFD_RELOC_AVR_CALL);
adde6300
AM
698 break;
699
700 case 'L':
c6a7ab1f
NC
701 str = parse_exp (str, &op_expr);
702 fix_new_exp (frag_now, where, opcode->insn_size * 2,
703 &op_expr, true, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
704 break;
705
706 case 'l':
c6a7ab1f
NC
707 str = parse_exp (str, &op_expr);
708 fix_new_exp (frag_now, where, opcode->insn_size * 2,
709 &op_expr, true, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
710 break;
711
712 case 'i':
c6a7ab1f
NC
713 str = parse_exp (str, &op_expr);
714 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
715 &op_expr, false, BFD_RELOC_16);
adde6300
AM
716 break;
717
718 case 'M':
719 {
720 bfd_reloc_code_real_type r_type;
1dab94dd 721
c6a7ab1f
NC
722 input_line_pointer = str;
723 r_type = avr_ldi_expression (&op_expr);
724 str = input_line_pointer;
adde6300
AM
725 fix_new_exp (frag_now, where, 3,
726 &op_expr, false, r_type);
727 }
728 break;
729
730 case 'n':
731 {
732 unsigned int x;
1dab94dd 733
adde6300
AM
734 x = ~avr_get_constant (str, 255);
735 str = input_line_pointer;
736 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
737 }
738 break;
739
740 case 'K':
741 {
742 unsigned int x;
1dab94dd 743
adde6300
AM
744 x = avr_get_constant (str, 63);
745 str = input_line_pointer;
746 op_mask |= (x & 0xf) | ((x & 0x30) << 2);
747 }
748 break;
749
750 case 'S':
751 case 's':
752 {
753 unsigned int x;
1dab94dd 754
adde6300
AM
755 x = avr_get_constant (str, 7);
756 str = input_line_pointer;
757 if (*op == 'S')
758 x <<= 4;
759 op_mask |= x;
760 }
761 break;
762
763 case 'P':
764 {
765 unsigned int x;
1dab94dd 766
adde6300
AM
767 x = avr_get_constant (str, 63);
768 str = input_line_pointer;
769 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
770 }
771 break;
772
773 case 'p':
774 {
775 unsigned int x;
1dab94dd 776
adde6300
AM
777 x = avr_get_constant (str, 31);
778 str = input_line_pointer;
779 op_mask |= x << 3;
780 }
781 break;
1dab94dd 782
1188e082
DC
783 case '?':
784 break;
1dab94dd 785
adde6300 786 default:
00d2865b 787 as_bad (_("unknown constraint `%c'"), *op);
adde6300 788 }
1dab94dd 789
adde6300
AM
790 *line = str;
791 return op_mask;
792}
793
794/* GAS will call this function for each section at the end of the assembly,
795 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 796
adde6300
AM
797valueT
798md_section_align (seg, addr)
799 asection *seg;
800 valueT addr;
801{
802 int align = bfd_get_section_alignment (stdoutput, seg);
803 return ((addr + (1 << align) - 1) & (-1 << align));
804}
805
806/* If you define this macro, it should return the offset between the
807 address of a PC relative fixup and the position from which the PC
808 relative adjustment should be made. On many processors, the base
809 of a PC relative instruction is the next instruction, so this
810 macro would return the length of an instruction. */
c6a7ab1f 811
adde6300
AM
812long
813md_pcrel_from_section (fixp, sec)
814 fixS *fixp;
815 segT sec;
816{
c6a7ab1f 817 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
818 && (!S_IS_DEFINED (fixp->fx_addsy)
819 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
820 return 0;
1dab94dd 821
adde6300
AM
822 return fixp->fx_frag->fr_address + fixp->fx_where;
823}
824
825/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
826 value in the object file. */
827
94f592af
NC
828void
829md_apply_fix3 (fixP, valP, seg)
830 fixS *fixP;
831 valueT * valP;
adde6300
AM
832 segT seg;
833{
834 unsigned char *where;
835 unsigned long insn;
a161fe53 836 long value = *valP;
adde6300 837
94f592af
NC
838 if (fixP->fx_addsy == (symbolS *) NULL)
839 fixP->fx_done = 1;
840
a161fe53
AM
841 /* We don't actually support subtracting a symbol. */
842 if (fixP->fx_subsy != (symbolS *) NULL)
843 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1dab94dd 844
94f592af 845 switch (fixP->fx_r_type)
adde6300
AM
846 {
847 default:
94f592af 848 fixP->fx_no_overflow = 1;
adde6300
AM
849 break;
850 case BFD_RELOC_AVR_7_PCREL:
851 case BFD_RELOC_AVR_13_PCREL:
852 case BFD_RELOC_32:
853 case BFD_RELOC_16:
854 case BFD_RELOC_AVR_CALL:
855 break;
856 }
857
94f592af 858 if (fixP->fx_done)
adde6300
AM
859 {
860 /* Fetch the instruction, insert the fully resolved operand
861 value, and stuff the instruction back again. */
94f592af 862 where = fixP->fx_frag->fr_literal + fixP->fx_where;
adde6300
AM
863 insn = bfd_getl16 (where);
864
94f592af 865 switch (fixP->fx_r_type)
adde6300
AM
866 {
867 case BFD_RELOC_AVR_7_PCREL:
868 if (value & 1)
94f592af 869 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 870 _("odd address operand: %ld"), value);
1dab94dd 871
adde6300
AM
872 /* Instruction addresses are always right-shifted by 1. */
873 value >>= 1;
874 --value; /* Correct PC. */
1dab94dd 875
adde6300 876 if (value < -64 || value > 63)
94f592af 877 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
878 _("operand out of range: %ld"), value);
879 value = (value << 3) & 0x3f8;
880 bfd_putl16 ((bfd_vma) (value | insn), where);
881 break;
882
883 case BFD_RELOC_AVR_13_PCREL:
884 if (value & 1)
94f592af 885 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 886 _("odd address operand: %ld"), value);
1dab94dd 887
adde6300
AM
888 /* Instruction addresses are always right-shifted by 1. */
889 value >>= 1;
890 --value; /* Correct PC. */
adde6300
AM
891
892 if (value < -2048 || value > 2047)
893 {
65aa24b6 894 /* No wrap for devices with >8K of program memory. */
00d2865b 895 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
94f592af 896 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
897 _("operand out of range: %ld"), value);
898 }
899
900 value &= 0xfff;
901 bfd_putl16 ((bfd_vma) (value | insn), where);
902 break;
903
904 case BFD_RELOC_32:
905 bfd_putl16 ((bfd_vma) value, where);
906 break;
907
908 case BFD_RELOC_16:
909 bfd_putl16 ((bfd_vma) value, where);
910 break;
911
912 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 913 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
914 break;
915
916 case BFD_RELOC_AVR_LO8_LDI:
917 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
918 break;
919
920 case -BFD_RELOC_AVR_LO8_LDI:
921 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
922 break;
923
924 case BFD_RELOC_AVR_HI8_LDI:
925 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
926 break;
927
928 case -BFD_RELOC_AVR_HI8_LDI:
929 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
930 break;
931
932 case BFD_RELOC_AVR_HH8_LDI:
933 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
934 break;
935
936 case BFD_RELOC_AVR_LO8_LDI_NEG:
937 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
938 break;
939
940 case -BFD_RELOC_AVR_LO8_LDI_NEG:
941 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
942 break;
943
944 case BFD_RELOC_AVR_HI8_LDI_NEG:
945 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
946 break;
947
948 case -BFD_RELOC_AVR_HI8_LDI_NEG:
949 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
950 break;
951
952 case BFD_RELOC_AVR_HH8_LDI_NEG:
953 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
954 break;
955
956 case BFD_RELOC_AVR_LO8_LDI_PM:
957 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
958 break;
959
960 case BFD_RELOC_AVR_HI8_LDI_PM:
961 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
962 break;
963
964 case BFD_RELOC_AVR_HH8_LDI_PM:
965 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
966 break;
967
968 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
969 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
970 break;
971
972 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
973 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
974 break;
975
976 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
977 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
978 break;
979
980 case BFD_RELOC_AVR_CALL:
981 {
982 unsigned long x;
1dab94dd 983
adde6300
AM
984 x = bfd_getl16 (where);
985 if (value & 1)
94f592af 986 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300
AM
987 _("odd address operand: %ld"), value);
988 value >>= 1;
989 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
990 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 991 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
992 }
993 break;
994
995 default:
c6a7ab1f 996 as_fatal (_("line %d: unknown relocation type: 0x%x"),
94f592af 997 fixP->fx_line, fixP->fx_r_type);
adde6300
AM
998 break;
999 }
1000 }
1001 else
1002 {
94f592af 1003 switch (fixP->fx_r_type)
adde6300
AM
1004 {
1005 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1006 case -BFD_RELOC_AVR_HI8_LDI:
1007 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1008 case -BFD_RELOC_AVR_LO8_LDI:
94f592af 1009 as_bad_where (fixP->fx_file, fixP->fx_line,
adde6300 1010 _("only constant expression allowed"));
94f592af 1011 fixP->fx_done = 1;
adde6300
AM
1012 break;
1013 default:
1014 break;
1015 }
adde6300 1016 }
adde6300
AM
1017}
1018
adde6300
AM
1019/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1020 will pass the resulting reloc to `bfd_install_relocation'. This
1021 currently works poorly, as `bfd_install_relocation' often does the
1022 wrong thing, and instances of `tc_gen_reloc' have been written to
1023 work around the problems, which in turns makes it difficult to fix
c6a7ab1f 1024 `bfd_install_relocation'. */
adde6300
AM
1025
1026/* If while processing a fixup, a reloc really needs to be created
1027 then it is done here. */
1028
1029arelent *
1030tc_gen_reloc (seg, fixp)
df136245 1031 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
1032 fixS *fixp;
1033{
1034 arelent *reloc;
1035
1036 reloc = (arelent *) xmalloc (sizeof (arelent));
1037
1038 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1039 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1040
1041 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1042 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1043 if (reloc->howto == (reloc_howto_type *) NULL)
1044 {
1045 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1046 _("reloc %d not supported by object file format"),
1047 (int) fixp->fx_r_type);
adde6300
AM
1048 return NULL;
1049 }
1050
1051 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1052 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1053 reloc->address = fixp->fx_offset;
1054
1055 reloc->addend = fixp->fx_offset;
1056
1057 return reloc;
1058}
1059
adde6300
AM
1060void
1061md_assemble (str)
1062 char *str;
1063{
c6a7ab1f 1064 struct avr_opcodes_s *opcode;
adde6300
AM
1065 char op[11];
1066
c6a7ab1f 1067 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1068
1069 if (!op[0])
00d2865b 1070 as_bad (_("can't find opcode "));
adde6300
AM
1071
1072 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1073
1074 if (opcode == NULL)
1075 {
00d2865b 1076 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1077 return;
1078 }
1079
b170af93 1080 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1081 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1082
1188e082
DC
1083 if (*str && *opcode->constraints == '?')
1084 ++opcode;
b170af93 1085
00d2865b
NC
1086 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1087 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1088
1089 /* We used to set input_line_pointer to the result of get_operands,
1090 but that is wrong. Our caller assumes we don't change it. */
1091 {
1092 char *t = input_line_pointer;
1093 avr_operands (opcode, &str);
b170af93 1094 if (*skip_space (str))
00d2865b 1095 as_bad (_("garbage at end of line"));
adde6300
AM
1096 input_line_pointer = t;
1097 }
1098}
1099
1100/* Parse ordinary expression. */
c6a7ab1f 1101
adde6300
AM
1102static char *
1103parse_exp (s, op)
1104 char *s;
c6a7ab1f 1105 expressionS *op;
adde6300
AM
1106{
1107 input_line_pointer = s;
1108 expression (op);
1109 if (op->X_op == O_absent)
1110 as_bad (_("missing operand"));
1111 return input_line_pointer;
1112}
1113
adde6300
AM
1114/* Parse special expressions (needed for LDI command):
1115 xx8 (address)
1116 xx8 (-address)
1117 pm_xx8 (address)
1118 pm_xx8 (-address)
c6a7ab1f
NC
1119 where xx is: hh, hi, lo. */
1120
adde6300
AM
1121static bfd_reloc_code_real_type
1122avr_ldi_expression (exp)
1123 expressionS *exp;
1124{
1125 char *str = input_line_pointer;
1126 char *tmp;
1127 char op[8];
1128 int mod;
1129 tmp = str;
1130
1131 str = extract_word (str, op, sizeof (op));
1dab94dd 1132
adde6300
AM
1133 if (op[0])
1134 {
1135 mod = (int) hash_find (avr_mod_hash, op);
1dab94dd 1136
adde6300
AM
1137 if (mod)
1138 {
1139 int closes = 0;
1dab94dd 1140
adde6300
AM
1141 mod -= 10;
1142 str = skip_space (str);
1dab94dd 1143
adde6300
AM
1144 if (*str == '(')
1145 {
1146 int neg_p = 0;
1dab94dd 1147
adde6300 1148 ++str;
1dab94dd 1149
adde6300
AM
1150 if (strncmp ("pm(", str, 3) == 0
1151 || strncmp ("-(pm(", str, 5) == 0)
1152 {
c6a7ab1f 1153 if (HAVE_PM_P (mod))
adde6300
AM
1154 {
1155 ++mod;
1156 ++closes;
1157 }
1158 else
00d2865b 1159 as_bad (_("illegal expression"));
1dab94dd 1160
adde6300
AM
1161 if (*str == '-')
1162 {
1163 neg_p = 1;
1164 ++closes;
1165 str += 5;
1166 }
1167 else
1168 str += 3;
1169 }
1dab94dd 1170
adde6300
AM
1171 if (*str == '-' && *(str + 1) == '(')
1172 {
1173 neg_p ^= 1;
1174 ++closes;
1175 str += 2;
1176 }
1dab94dd 1177
adde6300
AM
1178 input_line_pointer = str;
1179 expression (exp);
1dab94dd 1180
adde6300
AM
1181 do
1182 {
1183 if (*input_line_pointer != ')')
1184 {
00d2865b 1185 as_bad (_("`)' required"));
adde6300
AM
1186 break;
1187 }
1188 input_line_pointer++;
1189 }
1190 while (closes--);
1dab94dd 1191
adde6300
AM
1192 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
1193 }
1194 }
1195 }
1dab94dd 1196
adde6300
AM
1197 input_line_pointer = tmp;
1198 expression (exp);
00d2865b 1199
c6a7ab1f 1200 /* Warn about expressions that fail to use lo8 (). */
00d2865b
NC
1201 if (exp->X_op == O_constant)
1202 {
1203 int x = exp->X_add_number;
1204 if (x < -255 || x > 255)
1205 as_warn (_("constant out of 8-bit range: %d"), x);
1206 }
1207 else
1208 as_warn (_("expression possibly out of 8-bit range"));
1209
adde6300
AM
1210 return BFD_RELOC_AVR_LO8_LDI;
1211}
1212
1213/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1214 `avr_cons_fix_new'. */
adde6300
AM
1215static int exp_mod_pm = 0;
1216
1217/* Parse special CONS expression: pm (expression)
1218 which is used for addressing to a program memory.
c6a7ab1f
NC
1219 Relocation: BFD_RELOC_AVR_16_PM. */
1220
adde6300
AM
1221void
1222avr_parse_cons_expression (exp, nbytes)
1223 expressionS *exp;
1224 int nbytes;
1225{
c6a7ab1f 1226 char *tmp;
adde6300
AM
1227
1228 exp_mod_pm = 0;
1229
1230 tmp = input_line_pointer = skip_space (input_line_pointer);
1231
1232 if (nbytes == 2)
1233 {
c6a7ab1f 1234 char *pm_name = "pm";
adde6300 1235 int len = strlen (pm_name);
1dab94dd 1236
adde6300
AM
1237 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1238 {
1239 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1240
adde6300
AM
1241 if (*input_line_pointer == '(')
1242 {
1243 input_line_pointer = skip_space (input_line_pointer + 1);
1244 exp_mod_pm = 1;
1245 expression (exp);
1dab94dd 1246
adde6300
AM
1247 if (*input_line_pointer == ')')
1248 ++input_line_pointer;
1249 else
1250 {
00d2865b 1251 as_bad (_("`)' required"));
adde6300
AM
1252 exp_mod_pm = 0;
1253 }
1dab94dd 1254
adde6300
AM
1255 return;
1256 }
1dab94dd 1257
adde6300
AM
1258 input_line_pointer = tmp;
1259 }
1260 }
1dab94dd 1261
adde6300
AM
1262 expression (exp);
1263}
1264
1265void
c6a7ab1f 1266avr_cons_fix_new (frag, where, nbytes, exp)
adde6300
AM
1267 fragS *frag;
1268 int where;
1269 int nbytes;
1270 expressionS *exp;
1271{
1272 if (exp_mod_pm == 0)
1273 {
1274 if (nbytes == 2)
1275 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16);
1276 else if (nbytes == 4)
1277 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32);
1278 else
00d2865b 1279 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
adde6300
AM
1280 }
1281 else
1282 {
1283 if (nbytes == 2)
1284 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM);
1285 else
00d2865b 1286 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
adde6300
AM
1287 exp_mod_pm = 0;
1288 }
1289}
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