Commit | Line | Data |
---|---|---|
adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
2132e3a3 AM |
3 | Copyright 1999, 2000, 2001, 2002, 2004, 2005 |
4 | Free Software Foundation, Inc. | |
adde6300 AM |
5 | Contributed by Denis Chertykov <denisc@overta.ru> |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
21 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
adde6300 AM |
23 | |
24 | #include <stdio.h> | |
adde6300 | 25 | #include "as.h" |
3882b010 | 26 | #include "safe-ctype.h" |
adde6300 | 27 | #include "subsegs.h" |
dc191a8f | 28 | #include "libiberty.h" |
adde6300 | 29 | |
1188e082 DC |
30 | struct avr_opcodes_s |
31 | { | |
dc191a8f NC |
32 | char * name; |
33 | char * constraints; | |
34 | int insn_size; /* In words. */ | |
35 | int isa; | |
36 | unsigned int bin_opcode; | |
1188e082 DC |
37 | }; |
38 | ||
39 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
40 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
41 | ||
42 | struct avr_opcodes_s avr_opcodes[] = | |
43 | { | |
44 | #include "opcode/avr.h" | |
45 | {NULL, NULL, 0, 0, 0} | |
46 | }; | |
47 | ||
adde6300 AM |
48 | const char comment_chars[] = ";"; |
49 | const char line_comment_chars[] = "#"; | |
50 | const char line_separator_chars[] = "$"; | |
51 | ||
adde6300 AM |
52 | const char *md_shortopts = "m:"; |
53 | struct mcu_type_s | |
54 | { | |
55 | char *name; | |
56 | int isa; | |
57 | int mach; | |
58 | }; | |
59 | ||
1f8ae5e6 DC |
60 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
61 | ones, or planned but never produced), left here for compatibility. | |
62 | TODO: hide them in show_mcu_list output? */ | |
63 | ||
adde6300 AM |
64 | static struct mcu_type_s mcu_types[] = |
65 | { | |
b170af93 | 66 | {"avr1", AVR_ISA_TINY1, bfd_mach_avr1}, |
71d7ecf2 | 67 | {"avr2", AVR_ISA_TINY2, bfd_mach_avr2}, |
b170af93 | 68 | {"avr3", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 69 | {"avr4", AVR_ISA_M8, bfd_mach_avr4}, |
65aa24b6 | 70 | {"avr5", AVR_ISA_ALL, bfd_mach_avr5}, |
adde6300 | 71 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
1f8ae5e6 | 72 | {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */ |
b170af93 DC |
73 | {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1}, |
74 | {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1}, | |
75 | {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1}, | |
76 | {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1}, | |
adde6300 AM |
77 | {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2}, |
78 | {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2}, | |
1f8ae5e6 | 79 | {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */ |
adde6300 | 80 | {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2}, |
bdfdba87 MM |
81 | {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */ |
82 | {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2}, | |
adde6300 | 83 | {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2}, |
1f8ae5e6 DC |
84 | {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */ |
85 | {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */ | |
65aa24b6 NC |
86 | {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2}, |
87 | {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2}, | |
88 | {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2}, | |
8a6def3b | 89 | {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2}, |
71d7ecf2 MM |
90 | {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2}, |
91 | {"attiny2313",AVR_ISA_TINY2, bfd_mach_avr2}, | |
1f8ae5e6 | 92 | {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */ |
b170af93 | 93 | {"atmega103", AVR_ISA_M103, bfd_mach_avr3}, |
1f8ae5e6 | 94 | {"at43usb320",AVR_ISA_M103, bfd_mach_avr3}, |
bdfdba87 | 95 | {"at43usb355",AVR_ISA_M603, bfd_mach_avr3}, |
1f8ae5e6 | 96 | {"at76c711", AVR_ISA_M603, bfd_mach_avr3}, |
23794b24 | 97 | {"atmega48", AVR_ISA_M8, bfd_mach_avr4}, |
1f8ae5e6 | 98 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
8a6def3b | 99 | {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */ |
1f8ae5e6 | 100 | {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */ |
23794b24 | 101 | {"atmega88", AVR_ISA_M8, bfd_mach_avr4}, |
bdfdba87 | 102 | {"atmega8515",AVR_ISA_M8, bfd_mach_avr4}, |
8a6def3b | 103 | {"atmega8535",AVR_ISA_M8, bfd_mach_avr4}, |
1f8ae5e6 | 104 | {"atmega16", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 105 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
bdfdba87 | 106 | {"atmega162", AVR_ISA_M323, bfd_mach_avr5}, |
65aa24b6 | 107 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
5c54fd37 | 108 | {"atmega165", AVR_ISA_M323, bfd_mach_avr5}, |
23794b24 | 109 | {"atmega168", AVR_ISA_M323, bfd_mach_avr5}, |
8a6def3b | 110 | {"atmega169", AVR_ISA_M323, bfd_mach_avr5}, |
1f8ae5e6 DC |
111 | {"atmega32", AVR_ISA_M323, bfd_mach_avr5}, |
112 | {"atmega323", AVR_ISA_M323, bfd_mach_avr5}, | |
5c54fd37 NC |
113 | {"atmega325", AVR_ISA_M323, bfd_mach_avr5}, |
114 | {"atmega3250",AVR_ISA_M323, bfd_mach_avr5}, | |
1f8ae5e6 DC |
115 | {"atmega64", AVR_ISA_M323, bfd_mach_avr5}, |
116 | {"atmega128", AVR_ISA_M128, bfd_mach_avr5}, | |
5c54fd37 NC |
117 | {"atmega645", AVR_ISA_M323, bfd_mach_avr5}, |
118 | {"atmega6450",AVR_ISA_M323, bfd_mach_avr5}, | |
23794b24 | 119 | {"at90can128",AVR_ISA_M128, bfd_mach_avr5}, |
65aa24b6 | 120 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
adde6300 AM |
121 | {NULL, 0, 0} |
122 | }; | |
123 | ||
adde6300 | 124 | /* Current MCU type. */ |
dc191a8f NC |
125 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2}; |
126 | static struct mcu_type_s * avr_mcu = & default_mcu; | |
adde6300 | 127 | |
00d2865b NC |
128 | /* AVR target-specific switches. */ |
129 | struct avr_opt_s | |
130 | { | |
dc191a8f NC |
131 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
132 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
133 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
134 | }; |
135 | ||
136 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
137 | ||
adde6300 AM |
138 | const char EXP_CHARS[] = "eE"; |
139 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
140 | |
141 | static void avr_set_arch (int); | |
adde6300 AM |
142 | |
143 | /* The target specific pseudo-ops which we support. */ | |
144 | const pseudo_typeS md_pseudo_table[] = | |
145 | { | |
146 | {"arch", avr_set_arch, 0}, | |
147 | { NULL, NULL, 0} | |
148 | }; | |
149 | ||
150 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 151 | |
dc191a8f NC |
152 | #define EXP_MOD_NAME(i) exp_mod[i].name |
153 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
154 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
155 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
156 | |
157 | struct exp_mod_s | |
158 | { | |
dc191a8f NC |
159 | char * name; |
160 | bfd_reloc_code_real_type reloc; | |
161 | bfd_reloc_code_real_type neg_reloc; | |
162 | int have_pm; | |
adde6300 AM |
163 | }; |
164 | ||
c6a7ab1f NC |
165 | static struct exp_mod_s exp_mod[] = |
166 | { | |
adde6300 AM |
167 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
168 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
169 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
170 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
171 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
172 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
173 | {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0}, | |
174 | {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0}, | |
175 | }; | |
176 | ||
177 | /* Opcode hash table. */ | |
178 | static struct hash_control *avr_hash; | |
179 | ||
180 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
181 | static struct hash_control *avr_mod_hash; | |
182 | ||
00d2865b | 183 | #define OPTION_MMCU 'm' |
dc191a8f NC |
184 | enum options |
185 | { | |
186 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
187 | OPTION_NO_SKIP_BUG, | |
188 | OPTION_NO_WRAP | |
189 | }; | |
adde6300 | 190 | |
c6a7ab1f NC |
191 | struct option md_longopts[] = |
192 | { | |
00d2865b NC |
193 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
194 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
195 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
196 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
197 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 198 | }; |
adde6300 | 199 | |
c6a7ab1f | 200 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
201 | |
202 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 203 | |
00d2865b | 204 | static void |
dc191a8f | 205 | show_mcu_list (FILE *stream) |
00d2865b NC |
206 | { |
207 | int i, x; | |
208 | ||
209 | fprintf (stream, _("Known MCU names:")); | |
210 | x = 1000; | |
1dab94dd | 211 | |
00d2865b NC |
212 | for (i = 0; mcu_types[i].name; i++) |
213 | { | |
214 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 215 | |
00d2865b | 216 | x += len + 1; |
1dab94dd | 217 | |
00d2865b | 218 | if (x < 75) |
c6a7ab1f | 219 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
220 | else |
221 | { | |
222 | fprintf (stream, "\n %s", mcu_types[i].name); | |
223 | x = len + 2; | |
224 | } | |
225 | } | |
1dab94dd | 226 | |
c6a7ab1f | 227 | fprintf (stream, "\n"); |
00d2865b NC |
228 | } |
229 | ||
adde6300 | 230 | static inline char * |
dc191a8f | 231 | skip_space (char *s) |
adde6300 AM |
232 | { |
233 | while (*s == ' ' || *s == '\t') | |
234 | ++s; | |
235 | return s; | |
236 | } | |
237 | ||
238 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 239 | |
adde6300 AM |
240 | static char * |
241 | extract_word (char *from, char *to, int limit) | |
242 | { | |
243 | char *op_start; | |
244 | char *op_end; | |
245 | int size = 0; | |
246 | ||
247 | /* Drop leading whitespace. */ | |
248 | from = skip_space (from); | |
249 | *to = 0; | |
c6a7ab1f | 250 | |
adde6300 | 251 | /* Find the op code end. */ |
c6a7ab1f | 252 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
253 | { |
254 | to[size++] = *op_end++; | |
255 | if (size + 1 >= limit) | |
256 | break; | |
257 | } | |
1dab94dd | 258 | |
adde6300 AM |
259 | to[size] = 0; |
260 | return op_end; | |
261 | } | |
262 | ||
263 | int | |
dc191a8f NC |
264 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
265 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
266 | { |
267 | abort (); | |
268 | return 0; | |
269 | } | |
270 | ||
271 | void | |
dc191a8f | 272 | md_show_usage (FILE *stream) |
adde6300 | 273 | { |
00d2865b NC |
274 | fprintf (stream, |
275 | _("AVR options:\n" | |
adde6300 AM |
276 | " -mmcu=[avr-name] select microcontroller variant\n" |
277 | " [avr-name] can be:\n" | |
65aa24b6 NC |
278 | " avr1 - AT90S1200, ATtiny1x, ATtiny28\n" |
279 | " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" | |
280 | " avr3 - ATmega103, ATmega603\n" | |
281 | " avr4 - ATmega83, ATmega85\n" | |
282 | " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" | |
adde6300 | 283 | " or immediate microcontroller name.\n")); |
00d2865b NC |
284 | fprintf (stream, |
285 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
286 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
287 | " (default for avr4, avr5)\n" | |
288 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
289 | " (default for avr3, avr5)\n")); | |
290 | show_mcu_list (stream); | |
adde6300 AM |
291 | } |
292 | ||
293 | static void | |
dc191a8f | 294 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 295 | { |
dc191a8f | 296 | char str[20]; |
1dab94dd | 297 | |
adde6300 | 298 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 299 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
300 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
301 | } | |
302 | ||
303 | int | |
dc191a8f | 304 | md_parse_option (int c, char *arg) |
adde6300 | 305 | { |
00d2865b | 306 | switch (c) |
adde6300 | 307 | { |
00d2865b NC |
308 | case OPTION_MMCU: |
309 | { | |
310 | int i; | |
311 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 312 | |
00d2865b NC |
313 | { |
314 | char *t = s; | |
315 | char *arg1 = arg; | |
316 | ||
317 | do | |
3882b010 | 318 | *t = TOLOWER (*arg1++); |
00d2865b NC |
319 | while (*t++); |
320 | } | |
321 | ||
322 | for (i = 0; mcu_types[i].name; ++i) | |
323 | if (strcmp (mcu_types[i].name, s) == 0) | |
324 | break; | |
adde6300 | 325 | |
00d2865b NC |
326 | if (!mcu_types[i].name) |
327 | { | |
328 | show_mcu_list (stderr); | |
329 | as_fatal (_("unknown MCU: %s\n"), arg); | |
330 | } | |
65aa24b6 | 331 | |
00d2865b NC |
332 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
333 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
334 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
335 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
336 | avr_mcu = &mcu_types[i]; | |
337 | else | |
338 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
339 | avr_mcu->name, mcu_types[i].name); | |
340 | return 1; | |
341 | } | |
342 | case OPTION_ALL_OPCODES: | |
343 | avr_opt.all_opcodes = 1; | |
344 | return 1; | |
345 | case OPTION_NO_SKIP_BUG: | |
346 | avr_opt.no_skip_bug = 1; | |
347 | return 1; | |
348 | case OPTION_NO_WRAP: | |
349 | avr_opt.no_wrap = 1; | |
adde6300 AM |
350 | return 1; |
351 | } | |
1dab94dd | 352 | |
adde6300 AM |
353 | return 0; |
354 | } | |
355 | ||
356 | symbolS * | |
dc191a8f | 357 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 358 | { |
dc191a8f | 359 | return NULL; |
adde6300 AM |
360 | } |
361 | ||
c6a7ab1f NC |
362 | /* Turn a string in input_line_pointer into a floating point constant |
363 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
364 | of LITTLENUMS emitted is stored in *SIZEP. An error message is | |
365 | returned, or NULL on OK. */ | |
366 | ||
adde6300 | 367 | char * |
dc191a8f | 368 | md_atof (int type, char *litP, int *sizeP) |
adde6300 AM |
369 | { |
370 | int prec; | |
371 | LITTLENUM_TYPE words[4]; | |
372 | LITTLENUM_TYPE *wordP; | |
373 | char *t; | |
374 | ||
375 | switch (type) | |
376 | { | |
377 | case 'f': | |
378 | prec = 2; | |
379 | break; | |
380 | case 'd': | |
381 | prec = 4; | |
382 | break; | |
383 | default: | |
384 | *sizeP = 0; | |
385 | return _("bad call to md_atof"); | |
386 | } | |
387 | ||
388 | t = atof_ieee (input_line_pointer, type, words); | |
389 | if (t) | |
390 | input_line_pointer = t; | |
391 | ||
392 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
1dab94dd | 393 | |
adde6300 AM |
394 | /* This loop outputs the LITTLENUMs in REVERSE order. */ |
395 | for (wordP = words + prec - 1; prec--;) | |
396 | { | |
397 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); | |
398 | litP += sizeof (LITTLENUM_TYPE); | |
399 | } | |
1dab94dd | 400 | |
adde6300 AM |
401 | return NULL; |
402 | } | |
403 | ||
404 | void | |
dc191a8f NC |
405 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
406 | asection *sec ATTRIBUTE_UNUSED, | |
407 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
408 | { |
409 | abort (); | |
410 | } | |
411 | ||
adde6300 | 412 | void |
dc191a8f | 413 | md_begin (void) |
adde6300 | 414 | { |
df136245 | 415 | unsigned int i; |
adde6300 | 416 | struct avr_opcodes_s *opcode; |
dc191a8f | 417 | |
c6a7ab1f | 418 | avr_hash = hash_new (); |
adde6300 AM |
419 | |
420 | /* Insert unique names into hash table. This hash table then provides a | |
421 | quick index to the first opcode with a particular name in the opcode | |
422 | table. */ | |
adde6300 AM |
423 | for (opcode = avr_opcodes; opcode->name; opcode++) |
424 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
425 | ||
426 | avr_mod_hash = hash_new (); | |
427 | ||
dc191a8f | 428 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
c6a7ab1f NC |
429 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10)); |
430 | ||
adde6300 AM |
431 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
432 | } | |
433 | ||
df136245 | 434 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 435 | If result greater than MAX then error. */ |
df136245 DC |
436 | |
437 | static unsigned int | |
dc191a8f | 438 | avr_get_constant (char *str, int max) |
df136245 DC |
439 | { |
440 | expressionS ex; | |
dc191a8f | 441 | |
df136245 DC |
442 | str = skip_space (str); |
443 | input_line_pointer = str; | |
dc191a8f | 444 | expression (& ex); |
df136245 DC |
445 | |
446 | if (ex.X_op != O_constant) | |
447 | as_bad (_("constant value required")); | |
448 | ||
449 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
c6a7ab1f | 450 | as_bad (_("number must be less than %d"), max + 1); |
1dab94dd | 451 | |
df136245 DC |
452 | return ex.X_add_number; |
453 | } | |
454 | ||
dc191a8f | 455 | /* Parse for ldd/std offset. */ |
df136245 | 456 | |
dc191a8f NC |
457 | static void |
458 | avr_offset_expression (expressionS *exp) | |
adde6300 | 459 | { |
dc191a8f NC |
460 | char *str = input_line_pointer; |
461 | char *tmp; | |
462 | char op[8]; | |
adde6300 | 463 | |
dc191a8f NC |
464 | tmp = str; |
465 | str = extract_word (str, op, sizeof (op)); | |
466 | ||
467 | input_line_pointer = tmp; | |
468 | expression (exp); | |
469 | ||
470 | /* Warn about expressions that fail to use lo8 (). */ | |
471 | if (exp->X_op == O_constant) | |
adde6300 | 472 | { |
dc191a8f NC |
473 | int x = exp->X_add_number; |
474 | ||
475 | if (x < -255 || x > 255) | |
476 | as_warn (_("constant out of 8-bit range: %d"), x); | |
477 | } | |
478 | } | |
adde6300 | 479 | |
dc191a8f | 480 | /* Parse ordinary expression. */ |
adde6300 | 481 | |
dc191a8f NC |
482 | static char * |
483 | parse_exp (char *s, expressionS *op) | |
484 | { | |
485 | input_line_pointer = s; | |
486 | expression (op); | |
487 | if (op->X_op == O_absent) | |
488 | as_bad (_("missing operand")); | |
489 | return input_line_pointer; | |
490 | } | |
1dab94dd | 491 | |
dc191a8f NC |
492 | /* Parse special expressions (needed for LDI command): |
493 | xx8 (address) | |
494 | xx8 (-address) | |
495 | pm_xx8 (address) | |
496 | pm_xx8 (-address) | |
497 | where xx is: hh, hi, lo. */ | |
adde6300 | 498 | |
dc191a8f NC |
499 | static bfd_reloc_code_real_type |
500 | avr_ldi_expression (expressionS *exp) | |
501 | { | |
502 | char *str = input_line_pointer; | |
503 | char *tmp; | |
504 | char op[8]; | |
505 | int mod; | |
506 | tmp = str; | |
adde6300 | 507 | |
dc191a8f | 508 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 509 | |
dc191a8f NC |
510 | if (op[0]) |
511 | { | |
512 | mod = (int) hash_find (avr_mod_hash, op); | |
1dab94dd | 513 | |
dc191a8f NC |
514 | if (mod) |
515 | { | |
516 | int closes = 0; | |
b170af93 | 517 | |
dc191a8f NC |
518 | mod -= 10; |
519 | str = skip_space (str); | |
00d2865b | 520 | |
dc191a8f NC |
521 | if (*str == '(') |
522 | { | |
523 | int neg_p = 0; | |
00d2865b | 524 | |
dc191a8f | 525 | ++str; |
00d2865b | 526 | |
dc191a8f NC |
527 | if (strncmp ("pm(", str, 3) == 0 |
528 | || strncmp ("-(pm(", str, 5) == 0) | |
529 | { | |
530 | if (HAVE_PM_P (mod)) | |
531 | { | |
532 | ++mod; | |
533 | ++closes; | |
534 | } | |
535 | else | |
536 | as_bad (_("illegal expression")); | |
b170af93 | 537 | |
dc191a8f NC |
538 | if (*str == '-') |
539 | { | |
540 | neg_p = 1; | |
541 | ++closes; | |
542 | str += 5; | |
543 | } | |
544 | else | |
545 | str += 3; | |
546 | } | |
adde6300 | 547 | |
dc191a8f NC |
548 | if (*str == '-' && *(str + 1) == '(') |
549 | { | |
550 | neg_p ^= 1; | |
551 | ++closes; | |
552 | str += 2; | |
553 | } | |
750bce0e | 554 | |
dc191a8f NC |
555 | input_line_pointer = str; |
556 | expression (exp); | |
750bce0e | 557 | |
dc191a8f NC |
558 | do |
559 | { | |
560 | if (*input_line_pointer != ')') | |
561 | { | |
562 | as_bad (_("`)' required")); | |
563 | break; | |
564 | } | |
565 | input_line_pointer++; | |
566 | } | |
567 | while (closes--); | |
568 | ||
569 | return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
570 | } | |
571 | } | |
572 | } | |
750bce0e NC |
573 | |
574 | input_line_pointer = tmp; | |
575 | expression (exp); | |
576 | ||
577 | /* Warn about expressions that fail to use lo8 (). */ | |
578 | if (exp->X_op == O_constant) | |
579 | { | |
580 | int x = exp->X_add_number; | |
dc191a8f | 581 | |
750bce0e NC |
582 | if (x < -255 || x > 255) |
583 | as_warn (_("constant out of 8-bit range: %d"), x); | |
584 | } | |
dc191a8f NC |
585 | |
586 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
587 | } |
588 | ||
df136245 | 589 | /* Parse one instruction operand. |
c6a7ab1f NC |
590 | Return operand bitmask. Also fixups can be generated. */ |
591 | ||
adde6300 | 592 | static unsigned int |
dc191a8f NC |
593 | avr_operand (struct avr_opcodes_s *opcode, |
594 | int where, | |
595 | char *op, | |
596 | char **line) | |
adde6300 | 597 | { |
adde6300 | 598 | expressionS op_expr; |
df136245 DC |
599 | unsigned int op_mask = 0; |
600 | char *str = skip_space (*line); | |
adde6300 | 601 | |
adde6300 AM |
602 | switch (*op) |
603 | { | |
604 | /* Any register operand. */ | |
605 | case 'w': | |
606 | case 'd': | |
607 | case 'r': | |
b170af93 DC |
608 | case 'a': |
609 | case 'v': | |
c6a7ab1f NC |
610 | if (*str == 'r' || *str == 'R') |
611 | { | |
612 | char r_name[20]; | |
1dab94dd | 613 | |
c6a7ab1f | 614 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 615 | op_mask = 0xff; |
3882b010 | 616 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
617 | { |
618 | if (r_name[2] == '\0') | |
619 | op_mask = r_name[1] - '0'; | |
620 | else if (r_name[1] != '0' | |
3882b010 | 621 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
622 | && r_name[3] == '\0') |
623 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
624 | } | |
625 | } | |
626 | else | |
627 | { | |
628 | op_mask = avr_get_constant (str, 31); | |
629 | str = input_line_pointer; | |
630 | } | |
1dab94dd | 631 | |
c6a7ab1f NC |
632 | if (op_mask <= 31) |
633 | { | |
634 | switch (*op) | |
635 | { | |
636 | case 'a': | |
637 | if (op_mask < 16 || op_mask > 23) | |
638 | as_bad (_("register r16-r23 required")); | |
639 | op_mask -= 16; | |
640 | break; | |
1dab94dd | 641 | |
c6a7ab1f NC |
642 | case 'd': |
643 | if (op_mask < 16) | |
644 | as_bad (_("register number above 15 required")); | |
645 | op_mask -= 16; | |
646 | break; | |
1dab94dd | 647 | |
c6a7ab1f NC |
648 | case 'v': |
649 | if (op_mask & 1) | |
650 | as_bad (_("even register number required")); | |
651 | op_mask >>= 1; | |
652 | break; | |
1dab94dd | 653 | |
c6a7ab1f | 654 | case 'w': |
65b1d096 | 655 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 656 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 657 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
658 | break; |
659 | } | |
660 | break; | |
661 | } | |
662 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
663 | break; |
664 | ||
665 | case 'e': | |
666 | { | |
667 | char c; | |
1dab94dd | 668 | |
adde6300 AM |
669 | if (*str == '-') |
670 | { | |
c6a7ab1f | 671 | str = skip_space (str + 1); |
adde6300 AM |
672 | op_mask = 0x1002; |
673 | } | |
3882b010 | 674 | c = TOLOWER (*str); |
adde6300 AM |
675 | if (c == 'x') |
676 | op_mask |= 0x100c; | |
677 | else if (c == 'y') | |
678 | op_mask |= 0x8; | |
679 | else if (c != 'z') | |
00d2865b | 680 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 681 | |
c6a7ab1f | 682 | str = skip_space (str + 1); |
adde6300 AM |
683 | if (*str == '+') |
684 | { | |
685 | ++str; | |
686 | if (op_mask & 2) | |
00d2865b | 687 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
688 | op_mask |= 0x1001; |
689 | } | |
e38c9cc2 | 690 | |
1188e082 | 691 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 692 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
693 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
694 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
695 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
696 | } |
697 | break; | |
698 | ||
b170af93 | 699 | case 'z': |
c6a7ab1f NC |
700 | if (*str == '-') |
701 | as_bad (_("can't predecrement")); | |
1dab94dd | 702 | |
c6a7ab1f NC |
703 | if (! (*str == 'z' || *str == 'Z')) |
704 | as_bad (_("pointer register Z required")); | |
1dab94dd | 705 | |
c6a7ab1f NC |
706 | str = skip_space (str + 1); |
707 | ||
708 | if (*str == '+') | |
709 | { | |
710 | ++str; | |
711 | op_mask |= 1; | |
712 | } | |
b170af93 DC |
713 | break; |
714 | ||
adde6300 AM |
715 | case 'b': |
716 | { | |
3882b010 | 717 | char c = TOLOWER (*str++); |
1dab94dd | 718 | |
adde6300 AM |
719 | if (c == 'y') |
720 | op_mask |= 0x8; | |
721 | else if (c != 'z') | |
00d2865b | 722 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
723 | str = skip_space (str); |
724 | if (*str++ == '+') | |
725 | { | |
750bce0e NC |
726 | input_line_pointer = str; |
727 | avr_offset_expression (& op_expr); | |
adde6300 | 728 | str = input_line_pointer; |
750bce0e NC |
729 | fix_new_exp (frag_now, where, 3, |
730 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
731 | } |
732 | } | |
733 | break; | |
734 | ||
735 | case 'h': | |
c6a7ab1f NC |
736 | str = parse_exp (str, &op_expr); |
737 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 738 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
739 | break; |
740 | ||
741 | case 'L': | |
c6a7ab1f NC |
742 | str = parse_exp (str, &op_expr); |
743 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 744 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
745 | break; |
746 | ||
747 | case 'l': | |
c6a7ab1f NC |
748 | str = parse_exp (str, &op_expr); |
749 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 750 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
751 | break; |
752 | ||
753 | case 'i': | |
c6a7ab1f NC |
754 | str = parse_exp (str, &op_expr); |
755 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 756 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
757 | break; |
758 | ||
759 | case 'M': | |
760 | { | |
761 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 762 | |
c6a7ab1f NC |
763 | input_line_pointer = str; |
764 | r_type = avr_ldi_expression (&op_expr); | |
765 | str = input_line_pointer; | |
adde6300 | 766 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 767 | &op_expr, FALSE, r_type); |
adde6300 AM |
768 | } |
769 | break; | |
770 | ||
771 | case 'n': | |
772 | { | |
773 | unsigned int x; | |
1dab94dd | 774 | |
adde6300 AM |
775 | x = ~avr_get_constant (str, 255); |
776 | str = input_line_pointer; | |
777 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
778 | } | |
779 | break; | |
780 | ||
781 | case 'K': | |
750bce0e NC |
782 | input_line_pointer = str; |
783 | avr_offset_expression (& op_expr); | |
784 | str = input_line_pointer; | |
785 | fix_new_exp (frag_now, where, 3, | |
786 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
787 | break; |
788 | ||
789 | case 'S': | |
790 | case 's': | |
791 | { | |
792 | unsigned int x; | |
1dab94dd | 793 | |
adde6300 AM |
794 | x = avr_get_constant (str, 7); |
795 | str = input_line_pointer; | |
796 | if (*op == 'S') | |
797 | x <<= 4; | |
798 | op_mask |= x; | |
799 | } | |
800 | break; | |
801 | ||
802 | case 'P': | |
803 | { | |
804 | unsigned int x; | |
1dab94dd | 805 | |
adde6300 AM |
806 | x = avr_get_constant (str, 63); |
807 | str = input_line_pointer; | |
808 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
809 | } | |
810 | break; | |
811 | ||
812 | case 'p': | |
813 | { | |
814 | unsigned int x; | |
1dab94dd | 815 | |
adde6300 AM |
816 | x = avr_get_constant (str, 31); |
817 | str = input_line_pointer; | |
818 | op_mask |= x << 3; | |
819 | } | |
820 | break; | |
1dab94dd | 821 | |
1188e082 DC |
822 | case '?': |
823 | break; | |
1dab94dd | 824 | |
adde6300 | 825 | default: |
00d2865b | 826 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 827 | } |
1dab94dd | 828 | |
adde6300 AM |
829 | *line = str; |
830 | return op_mask; | |
831 | } | |
832 | ||
dc191a8f NC |
833 | /* Parse instruction operands. |
834 | Return binary opcode. */ | |
835 | ||
836 | static unsigned int | |
837 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
838 | { | |
839 | char *op = opcode->constraints; | |
840 | unsigned int bin = opcode->bin_opcode; | |
841 | char *frag = frag_more (opcode->insn_size * 2); | |
842 | char *str = *line; | |
843 | int where = frag - frag_now->fr_literal; | |
844 | static unsigned int prev = 0; /* Previous opcode. */ | |
845 | ||
846 | /* Opcode have operands. */ | |
847 | if (*op) | |
848 | { | |
849 | unsigned int reg1 = 0; | |
850 | unsigned int reg2 = 0; | |
851 | int reg1_present = 0; | |
852 | int reg2_present = 0; | |
853 | ||
854 | /* Parse first operand. */ | |
855 | if (REGISTER_P (*op)) | |
856 | reg1_present = 1; | |
857 | reg1 = avr_operand (opcode, where, op, &str); | |
858 | ++op; | |
859 | ||
860 | /* Parse second operand. */ | |
861 | if (*op) | |
862 | { | |
863 | if (*op == ',') | |
864 | ++op; | |
865 | ||
866 | if (*op == '=') | |
867 | { | |
868 | reg2 = reg1; | |
869 | reg2_present = 1; | |
870 | } | |
871 | else | |
872 | { | |
873 | if (REGISTER_P (*op)) | |
874 | reg2_present = 1; | |
875 | ||
876 | str = skip_space (str); | |
877 | if (*str++ != ',') | |
878 | as_bad (_("`,' required")); | |
879 | str = skip_space (str); | |
880 | ||
881 | reg2 = avr_operand (opcode, where, op, &str); | |
882 | } | |
883 | ||
884 | if (reg1_present && reg2_present) | |
885 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
886 | else if (reg2_present) | |
887 | reg2 <<= 4; | |
888 | } | |
889 | if (reg1_present) | |
890 | reg1 <<= 4; | |
891 | bin |= reg1 | reg2; | |
892 | } | |
893 | ||
894 | /* Detect undefined combinations (like ld r31,Z+). */ | |
895 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
896 | as_warn (_("undefined combination of operands")); | |
897 | ||
898 | if (opcode->insn_size == 2) | |
899 | { | |
900 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
901 | (AVR core bug, fixed in the newer devices). */ | |
902 | if (!(avr_opt.no_skip_bug || | |
903 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
904 | && AVR_SKIP_P (prev)) | |
905 | as_warn (_("skipping two-word instruction")); | |
906 | ||
907 | bfd_putl32 ((bfd_vma) bin, frag); | |
908 | } | |
909 | else | |
910 | bfd_putl16 ((bfd_vma) bin, frag); | |
911 | ||
912 | prev = bin; | |
913 | *line = str; | |
914 | return bin; | |
915 | } | |
916 | ||
adde6300 AM |
917 | /* GAS will call this function for each section at the end of the assembly, |
918 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 919 | |
adde6300 | 920 | valueT |
dc191a8f | 921 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
922 | { |
923 | int align = bfd_get_section_alignment (stdoutput, seg); | |
924 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
925 | } | |
926 | ||
927 | /* If you define this macro, it should return the offset between the | |
928 | address of a PC relative fixup and the position from which the PC | |
929 | relative adjustment should be made. On many processors, the base | |
930 | of a PC relative instruction is the next instruction, so this | |
931 | macro would return the length of an instruction. */ | |
c6a7ab1f | 932 | |
adde6300 | 933 | long |
dc191a8f | 934 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 935 | { |
c6a7ab1f | 936 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
937 | && (!S_IS_DEFINED (fixp->fx_addsy) |
938 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
939 | return 0; | |
1dab94dd | 940 | |
adde6300 AM |
941 | return fixp->fx_frag->fr_address + fixp->fx_where; |
942 | } | |
943 | ||
944 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
945 | value in the object file. */ |
946 | ||
94f592af | 947 | void |
dc191a8f | 948 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
949 | { |
950 | unsigned char *where; | |
951 | unsigned long insn; | |
a161fe53 | 952 | long value = *valP; |
adde6300 | 953 | |
94f592af NC |
954 | if (fixP->fx_addsy == (symbolS *) NULL) |
955 | fixP->fx_done = 1; | |
956 | ||
87733541 AM |
957 | else if (fixP->fx_pcrel) |
958 | { | |
959 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
960 | ||
961 | if (s == seg || s == absolute_section) | |
962 | { | |
963 | value += S_GET_VALUE (fixP->fx_addsy); | |
964 | fixP->fx_done = 1; | |
965 | } | |
966 | } | |
967 | ||
a161fe53 AM |
968 | /* We don't actually support subtracting a symbol. */ |
969 | if (fixP->fx_subsy != (symbolS *) NULL) | |
970 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 971 | |
94f592af | 972 | switch (fixP->fx_r_type) |
adde6300 AM |
973 | { |
974 | default: | |
94f592af | 975 | fixP->fx_no_overflow = 1; |
adde6300 AM |
976 | break; |
977 | case BFD_RELOC_AVR_7_PCREL: | |
978 | case BFD_RELOC_AVR_13_PCREL: | |
979 | case BFD_RELOC_32: | |
980 | case BFD_RELOC_16: | |
981 | case BFD_RELOC_AVR_CALL: | |
982 | break; | |
983 | } | |
984 | ||
94f592af | 985 | if (fixP->fx_done) |
adde6300 AM |
986 | { |
987 | /* Fetch the instruction, insert the fully resolved operand | |
988 | value, and stuff the instruction back again. */ | |
2132e3a3 | 989 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
990 | insn = bfd_getl16 (where); |
991 | ||
94f592af | 992 | switch (fixP->fx_r_type) |
adde6300 AM |
993 | { |
994 | case BFD_RELOC_AVR_7_PCREL: | |
995 | if (value & 1) | |
94f592af | 996 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 997 | _("odd address operand: %ld"), value); |
1dab94dd | 998 | |
adde6300 AM |
999 | /* Instruction addresses are always right-shifted by 1. */ |
1000 | value >>= 1; | |
1001 | --value; /* Correct PC. */ | |
1dab94dd | 1002 | |
adde6300 | 1003 | if (value < -64 || value > 63) |
94f592af | 1004 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1005 | _("operand out of range: %ld"), value); |
1006 | value = (value << 3) & 0x3f8; | |
1007 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1008 | break; | |
1009 | ||
1010 | case BFD_RELOC_AVR_13_PCREL: | |
1011 | if (value & 1) | |
94f592af | 1012 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1013 | _("odd address operand: %ld"), value); |
1dab94dd | 1014 | |
adde6300 AM |
1015 | /* Instruction addresses are always right-shifted by 1. */ |
1016 | value >>= 1; | |
1017 | --value; /* Correct PC. */ | |
adde6300 AM |
1018 | |
1019 | if (value < -2048 || value > 2047) | |
1020 | { | |
65aa24b6 | 1021 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1022 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1023 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1024 | _("operand out of range: %ld"), value); |
1025 | } | |
1026 | ||
1027 | value &= 0xfff; | |
1028 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1029 | break; | |
1030 | ||
1031 | case BFD_RELOC_32: | |
1032 | bfd_putl16 ((bfd_vma) value, where); | |
1033 | break; | |
1034 | ||
1035 | case BFD_RELOC_16: | |
1036 | bfd_putl16 ((bfd_vma) value, where); | |
1037 | break; | |
1038 | ||
1039 | case BFD_RELOC_AVR_16_PM: | |
c6a7ab1f | 1040 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1041 | break; |
1042 | ||
750bce0e NC |
1043 | case BFD_RELOC_AVR_LDI: |
1044 | if (value > 255) | |
1045 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1046 | _("operand out of range: %ld"), value); | |
1047 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1048 | break; | |
1049 | ||
1050 | case BFD_RELOC_AVR_6: | |
1051 | if ((value > 63) || (value < 0)) | |
1052 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1053 | _("operand out of range: %ld"), value); | |
1054 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1055 | break; | |
1056 | ||
1057 | case BFD_RELOC_AVR_6_ADIW: | |
1058 | if ((value > 63) || (value < 0)) | |
1059 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1060 | _("operand out of range: %ld"), value); | |
1061 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1062 | break; | |
1063 | ||
adde6300 AM |
1064 | case BFD_RELOC_AVR_LO8_LDI: |
1065 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1066 | break; | |
1067 | ||
1068 | case -BFD_RELOC_AVR_LO8_LDI: | |
1069 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1070 | break; | |
1071 | ||
1072 | case BFD_RELOC_AVR_HI8_LDI: | |
1073 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1074 | break; | |
1075 | ||
1076 | case -BFD_RELOC_AVR_HI8_LDI: | |
1077 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); | |
1078 | break; | |
1079 | ||
1080 | case BFD_RELOC_AVR_HH8_LDI: | |
1081 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1082 | break; | |
1083 | ||
1084 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1085 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1086 | break; | |
1087 | ||
1088 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1089 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1090 | break; | |
1091 | ||
1092 | case BFD_RELOC_AVR_HI8_LDI_NEG: | |
1093 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1094 | break; | |
1095 | ||
1096 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1097 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); | |
1098 | break; | |
1099 | ||
1100 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1101 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1102 | break; | |
1103 | ||
1104 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1105 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1106 | break; | |
1107 | ||
1108 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1109 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1110 | break; | |
1111 | ||
1112 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1113 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1114 | break; | |
1115 | ||
1116 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1117 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1118 | break; | |
1119 | ||
1120 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1121 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1122 | break; | |
1123 | ||
1124 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1125 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1126 | break; | |
1127 | ||
1128 | case BFD_RELOC_AVR_CALL: | |
1129 | { | |
1130 | unsigned long x; | |
1dab94dd | 1131 | |
adde6300 AM |
1132 | x = bfd_getl16 (where); |
1133 | if (value & 1) | |
94f592af | 1134 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1135 | _("odd address operand: %ld"), value); |
1136 | value >>= 1; | |
1137 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1138 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1139 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1140 | } |
1141 | break; | |
1142 | ||
1143 | default: | |
c6a7ab1f | 1144 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1145 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1146 | break; |
1147 | } | |
1148 | } | |
1149 | else | |
1150 | { | |
94f592af | 1151 | switch (fixP->fx_r_type) |
adde6300 AM |
1152 | { |
1153 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1154 | case -BFD_RELOC_AVR_HI8_LDI: | |
1155 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1156 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1157 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1158 | _("only constant expression allowed")); |
94f592af | 1159 | fixP->fx_done = 1; |
adde6300 AM |
1160 | break; |
1161 | default: | |
1162 | break; | |
1163 | } | |
adde6300 | 1164 | } |
adde6300 AM |
1165 | } |
1166 | ||
7be1c489 AM |
1167 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1168 | to `bfd_install_relocation'. This currently works poorly, as | |
1169 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1170 | `tc_gen_reloc' have been written to work around the problems, which | |
1171 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1172 | |
1173 | /* If while processing a fixup, a reloc really needs to be created | |
1174 | then it is done here. */ | |
1175 | ||
1176 | arelent * | |
dc191a8f NC |
1177 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1178 | fixS *fixp) | |
adde6300 AM |
1179 | { |
1180 | arelent *reloc; | |
1181 | ||
dc191a8f | 1182 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1183 | |
dc191a8f | 1184 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1185 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1186 | ||
1187 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1188 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1189 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1190 | { | |
1191 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1192 | _("reloc %d not supported by object file format"), |
1193 | (int) fixp->fx_r_type); | |
adde6300 AM |
1194 | return NULL; |
1195 | } | |
1196 | ||
1197 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1198 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1199 | reloc->address = fixp->fx_offset; | |
1200 | ||
1201 | reloc->addend = fixp->fx_offset; | |
1202 | ||
1203 | return reloc; | |
1204 | } | |
1205 | ||
adde6300 | 1206 | void |
dc191a8f | 1207 | md_assemble (char *str) |
adde6300 | 1208 | { |
c6a7ab1f | 1209 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1210 | char op[11]; |
1211 | ||
c6a7ab1f | 1212 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1213 | |
1214 | if (!op[0]) | |
00d2865b | 1215 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1216 | |
1217 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1218 | ||
1219 | if (opcode == NULL) | |
1220 | { | |
00d2865b | 1221 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1222 | return; |
1223 | } | |
1224 | ||
b170af93 | 1225 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1226 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1227 | |
1188e082 DC |
1228 | if (*str && *opcode->constraints == '?') |
1229 | ++opcode; | |
b170af93 | 1230 | |
00d2865b NC |
1231 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1232 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 AM |
1233 | |
1234 | /* We used to set input_line_pointer to the result of get_operands, | |
1235 | but that is wrong. Our caller assumes we don't change it. */ | |
1236 | { | |
1237 | char *t = input_line_pointer; | |
dc191a8f | 1238 | |
adde6300 | 1239 | avr_operands (opcode, &str); |
b170af93 | 1240 | if (*skip_space (str)) |
00d2865b | 1241 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1242 | input_line_pointer = t; |
1243 | } | |
1244 | } | |
1245 | ||
adde6300 | 1246 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and |
c6a7ab1f | 1247 | `avr_cons_fix_new'. */ |
adde6300 AM |
1248 | static int exp_mod_pm = 0; |
1249 | ||
1250 | /* Parse special CONS expression: pm (expression) | |
1251 | which is used for addressing to a program memory. | |
c6a7ab1f NC |
1252 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1253 | ||
adde6300 | 1254 | void |
dc191a8f | 1255 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1256 | { |
c6a7ab1f | 1257 | char *tmp; |
adde6300 AM |
1258 | |
1259 | exp_mod_pm = 0; | |
1260 | ||
1261 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1262 | ||
1263 | if (nbytes == 2) | |
1264 | { | |
c6a7ab1f | 1265 | char *pm_name = "pm"; |
adde6300 | 1266 | int len = strlen (pm_name); |
1dab94dd | 1267 | |
adde6300 AM |
1268 | if (strncasecmp (input_line_pointer, pm_name, len) == 0) |
1269 | { | |
1270 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1271 | |
adde6300 AM |
1272 | if (*input_line_pointer == '(') |
1273 | { | |
1274 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1275 | exp_mod_pm = 1; | |
1276 | expression (exp); | |
1dab94dd | 1277 | |
adde6300 AM |
1278 | if (*input_line_pointer == ')') |
1279 | ++input_line_pointer; | |
1280 | else | |
1281 | { | |
00d2865b | 1282 | as_bad (_("`)' required")); |
adde6300 AM |
1283 | exp_mod_pm = 0; |
1284 | } | |
1dab94dd | 1285 | |
adde6300 AM |
1286 | return; |
1287 | } | |
1dab94dd | 1288 | |
adde6300 AM |
1289 | input_line_pointer = tmp; |
1290 | } | |
1291 | } | |
1dab94dd | 1292 | |
adde6300 AM |
1293 | expression (exp); |
1294 | } | |
1295 | ||
1296 | void | |
dc191a8f NC |
1297 | avr_cons_fix_new (fragS *frag, |
1298 | int where, | |
1299 | int nbytes, | |
1300 | expressionS *exp) | |
adde6300 AM |
1301 | { |
1302 | if (exp_mod_pm == 0) | |
1303 | { | |
1304 | if (nbytes == 2) | |
b34976b6 | 1305 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1306 | else if (nbytes == 4) |
b34976b6 | 1307 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1308 | else |
00d2865b | 1309 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1310 | } |
1311 | else | |
1312 | { | |
1313 | if (nbytes == 2) | |
b34976b6 | 1314 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); |
adde6300 | 1315 | else |
00d2865b | 1316 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1317 | exp_mod_pm = 0; |
1318 | } | |
1319 | } |