Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
3 | Copyright (C) 1999, 2000 Free Software Foundation, Inc. | |
4 | Contributed by Denis Chertykov <denisc@overta.ru> | |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include <stdio.h> | |
24 | #include <ctype.h> | |
25 | #include "as.h" | |
26 | #include "subsegs.h" | |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
30 | char *name; | |
31 | char *constraints; | |
32 | int insn_size; /* in words */ | |
33 | int isa; | |
34 | unsigned int bin_opcode; | |
35 | }; | |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
46 | ||
adde6300 AM |
47 | const char comment_chars[] = ";"; |
48 | const char line_comment_chars[] = "#"; | |
49 | const char line_separator_chars[] = "$"; | |
50 | ||
adde6300 AM |
51 | const char *md_shortopts = "m:"; |
52 | struct mcu_type_s | |
53 | { | |
54 | char *name; | |
55 | int isa; | |
56 | int mach; | |
57 | }; | |
58 | ||
59 | static struct mcu_type_s mcu_types[] = | |
60 | { | |
b170af93 | 61 | {"avr1", AVR_ISA_TINY1, bfd_mach_avr1}, |
65aa24b6 | 62 | {"avr2", AVR_ISA_2xxx, bfd_mach_avr2}, |
b170af93 | 63 | {"avr3", AVR_ISA_M103, bfd_mach_avr3}, |
65aa24b6 NC |
64 | {"avr4", AVR_ISA_M83, bfd_mach_avr4}, |
65 | {"avr5", AVR_ISA_ALL, bfd_mach_avr5}, | |
adde6300 | 66 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
b170af93 DC |
67 | {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, |
68 | {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1}, | |
69 | {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1}, | |
70 | {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1}, | |
71 | {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1}, | |
adde6300 AM |
72 | {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2}, |
73 | {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2}, | |
74 | {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, | |
75 | {"attiny22" , AVR_ISA_2xxx, bfd_mach_avr2}, | |
76 | {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2}, | |
77 | {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2}, | |
78 | {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, | |
79 | {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, | |
65aa24b6 NC |
80 | {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2}, |
81 | {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2}, | |
82 | {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2}, | |
b170af93 DC |
83 | {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, |
84 | {"atmega103", AVR_ISA_M103, bfd_mach_avr3}, | |
65aa24b6 NC |
85 | {"atmega83", AVR_ISA_M83, bfd_mach_avr4}, |
86 | {"atmega85", AVR_ISA_M83, bfd_mach_avr4}, | |
87 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, | |
88 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, | |
89 | {"atmega32", AVR_ISA_M161, bfd_mach_avr5}, | |
90 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, | |
adde6300 AM |
91 | {NULL, 0, 0} |
92 | }; | |
93 | ||
94 | ||
95 | /* Current MCU type. */ | |
96 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2}; | |
97 | static struct mcu_type_s *avr_mcu = &default_mcu; | |
98 | ||
00d2865b NC |
99 | /* AVR target-specific switches. */ |
100 | struct avr_opt_s | |
101 | { | |
102 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */ | |
103 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */ | |
104 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */ | |
105 | }; | |
106 | ||
107 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
108 | ||
adde6300 AM |
109 | const char EXP_CHARS[] = "eE"; |
110 | const char FLT_CHARS[] = "dD"; | |
111 | static void avr_set_arch (int dummy); | |
112 | ||
113 | /* The target specific pseudo-ops which we support. */ | |
114 | const pseudo_typeS md_pseudo_table[] = | |
115 | { | |
116 | {"arch", avr_set_arch, 0}, | |
117 | { NULL, NULL, 0} | |
118 | }; | |
119 | ||
120 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 121 | |
00d2865b | 122 | static void show_mcu_list (FILE *stream); |
adde6300 AM |
123 | static char * skip_space (char * s); |
124 | static char * extract_word (char *from, char *to, int limit); | |
125 | static unsigned int avr_operand (struct avr_opcodes_s *opcode, | |
126 | int where, char *op, char **line); | |
127 | static unsigned int avr_operands (struct avr_opcodes_s *opcode, char **line); | |
df136245 | 128 | static unsigned int avr_get_constant (char * str, int max); |
adde6300 AM |
129 | static char *parse_exp (char *s, expressionS * op); |
130 | static bfd_reloc_code_real_type avr_ldi_expression (expressionS *exp); | |
131 | long md_pcrel_from_section PARAMS ((fixS *, segT)); | |
132 | ||
b170af93 | 133 | |
adde6300 AM |
134 | #define EXP_MOD_NAME(i) exp_mod[i].name |
135 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
136 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
137 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
138 | ||
139 | struct exp_mod_s | |
140 | { | |
141 | char * name; | |
142 | bfd_reloc_code_real_type reloc; | |
143 | bfd_reloc_code_real_type neg_reloc; | |
144 | int have_pm; | |
145 | }; | |
146 | ||
147 | static struct exp_mod_s exp_mod[] = { | |
148 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, | |
149 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
150 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
151 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
152 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
153 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
154 | {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0}, | |
155 | {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0}, | |
156 | }; | |
157 | ||
158 | /* Opcode hash table. */ | |
159 | static struct hash_control *avr_hash; | |
160 | ||
161 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
162 | static struct hash_control *avr_mod_hash; | |
163 | ||
00d2865b NC |
164 | #define OPTION_MMCU 'm' |
165 | #define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1) | |
166 | #define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2) | |
167 | #define OPTION_NO_WRAP (OPTION_MD_BASE + 3) | |
adde6300 AM |
168 | |
169 | struct option md_longopts[] = { | |
00d2865b NC |
170 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
171 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
172 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
173 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
174 | { NULL, no_argument, NULL, 0 } | |
adde6300 AM |
175 | }; |
176 | size_t md_longopts_size = sizeof(md_longopts); | |
177 | ||
00d2865b NC |
178 | |
179 | /* Display nicely formatted list of known MCU names. */ | |
180 | static void | |
181 | show_mcu_list (FILE *stream) | |
182 | { | |
183 | int i, x; | |
184 | ||
185 | fprintf (stream, _("Known MCU names:")); | |
186 | x = 1000; | |
187 | for (i = 0; mcu_types[i].name; i++) | |
188 | { | |
189 | int len = strlen (mcu_types[i].name); | |
190 | x += len + 1; | |
191 | if (x < 75) | |
192 | { | |
193 | fprintf (stream, " %s", mcu_types[i].name); | |
194 | } | |
195 | else | |
196 | { | |
197 | fprintf (stream, "\n %s", mcu_types[i].name); | |
198 | x = len + 2; | |
199 | } | |
200 | } | |
201 | fprintf (stream, "\n"); | |
202 | } | |
203 | ||
204 | ||
adde6300 AM |
205 | static inline char * |
206 | skip_space (s) | |
207 | char * s; | |
208 | { | |
209 | while (*s == ' ' || *s == '\t') | |
210 | ++s; | |
211 | return s; | |
212 | } | |
213 | ||
214 | /* Extract one word from FROM and copy it to TO. */ | |
215 | static char * | |
216 | extract_word (char *from, char *to, int limit) | |
217 | { | |
218 | char *op_start; | |
219 | char *op_end; | |
220 | int size = 0; | |
221 | ||
222 | /* Drop leading whitespace. */ | |
223 | from = skip_space (from); | |
224 | *to = 0; | |
225 | /* Find the op code end. */ | |
226 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name(*op_end); ) | |
227 | { | |
228 | to[size++] = *op_end++; | |
229 | if (size + 1 >= limit) | |
230 | break; | |
231 | } | |
232 | to[size] = 0; | |
233 | return op_end; | |
234 | } | |
235 | ||
236 | int | |
237 | md_estimate_size_before_relax (fragp, seg) | |
df136245 DC |
238 | fragS *fragp ATTRIBUTE_UNUSED; |
239 | asection *seg ATTRIBUTE_UNUSED; | |
adde6300 AM |
240 | { |
241 | abort (); | |
242 | return 0; | |
243 | } | |
244 | ||
245 | void | |
246 | md_show_usage (stream) | |
247 | FILE *stream; | |
248 | { | |
00d2865b NC |
249 | fprintf (stream, |
250 | _("AVR options:\n" | |
adde6300 AM |
251 | " -mmcu=[avr-name] select microcontroller variant\n" |
252 | " [avr-name] can be:\n" | |
65aa24b6 NC |
253 | " avr1 - AT90S1200, ATtiny1x, ATtiny28\n" |
254 | " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n" | |
255 | " avr3 - ATmega103, ATmega603\n" | |
256 | " avr4 - ATmega83, ATmega85\n" | |
257 | " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n" | |
adde6300 | 258 | " or immediate microcontroller name.\n")); |
00d2865b NC |
259 | fprintf (stream, |
260 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
261 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
262 | " (default for avr4, avr5)\n" | |
263 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
264 | " (default for avr3, avr5)\n")); | |
265 | show_mcu_list (stream); | |
adde6300 AM |
266 | } |
267 | ||
268 | static void | |
269 | avr_set_arch (dummy) | |
df136245 | 270 | int dummy ATTRIBUTE_UNUSED; |
adde6300 AM |
271 | { |
272 | char * str; | |
273 | str = (char *)alloca (20); | |
274 | input_line_pointer = extract_word (input_line_pointer, str, 20); | |
00d2865b | 275 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
276 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
277 | } | |
278 | ||
279 | int | |
280 | md_parse_option (c, arg) | |
281 | int c; | |
282 | char *arg; | |
283 | { | |
00d2865b | 284 | switch (c) |
adde6300 | 285 | { |
00d2865b NC |
286 | case OPTION_MMCU: |
287 | { | |
288 | int i; | |
289 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 290 | |
00d2865b NC |
291 | { |
292 | char *t = s; | |
293 | char *arg1 = arg; | |
294 | ||
295 | do | |
296 | *t = tolower(*arg1++); | |
297 | while (*t++); | |
298 | } | |
299 | ||
300 | for (i = 0; mcu_types[i].name; ++i) | |
301 | if (strcmp (mcu_types[i].name, s) == 0) | |
302 | break; | |
adde6300 | 303 | |
00d2865b NC |
304 | if (!mcu_types[i].name) |
305 | { | |
306 | show_mcu_list (stderr); | |
307 | as_fatal (_("unknown MCU: %s\n"), arg); | |
308 | } | |
65aa24b6 | 309 | |
00d2865b NC |
310 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
311 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
312 | as .arch ... in the asm output at the same time. */ | |
65aa24b6 | 313 | |
00d2865b NC |
314 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
315 | avr_mcu = &mcu_types[i]; | |
316 | else | |
317 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
318 | avr_mcu->name, mcu_types[i].name); | |
319 | return 1; | |
320 | } | |
321 | case OPTION_ALL_OPCODES: | |
322 | avr_opt.all_opcodes = 1; | |
323 | return 1; | |
324 | case OPTION_NO_SKIP_BUG: | |
325 | avr_opt.no_skip_bug = 1; | |
326 | return 1; | |
327 | case OPTION_NO_WRAP: | |
328 | avr_opt.no_wrap = 1; | |
adde6300 AM |
329 | return 1; |
330 | } | |
331 | return 0; | |
332 | } | |
333 | ||
334 | symbolS * | |
b170af93 | 335 | md_undefined_symbol(name) |
df136245 | 336 | char *name ATTRIBUTE_UNUSED; |
adde6300 AM |
337 | { |
338 | return 0; | |
339 | } | |
340 | ||
341 | /* Convert a string pointed to by input_line_pointer into a floating point | |
342 | constant of type `type', and store the appropriate bytes to `*litP'. | |
343 | The number of LITTLENUMS emitted is stored in `*sizeP'. Returns NULL if | |
344 | OK, or an error message otherwise. */ | |
345 | char * | |
346 | md_atof (type, litP, sizeP) | |
347 | int type; | |
348 | char *litP; | |
349 | int *sizeP; | |
350 | { | |
351 | int prec; | |
352 | LITTLENUM_TYPE words[4]; | |
353 | LITTLENUM_TYPE *wordP; | |
354 | char *t; | |
355 | ||
356 | switch (type) | |
357 | { | |
358 | case 'f': | |
359 | prec = 2; | |
360 | break; | |
361 | case 'd': | |
362 | prec = 4; | |
363 | break; | |
364 | default: | |
365 | *sizeP = 0; | |
366 | return _("bad call to md_atof"); | |
367 | } | |
368 | ||
369 | t = atof_ieee (input_line_pointer, type, words); | |
370 | if (t) | |
371 | input_line_pointer = t; | |
372 | ||
373 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
374 | /* This loop outputs the LITTLENUMs in REVERSE order. */ | |
375 | for (wordP = words + prec - 1; prec--;) | |
376 | { | |
377 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); | |
378 | litP += sizeof (LITTLENUM_TYPE); | |
379 | } | |
380 | return NULL; | |
381 | } | |
382 | ||
383 | void | |
384 | md_convert_frag (abfd, sec, fragP) | |
df136245 DC |
385 | bfd *abfd ATTRIBUTE_UNUSED; |
386 | asection *sec ATTRIBUTE_UNUSED; | |
387 | fragS *fragP ATTRIBUTE_UNUSED; | |
adde6300 AM |
388 | { |
389 | abort (); | |
390 | } | |
391 | ||
392 | ||
393 | void | |
394 | md_begin () | |
395 | { | |
df136245 | 396 | unsigned int i; |
adde6300 AM |
397 | struct avr_opcodes_s *opcode; |
398 | avr_hash = hash_new(); | |
399 | ||
400 | /* Insert unique names into hash table. This hash table then provides a | |
401 | quick index to the first opcode with a particular name in the opcode | |
402 | table. */ | |
403 | ||
404 | for (opcode = avr_opcodes; opcode->name; opcode++) | |
405 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
406 | ||
407 | avr_mod_hash = hash_new (); | |
408 | ||
409 | for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i) | |
410 | hash_insert (avr_mod_hash, EXP_MOD_NAME(i), (void*)(i+10)); | |
b170af93 | 411 | |
adde6300 AM |
412 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
413 | } | |
414 | ||
415 | ||
df136245 DC |
416 | /* Resolve STR as a constant expression and return the result. |
417 | If result greater than MAX then error. */ | |
418 | ||
419 | static unsigned int | |
420 | avr_get_constant (str, max) | |
421 | char * str; | |
422 | int max; | |
423 | { | |
424 | expressionS ex; | |
425 | str = skip_space (str); | |
426 | input_line_pointer = str; | |
427 | expression (&ex); | |
428 | ||
429 | if (ex.X_op != O_constant) | |
430 | as_bad (_("constant value required")); | |
431 | ||
432 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
433 | as_bad (_("number must be less than %d"), max+1); | |
434 | return ex.X_add_number; | |
435 | } | |
436 | ||
437 | ||
438 | /* Parse instruction operands. | |
439 | Returns binary opcode. */ | |
440 | ||
adde6300 AM |
441 | static unsigned int |
442 | avr_operands (opcode, line) | |
443 | struct avr_opcodes_s *opcode; | |
444 | char **line; | |
445 | { | |
446 | char *op = opcode->constraints; | |
447 | unsigned int bin = opcode->bin_opcode; | |
448 | char *frag = frag_more (opcode->insn_size * 2); | |
449 | char *str = *line; | |
450 | int where = frag - frag_now->fr_literal; | |
b170af93 | 451 | static unsigned int prev = 0; /* previous opcode */ |
adde6300 AM |
452 | |
453 | /* Opcode have operands. */ | |
454 | if (*op) | |
455 | { | |
456 | unsigned int reg1 = 0; | |
457 | unsigned int reg2 = 0; | |
458 | int reg1_present = 0; | |
459 | int reg2_present = 0; | |
460 | ||
461 | /* Parse first operand. */ | |
462 | if (REGISTER_P (*op)) | |
463 | reg1_present = 1; | |
464 | reg1 = avr_operand (opcode, where, op, &str); | |
465 | ++op; | |
466 | ||
467 | /* Parse second operand. */ | |
468 | if (*op) | |
469 | { | |
470 | if (*op == ',') | |
471 | ++op; | |
472 | if (*op == '=') | |
473 | { | |
474 | reg2 = reg1; | |
475 | reg2_present = 1; | |
476 | } | |
477 | else | |
478 | { | |
479 | if (REGISTER_P (*op)) | |
480 | reg2_present = 1; | |
481 | ||
482 | str = skip_space (str); | |
483 | if (*str++ != ',') | |
00d2865b | 484 | as_bad (_("`,' required")); |
adde6300 AM |
485 | str = skip_space (str); |
486 | ||
487 | reg2 = avr_operand (opcode, where, op, &str); | |
488 | ||
489 | } | |
490 | if (reg1_present && reg2_present) | |
491 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
492 | else if (reg2_present) | |
493 | reg2 <<= 4; | |
494 | } | |
495 | if (reg1_present) | |
496 | reg1 <<= 4; | |
497 | bin |= reg1 | reg2; | |
498 | } | |
b170af93 | 499 | |
00d2865b NC |
500 | if (!avr_opt.all_opcodes) |
501 | { | |
502 | /* Detect undefined combinations (like ld r31,Z+). */ | |
503 | if (((bin & 0xFDEF) == 0x91AD) || ((bin & 0xFDEF) == 0x91AE) || | |
504 | ((bin & 0xFDEF) == 0x91C9) || ((bin & 0xFDEF) == 0x91CA) || | |
505 | ((bin & 0xFDEF) == 0x91E1) || ((bin & 0xFDEF) == 0x91E2) || | |
506 | ((bin & 0xFFED) == 0x91E5)) | |
507 | as_warn (_("undefined combination of operands")); | |
508 | } | |
509 | ||
adde6300 AM |
510 | if (opcode->insn_size == 2) |
511 | { | |
00d2865b NC |
512 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs |
513 | (AVR core bug, fixed in the newer devices). */ | |
514 | ||
515 | if (!((avr_mcu->isa & AVR_ISA_MUL) || avr_opt.no_skip_bug)) | |
516 | { | |
517 | if ((prev & 0xFC00) == 0x1000 | |
518 | || (prev & 0xFD00) == 0x9900 | |
519 | || (prev & 0xFC08) == 0xFC00) | |
520 | as_warn (_("skipping two-word instruction")); | |
521 | } | |
522 | ||
adde6300 AM |
523 | bfd_putl32 ((bfd_vma)bin, frag); |
524 | } | |
525 | else | |
b170af93 DC |
526 | bfd_putl16 ((bfd_vma)bin, frag); |
527 | ||
528 | prev = bin; | |
adde6300 AM |
529 | *line = str; |
530 | return bin; | |
531 | } | |
532 | ||
adde6300 | 533 | |
df136245 DC |
534 | /* Parse one instruction operand. |
535 | Returns operand bitmask. Also fixups can be generated. */ | |
536 | ||
adde6300 AM |
537 | static unsigned int |
538 | avr_operand (opcode, where, op, line) | |
539 | struct avr_opcodes_s *opcode; | |
540 | int where; | |
541 | char *op; | |
542 | char **line; | |
543 | { | |
adde6300 | 544 | expressionS op_expr; |
df136245 DC |
545 | unsigned int op_mask = 0; |
546 | char *str = skip_space (*line); | |
adde6300 | 547 | |
adde6300 AM |
548 | switch (*op) |
549 | { | |
550 | /* Any register operand. */ | |
551 | case 'w': | |
552 | case 'd': | |
553 | case 'r': | |
b170af93 DC |
554 | case 'a': |
555 | case 'v': | |
adde6300 | 556 | { |
b170af93 DC |
557 | op_mask = -1; |
558 | ||
df136245 DC |
559 | if (*str == 'r' || *str == 'R') |
560 | { | |
561 | char r_name[20]; | |
562 | ||
563 | str = extract_word (str, r_name, sizeof (r_name)); | |
b170af93 DC |
564 | if (isdigit(r_name[1])) |
565 | { | |
566 | if (r_name[2] == '\0') | |
567 | op_mask = r_name[1] - '0'; | |
568 | else if (r_name[1] != '0' | |
569 | && isdigit(r_name[2]) | |
570 | && r_name[3] == '\0') | |
571 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
572 | } | |
573 | } | |
574 | else | |
575 | { | |
df136245 DC |
576 | op_mask = avr_get_constant (str, 31); |
577 | str = input_line_pointer; | |
b170af93 DC |
578 | } |
579 | ||
df136245 | 580 | if (op_mask <= 31) |
adde6300 | 581 | { |
b170af93 | 582 | switch (*op) |
adde6300 | 583 | { |
b170af93 DC |
584 | case 'a': |
585 | if (op_mask < 16 || op_mask > 23) | |
00d2865b | 586 | as_bad (_("register r16-r23 required")); |
b170af93 DC |
587 | op_mask -= 16; |
588 | break; | |
589 | ||
590 | case 'd': | |
591 | if (op_mask < 16) | |
00d2865b | 592 | as_bad (_("register number above 15 required")); |
b170af93 DC |
593 | op_mask -= 16; |
594 | break; | |
595 | ||
596 | case 'v': | |
597 | if (op_mask & 1) | |
00d2865b | 598 | as_bad (_("even register number required")); |
b170af93 DC |
599 | op_mask >>= 1; |
600 | break; | |
601 | ||
602 | case 'w': | |
603 | op_mask -= 24; | |
604 | if (op_mask & 1 || op_mask > 6) | |
00d2865b | 605 | as_bad (_("register r24, r26, r28 or r30 required")); |
b170af93 | 606 | op_mask >>= 1; |
adde6300 AM |
607 | break; |
608 | } | |
b170af93 | 609 | break; |
adde6300 | 610 | } |
00d2865b | 611 | as_bad (_("register name or number from 0 to 31 required")); |
adde6300 AM |
612 | } |
613 | break; | |
614 | ||
615 | case 'e': | |
616 | { | |
617 | char c; | |
618 | if (*str == '-') | |
619 | { | |
620 | str = skip_space (str+1); | |
621 | op_mask = 0x1002; | |
622 | } | |
623 | c = tolower (*str); | |
624 | if (c == 'x') | |
625 | op_mask |= 0x100c; | |
626 | else if (c == 'y') | |
627 | op_mask |= 0x8; | |
628 | else if (c != 'z') | |
00d2865b | 629 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 AM |
630 | |
631 | str = skip_space (str+1); | |
632 | if (*str == '+') | |
633 | { | |
634 | ++str; | |
635 | if (op_mask & 2) | |
00d2865b | 636 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
637 | op_mask |= 0x1001; |
638 | } | |
e38c9cc2 | 639 | |
1188e082 | 640 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 DC |
641 | registers, no predecrement, no postincrement. */ |
642 | ||
00d2865b NC |
643 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
644 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
645 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
646 | } |
647 | break; | |
648 | ||
b170af93 DC |
649 | case 'z': |
650 | { | |
651 | if (*str == '-') | |
00d2865b | 652 | as_bad (_("can't predecrement")); |
b170af93 DC |
653 | |
654 | if (! (*str == 'z' || *str == 'Z')) | |
00d2865b | 655 | as_bad (_("pointer register Z required")); |
b170af93 DC |
656 | |
657 | str = skip_space (str + 1); | |
658 | if (*str == '+') | |
659 | { | |
660 | ++str; | |
661 | op_mask |= 1; | |
662 | } | |
663 | } | |
664 | break; | |
665 | ||
adde6300 AM |
666 | case 'b': |
667 | { | |
668 | char c = tolower (*str++); | |
669 | if (c == 'y') | |
670 | op_mask |= 0x8; | |
671 | else if (c != 'z') | |
00d2865b | 672 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
673 | str = skip_space (str); |
674 | if (*str++ == '+') | |
675 | { | |
676 | unsigned int x; | |
677 | x = avr_get_constant (str, 63); | |
678 | str = input_line_pointer; | |
679 | op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8); | |
680 | } | |
681 | } | |
682 | break; | |
683 | ||
684 | case 'h': | |
685 | { | |
686 | str = parse_exp (str, &op_expr); | |
687 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
688 | &op_expr, false, BFD_RELOC_AVR_CALL); | |
689 | ||
690 | } | |
691 | break; | |
692 | ||
693 | case 'L': | |
694 | { | |
695 | str = parse_exp (str, &op_expr); | |
696 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
697 | &op_expr, true, BFD_RELOC_AVR_13_PCREL); | |
698 | ||
699 | } | |
700 | break; | |
701 | ||
702 | case 'l': | |
703 | { | |
704 | str = parse_exp (str, &op_expr); | |
705 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
706 | &op_expr, true, BFD_RELOC_AVR_7_PCREL); | |
707 | ||
708 | } | |
709 | break; | |
710 | ||
711 | case 'i': | |
712 | { | |
713 | str = parse_exp (str, &op_expr); | |
714 | fix_new_exp (frag_now, where+2, opcode->insn_size * 2, | |
715 | &op_expr, false, BFD_RELOC_16); | |
716 | ||
717 | } | |
718 | break; | |
719 | ||
720 | case 'M': | |
721 | { | |
722 | bfd_reloc_code_real_type r_type; | |
723 | input_line_pointer = str; | |
724 | r_type = avr_ldi_expression (&op_expr); | |
725 | str = input_line_pointer; | |
726 | fix_new_exp (frag_now, where, 3, | |
727 | &op_expr, false, r_type); | |
728 | } | |
729 | break; | |
730 | ||
731 | case 'n': | |
732 | { | |
733 | unsigned int x; | |
734 | x = ~avr_get_constant (str, 255); | |
735 | str = input_line_pointer; | |
736 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
737 | } | |
738 | break; | |
739 | ||
740 | case 'K': | |
741 | { | |
742 | unsigned int x; | |
743 | x = avr_get_constant (str, 63); | |
744 | str = input_line_pointer; | |
745 | op_mask |= (x & 0xf) | ((x & 0x30) << 2); | |
746 | } | |
747 | break; | |
748 | ||
749 | case 'S': | |
750 | case 's': | |
751 | { | |
752 | unsigned int x; | |
753 | x = avr_get_constant (str, 7); | |
754 | str = input_line_pointer; | |
755 | if (*op == 'S') | |
756 | x <<= 4; | |
757 | op_mask |= x; | |
758 | } | |
759 | break; | |
760 | ||
761 | case 'P': | |
762 | { | |
763 | unsigned int x; | |
764 | x = avr_get_constant (str, 63); | |
765 | str = input_line_pointer; | |
766 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
767 | } | |
768 | break; | |
769 | ||
770 | case 'p': | |
771 | { | |
772 | unsigned int x; | |
773 | x = avr_get_constant (str, 31); | |
774 | str = input_line_pointer; | |
775 | op_mask |= x << 3; | |
776 | } | |
777 | break; | |
1188e082 DC |
778 | case '?': |
779 | break; | |
adde6300 | 780 | default: |
00d2865b | 781 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 AM |
782 | } |
783 | *line = str; | |
784 | return op_mask; | |
785 | } | |
786 | ||
787 | /* GAS will call this function for each section at the end of the assembly, | |
788 | to permit the CPU backend to adjust the alignment of a section. */ | |
789 | valueT | |
790 | md_section_align (seg, addr) | |
791 | asection *seg; | |
792 | valueT addr; | |
793 | { | |
794 | int align = bfd_get_section_alignment (stdoutput, seg); | |
795 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
796 | } | |
797 | ||
798 | /* If you define this macro, it should return the offset between the | |
799 | address of a PC relative fixup and the position from which the PC | |
800 | relative adjustment should be made. On many processors, the base | |
801 | of a PC relative instruction is the next instruction, so this | |
802 | macro would return the length of an instruction. */ | |
803 | long | |
804 | md_pcrel_from_section (fixp, sec) | |
805 | fixS *fixp; | |
806 | segT sec; | |
807 | { | |
808 | if (fixp->fx_addsy != (symbolS *)NULL | |
809 | && (!S_IS_DEFINED (fixp->fx_addsy) | |
810 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
811 | return 0; | |
812 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
813 | } | |
814 | ||
815 | /* GAS will call this for each fixup. It should store the correct | |
816 | value in the object file. */ | |
817 | int | |
818 | md_apply_fix3 (fixp, valuep, seg) | |
819 | fixS *fixp; | |
820 | valueT *valuep; | |
821 | segT seg; | |
822 | { | |
823 | unsigned char *where; | |
824 | unsigned long insn; | |
825 | long value; | |
826 | ||
827 | if (fixp->fx_addsy == (symbolS *) NULL) | |
828 | { | |
829 | value = *valuep; | |
830 | fixp->fx_done = 1; | |
831 | } | |
832 | else if (fixp->fx_pcrel) | |
833 | { | |
834 | segT s = S_GET_SEGMENT (fixp->fx_addsy); | |
835 | if (fixp->fx_addsy && (s == seg || s == absolute_section)) | |
836 | { | |
837 | value = S_GET_VALUE (fixp->fx_addsy) + *valuep; | |
838 | fixp->fx_done = 1; | |
839 | } | |
840 | else | |
841 | value = *valuep; | |
842 | } | |
843 | else | |
844 | { | |
845 | value = fixp->fx_offset; | |
846 | if (fixp->fx_subsy != (symbolS *) NULL) | |
847 | { | |
848 | if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) | |
849 | { | |
850 | value -= S_GET_VALUE (fixp->fx_subsy); | |
851 | fixp->fx_done = 1; | |
852 | } | |
853 | else | |
854 | { | |
855 | /* We don't actually support subtracting a symbol. */ | |
856 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
00d2865b | 857 | _("expression too complex")); |
adde6300 AM |
858 | } |
859 | } | |
860 | } | |
861 | switch (fixp->fx_r_type) | |
862 | { | |
863 | default: | |
864 | fixp->fx_no_overflow = 1; | |
865 | break; | |
866 | case BFD_RELOC_AVR_7_PCREL: | |
867 | case BFD_RELOC_AVR_13_PCREL: | |
868 | case BFD_RELOC_32: | |
869 | case BFD_RELOC_16: | |
870 | case BFD_RELOC_AVR_CALL: | |
871 | break; | |
872 | } | |
873 | ||
874 | if (fixp->fx_done) | |
875 | { | |
876 | /* Fetch the instruction, insert the fully resolved operand | |
877 | value, and stuff the instruction back again. */ | |
878 | where = fixp->fx_frag->fr_literal + fixp->fx_where; | |
879 | insn = bfd_getl16 (where); | |
880 | ||
881 | switch (fixp->fx_r_type) | |
882 | { | |
883 | case BFD_RELOC_AVR_7_PCREL: | |
884 | if (value & 1) | |
885 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
886 | _("odd address operand: %ld"), value); | |
887 | /* Instruction addresses are always right-shifted by 1. */ | |
888 | value >>= 1; | |
889 | --value; /* Correct PC. */ | |
890 | if (value < -64 || value > 63) | |
891 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
892 | _("operand out of range: %ld"), value); | |
893 | value = (value << 3) & 0x3f8; | |
894 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
895 | break; | |
896 | ||
897 | case BFD_RELOC_AVR_13_PCREL: | |
898 | if (value & 1) | |
899 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
900 | _("odd address operand: %ld"), value); | |
901 | /* Instruction addresses are always right-shifted by 1. */ | |
902 | value >>= 1; | |
903 | --value; /* Correct PC. */ | |
adde6300 AM |
904 | |
905 | if (value < -2048 || value > 2047) | |
906 | { | |
65aa24b6 | 907 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 908 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
adde6300 AM |
909 | as_bad_where (fixp->fx_file, fixp->fx_line, |
910 | _("operand out of range: %ld"), value); | |
911 | } | |
912 | ||
913 | value &= 0xfff; | |
914 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
915 | break; | |
916 | ||
917 | case BFD_RELOC_32: | |
918 | bfd_putl16 ((bfd_vma) value, where); | |
919 | break; | |
920 | ||
921 | case BFD_RELOC_16: | |
922 | bfd_putl16 ((bfd_vma) value, where); | |
923 | break; | |
924 | ||
925 | case BFD_RELOC_AVR_16_PM: | |
926 | bfd_putl16 ((bfd_vma) (value>>1), where); | |
927 | break; | |
928 | ||
929 | case BFD_RELOC_AVR_LO8_LDI: | |
930 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
931 | break; | |
932 | ||
933 | case -BFD_RELOC_AVR_LO8_LDI: | |
934 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
935 | break; | |
936 | ||
937 | case BFD_RELOC_AVR_HI8_LDI: | |
938 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
939 | break; | |
940 | ||
941 | case -BFD_RELOC_AVR_HI8_LDI: | |
942 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); | |
943 | break; | |
944 | ||
945 | case BFD_RELOC_AVR_HH8_LDI: | |
946 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
947 | break; | |
948 | ||
949 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
950 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
951 | break; | |
952 | ||
953 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
954 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
955 | break; | |
956 | ||
957 | case BFD_RELOC_AVR_HI8_LDI_NEG: | |
958 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
959 | break; | |
960 | ||
961 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
962 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); | |
963 | break; | |
964 | ||
965 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
966 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
967 | break; | |
968 | ||
969 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
970 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
971 | break; | |
972 | ||
973 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
974 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
975 | break; | |
976 | ||
977 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
978 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
979 | break; | |
980 | ||
981 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
982 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
983 | break; | |
984 | ||
985 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
986 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
987 | break; | |
988 | ||
989 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
990 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
991 | break; | |
992 | ||
993 | case BFD_RELOC_AVR_CALL: | |
994 | { | |
995 | unsigned long x; | |
996 | x = bfd_getl16 (where); | |
997 | if (value & 1) | |
998 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
999 | _("odd address operand: %ld"), value); | |
1000 | value >>= 1; | |
1001 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1002 | bfd_putl16 ((bfd_vma) x, where); | |
1003 | bfd_putl16 ((bfd_vma) (value & 0xffff), where+2); | |
1004 | } | |
1005 | break; | |
1006 | ||
1007 | default: | |
1008 | as_fatal ( _("line %d: unknown relocation type: 0x%x"), | |
1009 | fixp->fx_line, fixp->fx_r_type); | |
1010 | break; | |
1011 | } | |
1012 | } | |
1013 | else | |
1014 | { | |
1015 | switch (fixp->fx_r_type) | |
1016 | { | |
1017 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1018 | case -BFD_RELOC_AVR_HI8_LDI: | |
1019 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1020 | case -BFD_RELOC_AVR_LO8_LDI: | |
1021 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1022 | _("only constant expression allowed")); | |
1023 | fixp->fx_done = 1; | |
1024 | break; | |
1025 | default: | |
1026 | break; | |
1027 | } | |
1028 | fixp->fx_addnumber = value; | |
1029 | } | |
1030 | return 0; | |
1031 | } | |
1032 | ||
1033 | ||
1034 | /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS | |
1035 | will pass the resulting reloc to `bfd_install_relocation'. This | |
1036 | currently works poorly, as `bfd_install_relocation' often does the | |
1037 | wrong thing, and instances of `tc_gen_reloc' have been written to | |
1038 | work around the problems, which in turns makes it difficult to fix | |
1039 | `bfd_install_relocation'. */ | |
1040 | ||
1041 | /* If while processing a fixup, a reloc really needs to be created | |
1042 | then it is done here. */ | |
1043 | ||
1044 | arelent * | |
1045 | tc_gen_reloc (seg, fixp) | |
df136245 | 1046 | asection *seg ATTRIBUTE_UNUSED; |
adde6300 AM |
1047 | fixS *fixp; |
1048 | { | |
1049 | arelent *reloc; | |
1050 | ||
1051 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1052 | ||
1053 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1054 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1055 | ||
1056 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1057 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1058 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1059 | { | |
1060 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1061 | _("reloc %d not supported by object file format"), | |
1062 | (int)fixp->fx_r_type); | |
1063 | return NULL; | |
1064 | } | |
1065 | ||
1066 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1067 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1068 | reloc->address = fixp->fx_offset; | |
1069 | ||
1070 | reloc->addend = fixp->fx_offset; | |
1071 | ||
1072 | return reloc; | |
1073 | } | |
1074 | ||
1075 | ||
1076 | void | |
1077 | md_assemble (str) | |
1078 | char *str; | |
1079 | { | |
1080 | struct avr_opcodes_s * opcode; | |
1081 | char op[11]; | |
1082 | ||
df136245 | 1083 | str = skip_space (extract_word (str, op, sizeof(op))); |
adde6300 AM |
1084 | |
1085 | if (!op[0]) | |
00d2865b | 1086 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1087 | |
1088 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1089 | ||
1090 | if (opcode == NULL) | |
1091 | { | |
00d2865b | 1092 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1093 | return; |
1094 | } | |
1095 | ||
b170af93 | 1096 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1097 | version with operands exists in avr_opcodes[] in the next entry. */ |
b170af93 | 1098 | |
1188e082 DC |
1099 | if (*str && *opcode->constraints == '?') |
1100 | ++opcode; | |
b170af93 | 1101 | |
00d2865b NC |
1102 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1103 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 AM |
1104 | |
1105 | /* We used to set input_line_pointer to the result of get_operands, | |
1106 | but that is wrong. Our caller assumes we don't change it. */ | |
1107 | { | |
1108 | char *t = input_line_pointer; | |
1109 | avr_operands (opcode, &str); | |
b170af93 | 1110 | if (*skip_space (str)) |
00d2865b | 1111 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1112 | input_line_pointer = t; |
1113 | } | |
1114 | } | |
1115 | ||
1116 | /* Parse ordinary expression. */ | |
1117 | static char * | |
1118 | parse_exp (s, op) | |
1119 | char *s; | |
1120 | expressionS * op; | |
1121 | { | |
1122 | input_line_pointer = s; | |
1123 | expression (op); | |
1124 | if (op->X_op == O_absent) | |
1125 | as_bad (_("missing operand")); | |
1126 | return input_line_pointer; | |
1127 | } | |
1128 | ||
1129 | ||
1130 | /* Parse special expressions (needed for LDI command): | |
1131 | xx8 (address) | |
1132 | xx8 (-address) | |
1133 | pm_xx8 (address) | |
1134 | pm_xx8 (-address) | |
1135 | where xx is: hh, hi, lo | |
1136 | */ | |
1137 | static bfd_reloc_code_real_type | |
1138 | avr_ldi_expression (exp) | |
1139 | expressionS *exp; | |
1140 | { | |
1141 | char *str = input_line_pointer; | |
1142 | char *tmp; | |
1143 | char op[8]; | |
1144 | int mod; | |
1145 | tmp = str; | |
1146 | ||
1147 | str = extract_word (str, op, sizeof (op)); | |
1148 | if (op[0]) | |
1149 | { | |
1150 | mod = (int) hash_find (avr_mod_hash, op); | |
1151 | if (mod) | |
1152 | { | |
1153 | int closes = 0; | |
1154 | mod -= 10; | |
1155 | str = skip_space (str); | |
1156 | if (*str == '(') | |
1157 | { | |
1158 | int neg_p = 0; | |
1159 | ++str; | |
1160 | if (strncmp ("pm(", str, 3) == 0 | |
1161 | || strncmp ("-(pm(", str, 5) == 0) | |
1162 | { | |
1163 | if (HAVE_PM_P(mod)) | |
1164 | { | |
1165 | ++mod; | |
1166 | ++closes; | |
1167 | } | |
1168 | else | |
00d2865b | 1169 | as_bad (_("illegal expression")); |
adde6300 AM |
1170 | if (*str == '-') |
1171 | { | |
1172 | neg_p = 1; | |
1173 | ++closes; | |
1174 | str += 5; | |
1175 | } | |
1176 | else | |
1177 | str += 3; | |
1178 | } | |
1179 | if (*str == '-' && *(str + 1) == '(') | |
1180 | { | |
1181 | neg_p ^= 1; | |
1182 | ++closes; | |
1183 | str += 2; | |
1184 | } | |
1185 | input_line_pointer = str; | |
1186 | expression (exp); | |
1187 | do | |
1188 | { | |
1189 | if (*input_line_pointer != ')') | |
1190 | { | |
00d2865b | 1191 | as_bad (_("`)' required")); |
adde6300 AM |
1192 | break; |
1193 | } | |
1194 | input_line_pointer++; | |
1195 | } | |
1196 | while (closes--); | |
1197 | return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
1198 | } | |
1199 | } | |
1200 | } | |
1201 | input_line_pointer = tmp; | |
1202 | expression (exp); | |
00d2865b NC |
1203 | |
1204 | /* Warn about expressions that fail to use lo8(). */ | |
1205 | if (exp->X_op == O_constant) | |
1206 | { | |
1207 | int x = exp->X_add_number; | |
1208 | if (x < -255 || x > 255) | |
1209 | as_warn (_("constant out of 8-bit range: %d"), x); | |
1210 | } | |
1211 | else | |
1212 | as_warn (_("expression possibly out of 8-bit range")); | |
1213 | ||
adde6300 AM |
1214 | return BFD_RELOC_AVR_LO8_LDI; |
1215 | } | |
1216 | ||
1217 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and | |
1218 | `avr_cons_fix_new' */ | |
1219 | static int exp_mod_pm = 0; | |
1220 | ||
1221 | /* Parse special CONS expression: pm (expression) | |
1222 | which is used for addressing to a program memory. | |
1223 | Relocation: BFD_RELOC_AVR_16_PM */ | |
1224 | void | |
1225 | avr_parse_cons_expression (exp, nbytes) | |
1226 | expressionS *exp; | |
1227 | int nbytes; | |
1228 | { | |
1229 | char * tmp; | |
1230 | ||
1231 | exp_mod_pm = 0; | |
1232 | ||
1233 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1234 | ||
1235 | if (nbytes == 2) | |
1236 | { | |
1237 | char * pm_name = "pm"; | |
1238 | int len = strlen (pm_name); | |
1239 | if (strncasecmp (input_line_pointer, pm_name, len) == 0) | |
1240 | { | |
1241 | input_line_pointer = skip_space (input_line_pointer + len); | |
1242 | if (*input_line_pointer == '(') | |
1243 | { | |
1244 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1245 | exp_mod_pm = 1; | |
1246 | expression (exp); | |
1247 | if (*input_line_pointer == ')') | |
1248 | ++input_line_pointer; | |
1249 | else | |
1250 | { | |
00d2865b | 1251 | as_bad (_("`)' required")); |
adde6300 AM |
1252 | exp_mod_pm = 0; |
1253 | } | |
1254 | return; | |
1255 | } | |
1256 | input_line_pointer = tmp; | |
1257 | } | |
1258 | } | |
1259 | expression (exp); | |
1260 | } | |
1261 | ||
1262 | void | |
1263 | avr_cons_fix_new(frag, where, nbytes, exp) | |
1264 | fragS *frag; | |
1265 | int where; | |
1266 | int nbytes; | |
1267 | expressionS *exp; | |
1268 | { | |
1269 | if (exp_mod_pm == 0) | |
1270 | { | |
1271 | if (nbytes == 2) | |
1272 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16); | |
1273 | else if (nbytes == 4) | |
1274 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32); | |
1275 | else | |
00d2865b | 1276 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1277 | } |
1278 | else | |
1279 | { | |
1280 | if (nbytes == 2) | |
1281 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM); | |
1282 | else | |
00d2865b | 1283 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1284 | exp_mod_pm = 0; |
1285 | } | |
1286 | } |