Commit | Line | Data |
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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
d669d37f | 3 | Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008 |
2132e3a3 | 4 | Free Software Foundation, Inc. |
adde6300 AM |
5 | Contributed by Denis Chertykov <denisc@overta.ru> |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
adde6300 AM |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
21 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
22 | Boston, MA 02110-1301, USA. */ | |
adde6300 | 23 | |
adde6300 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
adde6300 AM |
26 | #include "subsegs.h" |
27 | ||
1188e082 DC |
28 | struct avr_opcodes_s |
29 | { | |
dc191a8f NC |
30 | char * name; |
31 | char * constraints; | |
32 | int insn_size; /* In words. */ | |
33 | int isa; | |
34 | unsigned int bin_opcode; | |
1188e082 DC |
35 | }; |
36 | ||
37 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ | |
38 | {#NAME, CONSTR, SIZE, ISA, BIN}, | |
39 | ||
40 | struct avr_opcodes_s avr_opcodes[] = | |
41 | { | |
42 | #include "opcode/avr.h" | |
43 | {NULL, NULL, 0, 0, 0} | |
44 | }; | |
45 | ||
adde6300 AM |
46 | const char comment_chars[] = ";"; |
47 | const char line_comment_chars[] = "#"; | |
48 | const char line_separator_chars[] = "$"; | |
49 | ||
adde6300 AM |
50 | const char *md_shortopts = "m:"; |
51 | struct mcu_type_s | |
52 | { | |
53 | char *name; | |
54 | int isa; | |
55 | int mach; | |
56 | }; | |
57 | ||
1f8ae5e6 | 58 | /* XXX - devices that don't seem to exist (renamed, replaced with larger |
7b21ac3f | 59 | ones, or planned but never produced), left here for compatibility. */ |
1f8ae5e6 | 60 | |
adde6300 AM |
61 | static struct mcu_type_s mcu_types[] = |
62 | { | |
7b21ac3f EW |
63 | {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, |
64 | /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, | |
65 | but set to AVR_ISA_AVR25 for some following version | |
66 | of GCC (from 4.3) for backward compatibility. */ | |
67 | {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, | |
68 | {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
69 | /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, | |
70 | but set to AVR_ISA_AVR3_ALL for some following version | |
71 | of GCC (from 4.3) for backward compatibility. */ | |
72 | {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, | |
73 | {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, | |
74 | {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, | |
75 | {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, | |
76 | /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, | |
77 | but set to AVR_ISA_AVR51 for some following version | |
78 | of GCC (from 4.3) for backward compatibility. */ | |
79 | {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, | |
80 | {"avr51", AVR_ISA_AVR51, bfd_mach_avr51}, | |
81 | {"avr6", AVR_ISA_AVR6, bfd_mach_avr6}, | |
28c9d252 | 82 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
7b21ac3f EW |
83 | {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1}, |
84 | {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1}, | |
85 | {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1}, | |
86 | {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1}, | |
87 | {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2}, | |
88 | {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2}, | |
89 | {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */ | |
90 | {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2}, | |
91 | {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */ | |
d669d37f | 92 | {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2}, |
7b21ac3f EW |
93 | {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */ |
94 | {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2}, | |
95 | {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */ | |
96 | {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2}, | |
97 | {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2}, | |
98 | {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2}, | |
99 | {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25}, | |
100 | {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25}, | |
101 | {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25}, | |
102 | {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25}, | |
103 | {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25}, | |
104 | {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25}, | |
105 | {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25}, | |
106 | {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25}, | |
107 | {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25}, | |
108 | {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25}, | |
109 | {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25}, | |
110 | {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25}, | |
2b02f87c | 111 | {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25}, |
7b21ac3f EW |
112 | {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25}, |
113 | {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25}, | |
114 | {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25}, | |
115 | {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25}, | |
116 | {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3}, | |
117 | {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3}, | |
118 | {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31}, | |
119 | {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31}, | |
120 | {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35}, | |
2b02f87c | 121 | {"attiny327", AVR_ISA_AVR35, bfd_mach_avr35}, |
7b21ac3f EW |
122 | {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35}, |
123 | {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35}, | |
28c9d252 | 124 | {"atmega8", AVR_ISA_M8, bfd_mach_avr4}, |
7b21ac3f EW |
125 | {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4}, |
126 | {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4}, | |
127 | {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4}, | |
128 | {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4}, | |
28c9d252 NC |
129 | {"atmega8515", AVR_ISA_M8, bfd_mach_avr4}, |
130 | {"atmega8535", AVR_ISA_M8, bfd_mach_avr4}, | |
7b21ac3f | 131 | {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4}, |
2b02f87c NC |
132 | {"atmega4hvd", AVR_ISA_AVR4, bfd_mach_avr4}, |
133 | {"atmega8hvd", AVR_ISA_AVR4, bfd_mach_avr4}, | |
7b21ac3f EW |
134 | {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4}, |
135 | {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4}, | |
136 | {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
137 | {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4}, | |
138 | {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4}, | |
2b02f87c | 139 | {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4}, |
7b21ac3f | 140 | {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 141 | {"atmega161", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f | 142 | {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 143 | {"atmega163", AVR_ISA_M161, bfd_mach_avr5}, |
7b21ac3f EW |
144 | {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5}, |
145 | {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5}, | |
146 | {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
147 | {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5}, | |
148 | {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
149 | {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5}, | |
150 | {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
151 | {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5}, | |
152 | {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5}, | |
153 | {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
154 | {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5}, | |
155 | {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
156 | {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5}, | |
157 | {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
158 | {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
159 | {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5}, | |
160 | {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
161 | {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5}, | |
162 | {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5}, | |
163 | {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5}, | |
164 | {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5}, | |
165 | {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5}, | |
166 | {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5}, | |
167 | {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5}, | |
168 | {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5}, | |
169 | {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5}, | |
170 | {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5}, | |
171 | {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5}, | |
172 | {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
173 | {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5}, |
174 | {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f EW |
175 | {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5}, |
176 | {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5}, | |
177 | {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5}, | |
178 | {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5}, | |
179 | {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c NC |
180 | {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5}, |
181 | {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 182 | {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c NC |
183 | {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5}, |
184 | {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5}, | |
7b21ac3f | 185 | {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5}, |
2b02f87c | 186 | {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5}, |
7b21ac3f EW |
187 | {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5}, |
188 | {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5}, | |
2b02f87c | 189 | {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5}, |
28c9d252 | 190 | {"at94k", AVR_ISA_94K, bfd_mach_avr5}, |
7b21ac3f EW |
191 | {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51}, |
192 | {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51}, | |
193 | {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51}, | |
194 | {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51}, | |
17f4880d | 195 | {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51}, |
7b21ac3f EW |
196 | {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51}, |
197 | {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51}, | |
198 | {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51}, | |
2b02f87c NC |
199 | {"m3000f", AVR_ISA_AVR51, bfd_mach_avr51}, |
200 | {"m3000s", AVR_ISA_AVR51, bfd_mach_avr51}, | |
201 | {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51}, | |
7b21ac3f EW |
202 | {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6}, |
203 | {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6}, | |
adde6300 AM |
204 | {NULL, 0, 0} |
205 | }; | |
206 | ||
adde6300 | 207 | /* Current MCU type. */ |
7b21ac3f | 208 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2}; |
dc191a8f | 209 | static struct mcu_type_s * avr_mcu = & default_mcu; |
adde6300 | 210 | |
00d2865b NC |
211 | /* AVR target-specific switches. */ |
212 | struct avr_opt_s | |
213 | { | |
dc191a8f NC |
214 | int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */ |
215 | int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */ | |
216 | int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */ | |
00d2865b NC |
217 | }; |
218 | ||
219 | static struct avr_opt_s avr_opt = { 0, 0, 0 }; | |
220 | ||
adde6300 AM |
221 | const char EXP_CHARS[] = "eE"; |
222 | const char FLT_CHARS[] = "dD"; | |
dc191a8f NC |
223 | |
224 | static void avr_set_arch (int); | |
adde6300 AM |
225 | |
226 | /* The target specific pseudo-ops which we support. */ | |
227 | const pseudo_typeS md_pseudo_table[] = | |
228 | { | |
229 | {"arch", avr_set_arch, 0}, | |
230 | { NULL, NULL, 0} | |
231 | }; | |
232 | ||
233 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
adde6300 | 234 | |
dc191a8f NC |
235 | #define EXP_MOD_NAME(i) exp_mod[i].name |
236 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
237 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
238 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
adde6300 AM |
239 | |
240 | struct exp_mod_s | |
241 | { | |
dc191a8f NC |
242 | char * name; |
243 | bfd_reloc_code_real_type reloc; | |
244 | bfd_reloc_code_real_type neg_reloc; | |
245 | int have_pm; | |
adde6300 AM |
246 | }; |
247 | ||
c6a7ab1f NC |
248 | static struct exp_mod_s exp_mod[] = |
249 | { | |
adde6300 AM |
250 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, |
251 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
252 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
253 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
254 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
255 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
df406460 NC |
256 | {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0}, |
257 | {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0}, | |
adde6300 AM |
258 | }; |
259 | ||
8ad7c533 NC |
260 | /* A union used to store indicies into the exp_mod[] array |
261 | in a hash table which expects void * data types. */ | |
262 | typedef union | |
263 | { | |
264 | void * ptr; | |
265 | int index; | |
266 | } mod_index; | |
267 | ||
adde6300 AM |
268 | /* Opcode hash table. */ |
269 | static struct hash_control *avr_hash; | |
270 | ||
271 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
272 | static struct hash_control *avr_mod_hash; | |
273 | ||
00d2865b | 274 | #define OPTION_MMCU 'm' |
dc191a8f NC |
275 | enum options |
276 | { | |
277 | OPTION_ALL_OPCODES = OPTION_MD_BASE + 1, | |
278 | OPTION_NO_SKIP_BUG, | |
279 | OPTION_NO_WRAP | |
280 | }; | |
adde6300 | 281 | |
c6a7ab1f NC |
282 | struct option md_longopts[] = |
283 | { | |
00d2865b NC |
284 | { "mmcu", required_argument, NULL, OPTION_MMCU }, |
285 | { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES }, | |
286 | { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG }, | |
287 | { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP }, | |
288 | { NULL, no_argument, NULL, 0 } | |
adde6300 | 289 | }; |
adde6300 | 290 | |
c6a7ab1f | 291 | size_t md_longopts_size = sizeof (md_longopts); |
00d2865b NC |
292 | |
293 | /* Display nicely formatted list of known MCU names. */ | |
c6a7ab1f | 294 | |
00d2865b | 295 | static void |
dc191a8f | 296 | show_mcu_list (FILE *stream) |
00d2865b NC |
297 | { |
298 | int i, x; | |
299 | ||
300 | fprintf (stream, _("Known MCU names:")); | |
301 | x = 1000; | |
1dab94dd | 302 | |
00d2865b NC |
303 | for (i = 0; mcu_types[i].name; i++) |
304 | { | |
305 | int len = strlen (mcu_types[i].name); | |
1dab94dd | 306 | |
00d2865b | 307 | x += len + 1; |
1dab94dd | 308 | |
00d2865b | 309 | if (x < 75) |
c6a7ab1f | 310 | fprintf (stream, " %s", mcu_types[i].name); |
00d2865b NC |
311 | else |
312 | { | |
313 | fprintf (stream, "\n %s", mcu_types[i].name); | |
314 | x = len + 2; | |
315 | } | |
316 | } | |
1dab94dd | 317 | |
c6a7ab1f | 318 | fprintf (stream, "\n"); |
00d2865b NC |
319 | } |
320 | ||
adde6300 | 321 | static inline char * |
dc191a8f | 322 | skip_space (char *s) |
adde6300 AM |
323 | { |
324 | while (*s == ' ' || *s == '\t') | |
325 | ++s; | |
326 | return s; | |
327 | } | |
328 | ||
329 | /* Extract one word from FROM and copy it to TO. */ | |
c6a7ab1f | 330 | |
adde6300 AM |
331 | static char * |
332 | extract_word (char *from, char *to, int limit) | |
333 | { | |
334 | char *op_start; | |
335 | char *op_end; | |
336 | int size = 0; | |
337 | ||
338 | /* Drop leading whitespace. */ | |
339 | from = skip_space (from); | |
340 | *to = 0; | |
c6a7ab1f | 341 | |
adde6300 | 342 | /* Find the op code end. */ |
c6a7ab1f | 343 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);) |
adde6300 AM |
344 | { |
345 | to[size++] = *op_end++; | |
346 | if (size + 1 >= limit) | |
347 | break; | |
348 | } | |
1dab94dd | 349 | |
adde6300 AM |
350 | to[size] = 0; |
351 | return op_end; | |
352 | } | |
353 | ||
354 | int | |
dc191a8f NC |
355 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
356 | asection *seg ATTRIBUTE_UNUSED) | |
adde6300 AM |
357 | { |
358 | abort (); | |
359 | return 0; | |
360 | } | |
361 | ||
362 | void | |
dc191a8f | 363 | md_show_usage (FILE *stream) |
adde6300 | 364 | { |
00d2865b NC |
365 | fprintf (stream, |
366 | _("AVR options:\n" | |
adde6300 AM |
367 | " -mmcu=[avr-name] select microcontroller variant\n" |
368 | " [avr-name] can be:\n" | |
7b21ac3f EW |
369 | " avr1 - classic AVR core without data RAM\n" |
370 | " avr2 - classic AVR core with up to 8K program memory\n" | |
371 | " avr25 - classic AVR core with up to 8K program memory\n" | |
372 | " plus the MOVW instruction\n" | |
373 | " avr3 - classic AVR core with up to 64K program memory\n" | |
374 | " avr31 - classic AVR core with up to 128K program memory\n" | |
375 | " avr35 - classic AVR core with up to 64K program memory\n" | |
376 | " plus the MOVW instruction\n" | |
377 | " avr4 - enhanced AVR core with up to 8K program memory\n" | |
378 | " avr5 - enhanced AVR core with up to 64K program memory\n" | |
379 | " avr51 - enhanced AVR core with up to 128K program memory\n" | |
380 | " avr6 - enhanced AVR core with up to 256K program memory\n" | |
adde6300 | 381 | " or immediate microcontroller name.\n")); |
00d2865b NC |
382 | fprintf (stream, |
383 | _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" | |
384 | " -mno-skip-bug disable warnings for skipping two-word instructions\n" | |
385 | " (default for avr4, avr5)\n" | |
386 | " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n" | |
387 | " (default for avr3, avr5)\n")); | |
388 | show_mcu_list (stream); | |
adde6300 AM |
389 | } |
390 | ||
391 | static void | |
dc191a8f | 392 | avr_set_arch (int dummy ATTRIBUTE_UNUSED) |
adde6300 | 393 | { |
dc191a8f | 394 | char str[20]; |
1dab94dd | 395 | |
adde6300 | 396 | input_line_pointer = extract_word (input_line_pointer, str, 20); |
00d2865b | 397 | md_parse_option (OPTION_MMCU, str); |
adde6300 AM |
398 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
399 | } | |
400 | ||
401 | int | |
dc191a8f | 402 | md_parse_option (int c, char *arg) |
adde6300 | 403 | { |
00d2865b | 404 | switch (c) |
adde6300 | 405 | { |
00d2865b NC |
406 | case OPTION_MMCU: |
407 | { | |
408 | int i; | |
409 | char *s = alloca (strlen (arg) + 1); | |
adde6300 | 410 | |
00d2865b NC |
411 | { |
412 | char *t = s; | |
413 | char *arg1 = arg; | |
414 | ||
415 | do | |
3882b010 | 416 | *t = TOLOWER (*arg1++); |
00d2865b NC |
417 | while (*t++); |
418 | } | |
419 | ||
420 | for (i = 0; mcu_types[i].name; ++i) | |
421 | if (strcmp (mcu_types[i].name, s) == 0) | |
422 | break; | |
adde6300 | 423 | |
00d2865b NC |
424 | if (!mcu_types[i].name) |
425 | { | |
426 | show_mcu_list (stderr); | |
427 | as_fatal (_("unknown MCU: %s\n"), arg); | |
428 | } | |
65aa24b6 | 429 | |
00d2865b NC |
430 | /* It is OK to redefine mcu type within the same avr[1-5] bfd machine |
431 | type - this for allows passing -mmcu=... via gcc ASM_SPEC as well | |
432 | as .arch ... in the asm output at the same time. */ | |
00d2865b NC |
433 | if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach) |
434 | avr_mcu = &mcu_types[i]; | |
435 | else | |
436 | as_fatal (_("redefinition of mcu type `%s' to `%s'"), | |
437 | avr_mcu->name, mcu_types[i].name); | |
438 | return 1; | |
439 | } | |
440 | case OPTION_ALL_OPCODES: | |
441 | avr_opt.all_opcodes = 1; | |
442 | return 1; | |
443 | case OPTION_NO_SKIP_BUG: | |
444 | avr_opt.no_skip_bug = 1; | |
445 | return 1; | |
446 | case OPTION_NO_WRAP: | |
447 | avr_opt.no_wrap = 1; | |
adde6300 AM |
448 | return 1; |
449 | } | |
1dab94dd | 450 | |
adde6300 AM |
451 | return 0; |
452 | } | |
453 | ||
454 | symbolS * | |
dc191a8f | 455 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
adde6300 | 456 | { |
dc191a8f | 457 | return NULL; |
adde6300 AM |
458 | } |
459 | ||
adde6300 | 460 | char * |
dc191a8f | 461 | md_atof (int type, char *litP, int *sizeP) |
adde6300 | 462 | { |
499ac353 | 463 | return ieee_md_atof (type, litP, sizeP, FALSE); |
adde6300 AM |
464 | } |
465 | ||
466 | void | |
dc191a8f NC |
467 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
468 | asection *sec ATTRIBUTE_UNUSED, | |
469 | fragS *fragP ATTRIBUTE_UNUSED) | |
adde6300 AM |
470 | { |
471 | abort (); | |
472 | } | |
473 | ||
adde6300 | 474 | void |
dc191a8f | 475 | md_begin (void) |
adde6300 | 476 | { |
df136245 | 477 | unsigned int i; |
adde6300 | 478 | struct avr_opcodes_s *opcode; |
dc191a8f | 479 | |
c6a7ab1f | 480 | avr_hash = hash_new (); |
adde6300 AM |
481 | |
482 | /* Insert unique names into hash table. This hash table then provides a | |
483 | quick index to the first opcode with a particular name in the opcode | |
484 | table. */ | |
adde6300 AM |
485 | for (opcode = avr_opcodes; opcode->name; opcode++) |
486 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
487 | ||
488 | avr_mod_hash = hash_new (); | |
489 | ||
dc191a8f | 490 | for (i = 0; i < ARRAY_SIZE (exp_mod); ++i) |
8ad7c533 NC |
491 | { |
492 | mod_index m; | |
493 | ||
494 | m.index = i + 10; | |
495 | hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr); | |
496 | } | |
c6a7ab1f | 497 | |
adde6300 AM |
498 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
499 | } | |
500 | ||
df136245 | 501 | /* Resolve STR as a constant expression and return the result. |
c6a7ab1f | 502 | If result greater than MAX then error. */ |
df136245 DC |
503 | |
504 | static unsigned int | |
dc191a8f | 505 | avr_get_constant (char *str, int max) |
df136245 DC |
506 | { |
507 | expressionS ex; | |
dc191a8f | 508 | |
df136245 DC |
509 | str = skip_space (str); |
510 | input_line_pointer = str; | |
dc191a8f | 511 | expression (& ex); |
df136245 DC |
512 | |
513 | if (ex.X_op != O_constant) | |
514 | as_bad (_("constant value required")); | |
515 | ||
516 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
73f4d86e | 517 | as_bad (_("number must be positive and less than %d"), max + 1); |
1dab94dd | 518 | |
df136245 DC |
519 | return ex.X_add_number; |
520 | } | |
521 | ||
dc191a8f | 522 | /* Parse for ldd/std offset. */ |
df136245 | 523 | |
dc191a8f NC |
524 | static void |
525 | avr_offset_expression (expressionS *exp) | |
adde6300 | 526 | { |
dc191a8f NC |
527 | char *str = input_line_pointer; |
528 | char *tmp; | |
529 | char op[8]; | |
adde6300 | 530 | |
dc191a8f NC |
531 | tmp = str; |
532 | str = extract_word (str, op, sizeof (op)); | |
533 | ||
534 | input_line_pointer = tmp; | |
535 | expression (exp); | |
536 | ||
537 | /* Warn about expressions that fail to use lo8 (). */ | |
538 | if (exp->X_op == O_constant) | |
adde6300 | 539 | { |
dc191a8f | 540 | int x = exp->X_add_number; |
28c9d252 | 541 | |
dc191a8f NC |
542 | if (x < -255 || x > 255) |
543 | as_warn (_("constant out of 8-bit range: %d"), x); | |
544 | } | |
545 | } | |
adde6300 | 546 | |
dc191a8f | 547 | /* Parse ordinary expression. */ |
adde6300 | 548 | |
dc191a8f NC |
549 | static char * |
550 | parse_exp (char *s, expressionS *op) | |
551 | { | |
552 | input_line_pointer = s; | |
553 | expression (op); | |
554 | if (op->X_op == O_absent) | |
555 | as_bad (_("missing operand")); | |
556 | return input_line_pointer; | |
557 | } | |
1dab94dd | 558 | |
dc191a8f NC |
559 | /* Parse special expressions (needed for LDI command): |
560 | xx8 (address) | |
561 | xx8 (-address) | |
562 | pm_xx8 (address) | |
563 | pm_xx8 (-address) | |
564 | where xx is: hh, hi, lo. */ | |
adde6300 | 565 | |
dc191a8f NC |
566 | static bfd_reloc_code_real_type |
567 | avr_ldi_expression (expressionS *exp) | |
568 | { | |
569 | char *str = input_line_pointer; | |
570 | char *tmp; | |
571 | char op[8]; | |
572 | int mod; | |
28c9d252 NC |
573 | int linker_stubs_should_be_generated = 0; |
574 | ||
dc191a8f | 575 | tmp = str; |
adde6300 | 576 | |
dc191a8f | 577 | str = extract_word (str, op, sizeof (op)); |
adde6300 | 578 | |
dc191a8f NC |
579 | if (op[0]) |
580 | { | |
8ad7c533 | 581 | mod_index m; |
28c9d252 | 582 | |
8ad7c533 NC |
583 | m.ptr = hash_find (avr_mod_hash, op); |
584 | mod = m.index; | |
1dab94dd | 585 | |
dc191a8f NC |
586 | if (mod) |
587 | { | |
588 | int closes = 0; | |
b170af93 | 589 | |
dc191a8f NC |
590 | mod -= 10; |
591 | str = skip_space (str); | |
00d2865b | 592 | |
dc191a8f NC |
593 | if (*str == '(') |
594 | { | |
28c9d252 | 595 | bfd_reloc_code_real_type reloc_to_return; |
dc191a8f | 596 | int neg_p = 0; |
00d2865b | 597 | |
dc191a8f | 598 | ++str; |
00d2865b | 599 | |
dc191a8f | 600 | if (strncmp ("pm(", str, 3) == 0 |
28c9d252 NC |
601 | || strncmp ("gs(",str,3) == 0 |
602 | || strncmp ("-(gs(",str,5) == 0 | |
dc191a8f NC |
603 | || strncmp ("-(pm(", str, 5) == 0) |
604 | { | |
605 | if (HAVE_PM_P (mod)) | |
606 | { | |
607 | ++mod; | |
608 | ++closes; | |
609 | } | |
610 | else | |
611 | as_bad (_("illegal expression")); | |
b170af93 | 612 | |
28c9d252 NC |
613 | if (str[0] == 'g' || str[2] == 'g') |
614 | linker_stubs_should_be_generated = 1; | |
615 | ||
dc191a8f NC |
616 | if (*str == '-') |
617 | { | |
618 | neg_p = 1; | |
619 | ++closes; | |
620 | str += 5; | |
621 | } | |
622 | else | |
623 | str += 3; | |
624 | } | |
adde6300 | 625 | |
dc191a8f NC |
626 | if (*str == '-' && *(str + 1) == '(') |
627 | { | |
628 | neg_p ^= 1; | |
629 | ++closes; | |
630 | str += 2; | |
631 | } | |
750bce0e | 632 | |
dc191a8f NC |
633 | input_line_pointer = str; |
634 | expression (exp); | |
750bce0e | 635 | |
dc191a8f NC |
636 | do |
637 | { | |
638 | if (*input_line_pointer != ')') | |
639 | { | |
640 | as_bad (_("`)' required")); | |
641 | break; | |
642 | } | |
643 | input_line_pointer++; | |
644 | } | |
645 | while (closes--); | |
646 | ||
28c9d252 NC |
647 | reloc_to_return = |
648 | neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
649 | if (linker_stubs_should_be_generated) | |
650 | { | |
651 | switch (reloc_to_return) | |
652 | { | |
653 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
654 | reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS; | |
655 | break; | |
656 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
657 | reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS; | |
658 | break; | |
659 | ||
660 | default: | |
0a903bab NC |
661 | /* PR 5523: Do not generate a warning here, |
662 | legitimate code can trigger this case. */ | |
663 | break; | |
28c9d252 NC |
664 | } |
665 | } | |
666 | return reloc_to_return; | |
dc191a8f NC |
667 | } |
668 | } | |
669 | } | |
750bce0e NC |
670 | |
671 | input_line_pointer = tmp; | |
672 | expression (exp); | |
673 | ||
674 | /* Warn about expressions that fail to use lo8 (). */ | |
675 | if (exp->X_op == O_constant) | |
676 | { | |
677 | int x = exp->X_add_number; | |
dc191a8f | 678 | |
750bce0e NC |
679 | if (x < -255 || x > 255) |
680 | as_warn (_("constant out of 8-bit range: %d"), x); | |
681 | } | |
dc191a8f NC |
682 | |
683 | return BFD_RELOC_AVR_LDI; | |
750bce0e NC |
684 | } |
685 | ||
df136245 | 686 | /* Parse one instruction operand. |
c6a7ab1f NC |
687 | Return operand bitmask. Also fixups can be generated. */ |
688 | ||
adde6300 | 689 | static unsigned int |
dc191a8f NC |
690 | avr_operand (struct avr_opcodes_s *opcode, |
691 | int where, | |
692 | char *op, | |
693 | char **line) | |
adde6300 | 694 | { |
adde6300 | 695 | expressionS op_expr; |
df136245 DC |
696 | unsigned int op_mask = 0; |
697 | char *str = skip_space (*line); | |
adde6300 | 698 | |
adde6300 AM |
699 | switch (*op) |
700 | { | |
701 | /* Any register operand. */ | |
702 | case 'w': | |
703 | case 'd': | |
704 | case 'r': | |
b170af93 DC |
705 | case 'a': |
706 | case 'v': | |
c6a7ab1f NC |
707 | if (*str == 'r' || *str == 'R') |
708 | { | |
709 | char r_name[20]; | |
1dab94dd | 710 | |
c6a7ab1f | 711 | str = extract_word (str, r_name, sizeof (r_name)); |
65b1d096 | 712 | op_mask = 0xff; |
3882b010 | 713 | if (ISDIGIT (r_name[1])) |
c6a7ab1f NC |
714 | { |
715 | if (r_name[2] == '\0') | |
716 | op_mask = r_name[1] - '0'; | |
717 | else if (r_name[1] != '0' | |
3882b010 | 718 | && ISDIGIT (r_name[2]) |
c6a7ab1f NC |
719 | && r_name[3] == '\0') |
720 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
721 | } | |
722 | } | |
723 | else | |
724 | { | |
725 | op_mask = avr_get_constant (str, 31); | |
726 | str = input_line_pointer; | |
727 | } | |
1dab94dd | 728 | |
c6a7ab1f NC |
729 | if (op_mask <= 31) |
730 | { | |
731 | switch (*op) | |
732 | { | |
733 | case 'a': | |
734 | if (op_mask < 16 || op_mask > 23) | |
735 | as_bad (_("register r16-r23 required")); | |
736 | op_mask -= 16; | |
737 | break; | |
1dab94dd | 738 | |
c6a7ab1f NC |
739 | case 'd': |
740 | if (op_mask < 16) | |
741 | as_bad (_("register number above 15 required")); | |
742 | op_mask -= 16; | |
743 | break; | |
1dab94dd | 744 | |
c6a7ab1f NC |
745 | case 'v': |
746 | if (op_mask & 1) | |
747 | as_bad (_("even register number required")); | |
748 | op_mask >>= 1; | |
749 | break; | |
1dab94dd | 750 | |
c6a7ab1f | 751 | case 'w': |
65b1d096 | 752 | if ((op_mask & 1) || op_mask < 24) |
c6a7ab1f | 753 | as_bad (_("register r24, r26, r28 or r30 required")); |
65b1d096 | 754 | op_mask = (op_mask - 24) >> 1; |
c6a7ab1f NC |
755 | break; |
756 | } | |
757 | break; | |
758 | } | |
759 | as_bad (_("register name or number from 0 to 31 required")); | |
adde6300 AM |
760 | break; |
761 | ||
762 | case 'e': | |
763 | { | |
764 | char c; | |
1dab94dd | 765 | |
adde6300 AM |
766 | if (*str == '-') |
767 | { | |
c6a7ab1f | 768 | str = skip_space (str + 1); |
adde6300 AM |
769 | op_mask = 0x1002; |
770 | } | |
3882b010 | 771 | c = TOLOWER (*str); |
adde6300 AM |
772 | if (c == 'x') |
773 | op_mask |= 0x100c; | |
774 | else if (c == 'y') | |
775 | op_mask |= 0x8; | |
776 | else if (c != 'z') | |
00d2865b | 777 | as_bad (_("pointer register (X, Y or Z) required")); |
adde6300 | 778 | |
c6a7ab1f | 779 | str = skip_space (str + 1); |
adde6300 AM |
780 | if (*str == '+') |
781 | { | |
782 | ++str; | |
783 | if (op_mask & 2) | |
00d2865b | 784 | as_bad (_("cannot both predecrement and postincrement")); |
adde6300 AM |
785 | op_mask |= 0x1001; |
786 | } | |
e38c9cc2 | 787 | |
1188e082 | 788 | /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer |
e38c9cc2 | 789 | registers, no predecrement, no postincrement. */ |
00d2865b NC |
790 | if (!avr_opt.all_opcodes && (op_mask & 0x100F) |
791 | && !(avr_mcu->isa & AVR_ISA_SRAM)) | |
792 | as_bad (_("addressing mode not supported")); | |
adde6300 AM |
793 | } |
794 | break; | |
795 | ||
b170af93 | 796 | case 'z': |
c6a7ab1f NC |
797 | if (*str == '-') |
798 | as_bad (_("can't predecrement")); | |
1dab94dd | 799 | |
c6a7ab1f NC |
800 | if (! (*str == 'z' || *str == 'Z')) |
801 | as_bad (_("pointer register Z required")); | |
1dab94dd | 802 | |
c6a7ab1f NC |
803 | str = skip_space (str + 1); |
804 | ||
805 | if (*str == '+') | |
806 | { | |
807 | ++str; | |
808 | op_mask |= 1; | |
809 | } | |
d669d37f NC |
810 | |
811 | /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */ | |
812 | if (!avr_opt.all_opcodes | |
813 | && (op_mask & 0x0001) | |
814 | && !(avr_mcu->isa & AVR_ISA_MOVW)) | |
815 | as_bad (_("postincrement not supported")); | |
b170af93 DC |
816 | break; |
817 | ||
adde6300 AM |
818 | case 'b': |
819 | { | |
3882b010 | 820 | char c = TOLOWER (*str++); |
1dab94dd | 821 | |
adde6300 AM |
822 | if (c == 'y') |
823 | op_mask |= 0x8; | |
824 | else if (c != 'z') | |
00d2865b | 825 | as_bad (_("pointer register (Y or Z) required")); |
adde6300 AM |
826 | str = skip_space (str); |
827 | if (*str++ == '+') | |
828 | { | |
750bce0e NC |
829 | input_line_pointer = str; |
830 | avr_offset_expression (& op_expr); | |
adde6300 | 831 | str = input_line_pointer; |
750bce0e NC |
832 | fix_new_exp (frag_now, where, 3, |
833 | &op_expr, FALSE, BFD_RELOC_AVR_6); | |
adde6300 AM |
834 | } |
835 | } | |
836 | break; | |
837 | ||
838 | case 'h': | |
c6a7ab1f NC |
839 | str = parse_exp (str, &op_expr); |
840 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 841 | &op_expr, FALSE, BFD_RELOC_AVR_CALL); |
adde6300 AM |
842 | break; |
843 | ||
844 | case 'L': | |
c6a7ab1f NC |
845 | str = parse_exp (str, &op_expr); |
846 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 847 | &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL); |
adde6300 AM |
848 | break; |
849 | ||
850 | case 'l': | |
c6a7ab1f NC |
851 | str = parse_exp (str, &op_expr); |
852 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
b34976b6 | 853 | &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL); |
adde6300 AM |
854 | break; |
855 | ||
856 | case 'i': | |
c6a7ab1f NC |
857 | str = parse_exp (str, &op_expr); |
858 | fix_new_exp (frag_now, where + 2, opcode->insn_size * 2, | |
b34976b6 | 859 | &op_expr, FALSE, BFD_RELOC_16); |
adde6300 AM |
860 | break; |
861 | ||
862 | case 'M': | |
863 | { | |
864 | bfd_reloc_code_real_type r_type; | |
1dab94dd | 865 | |
c6a7ab1f NC |
866 | input_line_pointer = str; |
867 | r_type = avr_ldi_expression (&op_expr); | |
868 | str = input_line_pointer; | |
adde6300 | 869 | fix_new_exp (frag_now, where, 3, |
b34976b6 | 870 | &op_expr, FALSE, r_type); |
adde6300 AM |
871 | } |
872 | break; | |
873 | ||
874 | case 'n': | |
875 | { | |
876 | unsigned int x; | |
1dab94dd | 877 | |
adde6300 AM |
878 | x = ~avr_get_constant (str, 255); |
879 | str = input_line_pointer; | |
880 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
881 | } | |
882 | break; | |
883 | ||
884 | case 'K': | |
750bce0e NC |
885 | input_line_pointer = str; |
886 | avr_offset_expression (& op_expr); | |
887 | str = input_line_pointer; | |
888 | fix_new_exp (frag_now, where, 3, | |
889 | & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW); | |
adde6300 AM |
890 | break; |
891 | ||
892 | case 'S': | |
893 | case 's': | |
894 | { | |
895 | unsigned int x; | |
1dab94dd | 896 | |
adde6300 AM |
897 | x = avr_get_constant (str, 7); |
898 | str = input_line_pointer; | |
899 | if (*op == 'S') | |
900 | x <<= 4; | |
901 | op_mask |= x; | |
902 | } | |
903 | break; | |
904 | ||
905 | case 'P': | |
906 | { | |
907 | unsigned int x; | |
1dab94dd | 908 | |
adde6300 AM |
909 | x = avr_get_constant (str, 63); |
910 | str = input_line_pointer; | |
911 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
912 | } | |
913 | break; | |
914 | ||
915 | case 'p': | |
916 | { | |
917 | unsigned int x; | |
1dab94dd | 918 | |
adde6300 AM |
919 | x = avr_get_constant (str, 31); |
920 | str = input_line_pointer; | |
921 | op_mask |= x << 3; | |
922 | } | |
923 | break; | |
1dab94dd | 924 | |
1188e082 DC |
925 | case '?': |
926 | break; | |
1dab94dd | 927 | |
adde6300 | 928 | default: |
00d2865b | 929 | as_bad (_("unknown constraint `%c'"), *op); |
adde6300 | 930 | } |
1dab94dd | 931 | |
adde6300 AM |
932 | *line = str; |
933 | return op_mask; | |
934 | } | |
935 | ||
dc191a8f NC |
936 | /* Parse instruction operands. |
937 | Return binary opcode. */ | |
938 | ||
939 | static unsigned int | |
940 | avr_operands (struct avr_opcodes_s *opcode, char **line) | |
941 | { | |
942 | char *op = opcode->constraints; | |
943 | unsigned int bin = opcode->bin_opcode; | |
944 | char *frag = frag_more (opcode->insn_size * 2); | |
945 | char *str = *line; | |
946 | int where = frag - frag_now->fr_literal; | |
947 | static unsigned int prev = 0; /* Previous opcode. */ | |
948 | ||
949 | /* Opcode have operands. */ | |
950 | if (*op) | |
951 | { | |
952 | unsigned int reg1 = 0; | |
953 | unsigned int reg2 = 0; | |
954 | int reg1_present = 0; | |
955 | int reg2_present = 0; | |
956 | ||
957 | /* Parse first operand. */ | |
958 | if (REGISTER_P (*op)) | |
959 | reg1_present = 1; | |
960 | reg1 = avr_operand (opcode, where, op, &str); | |
961 | ++op; | |
962 | ||
963 | /* Parse second operand. */ | |
964 | if (*op) | |
965 | { | |
966 | if (*op == ',') | |
967 | ++op; | |
968 | ||
969 | if (*op == '=') | |
970 | { | |
971 | reg2 = reg1; | |
972 | reg2_present = 1; | |
973 | } | |
974 | else | |
975 | { | |
976 | if (REGISTER_P (*op)) | |
977 | reg2_present = 1; | |
978 | ||
979 | str = skip_space (str); | |
980 | if (*str++ != ',') | |
981 | as_bad (_("`,' required")); | |
982 | str = skip_space (str); | |
983 | ||
984 | reg2 = avr_operand (opcode, where, op, &str); | |
985 | } | |
986 | ||
987 | if (reg1_present && reg2_present) | |
988 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
989 | else if (reg2_present) | |
990 | reg2 <<= 4; | |
991 | } | |
992 | if (reg1_present) | |
993 | reg1 <<= 4; | |
994 | bin |= reg1 | reg2; | |
995 | } | |
996 | ||
997 | /* Detect undefined combinations (like ld r31,Z+). */ | |
998 | if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin)) | |
999 | as_warn (_("undefined combination of operands")); | |
1000 | ||
1001 | if (opcode->insn_size == 2) | |
1002 | { | |
1003 | /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs | |
1004 | (AVR core bug, fixed in the newer devices). */ | |
1005 | if (!(avr_opt.no_skip_bug || | |
1006 | (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW))) | |
1007 | && AVR_SKIP_P (prev)) | |
1008 | as_warn (_("skipping two-word instruction")); | |
1009 | ||
1010 | bfd_putl32 ((bfd_vma) bin, frag); | |
1011 | } | |
1012 | else | |
1013 | bfd_putl16 ((bfd_vma) bin, frag); | |
1014 | ||
1015 | prev = bin; | |
1016 | *line = str; | |
1017 | return bin; | |
1018 | } | |
1019 | ||
adde6300 AM |
1020 | /* GAS will call this function for each section at the end of the assembly, |
1021 | to permit the CPU backend to adjust the alignment of a section. */ | |
c6a7ab1f | 1022 | |
adde6300 | 1023 | valueT |
dc191a8f | 1024 | md_section_align (asection *seg, valueT addr) |
adde6300 AM |
1025 | { |
1026 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1027 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1028 | } | |
1029 | ||
1030 | /* If you define this macro, it should return the offset between the | |
1031 | address of a PC relative fixup and the position from which the PC | |
1032 | relative adjustment should be made. On many processors, the base | |
1033 | of a PC relative instruction is the next instruction, so this | |
1034 | macro would return the length of an instruction. */ | |
c6a7ab1f | 1035 | |
adde6300 | 1036 | long |
dc191a8f | 1037 | md_pcrel_from_section (fixS *fixp, segT sec) |
adde6300 | 1038 | { |
c6a7ab1f | 1039 | if (fixp->fx_addsy != (symbolS *) NULL |
adde6300 AM |
1040 | && (!S_IS_DEFINED (fixp->fx_addsy) |
1041 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
1042 | return 0; | |
1dab94dd | 1043 | |
adde6300 AM |
1044 | return fixp->fx_frag->fr_address + fixp->fx_where; |
1045 | } | |
1046 | ||
1047 | /* GAS will call this for each fixup. It should store the correct | |
c6a7ab1f NC |
1048 | value in the object file. */ |
1049 | ||
94f592af | 1050 | void |
dc191a8f | 1051 | md_apply_fix (fixS *fixP, valueT * valP, segT seg) |
adde6300 AM |
1052 | { |
1053 | unsigned char *where; | |
1054 | unsigned long insn; | |
a161fe53 | 1055 | long value = *valP; |
adde6300 | 1056 | |
94f592af NC |
1057 | if (fixP->fx_addsy == (symbolS *) NULL) |
1058 | fixP->fx_done = 1; | |
1059 | ||
87733541 AM |
1060 | else if (fixP->fx_pcrel) |
1061 | { | |
1062 | segT s = S_GET_SEGMENT (fixP->fx_addsy); | |
1063 | ||
1064 | if (s == seg || s == absolute_section) | |
1065 | { | |
1066 | value += S_GET_VALUE (fixP->fx_addsy); | |
1067 | fixP->fx_done = 1; | |
1068 | } | |
1069 | } | |
1070 | ||
a161fe53 AM |
1071 | /* We don't actually support subtracting a symbol. */ |
1072 | if (fixP->fx_subsy != (symbolS *) NULL) | |
1073 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
1dab94dd | 1074 | |
94f592af | 1075 | switch (fixP->fx_r_type) |
adde6300 AM |
1076 | { |
1077 | default: | |
94f592af | 1078 | fixP->fx_no_overflow = 1; |
adde6300 AM |
1079 | break; |
1080 | case BFD_RELOC_AVR_7_PCREL: | |
1081 | case BFD_RELOC_AVR_13_PCREL: | |
1082 | case BFD_RELOC_32: | |
1083 | case BFD_RELOC_16: | |
1084 | case BFD_RELOC_AVR_CALL: | |
1085 | break; | |
1086 | } | |
1087 | ||
94f592af | 1088 | if (fixP->fx_done) |
adde6300 AM |
1089 | { |
1090 | /* Fetch the instruction, insert the fully resolved operand | |
1091 | value, and stuff the instruction back again. */ | |
2132e3a3 | 1092 | where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; |
adde6300 AM |
1093 | insn = bfd_getl16 (where); |
1094 | ||
94f592af | 1095 | switch (fixP->fx_r_type) |
adde6300 AM |
1096 | { |
1097 | case BFD_RELOC_AVR_7_PCREL: | |
1098 | if (value & 1) | |
94f592af | 1099 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1100 | _("odd address operand: %ld"), value); |
1dab94dd | 1101 | |
adde6300 AM |
1102 | /* Instruction addresses are always right-shifted by 1. */ |
1103 | value >>= 1; | |
1104 | --value; /* Correct PC. */ | |
1dab94dd | 1105 | |
adde6300 | 1106 | if (value < -64 || value > 63) |
94f592af | 1107 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1108 | _("operand out of range: %ld"), value); |
1109 | value = (value << 3) & 0x3f8; | |
1110 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1111 | break; | |
1112 | ||
1113 | case BFD_RELOC_AVR_13_PCREL: | |
1114 | if (value & 1) | |
94f592af | 1115 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1116 | _("odd address operand: %ld"), value); |
1dab94dd | 1117 | |
adde6300 AM |
1118 | /* Instruction addresses are always right-shifted by 1. */ |
1119 | value >>= 1; | |
1120 | --value; /* Correct PC. */ | |
adde6300 AM |
1121 | |
1122 | if (value < -2048 || value > 2047) | |
1123 | { | |
65aa24b6 | 1124 | /* No wrap for devices with >8K of program memory. */ |
00d2865b | 1125 | if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap) |
94f592af | 1126 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1127 | _("operand out of range: %ld"), value); |
1128 | } | |
1129 | ||
1130 | value &= 0xfff; | |
1131 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1132 | break; | |
1133 | ||
1134 | case BFD_RELOC_32: | |
1135 | bfd_putl16 ((bfd_vma) value, where); | |
1136 | break; | |
1137 | ||
1138 | case BFD_RELOC_16: | |
1139 | bfd_putl16 ((bfd_vma) value, where); | |
1140 | break; | |
1141 | ||
1142 | case BFD_RELOC_AVR_16_PM: | |
c6a7ab1f | 1143 | bfd_putl16 ((bfd_vma) (value >> 1), where); |
adde6300 AM |
1144 | break; |
1145 | ||
750bce0e NC |
1146 | case BFD_RELOC_AVR_LDI: |
1147 | if (value > 255) | |
1148 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1149 | _("operand out of range: %ld"), value); | |
1150 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1151 | break; | |
1152 | ||
1153 | case BFD_RELOC_AVR_6: | |
1154 | if ((value > 63) || (value < 0)) | |
1155 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1156 | _("operand out of range: %ld"), value); | |
1157 | bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where); | |
1158 | break; | |
1159 | ||
1160 | case BFD_RELOC_AVR_6_ADIW: | |
1161 | if ((value > 63) || (value < 0)) | |
1162 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
1163 | _("operand out of range: %ld"), value); | |
1164 | bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where); | |
1165 | break; | |
1166 | ||
adde6300 AM |
1167 | case BFD_RELOC_AVR_LO8_LDI: |
1168 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1169 | break; | |
1170 | ||
adde6300 AM |
1171 | case BFD_RELOC_AVR_HI8_LDI: |
1172 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1173 | break; | |
1174 | ||
df406460 | 1175 | case BFD_RELOC_AVR_MS8_LDI: |
adde6300 AM |
1176 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); |
1177 | break; | |
1178 | ||
1179 | case BFD_RELOC_AVR_HH8_LDI: | |
1180 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1181 | break; | |
1182 | ||
1183 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1184 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1185 | break; | |
1186 | ||
adde6300 AM |
1187 | case BFD_RELOC_AVR_HI8_LDI_NEG: |
1188 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1189 | break; | |
1190 | ||
df406460 | 1191 | case BFD_RELOC_AVR_MS8_LDI_NEG: |
adde6300 AM |
1192 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); |
1193 | break; | |
1194 | ||
1195 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1196 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1197 | break; | |
1198 | ||
1199 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1200 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1201 | break; | |
1202 | ||
1203 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1204 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1205 | break; | |
1206 | ||
1207 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1208 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1209 | break; | |
1210 | ||
1211 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1212 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1213 | break; | |
1214 | ||
1215 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1216 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1217 | break; | |
1218 | ||
1219 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1220 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1221 | break; | |
1222 | ||
1223 | case BFD_RELOC_AVR_CALL: | |
1224 | { | |
1225 | unsigned long x; | |
1dab94dd | 1226 | |
adde6300 AM |
1227 | x = bfd_getl16 (where); |
1228 | if (value & 1) | |
94f592af | 1229 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 AM |
1230 | _("odd address operand: %ld"), value); |
1231 | value >>= 1; | |
1232 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1233 | bfd_putl16 ((bfd_vma) x, where); | |
c6a7ab1f | 1234 | bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2); |
adde6300 AM |
1235 | } |
1236 | break; | |
1237 | ||
1238 | default: | |
c6a7ab1f | 1239 | as_fatal (_("line %d: unknown relocation type: 0x%x"), |
94f592af | 1240 | fixP->fx_line, fixP->fx_r_type); |
adde6300 AM |
1241 | break; |
1242 | } | |
1243 | } | |
1244 | else | |
1245 | { | |
94f592af | 1246 | switch (fixP->fx_r_type) |
adde6300 AM |
1247 | { |
1248 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1249 | case -BFD_RELOC_AVR_HI8_LDI: | |
1250 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1251 | case -BFD_RELOC_AVR_LO8_LDI: | |
94f592af | 1252 | as_bad_where (fixP->fx_file, fixP->fx_line, |
adde6300 | 1253 | _("only constant expression allowed")); |
94f592af | 1254 | fixP->fx_done = 1; |
adde6300 AM |
1255 | break; |
1256 | default: | |
1257 | break; | |
1258 | } | |
adde6300 | 1259 | } |
adde6300 AM |
1260 | } |
1261 | ||
7be1c489 AM |
1262 | /* GAS will call this to generate a reloc, passing the resulting reloc |
1263 | to `bfd_install_relocation'. This currently works poorly, as | |
1264 | `bfd_install_relocation' often does the wrong thing, and instances of | |
1265 | `tc_gen_reloc' have been written to work around the problems, which | |
1266 | in turns makes it difficult to fix `bfd_install_relocation'. */ | |
adde6300 AM |
1267 | |
1268 | /* If while processing a fixup, a reloc really needs to be created | |
1269 | then it is done here. */ | |
1270 | ||
1271 | arelent * | |
dc191a8f NC |
1272 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, |
1273 | fixS *fixp) | |
adde6300 AM |
1274 | { |
1275 | arelent *reloc; | |
1276 | ||
df406460 NC |
1277 | if (fixp->fx_addsy && fixp->fx_subsy) |
1278 | { | |
1279 | long value = 0; | |
1280 | ||
1281 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) | |
1282 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1283 | { | |
1284 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1285 | "Difference of symbols in different sections is not supported"); | |
1286 | return NULL; | |
1287 | } | |
1288 | ||
28c9d252 | 1289 | /* We are dealing with two symbols defined in the same section. |
df406460 NC |
1290 | Let us fix-up them here. */ |
1291 | value += S_GET_VALUE (fixp->fx_addsy); | |
1292 | value -= S_GET_VALUE (fixp->fx_subsy); | |
1293 | ||
1294 | /* When fx_addsy and fx_subsy both are zero, md_apply_fix | |
1295 | only takes it's second operands for the fixup value. */ | |
1296 | fixp->fx_addsy = NULL; | |
1297 | fixp->fx_subsy = NULL; | |
1298 | md_apply_fix (fixp, (valueT *) &value, NULL); | |
1299 | ||
1300 | return NULL; | |
1301 | } | |
1302 | ||
dc191a8f | 1303 | reloc = xmalloc (sizeof (arelent)); |
adde6300 | 1304 | |
dc191a8f | 1305 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); |
adde6300 AM |
1306 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
1307 | ||
1308 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1309 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1310 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1311 | { | |
1312 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
c6a7ab1f NC |
1313 | _("reloc %d not supported by object file format"), |
1314 | (int) fixp->fx_r_type); | |
adde6300 AM |
1315 | return NULL; |
1316 | } | |
1317 | ||
1318 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1319 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1320 | reloc->address = fixp->fx_offset; | |
1321 | ||
1322 | reloc->addend = fixp->fx_offset; | |
1323 | ||
1324 | return reloc; | |
1325 | } | |
1326 | ||
adde6300 | 1327 | void |
dc191a8f | 1328 | md_assemble (char *str) |
adde6300 | 1329 | { |
c6a7ab1f | 1330 | struct avr_opcodes_s *opcode; |
adde6300 AM |
1331 | char op[11]; |
1332 | ||
c6a7ab1f | 1333 | str = skip_space (extract_word (str, op, sizeof (op))); |
adde6300 AM |
1334 | |
1335 | if (!op[0]) | |
00d2865b | 1336 | as_bad (_("can't find opcode ")); |
adde6300 AM |
1337 | |
1338 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1339 | ||
1340 | if (opcode == NULL) | |
1341 | { | |
00d2865b | 1342 | as_bad (_("unknown opcode `%s'"), op); |
adde6300 AM |
1343 | return; |
1344 | } | |
1345 | ||
b170af93 | 1346 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1188e082 | 1347 | version with operands exists in avr_opcodes[] in the next entry. */ |
c6a7ab1f | 1348 | |
1188e082 DC |
1349 | if (*str && *opcode->constraints == '?') |
1350 | ++opcode; | |
b170af93 | 1351 | |
00d2865b NC |
1352 | if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa) |
1353 | as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
adde6300 AM |
1354 | |
1355 | /* We used to set input_line_pointer to the result of get_operands, | |
1356 | but that is wrong. Our caller assumes we don't change it. */ | |
1357 | { | |
1358 | char *t = input_line_pointer; | |
dc191a8f | 1359 | |
adde6300 | 1360 | avr_operands (opcode, &str); |
b170af93 | 1361 | if (*skip_space (str)) |
00d2865b | 1362 | as_bad (_("garbage at end of line")); |
adde6300 AM |
1363 | input_line_pointer = t; |
1364 | } | |
1365 | } | |
1366 | ||
adde6300 | 1367 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and |
c6a7ab1f | 1368 | `avr_cons_fix_new'. */ |
adde6300 AM |
1369 | static int exp_mod_pm = 0; |
1370 | ||
1371 | /* Parse special CONS expression: pm (expression) | |
28c9d252 NC |
1372 | or alternatively: gs (expression). |
1373 | These are used for addressing program memory. | |
c6a7ab1f NC |
1374 | Relocation: BFD_RELOC_AVR_16_PM. */ |
1375 | ||
adde6300 | 1376 | void |
dc191a8f | 1377 | avr_parse_cons_expression (expressionS *exp, int nbytes) |
adde6300 | 1378 | { |
c6a7ab1f | 1379 | char *tmp; |
adde6300 AM |
1380 | |
1381 | exp_mod_pm = 0; | |
1382 | ||
1383 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1384 | ||
1385 | if (nbytes == 2) | |
1386 | { | |
28c9d252 NC |
1387 | char *pm_name1 = "pm"; |
1388 | char *pm_name2 = "gs"; | |
1389 | int len = strlen (pm_name1); | |
1390 | /* len must be the same for both pm identifiers. */ | |
1dab94dd | 1391 | |
28c9d252 NC |
1392 | if (strncasecmp (input_line_pointer, pm_name1, len) == 0 |
1393 | || strncasecmp (input_line_pointer, pm_name2, len) == 0) | |
adde6300 AM |
1394 | { |
1395 | input_line_pointer = skip_space (input_line_pointer + len); | |
1dab94dd | 1396 | |
adde6300 AM |
1397 | if (*input_line_pointer == '(') |
1398 | { | |
1399 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1400 | exp_mod_pm = 1; | |
1401 | expression (exp); | |
1dab94dd | 1402 | |
adde6300 AM |
1403 | if (*input_line_pointer == ')') |
1404 | ++input_line_pointer; | |
1405 | else | |
1406 | { | |
00d2865b | 1407 | as_bad (_("`)' required")); |
adde6300 AM |
1408 | exp_mod_pm = 0; |
1409 | } | |
1dab94dd | 1410 | |
adde6300 AM |
1411 | return; |
1412 | } | |
1dab94dd | 1413 | |
adde6300 AM |
1414 | input_line_pointer = tmp; |
1415 | } | |
1416 | } | |
1dab94dd | 1417 | |
adde6300 AM |
1418 | expression (exp); |
1419 | } | |
1420 | ||
1421 | void | |
dc191a8f NC |
1422 | avr_cons_fix_new (fragS *frag, |
1423 | int where, | |
1424 | int nbytes, | |
1425 | expressionS *exp) | |
adde6300 AM |
1426 | { |
1427 | if (exp_mod_pm == 0) | |
1428 | { | |
1429 | if (nbytes == 2) | |
b34976b6 | 1430 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16); |
adde6300 | 1431 | else if (nbytes == 4) |
b34976b6 | 1432 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32); |
adde6300 | 1433 | else |
00d2865b | 1434 | as_bad (_("illegal %srelocation size: %d"), "", nbytes); |
adde6300 AM |
1435 | } |
1436 | else | |
1437 | { | |
1438 | if (nbytes == 2) | |
b34976b6 | 1439 | fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM); |
adde6300 | 1440 | else |
00d2865b | 1441 | as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes); |
adde6300 AM |
1442 | exp_mod_pm = 0; |
1443 | } | |
1444 | } |