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adde6300 AM |
1 | /* tc-avr.c -- Assembler code for the ATMEL AVR |
2 | ||
3 | Copyright (C) 1999, 2000 Free Software Foundation, Inc. | |
4 | Contributed by Denis Chertykov <denisc@overta.ru> | |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include <stdio.h> | |
24 | #include <ctype.h> | |
25 | #include "as.h" | |
26 | #include "subsegs.h" | |
27 | ||
28 | const char comment_chars[] = ";"; | |
29 | const char line_comment_chars[] = "#"; | |
30 | const char line_separator_chars[] = "$"; | |
31 | ||
b170af93 DC |
32 | #define AVR_ISA_1200 0x0001 /* in the beginning there was ... */ |
33 | #define AVR_ISA_LPM 0x0002 /* device has LPM */ | |
34 | #define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */ | |
35 | #define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */ | |
36 | #define AVR_ISA_WRAP 0x0010 /* device has exactly 8K program memory */ | |
37 | #define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP, CALL) */ | |
38 | #define AVR_ISA_MUL 0x0040 /* device has new core (MUL, MOVW, ...) */ | |
39 | #define AVR_ISA_ELPM 0x0080 /* device has >64K program memory (ELPM) */ | |
40 | #define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] (none yet) */ | |
41 | #define AVR_ISA_SPM 0x0200 /* device can program itself (<=64K) */ | |
42 | #define AVR_ISA_ESPM 0x0400 /* device can program itself (>64K, none yet) */ | |
43 | #define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */ | |
44 | ||
45 | #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) | |
46 | #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) | |
47 | #define AVR_ISA_85xx (AVR_ISA_2xxx | AVR_ISA_WRAP) | |
48 | #define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA) | |
49 | #define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM) | |
50 | #define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX | AVR_ISA_SPM) | |
51 | #define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_LPMX) | |
52 | ||
53 | #define AVR_ISA_ALL 0xFFFF | |
adde6300 AM |
54 | |
55 | const char *md_shortopts = "m:"; | |
56 | struct mcu_type_s | |
57 | { | |
58 | char *name; | |
59 | int isa; | |
60 | int mach; | |
61 | }; | |
62 | ||
63 | static struct mcu_type_s mcu_types[] = | |
64 | { | |
b170af93 DC |
65 | {"avr1", AVR_ISA_TINY1, bfd_mach_avr1}, |
66 | {"avr2", AVR_ISA_85xx, bfd_mach_avr2}, | |
67 | {"avr3", AVR_ISA_M103, bfd_mach_avr3}, | |
68 | {"avr4", AVR_ISA_ALL, bfd_mach_avr4}, | |
adde6300 | 69 | {"at90s1200", AVR_ISA_1200, bfd_mach_avr1}, |
b170af93 DC |
70 | {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, |
71 | {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1}, | |
72 | {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1}, | |
73 | {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1}, | |
74 | {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1}, | |
adde6300 AM |
75 | {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2}, |
76 | {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2}, | |
77 | {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, | |
78 | {"attiny22" , AVR_ISA_2xxx, bfd_mach_avr2}, | |
79 | {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2}, | |
80 | {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2}, | |
81 | {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, | |
82 | {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, | |
b170af93 DC |
83 | {"at90s8515", AVR_ISA_85xx, bfd_mach_avr2}, |
84 | {"at90s8535", AVR_ISA_85xx, bfd_mach_avr2}, | |
85 | {"at90c8534", AVR_ISA_85xx, bfd_mach_avr2}, | |
86 | {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, | |
87 | {"atmega103", AVR_ISA_M103, bfd_mach_avr3}, | |
88 | {"atmega161", AVR_ISA_M161, bfd_mach_avr4}, | |
89 | {"at94k10", AVR_ISA_94K, bfd_mach_avr4}, | |
90 | {"at94k20", AVR_ISA_94K, bfd_mach_avr4}, | |
91 | {"at94k40", AVR_ISA_94K, bfd_mach_avr4}, | |
adde6300 AM |
92 | {NULL, 0, 0} |
93 | }; | |
94 | ||
95 | ||
96 | /* Current MCU type. */ | |
97 | static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2}; | |
98 | static struct mcu_type_s *avr_mcu = &default_mcu; | |
99 | ||
100 | const char EXP_CHARS[] = "eE"; | |
101 | const char FLT_CHARS[] = "dD"; | |
102 | static void avr_set_arch (int dummy); | |
103 | ||
104 | /* The target specific pseudo-ops which we support. */ | |
105 | const pseudo_typeS md_pseudo_table[] = | |
106 | { | |
107 | {"arch", avr_set_arch, 0}, | |
108 | { NULL, NULL, 0} | |
109 | }; | |
110 | ||
111 | #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00)) | |
b170af93 DC |
112 | #define REGISTER_P(x) ((x) == 'r' \ |
113 | || (x) == 'd' \ | |
114 | || (x) == 'w' \ | |
115 | || (x) == 'a' \ | |
116 | || (x) == 'v') | |
adde6300 AM |
117 | |
118 | struct avr_opcodes_s | |
119 | { | |
120 | char *name; | |
121 | char *constraints; | |
122 | char *opcode; | |
123 | int insn_size; /* in words */ | |
124 | int isa; | |
125 | unsigned int bin_opcode; | |
126 | }; | |
127 | ||
128 | static char * skip_space (char * s); | |
129 | static char * extract_word (char *from, char *to, int limit); | |
130 | static unsigned int avr_operand (struct avr_opcodes_s *opcode, | |
131 | int where, char *op, char **line); | |
132 | static unsigned int avr_operands (struct avr_opcodes_s *opcode, char **line); | |
df136245 | 133 | static unsigned int avr_get_constant (char * str, int max); |
adde6300 AM |
134 | static char *parse_exp (char *s, expressionS * op); |
135 | static bfd_reloc_code_real_type avr_ldi_expression (expressionS *exp); | |
136 | long md_pcrel_from_section PARAMS ((fixS *, segT)); | |
137 | ||
b170af93 | 138 | |
adde6300 AM |
139 | /* constraint letters |
140 | r - any register | |
141 | d - `ldi' register (r16-r31) | |
b170af93 DC |
142 | v - `movw' even register (r0, r2, ..., r28, r30) |
143 | a - `fmul' register (r16-r23) | |
144 | w - `adiw' register (r24,r26,r28,r30) | |
145 | e - pointer registers (X,Y,Z) | |
146 | b - base pointer register and displacement ([YZ]+disp) | |
147 | z - Z pointer register (for [e]lpm Rd,Z[+]) | |
adde6300 AM |
148 | M - immediate value from 0 to 255 |
149 | n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible | |
adde6300 AM |
150 | s - immediate value from 0 to 7 |
151 | P - Port address value from 0 to 64. (in, out) | |
152 | p - Port address value from 0 to 32. (cbi, sbi, sbic, sbis) | |
153 | K - immediate value from 0 to 64 (used in `adiw', `sbiw') | |
adde6300 AM |
154 | i - immediate value |
155 | l - signed pc relative offset from -64 to 63 | |
156 | L - signed pc relative offset from -2048 to 2047 | |
157 | h - absolut code address (call, jmp) | |
158 | S - immediate value from 0 to 7 (S = s << 4) | |
159 | */ | |
b170af93 | 160 | |
adde6300 AM |
161 | struct avr_opcodes_s avr_opcodes[] = |
162 | { | |
163 | {"adc", "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00}, | |
164 | {"add", "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00}, | |
165 | {"and", "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000}, | |
166 | {"cp", "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400}, | |
167 | {"cpc", "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400}, | |
168 | {"cpse", "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000}, | |
169 | {"eor", "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400}, | |
170 | {"mov", "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00}, | |
b170af93 | 171 | {"mul", "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL, 0x9c00}, |
adde6300 AM |
172 | {"or", "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800}, |
173 | {"sbc", "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800}, | |
174 | {"sub", "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800}, | |
175 | ||
176 | {"clr", "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400}, | |
177 | {"lsl", "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00}, | |
178 | {"rol", "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00}, | |
179 | {"tst", "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000}, | |
180 | ||
181 | {"andi", "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000}, | |
182 | /*XXX special case*/ | |
183 | {"cbr", "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000}, | |
184 | {"cpi", "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000}, | |
185 | {"ldi", "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000}, | |
186 | {"ori", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000}, | |
187 | {"sbci", "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000}, | |
188 | {"sbr", "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000}, | |
189 | {"subi", "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000}, | |
190 | ||
191 | {"sbrc", "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00}, | |
192 | {"sbrs", "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00}, | |
193 | {"bld", "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800}, | |
194 | {"bst", "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00}, | |
195 | ||
196 | {"in", "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000}, | |
197 | {"out", "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800}, | |
198 | ||
199 | {"adiw", "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600}, | |
200 | {"sbiw", "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700}, | |
201 | ||
202 | {"cbi", "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800}, | |
203 | {"sbi", "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00}, | |
204 | {"sbic", "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900}, | |
205 | {"sbis", "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00}, | |
206 | ||
207 | /* ee = {X=11,Y=10,Z=00, 0} */ | |
208 | {"ld", "r,e", "100!000dddddee-+", 1, AVR_ISA_2xxx, 0x8000}, | |
209 | {"st", "e,r", "100!001rrrrree-+", 1, AVR_ISA_2xxx, 0x8200}, | |
210 | {"ldd", "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000}, | |
211 | {"std", "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200}, | |
212 | {"sts", "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200}, | |
213 | {"lds", "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000}, | |
214 | ||
215 | {"brbc", "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400}, | |
216 | {"brbs", "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000}, | |
217 | ||
218 | {"brcc", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400}, | |
219 | {"brcs", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000}, | |
220 | {"breq", "l", "111100lllllll001", 1, AVR_ISA_1200, 0xf001}, | |
221 | {"brge", "l", "111101lllllll100", 1, AVR_ISA_1200, 0xf404}, | |
222 | {"brhc", "l", "111101lllllll101", 1, AVR_ISA_1200, 0xf405}, | |
223 | {"brhs", "l", "111100lllllll101", 1, AVR_ISA_1200, 0xf005}, | |
224 | {"brid", "l", "111101lllllll111", 1, AVR_ISA_1200, 0xf407}, | |
225 | {"brie", "l", "111100lllllll111", 1, AVR_ISA_1200, 0xf007}, | |
226 | {"brlo", "l", "111100lllllll000", 1, AVR_ISA_1200, 0xf000}, | |
227 | {"brlt", "l", "111100lllllll100", 1, AVR_ISA_1200, 0xf004}, | |
228 | {"brmi", "l", "111100lllllll010", 1, AVR_ISA_1200, 0xf002}, | |
229 | {"brne", "l", "111101lllllll001", 1, AVR_ISA_1200, 0xf401}, | |
230 | {"brpl", "l", "111101lllllll010", 1, AVR_ISA_1200, 0xf402}, | |
231 | {"brsh", "l", "111101lllllll000", 1, AVR_ISA_1200, 0xf400}, | |
232 | {"brtc", "l", "111101lllllll110", 1, AVR_ISA_1200, 0xf406}, | |
233 | {"brts", "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006}, | |
234 | {"brvc", "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403}, | |
235 | {"brvs", "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003}, | |
236 | ||
237 | {"rcall", "L", "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000}, | |
238 | {"rjmp", "L", "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000}, | |
239 | ||
240 | {"call", "h", "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e}, | |
241 | {"jmp", "h", "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c}, | |
242 | ||
243 | {"asr", "r", "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405}, | |
244 | {"com", "r", "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400}, | |
245 | {"dec", "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a}, | |
246 | {"inc", "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403}, | |
247 | {"lsr", "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406}, | |
248 | {"neg", "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401}, | |
249 | {"pop", "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f}, | |
250 | {"push", "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f}, | |
251 | {"ror", "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407}, | |
252 | {"ser", "d", "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f}, | |
253 | {"swap", "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402}, | |
254 | ||
255 | {"bclr", "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488}, | |
256 | {"bset", "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408}, | |
257 | ||
258 | {"clc", "", "1001010010001000", 1, AVR_ISA_1200, 0x9488}, | |
259 | {"clh", "", "1001010011011000", 1, AVR_ISA_1200, 0x94d8}, | |
260 | {"cli", "", "1001010011111000", 1, AVR_ISA_1200, 0x94f8}, | |
261 | {"cln", "", "1001010010101000", 1, AVR_ISA_1200, 0x94a8}, | |
262 | {"cls", "", "1001010011001000", 1, AVR_ISA_1200, 0x94c8}, | |
263 | {"clt", "", "1001010011101000", 1, AVR_ISA_1200, 0x94e8}, | |
264 | {"clv", "", "1001010010111000", 1, AVR_ISA_1200, 0x94b8}, | |
265 | {"clz", "", "1001010010011000", 1, AVR_ISA_1200, 0x9498}, | |
266 | {"icall","", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509}, | |
267 | {"ijmp", "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409}, | |
b170af93 | 268 | {"lpm", "", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8}, |
adde6300 AM |
269 | {"nop", "", "0000000000000000", 1, AVR_ISA_1200, 0x0000}, |
270 | {"ret", "", "1001010100001000", 1, AVR_ISA_1200, 0x9508}, | |
271 | {"reti", "", "1001010100011000", 1, AVR_ISA_1200, 0x9518}, | |
272 | {"sec", "", "1001010000001000", 1, AVR_ISA_1200, 0x9408}, | |
273 | {"seh", "", "1001010001011000", 1, AVR_ISA_1200, 0x9458}, | |
274 | {"sei", "", "1001010001111000", 1, AVR_ISA_1200, 0x9478}, | |
275 | {"sen", "", "1001010000101000", 1, AVR_ISA_1200, 0x9428}, | |
276 | {"ses", "", "1001010001001000", 1, AVR_ISA_1200, 0x9448}, | |
277 | {"set", "", "1001010001101000", 1, AVR_ISA_1200, 0x9468}, | |
278 | {"sev", "", "1001010000111000", 1, AVR_ISA_1200, 0x9438}, | |
279 | {"sez", "", "1001010000011000", 1, AVR_ISA_1200, 0x9418}, | |
280 | {"sleep","", "1001010110001000", 1, AVR_ISA_1200, 0x9588}, | |
281 | {"wdr", "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8}, | |
b170af93 DC |
282 | {"elpm", "", "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8}, |
283 | {"spm", "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8}, | |
284 | {"movw", "v,v", "00000001ddddrrrr", 1, AVR_ISA_MUL, 0x0100}, | |
285 | {"muls", "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200}, | |
286 | {"mulsu","a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300}, | |
287 | {"fmul", "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308}, | |
288 | {"fmuls","a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380}, | |
289 | {"fmulsu","a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388}, | |
290 | {"lpmx", "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004}, | |
291 | /* these are for devices that don't exists yet */ | |
292 | /* >64K program memory, new core */ | |
293 | {"elpmx","r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006}, | |
294 | {"espm", "", "1001010111111000", 1, AVR_ISA_ESPM, 0x95f8}, | |
295 | /* >128K program memory (PC = EIND:Z) */ | |
296 | {"eicall", "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519}, | |
297 | {"eijmp", "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419}, | |
adde6300 AM |
298 | {NULL, NULL, NULL, 0, 0, 0} |
299 | }; | |
300 | ||
301 | ||
302 | ||
303 | #define EXP_MOD_NAME(i) exp_mod[i].name | |
304 | #define EXP_MOD_RELOC(i) exp_mod[i].reloc | |
305 | #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc | |
306 | #define HAVE_PM_P(i) exp_mod[i].have_pm | |
307 | ||
308 | struct exp_mod_s | |
309 | { | |
310 | char * name; | |
311 | bfd_reloc_code_real_type reloc; | |
312 | bfd_reloc_code_real_type neg_reloc; | |
313 | int have_pm; | |
314 | }; | |
315 | ||
316 | static struct exp_mod_s exp_mod[] = { | |
317 | {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1}, | |
318 | {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0}, | |
319 | {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1}, | |
320 | {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0}, | |
321 | {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1}, | |
322 | {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0}, | |
323 | {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0}, | |
324 | {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0}, | |
325 | }; | |
326 | ||
327 | /* Opcode hash table. */ | |
328 | static struct hash_control *avr_hash; | |
329 | ||
330 | /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */ | |
331 | static struct hash_control *avr_mod_hash; | |
332 | ||
333 | #define OPTION_MMCU (OPTION_MD_BASE + 1) | |
334 | ||
335 | struct option md_longopts[] = { | |
336 | {"mmcu", required_argument, NULL, 'm'}, | |
337 | {NULL, no_argument, NULL, 0} | |
338 | }; | |
339 | size_t md_longopts_size = sizeof(md_longopts); | |
340 | ||
341 | static inline char * | |
342 | skip_space (s) | |
343 | char * s; | |
344 | { | |
345 | while (*s == ' ' || *s == '\t') | |
346 | ++s; | |
347 | return s; | |
348 | } | |
349 | ||
350 | /* Extract one word from FROM and copy it to TO. */ | |
351 | static char * | |
352 | extract_word (char *from, char *to, int limit) | |
353 | { | |
354 | char *op_start; | |
355 | char *op_end; | |
356 | int size = 0; | |
357 | ||
358 | /* Drop leading whitespace. */ | |
359 | from = skip_space (from); | |
360 | *to = 0; | |
361 | /* Find the op code end. */ | |
362 | for (op_start = op_end = from; *op_end != 0 && is_part_of_name(*op_end); ) | |
363 | { | |
364 | to[size++] = *op_end++; | |
365 | if (size + 1 >= limit) | |
366 | break; | |
367 | } | |
368 | to[size] = 0; | |
369 | return op_end; | |
370 | } | |
371 | ||
372 | int | |
373 | md_estimate_size_before_relax (fragp, seg) | |
df136245 DC |
374 | fragS *fragp ATTRIBUTE_UNUSED; |
375 | asection *seg ATTRIBUTE_UNUSED; | |
adde6300 AM |
376 | { |
377 | abort (); | |
378 | return 0; | |
379 | } | |
380 | ||
381 | void | |
382 | md_show_usage (stream) | |
383 | FILE *stream; | |
384 | { | |
385 | fprintf | |
386 | (stream, | |
387 | _ ("AVR options:\n" | |
388 | " -mmcu=[avr-name] select microcontroller variant\n" | |
389 | " [avr-name] can be:\n" | |
390 | " avr1 - AT90S1200\n" | |
391 | " avr2 - AT90S2xxx, AT90S4xxx, AT90S85xx, ATtiny22\n" | |
392 | " avr3 - ATmega103 or ATmega603\n" | |
393 | " avr4 - ATmega161\n" | |
394 | " or immediate microcontroller name.\n")); | |
395 | } | |
396 | ||
397 | static void | |
398 | avr_set_arch (dummy) | |
df136245 | 399 | int dummy ATTRIBUTE_UNUSED; |
adde6300 AM |
400 | { |
401 | char * str; | |
402 | str = (char *)alloca (20); | |
403 | input_line_pointer = extract_word (input_line_pointer, str, 20); | |
404 | md_parse_option ('m', str); | |
405 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); | |
406 | } | |
407 | ||
408 | int | |
409 | md_parse_option (c, arg) | |
410 | int c; | |
411 | char *arg; | |
412 | { | |
413 | char *t = alloca (strlen (arg) + 1); | |
414 | char *s = t; | |
415 | char *arg1 = arg; | |
416 | do | |
417 | *t = tolower (*arg1++); | |
418 | while (*t++); | |
419 | ||
420 | if (c == 'm') | |
421 | { | |
422 | int i; | |
423 | ||
424 | for (i = 0; mcu_types[i].name; ++i) | |
425 | if (strcmp (mcu_types[i].name, s) == 0) | |
426 | break; | |
427 | ||
428 | if (!mcu_types[i].name) | |
429 | as_fatal (_ ("unknown MCU: %s\n"), arg); | |
430 | if (avr_mcu == &default_mcu) | |
431 | avr_mcu = &mcu_types[i]; | |
432 | else | |
433 | as_fatal (_ ("redefinition of mcu type `%s'"), mcu_types[i].name); | |
434 | return 1; | |
435 | } | |
436 | return 0; | |
437 | } | |
438 | ||
439 | symbolS * | |
b170af93 | 440 | md_undefined_symbol(name) |
df136245 | 441 | char *name ATTRIBUTE_UNUSED; |
adde6300 AM |
442 | { |
443 | return 0; | |
444 | } | |
445 | ||
446 | /* Convert a string pointed to by input_line_pointer into a floating point | |
447 | constant of type `type', and store the appropriate bytes to `*litP'. | |
448 | The number of LITTLENUMS emitted is stored in `*sizeP'. Returns NULL if | |
449 | OK, or an error message otherwise. */ | |
450 | char * | |
451 | md_atof (type, litP, sizeP) | |
452 | int type; | |
453 | char *litP; | |
454 | int *sizeP; | |
455 | { | |
456 | int prec; | |
457 | LITTLENUM_TYPE words[4]; | |
458 | LITTLENUM_TYPE *wordP; | |
459 | char *t; | |
460 | ||
461 | switch (type) | |
462 | { | |
463 | case 'f': | |
464 | prec = 2; | |
465 | break; | |
466 | case 'd': | |
467 | prec = 4; | |
468 | break; | |
469 | default: | |
470 | *sizeP = 0; | |
471 | return _("bad call to md_atof"); | |
472 | } | |
473 | ||
474 | t = atof_ieee (input_line_pointer, type, words); | |
475 | if (t) | |
476 | input_line_pointer = t; | |
477 | ||
478 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
479 | /* This loop outputs the LITTLENUMs in REVERSE order. */ | |
480 | for (wordP = words + prec - 1; prec--;) | |
481 | { | |
482 | md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE)); | |
483 | litP += sizeof (LITTLENUM_TYPE); | |
484 | } | |
485 | return NULL; | |
486 | } | |
487 | ||
488 | void | |
489 | md_convert_frag (abfd, sec, fragP) | |
df136245 DC |
490 | bfd *abfd ATTRIBUTE_UNUSED; |
491 | asection *sec ATTRIBUTE_UNUSED; | |
492 | fragS *fragP ATTRIBUTE_UNUSED; | |
adde6300 AM |
493 | { |
494 | abort (); | |
495 | } | |
496 | ||
497 | ||
498 | void | |
499 | md_begin () | |
500 | { | |
df136245 | 501 | unsigned int i; |
adde6300 AM |
502 | struct avr_opcodes_s *opcode; |
503 | avr_hash = hash_new(); | |
504 | ||
505 | /* Insert unique names into hash table. This hash table then provides a | |
506 | quick index to the first opcode with a particular name in the opcode | |
507 | table. */ | |
508 | ||
509 | for (opcode = avr_opcodes; opcode->name; opcode++) | |
510 | hash_insert (avr_hash, opcode->name, (char *) opcode); | |
511 | ||
512 | avr_mod_hash = hash_new (); | |
513 | ||
514 | for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i) | |
515 | hash_insert (avr_mod_hash, EXP_MOD_NAME(i), (void*)(i+10)); | |
b170af93 | 516 | |
adde6300 AM |
517 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach); |
518 | } | |
519 | ||
520 | ||
df136245 DC |
521 | /* Resolve STR as a constant expression and return the result. |
522 | If result greater than MAX then error. */ | |
523 | ||
524 | static unsigned int | |
525 | avr_get_constant (str, max) | |
526 | char * str; | |
527 | int max; | |
528 | { | |
529 | expressionS ex; | |
530 | str = skip_space (str); | |
531 | input_line_pointer = str; | |
532 | expression (&ex); | |
533 | ||
534 | if (ex.X_op != O_constant) | |
535 | as_bad (_("constant value required")); | |
536 | ||
537 | if (ex.X_add_number > max || ex.X_add_number < 0) | |
538 | as_bad (_("number must be less than %d"), max+1); | |
539 | return ex.X_add_number; | |
540 | } | |
541 | ||
542 | ||
543 | /* Parse instruction operands. | |
544 | Returns binary opcode. */ | |
545 | ||
adde6300 AM |
546 | static unsigned int |
547 | avr_operands (opcode, line) | |
548 | struct avr_opcodes_s *opcode; | |
549 | char **line; | |
550 | { | |
551 | char *op = opcode->constraints; | |
552 | unsigned int bin = opcode->bin_opcode; | |
553 | char *frag = frag_more (opcode->insn_size * 2); | |
554 | char *str = *line; | |
555 | int where = frag - frag_now->fr_literal; | |
b170af93 | 556 | static unsigned int prev = 0; /* previous opcode */ |
adde6300 AM |
557 | |
558 | /* Opcode have operands. */ | |
559 | if (*op) | |
560 | { | |
561 | unsigned int reg1 = 0; | |
562 | unsigned int reg2 = 0; | |
563 | int reg1_present = 0; | |
564 | int reg2_present = 0; | |
565 | ||
566 | /* Parse first operand. */ | |
567 | if (REGISTER_P (*op)) | |
568 | reg1_present = 1; | |
569 | reg1 = avr_operand (opcode, where, op, &str); | |
570 | ++op; | |
571 | ||
572 | /* Parse second operand. */ | |
573 | if (*op) | |
574 | { | |
575 | if (*op == ',') | |
576 | ++op; | |
577 | if (*op == '=') | |
578 | { | |
579 | reg2 = reg1; | |
580 | reg2_present = 1; | |
581 | } | |
582 | else | |
583 | { | |
584 | if (REGISTER_P (*op)) | |
585 | reg2_present = 1; | |
586 | ||
587 | str = skip_space (str); | |
588 | if (*str++ != ',') | |
589 | as_bad (_ ("`,' required")); | |
590 | str = skip_space (str); | |
591 | ||
592 | reg2 = avr_operand (opcode, where, op, &str); | |
593 | ||
594 | } | |
595 | if (reg1_present && reg2_present) | |
596 | reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200); | |
597 | else if (reg2_present) | |
598 | reg2 <<= 4; | |
599 | } | |
600 | if (reg1_present) | |
601 | reg1 <<= 4; | |
602 | bin |= reg1 | reg2; | |
603 | } | |
b170af93 DC |
604 | |
605 | /* detect undefined combinations (like lpm r31,Z+) */ | |
606 | if (((bin & 0xFDEF) == 0x91AD) || ((bin & 0xFDEF) == 0x91AE) || | |
607 | ((bin & 0xFDEF) == 0x91C9) || ((bin & 0xFDEF) == 0x91CA) || | |
608 | ((bin & 0xFDEF) == 0x91E1) || ((bin & 0xFDEF) == 0x91E2) || | |
609 | ((bin & 0xFFED) == 0x91E5)) | |
610 | as_warn( _("undefined combination of operands")); | |
611 | ||
adde6300 AM |
612 | if (opcode->insn_size == 2) |
613 | { | |
b170af93 DC |
614 | /* warn if previous opcode was cpse/sbic/sbis/sbrc/sbrs |
615 | (AVR core bug) */ | |
616 | if ((prev & 0xFC00) == 0x1000 | |
617 | || (prev & 0xFD00) == 0x9900 | |
618 | || (prev & 0xFC08) == 0xFC00) | |
619 | as_warn (_("skipping two-word instruction")); | |
620 | ||
adde6300 AM |
621 | bfd_putl32 ((bfd_vma)bin, frag); |
622 | } | |
623 | else | |
b170af93 DC |
624 | bfd_putl16 ((bfd_vma)bin, frag); |
625 | ||
626 | prev = bin; | |
adde6300 AM |
627 | *line = str; |
628 | return bin; | |
629 | } | |
630 | ||
adde6300 | 631 | |
df136245 DC |
632 | /* Parse one instruction operand. |
633 | Returns operand bitmask. Also fixups can be generated. */ | |
634 | ||
adde6300 AM |
635 | static unsigned int |
636 | avr_operand (opcode, where, op, line) | |
637 | struct avr_opcodes_s *opcode; | |
638 | int where; | |
639 | char *op; | |
640 | char **line; | |
641 | { | |
adde6300 | 642 | expressionS op_expr; |
df136245 DC |
643 | unsigned int op_mask = 0; |
644 | char *str = skip_space (*line); | |
adde6300 | 645 | |
adde6300 AM |
646 | switch (*op) |
647 | { | |
648 | /* Any register operand. */ | |
649 | case 'w': | |
650 | case 'd': | |
651 | case 'r': | |
b170af93 DC |
652 | case 'a': |
653 | case 'v': | |
adde6300 | 654 | { |
b170af93 DC |
655 | op_mask = -1; |
656 | ||
df136245 DC |
657 | if (*str == 'r' || *str == 'R') |
658 | { | |
659 | char r_name[20]; | |
660 | ||
661 | str = extract_word (str, r_name, sizeof (r_name)); | |
b170af93 DC |
662 | if (isdigit(r_name[1])) |
663 | { | |
664 | if (r_name[2] == '\0') | |
665 | op_mask = r_name[1] - '0'; | |
666 | else if (r_name[1] != '0' | |
667 | && isdigit(r_name[2]) | |
668 | && r_name[3] == '\0') | |
669 | op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0'; | |
670 | } | |
671 | } | |
672 | else | |
673 | { | |
df136245 DC |
674 | op_mask = avr_get_constant (str, 31); |
675 | str = input_line_pointer; | |
b170af93 DC |
676 | } |
677 | ||
df136245 | 678 | if (op_mask <= 31) |
adde6300 | 679 | { |
b170af93 | 680 | switch (*op) |
adde6300 | 681 | { |
b170af93 DC |
682 | case 'a': |
683 | if (op_mask < 16 || op_mask > 23) | |
684 | as_bad (_ ("register r16-r23 required")); | |
685 | op_mask -= 16; | |
686 | break; | |
687 | ||
688 | case 'd': | |
689 | if (op_mask < 16) | |
690 | as_bad (_ ("register number above 15 required")); | |
691 | op_mask -= 16; | |
692 | break; | |
693 | ||
694 | case 'v': | |
695 | if (op_mask & 1) | |
696 | as_bad (_ ("even register number required")); | |
697 | op_mask >>= 1; | |
698 | break; | |
699 | ||
700 | case 'w': | |
701 | op_mask -= 24; | |
702 | if (op_mask & 1 || op_mask > 6) | |
703 | as_bad (_ ("register r24,r26,r28 or r30 required")); | |
704 | op_mask >>= 1; | |
adde6300 AM |
705 | break; |
706 | } | |
b170af93 | 707 | break; |
adde6300 | 708 | } |
df136245 | 709 | as_bad (_ ("register name or number from 0 to 31 required")); |
adde6300 AM |
710 | } |
711 | break; | |
712 | ||
713 | case 'e': | |
714 | { | |
715 | char c; | |
716 | if (*str == '-') | |
717 | { | |
718 | str = skip_space (str+1); | |
719 | op_mask = 0x1002; | |
720 | } | |
721 | c = tolower (*str); | |
722 | if (c == 'x') | |
723 | op_mask |= 0x100c; | |
724 | else if (c == 'y') | |
725 | op_mask |= 0x8; | |
726 | else if (c != 'z') | |
727 | as_bad (_ ("pointer register (X,Y or Z) required")); | |
728 | ||
729 | str = skip_space (str+1); | |
730 | if (*str == '+') | |
731 | { | |
732 | ++str; | |
733 | if (op_mask & 2) | |
734 | as_bad (_ ("cannot both predecrement and postincrement")); | |
735 | op_mask |= 0x1001; | |
736 | } | |
737 | } | |
738 | break; | |
739 | ||
b170af93 DC |
740 | case 'z': |
741 | { | |
742 | if (*str == '-') | |
743 | as_bad (_ ("can't predecrement")); | |
744 | ||
745 | if (! (*str == 'z' || *str == 'Z')) | |
746 | as_bad (_ ("pointer register Z required")); | |
747 | ||
748 | str = skip_space (str + 1); | |
749 | if (*str == '+') | |
750 | { | |
751 | ++str; | |
752 | op_mask |= 1; | |
753 | } | |
754 | } | |
755 | break; | |
756 | ||
adde6300 AM |
757 | case 'b': |
758 | { | |
759 | char c = tolower (*str++); | |
760 | if (c == 'y') | |
761 | op_mask |= 0x8; | |
762 | else if (c != 'z') | |
763 | as_bad (_ ("pointer register (Y or Z) required")); | |
764 | str = skip_space (str); | |
765 | if (*str++ == '+') | |
766 | { | |
767 | unsigned int x; | |
768 | x = avr_get_constant (str, 63); | |
769 | str = input_line_pointer; | |
770 | op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8); | |
771 | } | |
772 | } | |
773 | break; | |
774 | ||
775 | case 'h': | |
776 | { | |
777 | str = parse_exp (str, &op_expr); | |
778 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
779 | &op_expr, false, BFD_RELOC_AVR_CALL); | |
780 | ||
781 | } | |
782 | break; | |
783 | ||
784 | case 'L': | |
785 | { | |
786 | str = parse_exp (str, &op_expr); | |
787 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
788 | &op_expr, true, BFD_RELOC_AVR_13_PCREL); | |
789 | ||
790 | } | |
791 | break; | |
792 | ||
793 | case 'l': | |
794 | { | |
795 | str = parse_exp (str, &op_expr); | |
796 | fix_new_exp (frag_now, where, opcode->insn_size * 2, | |
797 | &op_expr, true, BFD_RELOC_AVR_7_PCREL); | |
798 | ||
799 | } | |
800 | break; | |
801 | ||
802 | case 'i': | |
803 | { | |
804 | str = parse_exp (str, &op_expr); | |
805 | fix_new_exp (frag_now, where+2, opcode->insn_size * 2, | |
806 | &op_expr, false, BFD_RELOC_16); | |
807 | ||
808 | } | |
809 | break; | |
810 | ||
811 | case 'M': | |
812 | { | |
813 | bfd_reloc_code_real_type r_type; | |
814 | input_line_pointer = str; | |
815 | r_type = avr_ldi_expression (&op_expr); | |
816 | str = input_line_pointer; | |
817 | fix_new_exp (frag_now, where, 3, | |
818 | &op_expr, false, r_type); | |
819 | } | |
820 | break; | |
821 | ||
822 | case 'n': | |
823 | { | |
824 | unsigned int x; | |
825 | x = ~avr_get_constant (str, 255); | |
826 | str = input_line_pointer; | |
827 | op_mask |= (x & 0xf) | ((x << 4) & 0xf00); | |
828 | } | |
829 | break; | |
830 | ||
831 | case 'K': | |
832 | { | |
833 | unsigned int x; | |
834 | x = avr_get_constant (str, 63); | |
835 | str = input_line_pointer; | |
836 | op_mask |= (x & 0xf) | ((x & 0x30) << 2); | |
837 | } | |
838 | break; | |
839 | ||
840 | case 'S': | |
841 | case 's': | |
842 | { | |
843 | unsigned int x; | |
844 | x = avr_get_constant (str, 7); | |
845 | str = input_line_pointer; | |
846 | if (*op == 'S') | |
847 | x <<= 4; | |
848 | op_mask |= x; | |
849 | } | |
850 | break; | |
851 | ||
852 | case 'P': | |
853 | { | |
854 | unsigned int x; | |
855 | x = avr_get_constant (str, 63); | |
856 | str = input_line_pointer; | |
857 | op_mask |= (x & 0xf) | ((x & 0x30) << 5); | |
858 | } | |
859 | break; | |
860 | ||
861 | case 'p': | |
862 | { | |
863 | unsigned int x; | |
864 | x = avr_get_constant (str, 31); | |
865 | str = input_line_pointer; | |
866 | op_mask |= x << 3; | |
867 | } | |
868 | break; | |
869 | default: | |
870 | as_bad (_ ("unknown constraint `%c'"), *op); | |
871 | } | |
872 | *line = str; | |
873 | return op_mask; | |
874 | } | |
875 | ||
876 | /* GAS will call this function for each section at the end of the assembly, | |
877 | to permit the CPU backend to adjust the alignment of a section. */ | |
878 | valueT | |
879 | md_section_align (seg, addr) | |
880 | asection *seg; | |
881 | valueT addr; | |
882 | { | |
883 | int align = bfd_get_section_alignment (stdoutput, seg); | |
884 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
885 | } | |
886 | ||
887 | /* If you define this macro, it should return the offset between the | |
888 | address of a PC relative fixup and the position from which the PC | |
889 | relative adjustment should be made. On many processors, the base | |
890 | of a PC relative instruction is the next instruction, so this | |
891 | macro would return the length of an instruction. */ | |
892 | long | |
893 | md_pcrel_from_section (fixp, sec) | |
894 | fixS *fixp; | |
895 | segT sec; | |
896 | { | |
897 | if (fixp->fx_addsy != (symbolS *)NULL | |
898 | && (!S_IS_DEFINED (fixp->fx_addsy) | |
899 | || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) | |
900 | return 0; | |
901 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
902 | } | |
903 | ||
904 | /* GAS will call this for each fixup. It should store the correct | |
905 | value in the object file. */ | |
906 | int | |
907 | md_apply_fix3 (fixp, valuep, seg) | |
908 | fixS *fixp; | |
909 | valueT *valuep; | |
910 | segT seg; | |
911 | { | |
912 | unsigned char *where; | |
913 | unsigned long insn; | |
914 | long value; | |
915 | ||
916 | if (fixp->fx_addsy == (symbolS *) NULL) | |
917 | { | |
918 | value = *valuep; | |
919 | fixp->fx_done = 1; | |
920 | } | |
921 | else if (fixp->fx_pcrel) | |
922 | { | |
923 | segT s = S_GET_SEGMENT (fixp->fx_addsy); | |
924 | if (fixp->fx_addsy && (s == seg || s == absolute_section)) | |
925 | { | |
926 | value = S_GET_VALUE (fixp->fx_addsy) + *valuep; | |
927 | fixp->fx_done = 1; | |
928 | } | |
929 | else | |
930 | value = *valuep; | |
931 | } | |
932 | else | |
933 | { | |
934 | value = fixp->fx_offset; | |
935 | if (fixp->fx_subsy != (symbolS *) NULL) | |
936 | { | |
937 | if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) | |
938 | { | |
939 | value -= S_GET_VALUE (fixp->fx_subsy); | |
940 | fixp->fx_done = 1; | |
941 | } | |
942 | else | |
943 | { | |
944 | /* We don't actually support subtracting a symbol. */ | |
945 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
946 | _ ("expression too complex")); | |
947 | } | |
948 | } | |
949 | } | |
950 | switch (fixp->fx_r_type) | |
951 | { | |
952 | default: | |
953 | fixp->fx_no_overflow = 1; | |
954 | break; | |
955 | case BFD_RELOC_AVR_7_PCREL: | |
956 | case BFD_RELOC_AVR_13_PCREL: | |
957 | case BFD_RELOC_32: | |
958 | case BFD_RELOC_16: | |
959 | case BFD_RELOC_AVR_CALL: | |
960 | break; | |
961 | } | |
962 | ||
963 | if (fixp->fx_done) | |
964 | { | |
965 | /* Fetch the instruction, insert the fully resolved operand | |
966 | value, and stuff the instruction back again. */ | |
967 | where = fixp->fx_frag->fr_literal + fixp->fx_where; | |
968 | insn = bfd_getl16 (where); | |
969 | ||
970 | switch (fixp->fx_r_type) | |
971 | { | |
972 | case BFD_RELOC_AVR_7_PCREL: | |
973 | if (value & 1) | |
974 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
975 | _("odd address operand: %ld"), value); | |
976 | /* Instruction addresses are always right-shifted by 1. */ | |
977 | value >>= 1; | |
978 | --value; /* Correct PC. */ | |
979 | if (value < -64 || value > 63) | |
980 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
981 | _("operand out of range: %ld"), value); | |
982 | value = (value << 3) & 0x3f8; | |
983 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
984 | break; | |
985 | ||
986 | case BFD_RELOC_AVR_13_PCREL: | |
987 | if (value & 1) | |
988 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
989 | _("odd address operand: %ld"), value); | |
990 | /* Instruction addresses are always right-shifted by 1. */ | |
991 | value >>= 1; | |
992 | --value; /* Correct PC. */ | |
adde6300 AM |
993 | |
994 | if (value < -2048 || value > 2047) | |
995 | { | |
b170af93 | 996 | if (avr_mcu->isa & AVR_ISA_WRAP) |
adde6300 AM |
997 | { |
998 | if (value > 2047) | |
999 | value -= 4096; | |
1000 | else | |
1001 | value += 4096; | |
1002 | } | |
1003 | else | |
1004 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1005 | _("operand out of range: %ld"), value); | |
1006 | } | |
1007 | ||
1008 | value &= 0xfff; | |
1009 | bfd_putl16 ((bfd_vma) (value | insn), where); | |
1010 | break; | |
1011 | ||
1012 | case BFD_RELOC_32: | |
1013 | bfd_putl16 ((bfd_vma) value, where); | |
1014 | break; | |
1015 | ||
1016 | case BFD_RELOC_16: | |
1017 | bfd_putl16 ((bfd_vma) value, where); | |
1018 | break; | |
1019 | ||
1020 | case BFD_RELOC_AVR_16_PM: | |
1021 | bfd_putl16 ((bfd_vma) (value>>1), where); | |
1022 | break; | |
1023 | ||
1024 | case BFD_RELOC_AVR_LO8_LDI: | |
1025 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where); | |
1026 | break; | |
1027 | ||
1028 | case -BFD_RELOC_AVR_LO8_LDI: | |
1029 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1030 | break; | |
1031 | ||
1032 | case BFD_RELOC_AVR_HI8_LDI: | |
1033 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where); | |
1034 | break; | |
1035 | ||
1036 | case -BFD_RELOC_AVR_HI8_LDI: | |
1037 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where); | |
1038 | break; | |
1039 | ||
1040 | case BFD_RELOC_AVR_HH8_LDI: | |
1041 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where); | |
1042 | break; | |
1043 | ||
1044 | case BFD_RELOC_AVR_LO8_LDI_NEG: | |
1045 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where); | |
1046 | break; | |
1047 | ||
1048 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1049 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1050 | break; | |
1051 | ||
1052 | case BFD_RELOC_AVR_HI8_LDI_NEG: | |
1053 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where); | |
1054 | break; | |
1055 | ||
1056 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1057 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where); | |
1058 | break; | |
1059 | ||
1060 | case BFD_RELOC_AVR_HH8_LDI_NEG: | |
1061 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where); | |
1062 | break; | |
1063 | ||
1064 | case BFD_RELOC_AVR_LO8_LDI_PM: | |
1065 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where); | |
1066 | break; | |
1067 | ||
1068 | case BFD_RELOC_AVR_HI8_LDI_PM: | |
1069 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where); | |
1070 | break; | |
1071 | ||
1072 | case BFD_RELOC_AVR_HH8_LDI_PM: | |
1073 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where); | |
1074 | break; | |
1075 | ||
1076 | case BFD_RELOC_AVR_LO8_LDI_PM_NEG: | |
1077 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where); | |
1078 | break; | |
1079 | ||
1080 | case BFD_RELOC_AVR_HI8_LDI_PM_NEG: | |
1081 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where); | |
1082 | break; | |
1083 | ||
1084 | case BFD_RELOC_AVR_HH8_LDI_PM_NEG: | |
1085 | bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where); | |
1086 | break; | |
1087 | ||
1088 | case BFD_RELOC_AVR_CALL: | |
1089 | { | |
1090 | unsigned long x; | |
1091 | x = bfd_getl16 (where); | |
1092 | if (value & 1) | |
1093 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1094 | _("odd address operand: %ld"), value); | |
1095 | value >>= 1; | |
1096 | x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16; | |
1097 | bfd_putl16 ((bfd_vma) x, where); | |
1098 | bfd_putl16 ((bfd_vma) (value & 0xffff), where+2); | |
1099 | } | |
1100 | break; | |
1101 | ||
1102 | default: | |
1103 | as_fatal ( _("line %d: unknown relocation type: 0x%x"), | |
1104 | fixp->fx_line, fixp->fx_r_type); | |
1105 | break; | |
1106 | } | |
1107 | } | |
1108 | else | |
1109 | { | |
1110 | switch (fixp->fx_r_type) | |
1111 | { | |
1112 | case -BFD_RELOC_AVR_HI8_LDI_NEG: | |
1113 | case -BFD_RELOC_AVR_HI8_LDI: | |
1114 | case -BFD_RELOC_AVR_LO8_LDI_NEG: | |
1115 | case -BFD_RELOC_AVR_LO8_LDI: | |
1116 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1117 | _("only constant expression allowed")); | |
1118 | fixp->fx_done = 1; | |
1119 | break; | |
1120 | default: | |
1121 | break; | |
1122 | } | |
1123 | fixp->fx_addnumber = value; | |
1124 | } | |
1125 | return 0; | |
1126 | } | |
1127 | ||
1128 | ||
1129 | /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS | |
1130 | will pass the resulting reloc to `bfd_install_relocation'. This | |
1131 | currently works poorly, as `bfd_install_relocation' often does the | |
1132 | wrong thing, and instances of `tc_gen_reloc' have been written to | |
1133 | work around the problems, which in turns makes it difficult to fix | |
1134 | `bfd_install_relocation'. */ | |
1135 | ||
1136 | /* If while processing a fixup, a reloc really needs to be created | |
1137 | then it is done here. */ | |
1138 | ||
1139 | arelent * | |
1140 | tc_gen_reloc (seg, fixp) | |
df136245 | 1141 | asection *seg ATTRIBUTE_UNUSED; |
adde6300 AM |
1142 | fixS *fixp; |
1143 | { | |
1144 | arelent *reloc; | |
1145 | ||
1146 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1147 | ||
1148 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
1149 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
1150 | ||
1151 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1152 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1153 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1154 | { | |
1155 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1156 | _("reloc %d not supported by object file format"), | |
1157 | (int)fixp->fx_r_type); | |
1158 | return NULL; | |
1159 | } | |
1160 | ||
1161 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1162 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1163 | reloc->address = fixp->fx_offset; | |
1164 | ||
1165 | reloc->addend = fixp->fx_offset; | |
1166 | ||
1167 | return reloc; | |
1168 | } | |
1169 | ||
1170 | ||
1171 | void | |
1172 | md_assemble (str) | |
1173 | char *str; | |
1174 | { | |
1175 | struct avr_opcodes_s * opcode; | |
1176 | char op[11]; | |
1177 | ||
df136245 | 1178 | str = skip_space (extract_word (str, op, sizeof(op))); |
adde6300 AM |
1179 | |
1180 | if (!op[0]) | |
1181 | as_bad (_ ("can't find opcode ")); | |
1182 | ||
1183 | opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1184 | ||
1185 | if (opcode == NULL) | |
1186 | { | |
1187 | as_bad (_ ("unknown opcode `%s'"), op); | |
1188 | return; | |
1189 | } | |
1190 | ||
b170af93 DC |
1191 | /* Special case for opcodes with optional operands (lpm, elpm) - |
1192 | version with operands is listed in avr_opcodes[] with "x" suffix. */ | |
1193 | ||
1194 | if (*str && !(*opcode->constraints)) | |
1195 | { | |
1196 | struct avr_opcodes_s *opc1; | |
1197 | ||
1198 | /* known opcode, so strlen(op) <= 6 and strcat() should be safe */ | |
1199 | strcat(op, "x"); | |
1200 | opc1 = (struct avr_opcodes_s *) hash_find (avr_hash, op); | |
1201 | ||
1202 | /* if unknown, just forget it and use the original opcode */ | |
1203 | if (opc1) | |
1204 | opcode = opc1; | |
1205 | } | |
1206 | ||
adde6300 AM |
1207 | if ((opcode->isa & avr_mcu->isa) != opcode->isa) |
1208 | as_bad (_ ("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name); | |
1209 | ||
1210 | /* We used to set input_line_pointer to the result of get_operands, | |
1211 | but that is wrong. Our caller assumes we don't change it. */ | |
1212 | { | |
1213 | char *t = input_line_pointer; | |
1214 | avr_operands (opcode, &str); | |
b170af93 | 1215 | if (*skip_space (str)) |
adde6300 AM |
1216 | as_bad (_ ("garbage at end of line")); |
1217 | input_line_pointer = t; | |
1218 | } | |
1219 | } | |
1220 | ||
1221 | /* Parse ordinary expression. */ | |
1222 | static char * | |
1223 | parse_exp (s, op) | |
1224 | char *s; | |
1225 | expressionS * op; | |
1226 | { | |
1227 | input_line_pointer = s; | |
1228 | expression (op); | |
1229 | if (op->X_op == O_absent) | |
1230 | as_bad (_("missing operand")); | |
1231 | return input_line_pointer; | |
1232 | } | |
1233 | ||
1234 | ||
1235 | /* Parse special expressions (needed for LDI command): | |
1236 | xx8 (address) | |
1237 | xx8 (-address) | |
1238 | pm_xx8 (address) | |
1239 | pm_xx8 (-address) | |
1240 | where xx is: hh, hi, lo | |
1241 | */ | |
1242 | static bfd_reloc_code_real_type | |
1243 | avr_ldi_expression (exp) | |
1244 | expressionS *exp; | |
1245 | { | |
1246 | char *str = input_line_pointer; | |
1247 | char *tmp; | |
1248 | char op[8]; | |
1249 | int mod; | |
1250 | tmp = str; | |
1251 | ||
1252 | str = extract_word (str, op, sizeof (op)); | |
1253 | if (op[0]) | |
1254 | { | |
1255 | mod = (int) hash_find (avr_mod_hash, op); | |
1256 | if (mod) | |
1257 | { | |
1258 | int closes = 0; | |
1259 | mod -= 10; | |
1260 | str = skip_space (str); | |
1261 | if (*str == '(') | |
1262 | { | |
1263 | int neg_p = 0; | |
1264 | ++str; | |
1265 | if (strncmp ("pm(", str, 3) == 0 | |
1266 | || strncmp ("-(pm(", str, 5) == 0) | |
1267 | { | |
1268 | if (HAVE_PM_P(mod)) | |
1269 | { | |
1270 | ++mod; | |
1271 | ++closes; | |
1272 | } | |
1273 | else | |
1274 | as_bad (_ ("illegal expression")); | |
1275 | if (*str == '-') | |
1276 | { | |
1277 | neg_p = 1; | |
1278 | ++closes; | |
1279 | str += 5; | |
1280 | } | |
1281 | else | |
1282 | str += 3; | |
1283 | } | |
1284 | if (*str == '-' && *(str + 1) == '(') | |
1285 | { | |
1286 | neg_p ^= 1; | |
1287 | ++closes; | |
1288 | str += 2; | |
1289 | } | |
1290 | input_line_pointer = str; | |
1291 | expression (exp); | |
1292 | do | |
1293 | { | |
1294 | if (*input_line_pointer != ')') | |
1295 | { | |
1296 | as_bad (_ ("`)' required")); | |
1297 | break; | |
1298 | } | |
1299 | input_line_pointer++; | |
1300 | } | |
1301 | while (closes--); | |
1302 | return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod); | |
1303 | } | |
1304 | } | |
1305 | } | |
1306 | input_line_pointer = tmp; | |
1307 | expression (exp); | |
1308 | return BFD_RELOC_AVR_LO8_LDI; | |
1309 | } | |
1310 | ||
1311 | /* Flag to pass `pm' mode between `avr_parse_cons_expression' and | |
1312 | `avr_cons_fix_new' */ | |
1313 | static int exp_mod_pm = 0; | |
1314 | ||
1315 | /* Parse special CONS expression: pm (expression) | |
1316 | which is used for addressing to a program memory. | |
1317 | Relocation: BFD_RELOC_AVR_16_PM */ | |
1318 | void | |
1319 | avr_parse_cons_expression (exp, nbytes) | |
1320 | expressionS *exp; | |
1321 | int nbytes; | |
1322 | { | |
1323 | char * tmp; | |
1324 | ||
1325 | exp_mod_pm = 0; | |
1326 | ||
1327 | tmp = input_line_pointer = skip_space (input_line_pointer); | |
1328 | ||
1329 | if (nbytes == 2) | |
1330 | { | |
1331 | char * pm_name = "pm"; | |
1332 | int len = strlen (pm_name); | |
1333 | if (strncasecmp (input_line_pointer, pm_name, len) == 0) | |
1334 | { | |
1335 | input_line_pointer = skip_space (input_line_pointer + len); | |
1336 | if (*input_line_pointer == '(') | |
1337 | { | |
1338 | input_line_pointer = skip_space (input_line_pointer + 1); | |
1339 | exp_mod_pm = 1; | |
1340 | expression (exp); | |
1341 | if (*input_line_pointer == ')') | |
1342 | ++input_line_pointer; | |
1343 | else | |
1344 | { | |
1345 | as_bad (_ ("`)' required")); | |
1346 | exp_mod_pm = 0; | |
1347 | } | |
1348 | return; | |
1349 | } | |
1350 | input_line_pointer = tmp; | |
1351 | } | |
1352 | } | |
1353 | expression (exp); | |
1354 | } | |
1355 | ||
1356 | void | |
1357 | avr_cons_fix_new(frag, where, nbytes, exp) | |
1358 | fragS *frag; | |
1359 | int where; | |
1360 | int nbytes; | |
1361 | expressionS *exp; | |
1362 | { | |
1363 | if (exp_mod_pm == 0) | |
1364 | { | |
1365 | if (nbytes == 2) | |
1366 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16); | |
1367 | else if (nbytes == 4) | |
1368 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32); | |
1369 | else | |
1370 | as_bad (_ ("illegal %srelocation size: %d"), "", nbytes); | |
1371 | } | |
1372 | else | |
1373 | { | |
1374 | if (nbytes == 2) | |
1375 | fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM); | |
1376 | else | |
1377 | as_bad (_ ("illegal %srelocation size: %d"), "`pm' ", nbytes); | |
1378 | exp_mod_pm = 0; | |
1379 | } | |
1380 | } |